From dd64ec82a36f775eead11192829109de7d02b85b Mon Sep 17 00:00:00 2001 From: Foad Sojoodi Farimani Date: Thu, 23 Apr 2020 23:33:35 +0200 Subject: [PATCH] copied from Patreon --- .gitignore | 216 + COPYING | 674 ++ README.md | 70 + SimulIDE.pro | 239 + build_XX/SimulIDE_Build.pro | 5 + changelog.txt | 251 + resources/data/arduino/arduino_nano.package | 63 + resources/data/arduino/arduino_uno.package | 58 + resources/data/arduino/leonardo.package | 59 + resources/data/arduino/mega.package | 124 + resources/data/arduinos.xml | 33 + resources/data/avr/at90usb162.data | 123 + resources/data/avr/at90usb162.package | 65 + resources/data/avr/atmega128.data | 126 + resources/data/avr/atmega128.package | 92 + resources/data/avr/atmega1280.data | 188 + resources/data/avr/atmega1280.package | 128 + resources/data/avr/atmega1281.data | 188 + resources/data/avr/atmega1284.data | 117 + resources/data/avr/atmega128rfa1.data | 287 + resources/data/avr/atmega128rfa1.package | 92 + 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.../Arduino/Voltimeter/voltimeter2.simu | 99 + .../Voltimeter/voltimeter2_backup.simu | 99 + .../arduino_eeprom/arduino_eeprom.simu | 33 + .../arduino_eeprom/arduino_eeprom.ino | 54 + .../arduino_led_matrix/led_matrix.simu | 87 + .../led_matrix/led_matrix.ino | 115 + .../Arduino/arduino_music/arduino_music.simu | 21 + .../arduino_music_ino/arduino_music.ino | 164 + .../arduino_serial_echo.simu | 12 + .../arduino_serial_echo.ino | 19 + .../examples/Arduino/barGraph/barGraph.simu | 231 + .../examples/Arduino/barGraph/barGraph2.simu | 261 + .../Arduino/ledFadding/ledFadding.ino | 39 + .../Arduino/ledFadding/ledFadding.simu | 135 + .../Arduino/oscope8544/oscope8544.simu | 162 + .../Arduino/oscope8544/oscope8544_2.ino | 131 + .../examples/Arduino/pcdtest/pcdtest.simu | 30 + .../examples/Arduino/servo-gcb/servo.asm | 583 ++ .../examples/Arduino/servo-gcb/servo.gcb | 42 + .../examples/Arduino/servo-gcb/servo.html | 26 + .../examples/Arduino/servo-gcb/servo.lst | 858 +++ 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But first, please read +. diff --git a/README.md b/README.md new file mode 100644 index 0000000..047e19c --- /dev/null +++ b/README.md @@ -0,0 +1,70 @@ +# SimulIDE 0.3.10 + +Electronic Circuit Simulator + + +SimulIDE is a simple real time electronic circuit simulator. + +It's intended for general purpose electronics and microcontroller simulation, supporting PIC, AVR and Arduino. + +PIC simulation is provided by gpsim and avr simulation by simavr. + +This is not an accurate simulator for circuit analisis, it aims to be the fast, simple and easy to use, so this means simple and not very accurate electronic models and limited features. + +Intended for hobbist or students to learn and experiment with simple circuits. + + +SimulIDE also features a code Editor and Debugger for GcBasic, Arduino, PIC asm and AVR asm. +Editor/Debugger is still in it's firsts stages of development, with basic functionalities, but it is possible to write, compile and basic debugging with breakpoints, watch registers and global variables. + + +## Building SimulIDE: + +Build dependencies: + + - Qt5 dev packages + - Qt5Core + - Qt5Gui + - Qt5Xml + - Qt5Widgets + - Qt5Concurrent + - Qt5svg dev + - Qt5 Multimedia dev + - Qt5 Serialport dev + - Qt5 Script + - Qt5 qmake + - libelf dev + - gcc-avr + - avr-libc + + +Once installed go to build_XX folder, then: + +``` +$ qmake +$ make +``` + +In folder build_XX/release/SimulIDE_x.x.x you will find executable and all files needed to run SimulIDE. + + + +## Running SimulIDE: + +Run time dependencies: + + - Qt5Core + - Qt5Gui + - Qt5Xml + - Qt5svg + - Qt5Widgets + - Qt5Concurrent + - Qt5 Multimedia + - Qt5 Multimedia Plugins + - Qt5 Serialport + - Qt5 Script + - libelf + + +SimuliDE executable is in bin folder. +No need for installation, place SimulIDE folder wherever you want and run the executable. diff --git a/SimulIDE.pro b/SimulIDE.pro new file mode 100644 index 0000000..c1e9aad --- /dev/null +++ b/SimulIDE.pro @@ -0,0 +1,239 @@ + ########################################################################### + # Copyright (C) 2012 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + + +win32 { + VERSION = "0.3.12.18" +} +unix { + VERSION = "0.3.12-SR8" +} + +TEMPLATE = app + +QT += svg +QT += xml +QT += script +QT += widgets +QT += concurrent +QT += serialport +QT += multimedia widgets + +SOURCES += ../src/*.cpp \ + ../src/gui/*.cpp \ + ../src/gui/circuitwidget/*.cpp \ + ../src/gui/circuitwidget/components/*.cpp \ + ../src/gui/circuitwidget/components/active/*.cpp \ + ../src/gui/circuitwidget/components/logic/*.cpp \ + ../src/gui/circuitwidget/components/mcu/*.cpp \ + ../src/gui/circuitwidget/components/meters/*.cpp \ + ../src/gui/circuitwidget/components/other/*.cpp \ + ../src/gui/circuitwidget/components/outputs/*.cpp \ + ../src/gui/circuitwidget/components/passive/*.cpp \ + ../src/gui/circuitwidget/components/sources/*.cpp \ + ../src/gui/circuitwidget/components/switches/*.cpp \ + ../src/gui/oscopewidget/*.cpp \ + ../src/gui/plotterwidget/*.cpp \ + ../src/gui/terminalwidget/*.cpp \ + ../src/gui/QPropertyEditor/*.cpp \ + ../src/gui/componentselector/*.cpp \ + ../src/gui/filebrowser/*.cpp \ + ../src/gui/editorwidget/*.cpp \ + ../src/gui/editorwidget/findreplacedialog/*.cpp \ + ../src/gui/serialporwidget/*.cpp \ + ../src/simulator/*.cpp \ + ../src/simulator/elements/*.cpp \ + ../src/simulator/elements/active/*.cpp \ + ../src/simulator/elements/logic/*.cpp \ + ../src/simulator/elements/outputs/*.cpp \ + ../src/simulator/elements/passive/*.cpp \ + ../src/simulator/elements/processors/*.cpp \ + ../src/simavr/sim/*.c \ + ../src/simavr/cores/*.c \ + ../src/gpsim/*.cc \ + ../src/gpsim/devices/*.cc \ + ../src/gpsim/modules/*.cc \ + ../src/gpsim/registers/*.cc + +HEADERS += ../src/*.h \ + ../src/gui/*.h \ + ../src/gui/circuitwidget/*.h \ + ../src/gui/circuitwidget/components/*.h \ + ../src/gui/circuitwidget/components/active/*.h \ + ../src/gui/circuitwidget/components/logic/*.h \ + ../src/gui/circuitwidget/components/mcu/*.h \ + ../src/gui/circuitwidget/components/meters/*.h \ + ../src/gui/circuitwidget/components/other/*.h \ + ../src/gui/circuitwidget/components/outputs/*.h \ + ../src/gui/circuitwidget/components/passive/*.h \ + ../src/gui/circuitwidget/components/sources/*.h \ + ../src/gui/circuitwidget/components/switches/*.h \ + ../src/gui/oscopewidget/*.h \ + ../src/gui/plotterwidget/*.h \ + ../src/gui/terminalwidget/*.h \ + ../src/gui/QPropertyEditor/*.h \ + ../src/gui/componentselector/*.h \ + ../src/gui/filebrowser/*.h \ + ../src/gui/editorwidget/*.h \ + ../src/gui/editorwidget/findreplacedialog/*.h \ + ../src/gui/serialporwidget/*.h \ + ../src/simulator/*.h \ + ../src/simulator/elements/*.h \ + ../src/simulator/elements/active/*.h \ + ../src/simulator/elements/logic/*.h \ + ../src/simulator/elements/outputs/*.h \ + ../src/simulator/elements/passive/*.h \ + ../src/simulator/elements/processors/*.h \ + ../src/simavr/sim/*.h \ + ../src/simavr/sim/avr/*.h \ + ../src/simavr/cores/*.h \ + ../resources/data/*.xml \ + ../src/gpsim/*.h \ + ../src/gpsim/devices/*.h \ + ../src/gpsim/modules/*.h \ + ../src/gpsim/registers/*.h + +INCLUDEPATH += ../src \ + ../src/gui \ + ../src/gui/circuitwidget \ + ../src/gui/circuitwidget/components \ + ../src/gui/circuitwidget/components/active \ + ../src/gui/circuitwidget/components/logic \ + ../src/gui/circuitwidget/components/mcu \ + ../src/gui/circuitwidget/components/meters \ + ../src/gui/circuitwidget/components/other \ + ../src/gui/circuitwidget/components/outputs \ + ../src/gui/circuitwidget/components/passive \ + ../src/gui/circuitwidget/components/sources \ + ../src/gui/circuitwidget/components/switches \ + ../src/gui/oscopewidget \ + ../src/gui/plotterwidget \ + ../src/gui/terminalwidget \ + ../src/gui/QPropertyEditor \ + ../src/gui/componentselector \ + ../src/gui/filebrowser \ + ../src/gui/editorwidget \ + ../src/gui/editorwidget/findreplacedialog \ + ../src/gui/serialporwidget \ + ../src/simulator \ + ../src/simulator/elements \ + ../src/simulator/elements/active \ + ../src/simulator/elements/logic \ + ../src/simulator/elements/outputs \ + ../src/simulator/elements/passive \ + ../src/simulator/elements/processors \ + ../src/simavr \ + ../src/simavr/sim \ + ../src/simavr/sim/avr \ + ../src/simavr/cores \ + ../src/gpsim \ + ../src/gpsim/devices \ + ../src/gpsim/modules \ + ../src/gpsim/registers + +TRANSLATIONS += \ + ../resources/translations/simulide.ts \ + ../resources/translations/simulide_en.ts \ + ../resources/translations/simulide_es.ts \ + ../resources/translations/simulide_ru.ts + +RESOURCES = ../src/application.qrc + +QMAKE_CXXFLAGS += -Wno-unused-parameter +QMAKE_CXXFLAGS += -Wno-missing-field-initializers +QMAKE_CXXFLAGS += -Wno-implicit-fallthrough +QMAKE_CXXFLAGS -= -fPIC +QMAKE_CXXFLAGS += -fno-pic + +QMAKE_CFLAGS += --std=gnu11 +QMAKE_CFLAGS += -Wno-unused-result +QMAKE_CFLAGS += -Wno-unused-parameter +QMAKE_CFLAGS += -Wno-missing-field-initializers +QMAKE_CFLAGS += -Wno-implicit-function-declaration +QMAKE_CFLAGS += -Wno-implicit-fallthrough +QMAKE_CFLAGS += -Wno-int-conversion +QMAKE_CFLAGS += -Wno-sign-compare +QMAKE_CFLAGS += -O2 +QMAKE_CFLAGS += -O2 +QMAKE_CFLAGS -= -fPIC +QMAKE_CFLAGS += -fno-pic + + +win32 { + LIBS += ../resources/bin/libglibc_win.a + RC_ICONS += ../src/icons/simulide.ico +} +unix { + QMAKE_LIBS += -lelf + QMAKE_LFLAGS += -no-pie +} + +CONFIG += qt +CONFIG += warn_on +CONFIG += no_qml_debug +CONFIG *= c++11 + +DEFINES += MAINMODULE_EXPORT= +DEFINES += APP_VERSION=\\\"$$VERSION\\\" + +TARGET_NAME = SimulIDE_$$VERSION$$ + +CONFIG( release, debug|release ) { + TARGET_PREFIX = $$BUILD_DIR/release/$$TARGET_NAME + _OBJECTS_DIR = $$OUT_PWD/build/release +} + +CONFIG( debug, debug|release ) { + TARGET_PREFIX = $$BUILD_DIR/debug/$$TARGET_NAME + _OBJECTS_DIR = $$OUT_PWD/build/debug +} + +OBJECTS_DIR *= $$_OBJECTS_DIR +MOC_DIR *= $$_OBJECTS_DIR +INCLUDEPATH += $$OBJECTS_DIR + +DESTDIR = $$TARGET_PREFIX/bin + +TARGET = simulide + +mkpath( $$TARGET_PREFIX/bin ) + + +runLrelease.commands = lrelease ../resources/translations/*.ts; +QMAKE_EXTRA_TARGETS += runLrelease +POST_TARGETDEPS += runLrelease + +copy2dest.commands = \ +$(MKDIR) $$TARGET_PREFIX/share/simulide/data ; \ +$(MKDIR) $$TARGET_PREFIX/share/simulide/examples ; \ +$(MKDIR) $$TARGET_PREFIX/share/simulide/translations ; \ +$(COPY_DIR) ../resources/data $$TARGET_PREFIX/share/simulide ; \ +$(COPY_DIR) ../resources/examples $$TARGET_PREFIX/share/simulide ; \ +$(COPY_DIR) ../resources/icons $$TARGET_PREFIX/share ; \ +$(MOVE) ../resources/translations/*.qm $$TARGET_PREFIX/share/simulide/translations ; + +QMAKE_EXTRA_TARGETS += copy2dest +POST_TARGETDEPS += copy2dest + + +message( "-----------------------------" ) +message( " " $$TARGET_NAME ) +message( " TARGET_PREFIX=" $$TARGET_PREFIX ) +message( "-----------------------------" ) + diff --git a/build_XX/SimulIDE_Build.pro b/build_XX/SimulIDE_Build.pro new file mode 100644 index 0000000..5f27b8d --- /dev/null +++ b/build_XX/SimulIDE_Build.pro @@ -0,0 +1,5 @@ + +BUILD_DIR = $$PWD + + +include(../SimulIDE.pro) diff --git a/changelog.txt b/changelog.txt new file mode 100644 index 0000000..d96e826 --- /dev/null +++ b/changelog.txt @@ -0,0 +1,251 @@ + +simulide 0.3.12 + + +New Features: + RC1: + - Show Circuit Time and Mcu freq. + - Show Led polarity. + - Show Meters polarity. + - MCU freq. decimal values. + - Chip/Logic_Symbol for subcircuits. + + RC2: + - Bjt BC diode. + - Bjt faster switch. + - multi-channel plotter, resizable scale. + - Wave gen. frequency decimal values. + - Oscope improved. + - Windows OS console output. + - Remove selected connectors. + - Auto-connect pins. + - Add short info to Component names. + - Refactoring Bus: Fully analogic bidirectional Buses. + + RC3: + - Bus start Bit. + - Debugger GcBasic Step Over (experimental). + - File Browser: Show hidden. + - File Browser: Settings bookmark. + - Graphic Package creation. + - Ramtable case insensitive. + - 74 IC Logic Symbols. + + SR1: + - CD IC Logic Symbols. + - Help widget. + - Some help files. + - Ramtable: 4 cols: Name, Type, Dec.Value, Value. + - GcBasic: Strings in RamTable + - Smaller Gates. + - MCU EEPROM persistence (to .simu File). + - Load/Save MCU EEPROM Data to data file. + - Add persistence to RAM = PROM (to .simu File). + - Resizable RAM/PROM ( address bits and word size ). + - Load/Save RAM/PROM Data to data file. + - Add persistence to I2C RAM = I2C PROM (to .simu File). + - Load/Save I2C RAM/PROM Data to data file. + - Auto-Backup and Restore Circuit after Crash. + - Property to set Auto-Backup check interval( Secs ). + + SR2: + + SR3: + - Led shape to original, but displaced to Cathode. + *- 16 bit Encoder/Decoder + + SR4: + - Circuit Zoom with key sequence: Ctrl+ Ctrl- + - Serial Terminal: "Clear" and "CR" buttons. + - New Dialog: create and edit Package Pins. + - Create Subcircuit and Package files in one shot. + +Bug Fixes: + RC1: + - Avoid closing document while debugging. + - Modification in circuit while debugging or simulating MCUs. + - Atmega8 not working. + - LM555 power pins. + - LM555 in subcircuits. + - Wrong voltage in "PNP biasing" example. + - Avoid program blocking in "End" GcBasic statement while debugging. + + RC2: + - Switches not properly removed. + - Wrong voltage in "PNP biasing" example final fix. + - Avoid program blocking simulating AVR entering "sleep". + - Wave gen. frequency accuracy. + - Wrong Circuit Time. + - Delete SR04 while running may crash. + - GcBasic arrays errors in RamTable. + - Crash setting mcu logic symbol=true. + - Remove unintended components when removing single wire. + - Crash removing Arduino in some cases (related to built-in led pin). + - Problem in RamTable with variables changed in source code. + + RC3: + - Plotter crashing randomly. + - ResistorDip in Subcircuits. + - Wire Lines disconnected in some cases. + - Animate circuit resets after copy/paste. + - Copy unintended components if previously selected. + - Clock in subcircuits. + - RamTable may crash when not debugging. + - Filter file types in open dialogs. + - Debugger fully interruptable. + - AVR and PIC assemblers not found msg. + - Adding led while circuit is running (wrong start step). + - Some missing icons. + - Relay: crash in changes when circuit running. + - Keypad: crash in changes when circuit running. + - LedMatrix: properties reset at size change. + - 7segment: color reset at size change. + - Subcircuit: error not cleared when package not found. + - Volt. Reg: voltage not updated until circuit restart. + + SR1: + - Current Source initialization after restart. + - 555 CV pin wrong impedance. + - 555 not cleanly removed. + - Values with units in SubCircuits: wrong value. + - Clock in SubCircuit not cleanly removed. + - Weird lines in connectors: Moving+Undo connectors with leght=0. + - Uppercase asm instructions not recognized. + - Crash compiling Pic asm with filenames containing spaces. + - Import Circuit fails in some cases. + - Pin Id changes not properly updated ( find pin by name fails ). + - Bus: wrong bit0. + - Editor: crash unindenting block with empty lines. + - RAM/ROM wrong write cycle start in some cases. + - I2C RAM: 1 byte address devices not working. + - Simulation very slow with large circuits if animated. + - Copy/Paste not working between simulide instances. + + SR2: + - Crash starting new connector with circuit running and animated( 0.3.12-SR1 ). + - Plotter randomly not working: Simulator update Counter not cleared. + - Shapes not properly redrawn on size changes. + - Id labels not well positioned in some components. + - Wrong Cursor in New connector. + - Closing Connector: end point bad position sometimes. + + SR3: + - Crash hovering some external object over circuit canvas. + - Circuit not updating properly when animated( 0.3.12-SR1 ). + - Changes in Logic Devices properties while simulation running not updated. + - Load Circuit: avoid connect to already connected pins. + - Make 74HC and 74XX interchangeable. + - BJT animation not updated. + - BJT not working in vco example (0.3.12-RC2). + - Fix some memory leaks. + - Plotterwidget wrong scale in some cases. + - 74HC4022 Logic Symbol not working. + + SR4: + - Pic asm Compiler: gpasm does not find includes in project folder. + - Time widget scrollBars shown in some systems. + - Executable detected as shared lib in some builds. + - AVR timer mode 14: Fast PWM, Top=ICR1, doesn't update in OCRX changes. + - Send Text in Serial monitor limited to 50 characters. + - ATtinyX4 wrong Pin asignation in Timer0,1. + - ATtinyX4 wrong ADC definition. + - Use Chip Symbol if Logic Symbol file not found. + - Package should save file relative path, not absolute. + - Create Subcircuit taking Component Circuit Id instead of unique Id. + - Avoid dash "-" in Subcircuits Pin Ids. + - Avoid save Backup in read only filesystems. + - Subcircuits fixed (thanks to Sergey Roenko): + 74HC42, 74HC74, 74HC75, 74HC151, 74HC155, 74HC192, 74HC93 + 74HC393, 74HC592, 74HC4017, 74HC4026, 74HC4033 + + SR5: + - I2C module: wrong output impedance when transmiting. + - Editor: closing unsaved doc + cancel not working. + - Editor: close unsaved doc whith no focus, editor takes the focused one. + - PIC with OSCCAL Reg. not working if call 0x3FF is made. + - Crash: Debug session + Close doc. + RamTable->LoadVAriables. + - AVR SPI: MOSI pin should be high when idle. + - Wrong extension Creating subcircuits in some cases. + - Ground not working in Subcircuits. + - Crash creating Subcircuit with 2 Package Pins connected together. + - Subcircuits fixed (Sergey Roenko strikes again) + 74HC73, 74HC76, 74HC107, 74HC109, 74HC112,74HC113, 74HC173 + 74HC175, 74HC259, 74HC279, 74HC373, 74HC374, 74HC375, 74HC377 + + SR6: + - Circuits from 0.4.13: Try to position elements in grid. + - Crash closing file with debugger when no mcu ( 0.3.12-SR5 ). + - PIC: if PIC goes to sleep fail to exit sleep afther reset. + - Crash setting MCU to logic Symbol (No LS available for MCU yet). + - Crash on some actions while creating connector. + - Audio Out latency too high. + - LatchD randomly not properly initialized. + + SR7: + - Editor: Sintax highlight error parsing some rules. + - Oscope not updating when signal dissapears. + - Fixed 74HC194_LS.package (Sergey Roenko) + + SR8: + - Stepper: bounding box overlaping pins. + - Stepper not updating after change steps number. + - Arduino 1.8.10 issue solved. + - AppImage tries to backup in Readonly FS. + - Some Help Files not Found. + - Some wrong error strings higlighted in Arduino Compile. + - Text Encoding errors. + - Missing file extension filters in Editor->SaveAs. + - Bad Led visualisation when cpu can not keep speed. + - Atmega 1280,1281, 2560, wrong package file. + - Crash if mcu can't be created + new circuit. + - Pic18F4420 missing data file. + +New Components: + RC1: + - Pic: + 12c508, 12c509, 12ce518, 12ce519, 16c84, 16c712, 16c716 + RC2: + - Frequencimeter + + RC3: + - Package + - 74HC74 refactored. + - 74HC148 refactored. + + SR1: + SR2: + SR3: + SR4: + - IC74 (thanks to Sergey Roenko) + 74XX01, 74HC73, 74HC76, 74HC109, 74HC112, 74HC113, 74HC173 + 74HC175, 74HC259, 74HC373, 74HC374, 74HC375, 74HC377 + + SR5: + - IC74 (Sergey Roenko strikes again) + 74XX91, 74XX95, 74XX96, 74XX166, 74XX170, 74XX178, 74XX179 + 74XX195, 74XX198, 74XX199, 74HC670, 74XX381, 74XX382 + + SR6: + - IC74 (Sergey Roenko) + 74HC245, 74HC260, 74HC4094 + + - ICCD (Sergey Roenko) + CD4006, CD4013, CD4014, CD4015, CD4021, CD4027, CD4035, CD4042, CD4043 + CD4044, CD4076, CD4094, CD4095, CD4096, CD4099, CD4508, CD40174, CD40175 + + SR7: + - IC74 (Sergey Roenko) + 74HC156, 74HC157, 74HC158, 74HC251, 74HC257, 74HC258, 74HC298, 74HC352 + 74HC353, 74HC354, 74HC356, 74HC4052, 74HC4053, 74HC4067 + 74XX150, 74XX582, 74XX583 + + - ICCD (Sergey Roenko) + CD4019, CD4029, CD4066, CD4512, CD4532, CD4553 + + - Keys (Sergey Roenko) + DG401, DG403, DG405 + + - Ternary (Sergey Roenko) + Ternary_AND, Ternary_Buffer, Ternary_Multiplexer, Ternary_NAND + Ternary_NOR, Ternary_NOT. Ternary_OR + diff --git a/resources/data/arduino/arduino_nano.package b/resources/data/arduino/arduino_nano.package new file mode 100644 index 0000000..7a227ba --- /dev/null +++ b/resources/data/arduino/arduino_nano.package @@ -0,0 +1,63 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/arduino/arduino_uno.package b/resources/data/arduino/arduino_uno.package new file mode 100644 index 0000000..c5d7a5b --- /dev/null +++ b/resources/data/arduino/arduino_uno.package @@ -0,0 +1,58 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/arduino/leonardo.package b/resources/data/arduino/leonardo.package new file mode 100644 index 0000000..3096dd9 --- /dev/null +++ b/resources/data/arduino/leonardo.package @@ -0,0 +1,59 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/arduino/mega.package b/resources/data/arduino/mega.package new file mode 100644 index 0000000..88a872a --- /dev/null +++ b/resources/data/arduino/mega.package @@ -0,0 +1,124 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/arduinos.xml b/resources/data/arduinos.xml new file mode 100644 index 0000000..253ddd8 --- /dev/null +++ b/resources/data/arduinos.xml @@ -0,0 +1,33 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/avr/at90usb162.data b/resources/data/avr/at90usb162.data new file mode 100644 index 0000000..aa3cf14 --- /dev/null +++ b/resources/data/avr/at90usb162.data @@ -0,0 +1,123 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=16 + +PORTB EQU 5 +DDRB EQU 4 +PINB EQU 3 +PORTD EQU 11 +DDRD EQU 10 +PIND EQU 9 +SPCR EQU 44 +SPSR EQU 45 +SPDR EQU 46 +SPMCSR EQU 55 +EEARH EQU 34 +EEARL EQU 33 +EEDR EQU 32 +EECR EQU 31 +OCR0B EQU 40 +OCR0A EQU 39 +TCNT0 EQU 38 +TCCR0B EQU 37 +TCCR0A EQU 36 +TIMSK0 EQU 110 +TIFR0 EQU 21 +GTCCR EQU 35 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCNT1H EQU 133 +TCNT1L EQU 132 +OCR1AH EQU 137 +OCR1AL EQU 136 +OCR1BH EQU 139 +OCR1BL EQU 138 +OCR1CH EQU 141 +OCR1CL EQU 140 +ICR1H EQU 135 +ICR1L EQU 134 +TIMSK1 EQU 111 +TIFR1 EQU 22 +PLLCSR EQU 41 +UEINT EQU 244 +UEBCLX EQU 242 +UEDATX EQU 241 +UEIENX EQU 240 +UESTA1X EQU 239 +UESTA0X EQU 238 +UECFG1X EQU 237 +UECFG0X EQU 236 +UECONX EQU 235 +UERST EQU 234 +UENUM EQU 233 +UEINTX EQU 232 +UDMFN EQU 230 +UDFNUMH EQU 229 +UDFNUML EQU 228 +UDADDR EQU 227 +UDIEN EQU 226 +UDINT EQU 225 +UDCON EQU 224 +USBCON EQU 216 +REGCR EQU 99 +UPOE EQU 251 +PS2CON EQU 250 +SREG EQU 63 +SPH EQU 62 +SPL EQU 61 +MCUCR EQU 53 +MCUSR EQU 52 +OSCCAL EQU 102 +CLKPR EQU 97 +SMCR EQU 51 +EIND EQU 60 +GPIOR2 EQU 43 +GPIOR1 EQU 42 +GPIOR0 EQU 30 +PRR1 EQU 101 +PRR0 EQU 100 +CKSTA EQU 210 +CKSEL1 EQU 209 +CKSEL0 EQU 208 +DWDR EQU 49 +EICRA EQU 105 +EICRB EQU 106 +EIMSK EQU 29 +EIFR EQU 28 +PCMSK0 EQU 107 +PCMSK1 EQU 108 +PCIFR EQU 27 +PCICR EQU 104 +UDR1 EQU 206 +UCSR1A EQU 200 +UCSR1B EQU 201 +UCSR1C EQU 202 +UCSR1D EQU 203 +UBRR1H EQU 205 +UBRR1L EQU 204 +WDTCSR EQU 96 +WDTCKD EQU 98 +ACSR EQU 48 +DIDR1 EQU 127 +PORTC EQU 8 +DDRC EQU 7 +PINC EQU 6 + diff --git a/resources/data/avr/at90usb162.package b/resources/data/avr/at90usb162.package new file mode 100644 index 0000000..9953aac --- /dev/null +++ b/resources/data/avr/at90usb162.package @@ -0,0 +1,65 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/avr/atmega128.data b/resources/data/avr/atmega128.data new file mode 100644 index 0000000..020e314 --- /dev/null +++ b/resources/data/avr/atmega128.data @@ -0,0 +1,126 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=16 + +SFIOR EQU 32 +ACSR EQU 8 +SPDR EQU 15 +SPSR EQU 14 +SPCR EQU 13 +TWBR EQU 112 +TWCR EQU 116 +TWSR EQU 113 +TWDR EQU 115 +TWAR EQU 114 +UDR0 EQU 12 +UCSR0A EQU 11 +UCSR0B EQU 10 +UCSR0C EQU 149 +UBRR0H EQU 144 +UBRR0L EQU 9 +UDR1 EQU 156 +UCSR1A EQU 155 +UCSR1B EQU 154 +UCSR1C EQU 157 +UBRR1H EQU 152 +UBRR1L EQU 153 +SREG EQU 63 +SPH EQU 62 +SPL EQU 61 +MCUCR EQU 53 +MCUCSR EQU 52 +XMCRA EQU 109 +XMCRB EQU 108 +OSCCAL EQU 111 +XDIV EQU 60 +RAMPZ EQU 59 +SPMCSR EQU 104 +OCDR EQU 34 +EICRA EQU 106 +EICRB EQU 58 +EIMSK EQU 57 +EIFR EQU 56 +EEARH EQU 31 +EEARL EQU 30 +EEDR EQU 29 +EECR EQU 28 +PORTA EQU 27 +DDRA EQU 26 +PINA EQU 25 +PORTB EQU 24 +DDRB EQU 23 +PINB EQU 22 +PORTC EQU 21 +DDRC EQU 20 +PINC EQU 19 +PORTD EQU 18 +DDRD EQU 17 +PIND EQU 16 +PORTE EQU 3 +DDRE EQU 2 +PINE EQU 1 +PORTF EQU 98 +DDRF EQU 97 +PINF EQU 0 +PORTG EQU 101 +DDRG EQU 100 +PING EQU 99 +TCCR0 EQU 51 +TCNT0 EQU 50 +OCR0 EQU 49 +ASSR EQU 48 +TIMSK EQU 55 +TIFR EQU 54 +ETIMSK EQU 125 +ETIFR EQU 124 +TCCR1A EQU 47 +TCCR1B EQU 46 +TCCR1C EQU 122 +TCNT1H EQU 45 +TCNT1L EQU 44 +OCR1AH EQU 43 +OCR1AL EQU 42 +OCR1BH EQU 41 +OCR1BL EQU 40 +OCR1CH EQU 121 +OCR1CL EQU 120 +ICR1H EQU 39 +ICR1L EQU 38 +TCCR2 EQU 37 +TCNT2 EQU 36 +OCR2 EQU 35 +TCCR3A EQU 139 +TCCR3B EQU 138 +TCCR3C EQU 140 +TCNT3H EQU 137 +TCNT3L EQU 136 +OCR3AH EQU 135 +OCR3AL EQU 134 +OCR3BH EQU 133 +OCR3BL EQU 132 +OCR3CH EQU 131 +OCR3CL EQU 130 +ICR3H EQU 129 +ICR3L EQU 128 +WDTCR EQU 33 +ADMUX EQU 7 +ADCSRA EQU 6 +ADCH EQU 5 +ADCL EQU 4 diff --git a/resources/data/avr/atmega128.package b/resources/data/avr/atmega128.package new file mode 100644 index 0000000..ad13b51 --- /dev/null +++ b/resources/data/avr/atmega128.package @@ -0,0 +1,92 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/avr/atmega1280.data b/resources/data/avr/atmega1280.data new file mode 100644 index 0000000..f112d5f --- /dev/null +++ b/resources/data/avr/atmega1280.data @@ -0,0 +1,188 @@ + +MaxMHz=16 + +[Registers] +ADCSRB EQU 123 +ACSR EQU 48 +DIDR1 EQU 127 +UDR0 EQU 198 +UCSR0A EQU 192 +UCSR0B EQU 193 +UCSR0C EQU 194 +UBRR0L EQU 196 +UBRR0H EQU 197 +TWAMR EQU 189 +TWBR EQU 184 +TWCR EQU 188 +TWSR EQU 185 +TWDR EQU 187 +TWAR EQU 186 +SPCR EQU 44 +SPSR EQU 45 +SPDR EQU 46 +PORTA EQU 2 +DDRA EQU 1 +PORTB EQU 5 +DDRB EQU 4 +PINB EQU 3 +PORTC EQU 8 +DDRC EQU 7 +PINC EQU 6 +PORTD EQU 11 +DDRD EQU 10 +PIND EQU 9 +PORTE EQU 14 +DDRE EQU 13 +PINE EQU 12 +PORTF EQU 17 +DDRF EQU 16 +PINF EQU 15 +PORTG EQU 20 +DDRG EQU 19 +PING EQU 18 +PORTH EQU 258 +DDRH EQU 257 +PINH EQU 256 +PORTJ EQU 261 +DDRJ EQU 260 +PINJ EQU 259 +PORTK EQU 264 +DDRK EQU 263 +PINK EQU 262 +PORTL EQU 267 +DDRL EQU 266 +PINL EQU 265 +OCR0B EQU 40 +OCR0A EQU 39 +TCNT0 EQU 38 +TCCR0B EQU 37 +TCCR0A EQU 36 +TIMSK0 EQU 110 +TIFR0 EQU 21 +GTCCR EQU 35 +TIMSK2 EQU 112 +TIFR2 EQU 23 +TCCR2A EQU 176 +TCCR2B EQU 177 +TCNT2 EQU 178 +OCR2B EQU 180 +OCR2A EQU 179 +ASSR EQU 182 +UBRR3H EQU 309 +WDTCSR EQU 96 +UDR1 EQU 206 +UCSR1A EQU 200 +UCSR1B EQU 201 +UCSR1C EQU 202 +UBRR1L EQU 204 +UBRR1H EQU 205 +EEARL EQU 33 +EEARH EQU 34 +EEDR EQU 32 +EECR EQU 31 +TCCR5A EQU 288 +TCCR5B EQU 289 +TCCR5C EQU 290 +TCNT5L EQU 292 +TCNT5H EQU 293 +OCR5AL EQU 296 +OCR5AH EQU 297 +OCR5BL EQU 298 +OCR5BH EQU 299 +OCR5CL EQU 300 +OCR5CH EQU 301 +ICR5L EQU 294 +ICR5H EQU 295 +TIMSK5 EQU 115 +TIFR5 EQU 26 +TCCR4A EQU 160 +TCCR4B EQU 161 +TCCR4C EQU 162 +TCNT4L EQU 164 +TCNT4H EQU 165 +OCR4AL EQU 168 +OCR4AH EQU 169 +OCR4BL EQU 170 +OCR4BH EQU 171 +OCR4CL EQU 172 +OCR4CH EQU 173 +ICR4L EQU 166 +ICR4H EQU 167 +TIMSK4 EQU 114 +TIFR4 EQU 25 +TCCR3A EQU 144 +TCCR3B EQU 145 +TCCR3C EQU 146 +TCNT3L EQU 148 +TCNT3H EQU 149 +OCR3AL EQU 152 +OCR3AH EQU 153 +OCR3BL EQU 154 +OCR3BH EQU 155 +OCR3CL EQU 156 +OCR3CH EQU 157 +ICR3L EQU 150 +ICR3H EQU 151 +TIMSK3 EQU 113 +TIFR3 EQU 24 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCNT1L EQU 132 +TCNT1H EQU 133 +OCR1AL EQU 136 +OCR1AH EQU 137 +OCR1BL EQU 138 +OCR1BH EQU 139 +OCR1CL EQU 140 +OCR1CH EQU 141 +ICR1L EQU 134 +ICR1H EQU 135 +TIMSK1 EQU 111 +TIFR1 EQU 22 +OCDR EQU 49 +MCUCR EQU 53 +MCUSR EQU 52 +EICRA EQU 105 +EICRB EQU 106 +EIMSK EQU 29 +EIFR EQU 28 +PCMSK2 EQU 109 +PCMSK1 EQU 108 +PCMSK0 EQU 107 +PCIFR EQU 27 +PCICR EQU 104 +SREG EQU 63 +SPL EQU 61 +SPH EQU 62 +UBRR3L EQU 308 +UCSR3C EQU 306 +XMCRA EQU 116 +XMCRB EQU 117 +OSCCAL EQU 102 +CLKPR EQU 97 +SMCR EQU 51 +EIND EQU 60 +RAMPZ EQU 59 +GPIOR2 EQU 43 +GPIOR1 EQU 42 +GPIOR0 EQU 30 +PRR1 EQU 101 +PRR0 EQU 100 +ADMUX EQU 124 +ADCL EQU 120 +ADCH EQU 121 +ADCSRA EQU 122 +PINA EQU 0 +DIDR2 EQU 125 +DIDR0 EQU 126 +SPMCSR EQU 55 +UDR2 EQU 214 +UCSR2A EQU 208 +UCSR2B EQU 209 +UCSR2C EQU 210 +UBRR2L EQU 212 +UBRR2H EQU 213 +UDR3 EQU 310 +UCSR3A EQU 304 +UCSR3B EQU 305 diff --git a/resources/data/avr/atmega1280.package b/resources/data/avr/atmega1280.package new file mode 100644 index 0000000..f23dbfa --- /dev/null +++ b/resources/data/avr/atmega1280.package @@ -0,0 +1,128 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/avr/atmega1281.data b/resources/data/avr/atmega1281.data new file mode 100644 index 0000000..ff274ca --- /dev/null +++ b/resources/data/avr/atmega1281.data @@ -0,0 +1,188 @@ + +MaxMHz=16 + +[Registers] +ADCSRB EQU 123 +ACSR EQU 48 +DIDR1 EQU 127 +UDR0 EQU 198 +UCSR0A EQU 192 +UCSR0B EQU 193 +UCSR0C EQU 194 +UBRR0L EQU 196 +UBRR0H EQU 197 +UDR1 EQU 206 +UCSR1A EQU 200 +UCSR1B EQU 201 +UCSR1C EQU 202 +UBRR1L EQU 204 +UBRR1H EQU 205 +TWAMR EQU 189 +TWBR EQU 184 +TWCR EQU 188 +TWSR EQU 185 +TWDR EQU 187 +TWAR EQU 186 +SPCR EQU 44 +SPSR EQU 45 +SPDR EQU 46 +PORTA EQU 2 +DDRA EQU 1 +PORTB EQU 5 +DDRB EQU 4 +PINB EQU 3 +PORTC EQU 8 +DDRC EQU 7 +PINC EQU 6 +PORTD EQU 11 +DDRD EQU 10 +PIND EQU 9 +PORTE EQU 14 +DDRE EQU 13 +PINE EQU 12 +PORTF EQU 17 +DDRF EQU 16 +PINF EQU 15 +PORTG EQU 20 +DDRG EQU 19 +PING EQU 18 +OCR0B EQU 40 +OCR0A EQU 39 +TCNT0 EQU 38 +TCCR0B EQU 37 +TCCR0A EQU 36 +TIMSK0 EQU 110 +TIFR0 EQU 21 +GTCCR EQU 35 +TIMSK2 EQU 112 +TIFR2 EQU 23 +TCCR2A EQU 176 +TCCR2B EQU 177 +TCNT2 EQU 178 +OCR2B EQU 180 +OCR2A EQU 179 +ASSR EQU 182 +EIND EQU 60 +WDTCSR EQU 96 +TCCR5A EQU 288 +TCCR5B EQU 289 +TCCR5C EQU 290 +TCNT5L EQU 292 +TCNT5H EQU 293 +OCR5AL EQU 296 +OCR5AH EQU 297 +OCR5BL EQU 298 +OCR5BH EQU 299 +OCR5CL EQU 300 +OCR5CH EQU 301 +ICR5L EQU 294 +ICR5H EQU 295 +TIMSK5 EQU 115 +TIFR5 EQU 26 +TCCR4A EQU 160 +TCCR4B EQU 161 +TCCR4C EQU 162 +TCNT4L EQU 164 +TCNT4H EQU 165 +OCR4AL EQU 168 +OCR4AH EQU 169 +OCR4BL EQU 170 +OCR4BH EQU 171 +OCR4CL EQU 172 +OCR4CH EQU 173 +ICR4L EQU 166 +ICR4H EQU 167 +TIMSK4 EQU 114 +TIFR4 EQU 25 +TCCR3A EQU 144 +TCCR3B EQU 145 +TCCR3C EQU 146 +TCNT3L EQU 148 +TCNT3H EQU 149 +OCR3AL EQU 152 +OCR3AH EQU 153 +OCR3BL EQU 154 +OCR3BH EQU 155 +OCR3CL EQU 156 +OCR3CH EQU 157 +ICR3L EQU 150 +ICR3H EQU 151 +TIMSK3 EQU 113 +TIFR3 EQU 24 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCNT1L EQU 132 +TCNT1H EQU 133 +OCR1AL EQU 136 +OCR1AH EQU 137 +OCR1BL EQU 138 +OCR1BH EQU 139 +OCR1CL EQU 140 +OCR1CH EQU 141 +ICR1L EQU 134 +ICR1H EQU 135 +TIMSK1 EQU 111 +TIFR1 EQU 22 +EEARL EQU 33 +EEARH EQU 34 +EEDR EQU 32 +EECR EQU 31 +OCDR EQU 49 +MCUCR EQU 53 +MCUSR EQU 52 +EICRA EQU 105 +EICRB EQU 106 +EIMSK EQU 29 +EIFR EQU 28 +PCMSK2 EQU 109 +PCMSK1 EQU 108 +PCMSK0 EQU 107 +PCIFR EQU 27 +PCICR EQU 104 +ADMUX EQU 124 +ADCL EQU 120 +ADCH EQU 121 +ADCSRA EQU 122 +PINA EQU 0 +DIDR2 EQU 125 +DIDR0 EQU 126 +SPMCSR EQU 55 +SREG EQU 63 +SPL EQU 61 +SPH EQU 62 +UCSR2A EQU 208 +UCSR2B EQU 209 +XMCRA EQU 116 +XMCRB EQU 117 +OSCCAL EQU 102 +CLKPR EQU 97 +SMCR EQU 51 +RAMPZ EQU 59 +GPIOR2 EQU 43 +GPIOR1 EQU 42 +GPIOR0 EQU 30 +PRR1 EQU 101 +PRR0 EQU 100 +UDR3 EQU 310 +UBRR3H EQU 309 +UBRR3L EQU 308 +UCSR3C EQU 306 +UCSR3B EQU 305 +UCSR3A EQU 304 +PORTL EQU 267 +DDRL EQU 266 +PINL EQU 265 +PORTK EQU 264 +DDRK EQU 263 +PINK EQU 262 +PORTJ EQU 261 +DDRJ EQU 260 +PINJ EQU 259 +PORTH EQU 258 +DDRH EQU 257 +PINH EQU 256 +UDR2 EQU 214 +UBRR2H EQU 213 +UBRR2L EQU 212 +UCSR2C EQU 210 diff --git a/resources/data/avr/atmega1284.data b/resources/data/avr/atmega1284.data new file mode 100644 index 0000000..b41ac9c --- /dev/null +++ b/resources/data/avr/atmega1284.data @@ -0,0 +1,117 @@ + +MaxMHz=20 + +[Registers] +ADCSRB EQU 123 +ACSR EQU 48 +DIDR1 EQU 127 +UDR0 EQU 198 +UCSR0A EQU 192 +UCSR0B EQU 193 +UCSR0C EQU 194 +UBRR0L EQU 196 +UBRR0H EQU 197 +PORTA EQU 2 +DDRA EQU 1 +PORTB EQU 5 +DDRB EQU 4 +PINB EQU 3 +PORTC EQU 8 +DDRC EQU 7 +PINC EQU 6 +PORTD EQU 11 +DDRD EQU 10 +PIND EQU 9 +OCR0B EQU 40 +OCR0A EQU 39 +TCNT0 EQU 38 +TCCR0B EQU 37 +TCCR0A EQU 36 +TIMSK0 EQU 110 +TIFR0 EQU 21 +GTCCR EQU 35 +TIMSK1 EQU 111 +TIFR1 EQU 22 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCNT1L EQU 132 +TCNT1H EQU 133 +OCR1AL EQU 136 +OCR1AH EQU 137 +OCR1BL EQU 138 +OCR1BH EQU 139 +ICR1L EQU 134 +ICR1H EQU 135 +TIMSK2 EQU 112 +TIFR2 EQU 23 +TCCR2A EQU 176 +TCCR2B EQU 177 +TCNT2 EQU 178 +OCR2B EQU 180 +OCR2A EQU 179 +ASSR EQU 182 +PRR1 EQU 101 +TIMSK3 EQU 113 +TIFR3 EQU 24 +TCCR3A EQU 144 +TCCR3B EQU 145 +TCCR3C EQU 146 +TCNT3L EQU 148 +TCNT3H EQU 149 +OCR3AL EQU 152 +OCR3AH EQU 153 +OCR3BL EQU 154 +OCR3BH EQU 155 +ICR3L EQU 150 +ICR3H EQU 151 +SPMCSR EQU 55 +EICRA EQU 105 +EIMSK EQU 29 +EIFR EQU 28 +PCMSK3 EQU 115 +PCMSK2 EQU 109 +PCMSK1 EQU 108 +PCMSK0 EQU 107 +PCIFR EQU 27 +PCICR EQU 104 +ADMUX EQU 124 +ADCL EQU 120 +ADCH EQU 121 +ADCSRA EQU 122 +PINA EQU 0 +DIDR0 EQU 126 +OCDR EQU 49 +MCUCR EQU 53 +MCUSR EQU 52 +EEARL EQU 33 +EEARH EQU 34 +EEDR EQU 32 +EECR EQU 31 +TWAMR EQU 189 +TWBR EQU 184 +TWCR EQU 188 +TWSR EQU 185 +TWDR EQU 187 +TWAR EQU 186 +UDR1 EQU 206 +UCSR1A EQU 200 +UCSR1B EQU 201 +UCSR1C EQU 202 +UBRR1L EQU 204 +UBRR1H EQU 205 +SPDR EQU 46 +SPSR EQU 45 +SPCR EQU 44 +WDTCSR EQU 96 +SREG EQU 63 +SPL EQU 61 +SPH EQU 62 +PRR0 EQU 100 +GPIOR0 EQU 30 +OSCCAL EQU 102 +CLKPR EQU 97 +SMCR EQU 51 +RAMPZ EQU 59 +GPIOR2 EQU 43 +GPIOR1 EQU 42 diff --git a/resources/data/avr/atmega128rfa1.data b/resources/data/avr/atmega128rfa1.data new file mode 100644 index 0000000..ebe051c --- /dev/null +++ b/resources/data/avr/atmega128rfa1.data @@ -0,0 +1,287 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=16 + +ADCSRB EQU 123 +ACSR EQU 48 +DIDR1 EQU 127 +UDR0 EQU 198 +UCSR0A EQU 192 +UCSR0B EQU 193 +UCSR0C EQU 194 +UBRR0L EQU 196 +UBRR0H EQU 197 +UDR1 EQU 206 +UCSR1A EQU 200 +UCSR1B EQU 201 +UCSR1C EQU 202 +UBRR1L EQU 204 +UBRR1H EQU 205 +TWAMR EQU 189 +TWBR EQU 184 +TWCR EQU 188 +TWSR EQU 185 +TWDR EQU 187 +TWAR EQU 186 +SPCR EQU 44 +SPSR EQU 45 +SPDR EQU 46 +PORTA EQU 2 +DDRA EQU 1 +PORTB EQU 5 +DDRB EQU 4 +PINB EQU 3 +PORTC EQU 8 +DDRC EQU 7 +PINC EQU 6 +PORTD EQU 11 +DDRD EQU 10 +PIND EQU 9 +PORTE EQU 14 +DDRE EQU 13 +PINE EQU 12 +PORTF EQU 17 +DDRF EQU 16 +PINF EQU 15 +PORTG EQU 20 +DDRG EQU 19 +PING EQU 18 +OCR0B EQU 40 +OCR0A EQU 39 +TCNT0 EQU 38 +TCCR0B EQU 37 +TCCR0A EQU 36 +TIMSK0 EQU 110 +TIFR0 EQU 21 +GTCCR EQU 35 +TIMSK2 EQU 112 +TIFR2 EQU 23 +TCCR2A EQU 176 +TCCR2B EQU 177 +TCNT2 EQU 178 +OCR2B EQU 180 +OCR2A EQU 179 +ASSR EQU 182 +PINJ EQU 259 +WDTCSR EQU 96 +TCCR5A EQU 288 +TCCR5B EQU 289 +TCCR5C EQU 290 +TCNT5L EQU 292 +TCNT5H EQU 293 +OCR5AL EQU 296 +OCR5AH EQU 297 +OCR5BL EQU 298 +OCR5BH EQU 299 +OCR5CL EQU 300 +OCR5CH EQU 301 +ICR5L EQU 294 +ICR5H EQU 295 +TIMSK5 EQU 115 +TIFR5 EQU 26 +TCCR4A EQU 160 +TCCR4B EQU 161 +TCCR4C EQU 162 +TCNT4L EQU 164 +TCNT4H EQU 165 +OCR4AL EQU 168 +OCR4AH EQU 169 +OCR4BL EQU 170 +OCR4BH EQU 171 +OCR4CL EQU 172 +OCR4CH EQU 173 +ICR4L EQU 166 +ICR4H EQU 167 +TIMSK4 EQU 114 +TIFR4 EQU 25 +TCCR3A EQU 144 +TCCR3B EQU 145 +TCCR3C EQU 146 +TCNT3L EQU 148 +TCNT3H EQU 149 +OCR3AL EQU 152 +OCR3AH EQU 153 +OCR3BL EQU 154 +OCR3BH EQU 155 +OCR3CL EQU 156 +OCR3CH EQU 157 +ICR3L EQU 150 +ICR3H EQU 151 +TIMSK3 EQU 113 +TIFR3 EQU 24 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCNT1L EQU 132 +TCNT1H EQU 133 +OCR1AL EQU 136 +OCR1AH EQU 137 +OCR1BL EQU 138 +OCR1BH EQU 139 +OCR1CL EQU 140 +OCR1CH EQU 141 +ICR1L EQU 134 +ICR1H EQU 135 +TIMSK1 EQU 111 +TIFR1 EQU 22 +AES_CTRL EQU 316 +AES_STATUS EQU 317 +AES_STATE EQU 318 +AES_KEY EQU 319 +TRX_STATUS EQU 321 +TRX_STATE EQU 322 +TRX_CTRL_0 EQU 323 +TRX_CTRL_1 EQU 324 +PHY_TX_PWR EQU 325 +PHY_RSSI EQU 326 +PHY_ED_LEVEL EQU 327 +PHY_CC_CCA EQU 328 +CCA_THRES EQU 329 +RX_CTRL EQU 330 +SFD_VALUE EQU 331 +TRX_CTRL_2 EQU 332 +ANT_DIV EQU 333 +IRQ_MASK EQU 334 +IRQ_STATUS EQU 335 +VREG_CTRL EQU 336 +BATMON EQU 337 +XOSC_CTRL EQU 338 +RX_SYN EQU 341 +XAH_CTRL_1 EQU 343 +FTN_CTRL EQU 344 +PLL_CF EQU 346 +PLL_DCU EQU 347 +PART_NUM EQU 348 +VERSION_NUM EQU 349 +MAN_ID_0 EQU 350 +MAN_ID_1 EQU 351 +SHORT_ADDR_0 EQU 352 +SHORT_ADDR_1 EQU 353 +PAN_ID_0 EQU 354 +PAN_ID_1 EQU 355 +IEEE_ADDR_0 EQU 356 +IEEE_ADDR_1 EQU 357 +IEEE_ADDR_2 EQU 358 +IEEE_ADDR_3 EQU 359 +IEEE_ADDR_4 EQU 360 +IEEE_ADDR_5 EQU 361 +IEEE_ADDR_6 EQU 362 +IEEE_ADDR_7 EQU 363 +XAH_CTRL_0 EQU 364 +CSMA_SEED_0 EQU 365 +CSMA_SEED_1 EQU 366 +CSMA_BE EQU 367 +TST_CTRL_DIGI EQU 374 +TST_RX_LENGTH EQU 379 +TRXFBST EQU 384 +TRXFBEND EQU 511 +SCOCR1HH EQU 248 +SCOCR1HL EQU 247 +SCOCR1LH EQU 246 +SCOCR1LL EQU 245 +SCOCR2HH EQU 244 +SCOCR2HL EQU 243 +SCOCR2LH EQU 242 +SCOCR2LL EQU 241 +SCOCR3HH EQU 240 +SCOCR3HL EQU 239 +SCOCR3LH EQU 238 +SCOCR3LL EQU 237 +SCTSRHH EQU 236 +SCTSRHL EQU 235 +SCTSRLH EQU 234 +SCTSRLL EQU 233 +SCBTSRHH EQU 232 +SCBTSRHL EQU 231 +SCBTSRLH EQU 230 +SCBTSRLL EQU 229 +SCCNTHH EQU 228 +SCCNTHL EQU 227 +SCCNTLH EQU 226 +SCCNTLL EQU 225 +SCIRQS EQU 224 +SCIRQM EQU 223 +SCSR EQU 222 +SCCR1 EQU 221 +SCCR0 EQU 220 +EEARL EQU 33 +EEARH EQU 34 +EEDR EQU 32 +EECR EQU 31 +OCDR EQU 49 +MCUCR EQU 53 +MCUSR EQU 52 +EICRA EQU 105 +EICRB EQU 106 +EIMSK EQU 29 +EIFR EQU 28 +PCMSK2 EQU 109 +PCMSK1 EQU 108 +PCMSK0 EQU 107 +PCIFR EQU 27 +PCICR EQU 104 +ADMUX EQU 124 +ADCL EQU 120 +ADCH EQU 121 +ADCSRA EQU 122 +PINA EQU 0 +ADCSRC EQU 119 +DIDR2 EQU 125 +DIDR0 EQU 126 +SPMCSR EQU 55 +SREG EQU 63 +SPL EQU 61 +SPH EQU 62 +DDRJ EQU 260 +PINK EQU 262 +OSCCAL EQU 102 +CLKPR EQU 97 +SMCR EQU 51 +RAMPZ EQU 59 +GPIOR2 EQU 43 +GPIOR1 EQU 42 +GPIOR0 EQU 30 +PRR2 EQU 99 +PRR1 EQU 101 +PRR0 EQU 100 +NEMCR EQU 117 +BGCR EQU 103 +TRXPR EQU 313 +DRTRAM0 EQU 309 +DRTRAM1 EQU 308 +DRTRAM2 EQU 307 +DRTRAM3 EQU 306 +LLDRL EQU 304 +LLDRH EQU 305 +LLCR EQU 303 +DPDS0 EQU 310 +DPDS1 EQU 311 +PORTJ EQU 261 +EIND EQU 60 +ATBR18 EQU 224 +ATBR33 EQU 225 +PINH EQU 256 +DDRH EQU 257 +PORTH EQU 258 +PORTL EQU 267 +DDRL EQU 266 +PINL EQU 265 +PORTK EQU 264 +DDRK EQU 263 diff --git a/resources/data/avr/atmega128rfa1.package b/resources/data/avr/atmega128rfa1.package new file mode 100644 index 0000000..6e3c8f3 --- /dev/null +++ b/resources/data/avr/atmega128rfa1.package @@ -0,0 +1,92 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/avr/atmega128rfr2.data b/resources/data/avr/atmega128rfr2.data new file mode 100644 index 0000000..d17392d --- /dev/null +++ b/resources/data/avr/atmega128rfr2.data @@ -0,0 +1,319 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=16 + +ADCSRB EQU 123 +ACSR EQU 48 +DIDR1 EQU 127 +UDR0 EQU 198 +UCSR0A EQU 192 +UCSR0B EQU 193 +UCSR0C EQU 194 +UBRR0L EQU 196 +UBRR0H EQU 197 +UDR1 EQU 206 +UCSR1A EQU 200 +UCSR1B EQU 201 +UCSR1C EQU 202 +UBRR1L EQU 204 +UBRR1H EQU 205 +TWAMR EQU 189 +TWBR EQU 184 +TWCR EQU 188 +TWSR EQU 185 +TWDR EQU 187 +TWAR EQU 186 +SPCR EQU 44 +SPSR EQU 45 +SPDR EQU 46 +PORTA EQU 2 +DDRA EQU 1 +PORTB EQU 5 +DDRB EQU 4 +PINB EQU 3 +PORTC EQU 8 +DDRC EQU 7 +PINC EQU 6 +PORTD EQU 11 +DDRD EQU 10 +PIND EQU 9 +PORTE EQU 14 +DDRE EQU 13 +PINE EQU 12 +PORTF EQU 17 +DDRF EQU 16 +PINF EQU 15 +PORTG EQU 20 +DDRG EQU 19 +PING EQU 18 +OCR0B EQU 40 +OCR0A EQU 39 +TCNT0 EQU 38 +TCCR0B EQU 37 +TCCR0A EQU 36 +TIMSK0 EQU 110 +TIFR0 EQU 21 +GTCCR EQU 35 +TIMSK2 EQU 112 +TIFR2 EQU 23 +TCCR2A EQU 176 +TCCR2B EQU 177 +TCNT2 EQU 178 +OCR2B EQU 180 +OCR2A EQU 179 +ASSR EQU 182 +DDRJ EQU 260 +WDTCSR EQU 96 +TCCR5A EQU 288 +TCCR5B EQU 289 +TCCR5C EQU 290 +TCNT5L EQU 292 +TCNT5H EQU 293 +OCR5AL EQU 296 +OCR5AH EQU 297 +OCR5BL EQU 298 +OCR5BH EQU 299 +OCR5CL EQU 300 +OCR5CH EQU 301 +ICR5L EQU 294 +ICR5H EQU 295 +TIMSK5 EQU 115 +TIFR5 EQU 26 +TCCR4A EQU 160 +TCCR4B EQU 161 +TCCR4C EQU 162 +TCNT4L EQU 164 +TCNT4H EQU 165 +OCR4AL EQU 168 +OCR4AH EQU 169 +OCR4BL EQU 170 +OCR4BH EQU 171 +OCR4CL EQU 172 +OCR4CH EQU 173 +ICR4L EQU 166 +ICR4H EQU 167 +TIMSK4 EQU 114 +TIFR4 EQU 25 +TCCR3A EQU 144 +TCCR3B EQU 145 +TCCR3C EQU 146 +TCNT3L EQU 148 +TCNT3H EQU 149 +OCR3AL EQU 152 +OCR3AH EQU 153 +OCR3BL EQU 154 +OCR3BH EQU 155 +OCR3CL EQU 156 +OCR3CH EQU 157 +ICR3L EQU 150 +ICR3H EQU 151 +TIMSK3 EQU 113 +TIFR3 EQU 24 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCNT1L EQU 132 +TCNT1H EQU 133 +OCR1AL EQU 136 +OCR1AH EQU 137 +OCR1BL EQU 138 +OCR1BH EQU 139 +OCR1CL EQU 140 +OCR1CH EQU 141 +ICR1L EQU 134 +ICR1H EQU 135 +TIMSK1 EQU 111 +TIFR1 EQU 22 +PARCR EQU 312 +MAFSA0L EQU 270 +MAFSA0H EQU 271 +MAFPA0L EQU 272 +MAFPA0H EQU 273 +MAFSA1L EQU 274 +MAFSA1H EQU 275 +MAFPA1L EQU 276 +MAFPA1H EQU 277 +MAFSA2L EQU 278 +MAFSA2H EQU 279 +MAFPA2L EQU 280 +MAFPA2H EQU 281 +MAFSA3L EQU 282 +MAFSA3H EQU 283 +MAFPA3L EQU 284 +MAFPA3H EQU 285 +MAFCR0 EQU 268 +MAFCR1 EQU 269 +AES_CTRL EQU 316 +AES_STATUS EQU 317 +AES_STATE EQU 318 +AES_KEY EQU 319 +TRX_STATUS EQU 321 +TRX_STATE EQU 322 +TRX_CTRL_0 EQU 323 +TRX_CTRL_1 EQU 324 +PHY_TX_PWR EQU 325 +PHY_RSSI EQU 326 +PHY_ED_LEVEL EQU 327 +PHY_CC_CCA EQU 328 +CCA_THRES EQU 329 +RX_CTRL EQU 330 +SFD_VALUE EQU 331 +TRX_CTRL_2 EQU 332 +ANT_DIV EQU 333 +IRQ_MASK EQU 334 +IRQ_STATUS EQU 335 +IRQ_MASK1 EQU 190 +IRQ_STATUS1 EQU 191 +VREG_CTRL EQU 336 +BATMON EQU 337 +XOSC_CTRL EQU 338 +CC_CTRL_0 EQU 339 +CC_CTRL_1 EQU 340 +RX_SYN EQU 341 +TRX_RPC EQU 342 +XAH_CTRL_1 EQU 343 +FTN_CTRL EQU 344 +PLL_CF EQU 346 +PLL_DCU EQU 347 +PART_NUM EQU 348 +VERSION_NUM EQU 349 +MAN_ID_0 EQU 350 +MAN_ID_1 EQU 351 +SHORT_ADDR_0 EQU 352 +SHORT_ADDR_1 EQU 353 +PAN_ID_0 EQU 354 +PAN_ID_1 EQU 355 +IEEE_ADDR_0 EQU 356 +IEEE_ADDR_1 EQU 357 +IEEE_ADDR_2 EQU 358 +IEEE_ADDR_3 EQU 359 +IEEE_ADDR_4 EQU 360 +IEEE_ADDR_5 EQU 361 +IEEE_ADDR_6 EQU 362 +IEEE_ADDR_7 EQU 363 +XAH_CTRL_0 EQU 364 +CSMA_SEED_0 EQU 365 +CSMA_SEED_1 EQU 366 +CSMA_BE EQU 367 +TST_CTRL_DIGI EQU 374 +TST_RX_LENGTH EQU 379 +TRXFBST EQU 384 +TRXFBEND EQU 511 +SCTSTRHH EQU 252 +SCTSTRHL EQU 251 +SCTSTRLH EQU 250 +SCTSTRLL EQU 249 +SCOCR1HH EQU 248 +SCOCR1HL EQU 247 +SCOCR1LH EQU 246 +SCOCR1LL EQU 245 +SCOCR2HH EQU 244 +SCOCR2HL EQU 243 +SCOCR2LH EQU 242 +SCOCR2LL EQU 241 +SCOCR3HH EQU 240 +SCOCR3HL EQU 239 +SCOCR3LH EQU 238 +SCOCR3LL EQU 237 +SCTSRHH EQU 236 +SCTSRHL EQU 235 +SCTSRLH EQU 234 +SCTSRLL EQU 233 +SCBTSRHH EQU 232 +SCBTSRHL EQU 231 +SCBTSRLH EQU 230 +SCBTSRLL EQU 229 +SCCNTHH EQU 228 +SCCNTHL EQU 227 +SCCNTLH EQU 226 +SCCNTLL EQU 225 +SCIRQS EQU 224 +SCIRQM EQU 223 +SCSR EQU 222 +SCCR1 EQU 221 +SCCR0 EQU 220 +SCCSR EQU 219 +SCRSTRHH EQU 218 +SCRSTRHL EQU 217 +SCRSTRLH EQU 216 +SCRSTRLL EQU 215 +EEARL EQU 33 +EEARH EQU 34 +EEDR EQU 32 +EECR EQU 31 +OCDR EQU 49 +MCUCR EQU 53 +MCUSR EQU 52 +EICRA EQU 105 +EICRB EQU 106 +EIMSK EQU 29 +EIFR EQU 28 +PCMSK2 EQU 109 +PCMSK1 EQU 108 +PCMSK0 EQU 107 +PCIFR EQU 27 +PCICR EQU 104 +ADMUX EQU 124 +ADCL EQU 120 +ADCH EQU 121 +ADCSRA EQU 122 +PINA EQU 0 +ADCSRC EQU 119 +DIDR2 EQU 125 +DIDR0 EQU 126 +SPMCSR EQU 55 +SREG EQU 63 +SPL EQU 61 +SPH EQU 62 +PORTJ EQU 261 +DDRK EQU 263 +OSCCAL EQU 102 +CLKPR EQU 97 +SMCR EQU 51 +RAMPZ EQU 59 +GPIOR2 EQU 43 +GPIOR1 EQU 42 +GPIOR0 EQU 30 +PRR2 EQU 99 +PRR1 EQU 101 +PRR0 EQU 100 +NEMCR EQU 117 +BGCR EQU 103 +TRXPR EQU 313 +DRTRAM0 EQU 309 +DRTRAM1 EQU 308 +DRTRAM2 EQU 307 +DRTRAM3 EQU 306 +LLDRL EQU 304 +LLDRH EQU 305 +LLCR EQU 303 +DPDS0 EQU 310 +DPDS1 EQU 311 +PINK EQU 262 +ATBR18 EQU 224 +ATBR33 EQU 225 +PINH EQU 256 +DDRH EQU 257 +PORTH EQU 258 +PINJ EQU 259 +PORTL EQU 267 +DDRL EQU 266 +PINL EQU 265 +PORTK EQU 264 diff --git a/resources/data/avr/atmega164.data b/resources/data/avr/atmega164.data new file mode 100644 index 0000000..40200b7 --- /dev/null +++ b/resources/data/avr/atmega164.data @@ -0,0 +1,122 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=20 + +ADCSRB EQU 91 +ACSR EQU 48 +DIDR1 EQU 95 +UDR0 EQU 166 +UCSR0A EQU 160 +UCSR0B EQU 161 +UCSR0C EQU 162 +UBRR0L EQU 164 +UBRR0H EQU 165 +PORTA EQU 2 +DDRA EQU 1 +PORTB EQU 5 +DDRB EQU 4 +PINB EQU 3 +PORTC EQU 8 +DDRC EQU 7 +PINC EQU 6 +PORTD EQU 11 +DDRD EQU 10 +PIND EQU 9 +OCR0B EQU 40 +OCR0A EQU 39 +TCNT0 EQU 38 +TCCR0B EQU 37 +TCCR0A EQU 36 +TIMSK0 EQU 78 +TIFR0 EQU 21 +GTCCR EQU 35 +TIMSK2 EQU 80 +TIFR2 EQU 23 +TCCR2A EQU 144 +TCCR2B EQU 145 +TCNT2 EQU 146 +OCR2B EQU 148 +OCR2A EQU 147 +ASSR EQU 150 +GTCCR EQU 35 +WDTCSR EQU 64 +OCDR EQU 49 +MCUCR EQU 53 +MCUSR EQU 52 +SPMCSR EQU 55 +EICRA EQU 73 +EIMSK EQU 29 +EIFR EQU 28 +PCMSK3 EQU 83 +PCMSK2 EQU 77 +PCMSK1 EQU 76 +PCMSK0 EQU 75 +PCIFR EQU 27 +PCICR EQU 72 +ADMUX EQU 92 +ADCL EQU 88 +ADCH EQU 89 +ADCSRA EQU 90 +ADCSRB EQU 91 +DIDR0 EQU 94 +TIMSK1 EQU 79 +TIFR1 EQU 22 +TCCR1A EQU 96 +TCCR1B EQU 97 +TCCR1C EQU 98 +TCNT1L EQU 100 +TCNT1H EQU 101 +OCR1AL EQU 104 +OCR1AH EQU 105 +OCR1BL EQU 106 +OCR1BH EQU 107 +ICR1L EQU 102 +ICR1H EQU 103 +EEARL EQU 33 +EEARH EQU 34 +EEDR EQU 32 +EECR EQU 31 +SPDR0 EQU 46 +SPSR0 EQU 45 +SPCR0 EQU 44 +TWAMR EQU 157 +TWBR EQU 152 +TWCR EQU 156 +TWSR EQU 153 +TWDR EQU 155 +TWAR EQU 154 +UDR1 EQU 174 +UCSR1A EQU 168 +UCSR1B EQU 169 +UCSR1C EQU 170 +UBRR1L EQU 172 +UBRR1H EQU 173 +SREG EQU 63 +SPL EQU 61 +SPH EQU 62 +MCUCR EQU 53 +MCUSR EQU 52 +OSCCAL EQU 70 +CLKPR EQU 65 +SMCR EQU 51 +GPIOR2 EQU 43 +GPIOR1 EQU 42 +GPIOR0 EQU 30 +PRR0 EQU 68 diff --git a/resources/data/avr/atmega164.package b/resources/data/avr/atmega164.package new file mode 100644 index 0000000..79598b8 --- /dev/null +++ b/resources/data/avr/atmega164.package @@ -0,0 +1,71 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/avr/atmega169.data b/resources/data/avr/atmega169.data new file mode 100644 index 0000000..9759f56 --- /dev/null +++ b/resources/data/avr/atmega169.data @@ -0,0 +1,131 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=16 + +TCCR0A EQU 36 +TCNT0 EQU 38 +OCR0A EQU 39 +TIMSK0 EQU 110 +TIFR0 EQU 21 +GTCCR EQU 35 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCNT1H EQU 133 +TCNT1L EQU 132 +OCR1AH EQU 137 +OCR1AL EQU 136 +OCR1BH EQU 139 +OCR1BL EQU 138 +ICR1H EQU 135 +ICR1L EQU 134 +TIMSK1 EQU 111 +TIFR1 EQU 22 +TCCR2A EQU 176 +TCNT2 EQU 178 +OCR2A EQU 179 +TIMSK2 EQU 112 +TIFR2 EQU 23 +ASSR EQU 182 +WDTCR EQU 96 +EEARH EQU 34 +EEARL EQU 33 +EEDR EQU 32 +EECR EQU 31 +SPCR EQU 44 +SPSR EQU 45 +SPDR EQU 46 +PORTA EQU 2 +DDRA EQU 1 +PINA EQU 0 +PORTB EQU 5 +DDRB EQU 4 +PINB EQU 3 +PORTC EQU 8 +DDRC EQU 7 +PINC EQU 6 +PORTD EQU 11 +DDRD EQU 10 +PIND EQU 9 +ADCSRB EQU 123 +ACSR EQU 48 +DIDR1 EQU 127 +PORTE EQU 14 +DDRE EQU 13 +PINE EQU 12 +PORTF EQU 17 +DDRF EQU 16 +PINF EQU 15 +OCDR EQU 49 +MCUCR EQU 53 +MCUSR EQU 52 +EICRA EQU 105 +EIMSK EQU 29 +EIFR EQU 28 +PCMSK1 EQU 108 +PCMSK0 EQU 107 +USIDR EQU 186 +USISR EQU 185 +USICR EQU 184 +ADMUX EQU 124 +ADCSRA EQU 122 +ADCH EQU 121 +ADCL EQU 120 +DIDR0 EQU 126 +SPMCSR EQU 55 +UDR0 EQU 198 +UCSR0A EQU 192 +UCSR0B EQU 193 +UCSR0C EQU 194 +UBRR0H EQU 197 +UBRR0L EQU 196 +LCDCRA EQU 228 +LCDCRB EQU 229 +LCDFRR EQU 230 +LCDCCR EQU 231 +LCDDR18 EQU 254 +LCDDR17 EQU 253 +LCDDR16 EQU 252 +LCDDR15 EQU 251 +LCDDR13 EQU 249 +LCDDR12 EQU 248 +LCDDR11 EQU 247 +LCDDR10 EQU 246 +LCDDR8 EQU 244 +LCDDR7 EQU 243 +LCDDR6 EQU 242 +LCDDR5 EQU 241 +LCDDR3 EQU 239 +LCDDR2 EQU 238 +LCDDR1 EQU 237 +LCDDR0 EQU 236 +SREG EQU 63 +SPH EQU 62 +SPL EQU 61 +OSCCAL EQU 102 +CLKPR EQU 97 +PRR EQU 100 +SMCR EQU 51 +GPIOR2 EQU 43 +GPIOR1 EQU 42 +GPIOR0 EQU 30 +PORTG EQU 20 +DDRG EQU 19 +PING EQU 18 diff --git a/resources/data/avr/atmega169.package b/resources/data/avr/atmega169.package new file mode 100644 index 0000000..279c0d2 --- /dev/null +++ b/resources/data/avr/atmega169.package @@ -0,0 +1,92 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/avr/atmega16m1.data b/resources/data/avr/atmega16m1.data new file mode 100644 index 0000000..684e0ac --- /dev/null +++ b/resources/data/avr/atmega16m1.data @@ -0,0 +1,179 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=16 + +PORTB EQU 5 +DDRB EQU 4 +PINB EQU 3 +PORTC EQU 8 +DDRC EQU 7 +PINC EQU 6 +PORTD EQU 11 +DDRD EQU 10 +PIND EQU 9 +CANGCON EQU 216 +CANGSTA EQU 217 +CANGIT EQU 218 +CANGIE EQU 219 +CANEN2 EQU 220 +CANEN1 EQU 221 +CANIE2 EQU 222 +CANIE1 EQU 223 +CANSIT2 EQU 224 +CANSIT1 EQU 225 +CANBT1 EQU 226 +CANBT2 EQU 227 +CANBT3 EQU 228 +CANTCON EQU 229 +CANTIML EQU 230 +CANTIMH EQU 231 +CANTTCL EQU 232 +CANTTCH EQU 233 +CANTEC EQU 234 +CANREC EQU 235 +CANHPMOB EQU 236 +CANPAGE EQU 237 +CANSTMOB EQU 238 +CANCDMOB EQU 239 +CANIDT4 EQU 240 +CANIDT3 EQU 241 +CANIDT2 EQU 242 +CANIDT1 EQU 243 +CANIDM4 EQU 244 +CANIDM3 EQU 245 +CANIDM2 EQU 246 +CANIDM1 EQU 247 +CANSTML EQU 248 +CANSTMH EQU 249 +CANMSG EQU 250 +AC0CON EQU 148 +AC1CON EQU 149 +AC2CON EQU 150 +AC3CON EQU 151 +ACSR EQU 48 +DACH EQU 146 +DACL EQU 145 +DACON EQU 144 +SPMCSR EQU 55 +SREG EQU 63 +SPL EQU 61 +SPH EQU 62 +MCUCR EQU 53 +MCUSR EQU 52 +OSCCAL EQU 102 +CLKPR EQU 97 +SMCR EQU 51 +GPIOR2 EQU 26 +GPIOR1 EQU 25 +GPIOR0 EQU 30 +PLLCSR EQU 41 +PRR EQU 100 +PORTE EQU 14 +DDRE EQU 13 +PINE EQU 12 +TIMSK0 EQU 110 +TIFR0 EQU 21 +TCCR0A EQU 36 +TCCR0B EQU 37 +TCNT0 EQU 38 +OCR0A EQU 39 +OCR0B EQU 40 +GTCCR EQU 35 +TIMSK1 EQU 111 +TIFR1 EQU 22 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCNT1L EQU 132 +TCNT1H EQU 133 +OCR1AL EQU 136 +OCR1AH EQU 137 +OCR1BL EQU 138 +OCR1BH EQU 139 +ICR1L EQU 134 +ICR1H EQU 135 +DWDR EQU 49 +ADMUX EQU 124 +ADCSRA EQU 122 +ADCL EQU 120 +ADCH EQU 121 +ADCSRB EQU 123 +DIDR0 EQU 126 +DIDR1 EQU 127 +AMP0CSR EQU 117 +AMP1CSR EQU 118 +AMP2CSR EQU 119 +LINCR EQU 200 +LINSIR EQU 201 +LINENIR EQU 202 +LINERR EQU 203 +LINBTR EQU 204 +LINBRRL EQU 205 +LINBRRH EQU 206 +LINDLR EQU 207 +LINIDR EQU 208 +LINSEL EQU 209 +LINDAT EQU 210 +SPCR EQU 44 +SPSR EQU 45 +SPDR EQU 46 +WDTCSR EQU 96 +EICRA EQU 105 +EIMSK EQU 29 +EIFR EQU 28 +PCICR EQU 104 +PCMSK3 EQU 109 +PCMSK2 EQU 108 +PCMSK1 EQU 107 +PCMSK0 EQU 106 +PCIFR EQU 27 +EEARL EQU 33 +EEARH EQU 34 +EEDR EQU 32 +EECR EQU 31 +PIFR EQU 188 +PIM EQU 187 +PMIC2 EQU 186 +PMIC1 EQU 185 +PMIC0 EQU 184 +PCTL EQU 183 +POC EQU 182 +PCNF EQU 181 +PSYNC EQU 180 +POCR_RBL EQU 178 +POCR_RBH EQU 179 +POCR2SBL EQU 176 +POCR2SBH EQU 177 +POCR2RAL EQU 174 +POCR2RAH EQU 175 +POCR2SAL EQU 172 +POCR2SAH EQU 173 +POCR1SBL EQU 170 +POCR1SBH EQU 171 +POCR1RAL EQU 168 +POCR1RAH EQU 169 +POCR1SAL EQU 166 +POCR1SAH EQU 167 +POCR0SBL EQU 164 +POCR0SBH EQU 165 +POCR0RAL EQU 162 +POCR0RAH EQU 163 +POCR0SAL EQU 160 +POCR0SAH EQU 161 diff --git a/resources/data/avr/atmega16m1.package b/resources/data/avr/atmega16m1.package new file mode 100644 index 0000000..eaef88d --- /dev/null +++ b/resources/data/avr/atmega16m1.package @@ -0,0 +1,60 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/avr/atmega2560.data b/resources/data/avr/atmega2560.data new file mode 100644 index 0000000..f112d5f --- /dev/null +++ b/resources/data/avr/atmega2560.data @@ -0,0 +1,188 @@ + +MaxMHz=16 + +[Registers] +ADCSRB EQU 123 +ACSR EQU 48 +DIDR1 EQU 127 +UDR0 EQU 198 +UCSR0A EQU 192 +UCSR0B EQU 193 +UCSR0C EQU 194 +UBRR0L EQU 196 +UBRR0H EQU 197 +TWAMR EQU 189 +TWBR EQU 184 +TWCR EQU 188 +TWSR EQU 185 +TWDR EQU 187 +TWAR EQU 186 +SPCR EQU 44 +SPSR EQU 45 +SPDR EQU 46 +PORTA EQU 2 +DDRA EQU 1 +PORTB EQU 5 +DDRB EQU 4 +PINB EQU 3 +PORTC EQU 8 +DDRC EQU 7 +PINC EQU 6 +PORTD EQU 11 +DDRD EQU 10 +PIND EQU 9 +PORTE EQU 14 +DDRE EQU 13 +PINE EQU 12 +PORTF EQU 17 +DDRF EQU 16 +PINF EQU 15 +PORTG EQU 20 +DDRG EQU 19 +PING EQU 18 +PORTH EQU 258 +DDRH EQU 257 +PINH EQU 256 +PORTJ EQU 261 +DDRJ EQU 260 +PINJ EQU 259 +PORTK EQU 264 +DDRK EQU 263 +PINK EQU 262 +PORTL EQU 267 +DDRL EQU 266 +PINL EQU 265 +OCR0B EQU 40 +OCR0A EQU 39 +TCNT0 EQU 38 +TCCR0B EQU 37 +TCCR0A EQU 36 +TIMSK0 EQU 110 +TIFR0 EQU 21 +GTCCR EQU 35 +TIMSK2 EQU 112 +TIFR2 EQU 23 +TCCR2A EQU 176 +TCCR2B EQU 177 +TCNT2 EQU 178 +OCR2B EQU 180 +OCR2A EQU 179 +ASSR EQU 182 +UBRR3H EQU 309 +WDTCSR EQU 96 +UDR1 EQU 206 +UCSR1A EQU 200 +UCSR1B EQU 201 +UCSR1C EQU 202 +UBRR1L EQU 204 +UBRR1H EQU 205 +EEARL EQU 33 +EEARH EQU 34 +EEDR EQU 32 +EECR EQU 31 +TCCR5A EQU 288 +TCCR5B EQU 289 +TCCR5C EQU 290 +TCNT5L EQU 292 +TCNT5H EQU 293 +OCR5AL EQU 296 +OCR5AH EQU 297 +OCR5BL EQU 298 +OCR5BH EQU 299 +OCR5CL EQU 300 +OCR5CH EQU 301 +ICR5L EQU 294 +ICR5H EQU 295 +TIMSK5 EQU 115 +TIFR5 EQU 26 +TCCR4A EQU 160 +TCCR4B EQU 161 +TCCR4C EQU 162 +TCNT4L EQU 164 +TCNT4H EQU 165 +OCR4AL EQU 168 +OCR4AH EQU 169 +OCR4BL EQU 170 +OCR4BH EQU 171 +OCR4CL EQU 172 +OCR4CH EQU 173 +ICR4L EQU 166 +ICR4H EQU 167 +TIMSK4 EQU 114 +TIFR4 EQU 25 +TCCR3A EQU 144 +TCCR3B EQU 145 +TCCR3C EQU 146 +TCNT3L EQU 148 +TCNT3H EQU 149 +OCR3AL EQU 152 +OCR3AH EQU 153 +OCR3BL EQU 154 +OCR3BH EQU 155 +OCR3CL EQU 156 +OCR3CH EQU 157 +ICR3L EQU 150 +ICR3H EQU 151 +TIMSK3 EQU 113 +TIFR3 EQU 24 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCNT1L EQU 132 +TCNT1H EQU 133 +OCR1AL EQU 136 +OCR1AH EQU 137 +OCR1BL EQU 138 +OCR1BH EQU 139 +OCR1CL EQU 140 +OCR1CH EQU 141 +ICR1L EQU 134 +ICR1H EQU 135 +TIMSK1 EQU 111 +TIFR1 EQU 22 +OCDR EQU 49 +MCUCR EQU 53 +MCUSR EQU 52 +EICRA EQU 105 +EICRB EQU 106 +EIMSK EQU 29 +EIFR EQU 28 +PCMSK2 EQU 109 +PCMSK1 EQU 108 +PCMSK0 EQU 107 +PCIFR EQU 27 +PCICR EQU 104 +SREG EQU 63 +SPL EQU 61 +SPH EQU 62 +UBRR3L EQU 308 +UCSR3C EQU 306 +XMCRA EQU 116 +XMCRB EQU 117 +OSCCAL EQU 102 +CLKPR EQU 97 +SMCR EQU 51 +EIND EQU 60 +RAMPZ EQU 59 +GPIOR2 EQU 43 +GPIOR1 EQU 42 +GPIOR0 EQU 30 +PRR1 EQU 101 +PRR0 EQU 100 +ADMUX EQU 124 +ADCL EQU 120 +ADCH EQU 121 +ADCSRA EQU 122 +PINA EQU 0 +DIDR2 EQU 125 +DIDR0 EQU 126 +SPMCSR EQU 55 +UDR2 EQU 214 +UCSR2A EQU 208 +UCSR2B EQU 209 +UCSR2C EQU 210 +UBRR2L EQU 212 +UBRR2H EQU 213 +UDR3 EQU 310 +UCSR3A EQU 304 +UCSR3B EQU 305 diff --git a/resources/data/avr/atmega32.data b/resources/data/avr/atmega32.data new file mode 100644 index 0000000..9994d69 --- /dev/null +++ b/resources/data/avr/atmega32.data @@ -0,0 +1,86 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=16 + +EEARH EQU 31 +EEARL EQU 30 +EEDR EQU 29 +EECR EQU 28 +WDTCR EQU 33 +GICR EQU 59 +GIFR EQU 58 +MCUCR EQU 53 +MCUCSR EQU 52 +TCCR0 EQU 51 +TCNT0 EQU 50 +OCR0 EQU 60 +TIMSK EQU 57 +TIFR EQU 56 +TCCR2 EQU 37 +TCNT2 EQU 36 +OCR2 EQU 35 +ASSR EQU 34 +TCCR1A EQU 47 +TCCR1B EQU 46 +TCNT1H EQU 45 +TCNT1L EQU 44 +OCR1AH EQU 43 +OCR1AL EQU 42 +OCR1BH EQU 41 +OCR1BL EQU 40 +ICR1H EQU 39 +ICR1L EQU 38 +SPDR EQU 15 +SPSR EQU 14 +SPCR EQU 13 +UDR EQU 12 +UCSRA EQU 11 +UCSRB EQU 10 +UCSRC EQU 32 +UBRRH EQU 32 +UBRRL EQU 9 +SFIOR EQU 48 +ACSR EQU 8 +ADMUX EQU 7 +ADCSRA EQU 6 +ADCH EQU 5 +ADCL EQU 4 +PORTA EQU 27 +DDRA EQU 26 +PINA EQU 25 +PORTB EQU 24 +DDRB EQU 23 +PINB EQU 22 +PORTC EQU 21 +DDRC EQU 20 +PINC EQU 19 +PORTD EQU 18 +DDRD EQU 17 +PIND EQU 16 +SREG EQU 63 +SPH EQU 62 +SPL EQU 61 +OSCCAL EQU 49 +SPMCR EQU 55 +TWBR EQU 0 +TWCR EQU 54 +TWSR EQU 1 +TWDR EQU 3 +TWAR EQU 2 diff --git a/resources/data/avr/atmega32.package b/resources/data/avr/atmega32.package new file mode 100644 index 0000000..47e4f0c --- /dev/null +++ b/resources/data/avr/atmega32.package @@ -0,0 +1,71 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/avr/atmega324.data b/resources/data/avr/atmega324.data new file mode 100644 index 0000000..6200879 --- /dev/null +++ b/resources/data/avr/atmega324.data @@ -0,0 +1,119 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=20 + +ADCSRB EQU 123 +ACSR EQU 48 +DIDR1 EQU 127 +UDR0 EQU 198 +UCSR0A EQU 192 +UCSR0B EQU 193 +UCSR0C EQU 194 +UBRR0L EQU 196 +UBRR0H EQU 197 +PORTA EQU 2 +DDRA EQU 1 +PORTB EQU 5 +DDRB EQU 4 +PINB EQU 3 +PORTC EQU 8 +DDRC EQU 7 +PINC EQU 6 +PORTD EQU 11 +DDRD EQU 10 +PIND EQU 9 +OCR0B EQU 40 +OCR0A EQU 39 +TCNT0 EQU 38 +TCCR0B EQU 37 +TCCR0A EQU 36 +TIMSK0 EQU 110 +TIFR0 EQU 21 +GTCCR EQU 35 +TIMSK2 EQU 112 +TIFR2 EQU 23 +TCCR2A EQU 176 +TCCR2B EQU 177 +TCNT2 EQU 178 +OCR2B EQU 180 +OCR2A EQU 179 +ASSR EQU 182 +PRR0 EQU 100 +WDTCSR EQU 96 +OCDR EQU 49 +MCUCR EQU 53 +MCUSR EQU 52 +SPMCSR EQU 55 +EICRA EQU 105 +EIMSK EQU 29 +EIFR EQU 28 +PCMSK3 EQU 115 +PCMSK2 EQU 109 +PCMSK1 EQU 108 +PCMSK0 EQU 107 +PCIFR EQU 27 +PCICR EQU 104 +ADMUX EQU 124 +ADCL EQU 120 +ADCH EQU 121 +ADCSRA EQU 122 +PINA EQU 0 +DIDR0 EQU 126 +TIMSK1 EQU 111 +TIFR1 EQU 22 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCNT1L EQU 132 +TCNT1H EQU 133 +OCR1AL EQU 136 +OCR1AH EQU 137 +OCR1BL EQU 138 +OCR1BH EQU 139 +ICR1L EQU 134 +ICR1H EQU 135 +EEARL EQU 33 +EEARH EQU 34 +EEDR EQU 32 +EECR EQU 31 +SPDR0 EQU 46 +SPSR0 EQU 45 +SPCR0 EQU 44 +TWAMR EQU 189 +TWBR EQU 184 +TWCR EQU 188 +TWSR EQU 185 +TWDR EQU 187 +TWAR EQU 186 +UDR1 EQU 206 +UCSR1A EQU 200 +UCSR1B EQU 201 +UCSR1C EQU 202 +UBRR1L EQU 204 +UBRR1H EQU 205 +SREG EQU 63 +SPL EQU 61 +SPH EQU 62 +GPIOR0 EQU 30 +GPIOR1 EQU 42 +OSCCAL EQU 102 +CLKPR EQU 97 +SMCR EQU 51 +GPIOR2 EQU 43 diff --git a/resources/data/avr/atmega324a.data b/resources/data/avr/atmega324a.data new file mode 100644 index 0000000..35efaba --- /dev/null +++ b/resources/data/avr/atmega324a.data @@ -0,0 +1,120 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=20 + + +ADCSRB EQU 123 +ACSR EQU 48 +DIDR1 EQU 127 +UDR0 EQU 198 +UCSR0A EQU 192 +UCSR0B EQU 193 +UCSR0C EQU 194 +UBRR0L EQU 196 +UBRR0H EQU 197 +PORTA EQU 2 +DDRA EQU 1 +PORTB EQU 5 +DDRB EQU 4 +PINB EQU 3 +PORTC EQU 8 +DDRC EQU 7 +PINC EQU 6 +PORTD EQU 11 +DDRD EQU 10 +PIND EQU 9 +OCR0B EQU 40 +OCR0A EQU 39 +TCNT0 EQU 38 +TCCR0B EQU 37 +TCCR0A EQU 36 +TIMSK0 EQU 110 +TIFR0 EQU 21 +GTCCR EQU 35 +TIMSK2 EQU 112 +TIFR2 EQU 23 +TCCR2A EQU 176 +TCCR2B EQU 177 +TCNT2 EQU 178 +OCR2B EQU 180 +OCR2A EQU 179 +ASSR EQU 182 +PRR0 EQU 100 +WDTCSR EQU 96 +OCDR EQU 49 +MCUCR EQU 53 +MCUSR EQU 52 +SPMCSR EQU 55 +EICRA EQU 105 +EIMSK EQU 29 +EIFR EQU 28 +PCMSK3 EQU 115 +PCMSK2 EQU 109 +PCMSK1 EQU 108 +PCMSK0 EQU 107 +PCIFR EQU 27 +PCICR EQU 104 +ADMUX EQU 124 +ADCL EQU 120 +ADCH EQU 121 +ADCSRA EQU 122 +PINA EQU 0 +DIDR0 EQU 126 +TIMSK1 EQU 111 +TIFR1 EQU 22 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCNT1L EQU 132 +TCNT1H EQU 133 +OCR1AL EQU 136 +OCR1AH EQU 137 +OCR1BL EQU 138 +OCR1BH EQU 139 +ICR1L EQU 134 +ICR1H EQU 135 +EEARL EQU 33 +EEARH EQU 34 +EEDR EQU 32 +EECR EQU 31 +SPDR0 EQU 46 +SPSR0 EQU 45 +SPCR0 EQU 44 +TWAMR EQU 189 +TWBR EQU 184 +TWCR EQU 188 +TWSR EQU 185 +TWDR EQU 187 +TWAR EQU 186 +UDR1 EQU 206 +UCSR1A EQU 200 +UCSR1B EQU 201 +UCSR1C EQU 202 +UBRR1L EQU 204 +UBRR1H EQU 205 +SREG EQU 63 +SPL EQU 61 +SPH EQU 62 +GPIOR0 EQU 30 +GPIOR1 EQU 42 +OSCCAL EQU 102 +CLKPR EQU 97 +SMCR EQU 51 +GPIOR2 EQU 43 diff --git a/resources/data/avr/atmega328.data b/resources/data/avr/atmega328.data new file mode 100644 index 0000000..bd48783 --- /dev/null +++ b/resources/data/avr/atmega328.data @@ -0,0 +1,108 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=20 + +UDR0 EQU 198 +UCSR0A EQU 192 +UCSR0B EQU 193 +UCSR0C EQU 194 +UBRR0H EQU 197 +UBRR0L EQU 196 +TWAMR EQU 189 +TWBR EQU 184 +TWCR EQU 188 +TWSR EQU 185 +TWDR EQU 187 +TWAR EQU 186 +TIMSK1 EQU 111 +TIFR1 EQU 22 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCNT1H EQU 133 +TCNT1L EQU 132 +OCR1AH EQU 137 +OCR1AL EQU 136 +OCR1BH EQU 139 +OCR1BL EQU 138 +ICR1H EQU 135 +ICR1L EQU 134 +GTCCR EQU 35 +TIMSK2 EQU 112 +TIFR2 EQU 23 +TCCR2A EQU 176 +TCCR2B EQU 177 +TCNT2 EQU 178 +OCR2B EQU 180 +OCR2A EQU 179 +ASSR EQU 182 +ADMUX EQU 124 +ADCH EQU 121 +ADCL EQU 120 +ADCSRA EQU 122 +ADCSRB EQU 123 +DIDR0 EQU 126 +ACSR EQU 48 +DIDR1 EQU 127 +PORTB EQU 5 +DDRB EQU 4 +PINB EQU 3 +PORTC EQU 8 +DDRC EQU 7 +PINC EQU 6 +PORTD EQU 11 +DDRD EQU 10 +PIND EQU 9 +OCR0B EQU 40 +OCR0A EQU 39 +TCNT0 EQU 38 +TCCR0B EQU 37 +TCCR0A EQU 36 +TIMSK0 EQU 110 +TIFR0 EQU 21 +EICRA EQU 105 +EIMSK EQU 29 +EIFR EQU 28 +PCICR EQU 104 +PCMSK2 EQU 109 +PCMSK1 EQU 108 +PCMSK0 EQU 107 +PCIFR EQU 27 +SPDR EQU 46 +SPSR EQU 45 +SPCR EQU 44 +WDTCSR EQU 96 +PRR EQU 100 +OSCCAL EQU 102 +CLKPR EQU 97 +SREG EQU 63 +SPH EQU 62 +SPL EQU 61 +SPMCSR EQU 55 +MCUCR EQU 53 +MCUSR EQU 52 +SMCR EQU 51 +GPIOR2 EQU 43 +GPIOR1 EQU 42 +GPIOR0 EQU 30 +EEARH EQU 34 +EEARL EQU 33 +EEDR EQU 32 +EECR EQU 31 diff --git a/resources/data/avr/atmega328.package b/resources/data/avr/atmega328.package new file mode 100644 index 0000000..5ffbb4b --- /dev/null +++ b/resources/data/avr/atmega328.package @@ -0,0 +1,59 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/avr/atmega32u4.data b/resources/data/avr/atmega32u4.data new file mode 100644 index 0000000..4a87c8e --- /dev/null +++ b/resources/data/avr/atmega32u4.data @@ -0,0 +1,173 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=16 + +WDTCSR EQU 96 +PORTD EQU 11 +DDRD EQU 10 +PIND EQU 9 +SPCR EQU 44 +SPSR EQU 45 +SPDR EQU 46 +UDR1 EQU 206 +UCSR1A EQU 200 +UCSR1B EQU 201 +UCSR1C EQU 202 +UCSR1D EQU 203 +UBRR1L EQU 204 +UBRR1H EQU 205 +SPMCSR EQU 55 +EEARL EQU 33 +EEARH EQU 34 +EEDR EQU 32 +EECR EQU 31 +OCR0B EQU 40 +OCR0A EQU 39 +TCNT0 EQU 38 +TCCR0B EQU 37 +TCCR0A EQU 36 +TIMSK0 EQU 110 +TIFR0 EQU 21 +GTCCR EQU 35 +TCCR3A EQU 144 +TCCR3B EQU 145 +TCCR3C EQU 146 +TCNT3L EQU 148 +TCNT3H EQU 149 +OCR3AL EQU 152 +OCR3AH EQU 153 +OCR3BL EQU 154 +OCR3BH EQU 155 +OCR3CL EQU 156 +OCR3CH EQU 157 +ICR3L EQU 150 +ICR3H EQU 151 +TIMSK3 EQU 113 +TIFR3 EQU 24 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCNT1L EQU 132 +TCNT1H EQU 133 +OCR1AL EQU 136 +OCR1AH EQU 137 +OCR1BL EQU 138 +OCR1BH EQU 139 +OCR1CL EQU 140 +OCR1CH EQU 141 +ICR1L EQU 134 +ICR1H EQU 135 +TIMSK1 EQU 111 +TIFR1 EQU 22 +OCDR EQU 49 +MCUCR EQU 53 +MCUSR EQU 52 +EICRA EQU 105 +EICRB EQU 106 +EIMSK EQU 29 +EIFR EQU 28 +PCMSK0 EQU 107 +PCIFR EQU 27 +PCICR EQU 104 +TCCR4A EQU 192 +TCCR4B EQU 193 +TCCR4C EQU 194 +TCCR4D EQU 195 +TCCR4E EQU 196 +TCNT4 EQU 190 +TC4H EQU 191 +OCR4A EQU 207 +OCR4B EQU 208 +OCR4C EQU 209 +OCR4D EQU 210 +TIMSK4 EQU 114 +TIFR4 EQU 25 +DT4 EQU 212 +PORTB EQU 5 +DDRB EQU 4 +PINB EQU 3 +PORTC EQU 8 +DDRC EQU 7 +PINC EQU 6 +PORTE EQU 14 +DDRE EQU 13 +PINE EQU 12 +PORTF EQU 17 +DDRF EQU 16 +PINF EQU 15 +TWAMR EQU 189 +TWBR EQU 184 +TWCR EQU 188 +TWSR EQU 185 +TWDR EQU 187 +TWAR EQU 186 +ADMUX EQU 124 +ADCSRA EQU 122 +ADCL EQU 120 +ADCH EQU 121 +ADCSRB EQU 123 +DIDR0 EQU 126 +DIDR2 EQU 125 +USBSTA EQU 217 +ACSR EQU 48 +DIDR1 EQU 127 +SREG EQU 63 +SPL EQU 61 +SPH EQU 62 +TIFR2 EQU 23 +UHWCON EQU 215 +OSCCAL EQU 102 +RCCTRL EQU 103 +CLKPR EQU 97 +SMCR EQU 51 +EIND EQU 60 +RAMPZ EQU 59 +GPIOR2 EQU 43 +GPIOR1 EQU 42 +GPIOR0 EQU 30 +PRR1 EQU 101 +PRR0 EQU 100 +CLKSTA EQU 199 +CLKSEL1 EQU 198 +CLKSEL0 EQU 197 +PLLCSR EQU 41 +PLLFRQ EQU 50 +UEINT EQU 244 +UEBCHX EQU 243 +UEBCLX EQU 242 +UEDATX EQU 241 +UEIENX EQU 240 +UESTA1X EQU 239 +UESTA0X EQU 238 +UECFG1X EQU 237 +UECFG0X EQU 236 +UECONX EQU 235 +UERST EQU 234 +UENUM EQU 233 +UEINTX EQU 232 +UDMFN EQU 230 +UDFNUML EQU 228 +UDFNUMH EQU 229 +UDADDR EQU 227 +UDIEN EQU 226 +UDINT EQU 225 +UDCON EQU 224 +USBCON EQU 216 +USBINT EQU 218 diff --git a/resources/data/avr/atmega32u4.package b/resources/data/avr/atmega32u4.package new file mode 100644 index 0000000..6f713d3 --- /dev/null +++ b/resources/data/avr/atmega32u4.package @@ -0,0 +1,73 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/avr/atmega64.data b/resources/data/avr/atmega64.data new file mode 100644 index 0000000..da60e8c --- /dev/null +++ b/resources/data/avr/atmega64.data @@ -0,0 +1,126 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=16 + +SFIOR EQU 32 +ACSR EQU 8 +ADMUX EQU 7 +ADCL EQU 4 +ADCH EQU 5 +ADCSRA EQU 6 +ADCSRB EQU 142 +SPDR EQU 15 +SPSR EQU 14 +SPCR EQU 13 +TWBR EQU 112 +TWCR EQU 116 +TWSR EQU 113 +TWDR EQU 115 +TWAR EQU 114 +UDR0 EQU 12 +UCSR0A EQU 11 +UCSR0B EQU 10 +UCSR0C EQU 149 +UBRR0H EQU 144 +UBRR0L EQU 9 +UDR1 EQU 156 +UCSR1A EQU 155 +UCSR1B EQU 154 +UCSR1C EQU 157 +UBRR1H EQU 152 +UBRR1L EQU 153 +SREG EQU 63 +SPL EQU 61 +SPH EQU 62 +MCUCR EQU 53 +MCUCSR EQU 52 +XMCRA EQU 109 +XMCRB EQU 108 +OSCCAL EQU 111 +XDIV EQU 60 +SPMCSR EQU 104 +OCDR EQU 34 +OCR3CH EQU 131 +PINF EQU 0 +EICRA EQU 106 +EICRB EQU 58 +EIMSK EQU 57 +EIFR EQU 56 +EEARL EQU 30 +EEARH EQU 31 +EEDR EQU 29 +EECR EQU 28 +PORTA EQU 27 +DDRA EQU 26 +PINA EQU 25 +PORTB EQU 24 +DDRB EQU 23 +PINB EQU 22 +PORTC EQU 21 +DDRC EQU 20 +PINC EQU 19 +PORTD EQU 18 +DDRD EQU 17 +PIND EQU 16 +PORTE EQU 3 +DDRE EQU 2 +PINE EQU 1 +PORTF EQU 98 +DDRF EQU 97 +PORTG EQU 101 +DDRG EQU 100 +PING EQU 99 +TCCR0 EQU 51 +TCNT0 EQU 50 +OCR0 EQU 49 +ASSR EQU 48 +TIMSK EQU 55 +TIFR EQU 54 +WDTCR EQU 33 +OCR3CL EQU 130 +ETIMSK EQU 125 +OCR3BL EQU 132 +ETIFR EQU 124 +ICR3H EQU 129 +TCCR1A EQU 47 +TCCR1B EQU 46 +TCCR1C EQU 122 +TCNT1L EQU 44 +TCNT1H EQU 45 +OCR1AL EQU 42 +OCR1AH EQU 43 +OCR1BL EQU 40 +OCR1BH EQU 41 +OCR1CL EQU 120 +OCR1CH EQU 121 +ICR1L EQU 38 +ICR1H EQU 39 +TCCR2 EQU 37 +TCNT2 EQU 36 +OCR2 EQU 35 +OCR3AH EQU 135 +OCR3BH EQU 133 +OCR3AL EQU 134 +TCNT3H EQU 137 +ICR3L EQU 128 +TCCR3A EQU 139 +TCCR3B EQU 138 +TCCR3C EQU 140 +TCNT3L EQU 136 diff --git a/resources/data/avr/atmega64.package b/resources/data/avr/atmega64.package new file mode 100644 index 0000000..f2c9856 --- /dev/null +++ b/resources/data/avr/atmega64.package @@ -0,0 +1,92 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/avr/atmega8.data b/resources/data/avr/atmega8.data new file mode 100644 index 0000000..292727c --- /dev/null +++ b/resources/data/avr/atmega8.data @@ -0,0 +1,82 @@ +/*************************************************************************** + * Copyright (C) 2019 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=16 + +SFIOR EQU 48 +ACSR EQU 8 +SPDR EQU 15 +SPSR EQU 14 +SPCR EQU 13 +GICR EQU 59 +GIFR EQU 58 +MCUCR EQU 53 +TIMSK EQU 57 +TIFR EQU 56 +TCCR0 EQU 51 +TCNT0 EQU 50 +ADCSRA EQU 6 +ADCH EQU 5 +TCCR1A EQU 47 +TCCR1B EQU 46 +TCNT1L EQU 44 +TCNT1H EQU 45 +OCR1AL EQU 42 +OCR1AH EQU 43 +OCR1BL EQU 40 +OCR1BH EQU 41 +ICR1L EQU 38 +ICR1H EQU 39 +ADMUX EQU 7 +SPMCR EQU 55 +TCCR2 EQU 37 +TCNT2 EQU 36 +OCR2 EQU 35 +ASSR EQU 34 +TWBR EQU 0 +UDR EQU 12 +UCSRA EQU 11 +UCSRB EQU 10 +UCSRC EQU 32 +UBRRH EQU 32 +UBRRL EQU 9 +TWCR EQU 54 +TWSR EQU 1 +TWDR EQU 3 +TWAR EQU 2 +WDTCR EQU 33 +PORTB EQU 24 +DDRB EQU 23 +PINB EQU 22 +PORTC EQU 21 +DDRC EQU 20 +PINC EQU 19 +PORTD EQU 18 +DDRD EQU 17 +PIND EQU 16 +EEARL EQU 30 +EEARH EQU 31 +EEDR EQU 29 +EECR EQU 28 +SREG EQU 63 +SPL EQU 61 +SPH EQU 62 +ADCL EQU 4 +MCUCSR EQU 52 +OSCCAL EQU 49 diff --git a/resources/data/avr/attiny13.data b/resources/data/avr/attiny13.data new file mode 100644 index 0000000..48fb9b1 --- /dev/null +++ b/resources/data/avr/attiny13.data @@ -0,0 +1,54 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=16 + +ADMUX EQU 7 +ADCSRA EQU 6 +ADCH EQU 5 +ADCL EQU 4 +ADCSRB EQU 3 +DIDR0 EQU 20 +ACSR EQU 8 +EEAR EQU 30 +EEDR EQU 29 +EECR EQU 28 +SREG EQU 63 +SPL EQU 61 +MCUCR EQU 53 +MCUSR EQU 52 +OSCCAL EQU 49 +CLKPR EQU 38 +DWDR EQU 46 +SPMCSR EQU 55 +PORTB EQU 24 +DDRB EQU 23 +PINB EQU 22 +GIMSK EQU 59 +GIFR EQU 58 +PCMSK EQU 21 +TIMSK0 EQU 57 +TIFR0 EQU 56 +OCR0A EQU 54 +TCCR0A EQU 47 +TCNT0 EQU 50 +TCCR0B EQU 51 +OCR0B EQU 41 +GTCCR EQU 40 +WDTCR EQU 33 diff --git a/resources/data/avr/attiny2313.data b/resources/data/avr/attiny2313.data new file mode 100644 index 0000000..91c13e8 --- /dev/null +++ b/resources/data/avr/attiny2313.data @@ -0,0 +1,77 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=16 + +PORTB EQU 24 +DDRB EQU 23 +PINB EQU 22 +TIMSK EQU 57 +TIFR EQU 56 +OCR0B EQU 60 +OCR0A EQU 54 +TCCR0A EQU 48 +TCNT0 EQU 50 +TCCR0B EQU 51 +TCCR1A EQU 47 +TCCR1B EQU 46 +TCCR1C EQU 34 +TCNT1H EQU 45 +TCNT1L EQU 44 +OCR1AH EQU 43 +OCR1AL EQU 42 +OCR1BH EQU 41 +OCR1BL EQU 40 +ICR1H EQU 37 +ICR1L EQU 36 +WDTCR EQU 33 +GIMSK EQU 59 +EIFR EQU 58 +UDR EQU 12 +UCSRA EQU 11 +UCSRB EQU 10 +UCSRC EQU 3 +UBRRH EQU 2 +UBRRL EQU 9 +ACSR EQU 8 +DIDR EQU 1 +PORTD EQU 18 +DDRD EQU 17 +PIND EQU 16 +EEAR EQU 30 +EEDR EQU 29 +EECR EQU 28 +PORTA EQU 27 +DDRA EQU 26 +PINA EQU 25 +SREG EQU 63 +SPL EQU 61 +SPMCSR EQU 55 +MCUCR EQU 53 +MCUSR EQU 52 +OSCCAL EQU 49 +CLKPR EQU 38 +GTCCR EQU 35 +PCMSK EQU 32 +GPIOR2 EQU 21 +GPIOR1 EQU 20 +GPIOR0 EQU 19 +USIDR EQU 15 +USISR EQU 14 +USICR EQU 13 diff --git a/resources/data/avr/attiny2313.package b/resources/data/avr/attiny2313.package new file mode 100644 index 0000000..f1e143e --- /dev/null +++ b/resources/data/avr/attiny2313.package @@ -0,0 +1,47 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/avr/attiny2313a.data b/resources/data/avr/attiny2313a.data new file mode 100644 index 0000000..1411e81 --- /dev/null +++ b/resources/data/avr/attiny2313a.data @@ -0,0 +1,82 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=20 + +PORTB EQU 24 +DDRB EQU 23 +PINB EQU 22 +TIMSK EQU 57 +TIFR EQU 56 +OCR0B EQU 60 +OCR0A EQU 54 +TCCR0A EQU 48 +TCNT0 EQU 50 +TCCR0B EQU 51 +EIFR EQU 58 +BODCR EQU 7 +TCCR1A EQU 47 +TCCR1B EQU 46 +TCCR1C EQU 34 +TCNT1L EQU 44 +TCNT1H EQU 45 +OCR1AL EQU 42 +OCR1AH EQU 43 +OCR1BL EQU 40 +OCR1BH EQU 41 +ICR1L EQU 36 +ICR1H EQU 37 +WDTCR EQU 33 +UDR EQU 12 +UCSRA EQU 11 +UCSRB EQU 10 +UCSRC EQU 3 +UBRRH EQU 2 +UBRRL EQU 9 +ACSR EQU 8 +DIDR EQU 1 +PORTD EQU 18 +DDRD EQU 17 +PIND EQU 16 +EEAR EQU 30 +EEDR EQU 29 +EECR EQU 28 +PORTA EQU 27 +DDRA EQU 26 +PINA EQU 25 +USIDR EQU 15 +USISR EQU 14 +USICR EQU 13 +GIMSK EQU 59 +GIFR EQU 58 +PCMSK2 EQU 5 +PCMSK1 EQU 4 +PCMSK0 EQU 32 +SREG EQU 63 +SPL EQU 61 +SPMCSR EQU 55 +MCUCR EQU 53 +MCUSR EQU 52 +OSCCAL EQU 49 +CLKPR EQU 38 +GTCCR EQU 35 +GPIOR2 EQU 21 +GPIOR1 EQU 20 +GPIOR0 EQU 19 +PRR EQU 6 diff --git a/resources/data/avr/attiny84.data b/resources/data/avr/attiny84.data new file mode 100644 index 0000000..f146b24 --- /dev/null +++ b/resources/data/avr/attiny84.data @@ -0,0 +1,80 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=20 + +PORTA EQU 27 +DDRA EQU 26 +PINA EQU 25 +PORTB EQU 24 +DDRB EQU 23 +PINB EQU 22 +ADCSRB EQU 3 +ACSR EQU 8 +DIDR0 EQU 1 +ADMUX EQU 7 +ADCSRA EQU 6 +ADCH EQU 5 +ADCL EQU 4 +USIBR EQU 16 +USIDR EQU 15 +USISR EQU 14 +USICR EQU 13 +MCUCR EQU 53 +GIMSK EQU 59 +GIFR EQU 58 +PCMSK1 EQU 32 +PCMSK0 EQU 18 +EEARH EQU 31 +EEARL EQU 30 +EEDR EQU 29 +EECR EQU 28 +WDTCSR EQU 33 +TIMSK0 EQU 57 +TIFR0 EQU 56 +TCCR0A EQU 48 +TCCR0B EQU 51 +TCNT0 EQU 50 +OCR0A EQU 54 +OCR0B EQU 60 +GTCCR EQU 35 +TIMSK1 EQU 12 +TIFR1 EQU 11 +TCCR1A EQU 47 +TCCR1B EQU 46 +TCCR1C EQU 34 +TCNT1H EQU 45 +TCNT1L EQU 44 +OCR1AH EQU 43 +OCR1AL EQU 42 +OCR1BH EQU 41 +OCR1BL EQU 40 +ICR1H EQU 37 +ICR1L EQU 36 +SPMCSR EQU 55 +PRR EQU 0 +OSCCAL EQU 49 +CLKPR EQU 38 +SREG EQU 63 +SPH EQU 62 +SPL EQU 61 +MCUSR EQU 52 +GPIOR2 EQU 21 +GPIOR1 EQU 20 +GPIOR0 EQU 19 diff --git a/resources/data/avr/attiny84.package b/resources/data/avr/attiny84.package new file mode 100644 index 0000000..8d96ee8 --- /dev/null +++ b/resources/data/avr/attiny84.package @@ -0,0 +1,41 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/avr/attiny85.data b/resources/data/avr/attiny85.data new file mode 100644 index 0000000..91c13e8 --- /dev/null +++ b/resources/data/avr/attiny85.data @@ -0,0 +1,77 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +MaxMHz=16 + +PORTB EQU 24 +DDRB EQU 23 +PINB EQU 22 +TIMSK EQU 57 +TIFR EQU 56 +OCR0B EQU 60 +OCR0A EQU 54 +TCCR0A EQU 48 +TCNT0 EQU 50 +TCCR0B EQU 51 +TCCR1A EQU 47 +TCCR1B EQU 46 +TCCR1C EQU 34 +TCNT1H EQU 45 +TCNT1L EQU 44 +OCR1AH EQU 43 +OCR1AL EQU 42 +OCR1BH EQU 41 +OCR1BL EQU 40 +ICR1H EQU 37 +ICR1L EQU 36 +WDTCR EQU 33 +GIMSK EQU 59 +EIFR EQU 58 +UDR EQU 12 +UCSRA EQU 11 +UCSRB EQU 10 +UCSRC EQU 3 +UBRRH EQU 2 +UBRRL EQU 9 +ACSR EQU 8 +DIDR EQU 1 +PORTD EQU 18 +DDRD EQU 17 +PIND EQU 16 +EEAR EQU 30 +EEDR EQU 29 +EECR EQU 28 +PORTA EQU 27 +DDRA EQU 26 +PINA EQU 25 +SREG EQU 63 +SPL EQU 61 +SPMCSR EQU 55 +MCUCR EQU 53 +MCUSR EQU 52 +OSCCAL EQU 49 +CLKPR EQU 38 +GTCCR EQU 35 +PCMSK EQU 32 +GPIOR2 EQU 21 +GPIOR1 EQU 20 +GPIOR0 EQU 19 +USIDR EQU 15 +USISR EQU 14 +USICR EQU 13 diff --git a/resources/data/avr/attiny85.package b/resources/data/avr/attiny85.package new file mode 100644 index 0000000..a2cee4b --- /dev/null +++ b/resources/data/avr/attiny85.package @@ -0,0 +1,35 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/avrs.xml b/resources/data/avrs.xml new file mode 100644 index 0000000..70417d1 --- /dev/null +++ b/resources/data/avrs.xml @@ -0,0 +1,66 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/codeeditor/sintax/avrasm.sintax b/resources/data/codeeditor/sintax/avrasm.sintax new file mode 100644 index 0000000..b71749e --- /dev/null +++ b/resources/data/codeeditor/sintax/avrasm.sintax @@ -0,0 +1,63 @@ + ########################################################################### + # Copyright (C) 2012 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +############## MUST BE DEFINED in ORDER: ######################### +# +# keywords: list of keyword types +# +# keyword-style: foregroundColor backgroundColor bold italic +# Keyword: in a single line +# +############## AVAILABLE OPTIONS: ################################ +# +# Colors: { default | #XXXXXX } +# Bold: { true | false } +# Italic: { true | false } +# +# RegExp: must be quotated, example: "#[a-zA-Z]+\b" +# +##################################################################### + + +keywords: directives instructions number preprocessor lineComment htmlTag quotation + + +directives-style: #326432 default true false +directives: "\.[byte|cseg|db|def|device|dseg|dw|endmacro|equ|eseg|exit|include|list|listmac|macro|nolist|org|set]+[^\\b]" + +instructions-style: #141446 default true false +instructions: add adc adiw sub subi sbc sbci sbiw and andi or ori eor com neg sbr cbr inc dec tst clr ser mul rjmp ijmp jmp rcall icall call ret reti cpse cp cpc cpi sbrc sbrs sbic sbis brbs brbc breq brne brcs brcc brsh brlo brmi brpl brge brlt brhs brhc brts brtc brvs brvc brie brid mov movw ldi lds ld ldd sts st std lpm in out push pop lsl lsr rol ror asr swap bset bclr sbi cbi bst bld sec clc sen cln sez clz sei cli ses cls sev clv set clt seh clh nop sleep wdr + +preprocessor-style: #414164 default true false +preprocessor: "#+[^\n]*" + +number-style: #3030B8 default false false +number: "\b[0-9]+\b" + +htmlTag-style: #303078 default false false +htmlTag: "<.*>" + +quotation-style: #407055 default false false +quotation: "\"(\\.|[^\"])*\"" + +lineComment-style: #646464 default false true +lineComment: ";[^\n]*" + + + diff --git a/resources/data/codeeditor/sintax/cpp.sintax b/resources/data/codeeditor/sintax/cpp.sintax new file mode 100644 index 0000000..bafee25 --- /dev/null +++ b/resources/data/codeeditor/sintax/cpp.sintax @@ -0,0 +1,66 @@ + ########################################################################### + # Copyright (C) 2012 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +############## MUST BE DEFINED in ORDER: ######################### +# +# keywords: list of keyword types +# +# keyword-style: foregroundColor backgroundColor bold italic +# Keyword: in a single line +# +############## AVAILABLE OPTIONS: ################################ +# +# Colors: { default | #XXXXXX } +# Bold: { true | false } +# Italic: { true | false } +# +# RegExp: must be quotated, example: "#[a-zA-Z]+\b" +# +##################################################################### + + +keywords: data keyword1 keyword2 number preprocessor lineComment multiLineComment htmlTag quotation function + + +data-style: #500030 default true false +data: byte double float int uint long short signed char const enum static struct union unsigned virtual void volatile bool + +keyword1-style: #202060 default true false +keyword1: class explicit friend inline namespace operator private protected public signals slots template typedef typename + +keyword2-style: #300050 default true false +keyword2: for if else while continue break switch case return true false this new delete + +preprocessor-style: #414164 default true false +preprocessor: "#[define|endif|ifdef|ifndef|include]+[^\n]*" + +number-style: #3030B8 default false false +number: "\b[0-9]+\b" + +htmlTag-style: #303078 default false false +htmlTag: "<.*>" + +quotation-style: #205010 default false false +quotation: "\"(\\.|[^\"])*\"" + +lineComment-style: #646464 default false true +lineComment: "//[^\n]*" + +function-style: #202030 default false true +function: "\\b[A-Za-z0-9_]+(?=\\()" diff --git a/resources/data/codeeditor/sintax/gcbasic.sintax b/resources/data/codeeditor/sintax/gcbasic.sintax new file mode 100644 index 0000000..5c9555f --- /dev/null +++ b/resources/data/codeeditor/sintax/gcbasic.sintax @@ -0,0 +1,65 @@ + ########################################################################### + # Copyright (C) 2012 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +############## MUST BE DEFINED in ORDER: ######################### +# +# keywords: list of keyword types +# +# keyword-style: foregroundColor backgroundColor bold italic +# Keyword: in a single line +# +############## AVAILABLE OPTIONS: ################################ +# +# Colors: { default | #XXXXXX } +# Bold: { true | false } +# Italic: { true | false } +# +# RegExp: must be quotated, example: "#[a-zA-Z]+\b" +# +##################################################################### + + +keywords: modifiers keyword1 number preprocessor lineComment2 lineComment htmlTag quotation + + +modifiers-style: #326432 default true false +modifiers: bit byte word integer array string optional off on out in right left simple ms s sec us + +keyword1-style: #141446 default true false +keyword1: and as call case const dim dir do else end exit for function goto gosub if interrupt intoff inton loop macro next not or return peek poke pulseout readtable repeat rotate set select step stop sub then to until wait when while xor + +preprocessor-style: #414164 default true false +preprocessor: "#[chip|config|define|endif|ifdef|ifndef|include|mem|script|startup]+[^\n]*" + +number-style: #3030B8 default false false +number: "\b[0-9]+\b" + +htmlTag-style: #303078 default false false +htmlTag: "<.*>" + +quotation-style: #505050 default false false +quotation: "\"(\\.|[^\"])*\"" + +lineComment-style: #646464 default false true +lineComment: "'[^\n]*" + +lineComment2-style: #646464 default false true +lineComment2: ";[^\n]*" + + diff --git a/resources/data/codeeditor/sintax/makef.sintax b/resources/data/codeeditor/sintax/makef.sintax new file mode 100644 index 0000000..9880990 --- /dev/null +++ b/resources/data/codeeditor/sintax/makef.sintax @@ -0,0 +1,53 @@ + ########################################################################### + # Copyright (C) 2012 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +############## MUST BE DEFINED in ORDER: ######################### +# +# keywords: list of keyword types +# +# keyword-style: foregroundColor backgroundColor bold italic +# Keyword: in a single line +# +############## AVAILABLE OPTIONS: ################################ +# +# Colors: { default | #XXXXXX } +# Bold: { true | false } +# Italic: { true | false } +# +# RegExp: must be quotated, example: "#[a-zA-Z]+\b" +# +##################################################################### + + +keywords: directives number target quotation lineComment + +directives-style: #505080 default true false +directives: endif ifeq include + +number-style: #3030B8 default false false +number: "\b[0-9]+\b" + +target-style: #151570 default true true +target: "(?!.*:=).*:" + +quotation-style: #205010 default false false +quotation: "\"(\\.|[^\"])*\"" + +lineComment-style: #646464 default false true +lineComment: "#[^\n]*" diff --git a/resources/data/codeeditor/sintax/pic14asm.sintax b/resources/data/codeeditor/sintax/pic14asm.sintax new file mode 100644 index 0000000..a07662e --- /dev/null +++ b/resources/data/codeeditor/sintax/pic14asm.sintax @@ -0,0 +1,63 @@ + ########################################################################### + # Copyright (C) 2012 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +############## MUST BE DEFINED in ORDER: ######################### +# +# keywords: list of keyword types +# +# keyword-style: foregroundColor backgroundColor bold italic +# Keyword: in a single line +# +############## AVAILABLE OPTIONS: ################################ +# +# Colors: { default | #XXXXXX } +# Bold: { true | false } +# Italic: { true | false } +# +# RegExp: must be quotated, example: "#[a-zA-Z]+\b" +# +##################################################################### + + +keywords: directives keyword1 number preprocessor lineComment htmlTag quotation + + +directives-style: #326432 default true false +directives: __badram __config __idlocs __maxram bankisel banksel cblock code cblock constant da data db de dt dw endm endc endw equ error errorlevel extern exitm expand fill global idata list local macro messg noexpand nolist org page processor pagesel radix res set space subtitle title udata udata_acs udata_ovr udata_shr variable end + +keyword1-style: #141446 default true false +keyword1: addlw addwf andlw andwf bcf bov bsf btfsc btg btfss call clrf clrw clrwdt comf decf decfsz goto incf incfsz iorlw iorwf movf movlw movwf nop reset retfie retlw return rlf rrf sleep sublw subwf swapf xorlw xorwf + +preprocessor-style: #414164 default true false +preprocessor: "#+[^\n]*" + +number-style: #3030B8 default false false +number: "\b[0-9]+\b" + +htmlTag-style: #303078 default false false +htmlTag: "<.*>" + +quotation-style: #505050 default false false +quotation: "\"(\\.|[^\"])*\"" + +lineComment-style: #646464 default false true +lineComment: ";[^\n]*" + + + diff --git a/resources/data/codeeditor/sintax/xml.sintax b/resources/data/codeeditor/sintax/xml.sintax new file mode 100644 index 0000000..965e524 --- /dev/null +++ b/resources/data/codeeditor/sintax/xml.sintax @@ -0,0 +1,54 @@ + ########################################################################### + # Copyright (C) 2018 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +############## MUST BE DEFINED in ORDER: ######################### +# +# keywords: list of keyword types +# +# keyword-style: foregroundColor backgroundColor bold italic +# Keyword: in a single line +# +############## AVAILABLE OPTIONS: ################################ +# +# Colors: { default | #XXXXXX } +# Bold: { true | false } +# Italic: { true | false } +# +# RegExp: must be quotated, example: "#[a-zA-Z]+\b" +# +##################################################################### + + +keywords: elEnd elName element comment quotation + +elEnd-style: #101080 default true false +elEnd: ">" + +elName-style: #801010 default true false +elName: "\b[A-Za-z0-9_]+[ *](?=\=)" + +element-style: #101080 default true false +element: "<[/!A-Za-z0-9_]+\b" + +quotation-style: #108010 default false false +quotation: "\"(\\.|[^\"])*\"" + +comment-style: #505050 default false false +comment: "" + diff --git a/resources/data/codeeditor/tools/avra/1200def.inc b/resources/data/codeeditor/tools/avra/1200def.inc new file mode 100644 index 0000000..d79b582 --- /dev/null +++ b/resources/data/codeeditor/tools/avra/1200def.inc @@ -0,0 +1,297 @@ +;***** THIS IS A MACHINE GENERATED FILE - DO NOT EDIT ******************** +;***** Created: 2005-01-11 10:30 ******* Source: AT90S1200.xml *********** +;************************************************************************* +;* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y +;* +;* Number : AVR000 +;* File Name : "1200def.inc" +;* Title : Register/Bit Definitions for the AT90S1200 +;* Date : 2005-01-11 +;* Version : 2.14 +;* Support E-mail : avr@atmel.com +;* Target MCU : AT90S1200 +;* +;* DESCRIPTION +;* When including this file in the assembly program file, all I/O register +;* names and I/O register bit names appearing in the data book can be used. +;* In addition, the six registers forming the three data pointers X, Y and +;* Z have been assigned names XL - ZH. Highest RAM address for Internal +;* SRAM is also defined +;* +;* The Register names are represented by their hexadecimal address. +;* +;* The Register Bit names are represented by their bit number (0-7). +;* +;* Please observe the difference in using the bit names with instructions +;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc" +;* (skip if bit in register set/cleared). The following example illustrates +;* this: +;* +;* in r16,PORTB ;read PORTB latch +;* sbr r16,(1<. +; +; +; Based on ATtiny4/5/9/10 Datasheet 8127F-AVR-02/2013. +; + +.device ATtiny10 + +.equ SIGNATURE_000 = 0x1e +.equ SIGNATURE_001 = 0x90 +.equ SIGNATURE_002 = 0x03 + +; Port B Input Pins +.equ PINB = 0x00 +.equ PINB0 = 0 +.equ PINB1 = 1 +.equ PINB2 = 2 +.equ PINB3 = 3 + +; Port B Data Direction Register +.equ DDRB = 0x01 +.equ DDRB0 = 0 +.equ DDB0 = 0 +.equ DDRB1 = 1 +.equ DDB1 = 1 +.equ DDRB2 = 2 +.equ DDB2 = 2 +.equ DDRB3 = 3 +.equ DDB3 = 3 + +; Port B Data Register +.equ PORTB = 0x02 +.equ PORTB0 = 0 +.equ PB0 = 0 +.equ PORTB1 = 1 +.equ PB1 = 1 +.equ PORTB2 = 2 +.equ PB2 = 2 +.equ PORTB3 = 3 +.equ PB3 = 3 + +; Port B Pull-up Enable Control Register +.equ PUEB = 0x03 +.equ PUEB0 = 0 +.equ PUEB1 = 1 +.equ PUEB2 = 2 +.equ PUEB3 = 3 + +; Port Control Register +.equ PORTCR = 0x0c +.equ BBMB = 1 + +; Pin Change Mask Register +.equ PCMSK = 0x10 +.equ PCINT0 = 0 +.equ PCINT1 = 1 +.equ PCINT2 = 2 +.equ PCINT3 = 3 + +; Pin Change Interrupt Flag Register +.equ PCIFR = 0x11 +.equ PCIF0 = 0 + +; Pin Change Interrupt Control Register +.equ PCICR = 0x12 +.equ PCIE0 = 0 + +; External Interrupt Mask Register +.equ EIMSK = 0x13 +.equ INT0 = 0 + +; External Interrupt Flag Register +.equ EIFR = 0x14 +.equ INTF0 = 0 + +; External Interrupt Control Register A +.equ EICRA = 0x15 +.equ ISC00 = 0 +.equ ISC01 = 1 + +; Digital Input Disable Register 0 +.equ DIDR0 = 0x17 +.equ ADC0D = 0 +.equ AIN0D = 0 +.equ ADC1D = 1 +.equ AIN1D = 1 +.equ ADC2D = 2 +.equ ADC3D = 3 + +; ADC Data Register +.equ ADCL = 0x19 +.equ ADC0 = 0 +.equ ADC1 = 1 +.equ ADC2 = 2 +.equ ADC3 = 3 +.equ ADC4 = 4 +.equ ADC5 = 5 +.equ ADC6 = 6 +.equ ADC7 = 7 + +; ADC Multiplexer Selection Register +.equ ADMUX = 0x1b +.equ MUX0 = 0 +.equ MUX1 = 1 + +; ADC Control and Status Register B +.equ ADCSRB = 0x1c +.equ ADTS0 = 0 +.equ ADTS1 = 1 +.equ ADTS2 = 2 + +; ADC Control and Status Register A +.equ ADCSRA = 0x1d +.equ ADPS0 = 0 +.equ ADPS1 = 1 +.equ ADPS2 = 2 +.equ ADIE = 3 +.equ ADIF = 4 +.equ ADATE = 5 +.equ ADSC = 6 +.equ ADEN = 7 + +; Analog Comparator Control and Status Register +.equ ACSR = 0x1f +.equ ACIS0 = 0 +.equ ACIS1 = 1 +.equ ACIC = 2 +.equ ACIE = 3 +.equ ACI = 4 +.equ ACO = 5 +.equ ACD = 7 + +; Input Capture Register 0 +.equ ICR0L = 0x22 +.equ ICR0H = 0x23 + +; Output Compare Register 0 B +.equ OCR0BL = 0x24 +.equ OCR0BH = 0x25 + +; Output Compare Register 0 A +.equ OCR0AL = 0x26 +.equ OCR0AH = 0x27 + +; Timer/Counter0 +.equ TCNT0L = 0x28 +.equ TCNT0H = 0x29 + +; Timer/Counter Interrupt Flag Register 0 +.equ TIFR0 = 0x2a +.equ TOV0 = 0 +.equ OCF0A = 1 +.equ OCF0B = 2 +.equ ICF0 = 5 + +; Timer/Counter Interrupt Mask Register 0 +.equ TIMSK0 = 0x2b +.equ TOIE0 = 0 +.equ OCIE0A = 1 +.equ OCIE0B = 2 +.equ ICIE0 = 5 + +; Timer/Counter0 Control Register C +.equ TCCR0C = 0x2c +.equ FOC0B = 6 +.equ FOC0A = 7 + +; Timer/Counter0 Control Register B +.equ TCCR0B = 0x2d +.equ CS00 = 0 +.equ CS01 = 1 +.equ CS02 = 2 +.equ WGM02 = 3 +.equ WGM03 = 4 +.equ ICES0 = 6 +.equ ICNC0 = 7 + +; Timer/Counter0 Control Register A +.equ TCCR0A = 0x2e +.equ WGM00 = 0 +.equ WGM01 = 1 +.equ COM0B0 = 4 +.equ COM0B1 = 5 +.equ COM0A0 = 6 +.equ COM0A1 = 7 + +; General Timer/Counter Control Register +.equ GTCCR = 0x2f +.equ PSR = 0 +.equ TSM = 7 + +; Watchdog Timer Control and Status Register +.equ WDTCSR = 0x31 +.equ WDP0 = 0 +.equ WDP1 = 1 +.equ WDP2 = 2 +.equ WDE = 3 +.equ WDP3 = 5 +.equ WDIE = 6 +.equ WDIF = 7 + +; Non-Volatile Memory Control and Status Register +.equ NVMCSR = 0x32 +.equ NVMBSY = 7 + +; Non-Volatile Memory Command Register +.equ NVMCMD = 0x33 +.equ NVMCMD0 = 0 +.equ NVMCMD1 = 1 +.equ NVMCMD2 = 2 +.equ NVMCMD3 = 3 +.equ NVMCMD4 = 4 +.equ NVMCMD5 = 5 + +; Vcc Level Monitoring Control and Status Register +.equ VLMCSR = 0x34 +.equ VLM0 = 0 +.equ VLM1 = 1 +.equ VLM2 = 2 +.equ VLMIE = 6 +.equ VLMF = 7 + +; Power Reduction Register +.equ PRR = 0x35 +.equ PRTIM0 = 0 +.equ PRADC = 1 + +; Clock Prescale Register +.equ CLKPSR = 0x36 +.equ CLKPS0 = 0 +.equ CLKPS1 = 1 +.equ CLKPS2 = 2 +.equ CLKPS3 = 3 + +; Clock Main Settings Register +.equ CLKMSR = 0x37 +.equ CLKMS0 = 0 +.equ CLKMS1 = 1 + +; Oscillator Calibration Register +.equ OSCCAL = 0x39 +.equ CAL0 = 0 +.equ CAL1 = 1 +.equ CAL2 = 2 +.equ CAL3 = 3 +.equ CAL4 = 4 +.equ CAL5 = 5 +.equ CAL6 = 6 +.equ CAL7 = 7 + +; Sleep Mode Control Register +.equ SMCR = 0x3a +.equ SE = 0 +.equ SM0 = 1 +.equ SM1 = 2 +.equ SM2 = 3 + +; Reset Flag Register +.equ RSTFLR = 0x3b +.equ PORF = 0 +.equ EXTRF = 1 +.equ WDRF = 3 + +; Configuration Change Protection Register +.equ CCP = 0x3c +.equ CCP0 = 0 +.equ CCP1 = 1 +.equ CCP2 = 2 +.equ CCP3 = 3 +.equ CCP4 = 4 +.equ CCP5 = 5 +.equ CCP6 = 6 +.equ CCP7 = 7 + +; Stack Pointer Register +.equ SPL = 0x3d +.equ SPH = 0x3e + +; Status Register +.equ SREG = 0x3f +.equ SREG_C = 0 +.equ SREG_Z = 1 +.equ SREG_N = 2 +.equ SREG_V = 3 +.equ SREG_S = 4 +.equ SREG_H = 5 +.equ SREG_T = 6 +.equ SREG_I = 7 + +; Indirect address registers +.def XL = r26 +.def XH = r27 +.def YL = r28 +.def YH = r29 +.def ZL = r30 +.def ZH = r31 + +; Non-Volatile Memory Lock Bits +.equ MAPPED_LOCKBITS_0 = 0x3f00 +.equ NVLB1 = 0 +.equ LB1 = 0 +.equ NVLB2 = 1 +.equ LB2 = 1 + +; Flash Memory +.equ PAGESIZE = 16 +.equ FLASHEND = 0x01ff +.equ MAPPED_FLASH_START = 0x4000 +.equ MAPPED_FLASH_SIZE = 0x0400 +.equ MAPPED_FLASH_END = 0x43ff + +; RAM Memory +.equ IOEND = 0x003f +.equ RAMEND = 0x005f +.equ SRAM_START = 0x0040 +.equ SRAM_SIZE = 32 + +; Configuration +.equ MAPPED_CONFIG_0 = 0x3f40 +.equ RSTDISBL = 0 +.equ WDTON = 1 +.equ CKOUT = 2 + +; Calibration +.equ MAPPED_CALIB_0 = 0x3f80 + +; Signature +.equ MAPPED_SIGN_0 = 0x3fc0 +.equ MAPPED_SIGN_1 = 0x3fc1 +.equ MAPPED_SIGN_2 = 0x3fc2 + +; Interrupt Vectors +.equ INT_VECTORS_SIZE = 11 +.equ INT0addr = 0x0001 +.equ PCI0addr = 0x0002 +.equ ICP0addr = 0x0003 +.equ OVF0addr = 0x0004 +.equ OC0Aaddr = 0x0005 +.equ OC0Baddr = 0x0006 +.equ ACIaddr = 0x0007 +.equ WDTaddr = 0x0008 +.equ VLMaddr = 0x0009 +.equ ADCCaddr = 0x000a + diff --git a/resources/data/codeeditor/tools/avra/tn11def.inc b/resources/data/codeeditor/tools/avra/tn11def.inc new file mode 100644 index 0000000..1c7cb83 --- /dev/null +++ b/resources/data/codeeditor/tools/avra/tn11def.inc @@ -0,0 +1,233 @@ +;***** THIS IS A MACHINE GENERATED FILE - DO NOT EDIT ******************** +;***** Created: 2005-01-11 10:31 ******* Source: ATtiny11.xml ************ +;************************************************************************* +;* A P P L I C A T I O N N O T E F O R T H E A V R F A M I L Y +;* +;* Number : AVR000 +;* File Name : "tn11def.inc" +;* Title : Register/Bit Definitions for the ATtiny11 +;* Date : 2005-01-11 +;* Version : 2.14 +;* Support E-mail : avr@atmel.com +;* Target MCU : ATtiny11 +;* +;* DESCRIPTION +;* When including this file in the assembly program file, all I/O register +;* names and I/O register bit names appearing in the data book can be used. +;* In addition, the six registers forming the three data pointers X, Y and +;* Z have been assigned names XL - ZH. Highest RAM address for Internal +;* SRAM is also defined +;* +;* The Register names are represented by their hexadecimal address. +;* +;* The Register Bit names are represented by their bit number (0-7). +;* +;* Please observe the difference in using the bit names with instructions +;* such as "sbr"/"cbr" (set/clear bit in register) and "sbrs"/"sbrc" +;* (skip if bit in register set/cleared). The following example illustrates +;* this: +;* +;* in r16,PORTB ;read PORTB latch +;* sbr r16,(1<. +; +; +; Based on ATtiny4/5/9/10 Datasheet 8127F-AVR-02/2013. +; + +.device ATtiny4 + +.equ SIGNATURE_000 = 0x1e +.equ SIGNATURE_001 = 0x8f +.equ SIGNATURE_002 = 0x0a + +; Port B Input Pins +.equ PINB = 0x00 +.equ PINB0 = 0 +.equ PINB1 = 1 +.equ PINB2 = 2 +.equ PINB3 = 3 + +; Port B Data Direction Register +.equ DDRB = 0x01 +.equ DDRB0 = 0 +.equ DDB0 = 0 +.equ DDRB1 = 1 +.equ DDB1 = 1 +.equ DDRB2 = 2 +.equ DDB2 = 2 +.equ DDRB3 = 3 +.equ DDB3 = 3 + +; Port B Data Register +.equ PORTB = 0x02 +.equ PORTB0 = 0 +.equ PB0 = 0 +.equ PORTB1 = 1 +.equ PB1 = 1 +.equ PORTB2 = 2 +.equ PB2 = 2 +.equ PORTB3 = 3 +.equ PB3 = 3 + +; Port B Pull-up Enable Control Register +.equ PUEB = 0x03 +.equ PUEB0 = 0 +.equ PUEB1 = 1 +.equ PUEB2 = 2 +.equ PUEB3 = 3 + +; Port Control Register +.equ PORTCR = 0x0c +.equ BBMB = 1 + +; Pin Change Mask Register +.equ PCMSK = 0x10 +.equ PCINT0 = 0 +.equ PCINT1 = 1 +.equ PCINT2 = 2 +.equ PCINT3 = 3 + +; Pin Change Interrupt Flag Register +.equ PCIFR = 0x11 +.equ PCIF0 = 0 + +; Pin Change Interrupt Control Register +.equ PCICR = 0x12 +.equ PCIE0 = 0 + +; External Interrupt Mask Register +.equ EIMSK = 0x13 +.equ INT0 = 0 + +; External Interrupt Flag Register +.equ EIFR = 0x14 +.equ INTF0 = 0 + +; External Interrupt Control Register A +.equ EICRA = 0x15 +.equ ISC00 = 0 +.equ ISC01 = 1 + +; Digital Input Disable Register 0 +.equ DIDR0 = 0x17 +.equ AIN0D = 0 +.equ AIN1D = 1 + +; Analog Comparator Control and Status Register +.equ ACSR = 0x1f +.equ ACIS0 = 0 +.equ ACIS1 = 1 +.equ ACIC = 2 +.equ ACIE = 3 +.equ ACI = 4 +.equ ACO = 5 +.equ ACD = 7 + +; Input Capture Register 0 +.equ ICR0L = 0x22 +.equ ICR0H = 0x23 + +; Output Compare Register 0 B +.equ OCR0BL = 0x24 +.equ OCR0BH = 0x25 + +; Output Compare Register 0 A +.equ OCR0AL = 0x26 +.equ OCR0AH = 0x27 + +; Timer/Counter0 +.equ TCNT0L = 0x28 +.equ TCNT0H = 0x29 + +; Timer/Counter Interrupt Flag Register 0 +.equ TIFR0 = 0x2a +.equ TOV0 = 0 +.equ OCF0A = 1 +.equ OCF0B = 2 +.equ ICF0 = 5 + +; Timer/Counter Interrupt Mask Register 0 +.equ TIMSK0 = 0x2b +.equ TOIE0 = 0 +.equ OCIE0A = 1 +.equ OCIE0B = 2 +.equ ICIE0 = 5 + +; Timer/Counter0 Control Register C +.equ TCCR0C = 0x2c +.equ FOC0B = 6 +.equ FOC0A = 7 + +; Timer/Counter0 Control Register B +.equ TCCR0B = 0x2d +.equ CS00 = 0 +.equ CS01 = 1 +.equ CS02 = 2 +.equ WGM02 = 3 +.equ WGM03 = 4 +.equ ICES0 = 6 +.equ ICNC0 = 7 + +; Timer/Counter0 Control Register A +.equ TCCR0A = 0x2e +.equ WGM00 = 0 +.equ WGM01 = 1 +.equ COM0B0 = 4 +.equ COM0B1 = 5 +.equ COM0A0 = 6 +.equ COM0A1 = 7 + +; General Timer/Counter Control Register +.equ GTCCR = 0x2f +.equ PSR = 0 +.equ TSM = 7 + +; Watchdog Timer Control and Status Register +.equ WDTCSR = 0x31 +.equ WDP0 = 0 +.equ WDP1 = 1 +.equ WDP2 = 2 +.equ WDE = 3 +.equ WDP3 = 5 +.equ WDIE = 6 +.equ WDIF = 7 + +; Non-Volatile Memory Control and Status Register +.equ NVMCSR = 0x32 +.equ NVMBSY = 7 + +; Non-Volatile Memory Command Register +.equ NVMCMD = 0x33 +.equ NVMCMD0 = 0 +.equ NVMCMD1 = 1 +.equ NVMCMD2 = 2 +.equ NVMCMD3 = 3 +.equ NVMCMD4 = 4 +.equ NVMCMD5 = 5 + +; Vcc Level Monitoring Control and Status Register +.equ VLMCSR = 0x34 +.equ VLM0 = 0 +.equ VLM1 = 1 +.equ VLM2 = 2 +.equ VLMIE = 6 +.equ VLMF = 7 + +; Power Reduction Register +.equ PRR = 0x35 +.equ PRTIM0 = 0 +.equ PRADC = 1 + +; Clock Prescale Register +.equ CLKPSR = 0x36 +.equ CLKPS0 = 0 +.equ CLKPS1 = 1 +.equ CLKPS2 = 2 +.equ CLKPS3 = 3 + +; Clock Main Settings Register +.equ CLKMSR = 0x37 +.equ CLKMS0 = 0 +.equ CLKMS1 = 1 + +; Oscillator Calibration Register +.equ OSCCAL = 0x39 +.equ CAL0 = 0 +.equ CAL1 = 1 +.equ CAL2 = 2 +.equ CAL3 = 3 +.equ CAL4 = 4 +.equ CAL5 = 5 +.equ CAL6 = 6 +.equ CAL7 = 7 + +; Sleep Mode Control Register +.equ SMCR = 0x3a +.equ SE = 0 +.equ SM0 = 1 +.equ SM1 = 2 +.equ SM2 = 3 + +; Reset Flag Register +.equ RSTFLR = 0x3b +.equ PORF = 0 +.equ EXTRF = 1 +.equ WDRF = 3 + +; Configuration Change Protection Register +.equ CCP = 0x3c +.equ CCP0 = 0 +.equ CCP1 = 1 +.equ CCP2 = 2 +.equ CCP3 = 3 +.equ CCP4 = 4 +.equ CCP5 = 5 +.equ CCP6 = 6 +.equ CCP7 = 7 + +; Stack Pointer Register +.equ SPL = 0x3d +.equ SPH = 0x3e + +; Status Register +.equ SREG = 0x3f +.equ SREG_C = 0 +.equ SREG_Z = 1 +.equ SREG_N = 2 +.equ SREG_V = 3 +.equ SREG_S = 4 +.equ SREG_H = 5 +.equ SREG_T = 6 +.equ SREG_I = 7 + +; Indirect address registers +.def XL = r26 +.def XH = r27 +.def YL = r28 +.def YH = r29 +.def ZL = r30 +.def ZH = r31 + +; Non-Volatile Memory Lock Bits +.equ MAPPED_LOCKBITS_0 = 0x3f00 +.equ NVLB1 = 0 +.equ LB1 = 0 +.equ NVLB2 = 1 +.equ LB2 = 1 + +; Flash Memory +.equ PAGESIZE = 16 +.equ FLASHEND = 0x00ff +.equ MAPPED_FLASH_START = 0x4000 +.equ MAPPED_FLASH_SIZE = 0x0200 +.equ MAPPED_FLASH_END = 0x41ff + +; RAM Memory +.equ IOEND = 0x003f +.equ RAMEND = 0x005f +.equ SRAM_START = 0x0040 +.equ SRAM_SIZE = 32 + +; Configuration +.equ MAPPED_CONFIG_0 = 0x3f40 +.equ RSTDISBL = 0 +.equ WDTON = 1 +.equ CKOUT = 2 + +; Calibration +.equ MAPPED_CALIB_0 = 0x3f80 + +; Signature +.equ MAPPED_SIGN_0 = 0x3fc0 +.equ MAPPED_SIGN_1 = 0x3fc1 +.equ MAPPED_SIGN_2 = 0x3fc2 + +; Interrupt Vectors +.equ INT_VECTORS_SIZE = 10 +.equ INT0addr = 0x0001 +.equ PCI0addr = 0x0002 +.equ ICP0addr = 0x0003 +.equ OVF0addr = 0x0004 +.equ OC0Aaddr = 0x0005 +.equ OC0Baddr = 0x0006 +.equ ACIaddr = 0x0007 +.equ WDTaddr = 0x0008 +.equ VLMaddr = 0x0009 + diff --git a/resources/data/codeeditor/tools/avra/tn5def.inc b/resources/data/codeeditor/tools/avra/tn5def.inc new file mode 100644 index 0000000..4800072 --- /dev/null +++ b/resources/data/codeeditor/tools/avra/tn5def.inc @@ -0,0 +1,358 @@ +; +; Copyright (C) 2013 Milan Kupcevic +; +; You can redistribute and/or modify this file under the +; terms of the GNU General Public License version 2, or +; (at your option) any later version, as published by +; the Free Software Foundation. +; +; This file is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU General Public License for more details. +; +; You should have received a copy of the GNU General Public License +; along with this program. If not, see . +; +; +; Based on ATtiny4/5/9/10 Datasheet 8127F-AVR-02/2013. +; + +.device ATtiny5 + +.equ SIGNATURE_000 = 0x1e +.equ SIGNATURE_001 = 0x8f +.equ SIGNATURE_002 = 0x09 + +; Port B Input Pins +.equ PINB = 0x00 +.equ PINB0 = 0 +.equ PINB1 = 1 +.equ PINB2 = 2 +.equ PINB3 = 3 + +; Port B Data Direction Register +.equ DDRB = 0x01 +.equ DDRB0 = 0 +.equ DDB0 = 0 +.equ DDRB1 = 1 +.equ DDB1 = 1 +.equ DDRB2 = 2 +.equ DDB2 = 2 +.equ DDRB3 = 3 +.equ DDB3 = 3 + +; Port B Data Register +.equ PORTB = 0x02 +.equ PORTB0 = 0 +.equ PB0 = 0 +.equ PORTB1 = 1 +.equ PB1 = 1 +.equ PORTB2 = 2 +.equ PB2 = 2 +.equ PORTB3 = 3 +.equ PB3 = 3 + +; Port B Pull-up Enable Control Register +.equ PUEB = 0x03 +.equ PUEB0 = 0 +.equ PUEB1 = 1 +.equ PUEB2 = 2 +.equ PUEB3 = 3 + +; Port Control Register +.equ PORTCR = 0x0c +.equ BBMB = 1 + +; Pin Change Mask Register +.equ PCMSK = 0x10 +.equ PCINT0 = 0 +.equ PCINT1 = 1 +.equ PCINT2 = 2 +.equ PCINT3 = 3 + +; Pin Change Interrupt Flag Register +.equ PCIFR = 0x11 +.equ PCIF0 = 0 + +; Pin Change Interrupt Control Register +.equ PCICR = 0x12 +.equ PCIE0 = 0 + +; External Interrupt Mask Register +.equ EIMSK = 0x13 +.equ INT0 = 0 + +; External Interrupt Flag Register +.equ EIFR = 0x14 +.equ INTF0 = 0 + +; External Interrupt Control Register A +.equ EICRA = 0x15 +.equ ISC00 = 0 +.equ ISC01 = 1 + +; Digital Input Disable Register 0 +.equ DIDR0 = 0x17 +.equ ADC0D = 0 +.equ AIN0D = 0 +.equ ADC1D = 1 +.equ AIN1D = 1 +.equ ADC2D = 2 +.equ ADC3D = 3 + +; ADC Data Register +.equ ADCL = 0x19 +.equ ADC0 = 0 +.equ ADC1 = 1 +.equ ADC2 = 2 +.equ ADC3 = 3 +.equ ADC4 = 4 +.equ ADC5 = 5 +.equ ADC6 = 6 +.equ ADC7 = 7 + +; ADC Multiplexer Selection Register +.equ ADMUX = 0x1b +.equ MUX0 = 0 +.equ MUX1 = 1 + +; ADC Control and Status Register B +.equ ADCSRB = 0x1c +.equ ADTS0 = 0 +.equ ADTS1 = 1 +.equ ADTS2 = 2 + +; ADC Control and Status Register A +.equ ADCSRA = 0x1d +.equ ADPS0 = 0 +.equ ADPS1 = 1 +.equ ADPS2 = 2 +.equ ADIE = 3 +.equ ADIF = 4 +.equ ADATE = 5 +.equ ADSC = 6 +.equ ADEN = 7 + +; Analog Comparator Control and Status Register +.equ ACSR = 0x1f +.equ ACIS0 = 0 +.equ ACIS1 = 1 +.equ ACIC = 2 +.equ ACIE = 3 +.equ ACI = 4 +.equ ACO = 5 +.equ ACD = 7 + +; Input Capture Register 0 +.equ ICR0L = 0x22 +.equ ICR0H = 0x23 + +; Output Compare Register 0 B +.equ OCR0BL = 0x24 +.equ OCR0BH = 0x25 + +; Output Compare Register 0 A +.equ OCR0AL = 0x26 +.equ OCR0AH = 0x27 + +; Timer/Counter0 +.equ TCNT0L = 0x28 +.equ TCNT0H = 0x29 + +; Timer/Counter Interrupt Flag Register 0 +.equ TIFR0 = 0x2a +.equ TOV0 = 0 +.equ OCF0A = 1 +.equ OCF0B = 2 +.equ ICF0 = 5 + +; Timer/Counter Interrupt Mask Register 0 +.equ TIMSK0 = 0x2b +.equ TOIE0 = 0 +.equ OCIE0A = 1 +.equ OCIE0B = 2 +.equ ICIE0 = 5 + +; Timer/Counter0 Control Register C +.equ TCCR0C = 0x2c +.equ FOC0B = 6 +.equ FOC0A = 7 + +; Timer/Counter0 Control Register B +.equ TCCR0B = 0x2d +.equ CS00 = 0 +.equ CS01 = 1 +.equ CS02 = 2 +.equ WGM02 = 3 +.equ WGM03 = 4 +.equ ICES0 = 6 +.equ ICNC0 = 7 + +; Timer/Counter0 Control Register A +.equ TCCR0A = 0x2e +.equ WGM00 = 0 +.equ WGM01 = 1 +.equ COM0B0 = 4 +.equ COM0B1 = 5 +.equ COM0A0 = 6 +.equ COM0A1 = 7 + +; General Timer/Counter Control Register +.equ GTCCR = 0x2f +.equ PSR = 0 +.equ TSM = 7 + +; Watchdog Timer Control and Status Register +.equ WDTCSR = 0x31 +.equ WDP0 = 0 +.equ WDP1 = 1 +.equ WDP2 = 2 +.equ WDE = 3 +.equ WDP3 = 5 +.equ WDIE = 6 +.equ WDIF = 7 + +; Non-Volatile Memory Control and Status Register +.equ NVMCSR = 0x32 +.equ NVMBSY = 7 + +; Non-Volatile Memory Command Register +.equ NVMCMD = 0x33 +.equ NVMCMD0 = 0 +.equ NVMCMD1 = 1 +.equ NVMCMD2 = 2 +.equ NVMCMD3 = 3 +.equ NVMCMD4 = 4 +.equ NVMCMD5 = 5 + +; Vcc Level Monitoring Control and Status Register +.equ VLMCSR = 0x34 +.equ VLM0 = 0 +.equ VLM1 = 1 +.equ VLM2 = 2 +.equ VLMIE = 6 +.equ VLMF = 7 + +; Power Reduction Register +.equ PRR = 0x35 +.equ PRTIM0 = 0 +.equ PRADC = 1 + +; Clock Prescale Register +.equ CLKPSR = 0x36 +.equ CLKPS0 = 0 +.equ CLKPS1 = 1 +.equ CLKPS2 = 2 +.equ CLKPS3 = 3 + +; Clock Main Settings Register +.equ CLKMSR = 0x37 +.equ CLKMS0 = 0 +.equ CLKMS1 = 1 + +; Oscillator Calibration Register +.equ OSCCAL = 0x39 +.equ CAL0 = 0 +.equ CAL1 = 1 +.equ CAL2 = 2 +.equ CAL3 = 3 +.equ CAL4 = 4 +.equ CAL5 = 5 +.equ CAL6 = 6 +.equ CAL7 = 7 + +; Sleep Mode Control Register +.equ SMCR = 0x3a +.equ SE = 0 +.equ SM0 = 1 +.equ SM1 = 2 +.equ SM2 = 3 + +; Reset Flag Register +.equ RSTFLR = 0x3b +.equ PORF = 0 +.equ EXTRF = 1 +.equ WDRF = 3 + +; Configuration Change Protection Register +.equ CCP = 0x3c +.equ CCP0 = 0 +.equ CCP1 = 1 +.equ CCP2 = 2 +.equ CCP3 = 3 +.equ CCP4 = 4 +.equ CCP5 = 5 +.equ CCP6 = 6 +.equ CCP7 = 7 + +; Stack Pointer Register +.equ SPL = 0x3d +.equ SPH = 0x3e + +; Status Register +.equ SREG = 0x3f +.equ SREG_C = 0 +.equ SREG_Z = 1 +.equ SREG_N = 2 +.equ SREG_V = 3 +.equ SREG_S = 4 +.equ SREG_H = 5 +.equ SREG_T = 6 +.equ SREG_I = 7 + +; Indirect address registers +.def XL = r26 +.def XH = r27 +.def YL = r28 +.def YH = r29 +.def ZL = r30 +.def ZH = r31 + +; Non-Volatile Memory Lock Bits +.equ MAPPED_LOCKBITS_0 = 0x3f00 +.equ NVLB1 = 0 +.equ LB1 = 0 +.equ NVLB2 = 1 +.equ LB2 = 1 + +; Flash Memory +.equ PAGESIZE = 16 +.equ FLASHEND = 0x00ff +.equ MAPPED_FLASH_START = 0x4000 +.equ MAPPED_FLASH_SIZE = 0x0200 +.equ MAPPED_FLASH_END = 0x41ff + +; RAM Memory +.equ IOEND = 0x003f +.equ RAMEND = 0x005f +.equ SRAM_START = 0x0040 +.equ SRAM_SIZE = 32 + +; Configuration +.equ MAPPED_CONFIG_0 = 0x3f40 +.equ RSTDISBL = 0 +.equ WDTON = 1 +.equ CKOUT = 2 + +; Calibration +.equ MAPPED_CALIB_0 = 0x3f80 + +; Signature +.equ MAPPED_SIGN_0 = 0x3fc0 +.equ MAPPED_SIGN_1 = 0x3fc1 +.equ MAPPED_SIGN_2 = 0x3fc2 + +; Interrupt Vectors +.equ INT_VECTORS_SIZE = 11 +.equ INT0addr = 0x0001 +.equ PCI0addr = 0x0002 +.equ ICP0addr = 0x0003 +.equ OVF0addr = 0x0004 +.equ OC0Aaddr = 0x0005 +.equ OC0Baddr = 0x0006 +.equ ACIaddr = 0x0007 +.equ WDTaddr = 0x0008 +.equ VLMaddr = 0x0009 +.equ ADCCaddr = 0x000a + diff --git a/resources/data/codeeditor/tools/avra/tn9def.inc b/resources/data/codeeditor/tools/avra/tn9def.inc new file mode 100644 index 0000000..1d9260a --- /dev/null +++ b/resources/data/codeeditor/tools/avra/tn9def.inc @@ -0,0 +1,320 @@ +; +; Copyright (C) 2013 Milan Kupcevic +; +; You can redistribute and/or modify this file under the +; terms of the GNU General Public License version 2, or +; (at your option) any later version, as published by +; the Free Software Foundation. +; +; This file is distributed in the hope that it will be useful, +; but WITHOUT ANY WARRANTY; without even the implied warranty of +; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +; GNU General Public License for more details. +; +; You should have received a copy of the GNU General Public License +; along with this program. If not, see . +; +; +; Based on ATtiny4/5/9/10 Datasheet 8127F-AVR-02/2013. +; + +.device ATtiny9 + +.equ SIGNATURE_000 = 0x1e +.equ SIGNATURE_001 = 0x90 +.equ SIGNATURE_002 = 0x08 + +; Port B Input Pins +.equ PINB = 0x00 +.equ PINB0 = 0 +.equ PINB1 = 1 +.equ PINB2 = 2 +.equ PINB3 = 3 + +; Port B Data Direction Register +.equ DDRB = 0x01 +.equ DDRB0 = 0 +.equ DDB0 = 0 +.equ DDRB1 = 1 +.equ DDB1 = 1 +.equ DDRB2 = 2 +.equ DDB2 = 2 +.equ DDRB3 = 3 +.equ DDB3 = 3 + +; Port B Data Register +.equ PORTB = 0x02 +.equ PORTB0 = 0 +.equ PB0 = 0 +.equ PORTB1 = 1 +.equ PB1 = 1 +.equ PORTB2 = 2 +.equ PB2 = 2 +.equ PORTB3 = 3 +.equ PB3 = 3 + +; Port B Pull-up Enable Control Register +.equ PUEB = 0x03 +.equ PUEB0 = 0 +.equ PUEB1 = 1 +.equ PUEB2 = 2 +.equ PUEB3 = 3 + +; Port Control Register +.equ PORTCR = 0x0c +.equ BBMB = 1 + +; Pin Change Mask Register +.equ PCMSK = 0x10 +.equ PCINT0 = 0 +.equ PCINT1 = 1 +.equ PCINT2 = 2 +.equ PCINT3 = 3 + +; Pin Change Interrupt Flag Register +.equ PCIFR = 0x11 +.equ PCIF0 = 0 + +; Pin Change Interrupt Control Register +.equ PCICR = 0x12 +.equ PCIE0 = 0 + +; External Interrupt Mask Register +.equ EIMSK = 0x13 +.equ INT0 = 0 + +; External Interrupt Flag Register +.equ EIFR = 0x14 +.equ INTF0 = 0 + +; External Interrupt Control Register A +.equ EICRA = 0x15 +.equ ISC00 = 0 +.equ ISC01 = 1 + +; Digital Input Disable Register 0 +.equ DIDR0 = 0x17 +.equ AIN0D = 0 +.equ AIN1D = 1 + +; Analog Comparator Control and Status Register +.equ ACSR = 0x1f +.equ ACIS0 = 0 +.equ ACIS1 = 1 +.equ ACIC = 2 +.equ ACIE = 3 +.equ ACI = 4 +.equ ACO = 5 +.equ ACD = 7 + +; Input Capture Register 0 +.equ ICR0L = 0x22 +.equ ICR0H = 0x23 + +; Output Compare Register 0 B +.equ OCR0BL = 0x24 +.equ OCR0BH = 0x25 + +; Output Compare Register 0 A +.equ OCR0AL = 0x26 +.equ OCR0AH = 0x27 + +; Timer/Counter0 +.equ TCNT0L = 0x28 +.equ TCNT0H = 0x29 + +; Timer/Counter Interrupt Flag Register 0 +.equ TIFR0 = 0x2a +.equ TOV0 = 0 +.equ OCF0A = 1 +.equ OCF0B = 2 +.equ ICF0 = 5 + +; Timer/Counter Interrupt Mask Register 0 +.equ TIMSK0 = 0x2b +.equ TOIE0 = 0 +.equ OCIE0A = 1 +.equ OCIE0B = 2 +.equ ICIE0 = 5 + +; Timer/Counter0 Control Register C +.equ TCCR0C = 0x2c +.equ FOC0B = 6 +.equ FOC0A = 7 + +; Timer/Counter0 Control Register B +.equ TCCR0B = 0x2d +.equ CS00 = 0 +.equ CS01 = 1 +.equ CS02 = 2 +.equ WGM02 = 3 +.equ WGM03 = 4 +.equ ICES0 = 6 +.equ ICNC0 = 7 + +; Timer/Counter0 Control Register A +.equ TCCR0A = 0x2e +.equ WGM00 = 0 +.equ WGM01 = 1 +.equ COM0B0 = 4 +.equ COM0B1 = 5 +.equ COM0A0 = 6 +.equ COM0A1 = 7 + +; General Timer/Counter Control Register +.equ GTCCR = 0x2f +.equ PSR = 0 +.equ TSM = 7 + +; Watchdog Timer Control and Status Register +.equ WDTCSR = 0x31 +.equ WDP0 = 0 +.equ WDP1 = 1 +.equ WDP2 = 2 +.equ WDE = 3 +.equ WDP3 = 5 +.equ WDIE = 6 +.equ WDIF = 7 + +; Non-Volatile Memory Control and Status Register +.equ NVMCSR = 0x32 +.equ NVMBSY = 7 + +; Non-Volatile Memory Command Register +.equ NVMCMD = 0x33 +.equ NVMCMD0 = 0 +.equ NVMCMD1 = 1 +.equ NVMCMD2 = 2 +.equ NVMCMD3 = 3 +.equ NVMCMD4 = 4 +.equ NVMCMD5 = 5 + +; Vcc Level Monitoring Control and Status Register +.equ VLMCSR = 0x34 +.equ VLM0 = 0 +.equ VLM1 = 1 +.equ VLM2 = 2 +.equ VLMIE = 6 +.equ VLMF = 7 + +; Power Reduction Register +.equ PRR = 0x35 +.equ PRTIM0 = 0 +.equ PRADC = 1 + +; Clock Prescale Register +.equ CLKPSR = 0x36 +.equ CLKPS0 = 0 +.equ CLKPS1 = 1 +.equ CLKPS2 = 2 +.equ CLKPS3 = 3 + +; Clock Main Settings Register +.equ CLKMSR = 0x37 +.equ CLKMS0 = 0 +.equ CLKMS1 = 1 + +; Oscillator Calibration Register +.equ OSCCAL = 0x39 +.equ CAL0 = 0 +.equ CAL1 = 1 +.equ CAL2 = 2 +.equ CAL3 = 3 +.equ CAL4 = 4 +.equ CAL5 = 5 +.equ CAL6 = 6 +.equ CAL7 = 7 + +; Sleep Mode Control Register +.equ SMCR = 0x3a +.equ SE = 0 +.equ SM0 = 1 +.equ SM1 = 2 +.equ SM2 = 3 + +; Reset Flag Register +.equ RSTFLR = 0x3b +.equ PORF = 0 +.equ EXTRF = 1 +.equ WDRF = 3 + +; Configuration Change Protection Register +.equ CCP = 0x3c +.equ CCP0 = 0 +.equ CCP1 = 1 +.equ CCP2 = 2 +.equ CCP3 = 3 +.equ CCP4 = 4 +.equ CCP5 = 5 +.equ CCP6 = 6 +.equ CCP7 = 7 + +; Stack Pointer Register +.equ SPL = 0x3d +.equ SPH = 0x3e + +; Status Register +.equ SREG = 0x3f +.equ SREG_C = 0 +.equ SREG_Z = 1 +.equ SREG_N = 2 +.equ SREG_V = 3 +.equ SREG_S = 4 +.equ SREG_H = 5 +.equ SREG_T = 6 +.equ SREG_I = 7 + +; Indirect address registers +.def XL = r26 +.def XH = r27 +.def YL = r28 +.def YH = r29 +.def ZL = r30 +.def ZH = r31 + +; Non-Volatile Memory Lock Bits +.equ MAPPED_LOCKBITS_0 = 0x3f00 +.equ NVLB1 = 0 +.equ LB1 = 0 +.equ NVLB2 = 1 +.equ LB2 = 1 + +; Flash Memory +.equ PAGESIZE = 16 +.equ FLASHEND = 0x01ff +.equ MAPPED_FLASH_START = 0x4000 +.equ MAPPED_FLASH_SIZE = 0x0400 +.equ MAPPED_FLASH_END = 0x43ff + +; RAM Memory +.equ IOEND = 0x003f +.equ RAMEND = 0x005f +.equ SRAM_START = 0x0040 +.equ SRAM_SIZE = 32 + +; Configuration +.equ MAPPED_CONFIG_0 = 0x3f40 +.equ RSTDISBL = 0 +.equ WDTON = 1 +.equ CKOUT = 2 + +; Calibration +.equ MAPPED_CALIB_0 = 0x3f80 + +; Signature +.equ MAPPED_SIGN_0 = 0x3fc0 +.equ MAPPED_SIGN_1 = 0x3fc1 +.equ MAPPED_SIGN_2 = 0x3fc2 + +; Interrupt Vectors +.equ INT_VECTORS_SIZE = 10 +.equ INT0addr = 0x0001 +.equ PCI0addr = 0x0002 +.equ ICP0addr = 0x0003 +.equ OVF0addr = 0x0004 +.equ OC0Aaddr = 0x0005 +.equ OC0Baddr = 0x0006 +.equ ACIaddr = 0x0007 +.equ WDTaddr = 0x0008 +.equ VLMaddr = 0x0009 + diff --git a/resources/data/help/_es/7-segbcd_es.txt b/resources/data/help/_es/7-segbcd_es.txt new file mode 100644 index 0000000..a4f8415 --- /dev/null +++ b/resources/data/help/_es/7-segbcd_es.txt @@ -0,0 +1,18 @@ +7 segmentos + BCD + +Esto es equivalente a un 7seg normal con un convertidor BCD a 7seg integrado. + +Está en el grupo "Lógica" y tiene 4 pines, correspondientes a un bit en un número binario de 4 bits. + +El bit 0 está en el pin derecho, el bit 3 es el izquierdo. + +Normalmente este se usa en circuitos lógicos con alto> 2,5V y bajo <2,5V. + +Esta pantalla no acepta PWM o multiplexación como la "normal". + +Videos Relacionados: + https://www.youtube.com/watch?v=c7SFryRa5hs + https://www.youtube.com/watch?v=pOOIZnZ2lQ4 + +Mas información: + https://simulide.blogspot.com/p/seven-segment-display.html diff --git a/resources/data/help/_es/74hc00_es.txt b/resources/data/help/_es/74hc00_es.txt new file mode 100644 index 0000000..8256fc0 --- /dev/null +++ b/resources/data/help/_es/74hc00_es.txt @@ -0,0 +1,17 @@ +74HC00 - Quad 2-input NAND gate + +Y = !(A * B) + +A B Y +0 0 1 +1 0 1 +0 1 1 +1 1 0 + +Pines: +A = Entrada x 4 +B = Entrada x 4 +Y = Salida x 4 + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74HC00.simu \ No newline at end of file diff --git a/resources/data/help/_es/74hc02_es.txt b/resources/data/help/_es/74hc02_es.txt new file mode 100644 index 0000000..f0469aa --- /dev/null +++ b/resources/data/help/_es/74hc02_es.txt @@ -0,0 +1,17 @@ +74HC02 - Quad 2-input NOR gate + +Y = !(A + B) + +A B Y +0 0 1 +1 0 0 +0 1 0 +1 1 0 + +Pines: +A = Entrada x 4 +B = Entrada x 4 +Y = Salida x 4 + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74HC02.simu \ No newline at end of file diff --git a/resources/data/help/_es/74hc04_es.txt b/resources/data/help/_es/74hc04_es.txt new file mode 100644 index 0000000..284f74e --- /dev/null +++ b/resources/data/help/_es/74hc04_es.txt @@ -0,0 +1,14 @@ +74HC04 - hex inverter gate + +Y = !A + +A Y +0 1 +1 0 + +Pines: +A = Entrada x 6 +Y = Salida x 6 + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74HC04.simu \ No newline at end of file diff --git a/resources/data/help/_es/74hc08_es.txt b/resources/data/help/_es/74hc08_es.txt new file mode 100644 index 0000000..b5be16b --- /dev/null +++ b/resources/data/help/_es/74hc08_es.txt @@ -0,0 +1,20 @@ +74HC08 - Quad 2-input AND gate + +Y = A * B + +A B Y +0 0 0 +1 0 0 +0 1 0 +1 1 1 + +Pines: +A = Entrada x 4 +B = Entrada x 4 +Y = Salida x 4 + +Mas información: + https://simulide.blogspot.com/p/blog-page_30.html + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74HC08.simu \ No newline at end of file diff --git a/resources/data/help/_es/74hc32_es.txt b/resources/data/help/_es/74hc32_es.txt new file mode 100644 index 0000000..0740ab1 --- /dev/null +++ b/resources/data/help/_es/74hc32_es.txt @@ -0,0 +1,17 @@ +74HC32 - Quad 2-input OR gate + +Y = A + B + +A B Y +0 0 0 +1 0 1 +0 1 1 +1 1 1 + +Pines: +A = Entrada x 4 +B = Entrada x 4 +Y = Salida x 4 + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74HC32.simu \ No newline at end of file diff --git a/resources/data/help/_es/74hc42_es.txt b/resources/data/help/_es/74hc42_es.txt new file mode 100644 index 0000000..137f6dc --- /dev/null +++ b/resources/data/help/_es/74hc42_es.txt @@ -0,0 +1,20 @@ +74HC42 - BCD to decimal decoder + +A0 A1 A2 A3 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Y9 +0 0 0 0 0 1 1 1 1 1 1 1 1 1 +1 0 0 0 1 0 1 1 1 1 1 1 1 1 +0 1 0 0 1 1 0 1 1 1 1 1 1 1 +1 1 0 0 1 1 1 0 1 1 1 1 1 1 +0 0 1 0 1 1 1 1 0 1 1 1 1 1 +1 0 1 0 1 1 1 1 1 0 1 1 1 1 +0 1 1 0 1 1 1 1 1 1 0 1 1 1 +1 1 1 0 1 1 1 1 1 1 1 0 1 1 +0 0 0 1 1 1 1 1 1 1 1 1 0 1 +1 0 0 1 1 1 1 1 1 1 1 1 1 0 + +Pines: +A0..A3 = Entradas +Y0..Y9 = Salida (están negadas) + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74HC42.simu \ No newline at end of file diff --git a/resources/data/help/_es/74hc73_es.txt b/resources/data/help/_es/74hc73_es.txt new file mode 100644 index 0000000..1e74e08 --- /dev/null +++ b/resources/data/help/_es/74hc73_es.txt @@ -0,0 +1,19 @@ +74HC73 - Dual JK flip-flop, asyncrhronous clear + +J K !R Q !Q +0 0 1 No cambian +1 0 1 1 0 +0 1 1 0 1 +1 1 1 Cambian +x x 0 0 1 + +Pines: +J = Entrada +K = Entrada +Q = Salida +!Q = Salida (negada) +!R = Reset (LOW) +!CP = Clock + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74HC73.simu \ No newline at end of file diff --git a/resources/data/help/_es/74hc74_es.txt b/resources/data/help/_es/74hc74_es.txt new file mode 100644 index 0000000..a4aa520 --- /dev/null +++ b/resources/data/help/_es/74hc74_es.txt @@ -0,0 +1,19 @@ +74HC74 - Dual D flip-flop positive edge triggered, asyncrhronous preset and clear + +D !RD!SD Q !Q +0 1 1 0 1 +1 1 1 1 0 +x 0 0 1 1 +x 1 0 1 0 +x 0 1 0 1 + +Pines: +D = Entrada +Q = Salida +!Q = Salida (negada) +!R = Reset (LOW) +!S = Set (LOW) +CP = Clock + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74HC74.simu \ No newline at end of file diff --git a/resources/data/help/_es/74hc75_es.txt b/resources/data/help/_es/74hc75_es.txt new file mode 100644 index 0000000..2ffa97a --- /dev/null +++ b/resources/data/help/_es/74hc75_es.txt @@ -0,0 +1,18 @@ +74XX75 - 4-bit biestable latch, complementary outputs + +D !RD!SD Q !Q +0 1 1 0 1 +1 1 1 1 0 +x 0 0 1 1 +x 1 0 1 0 +x 0 1 0 1 + +Pines: +D0..D3 = Entradas +Q0..Q3 = Salida +!Q0..!Q3 = Salida (negada) +E0-1 = +E2-3 = + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74XX75.simu \ No newline at end of file diff --git a/resources/data/help/_es/74hc76_es.txt b/resources/data/help/_es/74hc76_es.txt new file mode 100644 index 0000000..47cd01c --- /dev/null +++ b/resources/data/help/_es/74hc76_es.txt @@ -0,0 +1,6 @@ +74HC76 - dual JK flip-flop, asynchronous preset an clear + +Pronto... + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74HC76.simu \ No newline at end of file diff --git a/resources/data/help/_es/74hc77_es.txt b/resources/data/help/_es/74hc77_es.txt new file mode 100644 index 0000000..8a30f6b --- /dev/null +++ b/resources/data/help/_es/74hc77_es.txt @@ -0,0 +1,15 @@ +74HC77 - 4-bit biestable latch + +D0 E01 Q0 +x 0 No cambia +0 1 0 +1 1 1 + +Pines: +D0..D3 = Entradas +E01 = Latch de Q0 y Q1 +E23 = Latch de Q2 y Q3 +Q0..Q3 = Salidas + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74HC77.simu \ No newline at end of file diff --git a/resources/data/help/_es/74hc85_es.txt b/resources/data/help/_es/74hc85_es.txt new file mode 100644 index 0000000..28bc0c6 --- /dev/null +++ b/resources/data/help/_es/74hc85_es.txt @@ -0,0 +1,18 @@ +74HC85 - 4-bit magnitude comparator + +Los comparadores son circuitos combinacionales capaces de comparar dos números binarios presentes en sus entradas indicando si son iguales o diferentes; en caso de ser diferentes, indican cuál de las dos es mayor. Tienen tres salidas que indican el resultado de la comparación: A=B, AB. + +Nota: El primer CHIP siempre deberá tener el pin IA=B en 1. + +Números de mayor longitud se pueden comparar mediante la conexión de los comparadores en cascada. + +Existen 3 entradas en cascada (IAB) que sirven para aumentar la capacidad del comparador, es decir para conectar otro comparador en cascada y comparar datos de 8 bits. El primer comparador compara los 4 bits menos significativos (LSB = parte baja del dato) y sus salidas se conectan a la entrada correspondiente del comparador superior, que compara los 4 bits más significativos (MSB = parte alta del dato). Así, si los datos de la parte alta son iguales el comparador de la parte baja informa si ésta es inferior, igual o superior. + +A B AB +0 0 0 1 0 +1 0 0 0 1 +0 1 1 0 0 +1 1 0 1 0 + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74HC85.simu \ No newline at end of file diff --git a/resources/data/help/_es/74hc86_es.txt b/resources/data/help/_es/74hc86_es.txt new file mode 100644 index 0000000..91cf97d --- /dev/null +++ b/resources/data/help/_es/74hc86_es.txt @@ -0,0 +1,15 @@ +74HC86 - Quad 2-input XOR gate + +A B Y +0 0 0 +1 0 1 +0 1 1 +1 1 0 + +Pines: +A = Entrada x 4 +B = Entrada x 4 +Y = Salida x 4 + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74HC86.simu \ No newline at end of file diff --git a/resources/data/help/_es/74xx01_es.txt b/resources/data/help/_es/74xx01_es.txt new file mode 100644 index 0000000..34386f6 --- /dev/null +++ b/resources/data/help/_es/74xx01_es.txt @@ -0,0 +1,15 @@ +74XX01 - Quad 2-input NAND gate, open Drain Outputs + +A B Y +0 0 1 +1 0 1 +0 1 1 +1 1 0 + +Pines: +A = Entrada x 4 +B = Entrada x 4 +Y = Salida x 4 + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74XX01.simu \ No newline at end of file diff --git a/resources/data/help/_es/74xx90_es.txt b/resources/data/help/_es/74xx90_es.txt new file mode 100644 index 0000000..4d878cb --- /dev/null +++ b/resources/data/help/_es/74xx90_es.txt @@ -0,0 +1,35 @@ +74XX90 - decade counter (separate divide-by-2 and divide-by-5 sections) + +Uno de los mas populares contadores. Facil de usar como contador de modulo n o divison entre n. + +Siempre: MS1+MS2 = 0 y CP1 = Q0 +MR1+MR2 = Q1 -----> Contador modulo 2 (0..1) +MR1=Q1+MR2=Q0 ----> Contador modulo 3 (0..2) +MR1+MR2 = Q2 -----> Contador modulo 4 (0..3) +MR1=Q2+MR2=Q0 ----> Contador modulo 5 (0..4) +MR1=Q2+MR2=Q0 ----> Contador modulo 6 (0..5) +MR1=(Q1+Q2)+MR2=Q0 ----> Contador modulo 7 (0..6) Usar AND para MR1 +MR1+MR2 = Q3 -----> Contador modulo 8 (0..7) +MR1=Q3+MR2=Q0 ----> Contador modulo 9 (0..8) +MR1+MR2 = 0 ------> Contador decadico (0..9) + +Divisores: +* Divisor entre 5 --> MS1+MS2+MR1+MR2=GND, salida Q3 +* Divisor entre 6 --> CP1+MS1=Q0, MR1+MR2=GND, salida = Q1=MS2 +* Divisor entre 7 --> CP0=Q0, MS1+MS2=GND, MR2=Q2, salida = Q3 +* Divisor entre 8 --> MS1+MS2=Q3, MR1+MR2=GND, salida = Q2 +* Divisor entre 9 --> CP0+MS1=Q0, MR1+MR2=GND, salida Q3=MS2 +* Divisor entre 10 --> MS1+MS2+MR1+MR2=GND, CP1=Q3, salida = Q0 + +Pines: +CP0 + CP1 = Clock (pin 1+14) +MS1 + MS2 = Set (pin 2+3) +MR1 + MR2 = Reset (pin 6+7) +Q0..Q3 = Salidas (pin 12+9+8+11) + +Vcc = 5 +GND = 10 +No usados = 4+13 + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74XX90.simu \ No newline at end of file diff --git a/resources/data/help/_es/74xx91_es.txt b/resources/data/help/_es/74xx91_es.txt new file mode 100644 index 0000000..d95003f --- /dev/null +++ b/resources/data/help/_es/74xx91_es.txt @@ -0,0 +1,13 @@ +74XX91 - serial-in, serial-out, 8-bit shift register + +Este registro de desplazamiento de 8 bits contiene ocho flip-flops maestro-esclavo RS de entrada y un controlador de reloj. + +A B Q !Q +x 0 0 1 +0 x 0 1 +1 1 1 0 + +Nota: Actua luego de 8 pulsos de reloj + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74XX91.simu \ No newline at end of file diff --git a/resources/data/help/_es/74xx92_es.txt b/resources/data/help/_es/74xx92_es.txt new file mode 100644 index 0000000..be5e4c1 --- /dev/null +++ b/resources/data/help/_es/74xx92_es.txt @@ -0,0 +1,11 @@ +74XX92 - devide-by-12 counter (separate divide-by-2 an divide-by-6 sections) + +Cuenta de 0 a 11 en binario. Contiene cuatro flip-flops maestro-esclavo y compuerta adicional para proporcionar un contador dividido por dos y un contador binario de tres etapas para el cual la duración del ciclo de conteo es dividida por seis. + +MR1 MR2 Q +x 0 Cuenta +0 x Cuenta +1 1 0 + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74XX92.simu \ No newline at end of file diff --git a/resources/data/help/_es/74xx93_es.txt b/resources/data/help/_es/74xx93_es.txt new file mode 100644 index 0000000..d516ef6 --- /dev/null +++ b/resources/data/help/_es/74xx93_es.txt @@ -0,0 +1,11 @@ +74XX93 - 4-bit binary counter (separate divide-by-2 an divide-by-8 sections) + +Cuenta de 0 a 15 en binario. Contiene cuatro flip-flops maestro-esclavo y compuerta adicional para proporcionar un contador dividido por dos y un contador binario de tres etapas para el cual la duración del ciclo de conteo es dividida por ocho. + +MR1 MR2 Q +x 0 Cuenta +0 x Cuenta +1 1 0 + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74XX93.simu \ No newline at end of file diff --git a/resources/data/help/_es/74xx95_es.txt b/resources/data/help/_es/74xx95_es.txt new file mode 100644 index 0000000..fbfd355 --- /dev/null +++ b/resources/data/help/_es/74xx95_es.txt @@ -0,0 +1,6 @@ +74HC95 - 4-bit parallel-access shift register + +Pronto... + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74HC95.simu \ No newline at end of file diff --git a/resources/data/help/_es/74xx96_es.txt b/resources/data/help/_es/74xx96_es.txt new file mode 100644 index 0000000..5f5212a --- /dev/null +++ b/resources/data/help/_es/74xx96_es.txt @@ -0,0 +1,17 @@ +74XX96 - 5-bit parallel-load shift register + +PE A..E QA..QE +0 x 0 +1 dato dato + +A..E = Entradas (2,3,4,6,7) +A1..QE = Salidas (15,14,13,11,10) +SER = Serial (9) +PE = Preset Enable (8) +!CLR = Clear (16) +CLK = Clock (1) +Vcc = 5 +GND = 12 + +Ver help en: + ..share/simulide/data/examples/logic/74_series/Help_74XX96.simu \ No newline at end of file diff --git a/resources/data/help/_es/Inductor_es.txt b/resources/data/help/_es/Inductor_es.txt new file mode 100644 index 0000000..88c7a0b --- /dev/null +++ b/resources/data/help/_es/Inductor_es.txt @@ -0,0 +1,9 @@ +Bobina + +Parámetros: +- Inductancia: + Determina la inductancia: 1 +- Unidades: + Determina las unidades. H +- Mostrar inductancia: + Muestra su valor. true diff --git a/resources/data/help/_es/amperimeter_es.txt b/resources/data/help/_es/amperimeter_es.txt new file mode 100644 index 0000000..b35c865 --- /dev/null +++ b/resources/data/help/_es/amperimeter_es.txt @@ -0,0 +1,14 @@ +Amperímetro: +Mide la corriente entre las puntas de prueba roja y negra. + +- Pin Rojo: Positivo. +- Pin Negro: Negativo. +- Pin Derecha: lectura como voltaje. + +- Se actualiza a 50 Hz. + +Videos Relacionados: + https://youtu.be/1BeTy5DGcDc + +Mas información: + http://simulide.blogspot.com/p/meters.html diff --git a/resources/data/help/_es/andgate_es.txt b/resources/data/help/_es/andgate_es.txt new file mode 100644 index 0000000..3892701 --- /dev/null +++ b/resources/data/help/_es/andgate_es.txt @@ -0,0 +1,18 @@ +Puerta AND + +A B Q +0 0 0 +1 0 0 +0 1 0 +1 1 1 + +Propiedades: +- Volt. Alto Entrada: 2.5 +- Volt. Bajo Entrada: 2.5 +- Impedancia Entrada: 1e+14 +- Volt. Alto Salida: 5 +- Volt. Bajo Entrada: 0 +- Impedancia Salida: 40 +- Invertido: false +- Open Collector: false +- Num. Entradas: 2 \ No newline at end of file diff --git a/resources/data/help/_es/arduino_es.txt b/resources/data/help/_es/arduino_es.txt new file mode 100644 index 0000000..3fc7964 --- /dev/null +++ b/resources/data/help/_es/arduino_es.txt @@ -0,0 +1,4 @@ +Arduino UNO + +Propiedades: +- Mhz: 16 \ No newline at end of file diff --git a/resources/data/help/_es/audioout_es.txt b/resources/data/help/_es/audioout_es.txt new file mode 100644 index 0000000..4d7899d --- /dev/null +++ b/resources/data/help/_es/audioout_es.txt @@ -0,0 +1,7 @@ +Parlante + +Tiene dos pines + y -. + +Parámetros: +- Impedancia: + Determina la impedancia. 8 diff --git a/resources/data/help/_es/bjt_es.txt b/resources/data/help/_es/bjt_es.txt new file mode 100644 index 0000000..3ff2222 --- /dev/null +++ b/resources/data/help/_es/bjt_es.txt @@ -0,0 +1,13 @@ +Transistor de juntura BJT: + +Parámetros: +- Ganancia: + Determina la ganancia. 100 +- PNP:     + Determina si es PNP o NPN. false +- BC diode: + Simula el dio BC o no. false + Con BC Diode, la simulación puede ser más lenta. + +Videos Relacionados: + https://youtu.be/1BeTy5DGcDc diff --git a/resources/data/help/_es/buffer_es.txt b/resources/data/help/_es/buffer_es.txt new file mode 100644 index 0000000..32421de --- /dev/null +++ b/resources/data/help/_es/buffer_es.txt @@ -0,0 +1,12 @@ +Buffer + +Propiedades: +- Volt. Alto Entrada: 2.5 +- Volt. Bajo Entrada: 2.5 +- Impedancia Entrada: 1e+14 +- Volt. Alto Salida: 5 +- Volt. Bajo Entrada: 0 +- Impedancia Salida: 40 +- Invertido: false +- Open Collector: false +- Tri-Estado: false \ No newline at end of file diff --git a/resources/data/help/_es/capacitor_es.txt b/resources/data/help/_es/capacitor_es.txt new file mode 100644 index 0000000..d74a910 --- /dev/null +++ b/resources/data/help/_es/capacitor_es.txt @@ -0,0 +1,9 @@ +Condensador + +Parámetros: +- Capacidad: + Determina la capacidad: 10 +- Unidades: + Determina las unidades. uF +- Show Cap: + Muestra su valor. true diff --git a/resources/data/help/_es/circuit_es.txt b/resources/data/help/_es/circuit_es.txt new file mode 100644 index 0000000..4e37fc9 --- /dev/null +++ b/resources/data/help/_es/circuit_es.txt @@ -0,0 +1,34 @@ +Circuito: + +Parámetros: + +- Velocidad: + Velocidad de simulación en pasos por segundo. 1000000 + +- Paso React.: + Simula componentes Reactivos cada pasos de simulación. 50 + +- Paso No Lin.: + Simula componentes No Lineales cada pasos de simulación. 10 + +- Precisión No Lin.: + Precisión en componentes No Lineales, mayor = mas preciso. 5 + +- Mostrar Rejilla: + true + +- Mostrar Scrollbar: + false + +- Anímate: + Cables en Rojo cuando Volts>2.5, Azul en caso contrario. false + +- Font Scale: + Escala el tamaño de fuentes, por ejemplo 1,5 = 150%. 1 + +- Auto Backup Secs: + Intervalo de tiempo para chequeo de backup, si hay cambios se guarda backup de circuito. + Ajustando a 0 desabilita Auto-Backup. 15 + +Mas Información: + http://simulide.blogspot.com/p/blog-page_15.html diff --git a/resources/data/help/_es/clock_es.txt b/resources/data/help/_es/clock_es.txt new file mode 100644 index 0000000..605ba8e --- /dev/null +++ b/resources/data/help/_es/clock_es.txt @@ -0,0 +1,14 @@ +Reloj: +Esta es una fuente de reloj simple. + +Se puede activar/desactivar la salida con el botón en el lado izquierdo. + +Parámetros: +- Voltaje: + Determina la amplitud de onda. 5 +- Unidades: + Determina las unidades. V +- Mostrar voltaje: + Muestra (true) o no (false) la amplitud de onda. true +- Freq.: + Ajusta la frecuencia. 1000 \ No newline at end of file diff --git a/resources/data/help/_es/counter_es.txt b/resources/data/help/_es/counter_es.txt new file mode 100644 index 0000000..7a9192b --- /dev/null +++ b/resources/data/help/_es/counter_es.txt @@ -0,0 +1,26 @@ +Contador + +Pines: +> = Entrada +!R = +Q = Salida + +Propiedades: +- Volt Alto Entrada: + 2.5 +- Volt Bajo Entrada: + 2.5 +- Impedancia Entrada: + 1e+14 +- Volt Alto Salida: + 5 +- Volt Bajo Salida: + 0 +- Impedancia Salida: + 40 +- Reloj Invertido: + false +- Reset Invertido: + true +- Valor Max. + 1 \ No newline at end of file diff --git a/resources/data/help/_es/currentsource_es.txt b/resources/data/help/_es/currentsource_es.txt new file mode 100644 index 0000000..6a02ce3 --- /dev/null +++ b/resources/data/help/_es/currentsource_es.txt @@ -0,0 +1,9 @@ +Fuente de corriente: + +Esta es una fuente de corriente variable. + +La corriente se puede ajustar de 0A a máx. actual usando el dial. + +Se puede activar/desactivar con el botón en la parte inferior. + +La etiqueta del botón muestra el valor de salida actual. diff --git a/resources/data/help/_es/diode_es.txt b/resources/data/help/_es/diode_es.txt new file mode 100644 index 0000000..406c8d6 --- /dev/null +++ b/resources/data/help/_es/diode_es.txt @@ -0,0 +1,14 @@ +Diodo rectificador: + +Parámetros: +- Umbral: + Tensión directa de conducción. 0.7V + +- Volt. Zener: + Usa un valor >0 en esta para establecer la tensión inversa. 0V + +Videos Relacionados: + https://www.youtube.com/watch?v=KG0vvtP1rKk + +Mas información: + http://simulide.blogspot.com/p/leds.html diff --git a/resources/data/help/_es/elcapacitor_es.txt b/resources/data/help/_es/elcapacitor_es.txt new file mode 100644 index 0000000..1565970 --- /dev/null +++ b/resources/data/help/_es/elcapacitor_es.txt @@ -0,0 +1,9 @@ +Condensador electrolítico + +Parámetros: +- Capacidad: + Determina la capacidad: 10 +- Unidades: + Determina las unidades. uF +- Show Cap: + Muestra su valor. true diff --git a/resources/data/help/_es/ellipse_es.txt b/resources/data/help/_es/ellipse_es.txt new file mode 100644 index 0000000..38b6bdb --- /dev/null +++ b/resources/data/help/_es/ellipse_es.txt @@ -0,0 +1,17 @@ +Elipse + +Dibuja una elipse. + +Parámetros: +- Tamaño Horiz: + Determina el tamaño horizontal. 50 +- Tamaño Vert: + Determina el tamaño vertical. 30 +- Borde: + Determina el grosor de borde. 2 +- Color: + Determina color de fondo. #a0a0a4 +- Opacidad: + Determina opcidad. 1 +- Valor Z: + Determina la profundidad. Si esta encina o debajo de otros objetos. -1 diff --git a/resources/data/help/_es/fixedvoltage_es.txt b/resources/data/help/_es/fixedvoltage_es.txt new file mode 100644 index 0000000..447f2b7 --- /dev/null +++ b/resources/data/help/_es/fixedvoltage_es.txt @@ -0,0 +1,13 @@ +Voltaje fijo: + +Esta es una fuente de voltaje simple. + +Se puede activar/desactivar con el botón en el lado izquierdo. + +Parámetros: +- Voltaje: + Establece el valor de la salida. 5 +- Unidades: + Establece las unidades. V +- Mostrar Voltaje: + Establece si se muestra o no el valor de la salida. true diff --git a/resources/data/help/_es/frequencimeter_es.txt b/resources/data/help/_es/frequencimeter_es.txt new file mode 100644 index 0000000..6661585 --- /dev/null +++ b/resources/data/help/_es/frequencimeter_es.txt @@ -0,0 +1,6 @@ +Frequenciómetro: +Mide la frecuencia en la punta de prueba a la izquierda. + +Conecte el pin izquierdo a un cable o pin del circuito para ver la frecuencia de la señal. + +Frecuencia mínima: 2 Hz. diff --git a/resources/data/help/_es/fulladder_es.txt b/resources/data/help/_es/fulladder_es.txt new file mode 100644 index 0000000..c46fcb9 --- /dev/null +++ b/resources/data/help/_es/fulladder_es.txt @@ -0,0 +1,3 @@ +Full Adder + +Pronto... \ No newline at end of file diff --git a/resources/data/help/_es/ground_es.txt b/resources/data/help/_es/ground_es.txt new file mode 100644 index 0000000..c2d1b8f --- /dev/null +++ b/resources/data/help/_es/ground_es.txt @@ -0,0 +1,5 @@ +Tierra: + +Esta es una fuente de voltaje de 0V. + +Siempre está encendido. \ No newline at end of file diff --git a/resources/data/help/_es/hd44780_es.txt b/resources/data/help/_es/hd44780_es.txt new file mode 100644 index 0000000..8a38dc3 --- /dev/null +++ b/resources/data/help/_es/hd44780_es.txt @@ -0,0 +1,15 @@ +HD44780 LCD: + +Pantalla de cristal líquido de matriz de puntos de 16x2 basada en el controlador LCD Hitachi HD44780. + +Pines: +- RS +- RW +- En +- D0..D7 + +Parámetros: +- Columnas: + Determina el numero de columnas. 16 +- Filas: + Determina el numero de filas. 2 diff --git a/resources/data/help/_es/image_es.txt b/resources/data/help/_es/image_es.txt new file mode 100644 index 0000000..3ee7573 --- /dev/null +++ b/resources/data/help/_es/image_es.txt @@ -0,0 +1,18 @@ +Imágenes +Agregar una imagen en el circuito + +Propiedades: +- Tamaño Horiz: + Determina ancho. 80 +- Tamaño vert.: + Determina alto. 80 +- Borde: + Determina grosor de borde. 2 +- Color: + Determina el color del borde. #a0a0a4 +- Opacidad: + Determina opacidad. 1 +- Valor Z: + Determina ubicación en eje z. -1 +- Archivo de imagen: + Determina ruta y nombre de archivo de imagen. Debe ser *.png \ No newline at end of file diff --git a/resources/data/help/_es/keypad_es.txt b/resources/data/help/_es/keypad_es.txt new file mode 100644 index 0000000..34b1172 --- /dev/null +++ b/resources/data/help/_es/keypad_es.txt @@ -0,0 +1,14 @@ +Teclado: + +Es personalizable en tamaño (filas y columnas) y etiquetas clave. + +Parámetros: +- Filas: + Determina el numero de filas. 4 +- Columnas: + Determina el numero de columnas. 3 +- Texto en Teclas: + Determina el texto en las teclas. 123456789*0# + +Mas información: + http://simulide.blogspot.com/p/blog-page_22.html diff --git a/resources/data/help/_es/led_es.txt b/resources/data/help/_es/led_es.txt new file mode 100644 index 0000000..5655cc3 --- /dev/null +++ b/resources/data/help/_es/led_es.txt @@ -0,0 +1,24 @@ +LED: + +Parámetros: + +- Color: + Color del LED: amarillo, rojo, verde, azul, naranja o púrpura. Yellow + +- Umbral: + Tensión umbral del LED, debajo de esta tensión no conducen. 2.4 + +- CorienteMax: + Corriente máxima soportada. Al superar este valor LED se quema. LED parpadea cuando se excede la maxima corriente en aprox 40%. 0.03 + +- Resistencia: + La resistencia interna, como un truco que es posible sustituir resistencia externa. 0.6 + +- A tierra: + Al establecer esta propiedad en true conecta el cátodo a GND, por lo que el circuito queda más simple y más limpio. Cuando esta propiedad se establece en true, desaparece el conector del cátodo. false + +Videos Relacionados: + https://www.youtube.com/watch?v=KG0vvtP1rKk + +Mas información: + http://simulide.blogspot.com/p/leds.html diff --git a/resources/data/help/_es/ledbar_es.txt b/resources/data/help/_es/ledbar_es.txt new file mode 100644 index 0000000..14449bf --- /dev/null +++ b/resources/data/help/_es/ledbar_es.txt @@ -0,0 +1,29 @@ +Barra de LEDs: + +Barra LEDs configurable con las mismas propiedades que los LEDs más "Tamaño" para establecer el número de LEDs. + +Los LEDs se desplazan hacia el lado del cátodo. + +- Color: + Color del LED: amarillo, rojo, verde, azul, naranja o púrpura. Yellow + +- Size: + Determina la cantidad de LEDs. 8 + +- Umbral: + Tensión umbral del LED, debajo de esta tensión no conducen. 2.4 + +- CorienteMax: + Corriente máxima soportada. Al superar este valor LED se quema. LED parpadea cuando se excede la maxima corriente en aprox 40%. 0.03 + +- Resistencia: + La resistencia interna, como un truco que es posible sustituir resistencia externa. 0.6 + +- A tierra: + Al establecer esta propiedad en true conecta el cátodo a GND, por lo que el circuito queda más simple y más limpio. Cuando esta propiedad se establece en true, desaparece el conector del cátodo. false + +Videos Relacionados: + https://www.youtube.com/watch?v=KG0vvtP1rKk + +Mas información: + http://simulide.blogspot.com/p/leds.html diff --git a/resources/data/help/_es/ledmatrix_es.txt b/resources/data/help/_es/ledmatrix_es.txt new file mode 100644 index 0000000..c19c5ad --- /dev/null +++ b/resources/data/help/_es/ledmatrix_es.txt @@ -0,0 +1,31 @@ +Matriz LED: + +Los pines de la izquierda están conectados a los ánodos de las filas. +Los pines inferiores están conectados a los cátodos de las columnas. + +Matriz LED configurable con las mismas propiedades que los LEDs. + +Propiedades: +- Color: + Color del LED: amarillo, rojo, verde, azul, naranja o púrpura. Yellow + +- Filas: + Determina la cantidad de filas. 8 + +- Columnas: + Determina la cantidad de columnas. 8 + +- Vertical Pins: + false + +- Umbral: + Tensión umbral del LED, debajo de esta tensión no conducen. 2.4 + +- Coriente Max: + Corriente máxima soportada. Al superar este valor LED se quema. LED parpadea cuando se excede la maxima corriente en aprox 40%. 0.03 + +- Resistencia: + La resistencia interna, como un truco que es posible sustituir resistencia externa. 0.6 + +Mas información: + http://simulide.blogspot.com/p/leds.html diff --git a/resources/data/help/_es/line_es.txt b/resources/data/help/_es/line_es.txt new file mode 100644 index 0000000..e7c425e --- /dev/null +++ b/resources/data/help/_es/line_es.txt @@ -0,0 +1,17 @@ +Linea + +Dibuja una linea. + +Parámetros: +- Tamaño Horiz: + Determina el tamaño horizontal. 50 +- Tamaño Vert: + Determina el tamaño vertical. 30 +- Borde: + Determina el grosor de borde. 2 +- Color: + Determina color de fondo. #a0a0a4 +- Opacidad: + Determina opcidad. 1 +- Valor Z: + Determina la profundidad. Si esta encina o debajo de otros objetos. -1 diff --git a/resources/data/help/_es/memory_es.txt b/resources/data/help/_es/memory_es.txt new file mode 100644 index 0000000..0f8944b --- /dev/null +++ b/resources/data/help/_es/memory_es.txt @@ -0,0 +1,15 @@ +Memoria RAM/ROM: + +Este componente se puede configurar como memoria RAM o ROM, solo agregando persistencia, los datos se guardarán en un archivo de circuito que actúa como una memoria EEPROM. + +Debe guardar el circuito para obtener persistencia de datos. + +Es posible guardar datos de memoria en un archivo y cargar desde un archivo. + +También es configurable en tamaño: + +- Bits de dirección: tamaño en palabras = 2 ^ Bits de dirección. + +- Bits de datos: tamaño de la palabra en bits. + +Por defecto es un RAM de 256 bytes (8 bits de dirección, 8 bits de datos, sin persistencia). diff --git a/resources/data/help/_es/mosfet_es.txt b/resources/data/help/_es/mosfet_es.txt new file mode 100644 index 0000000..43ec7fc --- /dev/null +++ b/resources/data/help/_es/mosfet_es.txt @@ -0,0 +1,17 @@ +MosFET: + +Transistor de efecto de campo. + +Parametros: +- RDSon: + RDSon representa la resistencia DS en la parte inferior de la región lineal cuando se conduce: +     VGS> Vth y VDS <(VGS - Vth) + +- Umbral: + 1 +- Canal P: + Determina si es canl P o N. false +- Deplexion: + false + +Es posible configurarlo como canal P o N, así como un mosFET de agotamiento. diff --git a/resources/data/help/_es/mux_es.txt b/resources/data/help/_es/mux_es.txt new file mode 100644 index 0000000..236823b --- /dev/null +++ b/resources/data/help/_es/mux_es.txt @@ -0,0 +1,26 @@ +Multiplexor de entrada + +Teniendo ocho (8) entrada D0..D7, en la salida se reflejara (Y + !Y) la que seleccionemos con S0..S2. + +Pines: +D0..D7 = Señales de entrada +S0..S2 = Selector de puerta (000 = D0, 100 = D1, etc) +!OE = Habilitación de la salida. GND +Y = Salida +!Y = Salidas invertida + +Propiedades: +- Volt Alto Entrada: + 2.5 +- Volt Bajo Entrada: + 2.5 +- Impedancia Entrada: + 1e+14 +- Volt Alto Salida: + 5 +- Volt Bajo Salida: + 0 +- Impedancia Salida: + 40 +- Invertir Entradas: + false diff --git a/resources/data/help/_es/muxanalog_es.txt b/resources/data/help/_es/muxanalog_es.txt new file mode 100644 index 0000000..751e317 --- /dev/null +++ b/resources/data/help/_es/muxanalog_es.txt @@ -0,0 +1,15 @@ +Multiplexor Analógico + +Teniendo una entrada en Z (por ejemplo reloj) esta es reflejada en una salida (Y0..Y7) según la selección con A0..A2. + +Pines: +Z = Señal de entrada +A0..A3 = Selector de puerta (000 = Y0, 100 = Y1, etc) +!En = Habilitación de la salida. GND +Y0..Y7 = Salidas + +Propiedades: +- Address Bits: + Determina el numero de entradas. 3 +- Impedancia: + Determina la impedancia del circuito. 1 diff --git a/resources/data/help/_es/opamp_es.txt b/resources/data/help/_es/opamp_es.txt new file mode 100644 index 0000000..d4b83fd --- /dev/null +++ b/resources/data/help/_es/opamp_es.txt @@ -0,0 +1,9 @@ +Amplificador Operacional: + +Parámetros: +- Ganancia: + Establece la ganancia en amplitud. 1000 +- Pines de alimentación: + Para mostrar los pines de alimentación. false + Por defecto, no muestra pines de alimentación y usará 0-5V. + Conecte estos pines a cualquier fuente de voltaje que necesite. diff --git a/resources/data/help/_es/orgate_es.txt b/resources/data/help/_es/orgate_es.txt new file mode 100644 index 0000000..02306b7 --- /dev/null +++ b/resources/data/help/_es/orgate_es.txt @@ -0,0 +1,17 @@ +Puerta OR + +A B Q +0 0 0 +1 0 1 +0 1 1 +1 1 1 + +Propiedades: +- Volt. Alto Entrada: 2.5 +- Volt. Bajo Entrada: 2.5 +- Impedancia Entrada: 1e+14 +- Volt. Alto Salida: 5 +- Volt. Bajo Entrada: 0 +- Impedancia Salida: 40 +- Invertido: false +- Open Collector: false \ No newline at end of file diff --git a/resources/data/help/_es/oscope_es.txt b/resources/data/help/_es/oscope_es.txt new file mode 100644 index 0000000..b1984ab --- /dev/null +++ b/resources/data/help/_es/oscope_es.txt @@ -0,0 +1,21 @@ +Oscilloscopio: +Instrumento que muestra la forma de onda. Tiene dos canales directo (+) e inverso (-). + +Por defecto, use la autoescala para señalizar frecuencia y amplitud. + +Para configurar manualmente Escala y Posición, desactive la casilla de verificación "Auto". + +Los controles están ordenados en dos columnas: Horizontal y vertical. +Y dos filas: Escala y posición. +     +Por ejemplo, para establecer la Escala horizontal, use el control en la fila "Escala" y la columna "H". + +Parámetros: +- Filtro: + 0.3 + +Videos Relacionados: + https://youtu.be/4RwjZUXs9YU + +Mas información: + https://simulide.blogspot.com/p/oscope.html diff --git a/resources/data/help/_es/package_es.txt b/resources/data/help/_es/package_es.txt new file mode 100644 index 0000000..6bb4f83 --- /dev/null +++ b/resources/data/help/_es/package_es.txt @@ -0,0 +1,11 @@ +Empaquetado + +Parámetros: +- Logic Symbol: + Se muestra o lo el simbolo logico. true +- Package File: + Carpeta de ubicacion del archivo. ..share/simulide/data +- Ancho: + Determina el ancho. 4 +- Alto: + Determina el alto. 8 diff --git a/resources/data/help/_es/pcd8544_es.txt b/resources/data/help/_es/pcd8544_es.txt new file mode 100644 index 0000000..5a220a9 --- /dev/null +++ b/resources/data/help/_es/pcd8544_es.txt @@ -0,0 +1,5 @@ +PCD8544 LCD grafico: + +LCD de matriz de 48x84 píxeles basado en el controlador PCD8544. + +El PCD8544 interactúa con los microcontroladores a través de una interfaz de bus serie. diff --git a/resources/data/help/_es/potentiometer_es.txt b/resources/data/help/_es/potentiometer_es.txt new file mode 100644 index 0000000..7d59eb7 --- /dev/null +++ b/resources/data/help/_es/potentiometer_es.txt @@ -0,0 +1,13 @@ +Potenciómetro: + +Ajuste el dial para establecer la posición media. + +Parámetros: +- Resistencia: + Use la propiedad "Resistencia" para establecer la resistencia total. 1 +- Unidades: + Determina las unidades. k +- Mostrar resistencia: + Muestra el valor actual. true +- Valor Ohmios: + Use esta propiedad para establecer un valor preciso. 500 diff --git a/resources/data/help/_es/probe_es.txt b/resources/data/help/_es/probe_es.txt new file mode 100644 index 0000000..85f5ea1 --- /dev/null +++ b/resources/data/help/_es/probe_es.txt @@ -0,0 +1,21 @@ +Punta de prueba: + +Funciona como una sonda digital: HIGH = Naranja (> 2.5V). + +Puedes arrastras la punta de prueba con el mouse por los cables o pín del circuito para obtener voltaje. + +Haga clic derecho y agregue canales al trazador de gráficos (Plotter). Puede usar hasta cuatro (4) canales de colores diferentes. +También hay una marca "Tick" que indica el tiempo representado por cada división en la pantalla del trazador. + +El trazador funciona a 50 Fps a cualquier velocidad de circuito que establezca, lo que significa que puede trazar señales de alta frecuencia si reduce la velocidad de la simulación. + +Parámetros: +- Show volt: + Muestra (true) o no (false) la tensión detectada. true + +Videos Relacionados: + Pronto. + +Mas información: + http://simulide.blogspot.com/p/probe.html - Punta de prueba + https://simulide.blogspot.com/p/blog-page_16.html - trazador de gráficos (plotter) \ No newline at end of file diff --git a/resources/data/help/_es/push_es.txt b/resources/data/help/_es/push_es.txt new file mode 100644 index 0000000..293b622 --- /dev/null +++ b/resources/data/help/_es/push_es.txt @@ -0,0 +1,7 @@ +Botón Pulsador: + +Este es un interruptor sin enclavamiento. + +Parámetros: +- Norm Cerrado: + Se puede configurar como normalmente cerrado (NC = true) o normalmente abierto (NO). false diff --git a/resources/data/help/_es/rail_es.txt b/resources/data/help/_es/rail_es.txt new file mode 100644 index 0000000..3d0ba2f --- /dev/null +++ b/resources/data/help/_es/rail_es.txt @@ -0,0 +1,13 @@ +Rail: + +Esta es una fuente de voltaje simple. + +Siempre está encendido. + +Parámetros: +- Voltaje; + Determina el voltaje de salida. 5 +- Unidades: + Determina las unidades. V +- Mostrar Voltaje: + Muestra (true) o no la tensión de salida. true diff --git a/resources/data/help/_es/rectangle_es.txt b/resources/data/help/_es/rectangle_es.txt new file mode 100644 index 0000000..232ef8e --- /dev/null +++ b/resources/data/help/_es/rectangle_es.txt @@ -0,0 +1,17 @@ +Rectangulo + +Dibuja un rectangulo. + +Parámetros: +- Tamaño Horiz: + Determina el tamaño horizontal. 50 +- Tamaño Vert: + Determina el tamaño vertical. 30 +- Borde: + Determina el grosor de borde. 2 +- Color: + Determina color de fondo. #a0a0a4 +- Opacidad: + Determina opcidad. 1 +- Valor Z: + Determina la profundidad. Si esta encina o debajo de otros objetos. -1 diff --git a/resources/data/help/_es/relayspst_es.txt b/resources/data/help/_es/relayspst_es.txt new file mode 100644 index 0000000..e788651 --- /dev/null +++ b/resources/data/help/_es/relayspst_es.txt @@ -0,0 +1,15 @@ +Rele: + +Relé electromagnético configurable. + +Parámetros: +- Res. Bobina: + Determina la resistencia de la bobina. 100 +- Int. Disparo: + Determina de corriente de disparo. 0.02 +- Polos: + Establecer el número de polos. 1 +- DT: + Se puede configurar como simle o doble contacto. false +- Norm. Cerrado: + Determina si es normal cerrado (NC) o normal abierto: false. diff --git a/resources/data/help/_es/resistor_es.txt b/resources/data/help/_es/resistor_es.txt new file mode 100644 index 0000000..aeb883b --- /dev/null +++ b/resources/data/help/_es/resistor_es.txt @@ -0,0 +1,9 @@ +Resistencia + +Parámetros: +- Resistencia: + Valor actual de resistencia. 100 +- Unidades: + Determina las unidades. +- Mostrar Resistencia: + Muestra o no el valor actual. true diff --git a/resources/data/help/_es/resistordip_es.txt b/resources/data/help/_es/resistordip_es.txt new file mode 100644 index 0000000..f70dea3 --- /dev/null +++ b/resources/data/help/_es/resistordip_es.txt @@ -0,0 +1,11 @@ +DIP de resistencias; + +Parámetros: +- Size: + Determina el numero de resitencias. 8 +- Resistencia: + Valor actual de resistencia. 100 +- Unidades: + Determina las unidades. +- Mostrar Resistencia: + Muestra o no el valor actual. true diff --git a/resources/data/help/_es/servo_es.txt b/resources/data/help/_es/servo_es.txt new file mode 100644 index 0000000..63fbc01 --- /dev/null +++ b/resources/data/help/_es/servo_es.txt @@ -0,0 +1,5 @@ +Servo motor + +Parámetros: +- Velocidad: + Determina la velocidad. 0.2 diff --git a/resources/data/help/_es/sevensegment_es.txt b/resources/data/help/_es/sevensegment_es.txt new file mode 100644 index 0000000..60f937b --- /dev/null +++ b/resources/data/help/_es/sevensegment_es.txt @@ -0,0 +1,28 @@ +Display siete segmentos + +El orden de los segmentos es a, b, c.. f. +El pin de alimentación es abajo a la derecha. +El punto decimal esta a bajo a la izquierda. + +Parámetros: +- Color: + Color del LED: amarillo, rojo, verde, azul, naranja o púrpura. Yellow +- Num Pantallas: + Determina el numero de displays. 1 +- Cátodo común: + Determina si son cátodo o ánodo común. true +- Vertical Pins: + Determina si los pines estarán verticales. false +- Umbral: + Tensión umbral del LED, debajo de esta tensión no conducen. 2.4 +- CorienteMax: + Corriente máxima soportada. Al superar este valor LED se quema. LED parpadea cuando se excede la máxima corriente en aprox 40%. 0.02 +- Resistencia: + La resistencia interna, como un truco que es posible sustituir resistencia externa. 1 + +Videos Relacionados: + https://www.youtube.com/watch?v=c7SFryRa5hs + https://www.youtube.com/watch?v=pOOIZnZ2lQ4 + +Mas información: + https://simulide.blogspot.com/p/seven-segment-display.html diff --git a/resources/data/help/_es/shiftreg_es.txt b/resources/data/help/_es/shiftreg_es.txt new file mode 100644 index 0000000..c46fcb9 --- /dev/null +++ b/resources/data/help/_es/shiftreg_es.txt @@ -0,0 +1,3 @@ +Full Adder + +Pronto... \ No newline at end of file diff --git a/resources/data/help/_es/sr04_es.txt b/resources/data/help/_es/sr04_es.txt new file mode 100644 index 0000000..684db5a --- /dev/null +++ b/resources/data/help/_es/sr04_es.txt @@ -0,0 +1,7 @@ +Sensor HC-SR04 + +Pines: +- Vcc: Alimentación (5V) +- Trig: +- Echo: +- Gnd: tierra diff --git a/resources/data/help/_es/stepper_es.txt b/resources/data/help/_es/stepper_es.txt new file mode 100644 index 0000000..c6ff966 --- /dev/null +++ b/resources/data/help/_es/stepper_es.txt @@ -0,0 +1,9 @@ +Motor de pasos + +Parámetros: +- Pasos: + Determina el numero de pasos. 32 +- Resistencia: + 100 +- Unidades: + Ohms diff --git a/resources/data/help/_es/subcircuit_es.txt b/resources/data/help/_es/subcircuit_es.txt new file mode 100644 index 0000000..af96674 --- /dev/null +++ b/resources/data/help/_es/subcircuit_es.txt @@ -0,0 +1,11 @@ +Subcircuito: + +Este es un componente hecho de varias partes. + +Contiene un circuito en su interior de manera similar a como lo hace un chip. + +Cada componente de Subcircuito se describe en 2 archivos: uno para el circuito y otro para el paquete. + +Hay una opción para usar un paquete tipo Chip o un símbolo lógico. + +Para cambiar entre ellos, utilice el "Símbolo lógico" que se indica arriba. diff --git a/resources/data/help/_es/switch_es.txt b/resources/data/help/_es/switch_es.txt new file mode 100644 index 0000000..7808b24 --- /dev/null +++ b/resources/data/help/_es/switch_es.txt @@ -0,0 +1,13 @@ +Switch: + +Este es un interruptor de bloqueo. + +Parámetros: +- Polos: + Determina el número de polos. 1 +- DT: + Se puede configurar como simple o doble contacto. false + - false (contacto simple) - 2 pines + - true (doble contacto) - 3 pines +- Norm Cerrado: + Se puede configurar como normalmente cerrado (NC) o normalmente abierto (NO). false diff --git a/resources/data/help/_es/switchdip_es.txt b/resources/data/help/_es/switchdip_es.txt new file mode 100644 index 0000000..2cf2ff5 --- /dev/null +++ b/resources/data/help/_es/switchdip_es.txt @@ -0,0 +1,11 @@ +Switch DIP: + +Conjunto de interruptores redimensionable en una configuración DIP. + +Haga clic en "botones" individuales para ENCENDER/APAGAR: +- Verde = On +- Gris = Off + +Parámetros: +- Tamaño: + Establecer el número de interruptores. 8 diff --git a/resources/data/help/_es/textcomponent_es.txt b/resources/data/help/_es/textcomponent_es.txt new file mode 100644 index 0000000..f479096 --- /dev/null +++ b/resources/data/help/_es/textcomponent_es.txt @@ -0,0 +1,19 @@ +TextComponent + +- Fuente: + Determina el tipo de fuente: Helvetica [Cronyx] + +- Tamaño Texto: + Determina el tamaño de fuente. 10 + +- Ancho Fijo: + Determina si es o no de ancho fijo. true + +- Margen: + Determina el margen. 5 + +- Borde: + Determina el grosor de borde. 1 + +- Opacidad: + Opacidad de todo el bloque respecto al fondo. 1 diff --git a/resources/data/help/_es/voltagesource_es.txt b/resources/data/help/_es/voltagesource_es.txt new file mode 100644 index 0000000..82c6523 --- /dev/null +++ b/resources/data/help/_es/voltagesource_es.txt @@ -0,0 +1,9 @@ +Fuente de Voltage: + +Esta es una fuente de voltaje variable. + +Se puede activar/desactivar con el botón en la parte inferior. + +El voltaje se puede ajustar de 0V a máx. voltaje usando el dial. + +La etiqueta del botón muestra el valor de salida de voltaje. diff --git a/resources/data/help/_es/voltimeter_es.txt b/resources/data/help/_es/voltimeter_es.txt new file mode 100644 index 0000000..f0c2d28 --- /dev/null +++ b/resources/data/help/_es/voltimeter_es.txt @@ -0,0 +1,14 @@ +Voltimetro: +Mide la tension entre las puntas de prueba roja y negra. + +- Red Pin: Positivo. +- Black Pin: Negativo. +- Right Pin: Salida de voltage + +Se actualiza a 50 Hz. + +Videos Relacionados: + https://youtu.be/1BeTy5DGcDc + +Mas informacion: + http://simulide.blogspot.com/p/meters.html diff --git a/resources/data/help/_es/voltreg_es.txt b/resources/data/help/_es/voltreg_es.txt new file mode 100644 index 0000000..c389ad4 --- /dev/null +++ b/resources/data/help/_es/voltreg_es.txt @@ -0,0 +1,10 @@ +Regulador de voltaje: + +Pines: +- I: Entrada (Input) +- O: Salida (Output) +- R: Referencia. + +Parámetros: +- Voltaje: + Establezca la tensión entre los pines "O" y "R". diff --git a/resources/data/help/_es/wavegen_es.txt b/resources/data/help/_es/wavegen_es.txt new file mode 100644 index 0000000..af199bd --- /dev/null +++ b/resources/data/help/_es/wavegen_es.txt @@ -0,0 +1,24 @@ +Generador de onda: + +Se puede activar/desactivar con el botón en el lado izquierdo. + +Parámetros: +- Voltaje: + Determina la amplitud de la onda. 5 +- Unidades: + Determina la tensión. V +- Mostrar Voltaje: + Muestra o no la tensión. True +- Freq.: + Determina la frecuencia. 1000 +- Volt. Base: + Determina la tensión mínima. 0 +- Ancho de Pulso Onda Cuadrada: + Solo si seleccionas tipo = onda cuadrado, podrás elegir el ancho de pulso (Duty cicle). 50% +- Calidad: + ??? +- Tipo de onda: Cuatro formas de onda disponibles: + 1. Seno (Sine) + 2. Sierra (Saw) + 3. Triangulo (Triangle) + 4. Cuadrado (Square) diff --git a/resources/data/help/_es/ws2812_es.txt b/resources/data/help/_es/ws2812_es.txt new file mode 100644 index 0000000..772e55e --- /dev/null +++ b/resources/data/help/_es/ws2812_es.txt @@ -0,0 +1,3 @@ +ws2812 + +Pronto... \ No newline at end of file diff --git a/resources/data/help/_es/xorgate_es.txt b/resources/data/help/_es/xorgate_es.txt new file mode 100644 index 0000000..0797450 --- /dev/null +++ b/resources/data/help/_es/xorgate_es.txt @@ -0,0 +1,19 @@ +Puerta XOR + +A B Q +0 0 0 +1 0 1 +0 1 1 +1 1 0 + + +Propiedades: +- Volt. Alto Entrada: 2.5 +- Volt. Bajo Entrada: 2.5 +- Impedancia Entrada: 1e+14 +- Volt. Alto Salida: 5 +- Volt. Bajo Entrada: 0 +- Impedancia Salida: 40 +- Invertido: false +- Open Collector: false +- Num. Entradas: 2 \ No newline at end of file diff --git a/resources/data/help/_ru/7-seg bcd_ru.txt b/resources/data/help/_ru/7-seg bcd_ru.txt new file mode 100644 index 0000000..891bafe --- /dev/null +++ b/resources/data/help/_ru/7-seg bcd_ru.txt @@ -0,0 +1,8 @@ +7Seg BCD (шестнадцатеричный декодер) + +Декодер шестнадцатеричного кода с семисегментным индикатором. +Отображаемые коды B0000 - B1111, цифры 0-9, A, b, C, d, E, F +Полезен при отладке схем и для создания упрощенной индикации. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента \ No newline at end of file diff --git a/resources/data/help/_ru/7-segbcd_ru.txt b/resources/data/help/_ru/7-segbcd_ru.txt new file mode 100644 index 0000000..891bafe --- /dev/null +++ b/resources/data/help/_ru/7-segbcd_ru.txt @@ -0,0 +1,8 @@ +7Seg BCD (шестнадцатеричный декодер) + +Декодер шестнадцатеричного кода с семисегментным индикатором. +Отображаемые коды B0000 - B1111, цифры 0-9, A, b, C, d, E, F +Полезен при отладке схем и для создания упрощенной индикации. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента \ No newline at end of file diff --git a/resources/data/help/_ru/adc_ru.txt b/resources/data/help/_ru/adc_ru.txt new file mode 100644 index 0000000..24f471f --- /dev/null +++ b/resources/data/help/_ru/adc_ru.txt @@ -0,0 +1,17 @@ +ADC (АЦП) + +Настраиваемый АЦП. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Опорное напряжение: значение опорного напряжения, В + +Номер бита: разрядность АЦП, бит + \ No newline at end of file diff --git a/resources/data/help/_ru/amperimeter_ru.txt b/resources/data/help/_ru/amperimeter_ru.txt new file mode 100644 index 0000000..092d22d --- /dev/null +++ b/resources/data/help/_ru/amperimeter_ru.txt @@ -0,0 +1,16 @@ +Амперметр: + +- Красный вывод: Вход "+". +- Черный вывод: Вход "-". +- Правый вывод: Выход для вольтметра (дублирует показания в вольтах). Можно подключить Плоттер. + +- Показания обновляются с частотой 50 Гц. + +Настройки: +Показать идентификатор: "True/False " - включить/выключить обозначение амперметра + + +Дополнительная информация: + http://simulide.blogspot.com/p/meters.html +Видео: + https://youtu.be/1BeTy5DGcDc diff --git a/resources/data/help/_ru/andgate_ru.txt b/resources/data/help/_ru/andgate_ru.txt new file mode 100644 index 0000000..735f95e --- /dev/null +++ b/resources/data/help/_ru/andgate_ru.txt @@ -0,0 +1,24 @@ +AND Gate (Элемент "И") + +Настраиваемый элемент "И". + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Инвертированный: "True" - инверсный выход, "False" - прямой выход + +Open collector: "True" - выход с открытым коллектором, "False" - обычный выход + +Количество входов: количество входов элемента \ No newline at end of file diff --git a/resources/data/help/_ru/audioout_ru.txt b/resources/data/help/_ru/audioout_ru.txt new file mode 100644 index 0000000..e17e884 --- /dev/null +++ b/resources/data/help/_ru/audioout_ru.txt @@ -0,0 +1,14 @@ +Аудио выход: + +Подключается к аудиоустройству, выбранному в вашем компьютере по умолчанию. + +Если аудиоустройство не найдено, то вы увидите символ "Х" около значка. + +Показать идентификатор: "True/False" - включить/выключить обозначение устройства + +Импеданс - сопротивление излучателя + +Buzzer: "True/False" - Режим зуммера "Включено/Отключено" + + + diff --git a/resources/data/help/_ru/bcdto7s_ru.txt b/resources/data/help/_ru/bcdto7s_ru.txt new file mode 100644 index 0000000..5edb445 --- /dev/null +++ b/resources/data/help/_ru/bcdto7s_ru.txt @@ -0,0 +1,28 @@ +BcdTo7S (Дешифратор кода 7 сегментного индикатора) + +Настраиваемый дешифратор для семисегментного индикатора. +Отображаемые цифры: 0-9,а-F. (шестнадцатеричные) +Работа с индикаторами с общим катодом и общим анодом + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Инвертированный: "True" - индикатор с общим анодом, "False" - индикатор с общим катодом + +Третье состояние: True - третье состояние на выходе (постоянно) + + + \ No newline at end of file diff --git a/resources/data/help/_ru/bcdtodec_ru.txt b/resources/data/help/_ru/bcdtodec_ru.txt new file mode 100644 index 0000000..48d6244 --- /dev/null +++ b/resources/data/help/_ru/bcdtodec_ru.txt @@ -0,0 +1,25 @@ +BcdToDec (Дешифратор) + +Настраиваемый дешифратор на 10/16 выходов. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Инвертированный: "True" - инверсные выходы, "False" - прямые выходы + +Третье состояние: True - третье состояние на выходе (постоянно) + +16 Bits: "True" - 16 выходов, "False" - 10 выходов + \ No newline at end of file diff --git a/resources/data/help/_ru/bjt_ru.txt b/resources/data/help/_ru/bjt_ru.txt new file mode 100644 index 0000000..05a5c9c --- /dev/null +++ b/resources/data/help/_ru/bjt_ru.txt @@ -0,0 +1,13 @@ +BJT (Биполярный транзистор): + + +Показать идентификатор: "True/False" - включено/выключено обозначение транзистора. + +Усиление - коэффициент усиления транзистора (h21). + +Порог - падение напряжение База - Эмиттер, при котором транзистор открывается. + +PNP: "True/False" - Тип транзистора NPN: включено/выключено + +BC Diode: "True/False" - симуляция диода между Базой и Коллектором: включено/выключено +при включении диода симуляция замедляется diff --git a/resources/data/help/_ru/buffer_ru.txt b/resources/data/help/_ru/buffer_ru.txt new file mode 100644 index 0000000..09869bd --- /dev/null +++ b/resources/data/help/_ru/buffer_ru.txt @@ -0,0 +1,24 @@ +Buffer (Буферный элемент) + +Настраиваемый буферный элемент. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Инвертированный: "True" - инверсный выход, "False" - прямой выход + +Open collector: "True" - выход с открытым коллектором, "False" - обычный выход + +Третье состояние: "True" - выход с тремя состояниями (управляемый), "False" - обычный выход \ No newline at end of file diff --git a/resources/data/help/_ru/bus_ru.txt b/resources/data/help/_ru/bus_ru.txt new file mode 100644 index 0000000..4c40a14 --- /dev/null +++ b/resources/data/help/_ru/bus_ru.txt @@ -0,0 +1,14 @@ +Bus (Шина) + +Настраиваемая двунаправленная шина. +Применение шин в схемах позволяет значительно сократить размеры схемы, сделать их более читабельными. +Шины в программах SimulIDE-0.4.xx и SimulIDE-0.3.xx несовместимы между собой. +Это следует учитывать при редактировании одной схемы в разных версиях программы. Делайте резервные копии ваших схем. + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Номер бита: количество входов/выходов шины + +Start Bit: начальный номер первого входа/выхода diff --git a/resources/data/help/_ru/capacitor_ru.txt b/resources/data/help/_ru/capacitor_ru.txt new file mode 100644 index 0000000..478cad1 --- /dev/null +++ b/resources/data/help/_ru/capacitor_ru.txt @@ -0,0 +1,12 @@ +Capacitor (конденсатор неполярный): + + +Настройки: + +Показать идентификатор: "True/False" - включить/выключить обозначение конденсатора + +Емкость - значение емкости конденсатора + +Единица измерения: uF - микрофарады, nF - нанофарады, pF - пикофарады + +Show Cap: "True/False" - включить/выключить отображение емкости конденсатора diff --git a/resources/data/help/_ru/circuit_ru.txt b/resources/data/help/_ru/circuit_ru.txt new file mode 100644 index 0000000..d38b9bc --- /dev/null +++ b/resources/data/help/_ru/circuit_ru.txt @@ -0,0 +1,22 @@ +Circuit (схема): + +Скорость: Скорость симуляции в тактов в сек. + +Шаг Отклика: Периодичность запуска просчета реактивных компонентов (в тактах). Значения 1-100 (меньше - точнее и медленнее симуляция) + +Накопление NoLin: Точность расчета нелинейных компонентов. Больше значение - точнее расчет и медленней симуляция. + +Отобразить сетку: "True/False" - включить/выключить отображение сетки на рабочем поле + +Показать полосы прокрутки: "True/False" - включить/выключить отображение полос прокрутки + +Animate: "True/False" - включить/выключить отображение логических уровней на проводах: красный - лог. "1", синий - лог. "0" + +Font Scale: масштаб системных шрифтов. Например: 1,5 = 150% + +Auto Backup Secs: интервал в секундах сохранения изменений в схеме для резервной копии. +При 0 резервная копия не создается. + + +Дополнительная информация: +http://simulide.blogspot.com/p/blog-page_15.html diff --git a/resources/data/help/_ru/clock_ru.txt b/resources/data/help/_ru/clock_ru.txt new file mode 100644 index 0000000..12a91b0 --- /dev/null +++ b/resources/data/help/_ru/clock_ru.txt @@ -0,0 +1,15 @@ +Clock (Тактовый генератор): + +Простой источник тактовых импульсов (меандр). + +Можно включать и выключать кнопкой слева. + +Показать идентификатор: "True/False" - включено/выключено обозначение генератора + +Напряжение: амплитуда колебаний. + +Единица измерения: V - Вольт, mV - милливольт + +Показать в вольтах: "True/False" - включено/выключено отображение амплитуды сигнала + +Частота: частота генератора в Герцах diff --git a/resources/data/help/_ru/counter_ru.txt b/resources/data/help/_ru/counter_ru.txt new file mode 100644 index 0000000..8859389 --- /dev/null +++ b/resources/data/help/_ru/counter_ru.txt @@ -0,0 +1,24 @@ +Counter (Счетчик - делитель) + +Настраиваемый делитель. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Инвертировать такты: "True" - счет по срезам входных импульсов, "False" - счет по фронтам входных импульсов + +Инвертировать сброс: "True" - асинхронный сброс при лог. 0, "False" - асинхронный сброс при лог. 1 + +Максимальное значение: число, на 1 меньшее коэффициента деления diff --git a/resources/data/help/_ru/currentsource_ru.txt b/resources/data/help/_ru/currentsource_ru.txt new file mode 100644 index 0000000..92e4fb7 --- /dev/null +++ b/resources/data/help/_ru/currentsource_ru.txt @@ -0,0 +1,19 @@ +Current Source (Источник тока): + +Регулируемый источник тока. + +Сила тока изменяется от 0 до максимального значения при помощи регулятора. + +Кнопка снизу: Включить/Выключить источник тока. + +Выходное значение силы тока показывается на кнопке. + + +Настройки: +Показать идентификатор: "True/False " - включить/выключить обозначение источника тока. + +Ток: - максимальное значение тока на выходе источника. + +Единица измерения: A - Амперы, mA - миллиАмперы. + +Показать услилитель: индикация максимального тока на выходе источника. diff --git a/resources/data/help/_ru/dac_ru.txt b/resources/data/help/_ru/dac_ru.txt new file mode 100644 index 0000000..8c594f9 --- /dev/null +++ b/resources/data/help/_ru/dac_ru.txt @@ -0,0 +1,17 @@ +DAC (ЦАП) + +Настраиваемый ЦАП. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Опорное напряжение: значение опорного напряжения, В + +Номер бита: разрядность ЦАП, бит + \ No newline at end of file diff --git a/resources/data/help/_ru/dectobcd_ru.txt b/resources/data/help/_ru/dectobcd_ru.txt new file mode 100644 index 0000000..ce44927 --- /dev/null +++ b/resources/data/help/_ru/dectobcd_ru.txt @@ -0,0 +1,25 @@ +DecToBcd (Шифратор) + +Настраиваемый шифратор на 10/16 входов. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Инвертировать входы: "True" - инверсные входы, "False" - прямые входы + +Третье состояние: True - третье состояние на выходе (постоянно) + +16 Bits: "True" - 16 входов, "False" - 10 входов + \ No newline at end of file diff --git a/resources/data/help/_ru/demux_ru.txt b/resources/data/help/_ru/demux_ru.txt new file mode 100644 index 0000000..6993bfa --- /dev/null +++ b/resources/data/help/_ru/demux_ru.txt @@ -0,0 +1,23 @@ +Demux (Элемент "исключающее ИЛИ") + +Настраиваемый демультиплексор на 8 выходов. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Инвертированный: "True" - инверсные выходы, "False" - прямые выходы + +Третье состояние: True - третье состояние на выходе (постоянно) + diff --git a/resources/data/help/_ru/diode_ru.txt b/resources/data/help/_ru/diode_ru.txt new file mode 100644 index 0000000..67037b1 --- /dev/null +++ b/resources/data/help/_ru/diode_ru.txt @@ -0,0 +1,14 @@ +Diode (Диод/Стабилитрон): + +Настраиваемый диод. +Можно настроить как диод или стабилитрон. + +Настройки: +Показать идентификатор: "True/False " - включить/выключить обозначение диода. + +Порог: прямое падение напряжения на диоде в вольтах . + +Напряжение стабилизации: += 0 - 0 Вольт. Работает как обычный диод. +> 0 - получаем стабилитрон, с указанным напряжением стабилизации. При этом УГО диода меняется на УГО стабилитрона. + diff --git a/resources/data/help/_ru/elcapacitor_ru.txt b/resources/data/help/_ru/elcapacitor_ru.txt new file mode 100644 index 0000000..2d4dde2 --- /dev/null +++ b/resources/data/help/_ru/elcapacitor_ru.txt @@ -0,0 +1,16 @@ +Electrolytic Capacitor (Электролитический конденсатор (полярный)): + +Этот конденсатор мигает, если подключен неправильно + + +Настройки: + +Показать идентификатор: "True/False" - включить/выключить обозначение конденсатора + +Емкость - значение емкости конденсатора + +Единица измерения: uF - микрофарады, nF - нанофарады, pF - пикофарады + +Show Cap: "True/False" - включить/выключить отображение емкости конденсатора + + diff --git a/resources/data/help/_ru/ellipse_ru.txt b/resources/data/help/_ru/ellipse_ru.txt new file mode 100644 index 0000000..0c14ccf --- /dev/null +++ b/resources/data/help/_ru/ellipse_ru.txt @@ -0,0 +1,22 @@ +Ellipse (Эллипс) + +Этот элемент позволяет разместить эллипс в схеме. +Размеры, заливку, рамку можно менять, изменив соответствующие параметры. + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение Эллипса + +Размер по горизонтали: ширина Эллипса в точках + +Размер по вертикали: высота Эллипса в точках + +Кайма: ширина контура Эллипса в точках + +Цвет: цвет заливки + +Непрозрачность: настройка прозрачности от 0 - прозрачный до 1 - непрозрачный + +Значение Z: расположение Эллипса по отношению к схеме 1 - над схемой, -1 - под схемой + + diff --git a/resources/data/help/_ru/fixedvoltage_ru.txt b/resources/data/help/_ru/fixedvoltage_ru.txt new file mode 100644 index 0000000..9125127 --- /dev/null +++ b/resources/data/help/_ru/fixedvoltage_ru.txt @@ -0,0 +1,18 @@ +Fixed Voltage (Фиксированное напряжение): + +Это простой источник напряжения. +В цифровых схемах используется как источник логических сигналов Лог.0 / Лог. 1 + +Включение/выключение производится боковой кнопкой. + +Настройки: + +Показать идентификатор: "True/False" - включить/выключить обозначение источника напряжения. + +Напряжение: выходное напряжение источника + +Единица измерения: V - вольт, mV - милливольт + +Показать в вольтах: "True/False" показать/скрыть выходное напряжение + + diff --git a/resources/data/help/_ru/flipflopd_ru.txt b/resources/data/help/_ru/flipflopd_ru.txt new file mode 100644 index 0000000..af85842 --- /dev/null +++ b/resources/data/help/_ru/flipflopd_ru.txt @@ -0,0 +1,22 @@ +FlipFlopD (D-триггер) + +Настраиваемый D-триггер + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Инвертировать такты: "True" - запись по срезам входных импульсов, "False" - запись по фронтам входных импульсов + +Инвертировать SR: "True" - входы SR инверсные, "False" - входы SR прямые \ No newline at end of file diff --git a/resources/data/help/_ru/flipflopjk_ru.txt b/resources/data/help/_ru/flipflopjk_ru.txt new file mode 100644 index 0000000..c0783d8 --- /dev/null +++ b/resources/data/help/_ru/flipflopjk_ru.txt @@ -0,0 +1,22 @@ +FlipFlopJK (JK-триггер) + +Настраиваемый JK-триггер + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Инвертировать такты: "True" - запись по срезам входных импульсов, "False" - запись по фронтам входных импульсов + +Инвертировать SR: "True" - входы SR инверсные, "False" - входы SR прямые \ No newline at end of file diff --git a/resources/data/help/_ru/frequencimeter_ru.txt b/resources/data/help/_ru/frequencimeter_ru.txt new file mode 100644 index 0000000..d18252c --- /dev/null +++ b/resources/data/help/_ru/frequencimeter_ru.txt @@ -0,0 +1,9 @@ +Frequencimeter (Частотомер): + +Левый контакт - вход измеряемой частоты. + +Минимальная измеряемая частота: 2Гц. + +Настройки: + +Показать идентификатор: "True/False" - включить/выключить обозначение частотомера \ No newline at end of file diff --git a/resources/data/help/_ru/fulladder_ru.txt b/resources/data/help/_ru/fulladder_ru.txt new file mode 100644 index 0000000..5b33d44 --- /dev/null +++ b/resources/data/help/_ru/fulladder_ru.txt @@ -0,0 +1,26 @@ +FullAdder (Полный сумматор) + +Полный одноразрядный сумматор + +Контакты: +A - первое слагаемое +B - второе слагаемое +Co - выход переноса +Ci - вход переноса +S - сумма + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + diff --git a/resources/data/help/_ru/function_ru.txt b/resources/data/help/_ru/function_ru.txt new file mode 100644 index 0000000..130add7 --- /dev/null +++ b/resources/data/help/_ru/function_ru.txt @@ -0,0 +1,50 @@ +Function (Настраиваемая функция) + +Настраиваемый элемент "Функция". +Поддерживаются логические и аналоговые функции. + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Инвертированный: "True" - инверсный выход, "False" - прямой выход + +Open collector: "True" - выход с открытым коллектором, "False" - обычный выход + +Количество входов: количество входов элемента + +Количество выходы: количество выходов элемента + +Методы: формулы, описывающие зависимость выходного сигнала от входных + + +Логические функции: +- Not: ! +- And: & +- Or: | +- Xor: ^ + +Аналоговые функции: +Все математические операции с плавающей точкой. + +Ввод формулы: нажать кнопку около выхода элемента и ввести формулу. +Например, формула: +i0|i1 +описывает двухвходовый элемент "ИЛИ" для входов i0, i1 + +Дополнительная информация: +https://simulide.blogspot.com/p/function-component.html + + diff --git a/resources/data/help/_ru/ground_ru.txt b/resources/data/help/_ru/ground_ru.txt new file mode 100644 index 0000000..2e1fa7f --- /dev/null +++ b/resources/data/help/_ru/ground_ru.txt @@ -0,0 +1,7 @@ +Ground (Заземление, общий провод): + +Это точка с нулевым потенциалом. + +Всегда включена. + + diff --git a/resources/data/help/_ru/hd44780_ru.txt b/resources/data/help/_ru/hd44780_ru.txt new file mode 100644 index 0000000..f4a6cdb --- /dev/null +++ b/resources/data/help/_ru/hd44780_ru.txt @@ -0,0 +1,13 @@ +HD44780 LCD: + +Настраиваемый матричный LCD дисплей с матрицей 5x8 точек и контроллером Hitachi HD44780 + +Настройки: + +Показать идентификатор: "True/False" - включить/выключить обозначение дисплея. + +Столбцы: количество знакомест в строке (8-20) + +Строки: количество строк на дисплее (1-4) + + diff --git a/resources/data/help/_ru/i2cram_ru.txt b/resources/data/help/_ru/i2cram_ru.txt new file mode 100644 index 0000000..63ae746 --- /dev/null +++ b/resources/data/help/_ru/i2cram_ru.txt @@ -0,0 +1,22 @@ +I2CRam (Последовательная RAM/ROM) + +ОЗУ/ROM с последовательной шиной + +Компонент можно использовать как ОЗУ или ПЗУ. +Возможно сохранение данных в файле со схемой при установке параметра Persistent = True + +Возможно сохранение данных ОЗУ/ПЗУ в файл и загрузка их из файла (доступно из контекстного меню). +Содержимое ОЗУ/ПЗУ сохраняется в бинарном или текстовом формате. При указании расширения файла *.bin - бинарный формат. +По умолчанию - текстовой формат. + + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение RAM + +Контрольный код: -- + +Размер байтов: объем памяти в байтах + +Persistent: "True" - сохранять данные в файле схемы, "False" - не сохранять + diff --git a/resources/data/help/_ru/i2ctoparallel_ru.txt b/resources/data/help/_ru/i2ctoparallel_ru.txt new file mode 100644 index 0000000..ebfb471 --- /dev/null +++ b/resources/data/help/_ru/i2ctoparallel_ru.txt @@ -0,0 +1,7 @@ +I2CToParallel (Конвертер I2C шины в параллельную) + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Контрольный код: -- diff --git a/resources/data/help/_ru/image_ru.txt b/resources/data/help/_ru/image_ru.txt new file mode 100644 index 0000000..c2fce31 --- /dev/null +++ b/resources/data/help/_ru/image_ru.txt @@ -0,0 +1,24 @@ +Image (Рисунок) + +Этот элемент позволяет разместить рисунок в схеме. +Рисунок загружается из контекстного меню на значке, размещенном на схеме. +Поддерживаемые форматы: PNG, BMP +Размеры рисунка можно менять, изменив соответствующие параметры. + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение рисунка + +Размер по горизонтали: ширина рисунка в точках + +Размер по вертикали: высота рисунка в точках + +Кайма: ширина контура рисунка в точках + +Цвет: настройки цвета + +Непрозрачность: настройка прозрачности от 0 - прозрачный до 1 - непрозрачный + +Значение Z: расположение рисунка по отношению к схеме 1 - над схемой, -1 - под схемой + +Image File: путь к файлу diff --git a/resources/data/help/_ru/inductor_ru.txt b/resources/data/help/_ru/inductor_ru.txt new file mode 100644 index 0000000..27d2090 --- /dev/null +++ b/resources/data/help/_ru/inductor_ru.txt @@ -0,0 +1,11 @@ +Inductor (Катушка индуктивности, дроссель): + +Настройки: + +Показать идентификатор: "True/False" - включить/выключить обозначение катушки. + +Индуктивность: значение индуктивности катушки + +Единица измерения: H - Генри, mH - миллиГенри, uH - микроГенри + +Показать индуктивность: "True/False" - Показать/Скрыть значение индуктивности diff --git a/resources/data/help/_ru/keypad_ru.txt b/resources/data/help/_ru/keypad_ru.txt new file mode 100644 index 0000000..5b9de0f --- /dev/null +++ b/resources/data/help/_ru/keypad_ru.txt @@ -0,0 +1,24 @@ +KeyPad (матричная клавиатура): + +Настраиваемая (количество строк и столбцов) цифровая клавиатура. +Вы можете настроить число строк и стобцов а также обозначения на кнопках. + +По умолчанию установлено 12 клавиш (телефонная клавиатура): 4 строки, 3 стобца + + +Настройки: + +Показать идентификатор: "True/False" - включить/выключить обозначение клавиатуры + +Строки: - число строк в матрице + +Столбцы: - число столбцов в матрице + +Ключевые метки: - обозначения на кнопках. + +Метки на кнопках вводятся без пробелов, построчно, с левого верхнего угла, в направлении слева - направо и сверху - вниз. На каждой кнопке размещается 1 символ. + + + +Дополнительная информация: + http://simulide.blogspot.com/p/blog-page_22.html diff --git a/resources/data/help/_ru/ks0108_ru.txt b/resources/data/help/_ru/ks0108_ru.txt new file mode 100644 index 0000000..a8e8004 --- /dev/null +++ b/resources/data/help/_ru/ks0108_ru.txt @@ -0,0 +1,11 @@ +KS0108 GLCD (Графический LCD дисплей): + +Графический матричный LCD дисплей разрешением 128x64 точки на контроллере KS0108. + + +Настройки: + +Показать идентификатор: "True/False" - включить/выключить обозначение дисплея + +CS активный низкий: True - активый уровень CS = 0, False - активый уровень CS =1 + diff --git a/resources/data/help/_ru/latchd_ru.txt b/resources/data/help/_ru/latchd_ru.txt new file mode 100644 index 0000000..e238d2f --- /dev/null +++ b/resources/data/help/_ru/latchd_ru.txt @@ -0,0 +1,26 @@ +LatchD (Параллельный регистр) + +Настраиваемый параллельный регистр + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Каналы: число триггеров в регистре + +Третье состояние: "True" - выход с тремя состояниями, "False" - выход обычный + +Инвертированный: "True" - инверсный выход, "False" - выход прямой + +Trigger: режим работы регистра: None - многоразрядный буфер, Clock - запись по фронту сигнала Clk, InEnable - прозрачный триггер, запись по низкому уровню Clk diff --git a/resources/data/help/_ru/led_ru.txt b/resources/data/help/_ru/led_ru.txt new file mode 100644 index 0000000..e9098b1 --- /dev/null +++ b/resources/data/help/_ru/led_ru.txt @@ -0,0 +1,29 @@ +Led (Светодиод): + + + +Для упрощения схемы можно установить свойство Gronded в "true". +Это создает виртуальное соединение от катода диода к Земле. +Катодный вывод исчезнет, удалив любой провод, подключенный к нему. + +Светодиод будет мигать белым при превышении максимального тока примерно на 40%. + + +Настройки: + +Показать идентификатор: "True/False" - включить/выключить обозначение светодиода + +Цвет: цвет свечения yellow, red, green, blue, orange, purple + +Порог: прямое падение напряжения на светодиоде. Устанавливается в зависимости от цвета свечения светодиода + +Максимальный ток: максимальное значение тока через светодиод, А. + +Сопротивление: внутреннее сопротивление светодиода, Ом. + +Заземленный: "True" - катод имеет виртуальное соединение с землей. "False" - виртуальное соединение отсутствует. + + + +Дополнительная информация: + http://simulide.blogspot.com/p/leds.html diff --git a/resources/data/help/_ru/ledbar_ru.txt b/resources/data/help/_ru/ledbar_ru.txt new file mode 100644 index 0000000..99c3eed --- /dev/null +++ b/resources/data/help/_ru/ledbar_ru.txt @@ -0,0 +1,26 @@ +Led Bar (Светодиодная шкала): + +Настраиваемая светодиодная шкала с теми же свойствами, что и у светодиодов, дополнительно устанавливается количество светодиодов. + +Светодиоды смещены в сторону катода. + + +Настройки: + +Показать идентификатор: "True/False" - включить/выключить обозначение светодиода + +Цвет: цвет свечения yellow, red, green, blue, orange, purple + +Size: количество светодиодов в шкале + +Порог: прямое падение напряжения на светодиоде. Устанавливается в зависимости от цвета свечения светодиода + +Максимальный ток: максимальное значение тока через светодиод, А. + +Сопротивление: внутреннее сопротивление светодиода, Ом. + +Заземленный: "True" - катод имеет виртуальное соединение с землей. "False" - виртуальное соединение отсутствует. + + +Дополнительная информация: + http://simulide.blogspot.com/p/leds.html \ No newline at end of file diff --git a/resources/data/help/_ru/ledmatrix_ru.txt b/resources/data/help/_ru/ledmatrix_ru.txt new file mode 100644 index 0000000..2866490 --- /dev/null +++ b/resources/data/help/_ru/ledmatrix_ru.txt @@ -0,0 +1,28 @@ +Led Matrix (Светодиодная матрица): + +Настраиваемая светодиодная матрица с теми же свойствами, что и у светодиодов. +Также настраивается размер матрицы (строки и столбцы). +Аноды светодиодов - на строках, катоды - на столбцах. + + +Настройки: + +Показать идентификатор: "True/False" - включить/выключить обозначение матрицы + +Цвет: цвет свечения yellow, red, green, blue, orange, purple + +Строки: количество строк в матрице + +Столбцы: количество столбцов в матрице + +Vetrical pins: "True" - выводы строк матрицы перемещаются на верх, "False" - выводы строк матрицы находятся слева от матрицы + +Порог: прямое падение напряжения на светодиоде. Устанавливается в зависимости от цвета свечения светодиода + +Максимальный ток: максимальное значение тока через светодиод, А. + +Сопротивление: внутреннее сопротивление светодиода, Ом. + + +Дополнительная информация: + http://simulide.blogspot.com/p/leds.html diff --git a/resources/data/help/_ru/line_ru.txt b/resources/data/help/_ru/line_ru.txt new file mode 100644 index 0000000..f82087f --- /dev/null +++ b/resources/data/help/_ru/line_ru.txt @@ -0,0 +1,23 @@ +Line (ОТрезок) + +Этот элемент позволяет разместить отрезок в схеме. +Отрезок является диагональю прямоугольника с выбранными размерами. +Размеры, цвет, толщину можно менять, изменив соответствующие параметры. + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение отрезка + +Размер по горизонтали: ширина прямоугольника в точках + +Размер по вертикали: высота прямоугольника в точках + +Кайма: толщина отрезка в точках + +Цвет: цвет отрезка + +Непрозрачность: настройка прозрачности от 0 - прозрачный до 1 - непрозрачный + +Значение Z: расположение прямоугольника по отношению к схеме 1 - над схемой, -1 - под схемой + + diff --git a/resources/data/help/_ru/lm555_ru.txt b/resources/data/help/_ru/lm555_ru.txt new file mode 100644 index 0000000..fef5f0d --- /dev/null +++ b/resources/data/help/_ru/lm555_ru.txt @@ -0,0 +1,4 @@ +LM555 (Интегральный таймер) + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента \ No newline at end of file diff --git a/resources/data/help/_ru/memory_ru.txt b/resources/data/help/_ru/memory_ru.txt new file mode 100644 index 0000000..64af096 --- /dev/null +++ b/resources/data/help/_ru/memory_ru.txt @@ -0,0 +1,24 @@ +Ram/Rom (ОЗУ/ПЗУ): + +Компонент можно использовать как ОЗУ или ПЗУ. +Возможно сохранение данных в файле со схемой при установке параметра Persistent = True + +Возможно сохранение данных ОЗУ/ПЗУ в файл и загрузка их из файла (доступно из контекстного меню). +Содержимое ОЗУ/ПЗУ сохраняется в бинарном или текстовом формате. При указании расширения файла *.bin - бинарный формат. +По умолчанию - текстовой формат. +Содержимое ОЗУ возможно сохранить только во время симуляции схемы. При отключении симуляции содержимое ОЗУ обнуляется. + + +Настройки: + +Показать идентификатор: "True/False" - включить/выключить обозначение ОЗУ/ПЗУ + +Address Bits: число адресных линий. Определяет количество слов в ОЗУ/ПЗУ = 2^Address_Bits. + +Data Bits: число разрядов данных в слове + +Persistent (Режим ПЗУ): "True" - сохранять данные в файле схемы, "False" - не сохранять. + + +Настройки по умолчанию: 256 байт ОЗУ. (8 линий адреса, 8 бит в слове, не сохранять данные) + diff --git a/resources/data/help/_ru/mosfet_ru.txt b/resources/data/help/_ru/mosfet_ru.txt new file mode 100644 index 0000000..12eadf0 --- /dev/null +++ b/resources/data/help/_ru/mosfet_ru.txt @@ -0,0 +1,13 @@ +Mosfet (МОП-транзистор): + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение транзистора. + +RD потомок (RDSon): сопротивление сток-исток открытого канала, Ом + +Порог (Threshold): пороговое напряжение включения транзистора, Вольт + +Канал P: "True" - транзистор имеет P-канал. "False" - транзистор имеет N-канал. + +Истощение (Depletion): "True" - транзистор со встроенным каналом. "False" - транзистор с индуцированным каналом. + diff --git a/resources/data/help/_ru/mux_ru.txt b/resources/data/help/_ru/mux_ru.txt new file mode 100644 index 0000000..ddf20f4 --- /dev/null +++ b/resources/data/help/_ru/mux_ru.txt @@ -0,0 +1,24 @@ +MUX (Мультиплексор) + +Настраиваемый мультиплексор на 8 входов + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Tristate: True выходы с тремя состояниями (постоянно) + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Инвертировать входы: "True" - инверсные входы, "False" - прямые входы + diff --git a/resources/data/help/_ru/muxanalog_ru.txt b/resources/data/help/_ru/muxanalog_ru.txt new file mode 100644 index 0000000..7c40038 --- /dev/null +++ b/resources/data/help/_ru/muxanalog_ru.txt @@ -0,0 +1,11 @@ +Analog Multiplexer (Аналоговый мультиплексор): + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение мультиплексора + +Address bits: n. Число адресных бит. Определяет число каналов как 2^n + +Импеданс: Сопротивление открытого канала, Ом + + + diff --git a/resources/data/help/_ru/opamp_ru.txt b/resources/data/help/_ru/opamp_ru.txt new file mode 100644 index 0000000..a74b37f --- /dev/null +++ b/resources/data/help/_ru/opamp_ru.txt @@ -0,0 +1,13 @@ +Operational Amplifier (Операционный усилитель): + +По умолчанию контакты питания не показаны и выходное напряжениев будет в пределах 0V-5V. + +Для получения других выходных напряжений, установите параметр "Силовые контакты" в "true" и выводы питания будут показаны. +Подключите эти контакты к источникам необходимого напряжения. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение ОУ + +Усиление: коэффициент устиления по напряжению + +Силовые контакты: "True/False" показать/скрыть выводы питания ОУ diff --git a/resources/data/help/_ru/orgate_ru.txt b/resources/data/help/_ru/orgate_ru.txt new file mode 100644 index 0000000..406ba06 --- /dev/null +++ b/resources/data/help/_ru/orgate_ru.txt @@ -0,0 +1,24 @@ +OR Gate (Элемент "ИЛИ") + +Настраиваемый элемент "ИЛИ". + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Инвертированный: "True" - инверсный выход, "False" - прямой выход + +Open collector: "True" - выход с открытым коллектором, "False" - обычный выход + +Количество входов: количество входов элемента \ No newline at end of file diff --git a/resources/data/help/_ru/oscope_ru.txt b/resources/data/help/_ru/oscope_ru.txt new file mode 100644 index 0000000..5b4c04c --- /dev/null +++ b/resources/data/help/_ru/oscope_ru.txt @@ -0,0 +1,19 @@ +Oscilloscope (Осциллограф): + +По умолчанию осциллограф автоматически масштабирует сигнал по частоте и амплитуде. + +Чтобы вручную установить масштаб и положение, отключите флажок "Auto". + +Элементы управления расположены в два столбца: + Горизонтальные (H) и вертикальные (V). + +И два ряда: Масштаб (Scale) и положение (Pos). + +Например, для установки горизонтального масштаба используйте элемент управления в строке "Scale" и столбце "Н". + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение осциллографа + +Фильтр: не пропускает на вход сигнал амплитудой меньше указанной, В. + diff --git a/resources/data/help/_ru/package_ru.txt b/resources/data/help/_ru/package_ru.txt new file mode 100644 index 0000000..11e9d79 --- /dev/null +++ b/resources/data/help/_ru/package_ru.txt @@ -0,0 +1,16 @@ +Package (Упаковка) + +Рамка для создания корпуса, УГО подсхемы + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение корпуса + +Logic Symbol: "True" - УГО подсхемы, "False" DIP корпус подсхемы + +Package File: путь к каталогу, содержащему подсхемы + +Ширина: ширина прямоугольника в клетках + +Высота: высота прямоугольника в клетках + + \ No newline at end of file diff --git a/resources/data/help/_ru/pcd8544_ru.txt b/resources/data/help/_ru/pcd8544_ru.txt new file mode 100644 index 0000000..87993dd --- /dev/null +++ b/resources/data/help/_ru/pcd8544_ru.txt @@ -0,0 +1,8 @@ +PCD8544 Graphic LCD (Графический LCD дисплей): + +Графический матричный LCD дисплей разрешением 48x84 точек на контроллере PCD8544. + +PCD8544 взаимодействует с микроконтроллерами через последовательный интерфейс. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение дисплея diff --git a/resources/data/help/_ru/potentiometer_ru.txt b/resources/data/help/_ru/potentiometer_ru.txt new file mode 100644 index 0000000..f7558c1 --- /dev/null +++ b/resources/data/help/_ru/potentiometer_ru.txt @@ -0,0 +1,19 @@ +Potentiometer (Потенциометр): + +Вращая регулятор, установите необходимое сопротивление. + +Используйте свойство "Значение Ом", чтобы установить точное среднее значение. + +Используйте свойство "Сопротивление", чтобы установить полное сопротивление. + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение потенциометра + +Сопротивление: полное сопротивление потенциометра + +Единица измерения: Ом, кОм - килоОм, МОм - МегаОМ + +Показать сопротивление: "True/False" - показать/скрыть величину сопротивления потенциометра + +Значение ОМ: точное значение сопротивления при среднем положении регулятора. Не может быть больше полного сопротивления потенциометра. diff --git a/resources/data/help/_ru/probe_ru.txt b/resources/data/help/_ru/probe_ru.txt new file mode 100644 index 0000000..f3eae36 --- /dev/null +++ b/resources/data/help/_ru/probe_ru.txt @@ -0,0 +1,22 @@ +Voltage Probe (Измерительный щуп): + +Захватив мышью щуп, и касаясь им проводов или контактов можно измерить напряжение/логические уровни без подключения к схеме. + +Подключите щуп к проводу или контакту, чтобы измерить напряжение/логические уровни. + +Логический пробник: +оранжевый кружок = высокий уровень (Лог. "1") +белый кружок = низкий уровень (Лог. "0") + +Щелкните правой кнопкой мыши на щупе и добавьте в канал плоттера. +Доступно 4 канала плоттера. + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение щупа + +Shov volt: "True/False" - включить/выключить отображение измеренного напряжения + + +Дополнительная информация: + http://simulide.blogspot.com/p/probe.html \ No newline at end of file diff --git a/resources/data/help/_ru/push_ru.txt b/resources/data/help/_ru/push_ru.txt new file mode 100644 index 0000000..a53cb4a --- /dev/null +++ b/resources/data/help/_ru/push_ru.txt @@ -0,0 +1,13 @@ +Push Button (Тактовая кнопка): + +Тактовая кнопка без фиксации + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение кнопки + +Закрыть нормально: "True/False" - нормально замкнутые/нормально разомкнутые контакты + +Полюса: число групп контактов + +Кеу: Надпись на кнопке + diff --git a/resources/data/help/_ru/rail_ru.txt b/resources/data/help/_ru/rail_ru.txt new file mode 100644 index 0000000..4908353 --- /dev/null +++ b/resources/data/help/_ru/rail_ru.txt @@ -0,0 +1,12 @@ +Rail (Линия питания): + +Простой источник напряжения без возможности отключения. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение источника + +Напряжение: выходное напряжение источника + +Единица измерения: V - вольт, mV - милливольт + +Показать в вольтах: "True/False" - включить/выключить отображение напряжения \ No newline at end of file diff --git a/resources/data/help/_ru/rectangle_ru.txt b/resources/data/help/_ru/rectangle_ru.txt new file mode 100644 index 0000000..7490e5f --- /dev/null +++ b/resources/data/help/_ru/rectangle_ru.txt @@ -0,0 +1,22 @@ +Rectangle (Прямоугольник) + +Этот элемент позволяет разместить прямоугольник в схеме. +Размеры, заливку, рамку можно менять, изменив соответствующие параметры. + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение прямоугольника + +Размер по горизонтали: ширина прямоугольника в точках + +Размер по вертикали: высота прямоугольника в точках + +Кайма: ширина контура прямоугольника в точках + +Цвет: цвет заливки + +Непрозрачность: настройка прозрачности от 0 - прозрачный до 1 - непрозрачный + +Значение Z: расположение прямоугольника по отношению к схеме 1 - над схемой, -1 - под схемой + + diff --git a/resources/data/help/_ru/relayspst_ru.txt b/resources/data/help/_ru/relayspst_ru.txt new file mode 100644 index 0000000..e4d31ef --- /dev/null +++ b/resources/data/help/_ru/relayspst_ru.txt @@ -0,0 +1,22 @@ +Relay (Реле): + +Настраиваемое электромагнитное реле + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение реле + +Закрыть нормально: "True" - нормально замкнутые контакты, "False" - нормально разомкнутые контакты + +Полюса: количество групп контактов + +ДатаВремя (DT): "True" - контакты переключающие, "False" - контакты одиночные + +Сопротивление обмотки: активное сопротивление обмотки, Ом + +Триггер: ток срабатывания, А + +Irelease: ток отпускания, А + +Индуктивность: Индуктивность обмотки, Гн + + diff --git a/resources/data/help/_ru/resistor_ru.txt b/resources/data/help/_ru/resistor_ru.txt new file mode 100644 index 0000000..059ecee --- /dev/null +++ b/resources/data/help/_ru/resistor_ru.txt @@ -0,0 +1,12 @@ +Resistor (Резистор): + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение резистора + +Сопротивление: значение сопротивления резистора + +Единица измерения: Ом, кОм - килоом, МОм - МегаОм + +Показать сопротивление: "True/False" - показать/скрыть величину сопротивления резистора + + diff --git a/resources/data/help/_ru/resistordip_ru.txt b/resources/data/help/_ru/resistordip_ru.txt new file mode 100644 index 0000000..ce368bd --- /dev/null +++ b/resources/data/help/_ru/resistordip_ru.txt @@ -0,0 +1,13 @@ +Resistor Dip (Резисторная сборка): + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение резистора + +Size: количество резисторов в сборке + +Сопротивление: значение сопротивления резистора + +Единица измерения: Ом, кОм - килоом, МОм - МегаОм + +Показать сопротивление: "True/False" - показать/скрыть величину сопротивления резистора \ No newline at end of file diff --git a/resources/data/help/_ru/servo_ru.txt b/resources/data/help/_ru/servo_ru.txt new file mode 100644 index 0000000..de837ea --- /dev/null +++ b/resources/data/help/_ru/servo_ru.txt @@ -0,0 +1,9 @@ +Servo Motor (Сервопривод): + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение сервопривода + +Скорость: скорость поворота вала + + + diff --git a/resources/data/help/_ru/sevensegment_ru.txt b/resources/data/help/_ru/sevensegment_ru.txt new file mode 100644 index 0000000..6a05de6 --- /dev/null +++ b/resources/data/help/_ru/sevensegment_ru.txt @@ -0,0 +1,26 @@ +Seven Segment Display (Семисегментный индикатор): + +Настраиваемый семисегментный светодиодный индикатор +Индикатор будет мигать белым при превышении максимального тока примерно на 40%. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение индикатора + +Цвет: цвет свечения yellow, red, green, blue, orange, purple + +Количество отображений: число разрядов на индикаторе + +Общий катод: "True" - индикатор с общим катодом, "False" - с общим анодом + +Vertical Pins: "True" - выводы располааются по вертикали, "False" - выводы сбоку и снизу + +Порог: прямое падение напряжения на светодиоде. Устанавливается в зависимости от цвета свечения светодиода + +Максимальный ток: максимальное значение тока через светодиод, А. + +Сопротивление: внутреннее сопротивление светодиода, Ом. + + + +Дополнительная информация: + https://simulide.blogspot.com/p/seven-segment-display.html diff --git a/resources/data/help/_ru/shiftreg_ru.txt b/resources/data/help/_ru/shiftreg_ru.txt new file mode 100644 index 0000000..6f699e5 --- /dev/null +++ b/resources/data/help/_ru/shiftreg_ru.txt @@ -0,0 +1,23 @@ +ShiftReg (Сдвиговый регистр, 8 бит) + +Сдвиговый регистр вправо на 8 бит + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Инвертировать такты: "True" - счет по срезам входных импульсов, "False" - счет по фронтам входных импульсов + +Инвертировать сброс: "True" - асинхронный сброс при лог. 0, "False" - асинхронный сброс при лог. 1 + diff --git a/resources/data/help/_ru/sr04_ru.txt b/resources/data/help/_ru/sr04_ru.txt new file mode 100644 index 0000000..fa5be5a --- /dev/null +++ b/resources/data/help/_ru/sr04_ru.txt @@ -0,0 +1,10 @@ +HC-SR04 (Ультразвуковой датчик расстояния) + +Левый контакт - подключите источник напряжения, имитирующий расстояние до объекта: +расстояние в метрах равно напряжению в вольтах. + +Контакты снизу - стандартные для датчика. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение датчика + diff --git a/resources/data/help/_ru/ssd1306_ru.txt b/resources/data/help/_ru/ssd1306_ru.txt new file mode 100644 index 0000000..7971c86 --- /dev/null +++ b/resources/data/help/_ru/ssd1306_ru.txt @@ -0,0 +1,7 @@ +SSD1306 (Oled дисплей 128x64 с контроллером SSD1306) + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение дисплея + +Цвет: цвет изображения на дисплее - White, Blue, Yellow \ No newline at end of file diff --git a/resources/data/help/_ru/stepper_ru.txt b/resources/data/help/_ru/stepper_ru.txt new file mode 100644 index 0000000..8923479 --- /dev/null +++ b/resources/data/help/_ru/stepper_ru.txt @@ -0,0 +1,14 @@ +Stepper Motor (Шаговый двигатель): + +Настраиваемый униполярный шаговый двигатель. +Для упрощения и ускорения симуляции обмотки двигателя моделируются как резисторы + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение двигателя + +Шаги: количество шагов на 1 оборот двигателя + +Сопротивление: активное сопротивление обмотки + +Единица измерения: Ом, кОм - килоом, МОм - МегаОм \ No newline at end of file diff --git a/resources/data/help/_ru/subcircuit_ru.txt b/resources/data/help/_ru/subcircuit_ru.txt new file mode 100644 index 0000000..bf5258e --- /dev/null +++ b/resources/data/help/_ru/subcircuit_ru.txt @@ -0,0 +1,12 @@ +Subcircuit (Подсхема): + +Это компонент, состоящий из нескольких элементов, соединенных в виде схемы. +Является моделью реальной микросхемы или пользовательской схемы. + + +Каждая подсхема описывается в 3 файлах: "*.subcircuit" - файл схемы, "*.package" - DIP корпус микросхемы, "_ls.package" - логический символ микросхемы. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение подсхемы + +Logic Symbol: "True" - подсхема выглядит как логический символ (УГО), "False" - подсхема выглядит как DIP элемент diff --git a/resources/data/help/_ru/switch_ru.txt b/resources/data/help/_ru/switch_ru.txt new file mode 100644 index 0000000..22a4541 --- /dev/null +++ b/resources/data/help/_ru/switch_ru.txt @@ -0,0 +1,15 @@ +Switch (Выключатель): + + +Настраиваемый выключатель с фиксацией. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение выключателя + +Закрыть нормально: "True/False" - нормально замкнутые/нормально разомкнутые контакты + +Полюса: число групп контактов + +ДатаВремя (DT): "True" - контакты переключающие, "False" - контакты одиночные + +Кеу: Надпись на кнопке diff --git a/resources/data/help/_ru/switchdip_ru.txt b/resources/data/help/_ru/switchdip_ru.txt new file mode 100644 index 0000000..ecbfb6d --- /dev/null +++ b/resources/data/help/_ru/switchdip_ru.txt @@ -0,0 +1,14 @@ +Switch Dip (DIP переключатель): + +Настраиваемый групповой переключатель + +Нажимайте на индивидуальную кнопку для включения/выключения: + +Зеленый цвет кнопки - включено +Серый цвет кнопки - выключено + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение переключателя + +Size: количество выключателей в корпусе diff --git a/resources/data/help/_ru/textcomponent_ru.txt b/resources/data/help/_ru/textcomponent_ru.txt new file mode 100644 index 0000000..49b29d3 --- /dev/null +++ b/resources/data/help/_ru/textcomponent_ru.txt @@ -0,0 +1,18 @@ +TextComponent (Надпись) + +Позволяет сделать надпись в произвольном месте схемы + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение надписи + +Font: выбрать шрифт + +Фиксированная ширина: "True" "False" + +Размер шрифта: размер шрифта + +Допустимый предел: расстояние от рамки до текста + +Кайма: толщина рамки текста + +Непрозрачность: настройка прозрачности подложки для текста от 0 - прозрачный до 1 - непрозрачный diff --git a/resources/data/help/_ru/voltage source_ru.txt b/resources/data/help/_ru/voltage source_ru.txt new file mode 100644 index 0000000..8491a0c --- /dev/null +++ b/resources/data/help/_ru/voltage source_ru.txt @@ -0,0 +1,14 @@ +Voltage Source (Источник напряжения): + +Регулируемый источник напряжения с выключателем. +Напряжение изменяется регулятором от 0 до максимального значения. +Включается/выключается кнопкой снизу. На кнопке показывается выходное напряжение. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение источника + +Напряжение: максимальное выходное напряжение источника + +Единица измерения: V - вольт, mV - милливольт + +Показать в вольтах: "True/False" - включить/выключить отображение напряжения \ No newline at end of file diff --git a/resources/data/help/_ru/voltagesource_ru.txt b/resources/data/help/_ru/voltagesource_ru.txt new file mode 100644 index 0000000..8491a0c --- /dev/null +++ b/resources/data/help/_ru/voltagesource_ru.txt @@ -0,0 +1,14 @@ +Voltage Source (Источник напряжения): + +Регулируемый источник напряжения с выключателем. +Напряжение изменяется регулятором от 0 до максимального значения. +Включается/выключается кнопкой снизу. На кнопке показывается выходное напряжение. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение источника + +Напряжение: максимальное выходное напряжение источника + +Единица измерения: V - вольт, mV - милливольт + +Показать в вольтах: "True/False" - включить/выключить отображение напряжения \ No newline at end of file diff --git a/resources/data/help/_ru/voltimeter_ru.txt b/resources/data/help/_ru/voltimeter_ru.txt new file mode 100644 index 0000000..ad0a4d9 --- /dev/null +++ b/resources/data/help/_ru/voltimeter_ru.txt @@ -0,0 +1,13 @@ +Voltimeter (Вольтметр): + +Красный контакт: Вход "+" +Черный контакт: Вход "-" +Правый контакт: выход, дублирующий показания в вольтах + +Показания обновляются с частотой 50 Гц + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение вольтметра. + +Дополнительная информация: +http://simulide.blogspot.com/p/meters.html diff --git a/resources/data/help/_ru/voltreg_ru.txt b/resources/data/help/_ru/voltreg_ru.txt new file mode 100644 index 0000000..2cc3a1c --- /dev/null +++ b/resources/data/help/_ru/voltreg_ru.txt @@ -0,0 +1,13 @@ +Voltage Regulator (Стабилизатор напряжения): +Аналог стабилизаторов типа LM78xx + +Контакты: +- I : вход. +- O : Выход. +- R : Определяет выходное напряжение. + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение стабилизатора + +Вольты: установка выходного напряжения + diff --git a/resources/data/help/_ru/wavegen_ru.txt b/resources/data/help/_ru/wavegen_ru.txt new file mode 100644 index 0000000..6f40d40 --- /dev/null +++ b/resources/data/help/_ru/wavegen_ru.txt @@ -0,0 +1,22 @@ +Wave Generator (Функциональный генератор): + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение генератора + +Напряжение: размах колебаний выходного сигнала + +Единица измерения: V - Вольт, mV - милливольт + +Показать в вольтах: "True/False" - включить/выключить отображение размаха колебаний напряжения + +Частота: частота колебаний + +Базовое напряжение: минимальное значение напряжение сигнала + +Обязательное поле (Duty Square): длительность положительного импульса прямоугольной формы (только для прямоугольного сигнала), % + +Качество: определяет гладкость кривой (частота дискретизации) от 1 до 5. + +Тип волны: Sine, Saw, Triangle, Square. + diff --git a/resources/data/help/_ru/ws2812_ru.txt b/resources/data/help/_ru/ws2812_ru.txt new file mode 100644 index 0000000..4281fc0 --- /dev/null +++ b/resources/data/help/_ru/ws2812_ru.txt @@ -0,0 +1,20 @@ +WS2812 (WS2812 Адресный светодиод) + +Настраиваемый адресный светодиод. +Может использоваться как одиночный элемент, адресная светодиодная лента, адресная светодиодная матрица. +Моделируется только интерфейсная линия. + +Пример: +Строки = 1, Столбцы = 1 - одиночный светодиод +Строки = 1, Столбцы > 1 - горизонтальная полоса светодиодов +Строки > 1, Столбцы = 1 - вертикальная полоса светодиодов +Строки > 1, Столбцы > 1 - прямоугольная матрица светодиодов + + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение WS2812 + +Строки: количество строк в матрице + +Столбцы: количество столбцов в матрице + diff --git a/resources/data/help/_ru/xorgate_ru.txt b/resources/data/help/_ru/xorgate_ru.txt new file mode 100644 index 0000000..c015978 --- /dev/null +++ b/resources/data/help/_ru/xorgate_ru.txt @@ -0,0 +1,22 @@ +XOR Gate (Элемент "исключающее ИЛИ") + +Настраиваемый элемент "исключающее ИЛИ". + +Настройки: +Показать идентификатор: "True/False" - включить/выключить обозначение элемента + +Высокое входящее напряжение: минимальное входное напряжение лог. 1, В + +Низкое входящее напряжение: максимальное входное напряжение лог. 0, В + +Входящий импеданс: входное сопротивление, Ом + +Высокое выходящее напряжение: выходное напряжение лог. 1, В + +Низкое выходящее напряжение: выходное напряжение лог. 0, В + +Выходящий импеданс: выходное сопротивление, Ом + +Инвертированный: "True" - инверсный выход, "False" - прямой выход + +Open collector: "True" - выход с открытым коллектором, "False" - обычный выход diff --git a/resources/data/help/amperimeter.txt b/resources/data/help/amperimeter.txt new file mode 100644 index 0000000..3188f05 --- /dev/null +++ b/resources/data/help/amperimeter.txt @@ -0,0 +1,11 @@ +Amperimeter: + +- Red Pin: Positive. +- Black Pin: Negative. +- Right Pin: Output reading as voltage + +- Updates at 50 Hz. + + +More Info: + http://simulide.blogspot.com/p/meters.html diff --git a/resources/data/help/bjt.txt b/resources/data/help/bjt.txt new file mode 100644 index 0000000..88d92f5 --- /dev/null +++ b/resources/data/help/bjt.txt @@ -0,0 +1,6 @@ +BJT: + +- BC Diode: simulate Base-Collector Diode or not. + With BC Diode simulation can be slower. + +It is posible to configure as PNP or NPN with "PNP" property. diff --git a/resources/data/help/circuit.txt b/resources/data/help/circuit.txt new file mode 100644 index 0000000..a2a45d3 --- /dev/null +++ b/resources/data/help/circuit.txt @@ -0,0 +1,24 @@ +Circuit: + +- Speed: Simulation speed in Steps per Second. + +- ReactStep: run Reactive components once every simulation steps. + +- NoLinStep: run Non-Linear components once every simulation steps. + +- NoLinAcc: Non-Linear components accuracy. Higher is more accurate. + +- Show Grid: + +- Show Scrollbar: + +- Animate: wires will get Red if Volts>2.5, Blue otherwise. + +- Font Scale: scale interface font, for example 1,5 = 150%. + +- Auto Backup Secs: Time interval in seconds for Circuit to check for changes and save a backup if there are changes. + Setting time to 0 disables Auto Backup. + + +More Info: +http://simulide.blogspot.com/p/blog-page_15.html diff --git a/resources/data/help/clock.txt b/resources/data/help/clock.txt new file mode 100644 index 0000000..7c572da --- /dev/null +++ b/resources/data/help/clock.txt @@ -0,0 +1,9 @@ +Clock: + +This is a simple Clock source. + +It can be turned On/Off with the buttton on the left side. + +Change Frequency in "Frequency" property above. + +It is also possible to change voltage in "Voltage" property above. diff --git a/resources/data/help/currentsource.txt b/resources/data/help/currentsource.txt new file mode 100644 index 0000000..fce7902 --- /dev/null +++ b/resources/data/help/currentsource.txt @@ -0,0 +1,9 @@ +Current Source: + +This is a variable Current Source. + +Current can be adjusted from 0V to max. current using the dial. + +It can be turned On/Off with the buttton on the bottom side. + +Button label shows current output value. diff --git a/resources/data/help/diode.txt b/resources/data/help/diode.txt new file mode 100644 index 0000000..5e7d51f --- /dev/null +++ b/resources/data/help/diode.txt @@ -0,0 +1,7 @@ +Diode: + +Configurable diode. + +Use "Threshold" property to set forward threshold voltage. + +To configure as Zener diode just set "Zener Volt" property to a value > 0. diff --git a/resources/data/help/fixedvoltage.txt b/resources/data/help/fixedvoltage.txt new file mode 100644 index 0000000..57a6e1d --- /dev/null +++ b/resources/data/help/fixedvoltage.txt @@ -0,0 +1,7 @@ +Fixed Voltage: + +This is a simple voltage source. + +It can be turned On/Off with the buttton on the left side. + +It is also possible to change voltage in "Voltage" property above. diff --git a/resources/data/help/frequencimeter.txt b/resources/data/help/frequencimeter.txt new file mode 100644 index 0000000..abfa493 --- /dev/null +++ b/resources/data/help/frequencimeter.txt @@ -0,0 +1,7 @@ +Frequencimeter: + +Connect left pin to a wire +to see signal frequency. + +Minimum frequency: 2Hz. + diff --git a/resources/data/help/ground.txt b/resources/data/help/ground.txt new file mode 100644 index 0000000..4c115c9 --- /dev/null +++ b/resources/data/help/ground.txt @@ -0,0 +1,6 @@ +Ground: + +This is a 0V voltage source. + +It is always ON. + diff --git a/resources/data/help/hd44780.txt b/resources/data/help/hd44780.txt new file mode 100644 index 0000000..115a2dc --- /dev/null +++ b/resources/data/help/hd44780.txt @@ -0,0 +1,5 @@ +HD44780 LCD: + +5x8 dot-matrix liquid crystal display based on Hitachi HD44780 LCD controller. + +Configurable in characters rows and columns. diff --git a/resources/data/help/keypad.txt b/resources/data/help/keypad.txt new file mode 100644 index 0000000..35bcd44 --- /dev/null +++ b/resources/data/help/keypad.txt @@ -0,0 +1,7 @@ +KeyPad: + +It is customizable in size ( rows and columns ) and key labels. +By default it is an standard 12 keys; 4 rows, 3 Cols. + +More Info: + http://simulide.blogspot.com/p/blog-page_22.html diff --git a/resources/data/help/led.txt b/resources/data/help/led.txt new file mode 100644 index 0000000..b430595 --- /dev/null +++ b/resources/data/help/led.txt @@ -0,0 +1,10 @@ +Led: + +To simplify the circuit you can set "Gronded" property to true. +This creates a virtual connection from diode cathode to ground. +Cathode pin will dissapear deleting any wire connected to it. + +Led will blink white when the maximun current is exedeed by aprox 40%. + +More Info: + http://simulide.blogspot.com/p/leds.html diff --git a/resources/data/help/ledbar.txt b/resources/data/help/ledbar.txt new file mode 100644 index 0000000..87ef448 --- /dev/null +++ b/resources/data/help/ledbar.txt @@ -0,0 +1,8 @@ +Led Bar: + +Configurable led bar with same properties as leds plus "Size" to set number of leds. + +Leds are displaced to the cathode side. + +More Info: + http://simulide.blogspot.com/p/leds.html \ No newline at end of file diff --git a/resources/data/help/ledmatrix.txt b/resources/data/help/ledmatrix.txt new file mode 100644 index 0000000..106e6cd --- /dev/null +++ b/resources/data/help/ledmatrix.txt @@ -0,0 +1,7 @@ +Led Matrix: + +Configurable led matrix with same properties as leds. +Also customizable in size ( rows and columns ). + +More Info: + http://simulide.blogspot.com/p/leds.html \ No newline at end of file diff --git a/resources/data/help/memory.txt b/resources/data/help/memory.txt new file mode 100644 index 0000000..7483dc7 --- /dev/null +++ b/resources/data/help/memory.txt @@ -0,0 +1,14 @@ +Ram/Rom: + +This component can be configured as Ram or Rom, just adding persistance the data will be saved to circuit file acting as a EEPROM. +You must save the circuit to get data persistance. + +It is possible to save memory data to a file and load from file. + +It is also configurable in size: + +- Address Bits: size in words = 2^Address_Bits. + +- Data Bits: size of word in bits. + +By default it is a 256 bytes Ram ( 8 address bits, 8 data bits, no persistance ). diff --git a/resources/data/help/mosfet.txt b/resources/data/help/mosfet.txt new file mode 100644 index 0000000..d90d25c --- /dev/null +++ b/resources/data/help/mosfet.txt @@ -0,0 +1,6 @@ +Mosfet: + +RDSon represents DS Resistance in the lower part of the linear region when conducing: + VGS > Vth and VDS < ( VGS – Vth ) + +It is posible to configure it as P or N channel as well as a depletion mosfet. diff --git a/resources/data/help/opamp.txt b/resources/data/help/opamp.txt new file mode 100644 index 0000000..6760145 --- /dev/null +++ b/resources/data/help/opamp.txt @@ -0,0 +1,8 @@ +Operational Amplifier: + +By default it does not show power pins and will use 0V-5V. + +To use any other values, set "Power Pins" property to true and power pins will be shown. +Connect these pins to any voltage sources you need. + +Use "Gain" property to set voltage gain. diff --git a/resources/data/help/oscope.txt b/resources/data/help/oscope.txt new file mode 100644 index 0000000..c34ddd4 --- /dev/null +++ b/resources/data/help/oscope.txt @@ -0,0 +1,13 @@ +Oscilloscope: + +By default Oscope auto-scale to signal frequency and amplitude. + +To manually set Scale and Position disable "Auto" checkBox. + +Controls are arraged in two columns: + Horizontal and Vertical. + +And two rows: + Scale and Position. + +For example to set Horizontal Scale use control at "Scale" row and "H" column. diff --git a/resources/data/help/pcd8544.txt b/resources/data/help/pcd8544.txt new file mode 100644 index 0000000..c5cb0dc --- /dev/null +++ b/resources/data/help/pcd8544.txt @@ -0,0 +1,5 @@ +PCD8544 Graphic LCD: + +48x84 pixels matrix LCD based on PCD8544 controller. + +The PCD8544 interfaces to microcontrollers through a serial bus interface. \ No newline at end of file diff --git a/resources/data/help/potentiometer.txt b/resources/data/help/potentiometer.txt new file mode 100644 index 0000000..f9bd92d --- /dev/null +++ b/resources/data/help/potentiometer.txt @@ -0,0 +1,7 @@ +Potentiometer: + +Adjust the dial to set middle position. + +Use "Value Ohm" property to set precise middle position. + +Use "Resistance" property to set total resistance. diff --git a/resources/data/help/probe.txt b/resources/data/help/probe.txt new file mode 100644 index 0000000..756b04b --- /dev/null +++ b/resources/data/help/probe.txt @@ -0,0 +1,10 @@ +Voltage Probe: + +- Hover at Wires or Pins to get voltage. + +- As digital probe: Orange = High State + +- Right-Click and add to Plotter channel. + +More Info: + http://simulide.blogspot.com/p/probe.html diff --git a/resources/data/help/push.txt b/resources/data/help/push.txt new file mode 100644 index 0000000..cb1cb05 --- /dev/null +++ b/resources/data/help/push.txt @@ -0,0 +1,5 @@ +Push Button: + +This is a non latching switch. + +It can be configured as normally closed or normally opened using the "Norm Close" property. diff --git a/resources/data/help/rail.txt b/resources/data/help/rail.txt new file mode 100644 index 0000000..807b166 --- /dev/null +++ b/resources/data/help/rail.txt @@ -0,0 +1,7 @@ +Rail: + +This is a simple voltage source. + +It is always ON. + +It is possible to change voltage in "Voltage" property above. diff --git a/resources/data/help/relayspst.txt b/resources/data/help/relayspst.txt new file mode 100644 index 0000000..e1d3559 --- /dev/null +++ b/resources/data/help/relayspst.txt @@ -0,0 +1,12 @@ +Relay: + +Configurable electromagnetic relay. + +To adjust number of poles use "Poles" property. + +It can be configured as Double or Sigle Throw using "DT" property: + +DT = true : Double Throw. +DT = false : Sigle Throw. + +You can also adjust coil resistance and trigger current. diff --git a/resources/data/help/subcircuit.txt b/resources/data/help/subcircuit.txt new file mode 100644 index 0000000..48124ad --- /dev/null +++ b/resources/data/help/subcircuit.txt @@ -0,0 +1,10 @@ +Subcircuit: + +This a component made out of several parts. + +It contains a circuit inside in a similar way a chip does. + +Each Subcircuit component is described in 2 files: one for the circuit and other for the package. + +There is an option to use a Chip like package or a Logic Symbol. +To change betwen them use "Logic Symbol" propery above. diff --git a/resources/data/help/switch.txt b/resources/data/help/switch.txt new file mode 100644 index 0000000..5444fe4 --- /dev/null +++ b/resources/data/help/switch.txt @@ -0,0 +1,12 @@ +Switch: + +This is a latching switch. + +It can be configured as normally closed or normally opened using the "Norm Close" property. + +To adjust number of poles use "Poles" property. + +It can be configured as Double or Sigle Throw using "DT" property: + +DT = true : Double Throw. +DT = false : Sigle Throw. diff --git a/resources/data/help/switchdip.txt b/resources/data/help/switchdip.txt new file mode 100644 index 0000000..0618665 --- /dev/null +++ b/resources/data/help/switchdip.txt @@ -0,0 +1,10 @@ +Switch Dip: + +Resizable set of switches in a DIP configuration. + +Use "Size" property to set number of switches + +Click on individual "buttons" to turn ON/OFF: + - Green = On + - Gray = Off + diff --git a/resources/data/help/voltagesource.txt b/resources/data/help/voltagesource.txt new file mode 100644 index 0000000..23bea91 --- /dev/null +++ b/resources/data/help/voltagesource.txt @@ -0,0 +1,9 @@ +Voltage Source: + +This is a variable Voltage Source. + +Voltage can be adjusted from 0V to max. voltage using the dial. + +It can be turned On/Off with the buttton on the bottom side. + +Button label shows voltage output value. diff --git a/resources/data/help/voltimeter.txt b/resources/data/help/voltimeter.txt new file mode 100644 index 0000000..b6f3f4c --- /dev/null +++ b/resources/data/help/voltimeter.txt @@ -0,0 +1,11 @@ +Voltimeter: + +- Red Pin: Positive. +- Black Pin: Negative. +- Right Pin: Output reading as voltage + +- Updates at 50 Hz. + + +More Info: +http://simulide.blogspot.com/p/meters.html diff --git a/resources/data/help/voltreg.txt b/resources/data/help/voltreg.txt new file mode 100644 index 0000000..d6a9f89 --- /dev/null +++ b/resources/data/help/voltreg.txt @@ -0,0 +1,8 @@ +Voltage Regulator: + +Pins: +- I : Input. +- O : Output. +- R : Ref. + +Set "Volt" property to adjust voltage between "O" and "R" pins. diff --git a/resources/data/help/wavegen.txt b/resources/data/help/wavegen.txt new file mode 100644 index 0000000..254cce4 --- /dev/null +++ b/resources/data/help/wavegen.txt @@ -0,0 +1,18 @@ +Wave Generator: + +Four possible waveforms: +- Sine. +- Saw. +- Triangle +- Square. + + +It can be turned On/Off with the buttton on the left side. + +Change Frequency in "Frequency" property above. + +Minimum voltage determined by "Volt Base" property. +Wave amplitude determined by "Voltage" property. + +For Square Wave it is possible to set High state width using "Duty Square" property. +Default value is 50%. diff --git a/resources/data/ic74.xml b/resources/data/ic74.xml new file mode 100644 index 0000000..6bd9b90 --- /dev/null +++ b/resources/data/ic74.xml @@ -0,0 +1,158 @@ + + + + + + + + + + + + + + + + + + + + + + + QT_TRANSLATE_NOOP("xmlfile","Logic") + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/4X2IGate.package b/resources/data/ic74/4X2IGate.package new file mode 100644 index 0000000..bd9b293 --- /dev/null +++ b/resources/data/ic74/4X2IGate.package @@ -0,0 +1,40 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/4X2IGate_LS.package b/resources/data/ic74/4X2IGate_LS.package new file mode 100644 index 0000000..8c170d3 --- /dev/null +++ b/resources/data/ic74/4X2IGate_LS.package @@ -0,0 +1,22 @@ + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC00.package b/resources/data/ic74/74HC00.package new file mode 100644 index 0000000..bd9b293 --- /dev/null +++ b/resources/data/ic74/74HC00.package @@ -0,0 +1,40 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC00.subcircuit b/resources/data/ic74/74HC00.subcircuit new file mode 100644 index 0000000..34ce9e6 --- /dev/null +++ b/resources/data/ic74/74HC00.subcircuit @@ -0,0 +1,84 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC00_LS.package b/resources/data/ic74/74HC00_LS.package new file mode 100644 index 0000000..8c170d3 --- /dev/null +++ b/resources/data/ic74/74HC00_LS.package @@ -0,0 +1,22 @@ + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC02.package b/resources/data/ic74/74HC02.package new file mode 100644 index 0000000..68ed194 --- /dev/null +++ b/resources/data/ic74/74HC02.package @@ -0,0 +1,40 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC02.subcircuit b/resources/data/ic74/74HC02.subcircuit new file mode 100644 index 0000000..14b376d --- /dev/null +++ b/resources/data/ic74/74HC02.subcircuit @@ -0,0 +1,84 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC02_LS.package b/resources/data/ic74/74HC02_LS.package new file mode 100644 index 0000000..4f0c4e5 --- /dev/null +++ b/resources/data/ic74/74HC02_LS.package @@ -0,0 +1,22 @@ + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC04.package b/resources/data/ic74/74HC04.package new file mode 100644 index 0000000..fc6c144 --- /dev/null +++ b/resources/data/ic74/74HC04.package @@ -0,0 +1,40 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC04.subcircuit b/resources/data/ic74/74HC04.subcircuit new file mode 100644 index 0000000..d52a22a --- /dev/null +++ b/resources/data/ic74/74HC04.subcircuit @@ -0,0 +1,102 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC04_LS.package b/resources/data/ic74/74HC04_LS.package new file mode 100644 index 0000000..6054f88 --- /dev/null +++ b/resources/data/ic74/74HC04_LS.package @@ -0,0 +1,22 @@ + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC08.package b/resources/data/ic74/74HC08.package new file mode 100644 index 0000000..c19f6fd --- /dev/null +++ b/resources/data/ic74/74HC08.package @@ -0,0 +1,40 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC08.subcircuit b/resources/data/ic74/74HC08.subcircuit new file mode 100644 index 0000000..65d3e5d --- /dev/null +++ b/resources/data/ic74/74HC08.subcircuit @@ -0,0 +1,84 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC107.package b/resources/data/ic74/74HC107.package new file mode 100644 index 0000000..96ce6ae --- /dev/null +++ b/resources/data/ic74/74HC107.package @@ -0,0 +1,24 @@ + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ic74/74HC107.subcircuit b/resources/data/ic74/74HC107.subcircuit new file mode 100644 index 0000000..d2ceea2 --- /dev/null +++ b/resources/data/ic74/74HC107.subcircuit @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ic74/74HC107_LS.package b/resources/data/ic74/74HC107_LS.package new file mode 100644 index 0000000..3e19075 --- /dev/null +++ b/resources/data/ic74/74HC107_LS.package @@ -0,0 +1,23 @@ + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC109.package b/resources/data/ic74/74HC109.package new file mode 100644 index 0000000..36add89 --- /dev/null +++ b/resources/data/ic74/74HC109.package @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC109.subcircuit b/resources/data/ic74/74HC109.subcircuit new file mode 100644 index 0000000..736d0db --- /dev/null +++ b/resources/data/ic74/74HC109.subcircuit @@ -0,0 +1,74 @@ + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ic74/74HC109_LS.package b/resources/data/ic74/74HC109_LS.package new file mode 100644 index 0000000..7ef98d4 --- /dev/null +++ b/resources/data/ic74/74HC109_LS.package @@ -0,0 +1,25 @@ + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC112.package b/resources/data/ic74/74HC112.package new file mode 100644 index 0000000..2be8649 --- /dev/null +++ b/resources/data/ic74/74HC112.package @@ -0,0 +1,25 @@ + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC112.subcircuit b/resources/data/ic74/74HC112.subcircuit new file mode 100644 index 0000000..fd2a85a --- /dev/null +++ b/resources/data/ic74/74HC112.subcircuit @@ -0,0 +1,43 @@ + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ic74/74HC112_LS.package b/resources/data/ic74/74HC112_LS.package new file mode 100644 index 0000000..6b1f23d --- /dev/null +++ b/resources/data/ic74/74HC112_LS.package @@ -0,0 +1,25 @@ + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC113.package b/resources/data/ic74/74HC113.package new file mode 100644 index 0000000..cbbb674 --- /dev/null +++ b/resources/data/ic74/74HC113.package @@ -0,0 +1,23 @@ + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC113.simu b/resources/data/ic74/74HC113.simu new file mode 100644 index 0000000..e98e28c --- /dev/null +++ b/resources/data/ic74/74HC113.simu @@ -0,0 +1,105 @@ + + +Package-18: + + +Package-17: + + +Probe-16: + + +Fixed Voltage-15: + + +Rail-14: + + +Probe-13: + + +Fixed Voltage-12: + + +FlipFlopJK-11: + + +Fixed Voltage-10: + + +Fixed Voltage-9: + + +FlipFlopJK-8: + + +Probe-7: + + +Probe-6: + + +Rail-5: + + +Fixed Voltage-4: + + +Fixed Voltage-3: + + +Fixed Voltage-2: + + +Fixed Voltage-1: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +Connector-39: + + +Connector-41: + + +Connector-43: + + +Connector-45: + + +PlotterWidget-47: + + +SerialPortWidget-48: + + + diff --git a/resources/data/ic74/74HC113.subcircuit b/resources/data/ic74/74HC113.subcircuit new file mode 100644 index 0000000..ef825fd --- /dev/null +++ b/resources/data/ic74/74HC113.subcircuit @@ -0,0 +1,56 @@ + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ic74/74HC113_LS.package b/resources/data/ic74/74HC113_LS.package new file mode 100644 index 0000000..2357ce5 --- /dev/null +++ b/resources/data/ic74/74HC113_LS.package @@ -0,0 +1,23 @@ + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC137.package b/resources/data/ic74/74HC137.package new file mode 100644 index 0000000..8372173 --- /dev/null +++ b/resources/data/ic74/74HC137.package @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC137.subcircuit b/resources/data/ic74/74HC137.subcircuit new file mode 100644 index 0000000..10e0345 --- /dev/null +++ b/resources/data/ic74/74HC137.subcircuit @@ -0,0 +1,127 @@ + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ic74/74HC137_LS.package b/resources/data/ic74/74HC137_LS.package new file mode 100644 index 0000000..51a3797 --- /dev/null +++ b/resources/data/ic74/74HC137_LS.package @@ -0,0 +1,25 @@ + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC138.package b/resources/data/ic74/74HC138.package new file mode 100644 index 0000000..8d8a7eb --- /dev/null +++ b/resources/data/ic74/74HC138.package @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC138.subcircuit b/resources/data/ic74/74HC138.subcircuit new file mode 100644 index 0000000..9f60c6d --- /dev/null +++ b/resources/data/ic74/74HC138.subcircuit @@ -0,0 +1,127 @@ + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ic74/74HC138_LS.package b/resources/data/ic74/74HC138_LS.package new file mode 100644 index 0000000..842b3fa --- /dev/null +++ b/resources/data/ic74/74HC138_LS.package @@ -0,0 +1,25 @@ + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC139.package b/resources/data/ic74/74HC139.package new file mode 100644 index 0000000..54f1917 --- /dev/null +++ b/resources/data/ic74/74HC139.package @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC139.subcircuit b/resources/data/ic74/74HC139.subcircuit new file mode 100644 index 0000000..05e808f --- /dev/null +++ b/resources/data/ic74/74HC139.subcircuit @@ -0,0 +1,74 @@ + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ic74/74HC139_LS.package b/resources/data/ic74/74HC139_LS.package new file mode 100644 index 0000000..24f707a --- /dev/null +++ b/resources/data/ic74/74HC139_LS.package @@ -0,0 +1,25 @@ + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC147.package b/resources/data/ic74/74HC147.package new file mode 100644 index 0000000..9bc456f --- /dev/null +++ b/resources/data/ic74/74HC147.package @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC147.subcircuit b/resources/data/ic74/74HC147.subcircuit new file mode 100644 index 0000000..bf5a439 --- /dev/null +++ b/resources/data/ic74/74HC147.subcircuit @@ -0,0 +1,53 @@ + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ic74/74HC147_LS.package b/resources/data/ic74/74HC147_LS.package new file mode 100644 index 0000000..26228c8 --- /dev/null +++ b/resources/data/ic74/74HC147_LS.package @@ -0,0 +1,24 @@ + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC148.package b/resources/data/ic74/74HC148.package new file mode 100644 index 0000000..48cfa5f --- /dev/null +++ b/resources/data/ic74/74HC148.package @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC148.subcircuit b/resources/data/ic74/74HC148.subcircuit new file mode 100644 index 0000000..709b5ea --- /dev/null +++ b/resources/data/ic74/74HC148.subcircuit @@ -0,0 +1,139 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ic74/74HC148_LS.package b/resources/data/ic74/74HC148_LS.package new file mode 100644 index 0000000..74aae52 --- /dev/null +++ b/resources/data/ic74/74HC148_LS.package @@ -0,0 +1,25 @@ + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC151.package b/resources/data/ic74/74HC151.package new file mode 100644 index 0000000..940626e --- /dev/null +++ b/resources/data/ic74/74HC151.package @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ic74/74HC151.subcircuit b/resources/data/ic74/74HC151.subcircuit new file mode 100644 index 0000000..dc84c01 --- /dev/null +++ b/resources/data/ic74/74HC151.subcircuit @@ -0,0 +1,62 @@ + + + + + + + + + + + + \ No newline at end of file diff --git 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b/resources/data/keys/8Nchkey.package @@ -0,0 +1,26 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/keys/8Nchkey.subcircuit b/resources/data/keys/8Nchkey.subcircuit new file mode 100644 index 0000000..a892f4b --- /dev/null +++ b/resources/data/keys/8Nchkey.subcircuit @@ -0,0 +1,93 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/keys/8npnkey.subcircuit b/resources/data/keys/8npnkey.subcircuit new file mode 100644 index 0000000..02e931b --- /dev/null +++ b/resources/data/keys/8npnkey.subcircuit @@ -0,0 +1,141 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/keys/DG401.package b/resources/data/keys/DG401.package new file mode 100644 index 0000000..b94e1bd --- /dev/null +++ b/resources/data/keys/DG401.package @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/keys/DG401.subcircuit b/resources/data/keys/DG401.subcircuit new file mode 100644 index 0000000..6913fbe --- /dev/null +++ b/resources/data/keys/DG401.subcircuit @@ -0,0 +1,36 @@ + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/keys/DG401_LS.package b/resources/data/keys/DG401_LS.package new file mode 100644 index 0000000..d9670e8 --- /dev/null +++ b/resources/data/keys/DG401_LS.package @@ -0,0 +1,17 @@ + + + + + + + + + + + + + + + + + diff --git a/resources/data/keys/DG403.package b/resources/data/keys/DG403.package new file mode 100644 index 0000000..a07b9c8 --- /dev/null +++ b/resources/data/keys/DG403.package @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/keys/DG403.subcircuit b/resources/data/keys/DG403.subcircuit new file mode 100644 index 0000000..5e2671b --- /dev/null +++ b/resources/data/keys/DG403.subcircuit @@ -0,0 +1,66 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/keys/DG403_LS.package b/resources/data/keys/DG403_LS.package new file mode 100644 index 0000000..9a4817b --- /dev/null +++ b/resources/data/keys/DG403_LS.package @@ -0,0 +1,21 @@ + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/keys/DG405.package b/resources/data/keys/DG405.package new file mode 100644 index 0000000..3eebf90 --- /dev/null +++ b/resources/data/keys/DG405.package @@ -0,0 +1,27 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/keys/DG405.subcircuit b/resources/data/keys/DG405.subcircuit new file mode 100644 index 0000000..e41de11 --- /dev/null +++ b/resources/data/keys/DG405.subcircuit @@ -0,0 +1,66 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/keys/DG405_LS.package b/resources/data/keys/DG405_LS.package new file mode 100644 index 0000000..9a4817b --- /dev/null +++ b/resources/data/keys/DG405_LS.package @@ -0,0 +1,21 @@ + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/keys/ULN2804.package b/resources/data/keys/ULN2804.package new file mode 100644 index 0000000..c67b60c --- /dev/null +++ b/resources/data/keys/ULN2804.package @@ -0,0 +1,26 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/keys/ULN2804.subcircuit b/resources/data/keys/ULN2804.subcircuit new file mode 100644 index 0000000..82c5acc --- /dev/null +++ b/resources/data/keys/ULN2804.subcircuit @@ -0,0 +1,125 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/pic/dip08a.package b/resources/data/pic/dip08a.package new file mode 100644 index 0000000..ab07aca --- /dev/null +++ b/resources/data/pic/dip08a.package @@ -0,0 +1,40 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + dip08a + __ __ + Vdd -->| |<-- Vss + GP5 <->| |<-> GP0 + GP4 <->| |<-> GP1 + GP3 -->|_____|<-> GP2 diff --git a/resources/data/pic/pic10f200.data b/resources/data/pic/pic10f200.data new file mode 100644 index 0000000..26aa326 --- /dev/null +++ b/resources/data/pic/pic10f200.data @@ -0,0 +1,28 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=4 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +OSCCAL EQU 5 +GPIO EQU 6 diff --git a/resources/data/pic/pic10f200.package b/resources/data/pic/pic10f200.package new file mode 100644 index 0000000..c347c9a --- /dev/null +++ b/resources/data/pic/pic10f200.package @@ -0,0 +1,35 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic10f204.data b/resources/data/pic/pic10f204.data new file mode 100644 index 0000000..6d2c154 --- /dev/null +++ b/resources/data/pic/pic10f204.data @@ -0,0 +1,29 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=4 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +OSCCAL EQU 5 +GPIO EQU 6 +CMCON0 EQU 7 diff --git a/resources/data/pic/pic10f220.data b/resources/data/pic/pic10f220.data new file mode 100644 index 0000000..71661c3 --- /dev/null +++ b/resources/data/pic/pic10f220.data @@ -0,0 +1,30 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=8 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +OSCCAL EQU 5 +GPIO EQU 6 +ADCON0 EQU 7 +ADRES EQU 8 diff --git a/resources/data/pic/pic12c508.data b/resources/data/pic/pic12c508.data new file mode 100644 index 0000000..6ce99dd --- /dev/null +++ b/resources/data/pic/pic12c508.data @@ -0,0 +1,10 @@ + +MaxMHz=4 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +OSCCAL EQU 5 +GPIO EQU 6 diff --git a/resources/data/pic/pic12f1822.data b/resources/data/pic/pic12f1822.data new file mode 100644 index 0000000..717c34b --- /dev/null +++ b/resources/data/pic/pic12f1822.data @@ -0,0 +1,138 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=32 + +INDF0 EQU 0 +INDF1 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR0 EQU 4 +FSR0L EQU 4 +FSR0H EQU 5 +FSR1 EQU 6 +FSR1L EQU 6 +FSR1H EQU 7 +BSR EQU 8 +WREG EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PORTA EQU 12 +PIR1 EQU 17 +PIR2 EQU 18 +TMR0 EQU 21 +TMR1 EQU 22 +TMR1L EQU 22 +TMR1H EQU 23 +T1CON EQU 24 +T1GCON EQU 25 +TMR2 EQU 26 +PR2 EQU 27 +T2CON EQU 28 +CPSCON0 EQU 30 +CPSCON1 EQU 31 +TRISA EQU 140 +PIE1 EQU 145 +PIE2 EQU 146 +OPTION_REG EQU 149 +PCON EQU 150 +WDTCON EQU 151 +OSCTUNE EQU 152 +OSCCON EQU 153 +OSCSTAT EQU 154 +ADRES EQU 155 +ADRESL EQU 155 +ADRESH EQU 156 +ADCON0 EQU 157 +ADCON1 EQU 158 +LATA EQU 268 +CM1CON0 EQU 273 +CM1CON1 EQU 274 +CMOUT EQU 277 +BORCON EQU 278 +FVRCON EQU 279 +DACCON0 EQU 280 +DACCON1 EQU 281 +SRCON0 EQU 282 +SRCON1 EQU 283 +APFCON EQU 285 +APFCON0 EQU 285 +ANSELA EQU 396 +EEADR EQU 401 +EEADRL EQU 401 +EEADRH EQU 402 +EEDAT EQU 403 +EEDATL EQU 403 +EEDATH EQU 404 +EECON1 EQU 405 +EECON2 EQU 406 +RCREG EQU 409 +TXREG EQU 410 +SP1BRG EQU 411 +SP1BRGL EQU 411 +SPBRG EQU 411 +SPBRGL EQU 411 +SP1BRGH EQU 412 +SPBRGH EQU 412 +RCSTA EQU 413 +TXSTA EQU 414 +BAUDCON EQU 415 +WPUA EQU 524 +SSP1BUF EQU 529 +SSPBUF EQU 529 +SSP1ADD EQU 530 +SSPADD EQU 530 +SSP1MSK EQU 531 +SSPMSK EQU 531 +SSP1STAT EQU 532 +SSPSTAT EQU 532 +SSP1CON1 EQU 533 +SSPCON EQU 533 +SSPCON1 EQU 533 +SSP1CON2 EQU 534 +SSPCON2 EQU 534 +SSP1CON3 EQU 535 +SSPCON3 EQU 535 +CCPR1 EQU 657 +CCPR1L EQU 657 +CCPR1H EQU 658 +CCP1CON EQU 659 +PWM1CON EQU 660 +CCP1AS EQU 661 +ECCP1AS EQU 661 +PSTR1CON EQU 662 +IOCAP EQU 913 +IOCAN EQU 914 +IOCAF EQU 915 +CLKRCON EQU 922 +MDCON EQU 924 +MDSRC EQU 925 +MDCARL EQU 926 +MDCARH EQU 927 +STATUS_SHAD EQU 4068 +WREG_SHAD EQU 4069 +BSR_SHAD EQU 4070 +PCLATH_SHAD EQU 4071 +FSR0L_SHAD EQU 4072 +FSR0H_SHAD EQU 4073 +FSR1L_SHAD EQU 4074 +FSR1H_SHAD EQU 4075 +STKPTR EQU 4077 +TOSL EQU 4078 +TOSH EQU 4079 diff --git a/resources/data/pic/pic12f1822.package b/resources/data/pic/pic12f1822.package new file mode 100644 index 0000000..565bcf7 --- /dev/null +++ b/resources/data/pic/pic12f1822.package @@ -0,0 +1,34 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic12f1840.data b/resources/data/pic/pic12f1840.data new file mode 100644 index 0000000..5be5f2a --- /dev/null +++ b/resources/data/pic/pic12f1840.data @@ -0,0 +1,121 @@ + +MaxMHz=32 + +INDF0 EQU 0 +INDF1 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR0 EQU 4 +FSR0L EQU 4 +FSR0H EQU 5 +FSR1 EQU 6 +FSR1L EQU 6 +FSR1H EQU 7 +BSR EQU 8 +WREG EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PORTA EQU 12 +PIR1 EQU 17 +PIR2 EQU 18 +TMR0 EQU 21 +TMR1 EQU 22 +TMR1L EQU 22 +TMR1H EQU 23 +T1CON EQU 24 +T1GCON EQU 25 +TMR2 EQU 26 +PR2 EQU 27 +T2CON EQU 28 +CPSCON0 EQU 30 +CPSCON1 EQU 31 +TRISA EQU 140 +PIE1 EQU 145 +PIE2 EQU 146 +OPTION_REG EQU 149 +PCON EQU 150 +WDTCON EQU 151 +OSCTUNE EQU 152 +OSCCON EQU 153 +OSCSTAT EQU 154 +ADRES EQU 155 +ADRESL EQU 155 +ADRESH EQU 156 +ADCON0 EQU 157 +ADCON1 EQU 158 +LATA EQU 268 +CM1CON0 EQU 273 +CM1CON1 EQU 274 +CMOUT EQU 277 +BORCON EQU 278 +FVRCON EQU 279 +DACCON0 EQU 280 +DACCON1 EQU 281 +SRCON0 EQU 282 +SRCON1 EQU 283 +APFCON EQU 285 +APFCON0 EQU 285 +ANSELA EQU 396 +EEADR EQU 401 +EEADRL EQU 401 +EEADRH EQU 402 +EEDAT EQU 403 +EEDATL EQU 403 +EEDATH EQU 404 +EECON1 EQU 405 +EECON2 EQU 406 +VREGCON EQU 407 +RCREG EQU 409 +TXREG EQU 410 +SP1BRG EQU 411 +SP1BRGL EQU 411 +SPBRG EQU 411 +SPBRGL EQU 411 +SP1BRGH EQU 412 +SPBRGH EQU 412 +RCSTA EQU 413 +TXSTA EQU 414 +BAUDCON EQU 415 +WPUA EQU 524 +SSP1BUF EQU 529 +SSPBUF EQU 529 +SSP1ADD EQU 530 +SSPADD EQU 530 +SSP1MSK EQU 531 +SSPMSK EQU 531 +SSP1STAT EQU 532 +SSPSTAT EQU 532 +SSP1CON1 EQU 533 +SSPCON EQU 533 +SSPCON1 EQU 533 +SSP1CON2 EQU 534 +SSPCON2 EQU 534 +SSP1CON3 EQU 535 +SSPCON3 EQU 535 +CCPR1 EQU 657 +CCPR1L EQU 657 +CCPR1H EQU 658 +CCP1CON EQU 659 +PWM1CON EQU 660 +CCP1AS EQU 661 +ECCP1AS EQU 661 +PSTR1CON EQU 662 +IOCAP EQU 913 +IOCAN EQU 914 +IOCAF EQU 915 +CLKRCON EQU 922 +MDCON EQU 924 +MDSRC EQU 925 +MDCARL EQU 926 +MDCARH EQU 927 +STATUS_SHAD EQU 4068 +WREG_SHAD EQU 4069 +BSR_SHAD EQU 4070 +PCLATH_SHAD EQU 4071 +FSR0L_SHAD EQU 4072 +FSR0H_SHAD EQU 4073 +FSR1L_SHAD EQU 4074 +FSR1H_SHAD EQU 4075 +STKPTR EQU 4077 +TOSL EQU 4078 +TOSH EQU 4079 diff --git a/resources/data/pic/pic12f510.data b/resources/data/pic/pic12f510.data new file mode 100644 index 0000000..72fa934 --- /dev/null +++ b/resources/data/pic/pic12f510.data @@ -0,0 +1,31 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=8 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +OSCCAL EQU 5 +GPIO EQU 6 +CM1CON0 EQU 7 +ADCON0 EQU 8 +ADRES EQU 9 diff --git a/resources/data/pic/pic12f629.data b/resources/data/pic/pic12f629.data new file mode 100644 index 0000000..e46da86 --- /dev/null +++ b/resources/data/pic/pic12f629.data @@ -0,0 +1,48 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +GPIO EQU 5 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +CMCON EQU 25 +OPTION_REG EQU 129 +TRISIO EQU 133 +PIE1 EQU 140 +PCON EQU 142 +OSCCAL EQU 144 +WPU EQU 149 +IOCB EQU 150 +IOC EQU 150 +VRCON EQU 153 +EEDATA EQU 154 +EEDAT EQU 154 +EEADR EQU 155 +EECON1 EQU 156 +EECON2 EQU 157 diff --git a/resources/data/pic/pic12f629.package b/resources/data/pic/pic12f629.package new file mode 100644 index 0000000..9a713f1 --- /dev/null +++ b/resources/data/pic/pic12f629.package @@ -0,0 +1,34 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic12f675.data b/resources/data/pic/pic12f675.data new file mode 100644 index 0000000..db26e25 --- /dev/null +++ b/resources/data/pic/pic12f675.data @@ -0,0 +1,52 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +GPIO EQU 5 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +CMCON EQU 25 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISIO EQU 133 +PIE1 EQU 140 +PCON EQU 142 +OSCCAL EQU 144 +WPU EQU 149 +IOC EQU 150 +IOCB EQU 150 +VRCON EQU 153 +EEDATA EQU 154 +EEDAT EQU 154 +EEADR EQU 155 +EECON1 EQU 156 +EECON2 EQU 157 +ADRESL EQU 158 +ANSEL EQU 159 diff --git a/resources/data/pic/pic12f683.data b/resources/data/pic/pic12f683.data new file mode 100644 index 0000000..f41172b --- /dev/null +++ b/resources/data/pic/pic12f683.data @@ -0,0 +1,62 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +GPIO EQU 5 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +CCPR1L EQU 19 +CCPR1H EQU 20 +CCP1CON EQU 21 +WDTCON EQU 24 +CMCON0 EQU 25 +CMCON1 EQU 26 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISIO EQU 133 +PIE1 EQU 140 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +PR2 EQU 146 +WPU EQU 149 +WPUA EQU 149 +IOC EQU 150 +IOCA EQU 150 +VRCON EQU 153 +EEDATA EQU 154 +EEDAT EQU 154 +EEADR EQU 155 +EECON1 EQU 156 +EECON2 EQU 157 +ADRESL EQU 158 +ANSEL EQU 159 diff --git a/resources/data/pic/pic16c54.data b/resources/data/pic/pic16c54.data new file mode 100644 index 0000000..afee897 --- /dev/null +++ b/resources/data/pic/pic16c54.data @@ -0,0 +1,28 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 diff --git a/resources/data/pic/pic16c54.package b/resources/data/pic/pic16c54.package new file mode 100644 index 0000000..1c36f3b --- /dev/null +++ b/resources/data/pic/pic16c54.package @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic16c61.data b/resources/data/pic/pic16c61.data new file mode 100644 index 0000000..c056a6c --- /dev/null +++ b/resources/data/pic/pic16c61.data @@ -0,0 +1,33 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PCLATH EQU 10 +INTCON EQU 11 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 diff --git a/resources/data/pic/pic16c62.data b/resources/data/pic/pic16c62.data new file mode 100644 index 0000000..54c9b1e --- /dev/null +++ b/resources/data/pic/pic16c62.data @@ -0,0 +1,51 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +PIE1 EQU 140 +PCON EQU 142 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 diff --git a/resources/data/pic/pic16c63.data b/resources/data/pic/pic16c63.data new file mode 100644 index 0000000..b753a69 --- /dev/null +++ b/resources/data/pic/pic16c63.data @@ -0,0 +1,61 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +CCPR2L EQU 27 +CCPR2H EQU 28 +CCP2CON EQU 29 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +TXSTA EQU 152 +SPBRG EQU 153 diff --git a/resources/data/pic/pic16c64.data b/resources/data/pic/pic16c64.data new file mode 100644 index 0000000..b6577da --- /dev/null +++ b/resources/data/pic/pic16c64.data @@ -0,0 +1,55 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PORTD EQU 8 +PORTE EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +TRISD EQU 136 +TRISE EQU 137 +PIE1 EQU 140 +PCON EQU 142 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 diff --git a/resources/data/pic/pic16c65.data b/resources/data/pic/pic16c65.data new file mode 100644 index 0000000..3ad82d2 --- /dev/null +++ b/resources/data/pic/pic16c65.data @@ -0,0 +1,65 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PORTD EQU 8 +PORTE EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +CCPR2L EQU 27 +CCPR2H EQU 28 +CCP2CON EQU 29 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +TRISD EQU 136 +TRISE EQU 137 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +TXSTA EQU 152 +SPBRG EQU 153 diff --git a/resources/data/pic/pic16c71.data b/resources/data/pic/pic16c71.data new file mode 100644 index 0000000..addb42b --- /dev/null +++ b/resources/data/pic/pic16c71.data @@ -0,0 +1,18 @@ + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +ADCON0 EQU 8 +ADRES EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +ADCON1 EQU 136 diff --git a/resources/data/pic/pic16c712.data b/resources/data/pic/pic16c712.data new file mode 100644 index 0000000..8354b14 --- /dev/null +++ b/resources/data/pic/pic16c712.data @@ -0,0 +1,34 @@ + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +DATACCP EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +TMR1 EQU 14 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +CCPR1 EQU 21 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +ADRES EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISCCP EQU 135 +PIE1 EQU 140 +PCON EQU 142 +PR2 EQU 146 +ADCON1 EQU 159 diff --git a/resources/data/pic/pic16c72.data b/resources/data/pic/pic16c72.data new file mode 100644 index 0000000..6720e84 --- /dev/null +++ b/resources/data/pic/pic16c72.data @@ -0,0 +1,37 @@ +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +TMR1 EQU 14 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1 EQU 21 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +ADRES EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +PIE1 EQU 140 +PCON EQU 142 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +ADCON1 EQU 159 diff --git a/resources/data/pic/pic16c73.data b/resources/data/pic/pic16c73.data new file mode 100644 index 0000000..5b11507 --- /dev/null +++ b/resources/data/pic/pic16c73.data @@ -0,0 +1,64 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +CCPR2L EQU 27 +CCPR2H EQU 28 +CCP2CON EQU 29 +ADRES EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +TXSTA EQU 152 +SPBRG EQU 153 +ADCON1 EQU 159 diff --git a/resources/data/pic/pic16c74.data b/resources/data/pic/pic16c74.data new file mode 100644 index 0000000..6e8f978 --- /dev/null +++ b/resources/data/pic/pic16c74.data @@ -0,0 +1,68 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=24 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PORTD EQU 8 +PORTE EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +CCPR2L EQU 27 +CCPR2H EQU 28 +CCP2CON EQU 29 +ADRES EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +TRISD EQU 136 +TRISE EQU 137 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +TXSTA EQU 152 +SPBRG EQU 153 +ADCON1 EQU 159 diff --git a/resources/data/pic/pic16c84.data b/resources/data/pic/pic16c84.data new file mode 100644 index 0000000..e2b246e --- /dev/null +++ b/resources/data/pic/pic16c84.data @@ -0,0 +1,19 @@ + +MaxMHz=10 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +EEDATA EQU 8 +EEADR EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +EECON1 EQU 136 +EECON2 EQU 137 diff --git a/resources/data/pic/pic16cr83.data b/resources/data/pic/pic16cr83.data new file mode 100644 index 0000000..e2b246e --- /dev/null +++ b/resources/data/pic/pic16cr83.data @@ -0,0 +1,19 @@ + +MaxMHz=10 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +EEDATA EQU 8 +EEADR EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +EECON1 EQU 136 +EECON2 EQU 137 diff --git a/resources/data/pic/pic16f1503.data b/resources/data/pic/pic16f1503.data new file mode 100644 index 0000000..16feb78 --- /dev/null +++ b/resources/data/pic/pic16f1503.data @@ -0,0 +1,149 @@ + +MaxMHz=20 + +INDF0 EQU 0 +INDF1 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR0 EQU 4 +FSR0L EQU 4 +FSR0H EQU 5 +FSR1 EQU 6 +FSR1L EQU 6 +FSR1H EQU 7 +BSR EQU 8 +WREG EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PORTA EQU 12 +PORTC EQU 14 +PIR1 EQU 17 +PIR2 EQU 18 +PIR3 EQU 19 +TMR0 EQU 21 +TMR1 EQU 22 +TMR1L EQU 22 +TMR1H EQU 23 +T1CON EQU 24 +T1GCON EQU 25 +TMR2 EQU 26 +PR2 EQU 27 +T2CON EQU 28 +TRISA EQU 140 +TRISC EQU 142 +PIE1 EQU 145 +PIE2 EQU 146 +PIE3 EQU 147 +OPTION_REG EQU 149 +PCON EQU 150 +WDTCON EQU 151 +OSCCON EQU 153 +OSCSTAT EQU 154 +ADRES EQU 155 +ADRESL EQU 155 +ADRESH EQU 156 +ADCON0 EQU 157 +ADCON1 EQU 158 +ADCON2 EQU 159 +LATA EQU 268 +LATC EQU 270 +CM1CON0 EQU 273 +CM1CON1 EQU 274 +CM2CON0 EQU 275 +CM2CON1 EQU 276 +CMOUT EQU 277 +BORCON EQU 278 +FVRCON EQU 279 +DACCON0 EQU 280 +DACCON1 EQU 281 +APFCON EQU 285 +ANSELA EQU 396 +ANSELC EQU 398 +PMADR EQU 401 +PMADRL EQU 401 +PMADRH EQU 402 +PMDAT EQU 403 +PMDATL EQU 403 +PMDATH EQU 404 +PMCON1 EQU 405 +PMCON2 EQU 406 +VREGCON EQU 407 +WPUA EQU 524 +SSP1BUF EQU 529 +SSPBUF EQU 529 +SSP1ADD EQU 530 +SSPADD EQU 530 +SSP1MSK EQU 531 +SSPMSK EQU 531 +SSP1STAT EQU 532 +SSPSTAT EQU 532 +SSP1CON1 EQU 533 +SSPCON EQU 533 +SSPCON1 EQU 533 +SSP1CON2 EQU 534 +SSPCON2 EQU 534 +SSP1CON3 EQU 535 +SSPCON3 EQU 535 +IOCAP EQU 913 +IOCAN EQU 914 +IOCAF EQU 915 +NCO1ACC EQU 1176 +NCO1ACCL EQU 1176 +NCO1ACCH EQU 1177 +NCO1ACCU EQU 1178 +NCO1INC EQU 1179 +NCO1INCL EQU 1179 +NCO1INCH EQU 1180 +NCO1INCU EQU 1181 +NCO1CON EQU 1182 +NCO1CLK EQU 1183 +PWM1DCL EQU 1553 +PWM1DCH EQU 1554 +PWM1CON EQU 1555 +PWM1CON0 EQU 1555 +PWM2DCL EQU 1556 +PWM2DCH EQU 1557 +PWM2CON EQU 1558 +PWM2CON0 EQU 1558 +PWM3DCL EQU 1559 +PWM3DCH EQU 1560 +PWM3CON EQU 1561 +PWM3CON0 EQU 1561 +PWM4DCL EQU 1562 +PWM4DCH EQU 1563 +PWM4CON EQU 1564 +PWM4CON0 EQU 1564 +CWG1DBR EQU 1681 +CWG1DBF EQU 1682 +CWG1CON0 EQU 1683 +CWG1CON1 EQU 1684 +CWG1CON2 EQU 1685 +CLCDATA EQU 3855 +CLC1CON EQU 3856 +CLC1POL EQU 3857 +CLC1SEL0 EQU 3858 +CLC1SEL1 EQU 3859 +CLC1GLS0 EQU 3860 +CLC1GLS1 EQU 3861 +CLC1GLS2 EQU 3862 +CLC1GLS3 EQU 3863 +CLC2CON EQU 3864 +CLC2POL EQU 3865 +CLC2SEL0 EQU 3866 +CLC2SEL1 EQU 3867 +CLC2GLS0 EQU 3868 +CLC2GLS1 EQU 3869 +CLC2GLS2 EQU 3870 +CLC2GLS3 EQU 3871 +BSR_ICDSHAD EQU 4067 +STATUS_SHAD EQU 4068 +WREG_SHAD EQU 4069 +BSR_SHAD EQU 4070 +PCLATH_SHAD EQU 4071 +FSR0L_SHAD EQU 4072 +FSR0H_SHAD EQU 4073 +FSR1L_SHAD EQU 4074 +FSR1H_SHAD EQU 4075 +STKPTR EQU 4077 +TOSL EQU 4078 +TOSH EQU 4079 diff --git a/resources/data/pic/pic16f1503.package b/resources/data/pic/pic16f1503.package new file mode 100644 index 0000000..ff62bea --- /dev/null +++ b/resources/data/pic/pic16f1503.package @@ -0,0 +1,43 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic16f1788.data b/resources/data/pic/pic16f1788.data new file mode 100644 index 0000000..f6e18c9 --- /dev/null +++ b/resources/data/pic/pic16f1788.data @@ -0,0 +1,346 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=32 + +INDF0 EQU 0 +INDF1 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR0 EQU 4 +FSR0L EQU 4 +FSR0H EQU 5 +FSR1 EQU 6 +FSR1L EQU 6 +FSR1H EQU 7 +BSR EQU 8 +WREG EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PORTA EQU 12 +PORTB EQU 13 +PORTC EQU 14 +PORTE EQU 16 +PIR1 EQU 17 +PIR2 EQU 18 +PIR3 EQU 19 +PIR4 EQU 20 +TMR0 EQU 21 +TMR1 EQU 22 +TMR1L EQU 22 +TMR1H EQU 23 +T1CON EQU 24 +T1GCON EQU 25 +TMR2 EQU 26 +PR2 EQU 27 +T2CON EQU 28 +TRISA EQU 140 +TRISB EQU 141 +TRISC EQU 142 +TRISE EQU 144 +PIE1 EQU 145 +PIE2 EQU 146 +PIE3 EQU 147 +PIE4 EQU 148 +OPTION_REG EQU 149 +PCON EQU 150 +WDTCON EQU 151 +OSCTUNE EQU 152 +OSCCON EQU 153 +OSCSTAT EQU 154 +ADRES EQU 155 +ADRESL EQU 155 +ADRESH EQU 156 +ADCON0 EQU 157 +ADCON1 EQU 158 +ADCON2 EQU 159 +LATA EQU 268 +LATB EQU 269 +LATC EQU 270 +CM1CON0 EQU 273 +CM1CON1 EQU 274 +CM2CON0 EQU 275 +CM2CON1 EQU 276 +CMOUT EQU 277 +BORCON EQU 278 +FVRCON EQU 279 +DAC1CON0 EQU 280 +DAC1CON1 EQU 281 +CM4CON0 EQU 282 +CM4CON1 EQU 283 +APFCON2 EQU 284 +APFCON EQU 285 +APFCON0 EQU 285 +APFCON1 EQU 285 +CM3CON0 EQU 286 +CM3CON1 EQU 287 +ANSELA EQU 396 +ANSELB EQU 397 +ANSELC EQU 398 +EEADR EQU 401 +EEADRL EQU 401 +EEADRH EQU 402 +EEDAT EQU 403 +EEDATL EQU 403 +EEDATH EQU 404 +EECON1 EQU 405 +EECON2 EQU 406 +VREGCON EQU 407 +RC1REG EQU 409 +RCREG EQU 409 +RCREG1 EQU 409 +TX1REG EQU 410 +TXREG EQU 410 +TXREG1 EQU 410 +SP1BRG EQU 411 +SP1BRGL EQU 411 +SPBRG EQU 411 +SPBRG1 EQU 411 +SPBRGL EQU 411 +SP1BRGH EQU 412 +SPBRGH EQU 412 +SPBRGH1 EQU 412 +RC1STA EQU 413 +RCSTA EQU 413 +RCSTA1 EQU 413 +TX1STA EQU 414 +TXSTA EQU 414 +TXSTA1 EQU 414 +BAUD1CON EQU 415 +BAUDCON EQU 415 +BAUDCON1 EQU 415 +BAUDCTL EQU 415 +BAUDCTL1 EQU 415 +WPUA EQU 524 +WPUB EQU 525 +WPUC EQU 526 +WPUE EQU 528 +SSP1BUF EQU 529 +SSPBUF EQU 529 +SSP1ADD EQU 530 +SSPADD EQU 530 +SSP1MSK EQU 531 +SSPMSK EQU 531 +SSP1STAT EQU 532 +SSPSTAT EQU 532 +SSP1CON EQU 533 +SSP1CON1 EQU 533 +SSPCON EQU 533 +SSPCON1 EQU 533 +SSP1CON2 EQU 534 +SSPCON2 EQU 534 +SSP1CON3 EQU 535 +SSPCON3 EQU 535 +ODCONA EQU 652 +ODCONB EQU 653 +ODCONC EQU 654 +CCPR1 EQU 657 +CCPR1L EQU 657 +CCPR1H EQU 658 +CCP1CON EQU 659 +CCPR2 EQU 664 +CCPR2L EQU 664 +CCPR2H EQU 665 +CCP2CON EQU 666 +SLRCONA EQU 780 +SLRCONB EQU 781 +SLRCONC EQU 782 +CCPR3 EQU 785 +CCPR3L EQU 785 +CCPR3H EQU 786 +CCP3CON EQU 787 +INLVLA EQU 908 +INLVLB EQU 909 +INLVLC EQU 910 +INLVLE EQU 912 +IOCAP EQU 913 +IOCAN EQU 914 +IOCAF EQU 915 +IOCBP EQU 916 +IOCBN EQU 917 +IOCBF EQU 918 +IOCCP EQU 919 +IOCCN EQU 920 +IOCCF EQU 921 +IOCEP EQU 925 +IOCEN EQU 926 +IOCEF EQU 927 +OPA1CON EQU 1297 +OPA2CON EQU 1299 +CLKRCON EQU 1306 +DAC2CON0 EQU 1425 +DAC2CON1 EQU 1426 +DAC2REF EQU 1426 +DAC3CON0 EQU 1427 +DAC3CON1 EQU 1428 +DAC3REF EQU 1428 +DAC4CON0 EQU 1429 +DAC4CON1 EQU 1430 +DAC4REF EQU 1430 +PSMC1CON EQU 3729 +PSMC1MDL EQU 3730 +PSMC1SYNC EQU 3731 +PSMC1CLK EQU 3732 +PSMC1OEN EQU 3733 +PSMC1POL EQU 3734 +PSMC1BLNK EQU 3735 +PSMC1REBS EQU 3736 +PSMC1FEBS EQU 3737 +PSMC1PHS EQU 3738 +PSMC1DCS EQU 3739 +PSMC1PRS EQU 3740 +PSMC1ASDC EQU 3741 +PSMC1ASDL EQU 3742 +PSMC1ASDS EQU 3743 +PSMC1INT EQU 3744 +PSMC1PH EQU 3745 +PSMC1PHL EQU 3745 +PSMC1PHH EQU 3746 +PSMC1DC EQU 3747 +PSMC1DCL EQU 3747 +PSMC1DCH EQU 3748 +PSMC1PR EQU 3749 +PSMC1PRL EQU 3749 +PSMC1PRH EQU 3750 +PSMC1TMR EQU 3751 +PSMC1TMRL EQU 3751 +PSMC1TMRH EQU 3752 +PSMC1DBR EQU 3753 +PSMC1DBF EQU 3754 +PSMC1BLKR EQU 3755 +PSMC1BLKF EQU 3756 +PSMC1FFA EQU 3757 +PSMC1STR0 EQU 3758 +PSMC1STR1 EQU 3759 +PSMC2CON EQU 3761 +PSMC2MDL EQU 3762 +PSMC2SYNC EQU 3763 +PSMC2CLK EQU 3764 +PSMC2OEN EQU 3765 +PSMC2POL EQU 3766 +PSMC2BLNK EQU 3767 +PSMC2REBS EQU 3768 +PSMC2FEBS EQU 3769 +PSMC2PHS EQU 3770 +PSMC2DCS EQU 3771 +PSMC2PRS EQU 3772 +PSMC2ASDC EQU 3773 +PSMC2ASDL EQU 3774 +PSMC2ASDS EQU 3775 +PSMC2INT EQU 3776 +PSMC2PH EQU 3777 +PSMC2PHL EQU 3777 +PSMC2PHH EQU 3778 +PSMC2DC EQU 3779 +PSMC2DCL EQU 3779 +PSMC2DCH EQU 3780 +PSMC2PR EQU 3781 +PSMC2PRL EQU 3781 +PSMC2PRH EQU 3782 +PSMC2TMR EQU 3783 +PSMC2TMRL EQU 3783 +PSMC2TMRH EQU 3784 +PSMC2DBR EQU 3785 +PSMC2DBF EQU 3786 +PSMC2BLKR EQU 3787 +PSMC2BLKF EQU 3788 +PSMC2FFA EQU 3789 +PSMC2STR0 EQU 3790 +PSMC2STR1 EQU 3791 +PSMC3CON EQU 3793 +PSMC3MDL EQU 3794 +PSMC3SYNC EQU 3795 +PSMC3CLK EQU 3796 +PSMC3OEN EQU 3797 +PSMC3POL EQU 3798 +PSMC3BLNK EQU 3799 +PSMC3REBS EQU 3800 +PSMC3FEBS EQU 3801 +PSMC3PHS EQU 3802 +PSMC3DCS EQU 3803 +PSMC3PRS EQU 3804 +PSMC3ASDC EQU 3805 +PSMC3ASDL EQU 3806 +PSMC3ASDS EQU 3807 +PSMC3INT EQU 3808 +PSMC3PH EQU 3809 +PSMC3PHL EQU 3809 +PSMC3PHH EQU 3810 +PSMC3DC EQU 3811 +PSMC3DCL EQU 3811 +PSMC3DCH EQU 3812 +PSMC3PR EQU 3813 +PSMC3PRL EQU 3813 +PSMC3PRH EQU 3814 +PSMC3TMR EQU 3815 +PSMC3TMRL EQU 3815 +PSMC3TMRH EQU 3816 +PSMC3DBR EQU 3817 +PSMC3DBF EQU 3818 +PSMC3BLKR EQU 3819 +PSMC3BLKF EQU 3820 +PSMC3FFA EQU 3821 +PSMC3STR0 EQU 3822 +PSMC3STR1 EQU 3823 +PSMC4CON EQU 3857 +PSMC4MDL EQU 3858 +PSMC4SYNC EQU 3859 +PSMC4CLK EQU 3860 +PSMC4OEN EQU 3861 +PSMC4POL EQU 3862 +PSMC4BLNK EQU 3863 +PSMC4REBS EQU 3864 +PSMC4FEBS EQU 3865 +PSMC4PHS EQU 3866 +PSMC4DCS EQU 3867 +PSMC4PRS EQU 3868 +PSMC4ASDC EQU 3869 +PSMC4ASDL EQU 3870 +PSMC4ASDS EQU 3871 +PSMC4INT EQU 3872 +PSMC4PH EQU 3873 +PSMC4PHL EQU 3873 +PSMC4PHH EQU 3874 +PSMC4DC EQU 3875 +PSMC4DCL EQU 3875 +PSMC4DCH EQU 3876 +PSMC4PR EQU 3877 +PSMC4PRL EQU 3877 +PSMC4PRH EQU 3878 +PSMC4TMR EQU 3879 +PSMC4TMRL EQU 3879 +PSMC4TMRH EQU 3880 +PSMC4DBR EQU 3881 +PSMC4DBF EQU 3882 +PSMC4BLKR EQU 3883 +PSMC4BLKF EQU 3884 +PSMC4FFA EQU 3885 +PSMC4STR0 EQU 3886 +PSMC4STR1 EQU 3887 +STATUS_SHAD EQU 4068 +WREG_SHAD EQU 4069 +BSR_SHAD EQU 4070 +PCLATH_SHAD EQU 4071 +FSR0L_SHAD EQU 4072 +FSR0H_SHAD EQU 4073 +FSR1L_SHAD EQU 4074 +FSR1H_SHAD EQU 4075 +STKPTR EQU 4077 +TOSL EQU 4078 +TOSH EQU 4079 diff --git a/resources/data/pic/pic16f1788.package b/resources/data/pic/pic16f1788.package new file mode 100644 index 0000000..901a7cd --- /dev/null +++ b/resources/data/pic/pic16f1788.package @@ -0,0 +1,60 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic16f1823.data b/resources/data/pic/pic16f1823.data new file mode 100644 index 0000000..7b798a6 --- /dev/null +++ b/resources/data/pic/pic16f1823.data @@ -0,0 +1,145 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License EQU or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful EQU # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not EQU see . # + # # + ########################################################################### + +MaxMHz=32 + +INDF0 EQU 0 +INDF1 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR0 EQU 4 +FSR0L EQU 4 +FSR0H EQU 5 +FSR1 EQU 6 +FSR1L EQU 6 +FSR1H EQU 7 +BSR EQU 8 +WREG EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PORTA EQU 12 +PORTC EQU 14 +PIR1 EQU 17 +PIR2 EQU 18 +TMR0 EQU 21 +TMR1 EQU 22 +TMR1L EQU 22 +TMR1H EQU 23 +T1CON EQU 24 +T1GCON EQU 25 +TMR2 EQU 26 +PR2 EQU 27 +T2CON EQU 28 +CPSCON0 EQU 30 +CPSCON1 EQU 31 +TRISA EQU 140 +TRISC EQU 142 +PIE1 EQU 145 +PIE2 EQU 146 +OPTION_REG EQU 149 +PCON EQU 150 +WDTCON EQU 151 +OSCTUNE EQU 152 +OSCCON EQU 153 +OSCSTAT EQU 154 +ADRES EQU 155 +ADRESL EQU 155 +ADRESH EQU 156 +ADCON0 EQU 157 +ADCON1 EQU 158 +LATA EQU 268 +LATC EQU 270 +CM1CON0 EQU 273 +CM1CON1 EQU 274 +CM2CON0 EQU 275 +CM2CON1 EQU 276 +CMOUT EQU 277 +BORCON EQU 278 +FVRCON EQU 279 +DACCON0 EQU 280 +DACCON1 EQU 281 +SRCON0 EQU 282 +SRCON1 EQU 283 +APFCON EQU 285 +APFCON0 EQU 285 +ANSELA EQU 396 +ANSELC EQU 398 +EEADR EQU 401 +EEADRL EQU 401 +EEADRH EQU 402 +EEDAT EQU 403 +EEDATL EQU 403 +EEDATH EQU 404 +EECON1 EQU 405 +EECON2 EQU 406 +RCREG EQU 409 +TXREG EQU 410 +SP1BRG EQU 411 +SP1BRGL EQU 411 +SPBRG EQU 411 +SPBRGL EQU 411 +SP1BRGH EQU 412 +SPBRGH EQU 412 +RCSTA EQU 413 +TXSTA EQU 414 +BAUDCON EQU 415 +WPUA EQU 524 +WPUC EQU 526 +SSP1BUF EQU 529 +SSPBUF EQU 529 +SSP1ADD EQU 530 +SSPADD EQU 530 +SSP1MSK EQU 531 +SSPMSK EQU 531 +SSP1STAT EQU 532 +SSPSTAT EQU 532 +SSP1CON1 EQU 533 +SSPCON EQU 533 +SSPCON1 EQU 533 +SSP1CON2 EQU 534 +SSPCON2 EQU 534 +SSP1CON3 EQU 535 +SSPCON3 EQU 535 +CCPR1 EQU 657 +CCPR1L EQU 657 +CCPR1H EQU 658 +CCP1CON EQU 659 +PWM1CON EQU 660 +CCP1AS EQU 661 +ECCP1AS EQU 661 +PSTR1CON EQU 662 +IOCAP EQU 913 +IOCAN EQU 914 +IOCAF EQU 915 +CLKRCON EQU 922 +MDCON EQU 924 +MDSRC EQU 925 +MDCARL EQU 926 +MDCARH EQU 927 +STATUS_SHAD EQU 4068 +WREG_SHAD EQU 4069 +BSR_SHAD EQU 4070 +PCLATH_SHAD EQU 4071 +FSR0L_SHAD EQU 4072 +FSR0H_SHAD EQU 4073 +FSR1L_SHAD EQU 4074 +FSR1H_SHAD EQU 4075 +STKPTR EQU 4077 +TOSL EQU 4078 +TOSH EQU 4079 diff --git a/resources/data/pic/pic16f1825.data b/resources/data/pic/pic16f1825.data new file mode 100644 index 0000000..5c9b763 --- /dev/null +++ b/resources/data/pic/pic16f1825.data @@ -0,0 +1,150 @@ + +MaxMHz=32 + +INDF0 EQU 0 +INDF1 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR0 EQU 4 +FSR0L EQU 4 +FSR0H EQU 5 +FSR1 EQU 6 +FSR1L EQU 6 +FSR1H EQU 7 +BSR EQU 8 +WREG EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PORTA EQU 12 +PORTC EQU 14 +PIR1 EQU 17 +PIR2 EQU 18 +PIR3 EQU 19 +TMR0 EQU 21 +TMR1 EQU 22 +TMR1L EQU 22 +TMR1H EQU 23 +T1CON EQU 24 +T1GCON EQU 25 +TMR2 EQU 26 +PR2 EQU 27 +T2CON EQU 28 +CPSCON0 EQU 30 +CPSCON1 EQU 31 +TRISA EQU 140 +TRISC EQU 142 +PIE1 EQU 145 +PIE2 EQU 146 +PIE3 EQU 147 +OPTION_REG EQU 149 +PCON EQU 150 +WDTCON EQU 151 +OSCTUNE EQU 152 +OSCCON EQU 153 +OSCSTAT EQU 154 +ADRES EQU 155 +ADRESL EQU 155 +ADRESH EQU 156 +ADCON0 EQU 157 +ADCON1 EQU 158 +LATA EQU 268 +LATC EQU 270 +CM1CON0 EQU 273 +CM1CON1 EQU 274 +CM2CON0 EQU 275 +CM2CON1 EQU 276 +CMOUT EQU 277 +BORCON EQU 278 +FVRCON EQU 279 +DACCON0 EQU 280 +DACCON1 EQU 281 +SRCON0 EQU 282 +SRCON1 EQU 283 +APFCON0 EQU 285 +APFCON1 EQU 286 +ANSELA EQU 396 +ANSELC EQU 398 +EEADR EQU 401 +EEADRL EQU 401 +EEADRH EQU 402 +EEDAT EQU 403 +EEDATL EQU 403 +EEDATH EQU 404 +EECON1 EQU 405 +EECON2 EQU 406 +RCREG EQU 409 +TXREG EQU 410 +SPBRG EQU 411 +SPBRGL EQU 411 +SPBRGH EQU 412 +RCSTA EQU 413 +TXSTA EQU 414 +BAUDCON EQU 415 +WPUA EQU 524 +WPUC EQU 526 +SSP1BUF EQU 529 +SSPBUF EQU 529 +SSP1ADD EQU 530 +SSPADD EQU 530 +SSP1MSK EQU 531 +SSPMSK EQU 531 +SSP1STAT EQU 532 +SSPSTAT EQU 532 +SSP1CON1 EQU 533 +SSPCON EQU 533 +SSPCON1 EQU 533 +SSP1CON2 EQU 534 +SSPCON2 EQU 534 +SSP1CON3 EQU 535 +SSPCON3 EQU 535 +CCPR1 EQU 657 +CCPR1L EQU 657 +CCPR1H EQU 658 +CCP1CON EQU 659 +PWM1CON EQU 660 +CCP1AS EQU 661 +ECCP1AS EQU 661 +PSTR1CON EQU 662 +CCPR2 EQU 664 +CCPR2L EQU 664 +CCPR2H EQU 665 +CCP2CON EQU 666 +PWM2CON EQU 667 +CCP2AS EQU 668 +PSTR2CON EQU 669 +CCPTMRS EQU 670 +CCPR3 EQU 785 +CCPR3L EQU 785 +CCPR3H EQU 786 +CCP3CON EQU 787 +CCPR4 EQU 792 +CCPR4L EQU 792 +CCPR4H EQU 793 +CCP4CON EQU 794 +INLVLA EQU 908 +INLVLC EQU 910 +IOCAP EQU 913 +IOCAN EQU 914 +IOCAF EQU 915 +CLKRCON EQU 922 +MDCON EQU 924 +MDSRC EQU 925 +MDCARL EQU 926 +MDCARH EQU 927 +TMR4 EQU 1045 +PR4 EQU 1046 +T4CON EQU 1047 +TMR6 EQU 1052 +PR6 EQU 1053 +T6CON EQU 1054 +STATUS_SHAD EQU 4068 +WREG_SHAD EQU 4069 +BSR_SHAD EQU 4070 +PCLATH_SHAD EQU 4071 +FSR0L_SHAD EQU 4072 +FSR0H_SHAD EQU 4073 +FSR1L_SHAD EQU 4074 +FSR1H_SHAD EQU 4075 +STKPTR EQU 4077 +TOSL EQU 4078 +TOSH EQU 4079 diff --git a/resources/data/pic/pic16f505.data b/resources/data/pic/pic16f505.data new file mode 100644 index 0000000..07d3ce0 --- /dev/null +++ b/resources/data/pic/pic16f505.data @@ -0,0 +1,29 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +OSCCAL EQU 5 +PORTB EQU 6 +PORTC EQU 7 diff --git a/resources/data/pic/pic16f627.data b/resources/data/pic/pic16f627.data new file mode 100644 index 0000000..d32c1e6 --- /dev/null +++ b/resources/data/pic/pic16f627.data @@ -0,0 +1,57 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +CMCON EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +PIE1 EQU 140 +PCON EQU 142 +PR2 EQU 146 +TXSTA EQU 152 +SPBRG EQU 153 +EEDATA EQU 154 +EEADR EQU 155 +EECON1 EQU 156 +EECON2 EQU 157 +VRCON EQU 159 + diff --git a/resources/data/pic/pic16f627.package b/resources/data/pic/pic16f627.package new file mode 100644 index 0000000..e33fd3c --- /dev/null +++ b/resources/data/pic/pic16f627.package @@ -0,0 +1,50 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic16f630.data b/resources/data/pic/pic16f630.data new file mode 100644 index 0000000..e583d99 --- /dev/null +++ b/resources/data/pic/pic16f630.data @@ -0,0 +1,52 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +TMR1 EQU 14 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +CMCON EQU 25 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISC EQU 135 +PIE1 EQU 140 +PCON EQU 142 +OSCCAL EQU 144 +WPU EQU 149 +WPUA EQU 149 +IOC EQU 150 +IOCA EQU 150 +VRCON EQU 153 +EEDAT EQU 154 +EEDATA EQU 154 +EEADR EQU 155 +EECON1 EQU 156 +EECON2 EQU 157 diff --git a/resources/data/pic/pic16f631.data b/resources/data/pic/pic16f631.data new file mode 100644 index 0000000..4faf52f --- /dev/null +++ b/resources/data/pic/pic16f631.data @@ -0,0 +1,63 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +WPU EQU 149 +WPUA EQU 149 +IOC EQU 150 +IOCA EQU 150 +WDTCON EQU 151 +EEDAT EQU 268 +EEDATA EQU 268 +EEADR EQU 269 +WPUB EQU 277 +IOCB EQU 278 +VRCON EQU 280 +CM1CON0 EQU 281 +CM2CON0 EQU 282 +CM2CON1 EQU 283 +ANSEL EQU 286 +EECON1 EQU 396 +EECON2 EQU 397 +SRCON EQU 414 diff --git a/resources/data/pic/pic16f676.data b/resources/data/pic/pic16f676.data new file mode 100644 index 0000000..96b0252 --- /dev/null +++ b/resources/data/pic/pic16f676.data @@ -0,0 +1,57 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +TMR1 EQU 14 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +CMCON EQU 25 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISC EQU 135 +PIE1 EQU 140 +PCON EQU 142 +OSCCAL EQU 144 +ANSEL EQU 145 +WPU EQU 149 +WPUA EQU 149 +IOC EQU 150 +IOCA EQU 150 +VRCON EQU 153 +EEDAT EQU 154 +EEDATA EQU 154 +EEADR EQU 155 +EECON1 EQU 156 +EECON2 EQU 157 +ADRESL EQU 158 +ADCON1 EQU 159 diff --git a/resources/data/pic/pic16f677.data b/resources/data/pic/pic16f677.data new file mode 100644 index 0000000..a424fb6 --- /dev/null +++ b/resources/data/pic/pic16f677.data @@ -0,0 +1,74 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +SSPBUF EQU 19 +SSPCON EQU 20 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +SSPADD EQU 147 +MSK EQU 147 +SSPMSK EQU 147 +SSPSTAT EQU 148 +WPU EQU 149 +WPUA EQU 149 +IOC EQU 150 +IOCA EQU 150 +WDTCON EQU 151 +ADRESL EQU 158 +ADCON1 EQU 159 +EEDAT EQU 268 +EEDATA EQU 268 +EEADR EQU 269 +WPUB EQU 277 +IOCB EQU 278 +VRCON EQU 280 +CM1CON0 EQU 281 +CM2CON0 EQU 282 +CM2CON1 EQU 283 +ANSEL EQU 286 +ANSELH EQU 287 +EECON1 EQU 396 +EECON2 EQU 397 +SRCON EQU 414 diff --git a/resources/data/pic/pic16f684.data b/resources/data/pic/pic16f684.data new file mode 100644 index 0000000..7a8dc03 --- /dev/null +++ b/resources/data/pic/pic16f684.data @@ -0,0 +1,69 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +TMR1 EQU 14 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +CCPR1 EQU 19 +CCPR1L EQU 19 +CCPR1H EQU 20 +CCP1CON EQU 21 +PWM1CON EQU 22 +ECCPAS EQU 23 +WDTCON EQU 24 +CMCON0 EQU 25 +CMCON1 EQU 26 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISC EQU 135 +PIE1 EQU 140 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +ANSEL EQU 145 +PR2 EQU 146 +WPU EQU 149 +WPUA EQU 149 +IOC EQU 150 +IOCA EQU 150 +VRCON EQU 153 +EEDAT EQU 154 +EEDATA EQU 154 +EEADR EQU 155 +EECON1 EQU 156 +EECON2 EQU 157 +ADRESL EQU 158 +ADCON1 EQU 159 diff --git a/resources/data/pic/pic16f685.data b/resources/data/pic/pic16f685.data new file mode 100644 index 0000000..b862b19 --- /dev/null +++ b/resources/data/pic/pic16f685.data @@ -0,0 +1,79 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +PWM1CON EQU 28 +ECCPAS EQU 29 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +PR2 EQU 146 +WPU EQU 149 +WPUA EQU 149 +IOC EQU 150 +IOCA EQU 150 +WDTCON EQU 151 +ADRESL EQU 158 +ADCON1 EQU 159 +EEDAT EQU 268 +EEDATA EQU 268 +EEADR EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +WPUB EQU 277 +IOCB EQU 278 +VRCON EQU 280 +CM1CON0 EQU 281 +CM2CON0 EQU 282 +CM2CON1 EQU 283 +ANSEL EQU 286 +ANSELH EQU 287 +EECON1 EQU 396 +EECON2 EQU 397 +PSTRCON EQU 413 +SRCON EQU 414 diff --git a/resources/data/pic/pic16f687.data b/resources/data/pic/pic16f687.data new file mode 100644 index 0000000..1df0822 --- /dev/null +++ b/resources/data/pic/pic16f687.data @@ -0,0 +1,83 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +SSPBUF EQU 19 +SSPCON EQU 20 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +SSPADD EQU 147 +MSK EQU 147 +SSPMSK EQU 147 +SSPSTAT EQU 148 +WPU EQU 149 +WPUA EQU 149 +IOC EQU 150 +IOCA EQU 150 +WDTCON EQU 151 +TXSTA EQU 152 +SPBRG EQU 153 +SPBRGH EQU 154 +BAUDCTL EQU 155 +ADRESL EQU 158 +ADCON1 EQU 159 +EEDAT EQU 268 +EEDATA EQU 268 +EEADR EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +WPUB EQU 277 +IOCB EQU 278 +VRCON EQU 280 +CM1CON0 EQU 281 +CM2CON0 EQU 282 +CM2CON1 EQU 283 +ANSEL EQU 286 +ANSELH EQU 287 +EECON1 EQU 396 +EECON2 EQU 397 +SRCON EQU 414 diff --git a/resources/data/pic/pic16f689.data b/resources/data/pic/pic16f689.data new file mode 100644 index 0000000..1df0822 --- /dev/null +++ b/resources/data/pic/pic16f689.data @@ -0,0 +1,83 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +SSPBUF EQU 19 +SSPCON EQU 20 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +SSPADD EQU 147 +MSK EQU 147 +SSPMSK EQU 147 +SSPSTAT EQU 148 +WPU EQU 149 +WPUA EQU 149 +IOC EQU 150 +IOCA EQU 150 +WDTCON EQU 151 +TXSTA EQU 152 +SPBRG EQU 153 +SPBRGH EQU 154 +BAUDCTL EQU 155 +ADRESL EQU 158 +ADCON1 EQU 159 +EEDAT EQU 268 +EEDATA EQU 268 +EEADR EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +WPUB EQU 277 +IOCB EQU 278 +VRCON EQU 280 +CM1CON0 EQU 281 +CM2CON0 EQU 282 +CM2CON1 EQU 283 +ANSEL EQU 286 +ANSELH EQU 287 +EECON1 EQU 396 +EECON2 EQU 397 +SRCON EQU 414 diff --git a/resources/data/pic/pic16f690.data b/resources/data/pic/pic16f690.data new file mode 100644 index 0000000..75a22b5 --- /dev/null +++ b/resources/data/pic/pic16f690.data @@ -0,0 +1,92 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +PWM1CON EQU 28 +ECCPAS EQU 29 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +PR2 EQU 146 +SSPADD EQU 147 +MSK EQU 147 +SSPMSK EQU 147 +SSPSTAT EQU 148 +WPU EQU 149 +WPUA EQU 149 +IOC EQU 150 +IOCA EQU 150 +WDTCON EQU 151 +TXSTA EQU 152 +SPBRG EQU 153 +SPBRGH EQU 154 +BAUDCTL EQU 155 +ADRESL EQU 158 +ADCON1 EQU 159 +EEDAT EQU 268 +EEDATA EQU 268 +EEADR EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +WPUB EQU 277 +IOCB EQU 278 +VRCON EQU 280 +CM1CON0 EQU 281 +CM2CON0 EQU 282 +CM2CON1 EQU 283 +ANSEL EQU 286 +ANSELH EQU 287 +EECON1 EQU 396 +EECON2 EQU 397 +PSTRCON EQU 413 +SRCON EQU 414 diff --git a/resources/data/pic/pic16f690.package b/resources/data/pic/pic16f690.package new file mode 100644 index 0000000..e54a3a6 --- /dev/null +++ b/resources/data/pic/pic16f690.package @@ -0,0 +1,49 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic16f716.data b/resources/data/pic/pic16f716.data new file mode 100644 index 0000000..6c42047 --- /dev/null +++ b/resources/data/pic/pic16f716.data @@ -0,0 +1,36 @@ + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +DATACCP EQU 6 +PORTB EQU 6 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +TMR1 EQU 14 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +CCPR1 EQU 21 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +PWM1CON EQU 24 +ECCPAS EQU 25 +ADRES EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISCP EQU 134 +PIE1 EQU 140 +PCON EQU 142 +PR2 EQU 146 +ADCON1 EQU 159 diff --git a/resources/data/pic/pic16f73.data b/resources/data/pic/pic16f73.data new file mode 100644 index 0000000..d5ea72a --- /dev/null +++ b/resources/data/pic/pic16f73.data @@ -0,0 +1,69 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +CCPR2L EQU 27 +CCPR2H EQU 28 +CCP2CON EQU 29 +ADRES EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +TXSTA EQU 152 +SPBRG EQU 153 +ADCON1 EQU 159 +PMDATA EQU 268 +PMADR EQU 269 +PMDATH EQU 270 +PMADRH EQU 271 +PMCON1 EQU 396 diff --git a/resources/data/pic/pic16f74.data b/resources/data/pic/pic16f74.data new file mode 100644 index 0000000..e1863a6 --- /dev/null +++ b/resources/data/pic/pic16f74.data @@ -0,0 +1,73 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PORTD EQU 8 +PORTE EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +CCPR2L EQU 27 +CCPR2H EQU 28 +CCP2CON EQU 29 +ADRES EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +TRISD EQU 136 +TRISE EQU 137 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +TXSTA EQU 152 +SPBRG EQU 153 +ADCON1 EQU 159 +PMDATA EQU 268 +PMADR EQU 269 +PMDATH EQU 270 +PMADRH EQU 271 +PMCON1 EQU 396 diff --git a/resources/data/pic/pic16f818.data b/resources/data/pic/pic16f818.data new file mode 100644 index 0000000..2be4252 --- /dev/null +++ b/resources/data/pic/pic16f818.data @@ -0,0 +1,64 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +ADRESL EQU 158 +ADCON1 EQU 159 +EEDATA EQU 268 +EEADR EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +EECON1 EQU 396 +EECON2 EQU 397 diff --git a/resources/data/pic/pic16f83.data b/resources/data/pic/pic16f83.data new file mode 100644 index 0000000..2ee71b0 --- /dev/null +++ b/resources/data/pic/pic16f83.data @@ -0,0 +1,37 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=10 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +EEDATA EQU 8 +EEADR EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +EECON1 EQU 136 +EECON2 EQU 137 diff --git a/resources/data/pic/pic16f84.data b/resources/data/pic/pic16f84.data new file mode 100644 index 0000000..2ee71b0 --- /dev/null +++ b/resources/data/pic/pic16f84.data @@ -0,0 +1,37 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=10 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +EEDATA EQU 8 +EEADR EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +EECON1 EQU 136 +EECON2 EQU 137 diff --git a/resources/data/pic/pic16f84.package b/resources/data/pic/pic16f84.package new file mode 100644 index 0000000..c511b65 --- /dev/null +++ b/resources/data/pic/pic16f84.package @@ -0,0 +1,52 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic16f87.data b/resources/data/pic/pic16f87.data new file mode 100644 index 0000000..bc3a34a --- /dev/null +++ b/resources/data/pic/pic16f87.data @@ -0,0 +1,51 @@ + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1 EQU 14 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1 EQU 21 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +TXSTA EQU 152 +SPBRG EQU 153 +CMCON EQU 156 +CVRCON EQU 157 +WDTCON EQU 261 +EEDATA EQU 268 +EEADR EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +EECON1 EQU 396 +EECON2 EQU 397 diff --git a/resources/data/pic/pic16f871.data b/resources/data/pic/pic16f871.data new file mode 100644 index 0000000..8be363c --- /dev/null +++ b/resources/data/pic/pic16f871.data @@ -0,0 +1,70 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PORTD EQU 8 +PORTE EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1 EQU 14 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +CCPR1 EQU 21 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +TRISD EQU 136 +TRISE EQU 137 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +PR2 EQU 146 +TXSTA EQU 152 +SPBRG EQU 153 +ADRESL EQU 158 +ADCON1 EQU 159 +EEDATA EQU 268 +EEADR EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +EECON1 EQU 396 +EECON2 EQU 397 diff --git a/resources/data/pic/pic16f876.data b/resources/data/pic/pic16f876.data new file mode 100644 index 0000000..9307981 --- /dev/null +++ b/resources/data/pic/pic16f876.data @@ -0,0 +1,73 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +CCPR2L EQU 27 +CCPR2H EQU 28 +CCP2CON EQU 29 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +SSPCON2 EQU 145 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +TXSTA EQU 152 +SPBRG EQU 153 +ADRESL EQU 158 +ADCON1 EQU 159 +EEDATA EQU 268 +EEADR EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +EECON1 EQU 396 +EECON2 EQU 397 + diff --git a/resources/data/pic/pic16f876.package b/resources/data/pic/pic16f876.package new file mode 100644 index 0000000..753c54c --- /dev/null +++ b/resources/data/pic/pic16f876.package @@ -0,0 +1,61 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic16f876a.data b/resources/data/pic/pic16f876a.data new file mode 100644 index 0000000..d4d6dc5 --- /dev/null +++ b/resources/data/pic/pic16f876a.data @@ -0,0 +1,76 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License EQU or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful EQU # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not EQU see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +CCPR2L EQU 27 +CCPR2H EQU 28 +CCP2CON EQU 29 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +SSPCON2 EQU 145 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +TXSTA EQU 152 +SPBRG EQU 153 +CMCON EQU 156 +CVRCON EQU 157 +ADRESL EQU 158 +ADCON1 EQU 159 +EEDATA EQU 268 +EEADR EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +EECON1 EQU 396 +EECON2 EQU 397 + +TRMT EQU TXSTA EQU 1 diff --git a/resources/data/pic/pic16f877.data b/resources/data/pic/pic16f877.data new file mode 100644 index 0000000..e81c9ec --- /dev/null +++ b/resources/data/pic/pic16f877.data @@ -0,0 +1,77 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PORTD EQU 8 +PORTE EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +CCPR2L EQU 27 +CCPR2H EQU 28 +CCP2CON EQU 29 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +TRISD EQU 136 +TRISE EQU 137 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +SSPCON2 EQU 145 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +TXSTA EQU 152 +SPBRG EQU 153 +ADRESL EQU 158 +ADCON1 EQU 159 +EEDATA EQU 268 +EEADR EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +EECON1 EQU 396 +EECON2 EQU 397 diff --git a/resources/data/pic/pic16f877.package b/resources/data/pic/pic16f877.package new file mode 100644 index 0000000..ebc7acb --- /dev/null +++ b/resources/data/pic/pic16f877.package @@ -0,0 +1,75 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic16f877a.data b/resources/data/pic/pic16f877a.data new file mode 100644 index 0000000..7eb8c50 --- /dev/null +++ b/resources/data/pic/pic16f877a.data @@ -0,0 +1,79 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PORTD EQU 8 +PORTE EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +CCPR2L EQU 27 +CCPR2H EQU 28 +CCP2CON EQU 29 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +TRISD EQU 136 +TRISE EQU 137 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +SSPCON2 EQU 145 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +TXSTA EQU 152 +SPBRG EQU 153 +CMCON EQU 156 +CVRCON EQU 157 +ADRESL EQU 158 +ADCON1 EQU 159 +EEDATA EQU 268 +EEADR EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +EECON1 EQU 396 +EECON2 EQU 397 diff --git a/resources/data/pic/pic16f88.data b/resources/data/pic/pic16f88.data new file mode 100644 index 0000000..2e39c80 --- /dev/null +++ b/resources/data/pic/pic16f88.data @@ -0,0 +1,73 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +TXSTA EQU 152 +SPBRG EQU 153 +ANSEL EQU 155 +CMCON EQU 156 +CVRCON EQU 157 +ADRESL EQU 158 +ADCON1 EQU 159 +WDTCON EQU 261 +EEDATA EQU 268 +EEADR EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +EECON1 EQU 396 +EECON2 EQU 397 + diff --git a/resources/data/pic/pic16f884.data b/resources/data/pic/pic16f884.data new file mode 100644 index 0000000..0598b9a --- /dev/null +++ b/resources/data/pic/pic16f884.data @@ -0,0 +1,99 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PORTD EQU 8 +PORTE EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1 EQU 14 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1 EQU 21 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +CCPR2 EQU 27 +CCPR2L EQU 27 +CCPR2H EQU 28 +CCP2CON EQU 29 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +TRISD EQU 136 +TRISE EQU 137 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +SSPCON2 EQU 145 +PR2 EQU 146 +MSK EQU 147 +SSPADD EQU 147 +SSPMSK EQU 147 +SSPSTAT EQU 148 +WPUB EQU 149 +IOCB EQU 150 +VRCON EQU 151 +TXSTA EQU 152 +SPBRG EQU 153 +SPBRGH EQU 154 +PWM1CON EQU 155 +ECCPAS EQU 156 +PSTRCON EQU 157 +ADRESL EQU 158 +ADCON1 EQU 159 +WDTCON EQU 261 +CM1CON0 EQU 263 +CM2CON0 EQU 264 +CM2CON1 EQU 265 +EEDAT EQU 268 +EEDATA EQU 268 +EEADR EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +SRCON EQU 389 +BAUDCTL EQU 391 +ANSEL EQU 392 +ANSELH EQU 393 +EECON1 EQU 396 +EECON2 EQU 397 diff --git a/resources/data/pic/pic16f886.data b/resources/data/pic/pic16f886.data new file mode 100644 index 0000000..8f35923 --- /dev/null +++ b/resources/data/pic/pic16f886.data @@ -0,0 +1,95 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PORTE EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +CCPR2L EQU 27 +CCPR2H EQU 28 +CCP2CON EQU 29 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +TRISE EQU 137 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +SSPCON2 EQU 145 +PR2 EQU 146 +SSPADD EQU 147 +SSPMSK EQU 147 +MSK EQU 147 +SSPSTAT EQU 148 +WPUB EQU 149 +IOCB EQU 150 +VRCON EQU 151 +TXSTA EQU 152 +SPBRG EQU 153 +SPBRGH EQU 154 +PWM1CON EQU 155 +ECCPAS EQU 156 +PSTRCON EQU 157 +ADRESL EQU 158 +ADCON1 EQU 159 +WDTCON EQU 261 +CM1CON0 EQU 263 +CM2CON0 EQU 264 +CM2CON1 EQU 265 +EEDATA EQU 268 +EEDAT EQU 268 +EEADR EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +SRCON EQU 389 +BAUDCTL EQU 391 +ANSEL EQU 392 +ANSELH EQU 393 +EECON1 EQU 396 +EECON2 EQU 397 + diff --git a/resources/data/pic/pic16f886.package b/resources/data/pic/pic16f886.package new file mode 100644 index 0000000..ba6610c --- /dev/null +++ b/resources/data/pic/pic16f886.package @@ -0,0 +1,60 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic16f887.data b/resources/data/pic/pic16f887.data new file mode 100644 index 0000000..5556e62 --- /dev/null +++ b/resources/data/pic/pic16f887.data @@ -0,0 +1,100 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PORTD EQU 8 +PORTE EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1 EQU 14 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1 EQU 21 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +CCPR2 EQU 27 +CCPR2L EQU 27 +CCPR2H EQU 28 +CCP2CON EQU 29 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +TRISD EQU 136 +TRISE EQU 137 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +SSPCON2 EQU 145 +PR2 EQU 146 +MSK EQU 147 +SSPADD EQU 147 +SSPMSK EQU 147 +SSPSTAT EQU 148 +WPUB EQU 149 +IOCB EQU 150 +VRCON EQU 151 +TXSTA EQU 152 +SPBRG EQU 153 +SPBRGH EQU 154 +PWM1CON EQU 155 +ECCPAS EQU 156 +PSTRCON EQU 157 +ADRESL EQU 158 +ADCON1 EQU 159 +WDTCON EQU 261 +CM1CON0 EQU 263 +CM2CON0 EQU 264 +CM2CON1 EQU 265 +EEDAT EQU 268 +EEDATA EQU 268 +EEADR EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +SRCON EQU 389 +BAUDCTL EQU 391 +ANSEL EQU 392 +ANSELH EQU 393 +EECON1 EQU 396 +EECON2 EQU 397 diff --git a/resources/data/pic/pic16f887.package b/resources/data/pic/pic16f887.package new file mode 100644 index 0000000..831a5fb --- /dev/null +++ b/resources/data/pic/pic16f887.package @@ -0,0 +1,75 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic16f913.data b/resources/data/pic/pic16f913.data new file mode 100644 index 0000000..0a356e5 --- /dev/null +++ b/resources/data/pic/pic16f913.data @@ -0,0 +1,80 @@ + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PORTE EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1 EQU 14 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1 EQU 21 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +TRISE EQU 137 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +ANSEL EQU 145 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +WPU EQU 149 +WPUB EQU 149 +IOC EQU 150 +IOCB EQU 150 +CMCON1 EQU 151 +TXSTA EQU 152 +SPBRG EQU 153 +CMCON0 EQU 156 +VRCON EQU 157 +ADRESL EQU 158 +ADCON1 EQU 159 +WDTCON EQU 261 +LCDCON EQU 263 +LCDPS EQU 264 +LVDCON EQU 265 +EEDATA EQU 268 +EEDATL EQU 268 +EEADR EQU 269 +EEADRL EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +LCDDATA0 EQU 272 +LCDDATA1 EQU 273 +LCDDATA3 EQU 275 +LCDDATA4 EQU 276 +LCDDATA6 EQU 278 +LCDDATA7 EQU 279 +LCDDATA9 EQU 281 +LCDDATA10 EQU 282 +LCDSE0 EQU 284 +LCDSE1 EQU 285 +EECON1 EQU 396 +EECON2 EQU 397 diff --git a/resources/data/pic/pic16f914.data b/resources/data/pic/pic16f914.data new file mode 100644 index 0000000..7f0eb92 --- /dev/null +++ b/resources/data/pic/pic16f914.data @@ -0,0 +1,109 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=20 + +INDF EQU 0 +TMR0 EQU 1 +PCL EQU 2 +STATUS EQU 3 +FSR EQU 4 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PORTD EQU 8 +PORTE EQU 9 +PCLATH EQU 10 +INTCON EQU 11 +PIR1 EQU 12 +PIR2 EQU 13 +TMR1 EQU 14 +TMR1L EQU 14 +TMR1H EQU 15 +T1CON EQU 16 +TMR2 EQU 17 +T2CON EQU 18 +SSPBUF EQU 19 +SSPCON EQU 20 +CCPR1 EQU 21 +CCPR1L EQU 21 +CCPR1H EQU 22 +CCP1CON EQU 23 +RCSTA EQU 24 +TXREG EQU 25 +RCREG EQU 26 +CCPR2 EQU 27 +CCPR2L EQU 27 +CCPR2H EQU 28 +CCP2CON EQU 29 +ADRESH EQU 30 +ADCON0 EQU 31 +OPTION_REG EQU 129 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +TRISD EQU 136 +TRISE EQU 137 +PIE1 EQU 140 +PIE2 EQU 141 +PCON EQU 142 +OSCCON EQU 143 +OSCTUNE EQU 144 +ANSEL EQU 145 +PR2 EQU 146 +SSPADD EQU 147 +SSPSTAT EQU 148 +WPU EQU 149 +WPUB EQU 149 +IOC EQU 150 +IOCB EQU 150 +CMCON1 EQU 151 +TXSTA EQU 152 +SPBRG EQU 153 +CMCON0 EQU 156 +VRCON EQU 157 +ADRESL EQU 158 +ADCON1 EQU 159 +WDTCON EQU 261 +LCDCON EQU 263 +LCDPS EQU 264 +LVDCON EQU 265 +EEDATA EQU 268 +EEDATL EQU 268 +EEADR EQU 269 +EEADRL EQU 269 +EEDATH EQU 270 +EEADRH EQU 271 +LCDDATA0 EQU 272 +LCDDATA1 EQU 273 +LCDDATA2 EQU 274 +LCDDATA3 EQU 275 +LCDDATA4 EQU 276 +LCDDATA5 EQU 277 +LCDDATA6 EQU 278 +LCDDATA7 EQU 279 +LCDDATA8 EQU 280 +LCDDATA9 EQU 281 +LCDDATA10 EQU 282 +LCDDATA11 EQU 283 +LCDSE0 EQU 284 +LCDSE1 EQU 285 +LCDSE2 EQU 286 +EECON1 EQU 396 +EECON2 EQU 397 diff --git a/resources/data/pic/pic18c242.data b/resources/data/pic/pic18c242.data new file mode 100644 index 0000000..42fdf96 --- /dev/null +++ b/resources/data/pic/pic18c242.data @@ -0,0 +1,108 @@ + +MaxMHz=40 + +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +T3CON EQU 4017 +TMR3 EQU 4018 +TMR3L EQU 4018 +TMR3H EQU 4019 +CCP2CON EQU 4026 +CCPR2 EQU 4027 +CCPR2L EQU 4027 +CCPR2H EQU 4028 +CCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1 EQU 4046 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +LVDCON EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0 EQU 4054 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +INTCON1 EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 diff --git a/resources/data/pic/pic18c442.data b/resources/data/pic/pic18c442.data new file mode 100644 index 0000000..6c31c30 --- /dev/null +++ b/resources/data/pic/pic18c442.data @@ -0,0 +1,116 @@ + +MaxMHz=40 + +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +PORTD EQU 3971 +PORTE EQU 3972 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +LATD EQU 3980 +LATE EQU 3981 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +DDRD EQU 3989 +TRISD EQU 3989 +DDRE EQU 3990 +TRISE EQU 3990 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +T3CON EQU 4017 +TMR3 EQU 4018 +TMR3L EQU 4018 +TMR3H EQU 4019 +CCP2CON EQU 4026 +CCPR2 EQU 4027 +CCPR2L EQU 4027 +CCPR2H EQU 4028 +CCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1 EQU 4046 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +LVDCON EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0 EQU 4054 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +INTCON1 EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 diff --git a/resources/data/pic/pic18c452.data b/resources/data/pic/pic18c452.data new file mode 100644 index 0000000..6c31c30 --- /dev/null +++ b/resources/data/pic/pic18c452.data @@ -0,0 +1,116 @@ + +MaxMHz=40 + +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +PORTD EQU 3971 +PORTE EQU 3972 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +LATD EQU 3980 +LATE EQU 3981 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +DDRD EQU 3989 +TRISD EQU 3989 +DDRE EQU 3990 +TRISE EQU 3990 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +T3CON EQU 4017 +TMR3 EQU 4018 +TMR3L EQU 4018 +TMR3H EQU 4019 +CCP2CON EQU 4026 +CCPR2 EQU 4027 +CCPR2L EQU 4027 +CCPR2H EQU 4028 +CCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1 EQU 4046 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +LVDCON EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0 EQU 4054 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +INTCON1 EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 diff --git a/resources/data/pic/pic18f14k22.data b/resources/data/pic/pic18f14k22.data new file mode 100644 index 0000000..f13ce42 --- /dev/null +++ b/resources/data/pic/pic18f14k22.data @@ -0,0 +1,152 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=64 + +SRCON0 EQU 3944 +SRCON1 EQU 3945 +CM2CON0 EQU 3947 +CM2CON1 EQU 3948 +CM1CON0 EQU 3949 +SSPMSK EQU 3951 +SLRCON EQU 3958 +WPUA EQU 3959 +WPUB EQU 3960 +IOCA EQU 3961 +IOCB EQU 3962 +ANSEL EQU 3966 +ANSELH EQU 3967 +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +OSCTUNE EQU 3995 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEADR EQU 4009 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +SPBRGH EQU 4016 +T3CON EQU 4017 +TMR3 EQU 4018 +TMR3L EQU 4018 +TMR3H EQU 4019 +ECCP1AS EQU 4022 +PWM1CON EQU 4023 +BAUDCON EQU 4024 +BAUDCTL EQU 4024 +PSTRCON EQU 4025 +REFCON0 EQU 4026 +VREFCON0 EQU 4026 +REFCON1 EQU 4027 +VREFCON1 EQU 4027 +REFCON2 EQU 4028 +VREFCON2 EQU 4028 +CCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON2 EQU 4032 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1 EQU 4046 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +OSCCON2 EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0 EQU 4054 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 diff --git a/resources/data/pic/pic18f2221.data b/resources/data/pic/pic18f2221.data new file mode 100644 index 0000000..58dc41e --- /dev/null +++ b/resources/data/pic/pic18f2221.data @@ -0,0 +1,142 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=40 + +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +PORTE EQU 3972 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +OSCTUNE EQU 3995 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEADR EQU 4009 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +SPBRGH EQU 4016 +T3CON EQU 4017 +TMR3 EQU 4018 +TMR3L EQU 4018 +TMR3H EQU 4019 +CMCON EQU 4020 +CVRCON EQU 4021 +ECCP1AS EQU 4022 +ECCP1DEL EQU 4023 +PWM1CON EQU 4023 +BAUDCON EQU 4024 +BAUDCTL EQU 4024 +CCP2CON EQU 4026 +CCPR2 EQU 4027 +CCPR2L EQU 4027 +CCPR2H EQU 4028 +CCP1CON EQU 4029 +ECCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON2 EQU 4032 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1 EQU 4046 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +HLVDCON EQU 4050 +LVDCON EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0 EQU 4054 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 diff --git a/resources/data/pic/pic18f242.data b/resources/data/pic/pic18f242.data new file mode 100644 index 0000000..1177e67 --- /dev/null +++ b/resources/data/pic/pic18f242.data @@ -0,0 +1,117 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=40 + +TOSU EQU 4095 +TOSH EQU 4094 +TOSL EQU 4093 +STKPTR EQU 4092 +PCLATU EQU 4091 +PCLATH EQU 4090 +PCL EQU 4089 +TBLPTRU EQU 4088 +TBLPTRH EQU 4087 +TBLPTRL EQU 4086 +TABLAT EQU 4085 +PRODH EQU 4084 +PRODL EQU 4083 +INTCON EQU 4082 +INTCON1 EQU 4082 +INTCON2 EQU 4081 +INTCON3 EQU 4080 +INDF0 EQU 4079 +POSTINC0 EQU 4078 +POSTDEC0 EQU 4077 +PREINC0 EQU 4076 +PLUSW0 EQU 4075 +FSR0H EQU 4074 +FSR0L EQU 4073 +WREG EQU 4072 +INDF1 EQU 4071 +POSTINC1 EQU 4070 +POSTDEC1 EQU 4069 +PREINC1 EQU 4068 +PLUSW1 EQU 4067 +FSR1H EQU 4066 +FSR1L EQU 4065 +BSR EQU 4064 +INDF2 EQU 4063 +POSTINC2 EQU 4062 +POSTDEC2 EQU 4061 +PREINC2 EQU 4060 +PLUSW2 EQU 4059 +FSR2H EQU 4058 +FSR2L EQU 4057 +STATUS EQU 4056 +TMR0H EQU 4055 +TMR0L EQU 4054 +T0CON EQU 4053 +OSCCON EQU 4051 +LVDCON EQU 4050 +WDTCON EQU 4049 +RCON EQU 4048 +TMR1H EQU 4047 +TMR1L EQU 4046 +T1CON EQU 4045 +TMR2 EQU 4044 +PR2 EQU 4043 +T2CON EQU 4042 +SSPBUF EQU 4041 +SSPADD EQU 4040 +SSPSTAT EQU 4039 +SSPCON1 EQU 4038 +SSPCON2 EQU 4037 +ADRESH EQU 4036 +ADRESL EQU 4035 +ADCON0 EQU 4034 +ADCON1 EQU 4033 +CCPR1H EQU 4031 +CCPR1L EQU 4030 +CCP1CON EQU 4029 +CCPR2H EQU 4028 +CCPR2L EQU 4027 +CCP2CON EQU 4026 +TMR3H EQU 4019 +TMR3L EQU 4018 +T3CON EQU 4017 +SPBRG EQU 4015 +RCREG EQU 4014 +TXREG EQU 4013 +TXSTA EQU 4012 +RCSTA EQU 4011 +EEADR EQU 4009 +EEDATA EQU 4008 +EECON2 EQU 4007 +EECON1 EQU 4006 +IPR2 EQU 4002 +PIR2 EQU 4001 +PIE2 EQU 4000 +IPR1 EQU 3999 +PIR1 EQU 3998 +PIE1 EQU 3997 +TRISC EQU 3988 +TRISB EQU 3987 +TRISA EQU 3986 +LATC EQU 3979 +LATB EQU 3978 +LATA EQU 3977 +PORTC EQU 3970 +PORTB EQU 3969 +PORTA EQU 3968 diff --git a/resources/data/pic/pic18f2420.data b/resources/data/pic/pic18f2420.data new file mode 100644 index 0000000..ae4d9f1 --- /dev/null +++ b/resources/data/pic/pic18f2420.data @@ -0,0 +1,142 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=40 + +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +PORTE EQU 3972 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +OSCTUNE EQU 3995 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEADR EQU 4009 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +SPBRGH EQU 4016 +T3CON EQU 4017 +TMR3 EQU 4018 +TMR3L EQU 4018 +TMR3H EQU 4019 +CMCON EQU 4020 +CVRCON EQU 4021 +ECCP1AS EQU 4022 +ECCPAS EQU 4022 +ECCP1DEL EQU 4023 +PWM1CON EQU 4023 +BAUDCON EQU 4024 +BAUDCTL EQU 4024 +CCP2CON EQU 4026 +CCPR2 EQU 4027 +CCPR2L EQU 4027 +CCPR2H EQU 4028 +CCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON2 EQU 4032 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1 EQU 4046 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +HLVDCON EQU 4050 +LVDCON EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0 EQU 4054 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 diff --git a/resources/data/pic/pic18f248.data b/resources/data/pic/pic18f248.data new file mode 100644 index 0000000..089d147 --- /dev/null +++ b/resources/data/pic/pic18f248.data @@ -0,0 +1,226 @@ + +MaxMHz=40 + +RXF0SIDH EQU 3840 +RXF0SIDL EQU 3841 +RXF0EIDH EQU 3842 +RXF0EIDL EQU 3843 +RXF1SIDH EQU 3844 +RXF1SIDL EQU 3845 +RXF1EIDH EQU 3846 +RXF1EIDL EQU 3847 +RXF2SIDH EQU 3848 +RXF2SIDL EQU 3849 +RXF2EIDH EQU 3850 +RXF2EIDL EQU 3851 +RXF3SIDH EQU 3852 +RXF3SIDL EQU 3853 +RXF3EIDH EQU 3854 +RXF3EIDL EQU 3855 +RXF4SIDH EQU 3856 +RXF4SIDL EQU 3857 +RXF4EIDH EQU 3858 +RXF4EIDL EQU 3859 +RXF5SIDH EQU 3860 +RXF5SIDL EQU 3861 +RXF5EIDH EQU 3862 +RXF5EIDL EQU 3863 +RXM0SIDH EQU 3864 +RXM0SIDL EQU 3865 +RXM0EIDH EQU 3866 +RXM0EIDL EQU 3867 +RXM1SIDH EQU 3868 +RXM1SIDL EQU 3869 +RXM1EIDH EQU 3870 +RXM1EIDL EQU 3871 +TXB2CON EQU 3872 +TXB2SIDH EQU 3873 +TXB2SIDL EQU 3874 +TXB2EIDH EQU 3875 +TXB2EIDL EQU 3876 +TXB2DLC EQU 3877 +TXB2D0 EQU 3878 +TXB2D1 EQU 3879 +TXB2D2 EQU 3880 +TXB2D3 EQU 3881 +TXB2D4 EQU 3882 +TXB2D5 EQU 3883 +TXB2D6 EQU 3884 +TXB2D7 EQU 3885 +CANSTATRO4 EQU 3886 +TXB1CON EQU 3888 +TXB1SIDH EQU 3889 +TXB1SIDL EQU 3890 +TXB1EIDH EQU 3891 +TXB1EIDL EQU 3892 +TXB1DLC EQU 3893 +TXB1D0 EQU 3894 +TXB1D1 EQU 3895 +TXB1D2 EQU 3896 +TXB1D3 EQU 3897 +TXB1D4 EQU 3898 +TXB1D5 EQU 3899 +TXB1D6 EQU 3900 +TXB1D7 EQU 3901 +CANSTATRO3 EQU 3902 +TXB0CON EQU 3904 +TXB0SIDH EQU 3905 +TXB0SIDL EQU 3906 +TXB0EIDH EQU 3907 +TXB0EIDL EQU 3908 +TXB0DLC EQU 3909 +TXB0D0 EQU 3910 +TXB0D1 EQU 3911 +TXB0D2 EQU 3912 +TXB0D3 EQU 3913 +TXB0D4 EQU 3914 +TXB0D5 EQU 3915 +TXB0D6 EQU 3916 +TXB0D7 EQU 3917 +CANSTATRO2 EQU 3918 +RXB1CON EQU 3920 +RXB1SIDH EQU 3921 +RXB1SIDL EQU 3922 +RXB1EIDH EQU 3923 +RXB1EIDL EQU 3924 +RXB1DLC EQU 3925 +RXB1D0 EQU 3926 +RXB1D1 EQU 3927 +RXB1D2 EQU 3928 +RXB1D3 EQU 3929 +RXB1D4 EQU 3930 +RXB1D5 EQU 3931 +RXB1D6 EQU 3932 +RXB1D7 EQU 3933 +CANSTATRO1 EQU 3934 +RXB0CON EQU 3936 +RXB0SIDH EQU 3937 +RXB0SIDL EQU 3938 +RXB0EIDH EQU 3939 +RXB0EIDL EQU 3940 +RXB0DLC EQU 3941 +RXB0D0 EQU 3942 +RXB0D1 EQU 3943 +RXB0D2 EQU 3944 +RXB0D3 EQU 3945 +RXB0D4 EQU 3946 +RXB0D5 EQU 3947 +RXB0D6 EQU 3948 +RXB0D7 EQU 3949 +CANSTAT EQU 3950 +CANCON EQU 3951 +BRGCON1 EQU 3952 +BRGCON2 EQU 3953 +BRGCON3 EQU 3954 +CIOCON EQU 3955 +COMSTAT EQU 3956 +RXERRCNT EQU 3957 +TXERRCNT EQU 3958 +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +PIE3 EQU 4003 +PIR3 EQU 4004 +IPR3 EQU 4005 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEADR EQU 4009 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +T3CON EQU 4017 +TMR3 EQU 4018 +TMR3L EQU 4018 +TMR3H EQU 4019 +CCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1 EQU 4046 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +LVDCON EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0 EQU 4054 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +INTCON1 EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 diff --git a/resources/data/pic/pic18f2550.data b/resources/data/pic/pic18f2550.data new file mode 100644 index 0000000..87bc784 --- /dev/null +++ b/resources/data/pic/pic18f2550.data @@ -0,0 +1,168 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=48 + +UFRM EQU 3942 +UFRML EQU 3942 +UFRMH EQU 3943 +UIR EQU 3944 +UIE EQU 3945 +UEIR EQU 3946 +UEIE EQU 3947 +USTAT EQU 3948 +UCON EQU 3949 +UADDR EQU 3950 +UCFG EQU 3951 +UEP0 EQU 3952 +UEP1 EQU 3953 +UEP2 EQU 3954 +UEP3 EQU 3955 +UEP4 EQU 3956 +UEP5 EQU 3957 +UEP6 EQU 3958 +UEP7 EQU 3959 +UEP8 EQU 3960 +UEP9 EQU 3961 +UEP10 EQU 3962 +UEP11 EQU 3963 +UEP12 EQU 3964 +UEP13 EQU 3965 +UEP14 EQU 3966 +UEP15 EQU 3967 +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +PORTE EQU 3972 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +OSCTUNE EQU 3995 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEADR EQU 4009 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +SPBRGH EQU 4016 +T3CON EQU 4017 +TMR3L EQU 4018 +TMR3H EQU 4019 +CMCON EQU 4020 +CVRCON EQU 4021 +CCP1AS EQU 4022 +ECCP1AS EQU 4022 +CCP1DEL EQU 4023 +ECCP1DEL EQU 4023 +BAUDCON EQU 4024 +CCP2CON EQU 4026 +CCPR2 EQU 4027 +CCPR2L EQU 4027 +CCPR2H EQU 4028 +CCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON2 EQU 4032 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +HLVDCON EQU 4050 +LVDCON EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 + + +TRMT,TXSTA,1 diff --git a/resources/data/pic/pic18f2550.package b/resources/data/pic/pic18f2550.package new file mode 100644 index 0000000..7d2d00b --- /dev/null +++ b/resources/data/pic/pic18f2550.package @@ -0,0 +1,60 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic18f258.data b/resources/data/pic/pic18f258.data new file mode 100644 index 0000000..089d147 --- /dev/null +++ b/resources/data/pic/pic18f258.data @@ -0,0 +1,226 @@ + +MaxMHz=40 + +RXF0SIDH EQU 3840 +RXF0SIDL EQU 3841 +RXF0EIDH EQU 3842 +RXF0EIDL EQU 3843 +RXF1SIDH EQU 3844 +RXF1SIDL EQU 3845 +RXF1EIDH EQU 3846 +RXF1EIDL EQU 3847 +RXF2SIDH EQU 3848 +RXF2SIDL EQU 3849 +RXF2EIDH EQU 3850 +RXF2EIDL EQU 3851 +RXF3SIDH EQU 3852 +RXF3SIDL EQU 3853 +RXF3EIDH EQU 3854 +RXF3EIDL EQU 3855 +RXF4SIDH EQU 3856 +RXF4SIDL EQU 3857 +RXF4EIDH EQU 3858 +RXF4EIDL EQU 3859 +RXF5SIDH EQU 3860 +RXF5SIDL EQU 3861 +RXF5EIDH EQU 3862 +RXF5EIDL EQU 3863 +RXM0SIDH EQU 3864 +RXM0SIDL EQU 3865 +RXM0EIDH EQU 3866 +RXM0EIDL EQU 3867 +RXM1SIDH EQU 3868 +RXM1SIDL EQU 3869 +RXM1EIDH EQU 3870 +RXM1EIDL EQU 3871 +TXB2CON EQU 3872 +TXB2SIDH EQU 3873 +TXB2SIDL EQU 3874 +TXB2EIDH EQU 3875 +TXB2EIDL EQU 3876 +TXB2DLC EQU 3877 +TXB2D0 EQU 3878 +TXB2D1 EQU 3879 +TXB2D2 EQU 3880 +TXB2D3 EQU 3881 +TXB2D4 EQU 3882 +TXB2D5 EQU 3883 +TXB2D6 EQU 3884 +TXB2D7 EQU 3885 +CANSTATRO4 EQU 3886 +TXB1CON EQU 3888 +TXB1SIDH EQU 3889 +TXB1SIDL EQU 3890 +TXB1EIDH EQU 3891 +TXB1EIDL EQU 3892 +TXB1DLC EQU 3893 +TXB1D0 EQU 3894 +TXB1D1 EQU 3895 +TXB1D2 EQU 3896 +TXB1D3 EQU 3897 +TXB1D4 EQU 3898 +TXB1D5 EQU 3899 +TXB1D6 EQU 3900 +TXB1D7 EQU 3901 +CANSTATRO3 EQU 3902 +TXB0CON EQU 3904 +TXB0SIDH EQU 3905 +TXB0SIDL EQU 3906 +TXB0EIDH EQU 3907 +TXB0EIDL EQU 3908 +TXB0DLC EQU 3909 +TXB0D0 EQU 3910 +TXB0D1 EQU 3911 +TXB0D2 EQU 3912 +TXB0D3 EQU 3913 +TXB0D4 EQU 3914 +TXB0D5 EQU 3915 +TXB0D6 EQU 3916 +TXB0D7 EQU 3917 +CANSTATRO2 EQU 3918 +RXB1CON EQU 3920 +RXB1SIDH EQU 3921 +RXB1SIDL EQU 3922 +RXB1EIDH EQU 3923 +RXB1EIDL EQU 3924 +RXB1DLC EQU 3925 +RXB1D0 EQU 3926 +RXB1D1 EQU 3927 +RXB1D2 EQU 3928 +RXB1D3 EQU 3929 +RXB1D4 EQU 3930 +RXB1D5 EQU 3931 +RXB1D6 EQU 3932 +RXB1D7 EQU 3933 +CANSTATRO1 EQU 3934 +RXB0CON EQU 3936 +RXB0SIDH EQU 3937 +RXB0SIDL EQU 3938 +RXB0EIDH EQU 3939 +RXB0EIDL EQU 3940 +RXB0DLC EQU 3941 +RXB0D0 EQU 3942 +RXB0D1 EQU 3943 +RXB0D2 EQU 3944 +RXB0D3 EQU 3945 +RXB0D4 EQU 3946 +RXB0D5 EQU 3947 +RXB0D6 EQU 3948 +RXB0D7 EQU 3949 +CANSTAT EQU 3950 +CANCON EQU 3951 +BRGCON1 EQU 3952 +BRGCON2 EQU 3953 +BRGCON3 EQU 3954 +CIOCON EQU 3955 +COMSTAT EQU 3956 +RXERRCNT EQU 3957 +TXERRCNT EQU 3958 +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +PIE3 EQU 4003 +PIR3 EQU 4004 +IPR3 EQU 4005 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEADR EQU 4009 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +T3CON EQU 4017 +TMR3 EQU 4018 +TMR3L EQU 4018 +TMR3H EQU 4019 +CCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1 EQU 4046 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +LVDCON EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0 EQU 4054 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +INTCON1 EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 diff --git a/resources/data/pic/pic18f26k22.data b/resources/data/pic/pic18f26k22.data new file mode 100644 index 0000000..a561128 --- /dev/null +++ b/resources/data/pic/pic18f26k22.data @@ -0,0 +1,262 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=64 + +ANSELA EQU 3896 +ANSELB EQU 3897 +ANSELC EQU 3898 +PMD2 EQU 3901 +PMD1 EQU 3902 +PMD0 EQU 3903 +DACCON1 EQU 3904 +VREFCON2 EQU 3904 +DACCON0 EQU 3905 +VREFCON1 EQU 3905 +FVRCON EQU 3906 +VREFCON0 EQU 3906 +CTMUICON EQU 3907 +CTMUICONH EQU 3907 +CTMUCON1 EQU 3908 +CTMUCONL EQU 3908 +CTMUCON0 EQU 3909 +CTMUCONH EQU 3909 +SRCON1 EQU 3910 +SRCON0 EQU 3911 +CCPTMRS1 EQU 3912 +CCPTMRS0 EQU 3913 +T6CON EQU 3914 +PR6 EQU 3915 +TMR6 EQU 3916 +T5GCON EQU 3917 +T5CON EQU 3918 +TMR5 EQU 3919 +TMR5L EQU 3919 +TMR5H EQU 3920 +T4CON EQU 3921 +PR4 EQU 3922 +TMR4 EQU 3923 +CCP5CON EQU 3924 +CCPR5 EQU 3925 +CCPR5L EQU 3925 +CCPR5H EQU 3926 +CCP4CON EQU 3927 +CCPR4 EQU 3928 +CCPR4L EQU 3928 +CCPR4H EQU 3929 +PSTR3CON EQU 3930 +CCP3AS EQU 3931 +ECCP3AS EQU 3931 +PWM3CON EQU 3932 +CCP3CON EQU 3933 +CCPR3 EQU 3934 +CCPR3L EQU 3934 +CCPR3H EQU 3935 +SLRCON EQU 3936 +WPUB EQU 3937 +IOCB EQU 3938 +PSTR2CON EQU 3939 +CCP2AS EQU 3940 +ECCP2AS EQU 3940 +PWM2CON EQU 3941 +CCP2CON EQU 3942 +CCPR2 EQU 3943 +CCPR2L EQU 3943 +CCPR2H EQU 3944 +SSP2CON3 EQU 3945 +SSP2MSK EQU 3946 +SSP2CON2 EQU 3947 +SSP2CON1 EQU 3948 +SSP2STAT EQU 3949 +SSP2ADD EQU 3950 +SSP2BUF EQU 3951 +BAUD2CON EQU 3952 +BAUDCON2 EQU 3952 +RC2STA EQU 3953 +RCSTA2 EQU 3953 +TX2STA EQU 3954 +TXSTA2 EQU 3954 +TX2REG EQU 3955 +TXREG2 EQU 3955 +RC2REG EQU 3956 +RCREG2 EQU 3956 +SP2BRG EQU 3957 +SPBRG2 EQU 3957 +SP2BRGH EQU 3958 +SPBRGH2 EQU 3958 +CM12CON EQU 3959 +CM2CON1 EQU 3959 +CM2CON EQU 3960 +CM2CON0 EQU 3960 +CM1CON EQU 3961 +CM1CON0 EQU 3961 +PIE4 EQU 3962 +PIR4 EQU 3963 +IPR4 EQU 3964 +PIE5 EQU 3965 +PIR5 EQU 3966 +IPR5 EQU 3967 +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +PORTE EQU 3972 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +TRISE EQU 3990 +OSCTUNE EQU 3995 +HLVDCON EQU 3996 +LVDCON EQU 3996 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +PIE3 EQU 4003 +PIR3 EQU 4004 +IPR3 EQU 4005 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEADR EQU 4009 +EEADRH EQU 4010 +RC1STA EQU 4011 +RCSTA EQU 4011 +RCSTA1 EQU 4011 +TX1STA EQU 4012 +TXSTA EQU 4012 +TXSTA1 EQU 4012 +TX1REG EQU 4013 +TXREG EQU 4013 +TXREG1 EQU 4013 +RC1REG EQU 4014 +RCREG EQU 4014 +RCREG1 EQU 4014 +SP1BRG EQU 4015 +SPBRG EQU 4015 +SPBRG1 EQU 4015 +SP1BRGH EQU 4016 +SPBRGH EQU 4016 +SPBRGH1 EQU 4016 +T3CON EQU 4017 +TMR3 EQU 4018 +TMR3L EQU 4018 +TMR3H EQU 4019 +T3GCON EQU 4020 +ECCP1AS EQU 4022 +ECCPAS EQU 4022 +PWM1CON EQU 4023 +PWMCON EQU 4023 +BAUD1CON EQU 4024 +BAUDCON EQU 4024 +BAUDCON1 EQU 4024 +BAUDCTL EQU 4024 +PSTR1CON EQU 4025 +PSTRCON EQU 4025 +T2CON EQU 4026 +PR2 EQU 4027 +TMR2 EQU 4028 +CCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON2 EQU 4032 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSP1CON2 EQU 4037 +SSPCON2 EQU 4037 +SSP1CON1 EQU 4038 +SSPCON1 EQU 4038 +SSP1STAT EQU 4039 +SSPSTAT EQU 4039 +SSP1ADD EQU 4040 +SSPADD EQU 4040 +SSP1BUF EQU 4041 +SSPBUF EQU 4041 +SSP1MSK EQU 4042 +SSPMSK EQU 4042 +SSP1CON3 EQU 4043 +SSPCON3 EQU 4043 +T1GCON EQU 4044 +T1CON EQU 4045 +TMR1 EQU 4046 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +OSCCON2 EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0 EQU 4054 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 diff --git a/resources/data/pic/pic18f26k22.package b/resources/data/pic/pic18f26k22.package new file mode 100644 index 0000000..ddf1d82 --- /dev/null +++ b/resources/data/pic/pic18f26k22.package @@ -0,0 +1,60 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic18f4221.data b/resources/data/pic/pic18f4221.data new file mode 100644 index 0000000..1b50bf9 --- /dev/null +++ b/resources/data/pic/pic18f4221.data @@ -0,0 +1,149 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=40 + +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +PORTD EQU 3971 +PORTE EQU 3972 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +LATD EQU 3980 +LATE EQU 3981 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +DDRD EQU 3989 +TRISD EQU 3989 +DDRE EQU 3990 +TRISE EQU 3990 +OSCTUNE EQU 3995 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEADR EQU 4009 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +SPBRGH EQU 4016 +T3CON EQU 4017 +TMR3 EQU 4018 +TMR3L EQU 4018 +TMR3H EQU 4019 +CMCON EQU 4020 +CVRCON EQU 4021 +ECCP1AS EQU 4022 +ECCP1DEL EQU 4023 +PWM1CON EQU 4023 +BAUDCON EQU 4024 +BAUDCTL EQU 4024 +CCP2CON EQU 4026 +CCPR2 EQU 4027 +CCPR2L EQU 4027 +CCPR2H EQU 4028 +CCP1CON EQU 4029 +ECCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON2 EQU 4032 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1 EQU 4046 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +HLVDCON EQU 4050 +LVDCON EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0 EQU 4054 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 diff --git a/resources/data/pic/pic18f442.data b/resources/data/pic/pic18f442.data new file mode 100644 index 0000000..9696e18 --- /dev/null +++ b/resources/data/pic/pic18f442.data @@ -0,0 +1,123 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=40 + +TOSU EQU 4095 +TOSH EQU 4094 +TOSL EQU 4093 +STKPTR EQU 4092 +PCLATU EQU 4091 +PCLATH EQU 4090 +PCL EQU 4089 +TBLPTRU EQU 4088 +TBLPTRH EQU 4087 +TBLPTRL EQU 4086 +TABLAT EQU 4085 +PRODH EQU 4084 +PRODL EQU 4083 +INTCON EQU 4082 +INTCON1 EQU 4082 +INTCON2 EQU 4081 +INTCON3 EQU 4080 +INDF0 EQU 4079 +POSTINC0 EQU 4078 +POSTDEC0 EQU 4077 +PREINC0 EQU 4076 +PLUSW0 EQU 4075 +FSR0H EQU 4074 +FSR0L EQU 4073 +WREG EQU 4072 +INDF1 EQU 4071 +POSTINC1 EQU 4070 +POSTDEC1 EQU 4069 +PREINC1 EQU 4068 +PLUSW1 EQU 4067 +FSR1H EQU 4066 +FSR1L EQU 4065 +BSR EQU 4064 +INDF2 EQU 4063 +POSTINC2 EQU 4062 +POSTDEC2 EQU 4061 +PREINC2 EQU 4060 +PLUSW2 EQU 4059 +FSR2H EQU 4058 +FSR2L EQU 4057 +STATUS EQU 4056 +TMR0H EQU 4055 +TMR0L EQU 4054 +T0CON EQU 4053 +OSCCON EQU 4051 +LVDCON EQU 4050 +WDTCON EQU 4049 +RCON EQU 4048 +TMR1H EQU 4047 +TMR1L EQU 4046 +T1CON EQU 4045 +TMR2 EQU 4044 +PR2 EQU 4043 +T2CON EQU 4042 +SSPBUF EQU 4041 +SSPADD EQU 4040 +SSPSTAT EQU 4039 +SSPCON1 EQU 4038 +SSPCON2 EQU 4037 +ADRESH EQU 4036 +ADRESL EQU 4035 +ADCON0 EQU 4034 +ADCON1 EQU 4033 +CCPR1H EQU 4031 +CCPR1L EQU 4030 +CCP1CON EQU 4029 +CCPR2H EQU 4028 +CCPR2L EQU 4027 +CCP2CON EQU 4026 +TMR3H EQU 4019 +TMR3L EQU 4018 +T3CON EQU 4017 +SPBRG EQU 4015 +RCREG EQU 4014 +TXREG EQU 4013 +TXSTA EQU 4012 +RCSTA EQU 4011 +EEADR EQU 4009 +EEDATA EQU 4008 +EECON2 EQU 4007 +EECON1 EQU 4006 +IPR2 EQU 4002 +PIR2 EQU 4001 +PIE2 EQU 4000 +IPR1 EQU 3999 +PIR1 EQU 3998 +PIE1 EQU 3997 +TRISE EQU 3990 +TRISD EQU 3989 +TRISC EQU 3988 +TRISB EQU 3987 +TRISA EQU 3986 +LATE EQU 3981 +LATD EQU 3980 +LATC EQU 3979 +LATB EQU 3978 +LATA EQU 3977 +PORTE EQU 3972 +PORTD EQU 3971 +PORTC EQU 3970 +PORTB EQU 3969 +PORTA EQU 3968 diff --git a/resources/data/pic/pic18f4420.data b/resources/data/pic/pic18f4420.data new file mode 100644 index 0000000..56988e5 --- /dev/null +++ b/resources/data/pic/pic18f4420.data @@ -0,0 +1,150 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License EQU or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful EQU # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not EQU see . # + # # + ########################################################################### + + +MaxMHz=40 + +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +PORTD EQU 3971 +PORTE EQU 3972 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +LATD EQU 3980 +LATE EQU 3981 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +DDRD EQU 3989 +TRISD EQU 3989 +DDRE EQU 3990 +TRISE EQU 3990 +OSCTUNE EQU 3995 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEADR EQU 4009 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +SPBRGH EQU 4016 +T3CON EQU 4017 +TMR3 EQU 4018 +TMR3L EQU 4018 +TMR3H EQU 4019 +CMCON EQU 4020 +CVRCON EQU 4021 +ECCP1AS EQU 4022 +ECCPAS EQU 4022 +ECCP1DEL EQU 4023 +PWM1CON EQU 4023 +BAUDCON EQU 4024 +BAUDCTL EQU 4024 +CCP2CON EQU 4026 +CCPR2 EQU 4027 +CCPR2L EQU 4027 +CCPR2H EQU 4028 +CCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON2 EQU 4032 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1 EQU 4046 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +HLVDCON EQU 4050 +LVDCON EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0 EQU 4054 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 diff --git a/resources/data/pic/pic18f4455.data b/resources/data/pic/pic18f4455.data new file mode 100644 index 0000000..6b72a11 --- /dev/null +++ b/resources/data/pic/pic18f4455.data @@ -0,0 +1,181 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=48 + +SPPDATA EQU 3938 +SPPCFG EQU 3939 +SPPEPS EQU 3940 +SPPCON EQU 3941 +UFRM EQU 3942 +UFRML EQU 3942 +UFRMH EQU 3943 +UIR EQU 3944 +UIE EQU 3945 +UEIR EQU 3946 +UEIE EQU 3947 +USTAT EQU 3948 +UCON EQU 3949 +UADDR EQU 3950 +UCFG EQU 3951 +UEP0 EQU 3952 +UEP1 EQU 3953 +UEP2 EQU 3954 +UEP3 EQU 3955 +UEP4 EQU 3956 +UEP5 EQU 3957 +UEP6 EQU 3958 +UEP7 EQU 3959 +UEP8 EQU 3960 +UEP9 EQU 3961 +UEP10 EQU 3962 +UEP11 EQU 3963 +UEP12 EQU 3964 +UEP13 EQU 3965 +UEP14 EQU 3966 +UEP15 EQU 3967 +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +PORTD EQU 3971 +PORTE EQU 3972 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +LATD EQU 3980 +LATE EQU 3981 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +DDRD EQU 3989 +TRISD EQU 3989 +DDRE EQU 3990 +TRISE EQU 3990 +OSCTUNE EQU 3995 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEADR EQU 4009 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +SPBRGH EQU 4016 +T3CON EQU 4017 +TMR3 EQU 4018 +TMR3L EQU 4018 +TMR3H EQU 4019 +CMCON EQU 4020 +CVRCON EQU 4021 +CCP1AS EQU 4022 +ECCP1AS EQU 4022 +CCP1DEL EQU 4023 +ECCP1DEL EQU 4023 +BAUDCON EQU 4024 +BAUDCTL EQU 4024 +CCP2CON EQU 4026 +CCPR2 EQU 4027 +CCPR2L EQU 4027 +CCPR2H EQU 4028 +CCP1CON EQU 4029 +ECCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON2 EQU 4032 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1 EQU 4046 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +HLVDCON EQU 4050 +LVDCON EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0 EQU 4054 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 diff --git a/resources/data/pic/pic18f448.data b/resources/data/pic/pic18f448.data new file mode 100644 index 0000000..e102428 --- /dev/null +++ b/resources/data/pic/pic18f448.data @@ -0,0 +1,242 @@ + +MaxMHz=40 + +RXF0SIDH EQU 3840 +RXF0SIDL EQU 3841 +RXF0EIDH EQU 3842 +RXF0EIDL EQU 3843 +RXF1SIDH EQU 3844 +RXF1SIDL EQU 3845 +RXF1EIDH EQU 3846 +RXF1EIDL EQU 3847 +RXF2SIDH EQU 3848 +RXF2SIDL EQU 3849 +RXF2EIDH EQU 3850 +RXF2EIDL EQU 3851 +RXF3SIDH EQU 3852 +RXF3SIDL EQU 3853 +RXF3EIDH EQU 3854 +RXF3EIDL EQU 3855 +RXF4SIDH EQU 3856 +RXF4SIDL EQU 3857 +RXF4EIDH EQU 3858 +RXF4EIDL EQU 3859 +RXF5SIDH EQU 3860 +RXF5SIDL EQU 3861 +RXF5EIDH EQU 3862 +RXF5EIDL EQU 3863 +RXM0SIDH EQU 3864 +RXM0SIDL EQU 3865 +RXM0EIDH EQU 3866 +RXM0EIDL EQU 3867 +RXM1SIDH EQU 3868 +RXM1SIDL EQU 3869 +RXM1EIDH EQU 3870 +RXM1EIDL EQU 3871 +TXB2CON EQU 3872 +TXB2SIDH EQU 3873 +TXB2SIDL EQU 3874 +TXB2EIDH EQU 3875 +TXB2EIDL EQU 3876 +TXB2DLC EQU 3877 +TXB2D0 EQU 3878 +TXB2D1 EQU 3879 +TXB2D2 EQU 3880 +TXB2D3 EQU 3881 +TXB2D4 EQU 3882 +TXB2D5 EQU 3883 +TXB2D6 EQU 3884 +TXB2D7 EQU 3885 +CANSTATRO4 EQU 3886 +TXB1CON EQU 3888 +TXB1SIDH EQU 3889 +TXB1SIDL EQU 3890 +TXB1EIDH EQU 3891 +TXB1EIDL EQU 3892 +TXB1DLC EQU 3893 +TXB1D0 EQU 3894 +TXB1D1 EQU 3895 +TXB1D2 EQU 3896 +TXB1D3 EQU 3897 +TXB1D4 EQU 3898 +TXB1D5 EQU 3899 +TXB1D6 EQU 3900 +TXB1D7 EQU 3901 +CANSTATRO3 EQU 3902 +TXB0CON EQU 3904 +TXB0SIDH EQU 3905 +TXB0SIDL EQU 3906 +TXB0EIDH EQU 3907 +TXB0EIDL EQU 3908 +TXB0DLC EQU 3909 +TXB0D0 EQU 3910 +TXB0D1 EQU 3911 +TXB0D2 EQU 3912 +TXB0D3 EQU 3913 +TXB0D4 EQU 3914 +TXB0D5 EQU 3915 +TXB0D6 EQU 3916 +TXB0D7 EQU 3917 +CANSTATRO2 EQU 3918 +RXB1CON EQU 3920 +RXB1SIDH EQU 3921 +RXB1SIDL EQU 3922 +RXB1EIDH EQU 3923 +RXB1EIDL EQU 3924 +RXB1DLC EQU 3925 +RXB1D0 EQU 3926 +RXB1D1 EQU 3927 +RXB1D2 EQU 3928 +RXB1D3 EQU 3929 +RXB1D4 EQU 3930 +RXB1D5 EQU 3931 +RXB1D6 EQU 3932 +RXB1D7 EQU 3933 +CANSTATRO1 EQU 3934 +RXB0CON EQU 3936 +RXB0SIDH EQU 3937 +RXB0SIDL EQU 3938 +RXB0EIDH EQU 3939 +RXB0EIDL EQU 3940 +RXB0DLC EQU 3941 +RXB0D0 EQU 3942 +RXB0D1 EQU 3943 +RXB0D2 EQU 3944 +RXB0D3 EQU 3945 +RXB0D4 EQU 3946 +RXB0D5 EQU 3947 +RXB0D6 EQU 3948 +RXB0D7 EQU 3949 +CANSTAT EQU 3950 +CANCON EQU 3951 +BRGCON1 EQU 3952 +BRGCON2 EQU 3953 +BRGCON3 EQU 3954 +CIOCON EQU 3955 +COMSTAT EQU 3956 +RXERRCNT EQU 3957 +TXERRCNT EQU 3958 +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +PORTD EQU 3971 +PORTE EQU 3972 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +LATD EQU 3980 +LATE EQU 3981 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +DDRD EQU 3989 +TRISD EQU 3989 +DDRE EQU 3990 +TRISE EQU 3990 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +PIE3 EQU 4003 +PIR3 EQU 4004 +IPR3 EQU 4005 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEADR EQU 4009 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +T3CON EQU 4017 +TMR3 EQU 4018 +TMR3L EQU 4018 +TMR3H EQU 4019 +CMCON EQU 4020 +CVRCON EQU 4021 +ECCPAS EQU 4022 +ECCP1DEL EQU 4023 +ECCP1CON EQU 4026 +ECCPR1 EQU 4027 +ECCPR1L EQU 4027 +ECCPR1H EQU 4028 +CCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1 EQU 4046 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +LVDCON EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0 EQU 4054 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +INTCON1 EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 diff --git a/resources/data/pic/pic18f4520.data b/resources/data/pic/pic18f4520.data new file mode 100644 index 0000000..fa2bde1 --- /dev/null +++ b/resources/data/pic/pic18f4520.data @@ -0,0 +1,147 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=40 + +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +PORTD EQU 3971 +PORTE EQU 3972 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +LATD EQU 3980 +LATE EQU 3981 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +DDRD EQU 3989 +TRISD EQU 3989 +DDRE EQU 3990 +TRISE EQU 3990 +OSCTUNE EQU 3995 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEADR EQU 4009 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +SPBRGH EQU 4016 +T3CON EQU 4017 +TMR3L EQU 4018 +TMR3H EQU 4019 +CMCON EQU 4020 +CVRCON EQU 4021 +ECCP1AS EQU 4022 +PWM1CON EQU 4023 +BAUDCON EQU 4024 +BAUDCTL EQU 4024 +CCP2CON EQU 4026 +CCPR2 EQU 4027 +CCPR2L EQU 4027 +CCPR2H EQU 4028 +CCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON2 EQU 4032 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +HLVDCON EQU 4050 +LVDCON EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 + + + diff --git a/resources/data/pic/pic18f4520.package b/resources/data/pic/pic18f4520.package new file mode 100644 index 0000000..fc14d15 --- /dev/null +++ b/resources/data/pic/pic18f4520.package @@ -0,0 +1,75 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic18f4550.data b/resources/data/pic/pic18f4550.data new file mode 100644 index 0000000..6b72a11 --- /dev/null +++ b/resources/data/pic/pic18f4550.data @@ -0,0 +1,181 @@ + ########################################################################### + # Copyright (C) 2017 by santiago González # + # santigoro@gmail.com # + # # + # This program is free software; you can redistribute it and/or modify # + # it under the terms of the GNU General Public License as published by # + # the Free Software Foundation; either version 3 of the License, or # + # (at your option) any later version. # + # # + # This program is distributed in the hope that it will be useful, # + # but WITHOUT ANY WARRANTY; without even the implied warranty of # + # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # + # GNU General Public License for more details. # + # # + # You should have received a copy of the GNU General Public License # + # along with this program; if not, see . # + # # + ########################################################################### + +MaxMHz=48 + +SPPDATA EQU 3938 +SPPCFG EQU 3939 +SPPEPS EQU 3940 +SPPCON EQU 3941 +UFRM EQU 3942 +UFRML EQU 3942 +UFRMH EQU 3943 +UIR EQU 3944 +UIE EQU 3945 +UEIR EQU 3946 +UEIE EQU 3947 +USTAT EQU 3948 +UCON EQU 3949 +UADDR EQU 3950 +UCFG EQU 3951 +UEP0 EQU 3952 +UEP1 EQU 3953 +UEP2 EQU 3954 +UEP3 EQU 3955 +UEP4 EQU 3956 +UEP5 EQU 3957 +UEP6 EQU 3958 +UEP7 EQU 3959 +UEP8 EQU 3960 +UEP9 EQU 3961 +UEP10 EQU 3962 +UEP11 EQU 3963 +UEP12 EQU 3964 +UEP13 EQU 3965 +UEP14 EQU 3966 +UEP15 EQU 3967 +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +PORTD EQU 3971 +PORTE EQU 3972 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +LATD EQU 3980 +LATE EQU 3981 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +DDRD EQU 3989 +TRISD EQU 3989 +DDRE EQU 3990 +TRISE EQU 3990 +OSCTUNE EQU 3995 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEADR EQU 4009 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +SPBRGH EQU 4016 +T3CON EQU 4017 +TMR3 EQU 4018 +TMR3L EQU 4018 +TMR3H EQU 4019 +CMCON EQU 4020 +CVRCON EQU 4021 +CCP1AS EQU 4022 +ECCP1AS EQU 4022 +CCP1DEL EQU 4023 +ECCP1DEL EQU 4023 +BAUDCON EQU 4024 +BAUDCTL EQU 4024 +CCP2CON EQU 4026 +CCPR2 EQU 4027 +CCPR2L EQU 4027 +CCPR2H EQU 4028 +CCP1CON EQU 4029 +ECCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON2 EQU 4032 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1 EQU 4046 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +HLVDCON EQU 4050 +LVDCON EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0 EQU 4054 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 diff --git a/resources/data/pic/pic18f4550.package b/resources/data/pic/pic18f4550.package new file mode 100644 index 0000000..544a012 --- /dev/null +++ b/resources/data/pic/pic18f4550.package @@ -0,0 +1,77 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/pic/pic18f458.data b/resources/data/pic/pic18f458.data new file mode 100644 index 0000000..e102428 --- /dev/null +++ b/resources/data/pic/pic18f458.data @@ -0,0 +1,242 @@ + +MaxMHz=40 + +RXF0SIDH EQU 3840 +RXF0SIDL EQU 3841 +RXF0EIDH EQU 3842 +RXF0EIDL EQU 3843 +RXF1SIDH EQU 3844 +RXF1SIDL EQU 3845 +RXF1EIDH EQU 3846 +RXF1EIDL EQU 3847 +RXF2SIDH EQU 3848 +RXF2SIDL EQU 3849 +RXF2EIDH EQU 3850 +RXF2EIDL EQU 3851 +RXF3SIDH EQU 3852 +RXF3SIDL EQU 3853 +RXF3EIDH EQU 3854 +RXF3EIDL EQU 3855 +RXF4SIDH EQU 3856 +RXF4SIDL EQU 3857 +RXF4EIDH EQU 3858 +RXF4EIDL EQU 3859 +RXF5SIDH EQU 3860 +RXF5SIDL EQU 3861 +RXF5EIDH EQU 3862 +RXF5EIDL EQU 3863 +RXM0SIDH EQU 3864 +RXM0SIDL EQU 3865 +RXM0EIDH EQU 3866 +RXM0EIDL EQU 3867 +RXM1SIDH EQU 3868 +RXM1SIDL EQU 3869 +RXM1EIDH EQU 3870 +RXM1EIDL EQU 3871 +TXB2CON EQU 3872 +TXB2SIDH EQU 3873 +TXB2SIDL EQU 3874 +TXB2EIDH EQU 3875 +TXB2EIDL EQU 3876 +TXB2DLC EQU 3877 +TXB2D0 EQU 3878 +TXB2D1 EQU 3879 +TXB2D2 EQU 3880 +TXB2D3 EQU 3881 +TXB2D4 EQU 3882 +TXB2D5 EQU 3883 +TXB2D6 EQU 3884 +TXB2D7 EQU 3885 +CANSTATRO4 EQU 3886 +TXB1CON EQU 3888 +TXB1SIDH EQU 3889 +TXB1SIDL EQU 3890 +TXB1EIDH EQU 3891 +TXB1EIDL EQU 3892 +TXB1DLC EQU 3893 +TXB1D0 EQU 3894 +TXB1D1 EQU 3895 +TXB1D2 EQU 3896 +TXB1D3 EQU 3897 +TXB1D4 EQU 3898 +TXB1D5 EQU 3899 +TXB1D6 EQU 3900 +TXB1D7 EQU 3901 +CANSTATRO3 EQU 3902 +TXB0CON EQU 3904 +TXB0SIDH EQU 3905 +TXB0SIDL EQU 3906 +TXB0EIDH EQU 3907 +TXB0EIDL EQU 3908 +TXB0DLC EQU 3909 +TXB0D0 EQU 3910 +TXB0D1 EQU 3911 +TXB0D2 EQU 3912 +TXB0D3 EQU 3913 +TXB0D4 EQU 3914 +TXB0D5 EQU 3915 +TXB0D6 EQU 3916 +TXB0D7 EQU 3917 +CANSTATRO2 EQU 3918 +RXB1CON EQU 3920 +RXB1SIDH EQU 3921 +RXB1SIDL EQU 3922 +RXB1EIDH EQU 3923 +RXB1EIDL EQU 3924 +RXB1DLC EQU 3925 +RXB1D0 EQU 3926 +RXB1D1 EQU 3927 +RXB1D2 EQU 3928 +RXB1D3 EQU 3929 +RXB1D4 EQU 3930 +RXB1D5 EQU 3931 +RXB1D6 EQU 3932 +RXB1D7 EQU 3933 +CANSTATRO1 EQU 3934 +RXB0CON EQU 3936 +RXB0SIDH EQU 3937 +RXB0SIDL EQU 3938 +RXB0EIDH EQU 3939 +RXB0EIDL EQU 3940 +RXB0DLC EQU 3941 +RXB0D0 EQU 3942 +RXB0D1 EQU 3943 +RXB0D2 EQU 3944 +RXB0D3 EQU 3945 +RXB0D4 EQU 3946 +RXB0D5 EQU 3947 +RXB0D6 EQU 3948 +RXB0D7 EQU 3949 +CANSTAT EQU 3950 +CANCON EQU 3951 +BRGCON1 EQU 3952 +BRGCON2 EQU 3953 +BRGCON3 EQU 3954 +CIOCON EQU 3955 +COMSTAT EQU 3956 +RXERRCNT EQU 3957 +TXERRCNT EQU 3958 +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +PORTD EQU 3971 +PORTE EQU 3972 +LATA EQU 3977 +LATB EQU 3978 +LATC EQU 3979 +LATD EQU 3980 +LATE EQU 3981 +DDRA EQU 3986 +TRISA EQU 3986 +DDRB EQU 3987 +TRISB EQU 3987 +DDRC EQU 3988 +TRISC EQU 3988 +DDRD EQU 3989 +TRISD EQU 3989 +DDRE EQU 3990 +TRISE EQU 3990 +PIE1 EQU 3997 +PIR1 EQU 3998 +IPR1 EQU 3999 +PIE2 EQU 4000 +PIR2 EQU 4001 +IPR2 EQU 4002 +PIE3 EQU 4003 +PIR3 EQU 4004 +IPR3 EQU 4005 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEADR EQU 4009 +RCSTA EQU 4011 +TXSTA EQU 4012 +TXREG EQU 4013 +RCREG EQU 4014 +SPBRG EQU 4015 +T3CON EQU 4017 +TMR3 EQU 4018 +TMR3L EQU 4018 +TMR3H EQU 4019 +CMCON EQU 4020 +CVRCON EQU 4021 +ECCPAS EQU 4022 +ECCP1DEL EQU 4023 +ECCP1CON EQU 4026 +ECCPR1 EQU 4027 +ECCPR1L EQU 4027 +ECCPR1H EQU 4028 +CCP1CON EQU 4029 +CCPR1 EQU 4030 +CCPR1L EQU 4030 +CCPR1H EQU 4031 +ADCON1 EQU 4033 +ADCON0 EQU 4034 +ADRES EQU 4035 +ADRESL EQU 4035 +ADRESH EQU 4036 +SSPCON2 EQU 4037 +SSPCON1 EQU 4038 +SSPSTAT EQU 4039 +SSPADD EQU 4040 +SSPBUF EQU 4041 +T2CON EQU 4042 +PR2 EQU 4043 +TMR2 EQU 4044 +T1CON EQU 4045 +TMR1 EQU 4046 +TMR1L EQU 4046 +TMR1H EQU 4047 +RCON EQU 4048 +WDTCON EQU 4049 +LVDCON EQU 4050 +OSCCON EQU 4051 +T0CON EQU 4053 +TMR0 EQU 4054 +TMR0L EQU 4054 +TMR0H EQU 4055 +STATUS EQU 4056 +FSR2L EQU 4057 +FSR2H EQU 4058 +PLUSW2 EQU 4059 +PREINC2 EQU 4060 +POSTDEC2 EQU 4061 +POSTINC2 EQU 4062 +INDF2 EQU 4063 +BSR EQU 4064 +FSR1L EQU 4065 +FSR1H EQU 4066 +PLUSW1 EQU 4067 +PREINC1 EQU 4068 +POSTDEC1 EQU 4069 +POSTINC1 EQU 4070 +INDF1 EQU 4071 +WREG EQU 4072 +FSR0L EQU 4073 +FSR0H EQU 4074 +PLUSW0 EQU 4075 +PREINC0 EQU 4076 +POSTDEC0 EQU 4077 +POSTINC0 EQU 4078 +INDF0 EQU 4079 +INTCON3 EQU 4080 +INTCON2 EQU 4081 +INTCON EQU 4082 +INTCON1 EQU 4082 +PROD EQU 4083 +PRODL EQU 4083 +PRODH EQU 4084 +TABLAT EQU 4085 +TBLPTR EQU 4086 +TBLPTRL EQU 4086 +TBLPTRH EQU 4087 +TBLPTRU EQU 4088 +PC EQU 4089 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +STKPTR EQU 4092 +TOS EQU 4093 +TOSL EQU 4093 +TOSH EQU 4094 +TOSU EQU 4095 diff --git a/resources/data/pics.xml b/resources/data/pics.xml new file mode 100644 index 0000000..e126f03 --- /dev/null +++ b/resources/data/pics.xml @@ -0,0 +1,149 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ternary.xml b/resources/data/ternary.xml new file mode 100644 index 0000000..487505e --- /dev/null +++ b/resources/data/ternary.xml @@ -0,0 +1,41 @@ + + + + + + + + + + + + + + + + + + + + + + + QT_TRANSLATE_NOOP("xmlfile","Logic") + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ternary/Ternary_AND.package b/resources/data/ternary/Ternary_AND.package new file mode 100644 index 0000000..678a5cd --- /dev/null +++ b/resources/data/ternary/Ternary_AND.package @@ -0,0 +1,19 @@ + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ternary/Ternary_AND.subcircuit b/resources/data/ternary/Ternary_AND.subcircuit new file mode 100644 index 0000000..bfe8db0 --- /dev/null +++ b/resources/data/ternary/Ternary_AND.subcircuit @@ -0,0 +1,166 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ternary/Ternary_AND_LS.package b/resources/data/ternary/Ternary_AND_LS.package new file mode 100644 index 0000000..2099c72 --- /dev/null +++ b/resources/data/ternary/Ternary_AND_LS.package @@ -0,0 +1,14 @@ + + + + + + + + + + + + + + diff --git a/resources/data/ternary/Ternary_BUF.package b/resources/data/ternary/Ternary_BUF.package new file mode 100644 index 0000000..aeb3e68 --- /dev/null +++ b/resources/data/ternary/Ternary_BUF.package @@ -0,0 +1,17 @@ + + + + + + + + + + + + + + + + + diff --git a/resources/data/ternary/Ternary_BUF.subcircuit b/resources/data/ternary/Ternary_BUF.subcircuit new file mode 100644 index 0000000..cc9c9c5 --- /dev/null +++ b/resources/data/ternary/Ternary_BUF.subcircuit @@ -0,0 +1,95 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ternary/Ternary_BUF_LS.package b/resources/data/ternary/Ternary_BUF_LS.package new file mode 100644 index 0000000..20b0f61 --- /dev/null +++ b/resources/data/ternary/Ternary_BUF_LS.package @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/resources/data/ternary/Ternary_MUX.package b/resources/data/ternary/Ternary_MUX.package new file mode 100644 index 0000000..e0277a0 --- /dev/null +++ b/resources/data/ternary/Ternary_MUX.package @@ -0,0 +1,19 @@ + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ternary/Ternary_MUX.subcircuit b/resources/data/ternary/Ternary_MUX.subcircuit new file mode 100644 index 0000000..1eb0559 --- /dev/null +++ b/resources/data/ternary/Ternary_MUX.subcircuit @@ -0,0 +1,83 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ternary/Ternary_MUX_LS.package b/resources/data/ternary/Ternary_MUX_LS.package new file mode 100644 index 0000000..daffc25 --- /dev/null +++ b/resources/data/ternary/Ternary_MUX_LS.package @@ -0,0 +1,16 @@ + + + + + + + + + + + + + + + + diff --git a/resources/data/ternary/Ternary_NAND.package b/resources/data/ternary/Ternary_NAND.package new file mode 100644 index 0000000..d62a14c --- /dev/null +++ b/resources/data/ternary/Ternary_NAND.package @@ -0,0 +1,19 @@ + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ternary/Ternary_NAND.subcircuit b/resources/data/ternary/Ternary_NAND.subcircuit new file mode 100644 index 0000000..5f407d0 --- /dev/null +++ b/resources/data/ternary/Ternary_NAND.subcircuit @@ -0,0 +1,255 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ternary/Ternary_NAND_LS.package b/resources/data/ternary/Ternary_NAND_LS.package new file mode 100644 index 0000000..66039a4 --- /dev/null +++ b/resources/data/ternary/Ternary_NAND_LS.package @@ -0,0 +1,14 @@ + + + + + + + + + + + + + + diff --git a/resources/data/ternary/Ternary_NOR.package b/resources/data/ternary/Ternary_NOR.package new file mode 100644 index 0000000..d62a14c --- /dev/null +++ b/resources/data/ternary/Ternary_NOR.package @@ -0,0 +1,19 @@ + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ternary/Ternary_NOR.subcircuit b/resources/data/ternary/Ternary_NOR.subcircuit new file mode 100644 index 0000000..45118f3 --- /dev/null +++ b/resources/data/ternary/Ternary_NOR.subcircuit @@ -0,0 +1,249 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ternary/Ternary_NOR_LS.package b/resources/data/ternary/Ternary_NOR_LS.package new file mode 100644 index 0000000..66039a4 --- /dev/null +++ b/resources/data/ternary/Ternary_NOR_LS.package @@ -0,0 +1,14 @@ + + + + + + + + + + + + + + diff --git a/resources/data/ternary/Ternary_NOT.package b/resources/data/ternary/Ternary_NOT.package new file mode 100644 index 0000000..b30bfe5 --- /dev/null +++ b/resources/data/ternary/Ternary_NOT.package @@ -0,0 +1,17 @@ + + + + + + + + + + + + + + + + + diff --git a/resources/data/ternary/Ternary_NOT.subcircuit b/resources/data/ternary/Ternary_NOT.subcircuit new file mode 100644 index 0000000..cb0af9e --- /dev/null +++ b/resources/data/ternary/Ternary_NOT.subcircuit @@ -0,0 +1,95 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ternary/Ternary_NOT_LS.package b/resources/data/ternary/Ternary_NOT_LS.package new file mode 100644 index 0000000..c53b4ee --- /dev/null +++ b/resources/data/ternary/Ternary_NOT_LS.package @@ -0,0 +1,13 @@ + + + + + + + + + + + + + diff --git a/resources/data/ternary/Ternary_OR.package b/resources/data/ternary/Ternary_OR.package new file mode 100644 index 0000000..678a5cd --- /dev/null +++ b/resources/data/ternary/Ternary_OR.package @@ -0,0 +1,19 @@ + + + + + + + + + + + + + + + + + + + diff --git a/resources/data/ternary/Ternary_OR.subcircuit b/resources/data/ternary/Ternary_OR.subcircuit new file mode 100644 index 0000000..06b53f7 --- /dev/null +++ b/resources/data/ternary/Ternary_OR.subcircuit @@ -0,0 +1,160 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/resources/data/ternary/Ternary_OR_LS.package b/resources/data/ternary/Ternary_OR_LS.package new file mode 100644 index 0000000..2099c72 --- /dev/null +++ b/resources/data/ternary/Ternary_OR_LS.package @@ -0,0 +1,14 @@ + + + + + + + + + + + + + + diff --git a/resources/examples/Arduino/AlarmClock/AlarmClock.simu b/resources/examples/Arduino/AlarmClock/AlarmClock.simu new file mode 100644 index 0000000..f462bfa --- /dev/null +++ b/resources/examples/Arduino/AlarmClock/AlarmClock.simu @@ -0,0 +1,93 @@ + + +Node-10: + + +Node-9: + + +Node-8: + + +Reistencia-7: + + +Reistencia-6: + + +Pulsador-5: + + +Pulsador-4: + + +Hd44780-3: + + +Arduino Uno-2: + + +Node-1: + + +Connector-11: + + +Connector-13: + + +Connector-15: + + +Connector-17: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-26: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-32: + + +Connector-33: + + +Connector-35: + + +Connector-36: + + +Connector-37: + + +Connector-38: + + +PlotterWidget-39: + + +SerialPortWidget-40: + + + diff --git a/resources/examples/Arduino/AlarmClock/AlarmClock_ino/AlarmClock.ino b/resources/examples/Arduino/AlarmClock/AlarmClock_ino/AlarmClock.ino new file mode 100644 index 0000000..c38de9c --- /dev/null +++ b/resources/examples/Arduino/AlarmClock/AlarmClock_ino/AlarmClock.ino @@ -0,0 +1,204 @@ +/* + LiquidCrystal Library - Hello World + + Demonstrates the use a 16x2 LCD display. The LiquidCrystal + library works with all LCD displays that are compatible with the + Hitachi HD44780 driver. There are many of them out there, and you + can usually tell them by the 16-pin interface. + + This sketch prints "Hello World!" to the LCD + and shows the time. + + The circuit: + * LCD RS pin to digital pin 12 + * LCD Enable pin to digital pin 11 + * LCD D4 pin to digital pin 5 + * LCD D5 pin to digital pin 4 + * LCD D6 pin to digital pin 3 + * LCD D7 pin to digital pin 2 + * LCD R/W pin to ground + * LCD VSS pin to ground + * LCD VCC pin to 5V + * 10K resistor: + * ends to +5V and ground + * wiper to LCD VO pin (pin 3) + + Library originally added 18 Apr 2008 + by David A. Mellis + library modified 5 Jul 2009 + by Limor Fried (http://www.ladyada.net) + example added 9 Jul 2009 + by Tom Igoe + modified 22 Nov 2010 + by Tom Igoe + modified 7 Nov 2016 + by Arturo Guadalupi + + This example code is in the public domain. + + http://www.arduino.cc/en/Tutorial/LiquidCrystalHelloWorld + +*/ + +// include the library code: +#include + +struct time_t +{ + short hours; + short minutes; + short seconds; + bool operator==(time_t current) + { + if ((current.hours == hours) && (current.minutes == minutes) && (current.seconds == seconds)) + return true; + else + return false; + } +} alarm; + +// initialize the library by associating any needed LCD interface pin +// with the arduino pin number it is connected to +const int rs = 12, en = 11, d4 = 5, d5 = 4, d6 = 3, d7 = 2; +const int ledPin = LED_BUILTIN;// the number of the LED pin +enum state {TIME, SET_ALARM, SET_ALARM_HOURS, SET_ALARM_MINUTES, SET_ALARM_SECONDS}; +const int buttonMode = 6; +const int buttonSet = 7; + +// Variables will change: +enum state mode = TIME; +bool alarmOn = false; +int ledState = LOW; + +unsigned long lastDebounceTime = 0; +unsigned long debounceDelay = 50; + +LiquidCrystal lcd(rs, en, d4, d5, d6, d7); + +void setup() { + pinMode(ledPin, OUTPUT); + pinMode(buttonMode, INPUT); + pinMode(buttonSet, INPUT); + // set up the LCD's number of columns and rows: + lcd.begin(16, 2); + // Print a message to the LCD. + lcd.print("Time"); + alarm = {.hours = 0, .minutes = 0, .seconds = 7}; +} + +void printTime(struct time_t t) +{ + if (t.hours < 10) + lcd.print("0"); + lcd.print(t.hours); + lcd.print(":"); + if (t.minutes < 10) + lcd.print("0"); + lcd.print(t.minutes); + lcd.print(":"); + if (t.seconds < 10) + { + lcd.print("0"); + } + lcd.print(t.seconds); +} + +void loop() { + if (digitalRead(buttonMode)) + { + if ((mode == SET_ALARM) && (!alarmOn)) + mode = TIME; + else + mode = static_cast((mode + 1) % 5); + delay(100); + } + if (mode == TIME) + { + lcd.setCursor(0, 0); + lcd.print("Time "); + // set the cursor to column 0, line 1 + // (note: line 1 is the second row, since counting begins with 0): + lcd.setCursor(0, 1); + // print the number of seconds since reset: + time_t t = { .hours = static_cast(millis()/1000/60/60 % 24), .minutes = static_cast(millis()/1000/60 % 60), .seconds = static_cast(millis()/1000 % 60) }; + printTime(t); + if (alarmOn && (t == alarm)) + digitalWrite(ledPin, HIGH); + } + else if (mode == SET_ALARM) + { + if (digitalRead(buttonSet) == HIGH) + { + alarmOn = !alarmOn; + delay(100); + } + lcd.setCursor(0, 0); + lcd.print("Alarm"); + lcd.setCursor(0, 1); + if (millis()%500 < 250) + { + if (alarmOn) + lcd.print("ON "); + else + lcd.print("OFF "); + } + else + { + lcd.setCursor(0, 1); + lcd.print(" "); + } + } + else if (mode == SET_ALARM_HOURS) + { + if (digitalRead(buttonSet) == HIGH) + { + alarm.hours = (alarm.hours + 1) % 24; + delay(200); + } + lcd.setCursor(0, 1); + if (millis()%500 < 250) + { + printTime(alarm); + } + else + { + lcd.print(" "); + } + } + else if (mode == SET_ALARM_MINUTES) + { + if (digitalRead(buttonSet) == HIGH) + { + alarm.minutes = (alarm.minutes + 1) % 60; + delay(200); + } + lcd.setCursor(0, 1); + if (millis()%500 < 250) + { + printTime(alarm); + } + else + { + lcd.setCursor(3, 1); + lcd.print(" "); + } + } + else if (mode == SET_ALARM_SECONDS) + { + if (digitalRead(buttonSet) == HIGH) + { + alarm.seconds = (alarm.seconds + 1) % 60; + delay(200); + } + lcd.setCursor(0, 1); + if (millis()%500 < 250) + { + printTime(alarm); + } + else + { + lcd.setCursor(6, 1); + lcd.print(" "); + } + } +} diff --git a/resources/examples/Arduino/Arduino_SR04/arduino_sr04.simu b/resources/examples/Arduino/Arduino_SR04/arduino_sr04.simu new file mode 100644 index 0000000..59eea3d --- /dev/null +++ b/resources/examples/Arduino/Arduino_SR04/arduino_sr04.simu @@ -0,0 +1,27 @@ + + +SR04-3: + + +Arduino Uno-2: + + +Voltage Source-1: + + +Connector-4: + + +Connector-6: + + +Connector-8: + + +PlotterWidget-10: + + +SerialPortWidget-11: + + + diff --git a/resources/examples/Arduino/Arduino_SR04/arduino_sr04/arduino_sr04.ino b/resources/examples/Arduino/Arduino_SR04/arduino_sr04/arduino_sr04.ino new file mode 100644 index 0000000..6b03b0d --- /dev/null +++ b/resources/examples/Arduino/Arduino_SR04/arduino_sr04/arduino_sr04.ino @@ -0,0 +1,59 @@ +#define trigPin 10 +#define echoPin 9 + +int counter; +float duration; +float distance; +unsigned long time; + + +void setup() +{ + Serial.begin ( 9600); + pinMode( trigPin, OUTPUT ); + pinMode( echoPin, INPUT ); +} + +void loop() +{ + digitalWrite( trigPin, LOW ); + delayMicroseconds( 2 ); + + digitalWrite( trigPin, HIGH ); + delayMicroseconds( 10 ); + digitalWrite( trigPin, LOW ); + + //duration = pulseIn( echoPin, HIGH ); + + // Get Pulse duration with more accuracy than pulseIn() + duration = 0; + counter = 0; + while( --counter!=0 ) + { + if( PINB & 2 ) + { + time = micros(); + break; + } + } + while( --counter!=0 ) + { + if( (PINB & 2)==0 ) + { + duration = micros()-time; + break; + } + } + + distance = ( duration/2 ) * 0.0344; + + Serial.print("Distance: "); + + if ( distance > 400 ) Serial.print("> 400"); + else if( distance < 2 ) Serial.print("< 2"); + else Serial.print( distance ); + + Serial.println( " cm" ); + + delay( 1000 ); +} diff --git a/resources/examples/Arduino/DAC_Converter/DAC_Converter.simu b/resources/examples/Arduino/DAC_Converter/DAC_Converter.simu new file mode 100644 index 0000000..d30e069 --- /dev/null +++ b/resources/examples/Arduino/DAC_Converter/DAC_Converter.simu @@ -0,0 +1,54 @@ + + +Arduino Uno-7: + + +OpAmp-6: + + +Resistor-5: + + +Capacitor-4: + + +Node-3: + + +Probe-2: + + +Node-1: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-13: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-19: + + +PlotterWidget-20: + + +SerialPortWidget-21: + + + diff --git a/resources/examples/Arduino/Dimmer/Dimmer.simu b/resources/examples/Arduino/Dimmer/Dimmer.simu new file mode 100644 index 0000000..f79c1f8 --- /dev/null +++ b/resources/examples/Arduino/Dimmer/Dimmer.simu @@ -0,0 +1,42 @@ + + +Node-6: + + +Oscope-5: + + +Text-4: + + +Resistor-3: + + +Led-2: + + +Arduino Uno-1: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +Connector-14: + + +PlotterWidget-20: + + +SerialPortWidget-21: + + + diff --git a/resources/examples/Arduino/Keypad/HelloKeypad/HelloKeypad.ino b/resources/examples/Arduino/Keypad/HelloKeypad/HelloKeypad.ino new file mode 100644 index 0000000..2352532 --- /dev/null +++ b/resources/examples/Arduino/Keypad/HelloKeypad/HelloKeypad.ino @@ -0,0 +1,35 @@ +/* @file HelloKeypad.pde +|| @version 1.0 +|| @author Alexander Brevig +|| @contact alexanderbrevig@gmail.com +|| +|| @description +|| | Demonstrates the simplest use of the matrix Keypad library. +|| # +*/ +#include + +const byte ROWS = 4; //four rows +const byte COLS = 3; //three columns +char keys[ROWS][COLS] = { + {'1','2','3'}, + {'4','5','6'}, + {'7','8','9'}, + {'*','0','#'} +}; +byte rowPins[ROWS] = {2,3,4,5}; //connect to the row pinouts of the keypad +byte colPins[COLS] = {8, 7, 6}; //connect to the column pinouts of the keypad + +Keypad keypad = Keypad( makeKeymap(keys), rowPins, colPins, ROWS, COLS ); + +void setup(){ + Serial.begin(9600); +} + +void loop(){ + char key = keypad.getKey(); + + if (key){ + Serial.println(key); + } +} diff --git a/resources/examples/Arduino/Keypad/keypad.simu b/resources/examples/Arduino/Keypad/keypad.simu new file mode 100644 index 0000000..079d1b8 --- /dev/null +++ b/resources/examples/Arduino/Keypad/keypad.simu @@ -0,0 +1,36 @@ + + +Arduino Uno-2: + + +Teclado-1: + + +Connector-3: + + +Connector-5: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +Connector-15: + + +PlotterWidget-20: + + +SerialPortWidget-21: + + + diff --git a/resources/examples/Arduino/LCD-HD44780/lcd-arduino.simu b/resources/examples/Arduino/LCD-HD44780/lcd-arduino.simu new file mode 100644 index 0000000..17f443c --- /dev/null +++ b/resources/examples/Arduino/LCD-HD44780/lcd-arduino.simu @@ -0,0 +1,33 @@ + + +Arduino Uno-2: + + +Hd44780-1: + + +Connector-3: + + +Connector-5: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +PlotterWidget-20: + + +SerialPortWidget-21: + + + diff --git a/resources/examples/Arduino/Nano-Marduino_Game/Marduino.simu b/resources/examples/Arduino/Nano-Marduino_Game/Marduino.simu new file mode 100644 index 0000000..38c5eda --- /dev/null +++ b/resources/examples/Arduino/Nano-Marduino_Game/Marduino.simu @@ -0,0 +1,126 @@ + + +Node-15: + + +Node-14: + + +Pcd8544-13: + + +Arduino Nano-12: + + +Push-11: + + +Push-10: + + +Push-9: + + +Resistor-8: + + +Resistor-7: + + +Node-6: + + +Resistor-5: + + +Node-4: + + +Node-3: + + +Node-2: + + +Node-1: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-29: + + +Connector-30: + + +Connector-31: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-37: + + +Connector-38: + + +Connector-40: + + +Connector-41: + + +Connector-42: + + +Connector-43: + + +Connector-44: + + +Connector-46: + + +Connector-47: + + +Connector-48: + + +Connector-49: + + +PlotterWidget-50: + + +SerialPortWidget-51: + + + diff --git a/resources/examples/Arduino/Nano-Marduino_Game/marduino/LICENSE.md b/resources/examples/Arduino/Nano-Marduino_Game/marduino/LICENSE.md new file mode 100644 index 0000000..d789e19 --- /dev/null +++ b/resources/examples/Arduino/Nano-Marduino_Game/marduino/LICENSE.md @@ -0,0 +1,21 @@ +The MIT License (MIT) + +Copyright (c) 2016 Tobias Ulrich + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. diff --git a/resources/examples/Arduino/Nano-Marduino_Game/marduino/README.md b/resources/examples/Arduino/Nano-Marduino_Game/marduino/README.md new file mode 100644 index 0000000..bece526 --- /dev/null +++ b/resources/examples/Arduino/Nano-Marduino_Game/marduino/README.md @@ -0,0 +1,12 @@ +# Marduino +A platform game for Arduino Uno. +Watch on [Youtube](https://www.youtube.com/watch?v=y5DeofZac5w). + +![alt tag](https://tobiasbu.files.wordpress.com/2015/01/img_7140.jpg?w=540&h=287) + +###Requirements: +* [Arduino Uno](https://www.arduino.cc/en/Main/ArduinoBoardUno) +* Arduino IDE - **v1.6.9** +* [Nokia 5110](https://www.adafruit.com/product/338) display +* Three buttons +* Libraries [Adafruit GFX](https://github.com/adafruit/Adafruit-GFX-Library) and [Adafruit_PCD8544](https://github.com/adafruit/Adafruit-PCD8544-Nokia-5110-LCD-library) diff --git a/resources/examples/Arduino/Nano-Marduino_Game/marduino/levels.h b/resources/examples/Arduino/Nano-Marduino_Game/marduino/levels.h new file mode 100644 index 0000000..ea121ab --- /dev/null +++ b/resources/examples/Arduino/Nano-Marduino_Game/marduino/levels.h @@ -0,0 +1,36 @@ + +#include "marduinotypes.h" + +#ifndef LEVELS_H +#define LEVELS_H + +const int CollisionMap0Size = 15; + +TILEMAPSET CollisionMap0[] = { + 0, 40, 120, 8, +120, 32, 48, 8, +184, 32, 24, 8, +232, 24, 24, 8, +280, 24, 16, 8, +312, 16, 24, 8, +352, 24, 16, 8, +384, 40, 128, 8, +528, 32, 16, 8, +560, 24, 48, 8, +560,32, 8, 16, +600, 32, 8, 16, +624, 32, 24, 8, +680, 40, 120, 8, +472, 32, 16, 8 }; + +TILEMAPSET TileMap0[] = { +1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,162,1,163,1, +1,1,1,1,1,1,1,145,146,1,1,1,1,1,1,145,146,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,162,163,162,163,162,163,1,1,1,1,162,163,1,1,1,1,1,1,1,1,1,1,1,1,162,1,1,1,163, +1,1,1,1,1,1,1,161,1,1,1,145,146,1,1,161,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,11,11,11,1,1,1,1,1,1,145,146,1,1,1,162,163,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,162,1,1,163,162,1,1,163,162,163,162,1,1,163,1,1,162,163,1,1,162,163,1,1,162,1,1,1,1,1, +1,1,1,1,1,1,1,161,1,145,146,161,1,1,1,161,1,1,162,163,1,1,1,1,1,1,1,1,1,2,3,4,1,1,1,11,11,1,1,1,1,1,1,1,11,11,1,1,161,1,1,1,162,1,1,163,162,163,1,1,1,1,145,146,1,1,1,1,1,162,11,11,11,11,11,11,1,1,163,162,1,1,1,1,163,162,1,1,163,162,1,1,163,162,1,1,1,102,103,1, +1,1,1,1,1,1,1,161,1,161,1,161,1,1,1,76,77,77,77,77,78,1,1,2,3,4,1,1,1,1,14,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,161,1,1,162,1,1,1,1,163,1,163,55,56,1,161,1,1,1,11,11,162,1,11,1,162,1,1,11,1,1,2,3,4,1,1,1,1,163,1,1,162,1,1,1,1,163,162,163,1,118,119,1, +77,77,77,77,77,77,77,77,77,77,77,77,77,77,77,87,87,87,87,87,80,1,1,1,14,1,1,1,1,1,14,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,76,77,77,77,77,77,77,77,77,77,78,71,72,76,77,78,1,1,1,162,1,1,11,162,1,1,1,11,1,162,1,14,1,1,1,1,1,76,77,77,77,77,77,77,77,77,77,77,77,77,77,77 + +}; + +#endif diff --git a/resources/examples/Arduino/Nano-Marduino_Game/marduino/marduino.ino b/resources/examples/Arduino/Nano-Marduino_Game/marduino/marduino.ino new file mode 100644 index 0000000..1bd8f85 --- /dev/null +++ b/resources/examples/Arduino/Nano-Marduino_Game/marduino/marduino.ino @@ -0,0 +1,805 @@ +/* + * Super Marduino + * A platform game with Arduino Uno. + * + * Requirements: + * Nokia 5510 display and three buttons. + * Additional libraries: Adafruit GFX and Adafruit_PCD8544. + * + * Created by Tobias Beise Ulrich + * http://tobiasbu.github.io/website + * + * GitHub: + * https://github.com/tobiasbu/marduino + * + * 2014-2016. + * + * ------------------------------------- + * LAST UPDATE: 15/06/2016 + * Header information update. + * + */ + +#include +#include +#include + + + +#include "marduinotypes.h" +#include "tilemap.h" +#include "mariobitmap.h" +#include "levels.h" + + +Adafruit_PCD8544 display = Adafruit_PCD8544(8, 9, 10, 11, 12); +TileMap gameTilemap; + +#define DELAY 75 // delay for fixed update interval +#define P_STILL 0 +#define P_MOVE 1 +#define P_JUMP 2 +#define P_DEAD 3 + +#define GAME_INTRO 100 +#define GAME_TITLE 101 +#define GAME_CREDITS 102 +#define GAME_LEVEL 103 +#define GAME_PLAY 104 +#define GAME_GAMEOVER 105 + +unsigned int gamestate = GAME_INTRO; // game state +long TIMER_PREV = 0; // timer +unsigned long TIMER_CURRENT = 0; +//mario img +int const pimagew = 16; +int const pimageh = 16; +//marduino settings +int player_state = P_STILL; //player state +int player_direction = 1; +int last_direction = 1; +int life = 3; +long playertimer = 0; +long playertimer_prev = 0; +//posicao do mario +Vector2f player_position(0,display.height()-pimageh-8); +Vector2f player_position2(0,display.height()-pimageh-8); +Vector2f last_safe_position(0,display.height()-pimageh-8); +//horizontal speed vars +float hspd = 0; +float hspd_speed = 3.0; +//jump vars and gravity control +float grav = 0.6; +float jumpspd = 4.0; +float vspd = 0; +boolean onAir = false; +boolean check_pulo = false; +//animation vars +int frame = 0; +int frameMax = 4; +float frameSpd = 1; +float frameCounter = 0; +boolean animInit = false; +//collision box offset +float pboxoffsetx = 3; + +// camera control +Vector2f camera = {0,0}; +Vector2f last_camera = {0,0}; +int camera_player_side = 0; + + +float sign(float x) { + + if (x > 0) + return 1; + else if (x < 0) + return -1; + + return 0; + +}; + + + +boolean buttonPressing[] = {false,false,false}; // button is pressing +boolean buttonRelease[] = {false,false,false}; // button is released +boolean buttonPressed[] = {false,false,false}; // button has pressed one time +boolean buttonPressedCheck[] = {false,false,false}; +boolean buttonReleaseCheck[] = {false,false,false}; + +void inputManager(unsigned int pin0, unsigned int pin1, unsigned int pin2) { + + //input manager in loop || gerenciador de inputs em loop + + int p[3]; + p[0] = digitalRead(pin0);//Lê o pino 5 + p[1] = digitalRead(pin1);//Lê o pino 6 + p[2] = digitalRead(pin2);//Lê o pino 7 + + for (int i = 0; i < 3; i++) { + + if (buttonPressed[i]) { // pressed ok + buttonPressed[i] = false; + buttonPressedCheck[i] = true; + } + + if (buttonRelease[i]) { // release ok + buttonRelease[i] = false; + buttonReleaseCheck[i] = true; + } + + if (p[i] == LOW) { // arduino check + + buttonPressing[i] = true; // pressing button + + buttonRelease[i] = false; //turn release off + buttonReleaseCheck[i] = false; + + if (!buttonPressedCheck[i]) + buttonPressed[i] = true; + + } else { + //turn off all + buttonPressing[i] = false; + buttonPressed[i] = false; + buttonPressedCheck[i] = false; + + if (!buttonReleaseCheck[i]) //released button! + buttonRelease[i] = true; + } + + } + +} + + +boolean intersectionRect(float * rect1, float * rect2) { + + if (rect1[0] < rect2[0] + rect2[2] && rect1[0] + rect1[2] > rect2[0]) { + if (rect1[1] < rect2[1] + rect2[3] && rect1[3] + rect1[1] > rect2[1]) { + return true; + } + } + return false; + +} + +void playerCollisionChecker(float hs, float vs) { + + float playerRect[4] = {player_position.x+pboxoffsetx+hs+camera.x, player_position.y+vs,10,16}; + + for (int i = 0; i < CollisionMap0Size*4; i += 4) { + + float rectTest[] = {pgm_read_word_near(&CollisionMap0[i]), pgm_read_word_near(&CollisionMap0[i+1]), pgm_read_word_near(&CollisionMap0[i+2]), pgm_read_word_near(&CollisionMap0[i+3])}; + + if (intersectionRect(playerRect,rectTest)) { + if (hs != 0) { + + hspd = (int)hspd; + player_position.x = (int)player_position.x; + boolean corrector = false; + + while (!corrector) { + + playerRect[0] = player_position.x+pboxoffsetx+camera.x+sign(hspd); + + if (!intersectionRect(playerRect,rectTest)) + player_position.x += sign(hspd); + else + corrector = true; + } + + hspd = 0; + + break; + } + + if (vs != 0) { + + vspd = (int)vspd; + player_position.y = (int)player_position.y; + boolean correctorY = false; + + while (!correctorY) { + + playerRect[1] = player_position.y+camera.y+sign(vspd); + + if (!intersectionRect(playerRect,rectTest)) + player_position.y += sign(vspd); + else + correctorY = true; + } + + vspd = 0; + check_pulo = false; + break; + } + } + + + } + +} + +boolean verifyCollision(float * rect) { + + for (int i = 0; i < CollisionMap0Size*4; i += 4) { + + float rectTest[4] = {pgm_read_word_near(&CollisionMap0[i]), pgm_read_word_near(&CollisionMap0[i+1]), pgm_read_word_near(&CollisionMap0[i+2]), pgm_read_word_near(&CollisionMap0[i+3])}; + + if (intersectionRect(rect,rectTest)) { + return true; + } + + } + + return false; +} + +void playerLogic(boolean move_esq, boolean move_dir, boolean jump) { + + //HORIZONTAL MOVEMENT + + if (player_state != P_DEAD) { + + hspd = 0; + boolean moving = false; + + if (move_esq == true && move_dir == false) { + player_direction = 1; + moving = true; + } else if (move_dir == true && move_esq == false) { + player_direction = -1; + moving = true; + } + + if (moving) + hspd = hspd_speed * (float)player_direction; + + playerCollisionChecker(hspd,0); + + player_position2.x += hspd; + + if (camera_player_side == -1) { + if (player_position.x > (display.width()/2)-10) + camera_player_side = 0; + else + player_position.x += hspd; + + // screen limit < + if (player_position.x < 0) { + player_position.x = 0; + hspd = 0; + } + + } else if (camera_player_side == 1) { + if (player_position.x < (display.width()/2)-10) + camera_player_side = 0; + else + player_position.x += hspd; + + // screen limit > + if (player_position.x > display.width()) { + gamestate = GAME_TITLE; + /*player_position.x = display.width()-pimagew; + hspd = 0;*/ + } + } + + if (camera_player_side == 0) { + //verify for limit side > + if (camera.x >= 0 && camera.x <= gameTilemap.getMapWidth()*8-display.width()) { + camera.x += hspd; + } if (camera.x > gameTilemap.getMapWidth()*8-display.width()) { + camera_player_side = 1; + camera.x = gameTilemap.getMapWidth()*8-display.width(); + player_position.x += hspd; + } if (camera.x < 0) { + camera_player_side = -1; + player_position.x += hspd; + camera.x = 0; + } + } + + //VERTICAL MOVEMENT + + //gravidade (esta no ar) + float playerRect[4] = { camera.x+player_position.x+pboxoffsetx,camera.y+player_position.y+1, 10, 16 }; + + if (!verifyCollision(playerRect)) { + vspd += grav; + check_pulo = true; + onAir = true; + } else { + onAir = false; + } + + // checa colisao com chao + if (vspd != 0) { + playerCollisionChecker(0,vspd); + } + + if (jump == true && check_pulo == false) { + vspd -= jumpspd; + check_pulo = true; + } + + player_position.y += vspd; + player_position2.y += vspd; + + if (vspd == 0 && !onAir) { + last_direction = player_direction; + last_camera.x = camera.x; + last_camera.y = player_position2.y; + last_safe_position.x = player_position.x; + last_safe_position.y = player_position.y; + } + + //fall + + if (player_position.y+camera.y > gameTilemap.getMapHeight()*gameTilemap.getTileHeight()) { + if (player_state != P_DEAD) + player_state = P_DEAD; + } + + if (player_state != P_DEAD) { + if (hspd == 0 && vspd == 0) { + if (player_state != P_STILL) { + player_state = P_STILL; + animInit = true; + } + } else if (hspd != 0 && vspd == 0) { + if (player_state != P_MOVE) { + player_state = P_MOVE; + animInit = true; + } + } + + if (vspd != 0) { + if (player_state != P_JUMP) { + player_state = P_JUMP; + animInit = true; + } + } + + + } + } else { + + playertimer++; // every DELAY | 1 = 75 millis + + if (playertimer > 1000/75) { // 1 sec + + playertimer = 0; + life--; + + if (life > 0) { + player_position.x = (int)((last_safe_position.x/8)*8);/*+(8*-last_direction);*/ + player_position.y = (int)((last_safe_position.y/8)*8); + player_position2.x = player_position.x; + camera.x = (int)((last_camera.x/8)*8);/*+(8*last_direction);*//*-(display.width()/2)-8;*/ + camera.y = 0; + player_state = P_STILL; + vspd = 0; + hspd = 0; + check_pulo = false; + } else { + gamestate = GAME_GAMEOVER; + } + } + } + +} + +void playerDraw() { + + //BMP * frameAtual; + const unsigned char * frameAtual; + + //animation setup + if (animInit) { + + frame = 0; + frameCounter = 0; + + if (player_state == P_STILL || player_state == P_JUMP) { + frameSpd = 0.; + frameMax = 1; + } else if (player_state == P_MOVE) { + frameSpd = 0.8; + frameMax = 4; + } + + animInit = false; + } + + //controlador de tempo de frames + if (frameMax > 1) { + frameCounter += frameSpd*DELAY; + + if (frameCounter > DELAY) { + frame++; + frameCounter = 0; + if (frame > frameMax-1) { + frame = 0; + } + } + } + + //frames manager + + if (player_state == P_STILL) { + if (player_direction == 1) + frameAtual = frameMario0; + else + frameAtual = frameMario4; + } else if (player_state == P_JUMP) { + if (player_direction == 1) + frameAtual = frameMario3; + else + frameAtual = frameMario7; + } else if (player_state == P_MOVE) { + + if (player_direction == 1) { + switch (frame) { + case 0: frameAtual = frameMario1; break; + case 1: frameAtual = frameMario0; break; + case 2: frameAtual = frameMario2; break; + case 3: frameAtual = frameMario0; break; + } + } else { + switch (frame) { + case 0: frameAtual = frameMario5; break; + case 1: frameAtual = frameMario4; break; + case 2: frameAtual = frameMario6; break; + case 3: frameAtual = frameMario4; break; + } + } + + } + + + display.drawBitmap(player_position.x, player_position.y, frameAtual, pimagew,pimageh,1); + + // debug collision box + //display.fillRect(player_position.x+pboxoffsetx, player_position.y, 10, 16, BLACK); + +} + +void drawGui() { + + String stringint = String(life,DEC); + String string = String("x" + stringint); + + display.setTextSize(1); + display.setTextColor(BLACK,WHITE); + display.setCursor(0,0); + display.print(string); + +} + +void sceneIntro() { + + display.clearDisplay(); //clean screen + + float sizex = 13*6; + + display.setTextSize(1); + display.setTextColor(BLACK); + display.setCursor((display.width()-sizex)/2,display.height()/2-12); + display.print("Regi and Tobi"); + sizex = 8*6; + display.setCursor((display.width()-sizex)/2,display.height()/2-4); + display.print("presents"); + display.display(); + + TIMER_CURRENT = millis(); + + if (TIMER_CURRENT - TIMER_PREV > 2500) { + + TIMER_PREV = TIMER_CURRENT; + display.clearDisplay(); + gamestate = GAME_TITLE; + } +} + +void sceneTitle() { + + // loop title screen + float sizex = 14*6; + + int select = 0; + int selectMax = 3; + unsigned int triggerSelect = 0; + unsigned int counter = 0; + unsigned int counterMax = 0; + + + while (gamestate == GAME_TITLE) { + + TIMER_CURRENT = millis(); + + if (TIMER_CURRENT - TIMER_PREV > DELAY) { + + TIMER_PREV = TIMER_CURRENT; + + inputManager(5,6,7); + + if (triggerSelect == 0) { + if (buttonPressed[2]) { + select++; + if (select >= selectMax) + select = 0; + + } else if (buttonPressed[0]) { + select--; + if (select < 0) + select = selectMax-1; + } + + + if (buttonPressed[1]) { + triggerSelect = 1; + counterMax = 3; + } + } + + + String str = "test"; + + switch (select) { + case 0: {str = ""; sizex = 12*6; break;}; + case 1: {str = "< CREDITS >"; sizex = 11*6; break;}; + case 2: {str = "< EXIT GAME >"; sizex = 13*6; break;}; + } + + display.clearDisplay(); + display.drawBitmap(0, 0, gameLogo, 84, 24,1); + display.setTextSize(1); + + if (triggerSelect == 1) + display.setTextColor(WHITE,BLACK); + else + display.setTextColor(BLACK); + + display.setCursor((display.width()-sizex)/2, 24+8); + display.print(str); + + display.display(); + + + + if (triggerSelect != 0) { + if (counter > counterMax) { + counter = 0; + triggerSelect++; + } else { + counter++; + } + } + } + + if (triggerSelect == 3) { + + if (select == 0) { + gamestate = GAME_LEVEL; + } else if (select == 1) { + gamestate = GAME_CREDITS; + } else { + triggerSelect = 0; + } + } + + + } + + } + + + +void sceneCredit() { + + float sizex = 8*6; + int page = 0; + + while (gamestate == GAME_CREDITS) { + + TIMER_CURRENT = millis(); + + if (TIMER_CURRENT - TIMER_PREV > DELAY) { + + TIMER_PREV = TIMER_CURRENT; + + inputManager(5,6,7); + + if (buttonPressed[2] || buttonPressed[1] || buttonPressed[0]) { + page++; + } + sizex = 8*6; + + display.clearDisplay(); + + display.setTextSize(1); + display.setTextColor(BLACK); + display.setCursor((display.width()-sizex)/2,0); + if (page < 2) + display.print("CREDITS:"); + display.setCursor(0,8); + if (page == 0) { + display.println("Created by:"); + display.println("Tobias Ulrich and Reginaldo da Silva."); + } else if (page == 1) { + display.println("Written in C with Arduino Uno."); + sizex = 10*6; + display.setCursor((display.width()-sizex)/2,32); + display.print("Dec, 2014."); + } else { + gamestate = GAME_TITLE; + } + + + display.display(); + } + + } +} + +void sceneLevel() { + + float sizex = 7*6; + + while (gamestate == GAME_LEVEL) { + + display.clearDisplay(); + + display.fillRect(0, 0, display.width(), display.height(), BLACK); + display.setTextSize(1); + display.setTextColor(WHITE,BLACK); + display.setCursor((display.width()-sizex)/2,(display.height()/2)-3); + display.print("LEVEL 1"); + + + + display.display(); + + TIMER_CURRENT = millis(); + + if (TIMER_CURRENT - TIMER_PREV > 2250) { + + TIMER_PREV = TIMER_CURRENT; + gamestate = GAME_PLAY; + } + + } +} + +void sceneGameOver() { + + float sizex = 9*6; + + while (gamestate == GAME_GAMEOVER) { + + display.clearDisplay(); + + display.fillRect(0, 0, display.width(), display.height(), BLACK); + display.setTextSize(1); + display.setTextColor(WHITE,BLACK); + display.setCursor((display.width()-sizex)/2,(display.height()/2)-3); + display.print("GAME OVER"); + + + + display.display(); + + TIMER_CURRENT = millis(); + + if (TIMER_CURRENT - TIMER_PREV > 3000) { + + TIMER_PREV = TIMER_CURRENT; + gamestate = GAME_TITLE; + } + + } +} + +void resetGame() { + + player_state = P_STILL; + life = 3; + player_direction = 1; + player_position.x = 0; + player_position.y = display.height()-pimageh-8; + vspd = 0; + hspd = 0; + + + camera.x = 0; + camera.y = 0; + camera_player_side = -1; + check_pulo = false; + +} + +void sceneGame() { + + resetGame(); + + + while (gamestate == GAME_PLAY) { + + TIMER_CURRENT = millis(); + + if(TIMER_CURRENT - TIMER_PREV > DELAY) { // game loop + + TIMER_PREV = TIMER_CURRENT; + + inputManager(5,6,7); // 5 = 0 + + if (buttonPressing[2] && buttonPressing[1] && buttonPressing[0]) + gamestate = GAME_TITLE; + + + playerLogic(buttonPressing[2],buttonPressing[0],buttonPressed[1]); + + display.clearDisplay(); + + gameTilemap.drawMap(camera.x,camera.y); + playerDraw(); + drawGui(); + + display.display(); + } + + } + +} + +void setup() { + + Serial.begin(9600); + + display.begin(); + // init done + + // you can change the contrast around to adapt the display + // for the best viewing! + display.setContrast(50); + + //song - DOSENT WORK - DO NOT USE + //pinMode(3, OUTPUT);//buzzer + //pinMode(13, OUTPUT);//led indicator when singing a note + + // inputs + pinMode(7, INPUT);//Define o pino 7 como entrada + digitalWrite(7, HIGH);//Ativa o resistor de pull-up da porta 7 + pinMode(6, INPUT);//Define o pino 7 como entrada + digitalWrite(6, HIGH);//Ativa o resistor de pull-up da porta 7 + pinMode(5, INPUT);//Define o pino 7 como entrada + digitalWrite(5, HIGH);//Ativa o resistor de pull-up da porta 7 + + gameTilemap.setMapSize(100,6); + gameTilemap.setDisplayPointer(&display); + gameTilemap.setTileMap(TileMap0); + + +}; + + +void loop() { + + switch (gamestate) { // "STATE MACHINE MANAGER" + + case GAME_INTRO: {sceneIntro(); break;} + case GAME_TITLE: {sceneTitle(); break;} + case GAME_CREDITS: {sceneCredit(); break;} + case GAME_LEVEL: {sceneLevel(); break;} + case GAME_PLAY: {sceneGame(); break;} + case GAME_GAMEOVER: {sceneGameOver(); break;} + } + + + +} + + diff --git a/resources/examples/Arduino/Nano-Marduino_Game/marduino/marduinotypes.h b/resources/examples/Arduino/Nano-Marduino_Game/marduino/marduinotypes.h new file mode 100644 index 0000000..bb3751b --- /dev/null +++ b/resources/examples/Arduino/Nano-Marduino_Game/marduino/marduinotypes.h @@ -0,0 +1,24 @@ + +//#include + +#ifndef MARDUINOTYPES_H +#define MARDUINOTYPES_H + +//#define BMP const unsigned char PROGMEM +//#define TILEMAPSET const unsigned int PROGMEM + +typedef const unsigned char PROGMEM BMP; +typedef const unsigned int PROGMEM TILEMAPSET; + +struct Vector2f { +float x; +float y; + +Vector2f(float xx, float yy) { + x = xx; + y = yy; +}; + +}; + +#endif diff --git a/resources/examples/Arduino/Nano-Marduino_Game/marduino/mariobitmap.h b/resources/examples/Arduino/Nano-Marduino_Game/marduino/mariobitmap.h new file mode 100644 index 0000000..0298129 --- /dev/null +++ b/resources/examples/Arduino/Nano-Marduino_Game/marduino/mariobitmap.h @@ -0,0 +1,183 @@ + +#include "marduinotypes.h" + +#ifndef MARIOBITMAP_H +#define MARIOBITMAP_H + + +BMP gameLogo[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf0, + 0xff, 0xff, 0xff, 0xf8, 0x93, 0x0c, 0x61, 0xff, 0xff, 0xff, 0xf0, + 0xff, 0xff, 0xff, 0xf3, 0x93, 0x24, 0xe4, 0xff, 0xff, 0xff, 0xf0, + 0xff, 0xff, 0xff, 0xf1, 0x93, 0x24, 0xe4, 0xff, 0xff, 0xff, 0xf0, + 0xff, 0xff, 0xff, 0xf8, 0x93, 0x0c, 0x61, 0xff, 0xff, 0xff, 0xf0, + 0xff, 0xff, 0xff, 0xfc, 0x93, 0x3c, 0xe1, 0xff, 0xff, 0xff, 0xf0, + 0xff, 0xff, 0xff, 0xfc, 0x93, 0x3c, 0xe4, 0xff, 0xff, 0xff, 0xf0, + 0xff, 0xff, 0xff, 0xf1, 0xc7, 0x3c, 0x64, 0xff, 0xff, 0xff, 0xf0, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf0, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x01, 0xce, 0x07, 0x8f, 0xe7, 0xe3, 0xcf, 0x7b, 0x9c, 0x3e, 0x00, + 0x03, 0xcf, 0x07, 0x8f, 0xf7, 0xf3, 0xcf, 0x7b, 0x9c, 0xfe, 0x00, + 0x03, 0xff, 0x0f, 0x8f, 0xf7, 0xfb, 0xcf, 0x7b, 0x9d, 0xff, 0x00, + 0x07, 0xff, 0x1c, 0xce, 0x77, 0x3b, 0xcf, 0x7b, 0xdd, 0xe7, 0x80, + 0x07, 0xff, 0x9c, 0xce, 0x77, 0x3b, 0xcf, 0x7b, 0xfd, 0xc3, 0x80, + 0x0f, 0x77, 0xbf, 0xee, 0x77, 0x3b, 0xcf, 0x7b, 0xfd, 0xc3, 0x80, + 0x1f, 0x27, 0x8f, 0xe7, 0xe7, 0x3b, 0xcf, 0x7b, 0xbd, 0xe7, 0x80, + 0x1e, 0x53, 0xef, 0xf7, 0xf7, 0xfb, 0xff, 0x7b, 0x9c, 0xff, 0x80, + 0x3e, 0xab, 0xe8, 0xf7, 0x77, 0xf9, 0xfe, 0x7b, 0x9d, 0x7f, 0x00, + 0x0d, 0x0b, 0xe6, 0xe7, 0x3b, 0xe2, 0xfd, 0x7b, 0x9c, 0xb8, 0x80, + 0x22, 0x04, 0x09, 0x10, 0x44, 0x19, 0x02, 0x00, 0x60, 0x47, 0x00, + 0x1c, 0x03, 0xe0, 0xe7, 0xbb, 0xe0, 0xfc, 0x7b, 0x9c, 0x38, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; + + + + // defining gfx + +//frame frames +BMP frameMario0[] = { //stand > + 0x00, 0x00, + 0x07, 0xe0, + 0x08, 0x18, + 0x13, 0xc4, + 0x1c, 0xb8, + 0x26, 0x84, + 0x26, 0x44, + 0x18, 0xf8, + 0x0c, 0x10, + 0x13, 0xe0, + 0x21, 0x90, + 0x2f, 0xf0, + 0x11, 0xb0, + 0x12, 0x70, + 0x0c, 0x20, + 0x07, 0xc0 }; + +BMP frameMario1[] = { //move 1 > + 0x07, 0xc0, + 0x08, 0x38, + 0x13, 0xc4, + 0x1c, 0xb8, + 0x26, 0x84, + 0x26, 0x44, + 0x18, 0xf8, + 0x1c, 0x10, + 0x63, 0xf8, + 0x91, 0x9c, + 0x8b, 0xfa, + 0x4f, 0x6a, + 0x3f, 0xf4, + 0x4f, 0xc4, + 0x44, 0x88, + 0x38, 0x70 }; + +BMP frameMario2[] = { //move 2 > + 0x07, 0xc0, + 0x08, 0x38, + 0x13, 0xc4, + 0x1c, 0xb8, + 0x26, 0x84, + 0x26, 0x44, + 0x18, 0xf8, + 0x7c, 0x1e, + 0x93, 0xe9, + 0x91, 0x99, + 0x53, 0xfa, + 0x3f, 0x6c, + 0x3f, 0xf4, + 0x4f, 0xc4, + 0x44, 0x88, + 0x38, 0x70 }; + +BMP frameMario3[] = { //jump > + 0x07, 0xce, + 0x08, 0x31, + 0x11, 0xc9, + 0x1e, 0xba, + 0x26, 0x86, + 0x26, 0x46, + 0x18, 0xfc, + 0x0c, 0x14, + 0x3f, 0xe8, + 0x71, 0x9e, + 0x89, 0x69, + 0x8b, 0xf1, + 0x7f, 0xf2, + 0x8f, 0xf2, + 0x9f, 0x8c, + 0x6e, 0x00 }; + +BMP frameMario4[] = { //stand < + 0x00, 0x00, + 0x07, 0xe0, + 0x18, 0x10, + 0x23, 0xc8, + 0x1d, 0x38, + 0x21, 0x64, + 0x22, 0x64, + 0x1f, 0x18, + 0x08, 0x30, + 0x07, 0xc8, + 0x09, 0x84, + 0x0f, 0xf4, + 0x0d, 0x88, + 0x0e, 0x48, + 0x04, 0x30, + 0x03, 0xe0 }; + +BMP frameMario5[] = { //move 1 < + 0x03, 0xe0, + 0x1c, 0x10, + 0x23, 0xc8, + 0x1d, 0x38, + 0x21, 0x64, + 0x22, 0x64, + 0x1f, 0x18, + 0x08, 0x38, + 0x1f, 0xc6, + 0x39, 0x89, + 0x5f, 0xd1, + 0x56, 0xf2, + 0x2f, 0xfc, + 0x23, 0xf2, + 0x11, 0x22, + 0x0e, 0x1c }; + +BMP frameMario6[] = { //move 2 < + 0x03, 0xe0, + 0x1c, 0x10, + 0x23, 0xc8, + 0x1d, 0x38, + 0x21, 0x64, + 0x22, 0x64, + 0x1f, 0x18, + 0x78, 0x3e, + 0x97, 0xc9, + 0x99, 0x89, + 0x5f, 0xca, + 0x36, 0xfc, + 0x2f, 0xfc, + 0x23, 0xf2, + 0x11, 0x22, + 0x0e, 0x1c }; + +BMP frameMario7[] = { //jump < + 0x73, 0xe0, + 0x8c, 0x10, + 0x93, 0x88, + 0x5d, 0x78, + 0x61, 0x64, + 0x62, 0x64, + 0x3f, 0x18, + 0x28, 0x30, + 0x17, 0xfc, + 0x79, 0x8e, + 0x96, 0x91, + 0x8f, 0xd1, + 0x4f, 0xfe, + 0x4f, 0xf1, + 0x31, 0xf9, + 0x00, 0x76 }; + +#endif diff --git a/resources/examples/Arduino/Nano-Marduino_Game/marduino/song.h b/resources/examples/Arduino/Nano-Marduino_Game/marduino/song.h new file mode 100644 index 0000000..7a76c68 --- /dev/null +++ b/resources/examples/Arduino/Nano-Marduino_Game/marduino/song.h @@ -0,0 +1,555 @@ + +/* + Arduino Mario Bros Tunes + With Piezo Buzzer and PWM + + Connect the positive side of the Buzzer to pin 3, + then the negative side to a 1k ohm resistor. Connect + the other side of the 1 k ohm resistor to + ground(GND) pin on the Arduino. + + by: Dipto Pratyaksa + last updated: 31/3/13 +*/ + +/************************************************* + * Public Constants + *************************************************/ + + +#define NOTE_B0 31 +#define NOTE_C1 33 +#define NOTE_CS1 35 +#define NOTE_D1 37 +#define NOTE_DS1 39 +#define NOTE_E1 41 +#define NOTE_F1 44 +#define NOTE_FS1 46 +#define NOTE_G1 49 +#define NOTE_GS1 52 +#define NOTE_A1 55 +#define NOTE_AS1 58 +#define NOTE_B1 62 +#define NOTE_C2 65 +#define NOTE_CS2 69 +#define NOTE_D2 73 +#define NOTE_DS2 78 +#define NOTE_E2 82 +#define NOTE_F2 87 +#define NOTE_FS2 93 +#define NOTE_G2 98 +#define NOTE_GS2 104 +#define NOTE_A2 110 +#define NOTE_AS2 117 +#define NOTE_B2 123 +#define NOTE_C3 131 +#define NOTE_CS3 139 +#define NOTE_D3 147 +#define NOTE_DS3 156 +#define NOTE_E3 165 +#define NOTE_F3 175 +#define NOTE_FS3 185 +#define NOTE_G3 196 +#define NOTE_GS3 208 +#define NOTE_A3 220 +#define NOTE_AS3 233 +#define NOTE_B3 247 +#define NOTE_C4 262 +#define NOTE_CS4 277 +#define NOTE_D4 294 +#define NOTE_DS4 311 +#define NOTE_E4 330 +#define NOTE_F4 349 +#define NOTE_FS4 370 +#define NOTE_G4 392 +#define NOTE_GS4 415 +#define NOTE_A4 440 +#define NOTE_AS4 466 +#define NOTE_B4 494 +#define NOTE_C5 523 +#define NOTE_CS5 554 +#define NOTE_D5 587 +#define NOTE_DS5 622 +#define NOTE_E5 659 +#define NOTE_F5 698 +#define NOTE_FS5 740 +#define NOTE_G5 784 +#define NOTE_GS5 831 +#define NOTE_A5 880 +#define NOTE_AS5 932 +#define NOTE_B5 988 +#define NOTE_C6 1047 +#define NOTE_CS6 1109 +#define NOTE_D6 1175 +#define NOTE_DS6 1245 +#define NOTE_E6 1319 +#define NOTE_F6 1397 +#define NOTE_FS6 1480 +#define NOTE_G6 1568 +#define NOTE_GS6 1661 +#define NOTE_A6 1760 +#define NOTE_AS6 1865 +#define NOTE_B6 1976 +#define NOTE_C7 2093 +#define NOTE_CS7 2217 +#define NOTE_D7 2349 +#define NOTE_DS7 2489 +#define NOTE_E7 2637 +#define NOTE_F7 2794 +#define NOTE_FS7 2960 +#define NOTE_G7 3136 +#define NOTE_GS7 3322 +#define NOTE_A7 3520 +#define NOTE_AS7 3729 +#define NOTE_B7 3951 +#define NOTE_C8 4186 +#define NOTE_CS8 4435 +#define NOTE_D8 4699 +#define NOTE_DS8 4978 + +#define melodyPin 3 +//Mario main theme melody +int melody[] = { + NOTE_E7, NOTE_E7, 0, NOTE_E7, + 0, NOTE_C7, NOTE_E7, 0, + NOTE_G7, 0, 0, 0, + NOTE_G6, 0, 0, 0, + + NOTE_C7, 0, 0, NOTE_G6, + 0, 0, NOTE_E6, 0, + 0, NOTE_A6, 0, NOTE_B6, + 0, NOTE_AS6, NOTE_A6, 0, + + NOTE_G6, NOTE_E7, NOTE_G7, + NOTE_A7, 0, NOTE_F7, NOTE_G7, + 0, NOTE_E7, 0, NOTE_C7, + NOTE_D7, NOTE_B6, 0, 0, + + NOTE_C7, 0, 0, NOTE_G6, + 0, 0, NOTE_E6, 0, + 0, NOTE_A6, 0, NOTE_B6, + 0, NOTE_AS6, NOTE_A6, 0, + + NOTE_G6, NOTE_E7, NOTE_G7, + NOTE_A7, 0, NOTE_F7, NOTE_G7, + 0, NOTE_E7, 0, NOTE_C7, + NOTE_D7, NOTE_B6, 0, 0 +}; +//Mario main them tempo +int tempo[] = { + 12, 12, 12, 12, + 12, 12, 12, 12, + 12, 12, 12, 12, + 12, 12, 12, 12, + + 12, 12, 12, 12, + 12, 12, 12, 12, + 12, 12, 12, 12, + 12, 12, 12, 12, + + 9, 9, 9, + 12, 12, 12, 12, + 12, 12, 12, 12, + 12, 12, 12, 12, + + 12, 12, 12, 12, + 12, 12, 12, 12, + 12, 12, 12, 12, + 12, 12, 12, 12, + + 9, 9, 9, + 12, 12, 12, 12, + 12, 12, 12, 12, + 12, 12, 12, 12, +}; + +//Underworld melody +int underworld_melody[] = { + NOTE_C4, NOTE_C5, NOTE_A3, NOTE_A4, + NOTE_AS3, NOTE_AS4, 0, + 0, + NOTE_C4, NOTE_C5, NOTE_A3, NOTE_A4, + NOTE_AS3, NOTE_AS4, 0, + 0, + NOTE_F3, NOTE_F4, NOTE_D3, NOTE_D4, + NOTE_DS3, NOTE_DS4, 0, + 0, + NOTE_F3, NOTE_F4, NOTE_D3, NOTE_D4, + NOTE_DS3, NOTE_DS4, 0, + 0, NOTE_DS4, NOTE_CS4, NOTE_D4, + NOTE_CS4, NOTE_DS4, + NOTE_DS4, NOTE_GS3, + NOTE_G3, NOTE_CS4, + NOTE_C4, NOTE_FS4, NOTE_F4, NOTE_E3, NOTE_AS4, NOTE_A4, + NOTE_GS4, NOTE_DS4, NOTE_B3, + NOTE_AS3, NOTE_A3, NOTE_GS3, + 0, 0, 0 +}; +//Underwolrd tempo +int underworld_tempo[] = { + 12, 12, 12, 12, + 12, 12, 6, + 3, + 12, 12, 12, 12, + 12, 12, 6, + 3, + 12, 12, 12, 12, + 12, 12, 6, + 3, + 12, 12, 12, 12, + 12, 12, 6, + 6, 18, 18, 18, + 6, 6, + 6, 6, + 6, 6, + 18, 18, 18, 18, 18, 18, + 10, 10, 10, + 10, 10, 10, + 3, 3, 3 +}; +/* +int songSizeIt = 0; +int songTrigger = 0; +int * song = NULL; +int * songTempo = NULL; + +int songIt = 0; +long actualNote = 0; +long noteDuration = 0; + +int pauseBetweenNotes = 0; +unsigned long pauseTimeCurr = 0; +long pauseTimePrev = 0; + +long noteTimeSize = 0; +long noteTimeIt = 0; +unsigned long noteDelay = 0; +int buzzTrigger = 0; +unsigned long buzzCurrentTimer = 0; +long buzzPreviousTimer = 0; + +int vel = 20000; + +/*void buzz(int targetPin, long frequency, long length) { + + digitalWrite(13, HIGH); + long delayValue = 1000000 / frequency / 2; // calculate the delay value between transitions + //// 1 second's worth of microseconds, divided by the frequency, then split in half since + //// there are two phases to each cycle + long numCycles = frequency * length / 1000; // calculate the number of cycles for proper timing + //// multiply frequency, which is really cycles per second, by the number of seconds to + //// get the total number of cycles to produce + for (long i = 0; i < numCycles; i++) { // for the calculated length of time... + digitalWrite(targetPin, HIGH); // write the buzzer pin high to push out the diaphram + delayMicroseconds(delayValue); // wait for the calculated delay value + digitalWrite(targetPin, LOW); // write the buzzer pin low to pull back the diaphram + delayMicroseconds(delayValue); // wait again or the calculated delay value + } + digitalWrite(13, LOW); + +} + +boolean buzz(int targetPin) { + + if (buzzTrigger == 0) { + noteDelay = actualNote / 2; //song_array = frequency + noteTimeSize = noteDuration * vel; + noteTimeIt = 0; + + buzzTrigger = 1; + digitalWrite(13, HIGH); + //Serial.print(noteCyclesDelay); + //Serial.print("\n"); + //Serial.print(noteCyclesNum); + } + + if (buzzTrigger == 1) { + digitalWrite(targetPin, HIGH); + buzzTrigger = 2; + buzzPreviousTimer = micros(); + } + + if (buzzTrigger == 2) { + digitalWrite(targetPin, HIGH); + buzzCurrentTimer = micros(); + + if (buzzCurrentTimer - buzzPreviousTimer > noteDelay) { + buzzPreviousTimer = buzzCurrentTimer; + buzzTrigger = 3; + } + } + + if (buzzTrigger == 3) { + digitalWrite(targetPin, LOW); + buzzTrigger = 4; + } + + if (buzzTrigger == 4) { + + buzzCurrentTimer = micros(); + + if (buzzCurrentTimer - buzzPreviousTimer > noteDelay) { + + buzzPreviousTimer = buzzCurrentTimer; + noteTimeIt += actualNote; + + if (noteTimeIt >= noteTimeSize) { + buzzTrigger = 5; + } else { + buzzTrigger = 1; + } + } + + } + + if (buzzTrigger == 5) { + buzzTrigger = 0; + digitalWrite(13, LOW); + return true; + } + + return false; + /*digitalWrite(13, HIGH); + long delayValue = 1000000 / frequency / 2; // calculate the delay value between transitions + //// 1 second's worth of microseconds, divided by the frequency, then split in half since + //// there are two phases to each cycle + long numCycles = frequency * length / 1000; // calculate the number of cycles for proper timing + //// multiply frequency, which is really cycles per second, by the number of seconds to + //// get the total number of cycles to produce + for (long i = 0; i < numCycles; i++) { // for the calculated length of time... + digitalWrite(targetPin, HIGH); // write the buzzer pin high to push out the diaphram + delayMicroseconds(delayValue); // wait for the calculated delay value + digitalWrite(targetPin, LOW); // write the buzzer pin low to pull back the diaphram + delayMicroseconds(delayValue); // wait again or the calculated delay value + } + digitalWrite(13, LOW); + +} + + +void sing(int s) { + + // iterate over the notes of the melody: + + //Serial.println(" 'Underworld Theme'"); + if (songTrigger == 0) { + if (s == 2) { + song = underworld_melody; + songTempo = tempo; + songSizeIt = sizeof(melody) / sizeof(int); + } + + if ( s > 0 ) { + songIt = 0; + songTrigger = 1; + } + } + + if (songTrigger == 1) { // set note duration + actualNote = song[songIt]; + noteDuration = songTempo[songIt]; + pauseBetweenNotes = noteDuration * 10 * 1.30; + buzzTrigger = 0; + songTrigger = 2; + } + + if (songTrigger == 2) { //buzz + if (buzz(melodyPin)) { + pauseTimePrev = millis(); + songTrigger = 3; + } + } + + if (songTrigger == 3) { + + pauseTimeCurr = millis(); + + if (pauseTimeCurr - pauseTimePrev > pauseBetweenNotes) { + + pauseTimePrev = pauseTimeCurr; + actualNote = 0; + songTrigger = 4; + + } + + } + + if (songTrigger == 4) { + digitalWrite(3, LOW); + //if (buzz(melodyPin)) { + if (songIt >= songSizeIt) { + songTrigger = 0; + } else { + songIt++; + songTrigger = 1; + } + //} + + } + +} + + //Serial.print(songIt); + //Serial.print("\n"); + //Serial.print(buzzTrigger); + //Serial.print("\n"); + +/*void sing(int s) { + // iterate over the notes of the melody: + song = s; + if (song == 2) { + Serial.println(" 'Underworld Theme'"); + int size = sizeof(underworld_melody) / sizeof(int); + for (int thisNote = 0; thisNote < size; thisNote++) { + + // to calculate the note duration, take one second + // divided by the note type. + //e.g. quarter note = 1000 / 4, eighth note = 1000/8, etc. + int noteDuration = 1000 / underworld_tempo[thisNote]; + + buzz(melodyPin, underworld_melody[thisNote], noteDuration); + + // to distinguish the notes, set a minimum time between them. + // the note's duration + 30% seems to work well: + int pauseBetweenNotes = noteDuration * 1.30; + delay(pauseBetweenNotes); + + // stop the tone playing: + buzz(melodyPin, 0, noteDuration); + + } + + } else { + + Serial.println(" 'Mario Theme'"); + int size = sizeof(melody) / sizeof(int); + for (int thisNote = 0; thisNote < size; thisNote++) { + + // to calculate the note duration, take one second + // divided by the note type. + //e.g. quarter note = 1000 / 4, eighth note = 1000/8, etc. + int noteDuration = 1000 / tempo[thisNote]; + + buzz(melodyPin, melody[thisNote], noteDuration); + + // to distinguish the notes, set a minimum time between them. + // the note's duration + 30% seems to work well: + int pauseBetweenNotes = noteDuration * 1.30; + delay(pauseBetweenNotes); + + // stop the tone playing: + buzz(melodyPin, 0, noteDuration); + + } + } +}*/ + +long noteTimeSize = 0; +long noteTimeIt = 0; +unsigned long noteDelay = 0; +int buzzTrigger = -1; +long buzzCurrentTimer = 0; +long buzzPreviousTimer = 0; +int vel = 20000; + +int songTrigger = -1; +long songSizeIt = 0; +long songIt = 0; +int * song = NULL; +int * songTempo = NULL; +long songTimerCurr = 0; +long songTimerPrev = 0; + +void playNote(long frequency,long lenght) { + + if (buzzTrigger == -1) { + + //noteDelay = 1000000 / frequency / 2; + noteDelay = 1/(frequency*2); + noteDelay = noteDelay * 1000000; + //noteTimeSize = frequency * lenght / 1000; + noteTimeSize = 300*1000; + noteTimeIt = 0; + buzzTrigger = 0; + buzzPreviousTimer = micros(); + digitalWrite(13, HIGH); + + } + if (buzzTrigger == 0) { + + + digitalWrite(melodyPin, HIGH); + buzzCurrentTimer = micros(); + + if (buzzCurrentTimer - buzzPreviousTimer > noteDelay) { + buzzPreviousTimer = buzzCurrentTimer; + buzzTrigger = 1; + + + } + } else if (buzzTrigger == 1) { + + buzzCurrentTimer = micros(); + digitalWrite(melodyPin, LOW); + + if (buzzCurrentTimer - buzzPreviousTimer > noteDelay) { + buzzPreviousTimer = buzzCurrentTimer; + + noteTimeIt += noteDelay; + + if (noteTimeIt < noteTimeSize) { + buzzTrigger = 0; + } else { + digitalWrite(13, LOW); + buzzTrigger = 2; + } + } + + } +} + +void playMelody(int s) { + + if (songTrigger == -1) { + if (s == 1) { + song = melody; + songTempo = tempo; + songSizeIt = sizeof(melody) / sizeof(int); + } else if (s == 2) { + song = underworld_melody; + songTempo = underworld_tempo; + songSizeIt = sizeof(melody) / sizeof(int); + } + + Serial.println(songSizeIt); + + if ( s > 0 ) { + songIt = 0; + songTrigger = 0; + buzzTrigger = -1; + } + } else if (songTrigger == 0) { + playNote(song[songIt],10); + + if (buzzTrigger == 2) { + songTrigger = 1; + songTimerPrev = millis(); + } + } else if (songTrigger == 1) { + + songTimerCurr = millis(); + + if (songTimerCurr - songTimerPrev > 300/2) { + songIt++; + if (songIt < songSizeIt) { + songTrigger = 0; + buzzTrigger = -1; + } else { + songTrigger = 2; + } + } + + } + +} + diff --git a/resources/examples/Arduino/Nano-Marduino_Game/marduino/tilemap.cpp b/resources/examples/Arduino/Nano-Marduino_Game/marduino/tilemap.cpp new file mode 100644 index 0000000..e1b7ca8 --- /dev/null +++ b/resources/examples/Arduino/Nano-Marduino_Game/marduino/tilemap.cpp @@ -0,0 +1,152 @@ + + +#include "tilemap.h" +#include "tilesetbitmap.h" +#include "levels.h" + + TileMap::TileMap() { + _tileMapWidth = 1; + _tileMapHeight = 1; + _tileWidth = 8; + _tileHeight = 8; + _tileMapID = NULL; + } + + void TileMap::getTileIndexByPos(int coordx, int coordy, int * pickedTile) { + pickedTile[0] = coordx / _tileWidth; + pickedTile[1] = coordy / _tileHeight; + } + + void TileMap::getPosByTileIndex(int tilex, int tiley, int * result) { + result[0] = tilex*_tileWidth; + result[1] = tiley*_tileHeight; + } + + unsigned int TileMap::getMapWidth() { + return _tileMapWidth; + } + + unsigned int TileMap::getMapHeight() { + return _tileMapHeight; + } + + unsigned int TileMap::getTileWidth() { + return _tileWidth; + } + + unsigned int TileMap::getTileHeight() { + return _tileHeight; + } + + void TileMap::setDisplayPointer(Adafruit_PCD8544 * disp) { + _display = disp; + } + + void TileMap::setTileSize(unsigned int w, unsigned int h) { + _tileWidth = w; + _tileHeight = h; + } + + void TileMap::setMapSize(unsigned int w, unsigned int h) { + _tileMapWidth = w; + _tileMapHeight = h; + } + + void TileMap::setTileMap(TILEMAPSET * tilemaparray) { + _tileMapID = tilemaparray; + } + + void TileMap::drawTile(const unsigned int id, int x, int y) { + + BMP * tileToDraw = NULL; + + switch(id) { + + case 2: {tileToDraw = tileset002; break;} + case 3: {tileToDraw = tileset003; break;} + case 4: {tileToDraw = tileset004; break;} + case 11: {tileToDraw = tileset011; break;} + case 14: {tileToDraw = tileset014; break;} + case 55: {tileToDraw = tileset055; break;} + case 56: {tileToDraw = tileset056; break;} + case 71: {tileToDraw = tileset071; break;} + case 72: {tileToDraw = tileset072; break;} + case 76: {tileToDraw = tileset076; break;} + case 77: {tileToDraw = tileset077; break;} + case 78: {tileToDraw = tileset078; break;} + case 79: {tileToDraw = tileset079; break;} + case 80: {tileToDraw = tileset080; break;} + case 102: {tileToDraw = tileset102; break;} + case 103: {tileToDraw = tileset103; break;} + case 118: {tileToDraw = tileset118; break;} + case 119: {tileToDraw = tileset119; break;} + case 145: {tileToDraw = tileset145; break;} + case 146: {tileToDraw = tileset146; break;} + case 162: {tileToDraw = tileset162; break;} + case 161: {tileToDraw = tileset080; break;} + case 163: {tileToDraw = tileset163; break;} + } + + if (tileToDraw != NULL) + _display->drawBitmap(x, y, tileToDraw, _tileWidth,_tileHeight,1); + + } + + void TileMap::drawMap(int xcamera, int ycamera) { + + //define tile x and y index iterator + int it_start[2] = {0,0}; + int it_end[2] = {1,1}; + getTileIndexByPos(xcamera, ycamera, it_start); + getTileIndexByPos(xcamera+_display->width()+_tileWidth, ycamera+_display->height(), it_end); + + // reverse camera movement + xcamera *= -1; + + for (int yy = it_start[1]; yy < it_end[1]; yy++) { + for (int xx = it_start[0]; xx < it_end[0]; xx++) { + + + unsigned int tileIndex = xx + (yy*_tileMapWidth); + tileIndex = pgm_read_word_near(&_tileMapID[tileIndex]); + + if (tileIndex > 0) + drawTile(tileIndex,xcamera+(xx*_tileWidth),ycamera+(yy*_tileHeight)); + //Serial.print(test); + //Serial.print("\n"); // prints a tab + + } + } + + } + + /*void TileMap::createCollisionMap() { + + //_mapCollider = new Rect[_tileMapWidth*_tileMapHeight]; + + for (int yy = 0; yy < _tileMapHeight; yy++) { + for (int xx = 0; xx < _tileMapWidth; xx++) { + + unsigned int tileIndex = xx + (yy * _tileMapWidth); + tileIndex = pgm_read_word_near(&_tileMapID[tileIndex]); + + if (tileIndex == 0 || tileIndex == 1 || tileIndex == 144 || tileIndex == 145 || tileIndex == 161 || tileIndex == 162 || tileIndex == 163) { + + _mapCollider[tileIndex].x = -1; + _mapCollider[tileIndex].y = -1; + _mapCollider[tileIndex].width = -1; + _mapCollider[tileIndex].height = -1; + + } else { + + _mapCollider[tileIndex].x = xx*_tileWidth; + _mapCollider[tileIndex].y = yy*_tileHeight; + _mapCollider[tileIndex].width = _tileWidth; + _mapCollider[tileIndex].height = _tileHeight; + + } + + } + } + + };*/ diff --git a/resources/examples/Arduino/Nano-Marduino_Game/marduino/tilemap.h b/resources/examples/Arduino/Nano-Marduino_Game/marduino/tilemap.h new file mode 100644 index 0000000..5d01d6c --- /dev/null +++ b/resources/examples/Arduino/Nano-Marduino_Game/marduino/tilemap.h @@ -0,0 +1,40 @@ + +#include +#include +#include + +#include "marduinotypes.h" + +#ifndef TILEMAP_H +#define TILEMAP_H + +class TileMap { + +private: + + TILEMAPSET * _tileMapID; + unsigned int _tileWidth; + unsigned int _tileHeight; + unsigned int _tileMapWidth; + unsigned int _tileMapHeight; + Adafruit_PCD8544 * _display; //pointer to display + +public: + + TileMap(); + void getTileIndexByPos(int, int, int *); + void getPosByTileIndex(int, int, int *); + unsigned int getMapWidth(); + unsigned int getMapHeight(); + unsigned int getTileWidth(); + unsigned int getTileHeight(); + void setDisplayPointer(Adafruit_PCD8544 *); //using Adafruit display + void setMapSize(unsigned int, unsigned int); + void setTileSize(unsigned int, unsigned int); + void setTileMap(TILEMAPSET *); + void drawTile(const unsigned int, int, int); + void drawMap(int, int); + +}; + +#endif diff --git a/resources/examples/Arduino/Nano-Marduino_Game/marduino/tilesetbitmap.h b/resources/examples/Arduino/Nano-Marduino_Game/marduino/tilesetbitmap.h new file mode 100644 index 0000000..99062a9 --- /dev/null +++ b/resources/examples/Arduino/Nano-Marduino_Game/marduino/tilesetbitmap.h @@ -0,0 +1,252 @@ + +#include "marduinotypes.h" + +#ifndef TILESETBITMAP_H +#define TILESETBITMAP_H + +BMP tile0000[] = { + 0xff, + 0x89, + 0x89, + 0xff, + 0x91, + 0x91, + 0x91, + 0xff }; + +BMP tileset002[] = { +0x1f, +0x7f, +0xff, +0xff, +0xff, +0x99, +0x99, +0xe6 }; + +BMP tileset003[] = { +0xff, +0xff, +0xff, +0xff, +0xff, +0x99, +0x99, +0x66 }; + +BMP tileset004[] = { +0xf8, +0xfe, +0xff, +0xff, +0xff, +0x99, +0x99, +0x67 }; + +BMP tileset011[] = { +0x7e, +0x83, +0xbb, +0xa3, +0xa3, +0x87, +0xff, +0x7e +}; + +BMP tileset014[] = { +0xff, +0xc3, +0xc3, +0x7e, +0xff, +0xc3, +0xc3, +0x7e +}; + +BMP tileset055[] = { +0xff, +0x80, +0x80, +0x80, +0x80, +0xff, +0x40, +0x40 +}; + +BMP tileset056[] = { +0xff, +0x47, +0x47, +0x47, +0x47, +0xff, +0x26, +0x26 +}; + +BMP tileset071[] = { +0x40, +0x40, +0x40, +0x40, +0x3f, +0x40, +0x40, +0x40 +}; + +BMP tileset072[] = { +0x26, +0x26, +0x26, +0x26, +0xfc, +0x26, +0x26, +0x26 +}; + +BMP tileset076[] = { +0xff, +0x80, +0xff, +0xff, +0xff, +0x88, +0xc0, +0x91 }; + +BMP tileset077[] = { +0xff, +0x00, +0xff, +0xff, +0xff, +0x08, +0x40, +0x11 }; + +BMP tileset078[] = { +0xff, +0x01, +0xff, +0xff, +0xff, +0x09, +0x41, +0x11 }; + +BMP tileset079[] = { +0x80, +0x80, +0x80, +0x80, +0x80, +0x80, +0x80, +0x80 }; + +BMP tileset080[] = { +0x01, +0x01, +0x01, +0x01, +0x01, +0x01, +0x01, +0x01 }; + +BMP tileset102[] = { +0x00, +0x00, +0x00, +0x7f, +0x40, +0x41, +0x41, +0x5f +}; + + +BMP tileset103[] = { +0x00, +0x00, +0x00, +0xfc, +0x04, +0x84, +0x44, +0x24 +}; + +BMP tileset118[] = { +0x50, +0x5f, +0x41, +0x41, +0x40, +0x7f, +0x02, +0x02 +}; + +BMP tileset119[] = { +0x14, +0x24, +0x44, +0x84, +0x04, +0xfc, +0x80, +0x80 +}; + +BMP tileset145[] = { +0x1c, +0x22, +0x4f, +0x4b, +0x11, +0x11, +0x01, +0x01 +}; + +BMP tileset146[] = { +0x70, +0x88, +0xc4, +0x24, +0x10, +0x10, +0x00, +0x00 +}; + +BMP tileset162[] = { +0x01, +0x02, +0x04, +0x08, +0x10, +0x20, +0x40, +0x80 +}; + +BMP tileset163[] = { +0x80, +0x40, +0x20, +0x10, +0x08, +0x04, +0x02, +0x01 +}; + +#endif diff --git a/resources/examples/Arduino/Nano-Snake_Game/snake.ino b/resources/examples/Arduino/Nano-Snake_Game/snake.ino new file mode 100644 index 0000000..e2b4611 --- /dev/null +++ b/resources/examples/Arduino/Nano-Snake_Game/snake.ino @@ -0,0 +1,328 @@ +/**** Snake Game by Abhinav Faujdar *****/ + +#include +#include +#include + + +Adafruit_PCD8544 display = Adafruit_PCD8544(8, 9, 10, 11, 12); //Initialise display object + +// pin 7 - Serial clock out (SCLK) +// pin 6 - Serial data out (DIN) +// pin 5 - Data/Command select (D/C) +// pin 4 - LCD chip select (CS) +// pin 3 - LCD reset (RST) + + +/********* constants *******/ +#define UP 7 +#define LEFT 6 +#define DOWN 5 +#define RIGHT 4 +#define PAUSE 3 +#define MAX_WIDTH 84 //display 84x48 +#define MAX_HEIGHT 48 +#define speakerPin 2 + +boolean dl=false,dr=false,du=false,dd=false; // to check in which direction the snake is currently moving + +int x[200],y[200],i,slength,tempx=10,tempy=10,xx,yy; +unsigned int high; +uint8_t bh,bl; +int xegg,yegg; +int freq,tb; +int l,r,u,d,p; +unsigned long time=280,beeptime=50; +int score=0,flag=0; + + + +void setup() +{ + Serial.begin(9600); //Begin Serial Communication + display.begin(); + display.clearDisplay(); + + + + pinMode(LEFT,INPUT); //Directional keys and pause + pinMode(RIGHT,INPUT); + pinMode(UP,INPUT); + pinMode(DOWN,INPUT); + pinMode(PAUSE,INPUT); + + pinMode(speakerPin,OUTPUT); //Buzzer pin + + digitalWrite(LEFT,HIGH); //Active low keys + digitalWrite(RIGHT,HIGH); + digitalWrite(UP,HIGH); + digitalWrite(DOWN,HIGH); + digitalWrite(PAUSE,HIGH); + + + display.setContrast(25); + slength=8; //Start with snake length 8 + + xegg=(display.width())/2; + + yegg=(display.height())/2; + + display.setTextSize(2); //Initial Display + display.setTextColor(BLACK); + display.setCursor(10,15); + display.print("rishabh"); + display.setCursor(10,40); + display.print("jjjj"); + display.display(); + delay(4000); + display.clearDisplay(); + + for(i=0;i<=slength;i++) //Set starting coordinates of snake + { + x[i]=25-3*i; + y[i]=10; + } + + for(i=0;i=84){tempx=tempx-84;} + if(tempy<=0){tempy=48+tempy;} + if(tempy>=48){tempy=tempy-48;} + + for(i=0;i<=slength;i++) //Change the coordinates of all points of snake + { + xx=x[i]; + yy=y[i]; + x[i]=tempx; + y[i]=tempy; + tempx=xx; + tempy=yy; + } + +drawsnake(); //Draw the snake and egg at the new coordinates +} +} + + +void checkgame() //Game over checker +{ + for(i=1;ihigh) + { + high=score; + bh=(high >> 8); + bl=high & 0xff; + + EEPROM.write(1,bh); + EEPROM.write(0,bl); + } + + display.clearDisplay(); + display.setTextColor(BLACK); + display.setTextSize(1); + display.setCursor(20,12); + display.print("Game Over"); + display.setCursor(15,30); + display.print("Score: "); + display.print(score); + display.setCursor(15,40); + display.print("High: "); + display.print(high); + + display.display(); + beep(20,5000); + + + display.clearDisplay(); + + slength=8; //Resetting the values + score=0; + time=280; + + redraw(); //Restart game by drawing snake with the resetted length and score + } + } + +} + +void checkegg() //Snake meets egg +{ + if(x[0]==xegg or x[0]==(xegg+1) or x[0]==(xegg+2) or x[0]==(xegg-1)) //Snake in close vicinity of egg + { + if(y[0]==yegg or y[0]==(yegg+1) or y[0]==(yegg+2) or y[0]==(yegg-1)) + { + score+=1; //Increase length,score and increase movement speed by decreasing 'time' + slength+=1; + if(time>=90) + {time-=20;} + + display.fillRect(xegg,yegg,3,3,WHITE); //Delete the consumed egg + + display.display(); + + + beep(35,beeptime); //Beep with a sound of 35Hz for 'beeptime' ms + xegg=random(1,80); //Create New egg randomly + yegg=random(1,40); + } + } +} + + +void direct() //Check if user pressed any keys and change direction if so +{ + if(l==LOW and dr==false) //when key LEFT is pressed ,L will become low + { + dl=true;du=false;dd=false; + tempx=x[0]-3; //Save the new coordinates of head in tempx,tempy + tempy=y[0]; + flag=1; //Do not change direction any further for the ongoing 'time' milliseconds + } + else if(r==LOW and dl==false) + { + dr=true;du=false;dd=false; + tempx=x[0]+3; + tempy=y[0]; + flag=1; + } + else if(u==LOW and dd==false) + { + du=true;dl=false;dr=false; + tempy=y[0]-3; + tempx=x[0]; + flag=1; + } + else if(d==LOW and du==false) + { + dd=true;dl=false;dr=false; + tempy=y[0]+3; + tempx=x[0]; + flag=1; + } + else if(p==LOW) //Pause game for 5 seconds + { + display.clearDisplay(); + + display.setTextColor(BLACK); + for(i=5;i>0;i--) + { + display.setCursor(25,10); + display.setTextSize(1); + display.print("PAUSED"); + display.setCursor(40,30); + display.print(i); + display.display(); + delay(1000); + display.clearDisplay(); + } + redraw(); //Redraw the snake and egg at the same position as it was + } +} + + +void drawsnake() //Draw snake and egg at newly changed positions +{ + display.fillRect(xegg,yegg,3,3,BLACK); //Draw egg at new pos + + display.drawCircle(x[0],y[0],1,BLACK); //Draw new head of snake + display.drawCircle(x[slength],y[slength],1,WHITE); //Delete old tail of snake + + display.display(); + +} + +void redraw() //Redraw ALL POINTS of snake and egg +{ + display.fillRect(xegg,yegg,3,3,BLACK); + for(i=0;i + +Node-25: + + +Node-24: + + +Node-23: + + +Node-22: + + +Resistor-21: + + +Node-20: + + +Resistor-19: + + +Resistor-18: + + +Push-17: + + +Push-16: + + +Push-15: + + +Arduino Nano-14: + + +Pcd8544-13: + + +Push-12: + + +Resistor-11: + + +Node-10: + + +Node-9: + + +Node-8: + + +Node-7: + + +Node-6: + + +Push-5: + + +Resistor-4: + + +Node-3: + + +Node-2: + + +Node-1: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-39: + + +Connector-40: + + +Connector-41: + + +Connector-42: + + +Connector-44: + + +Connector-45: + + +Connector-46: + + +Connector-47: + + +Connector-48: + + +Connector-49: + + +Connector-50: + + +Connector-52: + + +Connector-54: + + +Connector-56: + + +Connector-58: + + +Connector-59: + + +Connector-60: + + +Connector-61: + + +Connector-62: + + +Connector-63: + + +Connector-64: + + +Connector-65: + + +Connector-67: + + +Connector-68: + + +Connector-69: + + +Connector-70: + + +Connector-71: + + +Connector-72: + + +Connector-73: + + +Connector-74: + + +Connector-75: + + +PlotterWidget-76: + + +SerialPortWidget-77: + + + diff --git a/resources/examples/Arduino/Nano_software-pwm/Nano_software-pwm.simu b/resources/examples/Arduino/Nano_software-pwm/Nano_software-pwm.simu new file mode 100644 index 0000000..0b4db6b --- /dev/null +++ b/resources/examples/Arduino/Nano_software-pwm/Nano_software-pwm.simu @@ -0,0 +1,729 @@ + + +Node-107: + + +Node-106: + + +Node-105: + + +Node-104: + + +Node-103: + + +Node-102: + + +Node-101: + + +Node-100: + + +Node-99: + + +Node-98: + + +Node-97: + + +Arduino Nano-96: + + +74HC164-95: + + +74HC164-94: + + +74HC164-93: + + +Node-92: + + +Node-91: + + +74HC164-90: + + +Node-89: + + +Node-88: + + +74HC164-87: + + +Node-86: + + +Led-85: + + +Led-84: + + +Led-83: + + +Led-82: + + +Led-81: + + +Led-80: + + +Led-79: + + +Led-78: + + +74HC164-77: + + +74HC164-76: + + +Led-75: + + +Led-74: + + +Led-73: + + +Led-72: + + +Led-71: + + +Led-70: + + +Led-69: + + +Led-68: + + +74HC164-67: + + +Led-66: + + +Led-65: + + +Led-64: + + +Led-63: + + +Led-62: + + +Led-61: + + +Led-60: + + +Led-59: + + +Node-58: + + +74HC164-57: + + +Led-56: + + +Led-55: + + +Led-54: + + +Led-53: + + +Led-52: + + +Led-51: + + +Led-50: + + +Led-49: + + +Node-48: + + +Node-47: + + +Node-46: + + +Node-45: + + +Led-44: + + +Led-43: + + +Led-42: + + +Led-41: + + +Led-40: + + +Led-39: + + +Led-38: + + +Led-37: + + +Led-36: + + +Led-35: + + +Led-34: + + +Led-33: + + +Led-32: + + +Led-31: + + +Led-30: + + +Led-29: + + +Led-28: + + +Led-27: + + +Led-26: + + +Led-25: + + +Node-24: + + +Node-23: + + +Node-22: + + +Node-21: + + +Led-20: + + +Led-19: + + +Led-18: + + +Led-17: + + +Led-16: + + +Led-15: + + +Led-14: + + +Led-13: + + +Led-12: + + +Led-11: + + +Led-10: + + +Led-9: + + +Led-8: + + +Led-7: + + +Led-6: + + +Led-5: + + +Led-4: + + +Led-3: + + +Led-2: + + +Led-1: + + +Connector-108: + + +Connector-110: + + +Connector-112: + + +Connector-114: + + +Connector-116: + + +Connector-118: + + +Connector-120: + + +Connector-122: + + +Connector-124: + + +Connector-126: + + +Connector-128: + + +Connector-130: + + +Connector-132: + + +Connector-134: + + +Connector-136: + + +Connector-138: + + +Connector-140: + + +Connector-142: + + +Connector-144: + + +Connector-146: + + +Connector-148: + + +Connector-150: + + +Connector-152: + + +Connector-154: + + +Connector-156: + + +Connector-157: + + +Connector-158: + + +Connector-159: + + +Connector-161: + + +Connector-163: + + +Connector-165: + + +Connector-166: + + +Connector-167: + + +Connector-168: + + +Connector-170: + + +Connector-172: + + +Connector-174: + + +Connector-176: + + +Connector-177: + + +Connector-178: + + +Connector-179: + + +Connector-180: + + +Connector-181: + + +Connector-182: + + +Connector-183: + + +Connector-184: + + +Connector-186: + + +Connector-187: + + +Connector-188: + + +Connector-189: + + +Connector-190: + + +Connector-192: + + +Connector-194: + + +Connector-196: + + +Connector-198: + + +Connector-200: + + +Connector-202: + + +Connector-204: + + +Connector-206: + + +Connector-208: + + +Connector-210: + + +Connector-212: + + +Connector-214: + + +Connector-216: + + +Connector-218: + + +Connector-220: + + +Connector-221: + + +Connector-222: + + +Connector-223: + + +Connector-224: + + +Connector-225: + + +Connector-226: + + +Connector-227: + + +Connector-228: + + +Connector-230: + + +Connector-232: + + +Connector-234: + + +Connector-236: + + +Connector-238: + + +Connector-240: + + +Connector-242: + + +Connector-244: + + +Connector-246: + + +Connector-248: + + +Connector-250: + + +Connector-252: + + +Connector-254: + + +Connector-256: + + +Connector-258: + + +Connector-260: + + +Connector-262: + + +Connector-264: + + +Connector-266: + + +Connector-268: + + +Connector-270: + + +Connector-272: + + +Connector-274: + + +Connector-276: + + +Connector-278: + + +Connector-280: + + +Connector-282: + + +Connector-283: + + +Connector-285: + + +Connector-287: + + +Connector-289: + + +Connector-291: + + +Connector-293: + + +Connector-295: + + +Connector-297: + + +Connector-298: + + +Connector-299: + + +Connector-300: + + +Connector-301: + + +Connector-302: + + +Connector-303: + + +Connector-304: + + +Connector-305: + + +Connector-306: + + +Connector-307: + + +Connector-308: + + +Connector-309: + + +Connector-310: + + +Connector-311: + + +Connector-312: + + +Connector-313: + + +Connector-314: + + +Connector-315: + + +Connector-316: + + +Connector-317: + + +Connector-318: + + +Connector-319: + + +Connector-320: + + +Connector-322: + + +PlotterWidget-324: + + +SerialPortWidget-325: + + + diff --git a/resources/examples/Arduino/Serial_Port_connection/analog_serial.simu b/resources/examples/Arduino/Serial_Port_connection/analog_serial.simu new file mode 100644 index 0000000..c35a701 --- /dev/null +++ b/resources/examples/Arduino/Serial_Port_connection/analog_serial.simu @@ -0,0 +1,51 @@ + + +Clock-7: + + +Volt. Source-6: + + +Volt. Source-5: + + +Arduino Uno-4: + + +Capacitor-3: + + +Potentiometer-2: + + +Node-1: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-15: + + +Connector-16: + + +Connector-18: + + +PlotterWidget-20: + + +SerialPortWidget-21: + + + diff --git a/resources/examples/Arduino/Serial_Port_connection/analog_serial.simu-old b/resources/examples/Arduino/Serial_Port_connection/analog_serial.simu-old new file mode 100644 index 0000000..32f34e3 --- /dev/null +++ b/resources/examples/Arduino/Serial_Port_connection/analog_serial.simu-old @@ -0,0 +1,45 @@ + + +Clock-7: + + +Volt. Source-6: + + +Volt. Source-5: + + +Arduino Uno-4: + + +Capacitor-3: + + +Potentiometer-2: + + +Node-1: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-15: + + +Connector-16: + + +Connector-18: + + + diff --git a/resources/examples/Arduino/Serial_Port_connection/barGraph_serial.simu b/resources/examples/Arduino/Serial_Port_connection/barGraph_serial.simu new file mode 100644 index 0000000..7d63312 --- /dev/null +++ b/resources/examples/Arduino/Serial_Port_connection/barGraph_serial.simu @@ -0,0 +1,366 @@ + + +Node-22: + + +Node-21: + + +Node-20: + + +Arduino Uno-19: + + +LedBar-18: + + +Latch-17: + + +In Bus-16: + + +Out Bus-15: + + +LedBar-14: + + +Latch-13: + + +In Bus-12: + + +Out Bus-11: + + +Out Bus-10: + + +In Bus-9: + + +Latch-8: + + +LedBar-7: + + +In Bus-6: + + +In Bus-5: + + +In Bus-4: + + +Out Bus-3: + + +Node-2: + + +Node-1: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +Connector-39: + + +Connector-41: + + +Connector-43: + + +Connector-45: + + +Connector-47: + + +Connector-49: + + +Connector-51: + + +Connector-53: + + +Connector-55: + + +Connector-57: + + +Connector-59: + + +Connector-61: + + +Connector-63: + + +Connector-65: + + +Connector-67: + + +Connector-69: + + +Connector-71: + + +Connector-73: + + +Connector-75: + + +Connector-77: + + +Connector-79: + + +Connector-81: + + +Connector-83: + + +Connector-85: + + +Connector-87: + + +Connector-89: + + +Connector-91: + + +Connector-93: + + +Connector-95: + + +Connector-97: + + +Connector-99: + + +Connector-101: + + +Connector-103: + + +Connector-105: + + +Connector-107: + + +Connector-109: + + +Connector-111: + + +Connector-113: + + +Connector-115: + + +Connector-117: + + +Connector-119: + + +Connector-121: + + +Connector-123: + + +Connector-125: + + +Connector-127: + + +Connector-129: + + +Connector-131: + + +Connector-133: + + +Connector-135: + + +Connector-137: + + +Connector-139: + + +Connector-141: + + +Connector-143: + + +Connector-145: + + +Connector-147: + + +Connector-149: + + +Connector-151: + + +Connector-153: + + +Connector-155: + + +Connector-157: + + +Connector-159: + + +Connector-161: + + +Connector-163: + + +Connector-165: + + +Connector-167: + + +Connector-169: + + +Connector-171: + + +Connector-173: + + +Connector-175: + + +Connector-177: + + +Connector-179: + + +Connector-181: + + +Connector-183: + + +Connector-185: + + +Connector-187: + + +Connector-189: + + +Connector-191: + + +Connector-192: + + +Connector-193: + + +Connector-194: + + +Connector-195: + + +Connector-197: + + +Connector-199: + + +Connector-201: + + +Connector-202: + + +Connector-203: + + +Connector-204: + + +Connector-205: + + +Connector-206: + + +PlotterWidget-207: + + +SerialPortWidget-208: + + + diff --git a/resources/examples/Arduino/Serial_Port_connection/data.simu b/resources/examples/Arduino/Serial_Port_connection/data.simu new file mode 100644 index 0000000..25f8ef8 --- /dev/null +++ b/resources/examples/Arduino/Serial_Port_connection/data.simu @@ -0,0 +1,48 @@ + + +Volt. Source-7: + + +Volt. Source-6: + + +Volt. Source-5: + + +Fixed Volt.-4: + + +Fixed Volt.-3: + + +Fixed Volt.-2: + + +Arduino Uno-1: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +PlotterWidget-207: + + +SerialPortWidget-208: + + + diff --git a/resources/examples/Arduino/Serial_Port_connection/readme b/resources/examples/Arduino/Serial_Port_connection/readme new file mode 100644 index 0000000..abbeb77 --- /dev/null +++ b/resources/examples/Arduino/Serial_Port_connection/readme @@ -0,0 +1,8 @@ + +Please watch this video (from 00:48): + +https://youtu.be/WVBgmah6gE0 + + +Example of socat command to use in Linux: +sudo socat PTY,link=/dev/ttyS1,mode=0666 PTY,link=/dev/ttyS2,mode=0666 diff --git a/resources/examples/Arduino/Test_74HC165/Test_74HC165.ino b/resources/examples/Arduino/Test_74HC165/Test_74HC165.ino new file mode 100644 index 0000000..5b14cd6 --- /dev/null +++ b/resources/examples/Arduino/Test_74HC165/Test_74HC165.ino @@ -0,0 +1,41 @@ +//This file has been modified from: http://wiki.t-o-f.info/Arduino/ExempleMutliplexeurDentr%C3%A9esNum%C3%A9riques74HC165#toc3 +// HARDWARE CONNECTIONS +int LATCH = 11; +int CLOCK = 10; +int DATA = 9; + +byte a=0; + +void setup() { + Serial.begin(57600); + pinMode(LATCH, OUTPUT); + pinMode(CLOCK, OUTPUT); + pinMode(DATA, INPUT); + digitalWrite(CLOCK,LOW); + digitalWrite(LATCH,LOW); +} + +void loop() { + digitalWrite(LATCH,HIGH); + byte a_temp = shiftInFixed(DATA,CLOCK); + digitalWrite(LATCH,LOW); + // Envoie la valeur lue si elle change + if ( a_temp != a ) { + a = a_temp; + Serial.print("Value: "); + Serial.println(a,DEC); + } + delayMicroseconds(1000); +} + +byte shiftInFixed(byte dataPin, byte clockPin) { + byte value = 0; + int j= 7; + for (byte i = 0; i <8; ++i) { + value = value | (digitalRead(dataPin) << j); + j--; + digitalWrite(clockPin, HIGH); + digitalWrite(clockPin, LOW); + } + return value; +} diff --git a/resources/examples/Arduino/Test_74HC165/Test_74HC165.simu b/resources/examples/Arduino/Test_74HC165/Test_74HC165.simu new file mode 100644 index 0000000..cb386a0 --- /dev/null +++ b/resources/examples/Arduino/Test_74HC165/Test_74HC165.simu @@ -0,0 +1,297 @@ + + +Text-39: + + +Node-38: + + +ResistorDip-37: + + +Arduino Uno-36: + + +74HC165-35: + + +Switch-34: + + +Switch-33: + + +Switch-32: + + +Switch-31: + + +Switch-30: + + +Switch-29: + + +Switch-28: + + +Switch-27: + + +Node-26: + + +Node-25: + + +Node-24: + + +Node-23: + + +Node-22: + + +Node-21: + + +Node-20: + + +Node-19: + + +Node-18: + + +Node-17: + + +Node-16: + + +Node-15: + + +Node-14: + + +Node-13: + + +Node-12: + + +Node-11: + + +Node-10: + + +Node-9: + + +Node-8: + + +Node-7: + + +Ground (0 V)-6: + + +Node-5: + + +Rail.-4: + + +Text-3: + + +Text-2: + + +Text-1: + + +Connector-40: + + +Connector-42: + + +Connector-43: + + +Connector-44: + + +Connector-45: + + +Connector-46: + + +Connector-47: + + +Connector-48: + + +Connector-49: + + +Connector-50: + + +Connector-51: + + +Connector-52: + + +Connector-54: + + +Connector-56: + + +Connector-58: + + +Connector-59: + + +Connector-61: + + +Connector-62: + + +Connector-63: + + +Connector-64: + + +Connector-65: + + +Connector-66: + + +Connector-67: + + +Connector-68: + + +Connector-69: + + +Connector-70: + + +Connector-71: + + +Connector-72: + + +Connector-74: + + +Connector-75: + + +Connector-76: + + +Connector-77: + + +Connector-78: + + +Connector-80: + + +Connector-81: + + +Connector-83: + + +Connector-85: + + +Connector-86: + + +Connector-87: + + +Connector-88: + + +Connector-89: + + +Connector-90: + + +Connector-92: + + +Connector-93: + + +Connector-94: + + +Connector-95: + + +Connector-97: + + +Connector-98: + + +Connector-99: + + +Connector-100: + + +Connector-101: + + +Connector-102: + + +Connector-103: + + +Connector-104: + + +Connector-106: + + +Connector-107: + + +Connector-108: + + +PlotterWidget-110: + + +SerialPortWidget-111: + + + diff --git a/resources/examples/Arduino/Voltimeter/voltimeter.simu b/resources/examples/Arduino/Voltimeter/voltimeter.simu new file mode 100644 index 0000000..2842e09 --- /dev/null +++ b/resources/examples/Arduino/Voltimeter/voltimeter.simu @@ -0,0 +1,99 @@ + + +Volt. Source-11: + + +Resistor-10: + + +Resistor-9: + + +Resistor-8: + + +Resistor-7: + + +Resistor-6: + + +Resistor-5: + + +Resistor-4: + + +Resistor-3: + + +Seven Segment-2: + + +Arduino Uno-1: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-44: + + +Connector-46: + + +Connector-48: + + +PlotterWidget-110: + + +SerialPortWidget-111: + + + diff --git a/resources/examples/Arduino/Voltimeter/voltimeter2.simu b/resources/examples/Arduino/Voltimeter/voltimeter2.simu new file mode 100644 index 0000000..87bc346 --- /dev/null +++ b/resources/examples/Arduino/Voltimeter/voltimeter2.simu @@ -0,0 +1,99 @@ + + +Arduino Uno-11: + + +Seven Segment-10: + + +Resistor-9: + + +Resistor-8: + + +Resistor-7: + + +Resistor-6: + + +Resistor-5: + + +Resistor-4: + + +Resistor-3: + + +Resistor-2: + + +Volt. Source-1: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-44: + + +Connector-46: + + +Connector-48: + + +PlotterWidget-110: + + +SerialPortWidget-111: + + + diff --git a/resources/examples/Arduino/Voltimeter/voltimeter2_backup.simu b/resources/examples/Arduino/Voltimeter/voltimeter2_backup.simu new file mode 100644 index 0000000..4fcf74e --- /dev/null +++ b/resources/examples/Arduino/Voltimeter/voltimeter2_backup.simu @@ -0,0 +1,99 @@ + + +Volt. Source-11: + + +Resistor-10: + + +Resistor-9: + + +Resistor-8: + + +Resistor-7: + + +Resistor-6: + + +Resistor-5: + + +Resistor-4: + + +Resistor-3: + + +Seven Segment-2: + + +Arduino Uno-1: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-44: + + +Connector-46: + + +Connector-48: + + +PlotterWidget-50: + + +SerialPortWidget-51: + + + diff --git a/resources/examples/Arduino/arduino_eeprom/arduino_eeprom.simu b/resources/examples/Arduino/arduino_eeprom/arduino_eeprom.simu new file mode 100644 index 0000000..9645609 --- /dev/null +++ b/resources/examples/Arduino/arduino_eeprom/arduino_eeprom.simu @@ -0,0 +1,33 @@ + + +Arduino Uno-2: + + +Hd44780-1: + + +Connector-3: + + +Connector-5: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +PlotterWidget-15: + + +SerialPortWidget-16: + + + diff --git a/resources/examples/Arduino/arduino_eeprom/arduino_eeprom/arduino_eeprom.ino b/resources/examples/Arduino/arduino_eeprom/arduino_eeprom/arduino_eeprom.ino new file mode 100644 index 0000000..b1f1e0d --- /dev/null +++ b/resources/examples/Arduino/arduino_eeprom/arduino_eeprom/arduino_eeprom.ino @@ -0,0 +1,54 @@ +#include +#include + +const int rs = 12, en = 11, d4 = 5, d5 = 4, d6 = 3, d7 = 2; +LiquidCrystal lcd(rs, en, d4, d5, d6, d7); + + +void setup() +{ + lcd.begin(16, 2); + + byte val = 0; + + lcd.setCursor( 0, 0 ); + lcd.print("EEP size = "); + lcd.print(EEPROM.length()); + delay(2000); + + // WRITE EEPROM + /*lcd.setCursor( 0, 0 ); + lcd.print("Writting EEPROM...\n"); + for( int i=0; i + +Node-5: + + +Resistor-4: + + +Push-3: + + +Arduino Uno-2: + + +LedMatrix-1: + + +Connector-6: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-43: + + +Connector-44: + + +PlotterWidget-46: + + +SerialPortWidget-47: + + + diff --git a/resources/examples/Arduino/arduino_led_matrix/led_matrix/led_matrix.ino b/resources/examples/Arduino/arduino_led_matrix/led_matrix/led_matrix.ino new file mode 100644 index 0000000..28d7edb --- /dev/null +++ b/resources/examples/Arduino/arduino_led_matrix/led_matrix/led_matrix.ino @@ -0,0 +1,115 @@ +/* + * Conway's "Life" + * + * Adapted from the Life example + * on the Processing.org site + * + * Needs FrequencyTimer2 library + */ + +#include + +byte col = 0; +byte leds[8][8]; + +// pin[xx] on led matrix connected to nn on Arduino (-1 is dummy to make array start at pos 1) +int pins[17]= {-1, 19, 18, 17, 16, 15, 14, 13, 12, 0, 1, 2, 3, 4, 5, 6, 7}; + +// col[xx] of leds = pin yy on led matrix +int cols[8] = {pins[1], pins[2], pins[3], pins[4], pins[5], pins[6], pins[7], pins[8]}; + +// row[xx] of leds = pin yy on led matrix +int rows[8] = {pins[9], pins[10], pins[11], pins[12], pins[13], pins[14], pins[15], pins[16]}; + +#define SIZE 8 +extern byte leds[SIZE][SIZE]; +byte world[SIZE][SIZE]; +long density = 50; + +void setup() +{ + for( int i = 1; i <= 16; i++ ) pinMode(pins[i], OUTPUT); + + for( int i=0; i= SIZE ) nx -= SIZE; + + int px = x-1; + if( px < 0 ) px += SIZE; + + for (int y=0; y= SIZE ) ny -= SIZE; + + int py = y-1; + if( py < 0 ) py += SIZE; + + int count = + world[nx] [y]+ + world[x] [ny]+ + world[px] [y]+ + world[x] [py]; + + if( count == 2 ) leds[x][y] = 1; + if(( count < 2 + || count > 3) ) leds[x][y] = 0; + + delay(10); + } + } +} + +void initialize() +{ + randomSeed( TCNT0 ); + + for( int i = 0; i < SIZE; i++ ) + { + for( int j = 0; j < SIZE; j++ ) + { + if( random(100) < density ) leds[i][j] = 1; + else leds[i][j] = 0; + } + } + delay(500); +} + +void updateScreen() +{ + digitalWrite(cols[col], HIGH); + col++; + if( col == SIZE ) col = 0; + + for( int row=0; row + +Audio Out-2: + + +Arduino Uno-1: + + +Connector-3: + + +Connector-5: + + +PlotterWidget-46: + + +SerialPortWidget-47: + + + diff --git a/resources/examples/Arduino/arduino_music/arduino_music_ino/arduino_music.ino b/resources/examples/Arduino/arduino_music/arduino_music_ino/arduino_music.ino new file mode 100644 index 0000000..604fd46 --- /dev/null +++ b/resources/examples/Arduino/arduino_music/arduino_music_ino/arduino_music.ino @@ -0,0 +1,164 @@ +/* Play Melody + * ----------- + * + * Program to play a simple melody + * + * Tones are created by quickly pulsing a speaker on and off + * using PWM, to create signature frequencies. + * + + + + * Each note has a frequency, created by varying the period of + * vibration, measured in microseconds. We'll use pulse-width + * modulation (PWM) to create that vibration. + + * We calculate the pulse-width to be half the period; we pulse + * the speaker HIGH for + + 'pulse-width' micro + + + + + +seconds, then LOW + * for 'pulse-width' microseconds. + * This pulsing creates a vibration of the desired frequency. + * + + + + + + + * (cleft) 2005 D. Cuartielles for K3 + * Refactoring and comments 2006 clay.shirky@nyu.edu + * See NOTES in comments at end for possible improvements + */ + +// TONES ========================================== +// Start by defining the relationship between +// note, period, & frequency. +#define c 3830 // 261 Hz +#define d 3400 // 294 Hz +#define e 3038 // 329 Hz +#define f 2864 // 349 Hz +#define g 2550 // 392 Hz +#define a 2272 // 440 Hz +#define b 2028 // 493 Hz +#define C 1912 // 523 Hz +// Define a special note, 'R', to represent a rest +#define R 0 + +// SETUP ============================================ +// Set up speaker on a PWM pin (digital 9, 10 or 11) +int speakerOut = 9; +// Do we want debugging on serial out? 1 for yes, 0 for no +int DEBUG = 0; + +void setup() { + pinMode(speakerOut, OUTPUT); + if (DEBUG) { + Serial.begin(9600); // Set serial out if we want debugging + } +} + +// MELODY and TIMING ======================================= +// melody[] is an array of notes, accompanied by beats[], +// which sets each note's relative length (higher #, longer note) +int melody[] = { C, b, g, C, b, e, R, C, c, g, a, C }; +int beats[] = { 16, 16, 16, 8, 8, 16, 32, 16, 16, 16, 8, 8 }; +int MAX_COUNT = sizeof(melody) / 2; // Melody length, for looping. + +// Set overall tempo +long tempo = 10000; +// Set length of pause between notes +int pause = 1000; +// Loop variable to increase Rest length +int rest_count = 100; //<-BLETCHEROUS HACK; See NOTES + +// Initialize core variables +int tone_ = 0; +int beat = 0; +long duration = 0; + +// PLAY TONE ============================================== +// Pulse the speaker to play a tone for a particular duration +void playTone() { + long elapsed_time = 0; + if (tone_ > 0) { // if this isn't a Rest beat, while the tone has + // played less long than 'duration', pulse speaker HIGH and LOW + while (elapsed_time < duration) { + + digitalWrite(speakerOut,HIGH); + delayMicroseconds(tone_ / 2); + + // DOWN + digitalWrite(speakerOut, LOW); + delayMicroseconds(tone_ / 2); + + // Keep track of how long we pulsed + elapsed_time += (tone_); + } + } + else { // Rest beat; loop times delay + for (int j = 0; j < rest_count; j++) { // See NOTE on rest_count + delayMicroseconds(duration); + } + } +} + +// LET THE WILD RUMPUS BEGIN ============================= +void loop() { + // Set up a counter to pull from melody[] and beats[] + for (int i=0; i + +Arduino Uno-1: + + +PlotterWidget-2: + + +SerialPortWidget-3: + + + diff --git a/resources/examples/Arduino/arduino_serial_echo/arduino_serial_echo_ino/arduino_serial_echo.ino b/resources/examples/Arduino/arduino_serial_echo/arduino_serial_echo_ino/arduino_serial_echo.ino new file mode 100644 index 0000000..484eb63 --- /dev/null +++ b/resources/examples/Arduino/arduino_serial_echo/arduino_serial_echo_ino/arduino_serial_echo.ino @@ -0,0 +1,19 @@ + +byte byteRead; + +void setup() +{ + Serial.begin(9600); + + Serial.write("Serial echo Test\n"); +} + +void loop() +{ + if( Serial.available() ) + { + byteRead = Serial.read(); + + Serial.write(byteRead); + } +} \ No newline at end of file diff --git a/resources/examples/Arduino/barGraph/barGraph.simu b/resources/examples/Arduino/barGraph/barGraph.simu new file mode 100644 index 0000000..acc31d3 --- /dev/null +++ b/resources/examples/Arduino/barGraph/barGraph.simu @@ -0,0 +1,231 @@ + + +Potentiometer-32: + + +Probe-31: + + +Node-30: + + +Node-29: + + +Node-28: + + +Node-27: + + +Node-26: + + +Node-25: + + +Node-24: + + +Resistor-23: + + +Resistor-22: + + +Resistor-21: + + +Resistor-20: + + +Resistor-19: + + +Resistor-18: + + +Resistor-17: + + +Resistor-16: + + +Resistor-15: + + +Resistor-14: + + +Arduino Uno-13: + + +Led-12: + + +Led-11: + + +Led-10: + + +Led-9: + + +Led-8: + + +Led-7: + + +Led-6: + + +Led-5: + + +Led-4: + + +Led-3: + + +Node-2: + + +Node-1: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +Connector-39: + + +Connector-41: + + +Connector-43: + + +Connector-45: + + +Connector-47: + + +Connector-49: + + +Connector-51: + + +Connector-53: + + +Connector-55: + + +Connector-57: + + +Connector-58: + + +Connector-60: + + +Connector-61: + + +Connector-62: + + +Connector-64: + + +Connector-65: + + +Connector-66: + + +Connector-68: + + +Connector-69: + + +Connector-70: + + +Connector-72: + + +Connector-73: + + +Connector-74: + + +Connector-76: + + +Connector-77: + + +Connector-78: + + +Connector-80: + + +Connector-81: + + +Connector-82: + + +Connector-84: + + +Connector-86: + + +Connector-88: + + +Connector-89: + + +Connector-90: + + +Connector-91: + + +Connector-92: + + +Connector-93: + + +Connector-95: + + +Connector-97: + + +PlotterWidget-10: + + +SerialPortWidget-11: + + + diff --git a/resources/examples/Arduino/barGraph/barGraph2.simu b/resources/examples/Arduino/barGraph/barGraph2.simu new file mode 100644 index 0000000..4ee89a6 --- /dev/null +++ b/resources/examples/Arduino/barGraph/barGraph2.simu @@ -0,0 +1,261 @@ + + +Node-37: + + +Node-36: + + +Capacitor-35: + + +Node-34: + + +Node-33: + + +Node-32: + + +Node-31: + + +Node-30: + + +Node-29: + + +Resistor-28: + + +Resistor-27: + + +Resistor-26: + + +Resistor-25: + + +Resistor-24: + + +Resistor-23: + + +Resistor-22: + + +Resistor-21: + + +Resistor-20: + + +Resistor-19: + + +Arduino Uno-18: + + +Led-17: + + +Led-16: + + +Led-15: + + +Led-14: + + +Led-13: + + +Led-12: + + +Led-11: + + +Led-10: + + +Led-9: + + +Led-8: + + +Potentiometer-7: + + +Probe-6: + + +Buffer-5: + + +Resistor-4: + + +Node-3: + + +Node-2: + + +Node-1: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-44: + + +Connector-46: + + +Connector-48: + + +Connector-50: + + +Connector-52: + + +Connector-54: + + +Connector-56: + + +Connector-58: + + +Connector-60: + + +Connector-62: + + +Connector-63: + + +Connector-65: + + +Connector-66: + + +Connector-67: + + +Connector-69: + + +Connector-70: + + +Connector-71: + + +Connector-73: + + +Connector-75: + + +Connector-77: + + +Connector-78: + + +Connector-80: + + +Connector-81: + + +Connector-82: + + +Connector-84: + + +Connector-85: + + +Connector-86: + + +Connector-88: + + +Connector-90: + + +Connector-92: + + +Connector-94: + + +Connector-95: + + +Connector-96: + + +Connector-97: + + +Connector-99: + + +Connector-101: + + +Connector-102: + + +Connector-103: + + +Connector-104: + + +Connector-105: + + +Connector-106: + + +Connector-107: + + +Connector-108: + + +Connector-109: + + +PlotterWidget-10: + + +SerialPortWidget-11: + + + diff --git a/resources/examples/Arduino/ledFadding/ledFadding.ino b/resources/examples/Arduino/ledFadding/ledFadding.ino new file mode 100644 index 0000000..9066bf1 --- /dev/null +++ b/resources/examples/Arduino/ledFadding/ledFadding.ino @@ -0,0 +1,39 @@ +/* + Fade + + This example shows how to fade an LED on all pwm pins + using the analogWrite() function. + + This example code is in the public domain. + */ +int brightness[] = { 0, 40, 80, 120, 160, 200 };// how bright the LED is +int led[] = { 3, 5, 6, 9, 10, 11 }; // the pin that the LED is attached to +int fadeAmount[] = { 5, 5, 5, 5, 5, 5 }; // how many points to fade the LED by + +// the setup routine runs once when you press reset: +void setup() { + // declare pwm pins to be an output: + for( int i=0; i<6; i++ ) pinMode(led[i], OUTPUT); +} + +// the loop routine runs over and over again forever: +void loop() { + + for( int i=0; i<6; i++ ) + { + // set the brightness of pin 9: + analogWrite(led[i], brightness[i]); + + // change the brightness for next time through the loop: + brightness[i] += fadeAmount[i]; + + // reverse the direction of the fading at the ends of the fade: + if (brightness[i] == 0 || brightness[i] == 255) { + fadeAmount[i] = -fadeAmount[i] ; + } + // wait for 30 milliseconds to see the dimming effect + delay(1); + } + +} + diff --git a/resources/examples/Arduino/ledFadding/ledFadding.simu b/resources/examples/Arduino/ledFadding/ledFadding.simu new file mode 100644 index 0000000..7bdb46d --- /dev/null +++ b/resources/examples/Arduino/ledFadding/ledFadding.simu @@ -0,0 +1,135 @@ + + +Node-19: + + +Node-18: + + +Resistor-17: + + +Resistor-16: + + +Led-15: + + +Led-14: + + +Node-13: + + +Node-12: + + +Resistor-11: + + +Resistor-10: + + +Led-9: + + +Led-8: + + +Node-7: + + +Led-6: + + +Resistor-5: + + +Arduino Uno-4: + + +Led-3: + + +Resistor-2: + + +Ground (0 V)-1: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-31: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-41: + + +Connector-42: + + +Connector-43: + + +Connector-44: + + +Connector-46: + + +Connector-48: + + +Connector-49: + + +Connector-50: + + +Connector-51: + + +Connector-52: + + +Connector-54: + + +PlotterWidget-20: + + +SerialPortWidget-21: + + + diff --git a/resources/examples/Arduino/oscope8544/oscope8544.simu b/resources/examples/Arduino/oscope8544/oscope8544.simu new file mode 100644 index 0000000..c4a3dc9 --- /dev/null +++ b/resources/examples/Arduino/oscope8544/oscope8544.simu @@ -0,0 +1,162 @@ + + +Node-21: + + +Oscope-20: + + +Node-19: + + +Rail.-18: + + +Potentiometer-17: + + +Node-16: + + +Pcd8544-15: + + +Arduino Uno-14: + + +OpAmp-13: + + +Resistor-12: + + +Potentiometer-11: + + +Capacitor-10: + + +Capacitor-9: + + +Capacitor-8: + + +Node-7: + + +Resistor-6: + + +Resistor-5: + + +Node-4: + + +Node-3: + + +Node-2: + + +Node-1: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-31: + + +Connector-32: + + +Connector-33: + + +Connector-34: + + +Connector-35: + + +Connector-36: + + +Connector-38: + + +Connector-39: + + +Connector-40: + + +Connector-41: + + +Connector-43: + + +Connector-45: + + +Connector-47: + + +Connector-49: + + +Connector-51: + + +Connector-52: + + +Connector-54: + + +Connector-56: + + +Connector-58: + + +Connector-60: + + +Connector-61: + + +Connector-62: + + +Connector-63: + + +Connector-64: + + +Connector-65: + + +PlotterWidget-76: + + +SerialPortWidget-77: + + + diff --git a/resources/examples/Arduino/oscope8544/oscope8544_2.ino b/resources/examples/Arduino/oscope8544/oscope8544_2.ino new file mode 100644 index 0000000..cabc2b1 --- /dev/null +++ b/resources/examples/Arduino/oscope8544/oscope8544_2.ino @@ -0,0 +1,131 @@ +#include +#include +#include + +// defines for setting and clearing register bits +#ifndef cbi +#define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit)) +#endif +#ifndef sbi +#define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit)) +#endif + +#define DISPLAY_WIDTH 84 +#define DISPLAY_HEIGHT 48 + +#define ARDUINO_PRECISION 1023.0 +Adafruit_PCD8544 display = Adafruit_PCD8544(7, 6, 5, 4, 3); + + +//Analog Pins +int channelAI = A0; // probe + +#define DELAY_POTENTIMETER //disabled it I don't have it connected +#ifdef DELAY_POTENTIMETER +int delayAI = A1; // delay potentiometer +#endif + +int height = DISPLAY_HEIGHT-1; +unsigned int delayVariable = 0; + +int xCounter = 0; +int yPosition = 0; +uint8_t readings[DISPLAY_WIDTH+1]; + +unsigned long drawtime = 0; +unsigned long lastdraw = 0; +unsigned long frames = 0; + +void setup(void) +{ + //FASTADC: set prescale to 16 + sbi(ADCSRA,ADPS2) ; + cbi(ADCSRA,ADPS1) ; + cbi(ADCSRA,ADPS0) ; + + display.begin(); + display.setContrast(60);// you might have a slightly different display so it might not be the optimal value for you + display.clearDisplay(); +} + +void loop() +{ + #ifdef DELAY_POTENTIMETER + delayVariable = analogRead( delayAI ); + delayVariable = delayVariable*2+1; + #endif + + // Get Rissing Edge: + while( analogRead(channelAI) > 512 ); + while( analogRead(channelAI) < 512 ); + + //record readings + unsigned long readTime = micros(); + unsigned long readTime2 = 0; + unsigned long totTime = 0; + bool positive = true; + int numCicles = 0; + for(xCounter = 0; xCounter <= DISPLAY_WIDTH; xCounter++) + { + yPosition = analogRead(channelAI); + + // Detect rising edges: + if( !positive && (yPosition > 512) ) + { + numCicles++; + readTime2 = micros(); + } + positive = yPosition > 512; + + // Record New Reading: + readings[xCounter] = yPosition>>5; // 0-32 + + // Wait + #ifdef DELAY_POTENTIMETER + delayMicroseconds( delayVariable ); + #endif + } + totTime = (micros()-readTime)/1000; // ms + readTime = readTime2-readTime; + + + display.clearDisplay(); + display.drawLine( 0, 24, 83, 24, BLACK); // 0 line + + // Draw Readings + int base = height-8; + int lastreading = base-readings[0]; + int reading; + for(xCounter = 1; xCounter <= DISPLAY_WIDTH; xCounter++) + { + reading = base-readings[xCounter]; + display.drawLine(xCounter-1, lastreading, xCounter, reading, BLACK); + lastreading = reading; + } + // Draw Frequency + unsigned long freq = numCicles*2000000/readTime; + display.setCursor(1,0); + display.print(freq); + display.print( " Hz" ); + + // Draw reading Time + display.setCursor(42,0); + display.print(totTime); + display.print( " mS" ); + + //Draw FPS + drawtime = micros(); + frames=1000000/*a second*//(drawtime-lastdraw); + lastdraw = drawtime; + display.setCursor(1,41); + display.print(frames); + display.print( " FPS" ); + + // Draw Sample rate + unsigned long rate = 85000/totTime; + display.setCursor(41,41); + display.print(rate); + display.print( " SPS" ); + + display.display(); +} diff --git a/resources/examples/Arduino/pcdtest/pcdtest.simu b/resources/examples/Arduino/pcdtest/pcdtest.simu new file mode 100644 index 0000000..8389a74 --- /dev/null +++ b/resources/examples/Arduino/pcdtest/pcdtest.simu @@ -0,0 +1,30 @@ + + +Arduino Uno-2: + + +Pcd8544-1: + + +Connector-3: + + +Connector-5: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +PlotterWidget-76: + + +SerialPortWidget-77: + + + diff --git a/resources/examples/Arduino/servo-gcb/servo.asm b/resources/examples/Arduino/servo-gcb/servo.asm new file mode 100644 index 0000000..227215e --- /dev/null +++ b/resources/examples/Arduino/servo-gcb/servo.asm @@ -0,0 +1,583 @@ +;Program compiled by Great Cow BASIC (0.94 2015-08-05) +;Need help? See the GCBASIC forums at http://sourceforge.net/projects/gcbasic/forums, +;check the documentation or email w_cholmondeley at users dot sourceforge dot net. + +;******************************************************************************** + +;Chip Model: MEGA328P +;Assembler header file +.INCLUDE "m328pdef.inc" + +;SREG bit names (for AVR Assembler compatibility, GCBASIC uses different names) +#define I 7 +#define T 6 +#define H 5 +#define S 4 +#define V 3 +#define N 2 +#define Z 1 +#define C 0 + +;******************************************************************************** + +;Set aside memory locations for variables +.EQU ADREADPORT=256 +.EQU COUNT=257 +.EQU READAD=258 + +;******************************************************************************** + +;Register variables +.DEF DELAYTEMP=r25 +.DEF DELAYTEMP2=r26 +.DEF SysBitTest=r5 +.DEF SysCalcTempA=r22 +.DEF SysCalcTempB=r28 +.DEF SysValueCopy=r21 +.DEF SysWaitTemp10US=r27 +.DEF SysWaitTempMS=r29 +.DEF SysWaitTempMS_H=r30 + +;******************************************************************************** + +;Vectors +;Interrupt vectors +.ORG 0 + rjmp BASPROGRAMSTART ;Reset +.ORG 2 + reti ;INT0 +.ORG 4 + reti ;INT1 +.ORG 6 + reti ;PCINT0 +.ORG 8 + reti ;PCINT1 +.ORG 10 + reti ;PCINT2 +.ORG 12 + reti ;WDT +.ORG 14 + reti ;TIMER2_COMPA +.ORG 16 + reti ;TIMER2_COMPB +.ORG 18 + reti ;TIMER2_OVF +.ORG 20 + reti ;TIMER1_CAPT +.ORG 22 + reti ;TIMER1_COMPA +.ORG 24 + reti ;TIMER1_COMPB +.ORG 26 + reti ;TIMER1_OVF +.ORG 28 + reti ;TIMER0_COMPA +.ORG 30 + reti ;TIMER0_COMPB +.ORG 32 + reti ;TIMER0_OVF +.ORG 34 + reti ;SPI_STC +.ORG 36 + reti ;USART_RX +.ORG 38 + reti ;USART_UDRE +.ORG 40 + reti ;USART_TX +.ORG 42 + reti ;ADC +.ORG 44 + reti ;EE_READY +.ORG 46 + reti ;ANALOG_COMP +.ORG 48 + reti ;TWI +.ORG 50 + reti ;SPM_READY + +;******************************************************************************** + +;Start of program memory page 0 +.ORG 52 +BASPROGRAMSTART: +;Initialise stack + ldi SysValueCopy,high(RAMEND) + out SPH, SysValueCopy + ldi SysValueCopy,low(RAMEND) + out SPL, SysValueCopy +;Call initialisation routines + rcall INITSYS +;Automatic pin direction setting + sbi DDRB,0 + +;Start of the main program +MAIN: +;Source:F1L30S0I30 + ldi SysValueCopy,0 + sts ADREADPORT,SysValueCopy + rcall FN_READAD + lds SysValueCopy,READAD + sts COUNT,SysValueCopy +;Source:F1L32S0I32 + lds SysCalcTempA,COUNT + cpi SysCalcTempA,75 + brsh ENDIF1 +;Source:F1L33S0I33 + ldi SysValueCopy,75 + sts COUNT,SysValueCopy +;Source:F1L34S0I34 +ENDIF1: +;Source:F1L36S0I36 + ldi SysCalcTempA,225 + lds SysCalcTempB,COUNT + cp SysCalcTempA,SysCalcTempB + brsh ENDIF2 +;Source:F1L37S0I37 + ldi SysValueCopy,225 + sts COUNT,SysValueCopy +;Source:F1L38S0I38 +ENDIF2: +;Source:F1L39S0I39 +;Source:F7L158S0I1 + sbi PORTB,0 +;Source:F7L159S0I2 + lds SysWaitTemp10US,COUNT + rcall Delay_10US +;Source:F7L160S0I3 + cbi PORTB,0 +;Source:F1L40S0I40 + ldi SysWaitTempMS,20 + ldi SysWaitTempMS_H,0 + rcall Delay_MS +;Source:F1L42S0I42 + rjmp MAIN +;Source:F2L34S0I34 +;Source:F2L35S0I35 +;Source:F2L38S0I38 +;Source:F2L44S0I44 +;Source:F2L47S0I47 +;Source:F2L49S0I49 +;Source:F2L50S0I50 +;Source:F2L51S0I51 +;Source:F2L52S0I52 +;Source:F2L55S0I55 +;Source:F2L56S0I56 +;Source:F2L57S0I57 +;Source:F2L58S0I58 +;Source:F2L62S0I62 +;Source:F2L63S0I63 +;Source:F2L64S0I64 +;Source:F2L65S0I65 +;Source:F2L66S0I66 +;Source:F2L67S0I67 +;Source:F2L68S0I68 +;Source:F2L69S0I69 +;Source:F2L70S0I70 +;Source:F2L71S0I71 +;Source:F2L72S0I72 +;Source:F2L73S0I73 +;Source:F2L74S0I74 +;Source:F2L75S0I75 +;Source:F2L76S0I76 +;Source:F2L77S0I77 +;Source:F2L78S0I78 +;Source:F2L79S0I79 +;Source:F2L80S0I80 +;Source:F2L81S0I81 +;Source:F2L82S0I82 +;Source:F2L83S0I83 +;Source:F2L84S0I84 +;Source:F2L85S0I85 +;Source:F2L86S0I86 +;Source:F2L87S0I87 +;Source:F2L88S0I88 +;Source:F2L89S0I89 +;Source:F2L92S0I92 +;Source:F2L93S0I93 +;Source:F2L94S0I94 +;Source:F2L95S0I95 +;Source:F2L96S0I96 +;Source:F2L97S0I97 +;Source:F2L98S0I98 +;Source:F2L99S0I99 +;Source:F2L100S0I100 +;Source:F2L101S0I101 +;Source:F2L102S0I102 +;Source:F2L103S0I103 +;Source:F2L104S0I104 +;Source:F2L105S0I105 +;Source:F3L31S0I31 +;Source:F3L32S0I32 +;Source:F4L55S0I55 +;Source:F4L56S0I56 +;Source:F4L57S0I57 +;Source:F4L60S0I60 +;Source:F4L61S0I61 +;Source:F4L64S0I64 +;Source:F4L114S0I114 +;Source:F5L122S0I83 +;Source:F6L25S0I25 +;Source:F6L26S0I26 +;Source:F6L54S0I23 +;Source:F7L35S0I35 +;Source:F7L36S0I36 +;Source:F7L37S0I37 +;Source:F7L38S0I38 +;Source:F7L39S0I39 +;Source:F7L40S0I40 +;Source:F7L41S0I41 +;Source:F7L43S0I43 +;Source:F7L46S0I46 +;Source:F7L47S0I47 +;Source:F7L48S0I48 +;Source:F9L111S0I111 +;Source:F9L114S0I114 +;Source:F9L115S0I115 +;Source:F9L117S0I117 +;Source:F9L119S0I119 +;Source:F9L120S0I120 +;Source:F9L122S0I122 +;Source:F9L124S0I124 +;Source:F9L125S0I125 +;Source:F9L126S0I126 +;Source:F9L127S0I127 +;Source:F9L129S0I129 +;Source:F9L130S0I130 +;Source:F9L131S0I131 +;Source:F9L133S0I133 +;Source:F9L137S0I137 +;Source:F9L138S0I138 +;Source:F9L139S0I139 +;Source:F9L140S0I140 +;Source:F9L143S0I143 +;Source:F9L144S0I144 +;Source:F9L146S0I146 +;Source:F9L147S0I147 +;Source:F9L148S0I148 +;Source:F9L150S0I150 +;Source:F9L151S0I151 +;Source:F9L153S0I153 +;Source:F9L154S0I154 +;Source:F9L157S0I157 +;Source:F9L158S0I158 +;Source:F9L161S0I161 +;Source:F9L165S0I165 +;Source:F9L166S0I166 +;Source:F9L285S0I9 +;Source:F9L286S0I10 +;Source:F10L34S0I34 +;Source:F10L35S0I35 +;Source:F10L36S0I36 +;Source:F10L37S0I37 +;Source:F10L38S0I38 +;Source:F10L39S0I39 +;Source:F10L40S0I40 +;Source:F10L41S0I41 +;Source:F11L123S0I123 +;Source:F11L124S0I124 +;Source:F11L125S0I125 +;Source:F11L131S0I131 +;Source:F11L132S0I132 +;Source:F11L133S0I133 +;Source:F11L134S0I134 +;Source:F11L135S0I135 +;Source:F11L136S0I136 +;Source:F11L138S0I138 +;Source:F11L139S0I139 +;Source:F11L140S0I140 +;Source:F11L141S0I141 +;Source:F11L142S0I142 +;Source:F11L143S0I143 +;Source:F11L145S0I145 +;Source:F11L146S0I146 +;Source:F11L147S0I147 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+;Source:F12L26S0I26 +;Source:F12L27S0I27 +;Source:F12L28S0I28 +;Source:F12L29S0I29 +;Source:F12L32S0I32 +;Source:F12L33S0I33 +;Source:F12L34S0I34 +;Source:F12L35S0I35 +;Source:F12L36S0I36 +;Source:F12L39S0I39 +;Source:F13L41S0I41 +;Source:F13L42S0I42 +;Source:F13L43S0I43 +;Source:F13L44S0I44 +;Source:F13L45S0I45 +;Source:F13L49S0I49 +;Source:F13L50S0I50 +;Source:F13L51S0I51 +;Source:F13L52S0I52 +;Source:F13L253S0I10 +;Source:F14L57S0I57 +;Source:F14L64S0I64 +;Source:F14L66S0I66 +;Source:F14L67S0I67 +;Source:F14L68S0I68 +;Source:F14L69S0I69 +;Source:F14L70S0I70 +;Source:F14L71S0I71 +;Source:F14L72S0I72 +;Source:F15L22S0I22 +;Source:F15L25S0I25 +;Source:F17L54S0I54 +;Source:F17L57S0I57 +;Source:F18L130S0I130 +;Source:F18L131S0I131 +;Source:F18L132S0I132 +;Source:F18L133S0I133 +;Source:F18L137S0I137 +;Source:F18L138S0I138 +;Source:F18L139S0I139 +;Source:F18L140S0I140 +;Source:F18L142S0I142 +;Source:F18L143S0I143 +;Source:F18L144S0I144 +;Source:F18L151S0I151 +;Source:F19L78S0I78 +;Source:F19L81S0I81 +;Source:F19L82S0I82 +;Source:F19L84S0I84 +;Source:F19L85S0I85 +;Source:F19L86S0I86 +;Source:F19L87S0I87 +;Source:F19L88S0I88 +;Source:F19L90S0I90 +;Source:F19L91S0I91 +;Source:F19L92S0I92 +;Source:F19L93S0I93 +BASPROGRAMEND: + sleep + rjmp BASPROGRAMEND + +;******************************************************************************** + +Delay_10US: +D10US_START: + ldi DELAYTEMP,52 +DelayUS1: + dec DELAYTEMP + brne DelayUS1 + nop + dec SysWaitTemp10US + brne D10US_START + ret + +;******************************************************************************** + +Delay_MS: + inc SysWaitTempMS_H +DMS_START: + ldi DELAYTEMP2,254 +DMS_OUTER: + ldi DELAYTEMP,20 +DMS_INNER: + dec DELAYTEMP + brne DMS_INNER + dec DELAYTEMP2 + brne DMS_OUTER + dec SysWaitTempMS + brne DMS_START + dec SysWaitTempMS_H + brne DMS_START + ret + +;******************************************************************************** + +INITSYS: +;Source:F12L431S0I388 + ldi SysValueCopy,0 + out PORTB,SysValueCopy +;Source:F12L434S0I391 + ldi SysValueCopy,0 + out PORTC,SysValueCopy +;Source:F12L437S0I394 + ldi SysValueCopy,0 + out PORTD,SysValueCopy + ret + +;******************************************************************************** + +FN_READAD: +;Source:F2L569S0I3 +;Source:F2L486S0I379 + lds SysValueCopy,ADREADPORT + sts ADMUX,SysValueCopy +;Source:F2L504S0I397 +;Source:F2L505S0I398 + sbr SysValueCopy,1< 225 then + count = 225 + end if + pulseout PORTB.0 ,count 10us + wait 20 ms + + goto main diff --git a/resources/examples/Arduino/servo-gcb/servo.html b/resources/examples/Arduino/servo-gcb/servo.html new file mode 100644 index 0000000..c1c2652 --- /dev/null +++ b/resources/examples/Arduino/servo-gcb/servo.html @@ -0,0 +1,26 @@ + + + +Compilation Report + + +

Compilation Report

+

Compiler Version (DD/MM/YYYY): 0.94 2015-08-05

+

Chip resource usage:

+

Chip Model: MEGA328P

+

Program Memory: 112/32768 words (.34%)

+

RAM: 3/2048 bytes (.15%)

+

RAM Allocation

+ +
+

Subroutines

+ + + + + + + +
NameCode Size (lines)Compiled Size (words)Outgoing calls
Main1243Delay_MS(1), Delay_10US(1), READAD(1), INITSYS(1)
READAD1243Delay_MS(1), Delay_10US(1)
INITSYS3627
Delay_10US07
Delay_MS012
+ + diff --git a/resources/examples/Arduino/servo-gcb/servo.lst b/resources/examples/Arduino/servo-gcb/servo.lst new file mode 100644 index 0000000..d2a062c --- /dev/null +++ b/resources/examples/Arduino/servo-gcb/servo.lst @@ -0,0 +1,858 @@ +GCASM List File (GCBASIC 0.94 2015-08-05) + +Symbols: +-X EQU 30 +-Y EQU 26 +-Z EQU 18 +ACBG EQU 6 +ACD EQU 7 +ACI EQU 4 +ACIC EQU 2 +ACIE EQU 3 +ACIS0 EQU 0 +ACIS1 EQU 1 +ACME EQU 6 +ACO EQU 5 +ACSR EQU 48 +ADATE EQU 5 +ADC0D EQU 0 +ADC1D EQU 1 +ADC2D EQU 2 +ADC3D EQU 3 +ADC4D EQU 4 +ADC5D EQU 5 +ADCH EQU 121 +ADCH0 EQU 0 +ADCH1 EQU 1 +ADCH2 EQU 2 +ADCH3 EQU 3 +ADCH4 EQU 4 +ADCH5 EQU 5 +ADCH6 EQU 6 +ADCH7 EQU 7 +ADCL EQU 120 +ADCL0 EQU 0 +ADCL1 EQU 1 +ADCL2 EQU 2 +ADCL3 EQU 3 +ADCL4 EQU 4 +ADCL5 EQU 5 +ADCL6 EQU 6 +ADCL7 EQU 7 +ADCSRA EQU 122 +ADCSRB EQU 123 +ADEN EQU 7 +ADIE EQU 3 +ADIF EQU 4 +ADLAR EQU 5 +ADMUX EQU 124 +ADPS0 EQU 0 +ADPS1 EQU 1 +ADPS2 EQU 2 +ADREADPORT EQU 256 +ADSC EQU 6 +ADTS0 EQU 0 +ADTS1 EQU 1 +ADTS2 EQU 2 +AIN0D EQU 0 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DEC SYSWAITTEMPMS_H +00006D F7B1 BRNE DMS_START +00006E 9508 RET + + + INITSYS +00006F E050 LDI SYSVALUECOPY,0 +000070 B955 OUT PORTB,SYSVALUECOPY +000071 E050 LDI SYSVALUECOPY,0 +000072 B958 OUT PORTC,SYSVALUECOPY +000073 E050 LDI SYSVALUECOPY,0 +000074 B95B OUT PORTD,SYSVALUECOPY +000075 9508 RET + + + FN_READAD +000076 9150 0100 LDS SYSVALUECOPY,ADREADPORT +000078 9350 007C STS ADMUX,SYSVALUECOPY +00007A 6250 SBR SYSVALUECOPY,1< + +Node-4: + + +Arduino Uno-3: + + +Servo-2: + + +Potentiometer-1: + + +Connector-5: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-12: + + +Connector-13: + + +Connector-15: + + +PlotterWidget-17: + + +SerialPortWidget-18: + + + diff --git a/resources/examples/Arduino/servo-sweep/Sweep-ino/Sweep.ino b/resources/examples/Arduino/servo-sweep/Sweep-ino/Sweep.ino new file mode 100644 index 0000000..11f227e --- /dev/null +++ b/resources/examples/Arduino/servo-sweep/Sweep-ino/Sweep.ino @@ -0,0 +1,32 @@ +/* Sweep + by BARRAGAN + This example code is in the public domain. + + modified 8 Nov 2013 + by Scott Fitzgerald + http://www.arduino.cc/en/Tutorial/Sweep +*/ + +#include + +Servo myservo; // create servo object to control a servo +// twelve servo objects can be created on most boards + +int pos = 0; // variable to store the servo position + +void setup() { + myservo.attach( 9, 1000, 2000 ); // attaches the servo on pin 9 to the servo object +} + +void loop() { + for (pos = 0; pos <= 180; pos += 1) { // goes from 0 degrees to 180 degrees + // in steps of 1 degree + myservo.write(pos); // tell servo to go to position in variable 'pos' + delay(15); // waits 15ms for the servo to reach the position + } + for (pos = 180; pos >= 0; pos -= 1) { // goes from 180 degrees to 0 degrees + myservo.write(pos); // tell servo to go to position in variable 'pos' + delay(15); // waits 15ms for the servo to reach the position + } +} + diff --git a/resources/examples/Arduino/servo-sweep/sweep.simu b/resources/examples/Arduino/servo-sweep/sweep.simu new file mode 100644 index 0000000..0a7b115 --- /dev/null +++ b/resources/examples/Arduino/servo-sweep/sweep.simu @@ -0,0 +1,24 @@ + + +Servo-2: + + +Arduino Uno-1: + + +Connector-3: + + +Connector-5: + + +Connector-7: + + +PlotterWidget-17: + + +SerialPortWidget-18: + + + diff --git a/resources/examples/Arduino/sofware_i2c_lcd/i2c_lcd-arduino.simu b/resources/examples/Arduino/sofware_i2c_lcd/i2c_lcd-arduino.simu new file mode 100644 index 0000000..b76abf3 --- /dev/null +++ b/resources/examples/Arduino/sofware_i2c_lcd/i2c_lcd-arduino.simu @@ -0,0 +1,45 @@ + + +Hd44780-3: + + +Arduino Uno-2: + + +I2C to Parallel-1: + + +Connector-4: + + +Connector-6: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +PlotterWidget-22: + + +SerialPortWidget-23: + + + diff --git a/resources/examples/Arduino/sofware_i2c_lcd/i2c_lcd-arduino/i2c_lcd-arduino.ino b/resources/examples/Arduino/sofware_i2c_lcd/i2c_lcd-arduino/i2c_lcd-arduino.ino new file mode 100644 index 0000000..7f85887 --- /dev/null +++ b/resources/examples/Arduino/sofware_i2c_lcd/i2c_lcd-arduino/i2c_lcd-arduino.ino @@ -0,0 +1,24 @@ +#include + +uint8_t address = 80; +uint8_t sda = 4; +uint8_t scl = 3; + +Soft_Lcd_I2C i2cLcd( address, 16, 2, sda, scl ); + +void setup() +{ + pinMode( 13, OUTPUT ); + i2cLcd.init(); + + i2cLcd.printstr("Hello, world!"); +} + +void loop() +{ + i2cLcd.scrollDisplayLeft(); + delay( 100 ); +} + + + diff --git a/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/.gitattributes b/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/.gitattributes new file mode 100644 index 0000000..412eeda --- /dev/null +++ b/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/.gitattributes @@ -0,0 +1,22 @@ +# Auto detect text files and perform LF normalization +* text=auto + +# Custom for Visual Studio +*.cs diff=csharp +*.sln merge=union +*.csproj merge=union +*.vbproj merge=union +*.fsproj merge=union +*.dbproj merge=union + +# Standard to msysgit +*.doc diff=astextplain +*.DOC diff=astextplain +*.docx diff=astextplain +*.DOCX diff=astextplain +*.dot diff=astextplain +*.DOT diff=astextplain +*.pdf diff=astextplain +*.PDF diff=astextplain +*.rtf diff=astextplain +*.RTF diff=astextplain diff --git a/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/.gitignore b/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/.gitignore new file mode 100644 index 0000000..b9d6bd9 --- /dev/null +++ b/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/.gitignore @@ -0,0 +1,215 @@ +################# +## Eclipse +################# + +*.pydevproject +.project +.metadata +bin/ +tmp/ +*.tmp +*.bak +*.swp +*~.nib +local.properties +.classpath +.settings/ +.loadpath + +# External tool builders +.externalToolBuilders/ + +# Locally stored "Eclipse launch configurations" +*.launch + +# CDT-specific +.cproject + +# PDT-specific +.buildpath + + +################# +## Visual Studio +################# + +## Ignore Visual Studio temporary files, build results, and +## files generated by popular Visual Studio add-ons. + +# User-specific files +*.suo +*.user +*.sln.docstates + +# Build results + +[Dd]ebug/ +[Rr]elease/ +x64/ +build/ +[Bb]in/ +[Oo]bj/ + +# MSTest test Results +[Tt]est[Rr]esult*/ +[Bb]uild[Ll]og.* + +*_i.c +*_p.c +*.ilk +*.meta +*.obj +*.pch +*.pdb +*.pgc +*.pgd +*.rsp +*.sbr +*.tlb +*.tli +*.tlh +*.tmp +*.tmp_proj +*.log +*.vspscc +*.vssscc +.builds +*.pidb +*.log +*.scc + +# Visual C++ cache files +ipch/ +*.aps +*.ncb +*.opensdf +*.sdf +*.cachefile + +# Visual Studio profiler +*.psess +*.vsp +*.vspx + +# Guidance Automation Toolkit +*.gpState + +# ReSharper is a .NET coding add-in +_ReSharper*/ +*.[Rr]e[Ss]harper + +# TeamCity is a build add-in +_TeamCity* + +# DotCover is a Code Coverage Tool +*.dotCover + +# NCrunch +*.ncrunch* +.*crunch*.local.xml + +# Installshield output folder +[Ee]xpress/ + +# DocProject is a documentation generator add-in +DocProject/buildhelp/ +DocProject/Help/*.HxT +DocProject/Help/*.HxC +DocProject/Help/*.hhc +DocProject/Help/*.hhk +DocProject/Help/*.hhp +DocProject/Help/Html2 +DocProject/Help/html + +# Click-Once directory +publish/ + +# Publish Web Output +*.Publish.xml +*.pubxml + +# NuGet Packages Directory +## TODO: If you have NuGet Package Restore enabled, uncomment the next line +#packages/ + +# Windows Azure Build Output +csx +*.build.csdef + +# Windows Store app package directory +AppPackages/ + +# Others +sql/ +*.Cache +ClientBin/ +[Ss]tyle[Cc]op.* +~$* +*~ +*.dbmdl +*.[Pp]ublish.xml +*.pfx +*.publishsettings + +# RIA/Silverlight projects +Generated_Code/ + +# Backup & report files from converting an old project file to a newer +# Visual Studio version. Backup files are not needed, because we have git ;-) +_UpgradeReport_Files/ +Backup*/ +UpgradeLog*.XML +UpgradeLog*.htm + +# SQL Server files +App_Data/*.mdf +App_Data/*.ldf + +############# +## Windows detritus +############# + +# Windows image file caches +Thumbs.db +ehthumbs.db + +# Folder config file +Desktop.ini + +# Recycle Bin used on file shares +$RECYCLE.BIN/ + +# Mac crap +.DS_Store + + +############# +## Python +############# + +*.py[co] + +# Packages +*.egg +*.egg-info +dist/ +build/ +eggs/ +parts/ +var/ +sdist/ +develop-eggs/ +.installed.cfg + +# Installer logs +pip-log.txt + +# Unit test / coverage reports +.coverage +.tox + +#Translations +*.mo + +#Mr Developer +.mr.developer.cfg diff --git a/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/Soft_LCD-I2C.cpp b/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/Soft_LCD-I2C.cpp new file mode 100644 index 0000000..ff2f584 --- /dev/null +++ b/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/Soft_LCD-I2C.cpp @@ -0,0 +1,355 @@ +//www.DFRobot.com +//last updated on 21/12/2011 +//Tim Starling Fix the reset bug (Thanks Tim) +//wiki doc http://www.dfrobot.com/wiki/index.php?title=I2C/TWI_LCD1602_Module_(SKU:_DFR0063) +//Support Forum: http://www.dfrobot.com/forum/ +//Compatible with the Arduino IDE 1.0 +//Library version:1.1 + + +#include "Soft_LCD-I2C.h" +#include +#include "Arduino.h" + +#define printIIC(args) i2c.write(args) + +/* !!!--- +inline size_t LiquidCrystal_I2C::write(uint8_t value) +{ + send(value, Rs); + return 0; +} +*/ + +inline size_t Soft_Lcd_I2C::write(uint8_t value) //!!! Soft_Lcd_I2C - not LiquidCrystal_I2C !!! +{ + send(value, Rs); + return 0; +} + +// When the display powers up, it is configured as follows: +// +// 1. Display clear +// 2. Function set: +// DL = 1; 8-bit interface data +// N = 0; 1-line display +// F = 0; 5x8 dot character font +// 3. Display on/off control: +// D = 0; Display off +// C = 0; Cursor off +// B = 0; Blinking off +// 4. Entry mode set: +// I/D = 1; Increment by 1 +// S = 0; No shift +// +// Note, however, that resetting the Arduino doesn't reset the LCD, so we +// can't assume that its in that state when a sketch starts (and the +// LiquidCrystal constructor is called). + +Soft_Lcd_I2C::Soft_Lcd_I2C( uint8_t lcd_Addr,uint8_t lcd_cols,uint8_t lcd_rows, int Sda, int Scl ) +{ + _Addr = lcd_Addr; + _cols = lcd_cols; + _rows = lcd_rows; + _backlightval = LCD_NOBACKLIGHT; + i2c.begin(Sda,Scl); //!!!! add + +} + +void Soft_Lcd_I2C::init() +{ + init_priv(); +} + +void Soft_Lcd_I2C::init_priv() +{ + //Wire.begin(); + _displayfunction = LCD_4BITMODE | LCD_1LINE | LCD_5x8DOTS; + begin(_cols, _rows); +} + +void Soft_Lcd_I2C::begin(uint8_t cols, uint8_t lines, uint8_t dotsize) +{ + if (lines > 1) _displayfunction |= LCD_2LINE; + + _numlines = lines; + + // for some 1 line displays you can select a 10 pixel high font + if ((dotsize != 0) && (lines == 1)) _displayfunction |= LCD_5x10DOTS; + + + // SEE PAGE 45/46 FOR INITIALIZATION SPECIFICATION! + // according to datasheet, we need at least 40ms after power rises above 2.7V + // before sending commands. Arduino can turn on way befer 4.5V so we'll wait 50 + delay(50); + + // Now we pull both RS and R/W low to begin commands + expanderWrite(_backlightval); // reset expanderand turn backlight off (Bit 8 =1) + delay(1000); + + //put the LCD into 4 bit mode + // this is according to the hitachi HD44780 datasheet + // figure 24, pg 46 + + // we start in 8bit mode, try to set 4 bit mode + write4bits(0x03 << 4); + delayMicroseconds(4500); // wait min 4.1ms + + // second try + write4bits(0x03 << 4); + delayMicroseconds(4500); // wait min 4.1ms + + // third go! + write4bits(0x03 << 4); + delayMicroseconds(150); + + // finally, set to 4-bit interface + write4bits(0x02 << 4); + + + // set # lines, font size, etc. + command(LCD_FUNCTIONSET | _displayfunction); + + // turn the display on with no cursor or blinking default + _displaycontrol = LCD_DISPLAYON | LCD_CURSOROFF | LCD_BLINKOFF; + display(); + + // clear it off + clear(); + + // Initialize to default text direction (for roman languages) + _displaymode = LCD_ENTRYLEFT | LCD_ENTRYSHIFTDECREMENT; + + // set the entry mode + command(LCD_ENTRYMODESET | _displaymode); + + home(); + +} + +/********** high level commands, for the user! */ +void Soft_Lcd_I2C::clear() +{ + command(LCD_CLEARDISPLAY);// clear display, set cursor position to zero + delayMicroseconds(2000); // this command takes a long time! +} + +void Soft_Lcd_I2C::home() +{ + command(LCD_RETURNHOME); // set cursor position to zero + delayMicroseconds(2000); // this command takes a long time! +} + +void Soft_Lcd_I2C::setCursor(uint8_t col, uint8_t row) +{ + int row_offsets[] = { 0x00, 0x40, 0x14, 0x54 }; + if ( row > _numlines ) row = _numlines-1; // we count rows starting w/0 + + command(LCD_SETDDRAMADDR | (col + row_offsets[row])); +} + +// Turn the display on/off (quickly) +void Soft_Lcd_I2C::noDisplay() { + _displaycontrol &= ~LCD_DISPLAYON; + command(LCD_DISPLAYCONTROL | _displaycontrol); +} +void Soft_Lcd_I2C::display() +{ + _displaycontrol |= LCD_DISPLAYON; + command(LCD_DISPLAYCONTROL | _displaycontrol); +} + +// Turns the underline cursor on/off +void Soft_Lcd_I2C::noCursor() +{ + _displaycontrol &= ~LCD_CURSORON; + command(LCD_DISPLAYCONTROL | _displaycontrol); +} +void Soft_Lcd_I2C::cursor() +{ + _displaycontrol |= LCD_CURSORON; + command(LCD_DISPLAYCONTROL | _displaycontrol); +} + +// Turn on and off the blinking cursor +void Soft_Lcd_I2C::noBlink() +{ + _displaycontrol &= ~LCD_BLINKON; + command(LCD_DISPLAYCONTROL | _displaycontrol); +} +void Soft_Lcd_I2C::blink() +{ + _displaycontrol |= LCD_BLINKON; + command(LCD_DISPLAYCONTROL | _displaycontrol); +} + +// These commands scroll the display without changing the RAM +void Soft_Lcd_I2C::scrollDisplayLeft(void) +{ + command(LCD_CURSORSHIFT | LCD_DISPLAYMOVE | LCD_MOVELEFT); +} +void Soft_Lcd_I2C::scrollDisplayRight(void) +{ + command(LCD_CURSORSHIFT | LCD_DISPLAYMOVE | LCD_MOVERIGHT); +} + +// This is for text that flows Left to Right +void Soft_Lcd_I2C::leftToRight(void) +{ + _displaymode |= LCD_ENTRYLEFT; + command(LCD_ENTRYMODESET | _displaymode); +} + +// This is for text that flows Right to Left +void Soft_Lcd_I2C::rightToLeft(void) +{ + _displaymode &= ~LCD_ENTRYLEFT; + command(LCD_ENTRYMODESET | _displaymode); +} + +// This will 'right justify' text from the cursor +void Soft_Lcd_I2C::autoscroll(void) +{ + _displaymode |= LCD_ENTRYSHIFTINCREMENT; + command(LCD_ENTRYMODESET | _displaymode); +} + +// This will 'left justify' text from the cursor +void Soft_Lcd_I2C::noAutoscroll(void) +{ + _displaymode &= ~LCD_ENTRYSHIFTINCREMENT; + command(LCD_ENTRYMODESET | _displaymode); +} + +// Allows us to fill the first 8 CGRAM locations +// with custom characters +void Soft_Lcd_I2C::createChar(uint8_t location, uint8_t charmap[]) +{ + location &= 0x7; // we only have 8 locations 0-7 + command(LCD_SETCGRAMADDR | (location << 3)); + for (int i=0; i<8; i++) write(charmap[i]); +} + +// Turn the (optional) backlight off/on +void Soft_Lcd_I2C::noBacklight(void) +{ + _backlightval=LCD_NOBACKLIGHT; + expanderWrite(0); +} + +void Soft_Lcd_I2C::backlight(void) +{ + _backlightval=LCD_BACKLIGHT; + expanderWrite(0); +} + + + +/*********** mid level commands, for sending data/cmds */ + +inline void Soft_Lcd_I2C::command( uint8_t value ) +{ + send(value, 0); +} + + +/************ low level data pushing commands **********/ + +// write either command or data +void Soft_Lcd_I2C::send(uint8_t value, uint8_t mode) +{ + uint8_t highnib=value&0xf0; + uint8_t lownib=(value<<4)&0xf0; + write4bits((highnib)|mode); + write4bits((lownib)|mode); +} + +void Soft_Lcd_I2C::write4bits(uint8_t value) +{ + expanderWrite(value); + pulseEnable(value); +} + +void Soft_Lcd_I2C::expanderWrite(uint8_t _data) +{ + i2c.beginTransmission(_Addr); + printIIC((int)(_data) | _backlightval); + i2c.endTransmission(); +} + +void Soft_Lcd_I2C::pulseEnable(uint8_t _data) +{ + expanderWrite(_data | En); // En high + delayMicroseconds(1); // enable pulse must be >450ns + + expanderWrite(_data & ~En); // En low + delayMicroseconds(50); // commands need > 37us to settle +} + + +// Alias functions + +void Soft_Lcd_I2C::cursor_on() +{ + cursor(); +} + +void Soft_Lcd_I2C::cursor_off() +{ + noCursor(); +} + +void Soft_Lcd_I2C::blink_on() +{ + blink(); +} + +void Soft_Lcd_I2C::blink_off() +{ + noBlink(); +} + +void Soft_Lcd_I2C::load_custom_character(uint8_t char_num, uint8_t *rows) +{ + createChar(char_num, rows); +} + +void Soft_Lcd_I2C::setBacklight(uint8_t new_val) +{ + if(new_val) backlight(); // turn backlight on + else noBacklight(); // turn backlight off +} + +void Soft_Lcd_I2C::printstr(const char c[]) +{ + //This function is not identical to the function used for "real" I2C displays + //it's here so the user sketch doesn't have to be changed + + //print((c); // WAS: print(c) - Only ONE character printed . + + char *p = c; + char *pn = p + strlen(c); + + while( p < pn ) + { + print(*(p++)); + + } + + +} + +void Soft_Lcd_I2C::printbytes(const char c[], uint16_t n_bytes) +{ + + char *p = c; + char *pn = p + n_bytes; + + while( p < pn ) + { + print(*(p++)); + + } + +} + diff --git a/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/Soft_LCD-I2C.h b/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/Soft_LCD-I2C.h new file mode 100644 index 0000000..66263e0 --- /dev/null +++ b/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/Soft_LCD-I2C.h @@ -0,0 +1,134 @@ +//DFRobot.com +#ifndef Soft_Lcd_I2C_h +#define Soft_Lcd_I2C_h + +#include "softI2C.h" +#include +#include "Print.h" +//#include + +// commands +#define LCD_CLEARDISPLAY 0x01 +#define LCD_RETURNHOME 0x02 +#define LCD_ENTRYMODESET 0x04 +#define LCD_DISPLAYCONTROL 0x08 +#define LCD_CURSORSHIFT 0x10 +#define LCD_FUNCTIONSET 0x20 +#define LCD_SETCGRAMADDR 0x40 +#define LCD_SETDDRAMADDR 0x80 + +// flags for display entry mode +#define LCD_ENTRYRIGHT 0x00 +#define LCD_ENTRYLEFT 0x02 +#define LCD_ENTRYSHIFTINCREMENT 0x01 +#define LCD_ENTRYSHIFTDECREMENT 0x00 + +// flags for display on/off control +#define LCD_DISPLAYON 0x04 +#define LCD_DISPLAYOFF 0x00 +#define LCD_CURSORON 0x02 +#define LCD_CURSOROFF 0x00 +#define LCD_BLINKON 0x01 +#define LCD_BLINKOFF 0x00 + +// flags for display/cursor shift +#define LCD_DISPLAYMOVE 0x08 +#define LCD_CURSORMOVE 0x00 +#define LCD_MOVERIGHT 0x04 +#define LCD_MOVELEFT 0x00 + +// flags for function set +#define LCD_8BITMODE 0x10 +#define LCD_4BITMODE 0x00 +#define LCD_2LINE 0x08 +#define LCD_1LINE 0x00 +#define LCD_5x10DOTS 0x04 +#define LCD_5x8DOTS 0x00 + +// flags for backlight control +#define LCD_BACKLIGHT 0x08 +#define LCD_NOBACKLIGHT 0x00 + +#define En B00000100 // Enable bit +#define Rw B00000010 // Read/Write bit +#define Rs B00000001 // Register select bit + +class Soft_Lcd_I2C : public Print { +public: + Soft_Lcd_I2C(uint8_t lcd_Addr, uint8_t lcd_cols, uint8_t lcd_rows, int Sda, int Scl); + //Soft_Lcd_I2C(uint8_t lcd_Addr, uint8_t lcd_cols, uint8_t lcd_rows, int Sda, int Scl); + void begin(uint8_t cols, uint8_t rows, uint8_t charsize = LCD_5x8DOTS ); + void clear(); + void home(); + void noDisplay(); + void display(); + void noBlink(); + void blink(); + void noCursor(); + void cursor(); + void scrollDisplayLeft(); + void scrollDisplayRight(); + void printLeft(); + void printRight(); + void leftToRight(); + void rightToLeft(); + void shiftIncrement(); + void shiftDecrement(); + void noBacklight(); + void backlight(); + void autoscroll(); + void noAutoscroll(); + void createChar(uint8_t, uint8_t[]); + void setCursor(uint8_t, uint8_t); +#if defined(ARDUINO) && ARDUINO >= 100 + virtual size_t write(uint8_t); +#else + virtual void write(uint8_t); +#endif + void command(uint8_t); + void init(); + +////compatibility API function aliases +void blink_on(); // alias for blink() +void blink_off(); // alias for noBlink() +void cursor_on(); // alias for cursor() +void cursor_off(); // alias for noCursor() +void setBacklight(uint8_t new_val); // alias for backlight() and nobacklight() +void load_custom_character(uint8_t char_num, uint8_t *rows); // alias for createChar() +void printstr(const char[]); + +//!! addd +void printbytes(const char c[], uint16_t n_bytes); + + +////Unsupported API functions (not implemented in this library) +uint8_t status(); +void setContrast(uint8_t new_val); +uint8_t keypad(); +void setDelay(int,int); +void on(); +void off(); +uint8_t init_bargraph(uint8_t graphtype); +void draw_horizontal_graph(uint8_t row, uint8_t column, uint8_t len, uint8_t pixel_col_end); +void draw_vertical_graph(uint8_t row, uint8_t column, uint8_t len, uint8_t pixel_col_end); + + +private: + void init_priv(); + void send(uint8_t, uint8_t); + void write4bits(uint8_t); + void expanderWrite(uint8_t); + void pulseEnable(uint8_t); + uint8_t _Addr; + uint8_t _displayfunction; + uint8_t _displaycontrol; + uint8_t _displaymode; + uint8_t _numlines; + uint8_t _cols; + uint8_t _rows; + uint8_t _backlightval; + + SoftI2C i2c; +}; + +#endif diff --git a/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/softI2C.cpp b/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/softI2C.cpp new file mode 100644 index 0000000..8baaafc --- /dev/null +++ b/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/softI2C.cpp @@ -0,0 +1,175 @@ +/* + SoftwareI2C.cpp + 2012 Copyright (c) Seeed Technology Inc. All right reserved. + + Author:Loovee + Author:Loovee + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#include + +#include "softI2C.h" + +void SoftI2C::begin( int Sda, int Scl ) +{ + pinSda = Sda; + pinScl = Scl; + + pinMode(pinScl, OUTPUT); + pinMode(pinSda, OUTPUT); + sda_in_out = OUTPUT; + digitalWrite(pinScl, HIGH); + digitalWrite(pinSda, HIGH); +} + +void SoftI2C::sdaSet(uchar ucDta) +{ + if(sda_in_out != OUTPUT) + { + sda_in_out = OUTPUT; + pinMode(pinSda, OUTPUT); + } + digitalWrite(pinSda, ucDta); +} + +void SoftI2C::sclSet(uchar ucDta) +{ + digitalWrite(pinScl, ucDta); +} + +uchar SoftI2C::getAck(void) +{ + sclSet(LOW); + pinMode(pinSda, INPUT); + sda_in_out = INPUT; + + sclSet(HIGH); + unsigned long timer_t = micros(); + while(1) + { + if(!digitalRead(pinSda)) return GETACK; + + if(micros() - timer_t > 100)return GETNAK; + } +} + +void SoftI2C::sendStart( void ) +{ + sdaSet(LOW); +} + +void SoftI2C::sendStop( void ) +{ + sclSet(LOW); + sdaSet(LOW); + sclSet(HIGH); + sdaSet(HIGH); +} + +void SoftI2C::sendByte( uchar ucDta ) +{ + for( int i=0; i<8; i++ ) + { + sclSet(LOW); + sdaSet((ucDta&0x80)!=0); + ucDta <<= 0; + sclSet(HIGH); + sdaSet((ucDta&0x80)!=0); + ucDta <<= 1; + } +} + +uchar SoftI2C::sendByteAck(uchar ucDta) +{ + sendByte(ucDta); + return getAck(); +} + +uchar SoftI2C::beginTransmission(uchar addr) +{ + sendStart(); // start signal + uchar ret = sendByteAck(addr<<1); // send write address and get ack + //sclSet(LOW); + return ret; +} + +uchar SoftI2C::endTransmission() +{ + sendStop(); + return 0; +} + +uchar SoftI2C::write(uchar dta) +{ + return sendByteAck(dta); +} + +uchar SoftI2C::write(uchar len, uchar *dta) +{ + for( int i=0; i0) // send ACK + { + sclSet(LOW); // sclSet(HIGH) + sdaSet(LOW); // sdaSet(LOW) + sclSet(HIGH); // sclSet(LOW) + sclSet(LOW); + } + else // send NAK + { + sclSet(LOW); // sclSet(HIGH) + sdaSet(HIGH); // sdaSet(LOW) + sclSet(HIGH); // sclSet(LOW) + sclSet(LOW); + sendStop(); + } + return dta; +} diff --git a/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/softI2C.h b/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/softI2C.h new file mode 100644 index 0000000..1d5c4bf --- /dev/null +++ b/resources/examples/Arduino/sofware_i2c_lcd/libraries/Soft_LCD-I2C/softI2C.h @@ -0,0 +1,81 @@ +/* + SoftwareI2C.h + 2012 Copyright (c) Seeed Technology Inc. All right reserved. + + Author:Loovee + 2013-11-1 + + This is a Software I2C Library, can act as I2c master mode. + + + This library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + This library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with this library; if not, write to the Free Software + Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#ifndef _SOFTWAREI2C_H_ +#define _SOFTWAREI2C_H_ + +#define GETACK 1 // get ack +#define GETNAK 0 // get nak + +#ifndef HIGH +#define HIGH 1 +#endif +#ifndef LOW +#define LOW 0 +#endif + +#ifndef uchar +#define uchar unsigned char +#endif + +class SoftI2C +{ +private: + + int pinSda; + int pinScl; + + int recv_len; + int sda_in_out; + +public: + + inline void sdaSet(uchar ucDta); + inline void sclSet(uchar ucDta); + + inline void sendStart(void); + inline void sendStop(void); + inline uchar getAck(void); + inline void sendByte(uchar ucDta); + inline uchar sendByteAck(uchar ucDta); // send byte and get ack + + + + //SoftI2C(); + void begin(int Sda, int Scl); + uchar beginTransmission(uchar addr); + uchar endTransmission(); + + uchar write(uchar dta); + uchar write(uchar len, uchar *dta); + uchar requestFrom(uchar addr, uchar len); + uchar read(); + uchar available(){return recv_len;} +}; + +#endif +/********************************************************************************************************* + END FILE +*********************************************************************************************************/ diff --git a/resources/examples/Arduino/sofware_i2c_lcd/readme.txt b/resources/examples/Arduino/sofware_i2c_lcd/readme.txt new file mode 100644 index 0000000..6697023 --- /dev/null +++ b/resources/examples/Arduino/sofware_i2c_lcd/readme.txt @@ -0,0 +1,4 @@ + +Install "Soft_LCD-I2C" library before running this example. + +"Soft_LCD-I2C" library is in libraries folder. diff --git a/resources/examples/Arduino/steeper/stepper_speedControl.simu b/resources/examples/Arduino/steeper/stepper_speedControl.simu new file mode 100644 index 0000000..b80512c --- /dev/null +++ b/resources/examples/Arduino/steeper/stepper_speedControl.simu @@ -0,0 +1,42 @@ + + +Potentiometer-3: + + +Arduino Uno-2: + + +Stepper-1: + + +Connector-4: + + +Connector-6: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +PlotterWidget-22: + + +SerialPortWidget-23: + + + diff --git a/resources/examples/Avr/7Seg_Counter_mega328p/7Seg_Counter_mega328p.asm b/resources/examples/Avr/7Seg_Counter_mega328p/7Seg_Counter_mega328p.asm new file mode 100644 index 0000000..c6caf4f --- /dev/null +++ b/resources/examples/Avr/7Seg_Counter_mega328p/7Seg_Counter_mega328p.asm @@ -0,0 +1,263 @@ +;Program compiled by Great Cow BASIC (0.95 2016-01-24) +;Need help? See the GCBASIC forums at http://sourceforge.net/projects/gcbasic/forums, +;check the documentation or email w_cholmondeley at users dot sourceforge dot net. + +;******************************************************************************** + +;Chip Model: MEGA328P +;Assembler header file +.INCLUDE "m328pdef.inc" + +;SREG bit names (for AVR Assembler compatibility, GCBASIC uses different names) +#define I 7 +#define T 6 +#define H 5 +#define S 4 +#define V 3 +#define N 2 +#define Z 1 +#define C 0 + +;******************************************************************************** + +;Set aside memory locations for variables +.EQU DISPCHAR=256 +.EQU DISPPORT=257 +.EQU DISPTEMP=258 +.EQU TEMP=259 + +;******************************************************************************** + +;Register variables +.DEF DELAYTEMP=r25 +.DEF DELAYTEMP2=r26 +.DEF SysBitTest=r5 +.DEF SysByteTempX=r0 +.DEF SysCalcTempA=r22 +.DEF SysCalcTempB=r28 +.DEF SysReadA=r30 +.DEF SysReadA_H=r31 +.DEF SysStringA=r26 +.DEF SysValueCopy=r21 +.DEF SysWaitTempMS=r29 +.DEF SysWaitTempMS_H=r30 +.DEF SysTemp1=r1 + +;******************************************************************************** + +;Vectors +;Interrupt vectors +.ORG 0 + rjmp BASPROGRAMSTART ;Reset +.ORG 2 + reti ;INT0 +.ORG 4 + reti ;INT1 +.ORG 6 + reti ;PCINT0 +.ORG 8 + reti ;PCINT1 +.ORG 10 + reti ;PCINT2 +.ORG 12 + reti ;WDT +.ORG 14 + reti ;TIMER2_COMPA +.ORG 16 + reti ;TIMER2_COMPB +.ORG 18 + reti ;TIMER2_OVF +.ORG 20 + reti ;TIMER1_CAPT +.ORG 22 + reti ;TIMER1_COMPA +.ORG 24 + reti ;TIMER1_COMPB +.ORG 26 + reti ;TIMER1_OVF +.ORG 28 + reti ;TIMER0_COMPA +.ORG 30 + reti ;TIMER0_COMPB +.ORG 32 + reti ;TIMER0_OVF +.ORG 34 + reti ;SPI_STC +.ORG 36 + reti ;USART_RX +.ORG 38 + reti ;USART_UDRE +.ORG 40 + reti ;USART_TX +.ORG 42 + reti ;ADC +.ORG 44 + reti ;EE_READY +.ORG 46 + reti ;ANALOG_COMP +.ORG 48 + reti ;TWI +.ORG 50 + reti ;SPM_READY + +;******************************************************************************** + +;Start of program memory page 0 +.ORG 52 +BASPROGRAMSTART: +;Initialise stack + ldi SysValueCopy,high(RAMEND) + out SPH, SysValueCopy + ldi SysValueCopy,low(RAMEND) + out SPL, SysValueCopy +;Call initialisation routines + rcall INITSYS + rcall INITSEVENSEG + +;Start of the main program + ldi SysValueCopy,255 + out DDRB,SysValueCopy + sbi DDRD,1 + ldi SysValueCopy,0 + sts TEMP,SysValueCopy +MAIN: + ldi SysValueCopy,1 + sts DISPPORT,SysValueCopy + lds SysValueCopy,TEMP + sts DISPCHAR,SysValueCopy + rcall DISPLAYVALUE + ldi SysWaitTempMS,250 + ldi SysWaitTempMS_H,0 + rcall Delay_MS + ldi SysWaitTempMS,250 + ldi SysWaitTempMS_H,0 + rcall Delay_MS + lds SysTemp1,TEMP + inc SysTemp1 + sts TEMP,SysTemp1 + ldi SysCalcTempA,9 + lds SysCalcTempB,TEMP + cp SysCalcTempA,SysCalcTempB + brsh ENDIF1 + ldi SysWaitTempMS,250 + ldi SysWaitTempMS_H,0 + rcall Delay_MS + ldi SysWaitTempMS,250 + ldi SysWaitTempMS_H,0 + rcall Delay_MS + ldi SysValueCopy,0 + sts TEMP,SysValueCopy +ENDIF1: + rjmp MAIN + rjmp BASPROGRAMEND +BASPROGRAMEND: + sleep + rjmp BASPROGRAMEND + +;******************************************************************************** + +DISPLAYVALUE: + lds SysTemp1,DISPCHAR + inc SysTemp1 + mov SYSSTRINGA,SysTemp1 + rcall SEVENSEGDISPDIGIT + sts DISPTEMP,SysByteTempX + cbi PORTB,0 + cbi PORTB,1 + cbi PORTB,2 + cbi PORTB,3 + cbi PORTB,4 + cbi PORTB,5 + cbi PORTB,6 + cbi PORTD,1 + lds SysCalcTempA,DISPPORT + cpi SysCalcTempA,1 + brne ENDIF2 + sbi PORTD,1 +ENDIF2: + lds SysBitTest,DISPTEMP + sbrc SysBitTest,0 + sbi PORTB,0 + lds SysBitTest,DISPTEMP + sbrc SysBitTest,1 + sbi PORTB,1 + lds SysBitTest,DISPTEMP + sbrc SysBitTest,2 + sbi PORTB,2 + lds SysBitTest,DISPTEMP + sbrc SysBitTest,3 + sbi PORTB,3 + lds SysBitTest,DISPTEMP + sbrc SysBitTest,4 + sbi PORTB,4 + lds SysBitTest,DISPTEMP + sbrc SysBitTest,5 + sbi PORTB,5 + lds SysBitTest,DISPTEMP + sbrc SysBitTest,6 + sbi PORTB,6 + ret + +;******************************************************************************** + +Delay_MS: + inc SysWaitTempMS_H +DMS_START: + ldi DELAYTEMP2,254 +DMS_OUTER: + ldi DELAYTEMP,20 +DMS_INNER: + dec DELAYTEMP + brne DMS_INNER + dec DELAYTEMP2 + brne DMS_OUTER + dec SysWaitTempMS + brne DMS_START + dec SysWaitTempMS_H + brne DMS_START + ret + +;******************************************************************************** + +INITSEVENSEG: + sbi DDRB,0 + sbi DDRB,1 + sbi DDRB,2 + sbi DDRB,3 + sbi DDRB,4 + sbi DDRB,5 + sbi DDRB,6 + sbi DDRD,1 + ret + +;******************************************************************************** + +INITSYS: + ldi SysValueCopy,0 + out PORTB,SysValueCopy + ldi SysValueCopy,0 + out PORTC,SysValueCopy + ldi SysValueCopy,0 + out PORTD,SysValueCopy + ret + +;******************************************************************************** + +SEVENSEGDISPDIGIT: + cpi SysStringA, 17 + brlo PC + 3 + clr SysByteTempX + ret + ldi SysReadA, low(TableSEVENSEGDISPDIGIT<<1) + ldi SysReadA_H, high(TableSEVENSEGDISPDIGIT<<1) + add SysReadA, SysStringA + brcc PC + 2 + inc SysReadA_H + lpm + ret +TableSEVENSEGDISPDIGIT: + .DB 16,63,6,91,79,102,109,125,7,127,111,119,124,57,94,121,113 + +;******************************************************************************** + + diff --git a/resources/examples/Avr/7Seg_Counter_mega328p/7Seg_Counter_mega328p.gcb b/resources/examples/Avr/7Seg_Counter_mega328p/7Seg_Counter_mega328p.gcb new file mode 100644 index 0000000..a694bc1 --- /dev/null +++ b/resources/examples/Avr/7Seg_Counter_mega328p/7Seg_Counter_mega328p.gcb @@ -0,0 +1,50 @@ +'''A demonstration program for GCGB and GCB. +'''-------------------------------------------------------------------------------------------------------------------------------- +'''This program will count from 0 to 9 on a 7 segment LED display. +'''The 7 Segment display is connected to PortB.0-6 for segments A-G respectively. +'''The 7 Segment display enable pin connected to PortD.1. +'''@author EvanV plus works of HughC +'''@licence GPL +'''@version 1.0a +'''@date 31.01.2015 +'''******************************************************************************** + +; ----- Configuration + + #chip mega328p, 16 + +; ----- Define Hardware settings + Dir PORTB Out + DIR PORTD.1 out + +; ----- Constants + ; You need to specify the port settings + #define DISP_SEG_A PORTB.0 + #define DISP_SEG_B PORTB.1 + #define DISP_SEG_C PORTB.2 + #define DISP_SEG_D PORTB.3 + #define DISP_SEG_E PORTB.4 + #define DISP_SEG_F PORTB.5 + #define DISP_SEG_G PORTB.6 + #define DISP_SEL_1 PORTD.1 + +; ----- Variables + Temp = 0 + +; ----- Main body of program commences here. + + + Main: + ' Push number to 7 Segment Display + DisplayValue 1, Temp + Wait 250 ms + Wait 250 ms + Temp = Temp + 1 + if Temp > 9 then + Wait 250 ms + Wait 250 ms + Temp = 0 + end if + goto Main + end + diff --git a/resources/examples/Avr/7Seg_Counter_mega328p/7Seg_Counter_mega328p.html b/resources/examples/Avr/7Seg_Counter_mega328p/7Seg_Counter_mega328p.html new file mode 100644 index 0000000..cbc9a44 --- /dev/null +++ b/resources/examples/Avr/7Seg_Counter_mega328p/7Seg_Counter_mega328p.html @@ -0,0 +1,27 @@ + + + +Compilation Report + + +

Compilation Report

+

Compiler Version (DD/MM/YYYY): 0.95 2016-01-24

+

Chip resource usage:

+

Chip Model: MEGA328P

+

Program Memory: 152/32768 words (.46%)

+

RAM: 4/2048 bytes (.2%)

+

RAM Allocation

+ +
+

Subroutines

+ + + + + + + + +
NameCode Size (lines)Compiled Size (words)Outgoing calls
Main2454Delay_MS(4), DISPLAYVALUE(1), INITSYS(1)
INITSEVENSEG489
DISPLAYVALUE250
INITSYS4787
Delay_MS012
SEVENSEGDISPDIGIT020
+ + diff --git a/resources/examples/Avr/7Seg_Counter_mega328p/7Seg_Counter_mega328p.lst b/resources/examples/Avr/7Seg_Counter_mega328p/7Seg_Counter_mega328p.lst new file mode 100644 index 0000000..3147996 --- /dev/null +++ b/resources/examples/Avr/7Seg_Counter_mega328p/7Seg_Counter_mega328p.lst @@ -0,0 +1,898 @@ +GCASM List File (GCBASIC 0.95 2016-01-24) + +Symbols: +-X EQU 30 +-Y EQU 26 +-Z EQU 18 +ACBG EQU 6 +ACD EQU 7 +ACI EQU 4 +ACIC EQU 2 +ACIE EQU 3 +ACIS0 EQU 0 +ACIS1 EQU 1 +ACME EQU 6 +ACO EQU 5 +ACSR EQU 48 +ADATE EQU 5 +ADC0D EQU 0 +ADC1D EQU 1 +ADC2D EQU 2 +ADC3D EQU 3 +ADC4D EQU 4 +ADC5D EQU 5 +ADCH EQU 121 +ADCH0 EQU 0 +ADCH1 EQU 1 +ADCH2 EQU 2 +ADCH3 EQU 3 +ADCH4 EQU 4 +ADCH5 EQU 5 +ADCH6 EQU 6 +ADCH7 EQU 7 +ADCL EQU 120 +ADCL0 EQU 0 +ADCL1 EQU 1 +ADCL2 EQU 2 +ADCL3 EQU 3 +ADCL4 EQU 4 +ADCL5 EQU 5 +ADCL6 EQU 6 +ADCL7 EQU 7 +ADCSRA EQU 122 +ADCSRB EQU 123 +ADEN EQU 7 +ADIE EQU 3 +ADIF EQU 4 +ADLAR EQU 5 +ADMUX EQU 124 +ADPS0 EQU 0 +ADPS1 EQU 1 +ADPS2 EQU 2 +ADSC EQU 6 +ADTS0 EQU 0 +ADTS1 EQU 1 +ADTS2 EQU 2 +AIN0D EQU 0 +AIN1D EQU 1 +AS2 EQU 5 +ASSR EQU 182 +BASPROGRAMEND EQU 99 +BASPROGRAMSTART EQU 52 +BLBSET EQU 3 +BODS EQU 6 +BODSE EQU 5 +BORF EQU 2 +C EQU 0 +CAL0 EQU 0 +CAL1 EQU 1 +CAL2 EQU 2 +CAL3 EQU 3 +CAL4 EQU 4 +CAL5 EQU 5 +CAL6 EQU 6 +CAL7 EQU 7 +CLKPCE EQU 7 +CLKPR EQU 97 +CLKPS0 EQU 0 +CLKPS1 EQU 1 +CLKPS2 EQU 2 +CLKPS3 EQU 3 +COM0A0 EQU 6 +COM0A1 EQU 7 +COM0B0 EQU 4 +COM0B1 EQU 5 +COM1A0 EQU 6 +COM1A1 EQU 7 +COM1B0 EQU 4 +COM1B1 EQU 5 +COM2A0 EQU 6 +COM2A1 EQU 7 +COM2B0 EQU 4 +COM2B1 EQU 5 +CPHA EQU 2 +CPOL EQU 3 +CS00 EQU 0 +CS01 EQU 1 +CS02 EQU 2 +CS10 EQU 0 +CS11 EQU 1 +CS12 EQU 2 +CS20 EQU 0 +CS21 EQU 1 +CS22 EQU 2 +DDB0 EQU 0 +DDB1 EQU 1 +DDB2 EQU 2 +DDB3 EQU 3 +DDB4 EQU 4 +DDB5 EQU 5 +DDB6 EQU 6 +DDB7 EQU 7 +DDC0 EQU 0 +DDC1 EQU 1 +DDC2 EQU 2 +DDC3 EQU 3 +DDC4 EQU 4 +DDC5 EQU 5 +DDC6 EQU 6 +DDD0 EQU 0 +DDD1 EQU 1 +DDD2 EQU 2 +DDD3 EQU 3 +DDD4 EQU 4 +DDD5 EQU 5 +DDD6 EQU 6 +DDD7 EQU 7 +DDRB EQU 4 +DDRC EQU 7 +DDRD EQU 10 +DELAYTEMP EQU r25 +DELAYTEMP2 EQU r26 +DELAY_MS EQU 150 +DIDR0 EQU 126 +DIDR1 EQU 127 +DISPCHAR EQU 256 +DISPLAYVALUE EQU 101 +DISPPORT EQU 257 +DISPTEMP EQU 258 +DMS_INNER EQU 153 +DMS_OUTER EQU 152 +DMS_START EQU 151 +DOR0 EQU 3 +DORD EQU 5 +EEAR0 EQU 0 +EEAR1 EQU 1 +EEAR2 EQU 2 +EEAR3 EQU 3 +EEAR4 EQU 4 +EEAR5 EQU 5 +EEAR6 EQU 6 +EEAR7 EQU 7 +EEAR8 EQU 0 +EEAR9 EQU 1 +EEARH EQU 34 +EEARL EQU 33 +EECR EQU 31 +EEDR EQU 32 +EEDR0 EQU 0 +EEDR1 EQU 1 +EEDR2 EQU 2 +EEDR3 EQU 3 +EEDR4 EQU 4 +EEDR5 EQU 5 +EEDR6 EQU 6 +EEDR7 EQU 7 +EEMPE EQU 2 +EEPE EQU 1 +EEPM0 EQU 4 +EEPM1 EQU 5 +EERE EQU 0 +EERIE EQU 3 +EICRA EQU 105 +EIFR EQU 28 +EIMSK EQU 29 +ENDIF1 EQU 97 +ENDIF2 EQU 121 +EXCLK EQU 6 +EXTRF EQU 1 +FE0 EQU 4 +FOC0A EQU 7 +FOC0B EQU 6 +FOC1A EQU 7 +FOC1B EQU 6 +FOC2A EQU 7 +FOC2B EQU 6 +GPIOR0 EQU 30 +GPIOR00 EQU 0 +GPIOR01 EQU 1 +GPIOR02 EQU 2 +GPIOR03 EQU 3 +GPIOR04 EQU 4 +GPIOR05 EQU 5 +GPIOR06 EQU 6 +GPIOR07 EQU 7 +GPIOR1 EQU 42 +GPIOR10 EQU 0 +GPIOR11 EQU 1 +GPIOR12 EQU 2 +GPIOR13 EQU 3 +GPIOR14 EQU 4 +GPIOR15 EQU 5 +GPIOR16 EQU 6 +GPIOR17 EQU 7 +GPIOR2 EQU 43 +GPIOR20 EQU 0 +GPIOR21 EQU 1 +GPIOR22 EQU 2 +GPIOR23 EQU 3 +GPIOR24 EQU 4 +GPIOR25 EQU 5 +GPIOR26 EQU 6 +GPIOR27 EQU 7 +GTCCR EQU 35 +H EQU 5 +I EQU 7 +ICES1 EQU 6 +ICF1 EQU 5 +ICIE1 EQU 5 +ICNC1 EQU 7 +ICR1H EQU 135 +ICR1H0 EQU 0 +ICR1H1 EQU 1 +ICR1H2 EQU 2 +ICR1H3 EQU 3 +ICR1H4 EQU 4 +ICR1H5 EQU 5 +ICR1H6 EQU 6 +ICR1H7 EQU 7 +ICR1L EQU 134 +ICR1L0 EQU 0 +ICR1L1 EQU 1 +ICR1L2 EQU 2 +ICR1L3 EQU 3 +ICR1L4 EQU 4 +ICR1L5 EQU 5 +ICR1L6 EQU 6 +ICR1L7 EQU 7 +INITSEVENSEG EQU 162 +INITSYS EQU 171 +INT0 EQU 0 +INT1 EQU 1 +INTF0 EQU 0 +INTF1 EQU 1 +ISC00 EQU 0 +ISC01 EQU 1 +ISC10 EQU 2 +ISC11 EQU 3 +IVCE EQU 0 +IVSEL EQU 1 +MAIN EQU 64 +MCUCR EQU 53 +MCUSR EQU 52 +MPCM0 EQU 0 +MSTR EQU 4 +MUX0 EQU 0 +MUX1 EQU 1 +MUX2 EQU 2 +MUX3 EQU 3 +N EQU 2 +OCF0A EQU 1 +OCF0B EQU 2 +OCF1A EQU 1 +OCF1B EQU 2 +OCF2A EQU 1 +OCF2B EQU 2 +OCIE0A EQU 1 +OCIE0B EQU 2 +OCIE1A EQU 1 +OCIE1B EQU 2 +OCIE2A EQU 1 +OCIE2B EQU 2 +OCR0A EQU 39 +OCR0B EQU 40 +OCR0B_0 EQU 0 +OCR0B_1 EQU 1 +OCR0B_2 EQU 2 +OCR0B_3 EQU 3 +OCR0B_4 EQU 4 +OCR0B_5 EQU 5 +OCR0B_6 EQU 6 +OCR0B_7 EQU 7 +OCR1AH EQU 137 +OCR1AH0 EQU 0 +OCR1AH1 EQU 1 +OCR1AH2 EQU 2 +OCR1AH3 EQU 3 +OCR1AH4 EQU 4 +OCR1AH5 EQU 5 +OCR1AH6 EQU 6 +OCR1AH7 EQU 7 +OCR1AL EQU 136 +OCR1AL0 EQU 0 +OCR1AL1 EQU 1 +OCR1AL2 EQU 2 +OCR1AL3 EQU 3 +OCR1AL4 EQU 4 +OCR1AL5 EQU 5 +OCR1AL6 EQU 6 +OCR1AL7 EQU 7 +OCR1BH EQU 139 +OCR1BH0 EQU 0 +OCR1BH1 EQU 1 +OCR1BH2 EQU 2 +OCR1BH3 EQU 3 +OCR1BH4 EQU 4 +OCR1BH5 EQU 5 +OCR1BH6 EQU 6 +OCR1BH7 EQU 7 +OCR1BL EQU 138 +OCR1BL0 EQU 0 +OCR1BL1 EQU 1 +OCR1BL2 EQU 2 +OCR1BL3 EQU 3 +OCR1BL4 EQU 4 +OCR1BL5 EQU 5 +OCR1BL6 EQU 6 +OCR1BL7 EQU 7 +OCR2A EQU 179 +OCR2AUB EQU 3 +OCR2A_0 EQU 0 +OCR2A_1 EQU 1 +OCR2A_2 EQU 2 +OCR2A_3 EQU 3 +OCR2A_4 EQU 4 +OCR2A_5 EQU 5 +OCR2A_6 EQU 6 +OCR2A_7 EQU 7 +OCR2B EQU 180 +OCR2BUB EQU 2 +OCR2B_0 EQU 0 +OCR2B_1 EQU 1 +OCR2B_2 EQU 2 +OCR2B_3 EQU 3 +OCR2B_4 EQU 4 +OCR2B_5 EQU 5 +OCR2B_6 EQU 6 +OCR2B_7 EQU 7 +OCROA_0 EQU 0 +OCROA_1 EQU 1 +OCROA_2 EQU 2 +OCROA_3 EQU 3 +OCROA_4 EQU 4 +OCROA_5 EQU 5 +OCROA_6 EQU 6 +OCROA_7 EQU 7 +OSCCAL EQU 102 +PCICR EQU 104 +PCIE0 EQU 0 +PCIE1 EQU 1 +PCIE2 EQU 2 +PCIF0 EQU 0 +PCIF1 EQU 1 +PCIF2 EQU 2 +PCIFR EQU 27 +PCINT0 EQU 0 +PCINT1 EQU 1 +PCINT10 EQU 2 +PCINT11 EQU 3 +PCINT12 EQU 4 +PCINT13 EQU 5 +PCINT14 EQU 6 +PCINT16 EQU 0 +PCINT17 EQU 1 +PCINT18 EQU 2 +PCINT19 EQU 3 +PCINT2 EQU 2 +PCINT20 EQU 4 +PCINT21 EQU 5 +PCINT22 EQU 6 +PCINT23 EQU 7 +PCINT3 EQU 3 +PCINT4 EQU 4 +PCINT5 EQU 5 +PCINT6 EQU 6 +PCINT7 EQU 7 +PCINT8 EQU 0 +PCINT9 EQU 1 +PCMSK0 EQU 107 +PCMSK1 EQU 108 +PCMSK2 EQU 109 +PGERS EQU 1 +PGWRT EQU 2 +PINB EQU 3 +PINB0 EQU 0 +PINB1 EQU 1 +PINB2 EQU 2 +PINB3 EQU 3 +PINB4 EQU 4 +PINB5 EQU 5 +PINB6 EQU 6 +PINB7 EQU 7 +PINC EQU 6 +PINC0 EQU 0 +PINC1 EQU 1 +PINC2 EQU 2 +PINC3 EQU 3 +PINC4 EQU 4 +PINC5 EQU 5 +PINC6 EQU 6 +PIND EQU 9 +PIND0 EQU 0 +PIND1 EQU 1 +PIND2 EQU 2 +PIND3 EQU 3 +PIND4 EQU 4 +PIND5 EQU 5 +PIND6 EQU 6 +PIND7 EQU 7 +PORF EQU 0 +PORTB EQU 5 +PORTB0 EQU 0 +PORTB1 EQU 1 +PORTB2 EQU 2 +PORTB3 EQU 3 +PORTB4 EQU 4 +PORTB5 EQU 5 +PORTB6 EQU 6 +PORTB7 EQU 7 +PORTC EQU 8 +PORTC0 EQU 0 +PORTC1 EQU 1 +PORTC2 EQU 2 +PORTC3 EQU 3 +PORTC4 EQU 4 +PORTC5 EQU 5 +PORTC6 EQU 6 +PORTD EQU 11 +PORTD0 EQU 0 +PORTD1 EQU 1 +PORTD2 EQU 2 +PORTD3 EQU 3 +PORTD4 EQU 4 +PORTD5 EQU 5 +PORTD6 EQU 6 +PORTD7 EQU 7 +PRADC EQU 0 +PRR EQU 100 +PRSPI EQU 2 +PRTIM0 EQU 5 +PRTIM1 EQU 3 +PRTIM2 EQU 6 +PRTWI EQU 7 +PRUSART0 EQU 1 +PSRASY EQU 1 +PSRSYNC EQU 0 +PUD EQU 4 +RAMEND EQU 2303 +REFS0 EQU 6 +REFS1 EQU 7 +RWWSB EQU 6 +RWWSRE EQU 4 +RXB80 EQU 1 +RXC0 EQU 7 +RXCIE0 EQU 7 +RXEN0 EQU 4 +S EQU 4 +SE EQU 0 +SELFPRGEN EQU 0 +SEVENSEGDISPDIGIT EQU 178 +SM0 EQU 1 +SM1 EQU 2 +SM2 EQU 3 +SMCR EQU 51 +SP0 EQU 0 +SP1 EQU 1 +SP10 EQU 2 +SP11 EQU 3 +SP2 EQU 2 +SP3 EQU 3 +SP4 EQU 4 +SP5 EQU 5 +SP6 EQU 6 +SP7 EQU 7 +SP8 EQU 0 +SP9 EQU 1 +SPCR EQU 44 +SPDR EQU 46 +SPDR0 EQU 0 +SPDR1 EQU 1 +SPDR2 EQU 2 +SPDR3 EQU 3 +SPDR4 EQU 4 +SPDR5 EQU 5 +SPDR6 EQU 6 +SPDR7 EQU 7 +SPE EQU 6 +SPH EQU 62 +SPI2X EQU 0 +SPIE EQU 7 +SPIF EQU 7 +SPL EQU 61 +SPMCSR EQU 55 +SPMIE EQU 7 +SPR0 EQU 0 +SPR1 EQU 1 +SPSR EQU 45 +SREG EQU 63 +SysBitTest EQU r5 +SysByteTempX EQU r0 +SysCalcTempA EQU r22 +SysCalcTempB EQU r28 +SysReadA EQU r30 +SysReadA_H EQU r31 +SysStringA EQU r26 +SysTemp1 EQU r1 +SysValueCopy EQU r21 +SysWaitTempMS EQU r29 +SysWaitTempMS_H EQU r30 +T EQU 6 +TABLESEVENSEGDISPDIGIT EQU 189 +TCCR0A EQU 36 +TCCR0B EQU 37 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCCR2A EQU 176 +TCCR2B EQU 177 +TCN2UB EQU 4 +TCNT0 EQU 38 +TCNT0_0 EQU 0 +TCNT0_1 EQU 1 +TCNT0_2 EQU 2 +TCNT0_3 EQU 3 +TCNT0_4 EQU 4 +TCNT0_5 EQU 5 +TCNT0_6 EQU 6 +TCNT0_7 EQU 7 +TCNT1H EQU 133 +TCNT1H0 EQU 0 +TCNT1H1 EQU 1 +TCNT1H2 EQU 2 +TCNT1H3 EQU 3 +TCNT1H4 EQU 4 +TCNT1H5 EQU 5 +TCNT1H6 EQU 6 +TCNT1H7 EQU 7 +TCNT1L EQU 132 +TCNT1L0 EQU 0 +TCNT1L1 EQU 1 +TCNT1L2 EQU 2 +TCNT1L3 EQU 3 +TCNT1L4 EQU 4 +TCNT1L5 EQU 5 +TCNT1L6 EQU 6 +TCNT1L7 EQU 7 +TCNT2 EQU 178 +TCNT2_0 EQU 0 +TCNT2_1 EQU 1 +TCNT2_2 EQU 2 +TCNT2_3 EQU 3 +TCNT2_4 EQU 4 +TCNT2_5 EQU 5 +TCNT2_6 EQU 6 +TCNT2_7 EQU 7 +TCR2AUB EQU 1 +TCR2BUB EQU 0 +TEMP EQU 259 +TIFR0 EQU 21 +TIFR1 EQU 22 +TIFR2 EQU 23 +TIMSK0 EQU 110 +TIMSK1 EQU 111 +TIMSK2 EQU 112 +TOIE0 EQU 0 +TOIE1 EQU 0 +TOIE2 EQU 0 +TOV0 EQU 0 +TOV1 EQU 0 +TOV2 EQU 0 +TSM EQU 7 +TWA0 EQU 1 +TWA1 EQU 2 +TWA2 EQU 3 +TWA3 EQU 4 +TWA4 EQU 5 +TWA5 EQU 6 +TWA6 EQU 7 +TWAM0 EQU 1 +TWAM1 EQU 2 +TWAM2 EQU 3 +TWAM3 EQU 4 +TWAM4 EQU 5 +TWAM5 EQU 6 +TWAM6 EQU 7 +TWAMR EQU 189 +TWAR EQU 186 +TWBR EQU 184 +TWBR0 EQU 0 +TWBR1 EQU 1 +TWBR2 EQU 2 +TWBR3 EQU 3 +TWBR4 EQU 4 +TWBR5 EQU 5 +TWBR6 EQU 6 +TWBR7 EQU 7 +TWCR EQU 188 +TWD0 EQU 0 +TWD1 EQU 1 +TWD2 EQU 2 +TWD3 EQU 3 +TWD4 EQU 4 +TWD5 EQU 5 +TWD6 EQU 6 +TWD7 EQU 7 +TWDR EQU 187 +TWEA EQU 6 +TWEN EQU 2 +TWGCE EQU 0 +TWIE EQU 0 +TWINT EQU 7 +TWPS0 EQU 0 +TWPS1 EQU 1 +TWS3 EQU 3 +TWS4 EQU 4 +TWS5 EQU 5 +TWS6 EQU 6 +TWS7 EQU 7 +TWSR EQU 185 +TWSTA EQU 5 +TWSTO EQU 4 +TWWC EQU 3 +TXB80 EQU 0 +TXC0 EQU 6 +TXCIE0 EQU 6 +TXEN0 EQU 3 +U2X0 EQU 1 +UBRR0 EQU 0 +UBRR0H EQU 197 +UBRR0L EQU 196 +UBRR1 EQU 1 +UBRR10 EQU 2 +UBRR11 EQU 3 +UBRR2 EQU 2 +UBRR3 EQU 3 +UBRR4 EQU 4 +UBRR5 EQU 5 +UBRR6 EQU 6 +UBRR7 EQU 7 +UBRR8 EQU 0 +UBRR9 EQU 1 +UCPOL0 EQU 0 +UCSR0A EQU 192 +UCSR0B EQU 193 +UCSR0C EQU 194 +UCSZ00 EQU 1 +UCSZ01 EQU 2 +UCSZ02 EQU 2 +UDR0 EQU 198 +UDR0-0 EQU 0 +UDR0-1 EQU 1 +UDR0-2 EQU 2 +UDR0-3 EQU 3 +UDR0-4 EQU 4 +UDR0-5 EQU 5 +UDR0-6 EQU 6 +UDR0-7 EQU 7 +UDRE0 EQU 5 +UDRIE0 EQU 5 +UMSEL00 EQU 6 +UMSEL01 EQU 7 +UPE0 EQU 2 +UPM00 EQU 4 +UPM01 EQU 5 +USBS0 EQU 3 +V EQU 3 +WCOL EQU 6 +WDCE EQU 4 +WDE EQU 3 +WDIE EQU 6 +WDIF EQU 7 +WDP0 EQU 0 +WDP1 EQU 1 +WDP2 EQU 2 +WDP3 EQU 5 +WDRF EQU 3 +WDTCSR EQU 96 +WGM00 EQU 0 +WGM01 EQU 1 +WGM02 EQU 3 +WGM10 EQU 0 +WGM11 EQU 1 +WGM12 EQU 3 +WGM13 EQU 4 +WGM20 EQU 0 +WGM21 EQU 1 +WGM22 EQU 3 +X EQU 28 +X+ EQU 29 +Y EQU 8 +Y+ EQU 25 +Z EQU 1 +Z+ EQU 17 +rZ EQU 0 + +Code: +Loc Obj Code Original Assembly + +000000 C033 RJMP BASPROGRAMSTART + +000002 9518 RETI + +000004 9518 RETI + +000006 9518 RETI + +000008 9518 RETI + +00000A 9518 RETI + +00000C 9518 RETI + +00000E 9518 RETI + +000010 9518 RETI + +000012 9518 RETI + +000014 9518 RETI + +000016 9518 RETI + +000018 9518 RETI + +00001A 9518 RETI + +00001C 9518 RETI + +00001E 9518 RETI + +000020 9518 RETI + +000022 9518 RETI + +000024 9518 RETI + +000026 9518 RETI + +000028 9518 RETI + +00002A 9518 RETI + +00002C 9518 RETI + +00002E 9518 RETI + +000030 9518 RETI + +000032 9518 RETI + + + + BASPROGRAMSTART +000034 E058 LDI SYSVALUECOPY,HIGH(RAMEND) +000035 BF5E OUT SPH, SYSVALUECOPY +000036 EF5F LDI SYSVALUECOPY,LOW(RAMEND) +000037 BF5D OUT SPL, SYSVALUECOPY +000038 D072 RCALL INITSYS +000039 D068 RCALL INITSEVENSEG + +00003A EF5F LDI SYSVALUECOPY,255 +00003B B954 OUT DDRB,SYSVALUECOPY +00003C 9A51 SBI DDRD,1 +00003D E050 LDI SYSVALUECOPY,0 +00003E 9350 0103 STS TEMP,SYSVALUECOPY + MAIN +000040 E051 LDI SYSVALUECOPY,1 +000041 9350 0101 STS DISPPORT,SYSVALUECOPY +000043 9150 0103 LDS SYSVALUECOPY,TEMP +000045 9350 0100 STS DISPCHAR,SYSVALUECOPY +000047 D01D RCALL DISPLAYVALUE +000048 EFDA LDI SYSWAITTEMPMS,250 +000049 E0E0 LDI SYSWAITTEMPMS_H,0 +00004A D04B RCALL DELAY_MS +00004B EFDA LDI SYSWAITTEMPMS,250 +00004C E0E0 LDI SYSWAITTEMPMS_H,0 +00004D D048 RCALL DELAY_MS +00004E 9010 0103 LDS SYSTEMP1,TEMP +000050 9413 INC SYSTEMP1 +000051 9210 0103 STS TEMP,SYSTEMP1 +000053 E069 LDI SYSCALCTEMPA,9 +000054 91C0 0103 LDS SYSCALCTEMPB,TEMP +000056 176C CP SYSCALCTEMPA,SYSCALCTEMPB +000057 F448 BRSH ENDIF1 +000058 EFDA LDI SYSWAITTEMPMS,250 +000059 E0E0 LDI SYSWAITTEMPMS_H,0 +00005A D03B RCALL DELAY_MS +00005B EFDA LDI SYSWAITTEMPMS,250 +00005C E0E0 LDI SYSWAITTEMPMS_H,0 +00005D D038 RCALL DELAY_MS +00005E E050 LDI SYSVALUECOPY,0 +00005F 9350 0103 STS TEMP,SYSVALUECOPY + ENDIF1 +000061 CFDE RJMP MAIN +000062 C000 RJMP BASPROGRAMEND + BASPROGRAMEND +000063 9588 SLEEP +000064 CFFE RJMP BASPROGRAMEND + + + DISPLAYVALUE +000065 9010 0100 LDS SYSTEMP1,DISPCHAR +000067 9413 INC SYSTEMP1 +000068 2DA1 MOV SYSSTRINGA,SYSTEMP1 +000069 D048 RCALL SEVENSEGDISPDIGIT +00006A 9200 0102 STS DISPTEMP,SYSBYTETEMPX +00006C 9828 CBI PORTB,0 +00006D 9829 CBI PORTB,1 +00006E 982A CBI PORTB,2 +00006F 982B CBI PORTB,3 +000070 982C CBI PORTB,4 +000071 982D CBI PORTB,5 +000072 982E CBI PORTB,6 +000073 9859 CBI PORTD,1 +000074 9160 0101 LDS SYSCALCTEMPA,DISPPORT +000076 3061 CPI SYSCALCTEMPA,1 +000077 F409 BRNE ENDIF2 +000078 9A59 SBI PORTD,1 + ENDIF2 +000079 9050 0102 LDS SYSBITTEST,DISPTEMP +00007B FC50 SBRC SYSBITTEST,0 +00007C 9A28 SBI PORTB,0 +00007D 9050 0102 LDS SYSBITTEST,DISPTEMP +00007F FC51 SBRC SYSBITTEST,1 +000080 9A29 SBI PORTB,1 +000081 9050 0102 LDS SYSBITTEST,DISPTEMP +000083 FC52 SBRC SYSBITTEST,2 +000084 9A2A SBI PORTB,2 +000085 9050 0102 LDS SYSBITTEST,DISPTEMP +000087 FC53 SBRC SYSBITTEST,3 +000088 9A2B SBI PORTB,3 +000089 9050 0102 LDS SYSBITTEST,DISPTEMP +00008B FC54 SBRC SYSBITTEST,4 +00008C 9A2C SBI PORTB,4 +00008D 9050 0102 LDS SYSBITTEST,DISPTEMP +00008F FC55 SBRC SYSBITTEST,5 +000090 9A2D SBI PORTB,5 +000091 9050 0102 LDS SYSBITTEST,DISPTEMP +000093 FC56 SBRC SYSBITTEST,6 +000094 9A2E SBI PORTB,6 +000095 9508 RET + + + DELAY_MS +000096 95E3 INC SYSWAITTEMPMS_H + DMS_START +000097 EFAE LDI DELAYTEMP2,254 + DMS_OUTER +000098 E194 LDI DELAYTEMP,20 + DMS_INNER +000099 959A DEC DELAYTEMP +00009A F7F1 BRNE DMS_INNER +00009B 95AA DEC DELAYTEMP2 +00009C F7D9 BRNE DMS_OUTER +00009D 95DA DEC SYSWAITTEMPMS +00009E F7C1 BRNE DMS_START +00009F 95EA DEC SYSWAITTEMPMS_H +0000A0 F7B1 BRNE DMS_START +0000A1 9508 RET + + + INITSEVENSEG +0000A2 9A20 SBI DDRB,0 +0000A3 9A21 SBI DDRB,1 +0000A4 9A22 SBI DDRB,2 +0000A5 9A23 SBI DDRB,3 +0000A6 9A24 SBI DDRB,4 +0000A7 9A25 SBI DDRB,5 +0000A8 9A26 SBI DDRB,6 +0000A9 9A51 SBI DDRD,1 +0000AA 9508 RET + + + INITSYS +0000AB E050 LDI SYSVALUECOPY,0 +0000AC B955 OUT PORTB,SYSVALUECOPY +0000AD E050 LDI SYSVALUECOPY,0 +0000AE B958 OUT PORTC,SYSVALUECOPY +0000AF E050 LDI SYSVALUECOPY,0 +0000B0 B95B OUT PORTD,SYSVALUECOPY +0000B1 9508 RET + + + SEVENSEGDISPDIGIT +0000B2 31A1 CPI SYSSTRINGA, 17 +0000B3 F010 BRLO PC + 3 +0000B4 2400 CLR SYSBYTETEMPX +0000B5 9508 RET +0000B6 E7EA LDI SYSREADA, LOW(TABLESEVENSEGDISPDIGIT<<1) +0000B7 E0F1 LDI SYSREADA_H, HIGH(TABLESEVENSEGDISPDIGIT<<1) +0000B8 0FEA ADD SYSREADA, SYSSTRINGA +0000B9 F408 BRCC PC + 2 +0000BA 95F3 INC SYSREADA_H +0000BB 95C8 LPM +0000BC 9508 RET + TABLESEVENSEGDISPDIGIT +0000BD 3F10 5B06 664F 7D6D 7F07 776F 397C 795E 0071 RAW 3F10,5B06,664F,7D6D,7F07,776F,397C,795E,0071 + + diff --git a/resources/examples/Avr/7Seg_Counter_mega328p/7Seg_Counter_mega328p.simu b/resources/examples/Avr/7Seg_Counter_mega328p/7Seg_Counter_mega328p.simu new file mode 100644 index 0000000..1f3fb54 --- /dev/null +++ b/resources/examples/Avr/7Seg_Counter_mega328p/7Seg_Counter_mega328p.simu @@ -0,0 +1,84 @@ + + +Ground (0 V)-10: + + +7 Segment-9: + + +Resistor-8: + + +Resistor-7: + + +Resistor-6: + + +Resistor-5: + + +Resistor-4: + + +Resistor-3: + + +Resistor-2: + + +atmega328-1: + + +Connector-11: + + +Connector-13: + + +Connector-15: + + +Connector-17: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +Connector-39: + + +PlotterWidget-50: + + +SerialPortWidget-51: + + + diff --git a/resources/examples/Avr/Interrupt_LED_PWM_Timer2_mega328p/Interrupt_LED_PWM_Timer2_mega328p.asm b/resources/examples/Avr/Interrupt_LED_PWM_Timer2_mega328p/Interrupt_LED_PWM_Timer2_mega328p.asm new file mode 100644 index 0000000..b90b7fc --- /dev/null +++ b/resources/examples/Avr/Interrupt_LED_PWM_Timer2_mega328p/Interrupt_LED_PWM_Timer2_mega328p.asm @@ -0,0 +1,346 @@ +;Program compiled by Great Cow BASIC (0.94 2015-10-27) +;Need help? See the GCBASIC forums at http://sourceforge.net/projects/gcbasic/forums, +;check the documentation or email w_cholmondeley at users dot sourceforge dot net. + +;******************************************************************************** + +;Chip Model: MEGA328P +;Assembler header file +.INCLUDE "m328pdef.inc" + +;SREG bit names (for AVR Assembler compatibility, GCBASIC uses different names) +#define I 7 +#define T 6 +#define H 5 +#define S 4 +#define V 3 +#define N 2 +#define Z 1 +#define C 0 + +;******************************************************************************** + +;Set aside memory locations for variables +.EQU LEDSPEED=256 +.EQU PWMCOUNTER=257 +.EQU SaveSREG=258 +.EQU SaveSysCalcTempA=259 +.EQU SaveSysCalcTempB=260 +.EQU SaveSysTemp1=261 +.EQU SaveSysValueCopy=262 +.EQU SysIntOffCount=263 +.EQU TMR0PRES=264 +.EQU TMR1PRES=265 +.EQU TMR2POST=266 +.EQU TMR2PRES=267 +.EQU TMRNUMBER=268 + +;******************************************************************************** + +;Register variables +.DEF DELAYTEMP=r25 +.DEF DELAYTEMP2=r26 +.DEF SysCalcTempA=r22 +.DEF SysCalcTempB=r28 +.DEF SysValueCopy=r21 +.DEF SysWaitTempMS=r29 +.DEF SysWaitTempMS_H=r30 +.DEF SysWaitTempS=r31 +.DEF SysTemp1=r0 +.DEF SysTemp2=r16 +.DEF SysTemp3=r1 + +;******************************************************************************** + +;Vectors +;Interrupt vectors + nop + rjmp BASPROGRAMSTART ;Reset + nop + reti ;INT0 + nop + reti ;INT1 + nop + reti ;PCINT0 + nop + reti ;PCINT1 + nop + reti ;PCINT2 + nop + reti ;WDT + nop + reti ;TIMER2_COMPA + nop + reti ;TIMER2_COMPB + nop + rjmp IntTIMER2_OVF ;TIMER2_OVF + nop + reti ;TIMER1_CAPT + nop + reti ;TIMER1_COMPA + nop + reti ;TIMER1_COMPB + nop + reti ;TIMER1_OVF + nop + reti ;TIMER0_COMPA + nop + reti ;TIMER0_COMPB + nop + reti ;TIMER0_OVF + nop + reti ;SPI_STC + nop + reti ;USART_RX + nop + reti ;USART_UDRE + nop + reti ;USART_TX + nop + reti ;ADC + nop + reti ;EE_READY + nop + reti ;ANALOG_COMP + nop + reti ;TWI + nop + reti ;SPM_READY + +;******************************************************************************** + +;Start of program memory page 0 +nop +BASPROGRAMSTART: +;Initialise stack + ldi SysValueCopy,high(RAMEND) + out SPH, SysValueCopy + ldi SysValueCopy,low(RAMEND) + out SPL, SysValueCopy +;Call initialisation routines + rcall INITSYS +;Enable interrupts + clr SysValueCopy + sts SysIntOffCount,SysValueCopy + sei + +;Start of the main program + sbi DDRB,5 + rcall INITLEDCONTROL +SysDoLoop_S1: + ldi SysValueCopy,255 + sts LEDSPEED,SysValueCopy +SysForLoop1: + lds SysTemp1,LEDSPEED + inc SysTemp1 + sts LEDSPEED,SysTemp1 + ldi SysWaitTempMS,25 + ldi SysWaitTempMS_H,0 + rcall Delay_MS + lds SysCalcTempA,LEDSPEED + cpi SysCalcTempA,100 + brlo SysForLoop1 +SysForLoopEnd1: + ldi SysWaitTempS,1 + rcall Delay_S + ldi SysValueCopy,101 + sts LEDSPEED,SysValueCopy +SysForLoop2: + lds SysTemp1,LEDSPEED + dec SysTemp1 + sts LEDSPEED,SysTemp1 + ldi SysWaitTempMS,25 + ldi SysWaitTempMS_H,0 + rcall Delay_MS + ldi SysCalcTempA,0 + lds SysCalcTempB,LEDSPEED + cp SysCalcTempA,SysCalcTempB + brlo SysForLoop2 +SysForLoopEnd2: + ldi SysWaitTempS,1 + rcall Delay_S + rjmp SysDoLoop_S1 +SysDoLoop_E1: + rjmp BASPROGRAMEND +BASPROGRAMEND: + sleep + rjmp BASPROGRAMEND + +;******************************************************************************** + +Delay_MS: + inc SysWaitTempMS_H +DMS_START: + ldi DELAYTEMP2,254 +DMS_OUTER: + ldi DELAYTEMP,20 +DMS_INNER: + dec DELAYTEMP + brne DMS_INNER + dec DELAYTEMP2 + brne DMS_OUTER + dec SysWaitTempMS + brne DMS_START + dec SysWaitTempMS_H + brne DMS_START + ret + +;******************************************************************************** + +Delay_S: +DS_START: + ldi SysWaitTempMS,232 + ldi SysWaitTempMS_H,3 + rcall Delay_MS + dec SysWaitTempS + brne DS_START + ret + +;******************************************************************************** + +INITLEDCONTROL: + cbi PORTB,5 + ldi SysValueCopy,0 + sts LEDSPEED,SysValueCopy + ldi SysValueCopy,0 + sts PWMCOUNTER,SysValueCopy + lds SysValueCopy,TIMSK2 + sbr SysValueCopy,1< PWMCounter Then + Set LED On + Else + Set LED Off + End If + PWMCounter += 1 + If PWMCounter = 100 Then PWMCounter = 0 + +End Sub + + + + diff --git a/resources/examples/Avr/Interrupt_LED_PWM_Timer2_mega328p/Interrupt_LED_PWM_Timer2_mega328p.html b/resources/examples/Avr/Interrupt_LED_PWM_Timer2_mega328p/Interrupt_LED_PWM_Timer2_mega328p.html new file mode 100644 index 0000000..7bd38f5 --- /dev/null +++ b/resources/examples/Avr/Interrupt_LED_PWM_Timer2_mega328p/Interrupt_LED_PWM_Timer2_mega328p.html @@ -0,0 +1,32 @@ + + + +Compilation Report + + +

Compilation Report

+

Compiler Version (DD/MM/YYYY): 0.94 2015-10-27

+

Chip resource usage:

+

Chip Model: MEGA328P

+

Program Memory: 211/32768 words (.64%)

+

RAM: 13/2048 bytes (.63%)

+

RAM Allocation

+ +
+

Subroutines

+ + + + + + + + + + + + + +
NameCode Size (lines)Compiled Size (words)Outgoing calls
Main1555PWMHANDLER(1), Delay_S(2), Delay_MS(2), INITLEDCONTROL(1), INITSYS(1)
INITLEDCONTROL625STARTTIMER(1), INITTIMER2(1)
PWMHANDLER922
INITSYS3657
STARTTIMER10741
INITTIMER2168
Delay_MS012
Delay_S07Delay_MS(1)
SysIntContextSave015
SysIntContextRestore015
IntTIMER2_OVF04
+ + diff --git a/resources/examples/Avr/Interrupt_LED_PWM_Timer2_mega328p/Interrupt_LED_PWM_Timer2_mega328p.lst b/resources/examples/Avr/Interrupt_LED_PWM_Timer2_mega328p/Interrupt_LED_PWM_Timer2_mega328p.lst new file mode 100644 index 0000000..4de3867 --- /dev/null +++ b/resources/examples/Avr/Interrupt_LED_PWM_Timer2_mega328p/Interrupt_LED_PWM_Timer2_mega328p.lst @@ -0,0 +1,982 @@ +GCASM List File (GCBASIC 0.94 2015-10-27) + +Symbols: +-X EQU 30 +-Y EQU 26 +-Z EQU 18 +ACBG EQU 6 +ACD EQU 7 +ACI EQU 4 +ACIC EQU 2 +ACIE EQU 3 +ACIS0 EQU 0 +ACIS1 EQU 1 +ACME EQU 6 +ACO EQU 5 +ACSR EQU 48 +ADATE EQU 5 +ADC0D EQU 0 +ADC1D EQU 1 +ADC2D EQU 2 +ADC3D EQU 3 +ADC4D EQU 4 +ADC5D EQU 5 +ADCH EQU 121 +ADCH0 EQU 0 +ADCH1 EQU 1 +ADCH2 EQU 2 +ADCH3 EQU 3 +ADCH4 EQU 4 +ADCH5 EQU 5 +ADCH6 EQU 6 +ADCH7 EQU 7 +ADCL EQU 120 +ADCL0 EQU 0 +ADCL1 EQU 1 +ADCL2 EQU 2 +ADCL3 EQU 3 +ADCL4 EQU 4 +ADCL5 EQU 5 +ADCL6 EQU 6 +ADCL7 EQU 7 +ADCSRA EQU 122 +ADCSRB EQU 123 +ADEN EQU 7 +ADIE EQU 3 +ADIF EQU 4 +ADLAR EQU 5 +ADMUX EQU 124 +ADPS0 EQU 0 +ADPS1 EQU 1 +ADPS2 EQU 2 +ADSC EQU 6 +ADTS0 EQU 0 +ADTS1 EQU 1 +ADTS2 EQU 2 +AIN0D EQU 0 +AIN1D EQU 1 +AS2 EQU 5 +ASSR EQU 182 +BASPROGRAMEND EQU 101 +BASPROGRAMSTART EQU 53 +BLBSET EQU 3 +BODS EQU 6 +BODSE EQU 5 +BORF EQU 2 +C EQU 0 +CAL0 EQU 0 +CAL1 EQU 1 +CAL2 EQU 2 +CAL3 EQU 3 +CAL4 EQU 4 +CAL5 EQU 5 +CAL6 EQU 6 +CAL7 EQU 7 +CLKPCE EQU 7 +CLKPR EQU 97 +CLKPS0 EQU 0 +CLKPS1 EQU 1 +CLKPS2 EQU 2 +CLKPS3 EQU 3 +COM0A0 EQU 6 +COM0A1 EQU 7 +COM0B0 EQU 4 +COM0B1 EQU 5 +COM1A0 EQU 6 +COM1A1 EQU 7 +COM1B0 EQU 4 +COM1B1 EQU 5 +COM2A0 EQU 6 +COM2A1 EQU 7 +COM2B0 EQU 4 +COM2B1 EQU 5 +CPHA EQU 2 +CPOL EQU 3 +CS00 EQU 0 +CS01 EQU 1 +CS02 EQU 2 +CS10 EQU 0 +CS11 EQU 1 +CS12 EQU 2 +CS20 EQU 0 +CS21 EQU 1 +CS22 EQU 2 +DDB0 EQU 0 +DDB1 EQU 1 +DDB2 EQU 2 +DDB3 EQU 3 +DDB4 EQU 4 +DDB5 EQU 5 +DDB6 EQU 6 +DDB7 EQU 7 +DDC0 EQU 0 +DDC1 EQU 1 +DDC2 EQU 2 +DDC3 EQU 3 +DDC4 EQU 4 +DDC5 EQU 5 +DDC6 EQU 6 +DDD0 EQU 0 +DDD1 EQU 1 +DDD2 EQU 2 +DDD3 EQU 3 +DDD4 EQU 4 +DDD5 EQU 5 +DDD6 EQU 6 +DDD7 EQU 7 +DDRB EQU 4 +DDRC EQU 7 +DDRD EQU 10 +DELAYTEMP EQU r25 +DELAYTEMP2 EQU r26 +DELAY_MS EQU 103 +DELAY_S EQU 115 +DIDR0 EQU 126 +DIDR1 EQU 127 +DMS_INNER EQU 106 +DMS_OUTER EQU 105 +DMS_START EQU 104 +DOR0 EQU 3 +DORD EQU 5 +DS_START EQU 115 +EEAR0 EQU 0 +EEAR1 EQU 1 +EEAR2 EQU 2 +EEAR3 EQU 3 +EEAR4 EQU 4 +EEAR5 EQU 5 +EEAR6 EQU 6 +EEAR7 EQU 7 +EEAR8 EQU 0 +EEAR9 EQU 1 +EEARH EQU 34 +EEARL EQU 33 +EECR EQU 31 +EEDR EQU 32 +EEDR0 EQU 0 +EEDR1 EQU 1 +EEDR2 EQU 2 +EEDR3 EQU 3 +EEDR4 EQU 4 +EEDR5 EQU 5 +EEDR6 EQU 6 +EEDR7 EQU 7 +EEMPE EQU 2 +EEPE EQU 1 +EEPM0 EQU 4 +EEPM1 EQU 5 +EERE EQU 0 +EERIE EQU 3 +EICRA EQU 105 +EIFR EQU 28 +EIMSK EQU 29 +ELSE3_1 EQU 171 +ENDIF3 EQU 172 +ENDIF4 EQU 184 +ENDIF5 EQU 197 +ENDIF6 EQU 211 +ENDIF7 EQU 225 +ENDIF8 EQU 158 +EXCLK EQU 6 +EXTRF EQU 1 +FE0 EQU 4 +FOC0A EQU 7 +FOC0B EQU 6 +FOC1A EQU 7 +FOC1B EQU 6 +FOC2A EQU 7 +FOC2B EQU 6 +GPIOR0 EQU 30 +GPIOR00 EQU 0 +GPIOR01 EQU 1 +GPIOR02 EQU 2 +GPIOR03 EQU 3 +GPIOR04 EQU 4 +GPIOR05 EQU 5 +GPIOR06 EQU 6 +GPIOR07 EQU 7 +GPIOR1 EQU 42 +GPIOR10 EQU 0 +GPIOR11 EQU 1 +GPIOR12 EQU 2 +GPIOR13 EQU 3 +GPIOR14 EQU 4 +GPIOR15 EQU 5 +GPIOR16 EQU 6 +GPIOR17 EQU 7 +GPIOR2 EQU 43 +GPIOR20 EQU 0 +GPIOR21 EQU 1 +GPIOR22 EQU 2 +GPIOR23 EQU 3 +GPIOR24 EQU 4 +GPIOR25 EQU 5 +GPIOR26 EQU 6 +GPIOR27 EQU 7 +GTCCR EQU 35 +H EQU 5 +I EQU 7 +ICES1 EQU 6 +ICF1 EQU 5 +ICIE1 EQU 5 +ICNC1 EQU 7 +ICR1H EQU 135 +ICR1H0 EQU 0 +ICR1H1 EQU 1 +ICR1H2 EQU 2 +ICR1H3 EQU 3 +ICR1H4 EQU 4 +ICR1H5 EQU 5 +ICR1H6 EQU 6 +ICR1H7 EQU 7 +ICR1L EQU 134 +ICR1L0 EQU 0 +ICR1L1 EQU 1 +ICR1L2 EQU 2 +ICR1L3 EQU 3 +ICR1L4 EQU 4 +ICR1L5 EQU 5 +ICR1L6 EQU 6 +ICR1L7 EQU 7 +INITLEDCONTROL EQU 121 +INITSYS EQU 144 +INITTIMER2 EQU 151 +INT0 EQU 0 +INT1 EQU 1 +INTF0 EQU 0 +INTF1 EQU 1 +INTTIMER2_OVF EQU 159 +ISC00 EQU 0 +ISC01 EQU 1 +ISC10 EQU 2 +ISC11 EQU 3 +IVCE EQU 0 +IVSEL EQU 1 +LEDSPEED EQU 256 +MCUCR EQU 53 +MCUSR EQU 52 +MPCM0 EQU 0 +MSTR EQU 4 +MUX0 EQU 0 +MUX1 EQU 1 +MUX2 EQU 2 +MUX3 EQU 3 +N EQU 2 +OCF0A EQU 1 +OCF0B EQU 2 +OCF1A EQU 1 +OCF1B EQU 2 +OCF2A EQU 1 +OCF2B EQU 2 +OCIE0A EQU 1 +OCIE0B EQU 2 +OCIE1A EQU 1 +OCIE1B EQU 2 +OCIE2A EQU 1 +OCIE2B EQU 2 +OCR0A EQU 39 +OCR0B EQU 40 +OCR0B_0 EQU 0 +OCR0B_1 EQU 1 +OCR0B_2 EQU 2 +OCR0B_3 EQU 3 +OCR0B_4 EQU 4 +OCR0B_5 EQU 5 +OCR0B_6 EQU 6 +OCR0B_7 EQU 7 +OCR1AH EQU 137 +OCR1AH0 EQU 0 +OCR1AH1 EQU 1 +OCR1AH2 EQU 2 +OCR1AH3 EQU 3 +OCR1AH4 EQU 4 +OCR1AH5 EQU 5 +OCR1AH6 EQU 6 +OCR1AH7 EQU 7 +OCR1AL EQU 136 +OCR1AL0 EQU 0 +OCR1AL1 EQU 1 +OCR1AL2 EQU 2 +OCR1AL3 EQU 3 +OCR1AL4 EQU 4 +OCR1AL5 EQU 5 +OCR1AL6 EQU 6 +OCR1AL7 EQU 7 +OCR1BH EQU 139 +OCR1BH0 EQU 0 +OCR1BH1 EQU 1 +OCR1BH2 EQU 2 +OCR1BH3 EQU 3 +OCR1BH4 EQU 4 +OCR1BH5 EQU 5 +OCR1BH6 EQU 6 +OCR1BH7 EQU 7 +OCR1BL EQU 138 +OCR1BL0 EQU 0 +OCR1BL1 EQU 1 +OCR1BL2 EQU 2 +OCR1BL3 EQU 3 +OCR1BL4 EQU 4 +OCR1BL5 EQU 5 +OCR1BL6 EQU 6 +OCR1BL7 EQU 7 +OCR2A EQU 179 +OCR2AUB EQU 3 +OCR2A_0 EQU 0 +OCR2A_1 EQU 1 +OCR2A_2 EQU 2 +OCR2A_3 EQU 3 +OCR2A_4 EQU 4 +OCR2A_5 EQU 5 +OCR2A_6 EQU 6 +OCR2A_7 EQU 7 +OCR2B EQU 180 +OCR2BUB EQU 2 +OCR2B_0 EQU 0 +OCR2B_1 EQU 1 +OCR2B_2 EQU 2 +OCR2B_3 EQU 3 +OCR2B_4 EQU 4 +OCR2B_5 EQU 5 +OCR2B_6 EQU 6 +OCR2B_7 EQU 7 +OCROA_0 EQU 0 +OCROA_1 EQU 1 +OCROA_2 EQU 2 +OCROA_3 EQU 3 +OCROA_4 EQU 4 +OCROA_5 EQU 5 +OCROA_6 EQU 6 +OCROA_7 EQU 7 +OSCCAL EQU 102 +PCICR EQU 104 +PCIE0 EQU 0 +PCIE1 EQU 1 +PCIE2 EQU 2 +PCIF0 EQU 0 +PCIF1 EQU 1 +PCIF2 EQU 2 +PCIFR EQU 27 +PCINT0 EQU 0 +PCINT1 EQU 1 +PCINT10 EQU 2 +PCINT11 EQU 3 +PCINT12 EQU 4 +PCINT13 EQU 5 +PCINT14 EQU 6 +PCINT16 EQU 0 +PCINT17 EQU 1 +PCINT18 EQU 2 +PCINT19 EQU 3 +PCINT2 EQU 2 +PCINT20 EQU 4 +PCINT21 EQU 5 +PCINT22 EQU 6 +PCINT23 EQU 7 +PCINT3 EQU 3 +PCINT4 EQU 4 +PCINT5 EQU 5 +PCINT6 EQU 6 +PCINT7 EQU 7 +PCINT8 EQU 0 +PCINT9 EQU 1 +PCMSK0 EQU 107 +PCMSK1 EQU 108 +PCMSK2 EQU 109 +PGERS EQU 1 +PGWRT EQU 2 +PINB EQU 3 +PINB0 EQU 0 +PINB1 EQU 1 +PINB2 EQU 2 +PINB3 EQU 3 +PINB4 EQU 4 +PINB5 EQU 5 +PINB6 EQU 6 +PINB7 EQU 7 +PINC EQU 6 +PINC0 EQU 0 +PINC1 EQU 1 +PINC2 EQU 2 +PINC3 EQU 3 +PINC4 EQU 4 +PINC5 EQU 5 +PINC6 EQU 6 +PIND EQU 9 +PIND0 EQU 0 +PIND1 EQU 1 +PIND2 EQU 2 +PIND3 EQU 3 +PIND4 EQU 4 +PIND5 EQU 5 +PIND6 EQU 6 +PIND7 EQU 7 +PORF EQU 0 +PORTB EQU 5 +PORTB0 EQU 0 +PORTB1 EQU 1 +PORTB2 EQU 2 +PORTB3 EQU 3 +PORTB4 EQU 4 +PORTB5 EQU 5 +PORTB6 EQU 6 +PORTB7 EQU 7 +PORTC EQU 8 +PORTC0 EQU 0 +PORTC1 EQU 1 +PORTC2 EQU 2 +PORTC3 EQU 3 +PORTC4 EQU 4 +PORTC5 EQU 5 +PORTC6 EQU 6 +PORTD EQU 11 +PORTD0 EQU 0 +PORTD1 EQU 1 +PORTD2 EQU 2 +PORTD3 EQU 3 +PORTD4 EQU 4 +PORTD5 EQU 5 +PORTD6 EQU 6 +PORTD7 EQU 7 +PRADC EQU 0 +PRR EQU 100 +PRSPI EQU 2 +PRTIM0 EQU 5 +PRTIM1 EQU 3 +PRTIM2 EQU 6 +PRTWI EQU 7 +PRUSART0 EQU 1 +PSRASY EQU 1 +PSRSYNC EQU 0 +PUD EQU 4 +PWMCOUNTER EQU 257 +PWMHANDLER EQU 163 +RAMEND EQU 2303 +REFS0 EQU 6 +REFS1 EQU 7 +RWWSB EQU 6 +RWWSRE EQU 4 +RXB80 EQU 1 +RXC0 EQU 7 +RXCIE0 EQU 7 +RXEN0 EQU 4 +S EQU 4 +SAVESREG EQU 258 +SAVESYSCALCTEMPA EQU 259 +SAVESYSCALCTEMPB EQU 260 +SAVESYSTEMP1 EQU 261 +SAVESYSVALUECOPY EQU 262 +SE EQU 0 +SELFPRGEN EQU 0 +SM0 EQU 1 +SM1 EQU 2 +SM2 EQU 3 +SMCR EQU 51 +SP0 EQU 0 +SP1 EQU 1 +SP10 EQU 2 +SP11 EQU 3 +SP2 EQU 2 +SP3 EQU 3 +SP4 EQU 4 +SP5 EQU 5 +SP6 EQU 6 +SP7 EQU 7 +SP8 EQU 0 +SP9 EQU 1 +SPCR EQU 44 +SPDR EQU 46 +SPDR0 EQU 0 +SPDR1 EQU 1 +SPDR2 EQU 2 +SPDR3 EQU 3 +SPDR4 EQU 4 +SPDR5 EQU 5 +SPDR6 EQU 6 +SPDR7 EQU 7 +SPE EQU 6 +SPH EQU 62 +SPI2X EQU 0 +SPIE EQU 7 +SPIF EQU 7 +SPL EQU 61 +SPMCSR EQU 55 +SPMIE EQU 7 +SPR0 EQU 0 +SPR1 EQU 1 +SPSR EQU 45 +SREG EQU 63 +STARTTIMER EQU 185 +SYSDOLOOP_E1 EQU 100 +SYSDOLOOP_S1 EQU 64 +SYSFORLOOP1 EQU 67 +SYSFORLOOP2 EQU 84 +SYSFORLOOPEND1 EQU 79 +SYSFORLOOPEND2 EQU 97 +SYSINTCONTEXTRESTORE EQU 226 +SYSINTCONTEXTSAVE EQU 241 +SYSINTOFFCOUNT EQU 263 +SysCalcTempA EQU r22 +SysCalcTempB EQU r28 +SysTemp1 EQU r0 +SysTemp2 EQU r16 +SysTemp3 EQU r1 +SysValueCopy EQU r21 +SysWaitTempMS EQU r29 +SysWaitTempMS_H EQU r30 +SysWaitTempS EQU r31 +T EQU 6 +TCCR0A EQU 36 +TCCR0B EQU 37 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCCR2A EQU 176 +TCCR2B EQU 177 +TCN2UB EQU 4 +TCNT0 EQU 38 +TCNT0_0 EQU 0 +TCNT0_1 EQU 1 +TCNT0_2 EQU 2 +TCNT0_3 EQU 3 +TCNT0_4 EQU 4 +TCNT0_5 EQU 5 +TCNT0_6 EQU 6 +TCNT0_7 EQU 7 +TCNT1H EQU 133 +TCNT1H0 EQU 0 +TCNT1H1 EQU 1 +TCNT1H2 EQU 2 +TCNT1H3 EQU 3 +TCNT1H4 EQU 4 +TCNT1H5 EQU 5 +TCNT1H6 EQU 6 +TCNT1H7 EQU 7 +TCNT1L EQU 132 +TCNT1L0 EQU 0 +TCNT1L1 EQU 1 +TCNT1L2 EQU 2 +TCNT1L3 EQU 3 +TCNT1L4 EQU 4 +TCNT1L5 EQU 5 +TCNT1L6 EQU 6 +TCNT1L7 EQU 7 +TCNT2 EQU 178 +TCNT2_0 EQU 0 +TCNT2_1 EQU 1 +TCNT2_2 EQU 2 +TCNT2_3 EQU 3 +TCNT2_4 EQU 4 +TCNT2_5 EQU 5 +TCNT2_6 EQU 6 +TCNT2_7 EQU 7 +TCR2AUB EQU 1 +TCR2BUB EQU 0 +TIFR0 EQU 21 +TIFR1 EQU 22 +TIFR2 EQU 23 +TIMSK0 EQU 110 +TIMSK1 EQU 111 +TIMSK2 EQU 112 +TMR0PRES EQU 264 +TMR1PRES EQU 265 +TMR2POST EQU 266 +TMR2PRES EQU 267 +TMRNUMBER EQU 268 +TOIE0 EQU 0 +TOIE1 EQU 0 +TOIE2 EQU 0 +TOV0 EQU 0 +TOV1 EQU 0 +TOV2 EQU 0 +TSM EQU 7 +TWA0 EQU 1 +TWA1 EQU 2 +TWA2 EQU 3 +TWA3 EQU 4 +TWA4 EQU 5 +TWA5 EQU 6 +TWA6 EQU 7 +TWAM0 EQU 1 +TWAM1 EQU 2 +TWAM2 EQU 3 +TWAM3 EQU 4 +TWAM4 EQU 5 +TWAM5 EQU 6 +TWAM6 EQU 7 +TWAMR EQU 189 +TWAR EQU 186 +TWBR EQU 184 +TWBR0 EQU 0 +TWBR1 EQU 1 +TWBR2 EQU 2 +TWBR3 EQU 3 +TWBR4 EQU 4 +TWBR5 EQU 5 +TWBR6 EQU 6 +TWBR7 EQU 7 +TWCR EQU 188 +TWD0 EQU 0 +TWD1 EQU 1 +TWD2 EQU 2 +TWD3 EQU 3 +TWD4 EQU 4 +TWD5 EQU 5 +TWD6 EQU 6 +TWD7 EQU 7 +TWDR EQU 187 +TWEA EQU 6 +TWEN EQU 2 +TWGCE EQU 0 +TWIE EQU 0 +TWINT EQU 7 +TWPS0 EQU 0 +TWPS1 EQU 1 +TWS3 EQU 3 +TWS4 EQU 4 +TWS5 EQU 5 +TWS6 EQU 6 +TWS7 EQU 7 +TWSR EQU 185 +TWSTA EQU 5 +TWSTO EQU 4 +TWWC EQU 3 +TXB80 EQU 0 +TXC0 EQU 6 +TXCIE0 EQU 6 +TXEN0 EQU 3 +U2X0 EQU 1 +UBRR0 EQU 0 +UBRR0H EQU 197 +UBRR0L EQU 196 +UBRR1 EQU 1 +UBRR10 EQU 2 +UBRR11 EQU 3 +UBRR2 EQU 2 +UBRR3 EQU 3 +UBRR4 EQU 4 +UBRR5 EQU 5 +UBRR6 EQU 6 +UBRR7 EQU 7 +UBRR8 EQU 0 +UBRR9 EQU 1 +UCPOL0 EQU 0 +UCSR0A EQU 192 +UCSR0B EQU 193 +UCSR0C EQU 194 +UCSZ00 EQU 1 +UCSZ01 EQU 2 +UCSZ02 EQU 2 +UDR0 EQU 198 +UDR0-0 EQU 0 +UDR0-1 EQU 1 +UDR0-2 EQU 2 +UDR0-3 EQU 3 +UDR0-4 EQU 4 +UDR0-5 EQU 5 +UDR0-6 EQU 6 +UDR0-7 EQU 7 +UDRE0 EQU 5 +UDRIE0 EQU 5 +UMSEL00 EQU 6 +UMSEL01 EQU 7 +UPE0 EQU 2 +UPM00 EQU 4 +UPM01 EQU 5 +USBS0 EQU 3 +V EQU 3 +WCOL EQU 6 +WDCE EQU 4 +WDE EQU 3 +WDIE EQU 6 +WDIF EQU 7 +WDP0 EQU 0 +WDP1 EQU 1 +WDP2 EQU 2 +WDP3 EQU 5 +WDRF EQU 3 +WDTCSR EQU 96 +WGM00 EQU 0 +WGM01 EQU 1 +WGM02 EQU 3 +WGM10 EQU 0 +WGM11 EQU 1 +WGM12 EQU 3 +WGM13 EQU 4 +WGM20 EQU 0 +WGM21 EQU 1 +WGM22 EQU 3 +X EQU 28 +X+ EQU 29 +Y EQU 8 +Y+ EQU 25 +Z EQU 1 +Z+ EQU 17 +rZ EQU 0 + +Code: +Loc Obj Code Original Assembly +000000 0000 NOP +000001 C033 RJMP BASPROGRAMSTART +000002 0000 NOP +000003 9518 RETI +000004 0000 NOP +000005 9518 RETI +000006 0000 NOP +000007 9518 RETI +000008 0000 NOP +000009 9518 RETI +00000A 0000 NOP +00000B 9518 RETI +00000C 0000 NOP +00000D 9518 RETI +00000E 0000 NOP +00000F 9518 RETI +000010 0000 NOP +000011 9518 RETI +000012 0000 NOP +000013 C08B RJMP INTTIMER2_OVF +000014 0000 NOP +000015 9518 RETI +000016 0000 NOP +000017 9518 RETI +000018 0000 NOP +000019 9518 RETI +00001A 0000 NOP +00001B 9518 RETI +00001C 0000 NOP +00001D 9518 RETI +00001E 0000 NOP +00001F 9518 RETI +000020 0000 NOP +000021 9518 RETI +000022 0000 NOP +000023 9518 RETI +000024 0000 NOP +000025 9518 RETI +000026 0000 NOP +000027 9518 RETI +000028 0000 NOP +000029 9518 RETI +00002A 0000 NOP +00002B 9518 RETI +00002C 0000 NOP +00002D 9518 RETI +00002E 0000 NOP +00002F 9518 RETI +000030 0000 NOP +000031 9518 RETI +000032 0000 NOP +000033 9518 RETI + + +000034 0000 NOP + BASPROGRAMSTART +000035 E058 LDI SYSVALUECOPY,HIGH(RAMEND) +000036 BF5E OUT SPH, SYSVALUECOPY +000037 EF5F LDI SYSVALUECOPY,LOW(RAMEND) +000038 BF5D OUT SPL, SYSVALUECOPY +000039 D056 RCALL INITSYS +00003A 2755 CLR SYSVALUECOPY +00003B 9350 0107 STS SYSINTOFFCOUNT,SYSVALUECOPY +00003D 9478 SEI + +00003E 9A25 SBI DDRB,5 +00003F D039 RCALL INITLEDCONTROL + SYSDOLOOP_S1 +000040 EF5F LDI SYSVALUECOPY,255 +000041 9350 0100 STS LEDSPEED,SYSVALUECOPY + SYSFORLOOP1 +000043 9000 0100 LDS SYSTEMP1,LEDSPEED +000045 9403 INC SYSTEMP1 +000046 9200 0100 STS LEDSPEED,SYSTEMP1 +000048 E1D9 LDI SYSWAITTEMPMS,25 +000049 E0E0 LDI SYSWAITTEMPMS_H,0 +00004A D01C RCALL DELAY_MS +00004B 9160 0100 LDS SYSCALCTEMPA,LEDSPEED +00004D 3664 CPI SYSCALCTEMPA,100 +00004E F3A0 BRLO SYSFORLOOP1 + SYSFORLOOPEND1 +00004F E0F1 LDI SYSWAITTEMPS,1 +000050 D022 RCALL DELAY_S +000051 E655 LDI SYSVALUECOPY,101 +000052 9350 0100 STS LEDSPEED,SYSVALUECOPY + SYSFORLOOP2 +000054 9000 0100 LDS SYSTEMP1,LEDSPEED +000056 940A DEC SYSTEMP1 +000057 9200 0100 STS LEDSPEED,SYSTEMP1 +000059 E1D9 LDI SYSWAITTEMPMS,25 +00005A E0E0 LDI SYSWAITTEMPMS_H,0 +00005B D00B RCALL DELAY_MS +00005C E060 LDI SYSCALCTEMPA,0 +00005D 91C0 0100 LDS SYSCALCTEMPB,LEDSPEED +00005F 176C CP SYSCALCTEMPA,SYSCALCTEMPB +000060 F398 BRLO SYSFORLOOP2 + SYSFORLOOPEND2 +000061 E0F1 LDI SYSWAITTEMPS,1 +000062 D010 RCALL DELAY_S +000063 CFDC RJMP SYSDOLOOP_S1 + SYSDOLOOP_E1 +000064 C000 RJMP BASPROGRAMEND + BASPROGRAMEND +000065 9588 SLEEP +000066 CFFE RJMP BASPROGRAMEND + + + DELAY_MS +000067 95E3 INC SYSWAITTEMPMS_H + DMS_START +000068 EFAE LDI DELAYTEMP2,254 + DMS_OUTER +000069 E194 LDI DELAYTEMP,20 + DMS_INNER +00006A 959A DEC DELAYTEMP +00006B F7F1 BRNE DMS_INNER +00006C 95AA DEC DELAYTEMP2 +00006D F7D9 BRNE DMS_OUTER +00006E 95DA DEC SYSWAITTEMPMS +00006F F7C1 BRNE DMS_START +000070 95EA DEC SYSWAITTEMPMS_H +000071 F7B1 BRNE DMS_START +000072 9508 RET + + + DELAY_S + DS_START +000073 EED8 LDI SYSWAITTEMPMS,232 +000074 E0E3 LDI SYSWAITTEMPMS_H,3 +000075 DFF1 RCALL DELAY_MS +000076 95FA DEC SYSWAITTEMPS +000077 F7D9 BRNE DS_START +000078 9508 RET + + + INITLEDCONTROL +000079 982D CBI PORTB,5 +00007A E050 LDI SYSVALUECOPY,0 +00007B 9350 0100 STS LEDSPEED,SYSVALUECOPY +00007D E050 LDI SYSVALUECOPY,0 +00007E 9350 0101 STS PWMCOUNTER,SYSVALUECOPY +000080 9150 0070 LDS SYSVALUECOPY,TIMSK2 +000082 6051 SBR SYSVALUECOPY,1< + +Node-6: + + +Oscope-5: + + +Resistor-4: + + +Ground (0 V)-3: + + +Led-2: + + +atmega328-1: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +Connector-14: + + +PlotterWidget-50: + + +SerialPortWidget-51: + + + diff --git a/resources/examples/Avr/glcd8544_mega168/glcd8544.h b/resources/examples/Avr/glcd8544_mega168/glcd8544.h new file mode 100644 index 0000000..a9405db --- /dev/null +++ b/resources/examples/Avr/glcd8544_mega168/glcd8544.h @@ -0,0 +1,266 @@ +'USART settings +'#define USART_BAUD_RATE 9600 +'#define USART_BLOCKING +'#define USART_TX_BLOCKING + +'#define GLCD_RESET 8 ' LCD RST .... Pin 1 +'#define GLCD_DC 0 ' LCD Dat/Com. Pin 5 +'#define GLCD_SDIN 1 ' LCD SPIDat . Pin 6 +'#define GLCD_SCLK 3 ' LCD SPIClk . Pin 4 + +#define LCD_X 84 +#define LCD_Y 48 + +#define LCD_COM 0 +#define LCD_DAT 1 + + +Sub InitGlcd + + Set GLCD_RESET Off + wait 100 ms + Set GLCD_RESET On + + GlcdWrite( LCD_COM, 0x21 ) ' LCD Extended Commands + GlcdWrite( LCD_COM, 0xBf ) ' Set LCD Vop Contrast. 'B1 + GlcdWrite( LCD_COM, 0x04 ) ' Set Temp coefficent. '0x04 + GlcdWrite( LCD_COM, 0x14 ) ' LCD bias mode 1:48. '0x13 + GlcdWrite( LCD_COM, 0x0C ) ' LCD in normal mode. 0x0d for inverse + GlcdWrite( LCD_COM, 0x20 ) + GlcdWrite( LCD_COM, 0x0C ) +End Sub + +Sub GlcdWrite( Glcdcomdat, Glcddat ) + + if Glcdcomdat=1 then ' Is data + Set GLCD_DC On + else + Set GLCD_DC Off + end if + repeat 8 ' Send byte to lcd + Set GLCD_SCLK Off + 'wait 1 us + if Glcddat.7=1 then + Set GLCD_SDIN On + else + Set GLCD_SDIN Off + end if + rotate Glcddat left + + Set GLCD_SCLK On + 'wait 1 us + end repeat +End Sub + +Sub GlcdClear + repeat 503 + GlcdWrite( LCD_DAT, 0x00 ) + end repeat +End Sub + +Sub GlcdCharacter( Glcdchar ) + + if Glcdchar < 0x50 then + Glcdchar = (Glcdchar-0x20)*5 + repeat 5 + Glcdchar += 1 + ReadTable ascii_table_L, Glcdchar, charLine + GlcdWrite( LCD_DAT, charLine ) + end repeat + else + Glcdchar = (Glcdchar-0x50)*5 + repeat 5 + Glcdchar += 1 + ReadTable ascii_table_H, Glcdchar, charLine + GlcdWrite( LCD_DAT, charLine ) + end repeat + end if + GlcdWrite( LCD_DAT, 0x00 ) +End Sub + +Sub GlcdPrint( in GlcdstrDat as string ) + + for GlcdIndex=1 to GlcdstrDat(0) + GlcdCharacter( GlcdstrDat( GlcdIndex ) ) + next +End Sub + +Sub GlcdPrint( In GlcdNumberI as Integer ) + + if GlcdNumberI < 0 then + GlcdPrint( "-" ) + GlcdNumberI = -GlcdNumberI; + end if + GlcdPrintFa( GlcdNumberI ) +End Sub + +Sub GlcdPrint( In GlcdNumber as long ) + + GlcdPrintFa( GlcdNumber ) +End Sub + +Sub GlcdPrintFa( in GlcdNumber as long ) + + Dim GlcdNum(10) + + for GlcdIndex=10 to 1 'Process digits + GlcdNum(GlcdIndex) = GlcdNumber%10 + GlcdNumber = GlcdNumber/10 + next + Do while GlcdNum(GlcdIndex)=0 'Find first non cero + GlcdIndex += 1 + Loop + Do while GlcdIndex < 11 'Print number + GlcdCharacter( GlcdNum(GlcdIndex)+0x30 ) + GlcdIndex += 1 + Loop +End Sub + +Sub GlcdGotoXY( In Glcdp_x, In Glcdp_y ) + + GlcdWrite( LCD_COM, (0x80 | Glcdp_x) ) ' Column + GlcdWrite( LCD_COM, (0x40 | Glcdp_y) ) ' Row +End Sub + +Sub GlcdDrawPixel( In Glcdp_x, In Glcdp_y ) + + ReadTable pix_table, Glcdp_y%8+1, Glcdpix + Glcdp_y = Glcdp_y/8 + GlcdGotoXY( Glcdp_x, Glcdp_y ) + + GlcdWrite( LCD_DAT, Glcdpix ) +End Sub + +Sub GlcdDrawFrame 'draw display frame + + for GlcdIndex=0 to 83 ' Top + GlcdGotoXY( GlcdIndex, 0 ) + GlcdWrite( LCD_DAT, 0x01 ) + next + for GlcdIndex=0 to 83 'Bottom + GlcdGotoXY( GlcdIndex, 5 ) + GlcdWrite( LCD_DAT, 0x80 ) + next + for GlcdIndex=0 to 5 ' Right + GlcdGotoXY( 83, GlcdIndex ) + GlcdWrite( LCD_DAT, 0xff ) + next + for GlcdIndex=0 to 5 ' Left + GlcdGotoXY( 0, GlcdIndex ) + GlcdWrite( LCD_DAT, 0xff) + next +End Sub + +Table ascii_table_L +0x00, 0x00, 0x00, 0x00, 0x00 ' 20 +0x00, 0x00, 0x5f, 0x00, 0x00 ' 21 ! +0x00, 0x07, 0x00, 0x07, 0x00 ' 22 " +0x14, 0x7f, 0x14, 0x7f, 0x14 ' 23 # +0x24, 0x2a, 0x7f, 0x2a, 0x12 ' 24 $ +0x23, 0x13, 0x08, 0x64, 0x62 ' 25 % +0x36, 0x49, 0x55, 0x22, 0x50 ' 26 & +0x00, 0x05, 0x03, 0x00, 0x00 ' 27 +0x00, 0x1c, 0x22, 0x41, 0x00 ' 28 ( +0x00, 0x41, 0x22, 0x1c, 0x00 ' 29 ) +0x14, 0x08, 0x3e, 0x08, 0x14 ' 2a * +0x08, 0x08, 0x3e, 0x08, 0x08 ' 2b + +0x00, 0x50, 0x30, 0x00, 0x00 ' 2c , +0x08, 0x08, 0x08, 0x08, 0x08 ' 2d - +0x00, 0x60, 0x60, 0x00, 0x00 ' 2e . +0x20, 0x10, 0x08, 0x04, 0x02 ' 2f / +0x3e, 0x51, 0x49, 0x45, 0x3e ' 30 0 +0x00, 0x42, 0x7f, 0x40, 0x00 ' 31 1 +0x42, 0x61, 0x51, 0x49, 0x46 ' 32 2 +0x21, 0x41, 0x45, 0x4b, 0x31 ' 33 3 +0x18, 0x14, 0x12, 0x7f, 0x10 ' 34 4 +0x27, 0x45, 0x45, 0x45, 0x39 ' 35 5 +0x3c, 0x4a, 0x49, 0x49, 0x30 ' 36 6 +0x01, 0x71, 0x09, 0x05, 0x03 ' 37 7 +0x36, 0x49, 0x49, 0x49, 0x36 ' 38 8 +0x06, 0x49, 0x49, 0x29, 0x1e ' 39 9 +0x00, 0x36, 0x36, 0x00, 0x00 ' 3a : +0x00, 0x56, 0x36, 0x00, 0x00 ' 3b , +0x08, 0x14, 0x22, 0x41, 0x00 ' 3c < +0x14, 0x14, 0x14, 0x14, 0x14 ' 3d = +0x00, 0x41, 0x22, 0x14, 0x08 ' 3e > +0x02, 0x01, 0x51, 0x09, 0x06 ' 3f ? +0x32, 0x49, 0x79, 0x41, 0x3e ' 40 @ +0x7e, 0x11, 0x11, 0x11, 0x7e ' 41 A +0x7f, 0x49, 0x49, 0x49, 0x36 ' 42 B +0x3e, 0x41, 0x41, 0x41, 0x22 ' 43 C +0x7f, 0x41, 0x41, 0x22, 0x1c ' 44 D +0x7f, 0x49, 0x49, 0x49, 0x41 ' 45 E +0x7f, 0x09, 0x09, 0x09, 0x01 ' 46 F +0x3e, 0x41, 0x49, 0x49, 0x7a ' 47 G +0x7f, 0x08, 0x08, 0x08, 0x7f ' 48 H +0x00, 0x41, 0x7f, 0x41, 0x00 ' 49 I +0x20, 0x40, 0x41, 0x3f, 0x01 ' 4a J +0x7f, 0x08, 0x14, 0x22, 0x41 ' 4b K +0x7f, 0x40, 0x40, 0x40, 0x40 ' 4c L +0x7f, 0x02, 0x0c, 0x02, 0x7f ' 4d M +0x7f, 0x04, 0x08, 0x10, 0x7f ' 4e N +0x3e, 0x41, 0x41, 0x41, 0x3e ' 4f O +End Table + +Table ascii_table_H +0x7f, 0x09, 0x09, 0x09, 0x06 ' 50 P +0x3e, 0x41, 0x51, 0x21, 0x5e ' 51 Q +0x7f, 0x09, 0x19, 0x29, 0x46 ' 52 R +0x46, 0x49, 0x49, 0x49, 0x31 ' 53 S +0x01, 0x01, 0x7f, 0x01, 0x01 ' 54 T +0x3f, 0x40, 0x40, 0x40, 0x3f ' 55 U +0x1f, 0x20, 0x40, 0x20, 0x1f ' 56 V +0x3f, 0x40, 0x38, 0x40, 0x3f ' 57 W +0x63, 0x14, 0x08, 0x14, 0x63 ' 58 X +0x07, 0x08, 0x70, 0x08, 0x07 ' 59 Y +0x61, 0x51, 0x49, 0x45, 0x43 ' 5a Z +0x00, 0x7f, 0x41, 0x41, 0x00 ' 5b [ +0x02, 0x04, 0x08, 0x10, 0x20 ' 5c ¥ +0x00, 0x41, 0x41, 0x7f, 0x00 ' 5d ] +0x04, 0x02, 0x01, 0x02, 0x04 ' 5e ^ +0x40, 0x40, 0x40, 0x40, 0x40 ' 5f _ +0x00, 0x01, 0x02, 0x04, 0x00 ' 60 ` +0x20, 0x54, 0x54, 0x54, 0x78 ' 61 a +0x7f, 0x48, 0x44, 0x44, 0x38 ' 62 b +0x38, 0x44, 0x44, 0x44, 0x20 ' 63 c +0x38, 0x44, 0x44, 0x48, 0x7f ' 64 d +0x38, 0x54, 0x54, 0x54, 0x18 ' 65 e +0x08, 0x7e, 0x09, 0x01, 0x02 ' 66 f +0x0c, 0x52, 0x52, 0x52, 0x3e ' 67 g +0x7f, 0x08, 0x04, 0x04, 0x78 ' 68 h +0x00, 0x44, 0x7d, 0x40, 0x00 ' 69 i +0x20, 0x40, 0x44, 0x3d, 0x00 ' 6a j +0x7f, 0x10, 0x28, 0x44, 0x00 ' 6b k +0x00, 0x41, 0x7f, 0x40, 0x00 ' 6c l +0x7c, 0x04, 0x18, 0x04, 0x78 ' 6d m +0x7c, 0x08, 0x04, 0x04, 0x78 ' 6e n +0x38, 0x44, 0x44, 0x44, 0x38 ' 6f o +0x7c, 0x14, 0x14, 0x14, 0x08 ' 70 p +0x08, 0x14, 0x14, 0x18, 0x7c ' 71 q +0x7c, 0x08, 0x04, 0x04, 0x08 ' 72 r +0x48, 0x54, 0x54, 0x54, 0x20 ' 73 s +0x04, 0x3f, 0x44, 0x40, 0x20 ' 74 t +0x3c, 0x40, 0x40, 0x20, 0x7c ' 75 u +0x1c, 0x20, 0x40, 0x20, 0x1c ' 76 v +0x3c, 0x40, 0x30, 0x40, 0x3c ' 77 w +0x44, 0x28, 0x10, 0x28, 0x44 ' 78 x +0x0c, 0x50, 0x50, 0x50, 0x3c ' 79 y +0x44, 0x64, 0x54, 0x4c, 0x44 ' 7a z +0x00, 0x08, 0x36, 0x41, 0x00 ' 7b { +0x00, 0x00, 0x7f, 0x00, 0x00 ' 7c | +0x00, 0x41, 0x36, 0x08, 0x00 ' 7d , +0x10, 0x08, 0x08, 0x10, 0x08 ' 7e ← +0x00, 0x06, 0x09, 0x09, 0x06 ' 7f → +End Table + +Table pix_table +b'00000001' +b'00000010' +b'00000100' +b'00001000' +b'00010000' +b'00100000' +b'01000000' +b'10000000' +End Table + diff --git a/resources/examples/Avr/glcd8544_mega168/glcd8544_mega168.asm b/resources/examples/Avr/glcd8544_mega168/glcd8544_mega168.asm new file mode 100644 index 0000000..fa3442b --- /dev/null +++ b/resources/examples/Avr/glcd8544_mega168/glcd8544_mega168.asm @@ -0,0 +1,831 @@ +;Program compiled by Great Cow BASIC (0.94 2015-10-27) +;Need help? See the GCBASIC forums at http://sourceforge.net/projects/gcbasic/forums, +;check the documentation or email w_cholmondeley at users dot sourceforge dot net. + +;******************************************************************************** + +;Chip Model: MEGA168 +;Assembler header file +.INCLUDE "m168def.inc" + +;SREG bit names (for AVR Assembler compatibility, GCBASIC uses different names) +#define I 7 +#define T 6 +#define H 5 +#define S 4 +#define V 3 +#define N 2 +#define Z 1 +#define C 0 + +;******************************************************************************** + +;Set aside memory locations for variables +.EQU SYSSTRINGPARAM1=256 +.EQU CC_X=296 +.EQU CHARLINE=297 +.EQU C_X=298 +.EQU C_Y=299 +.EQU D_X=300 +.EQU D_Y=301 +.EQU GLCDCHAR=302 +.EQU GLCDCOMDAT=303 +.EQU GLCDDAT=304 +.EQU GLCDINDEX=305 +.EQU GLCDP_X=306 +.EQU GLCDP_Y=307 +.EQU SYSPOINTERX=308 +.EQU StringPointer=309 +.EQU SysGLCDSTRDATHandler=310 +.EQU SysGLCDSTRDATHandler_H=311 +.EQU SysRepeatTemp1=312 +.EQU SysRepeatTemp2=313 +.EQU SysRepeatTemp3=314 +.EQU SysRepeatTemp3_H=315 +.EQU SysRepeatTemp4=316 + +;******************************************************************************** + +;Register variables +.DEF DELAYTEMP=r25 +.DEF DELAYTEMP2=r26 +.DEF SYSCALCTEMPX=r0 +.DEF SYSSTRINGLENGTH=r25 +.DEF SysBYTETempA=r22 +.DEF SysBYTETempB=r28 +.DEF SysBYTETempX=r0 +.DEF SysBitTest=r5 +.DEF SysCalcTempA=r22 +.DEF SysCalcTempB=r28 +.DEF SysReadA=r30 +.DEF SysReadA_H=r31 +.DEF SysStringA=r26 +.DEF SysStringA_H=r27 +.DEF SysStringB=r28 +.DEF SysStringB_H=r29 +.DEF SysValueCopy=r21 +.DEF SysWaitTempMS=r29 +.DEF SysWaitTempMS_H=r30 +.DEF SysWaitTempS=r31 +.DEF SysTemp1=r1 +.DEF SysTemp1_H=r2 +.DEF SysTemp2=r16 +.DEF SysTemp3=r17 + +;******************************************************************************** + +;Vectors +;Interrupt vectors + nop + rjmp BASPROGRAMSTART ;Reset + nop + reti ;INT0 + nop + reti ;INT1 + nop + reti ;PCINT0 + nop + reti ;PCINT1 + nop + reti ;PCINT2 + nop + reti ;WDT + nop + reti ;TIMER2_COMPA + nop + reti ;TIMER2_COMPB + nop + reti ;TIMER2_OVF + nop + reti ;TIMER1_CAPT + nop + reti ;TIMER1_COMPA + nop + reti ;TIMER1_COMPB + nop + reti ;TIMER1_OVF + nop + reti ;TIMER0_COMPA + nop + reti ;TIMER0_COMPB + nop + reti ;TIMER0_OVF + nop + reti ;SPI_STC + nop + reti ;USART_RX + nop + reti ;USART_UDRE + nop + reti ;USART_TX + nop + reti ;ADC + nop + reti ;EE_READY + nop + reti ;ANALOG_COMP + nop + reti ;TWI + nop + reti ;SPM_READY + +;******************************************************************************** + +;Start of program memory page 0 +nop +BASPROGRAMSTART: +;Initialise stack + ldi SysValueCopy,high(RAMEND) + out SPH, SysValueCopy + ldi SysValueCopy,low(RAMEND) + out SPL, SysValueCopy +;Call initialisation routines + rcall INITSYS +;Automatic pin direction setting + sbi DDRB,5 + sbi DDRB,4 + sbi DDRB,3 + sbi DDRB,2 + sbi DDRB,0 + sbi DDRB,7 + sbi DDRB,6 + +;Start of the main program + cbi PORTB,3 + cbi PORTB,2 + rcall INITGLCD + ldi SysValueCopy,3 + sts SysRepeatTemp1,SysValueCopy +SysRepeatLoop1: + cbi PORTB,3 + sbi PORTB,2 + rcall GLCDCLEAR + ldi SysWaitTempMS,244 + ldi SysWaitTempMS_H,1 + rcall Delay_MS + sbi PORTB,3 + cbi PORTB,2 + rcall GLCDCLEAR + ldi SysWaitTempMS,244 + ldi SysWaitTempMS_H,1 + rcall Delay_MS + cbi PORTB,3 + sbi PORTB,2 + rcall GLCDCLEAR + rcall GLCDDRAWFRAME + ldi SysValueCopy,1 + sts GLCDP_X,SysValueCopy + ldi SysValueCopy,1 + sts GLCDP_Y,SysValueCopy + rcall GLCDGOTOXY + ldi SysStringB,low(SYSSTRINGPARAM1) + ldi SysStringB_H,high(SYSSTRINGPARAM1) + ldi SysReadA,low(StringTable1<<1) + ldi SysReadA_H,high(StringTable1<<1) + rcall SysReadString + ldi SysValueCopy,low(SYSSTRINGPARAM1) + sts SysGLCDSTRDATHandler,SysValueCopy + ldi SysValueCopy,high(SYSSTRINGPARAM1) + sts SysGLCDSTRDATHandler_H,SysValueCopy + rcall GLCDPRINT9 + ldi SysWaitTempMS,244 + ldi SysWaitTempMS_H,1 + rcall Delay_MS + sbi PORTB,3 + cbi PORTB,2 + rcall GLCDCLEAR + rcall GLCDDRAWFRAME + rcall GLCDDRAWFRAME + ldi SysValueCopy,1 + sts GLCDP_X,SysValueCopy + ldi SysValueCopy,1 + sts GLCDP_Y,SysValueCopy + rcall GLCDGOTOXY + ldi SysStringB,low(SYSSTRINGPARAM1) + ldi SysStringB_H,high(SYSSTRINGPARAM1) + ldi SysReadA,low(StringTable2<<1) + ldi SysReadA_H,high(StringTable2<<1) + rcall SysReadString + ldi SysValueCopy,low(SYSSTRINGPARAM1) + sts SysGLCDSTRDATHandler,SysValueCopy + ldi SysValueCopy,high(SYSSTRINGPARAM1) + sts SysGLCDSTRDATHandler_H,SysValueCopy + rcall GLCDPRINT9 + ldi SysWaitTempMS,244 + ldi SysWaitTempMS_H,1 + rcall Delay_MS + lds SysTemp1,SysRepeatTemp1 + dec SysTemp1 + sts SysRepeatTemp1,SysTemp1 + breq PC + 2 + rjmp SysRepeatLoop1 +SysRepeatLoopEnd1: + ldi SysWaitTempS,1 + rcall Delay_S + ldi SysValueCopy,0 + sts CC_X,SysValueCopy + ldi SysValueCopy,0 + sts C_X,SysValueCopy + ldi SysValueCopy,0 + sts C_Y,SysValueCopy + ldi SysValueCopy,0 + sts D_X,SysValueCopy + ldi SysValueCopy,0 + sts D_Y,SysValueCopy +SysDoLoop_S1: + sbi PORTB,0 + rcall ANIMATE + ldi SysWaitTempMS,200 + ldi SysWaitTempMS_H,0 + rcall Delay_MS + cbi PORTB,0 + rcall ANIMATE + ldi SysWaitTempMS,200 + ldi SysWaitTempMS_H,0 + rcall Delay_MS + rjmp SysDoLoop_S1 +SysDoLoop_E1: +BASPROGRAMEND: + sleep + rjmp BASPROGRAMEND + +;******************************************************************************** + +ANIMATE: + ldi SysCalcTempA,78 + lds SysCalcTempB,C_X + cp SysCalcTempA,SysCalcTempB + brsh ELSE1_1 + sbi PORTB,3 + cbi PORTB,2 + rjmp ENDIF1 +ELSE1_1: + cbi PORTB,3 + sbi PORTB,2 +ENDIF1: + lds SysValueCopy,CC_X + sts GLCDP_X,SysValueCopy + lds SysValueCopy,C_Y + sts GLCDP_Y,SysValueCopy + rcall GLCDGOTOXY + ldi SysStringB,low(SYSSTRINGPARAM1) + ldi SysStringB_H,high(SYSSTRINGPARAM1) + ldi SysReadA,low(StringTable3<<1) + ldi SysReadA_H,high(StringTable3<<1) + rcall SysReadString + ldi SysValueCopy,low(SYSSTRINGPARAM1) + sts SysGLCDSTRDATHandler,SysValueCopy + ldi SysValueCopy,high(SYSSTRINGPARAM1) + sts SysGLCDSTRDATHandler_H,SysValueCopy + rcall GLCDPRINT9 + lds SysCalcTempA,D_X + tst SysCalcTempA + brne ELSE2_1 + lds SysTemp1,C_X + ldi SysTemp2,6 + add SysTemp1,SysTemp2 + sts C_X,SysTemp1 + rjmp ENDIF2 +ELSE2_1: + lds SysTemp1,C_X + ldi SysTemp2,6 + sub SysTemp1,SysTemp2 + sts C_X,SysTemp1 +ENDIF2: + lds SysCalcTempA,D_Y + tst SysCalcTempA + brne ELSE3_1 + lds SysTemp1,C_Y + inc SysTemp1 + sts C_Y,SysTemp1 + rjmp ENDIF3 +ELSE3_1: + lds SysTemp1,C_Y + dec SysTemp1 + sts C_Y,SysTemp1 +ENDIF3: + lds SysCalcTempA,C_Y + cpi SysCalcTempA,5 + brne ENDIF4 + ldi SysValueCopy,1 + sts D_Y,SysValueCopy +ENDIF4: + lds SysCalcTempA,C_Y + tst SysCalcTempA + brne ENDIF5 + ldi SysValueCopy,0 + sts D_Y,SysValueCopy +ENDIF5: + lds SysCalcTempA,C_X + cpi SysCalcTempA,162 + brne ENDIF6 + ldi SysValueCopy,1 + sts D_X,SysValueCopy +ENDIF6: + lds SysCalcTempA,C_X + tst SysCalcTempA + brne ENDIF7 + ldi SysValueCopy,0 + sts D_X,SysValueCopy +ENDIF7: + ldi SysCalcTempA,78 + lds SysCalcTempB,C_X + cp SysCalcTempA,SysCalcTempB + brsh ELSE8_1 + lds SysTemp1,C_X + ldi SysTemp2,84 + sub SysTemp1,SysTemp2 + sts CC_X,SysTemp1 + sbi PORTB,3 + cbi PORTB,2 + rjmp ENDIF8 +ELSE8_1: + lds SysValueCopy,C_X + sts CC_X,SysValueCopy + cbi PORTB,3 + sbi PORTB,2 +ENDIF8: + lds SysValueCopy,CC_X + sts GLCDP_X,SysValueCopy + lds SysValueCopy,C_Y + sts GLCDP_Y,SysValueCopy + rcall GLCDGOTOXY + ldi SysStringB,low(SYSSTRINGPARAM1) + ldi SysStringB_H,high(SYSSTRINGPARAM1) + ldi SysReadA,low(StringTable4<<1) + ldi SysReadA_H,high(StringTable4<<1) + rcall SysReadString + ldi SysValueCopy,low(SYSSTRINGPARAM1) + sts SysGLCDSTRDATHandler,SysValueCopy + ldi SysValueCopy,high(SYSSTRINGPARAM1) + sts SysGLCDSTRDATHandler_H,SysValueCopy + rjmp GLCDPRINT9 + +;******************************************************************************** + +ASCII_TABLE_H: + cpi SysStringA, 241 + brlo PC + 3 + clr SysByteTempX + ret + ldi SysReadA, low(TableASCII_TABLE_H<<1) + ldi SysReadA_H, high(TableASCII_TABLE_H<<1) + add SysReadA, SysStringA + brcc PC + 2 + inc SysReadA_H + lpm + ret +TableASCII_TABLE_H: + .DB 240,127,9,9,9,6,62,65,81,33,94,127,9,25,41,70,70,73,73,73,49,1,1,127,1,1,63,64 + .DB 64,64,63,31,32,64,32,31,63,64,56,64,63,99,20,8,20,99,7,8,112,8,7,97,81,73,69,67 + .DB 0,127,65,65,0,2,4,8,16,32,0,65,65,127,0,4,2,1,2,4,64,64,64,64,64,0,1,2,4,0,32,84 + .DB 84,84,120,127,72,68,68,56,56,68,68,68,32,56,68,68,72,127,56,84,84,84,24,8,126,9 + .DB 1,2,12,82,82,82,62,127,8,4,4,120,0,68,125,64,0,32,64,68,61,0,127,16,40,68,0,0 + .DB 65,127,64,0,124,4,24,4,120,124,8,4,4,120,56,68,68,68,56,124,20,20,20,8,8,20,20,24 + .DB 124,124,8,4,4,8,72,84,84,84,32,4,63,68,64,32,60,64,64,32,124,28,32,64,32,28,60,64 + .DB 48,64,60,68,40,16,40,68,12,80,80,80,60,68,100,84,76,68,0,8,54,65,0,0,0,127,0,0 + .DB 0,65,54,8,0,16,8,8,16,8,0,6,9,9,6 + +;******************************************************************************** + +ASCII_TABLE_L: + cpi SysStringA, 241 + brlo PC + 3 + clr SysByteTempX + ret + ldi SysReadA, low(TableASCII_TABLE_L<<1) + ldi SysReadA_H, high(TableASCII_TABLE_L<<1) + add SysReadA, SysStringA + brcc PC + 2 + inc SysReadA_H + lpm + ret +TableASCII_TABLE_L: + .DB 240,0,0,0,0,0,0,0,95,0,0,0,7,0,7,0,20,127,20,127,20,36,42,127,42,18,35,19,8,100 + .DB 98,54,73,85,34,80,0,5,3,0,0,0,28,34,65,0,0,65,34,28,0,20,8,62,8,20,8,8,62,8,8,0 + .DB 80,48,0,0,8,8,8,8,8,0,96,96,0,0,32,16,8,4,2,62,81,73,69,62,0,66,127,64,0,66,97,81 + .DB 73,70,33,65,69,75,49,24,20,18,127,16,39,69,69,69,57,60,74,73,73,48,1,113,9,5,3,54 + .DB 73,73,73,54,6,73,73,41,30,0,54,54,0,0,0,86,54,0,0,8,20,34,65,0,20,20,20,20,20,0 + .DB 65,34,20,8,2,1,81,9,6,50,73,121,65,62,126,17,17,17,126,127,73,73,73,54,62,65,65,65 + .DB 34,127,65,65,34,28,127,73,73,73,65,127,9,9,9,1,62,65,73,73,122,127,8,8,8,127,0,65 + .DB 127,65,0,32,64,65,63,1,127,8,20,34,65,127,64,64,64,64,127,2,12,2,127,127,4,8,16,127 + .DB 62,65,65,65,62 + +;******************************************************************************** + +Delay_MS: + inc SysWaitTempMS_H +DMS_START: + ldi DELAYTEMP2,254 +DMS_OUTER: + ldi DELAYTEMP,20 +DMS_INNER: + dec DELAYTEMP + brne DMS_INNER + dec DELAYTEMP2 + brne DMS_OUTER + dec SysWaitTempMS + brne DMS_START + dec SysWaitTempMS_H + brne DMS_START + ret + +;******************************************************************************** + +Delay_S: +DS_START: + ldi SysWaitTempMS,232 + ldi SysWaitTempMS_H,3 + rcall Delay_MS + dec SysWaitTempS + brne DS_START + ret + +;******************************************************************************** + +GLCDCHARACTER: + lds SysCalcTempA,GLCDCHAR + cpi SysCalcTempA,80 + brsh ELSE17_1 + lds SysTemp2,GLCDCHAR + ldi SysTemp3,32 + sub SysTemp2,SysTemp3 + mov SysTemp1,SysTemp2 + mov SysBYTETempA,SysTemp1 + ldi SysBYTETempB,5 + mul SysByteTempA,SysByteTempB + sts GLCDCHAR,SysByteTempX + ldi SysValueCopy,5 + sts SysRepeatTemp4,SysValueCopy +SysRepeatLoop4: + lds SysTemp1,GLCDCHAR + inc SysTemp1 + sts GLCDCHAR,SysTemp1 + lds SysStringA,GLCDCHAR + rcall ASCII_TABLE_L + sts CHARLINE,SysByteTempX + ldi SysValueCopy,1 + sts GLCDCOMDAT,SysValueCopy + lds SysValueCopy,CHARLINE + sts GLCDDAT,SysValueCopy + rcall GLCDWRITE + lds SysValueCopy,GLCDDAT + sts CHARLINE,SysValueCopy + lds SysTemp1,SysRepeatTemp4 + dec SysTemp1 + sts SysRepeatTemp4,SysTemp1 + brne SysRepeatLoop4 +SysRepeatLoopEnd4: + rjmp ENDIF17 +ELSE17_1: + lds SysTemp2,GLCDCHAR + ldi SysTemp3,80 + sub SysTemp2,SysTemp3 + mov SysTemp1,SysTemp2 + mov SysBYTETempA,SysTemp1 + ldi SysBYTETempB,5 + mul SysByteTempA,SysByteTempB + sts GLCDCHAR,SysByteTempX + ldi SysValueCopy,5 + sts SysRepeatTemp4,SysValueCopy +SysRepeatLoop5: + lds SysTemp1,GLCDCHAR + inc SysTemp1 + sts GLCDCHAR,SysTemp1 + lds SysStringA,GLCDCHAR + rcall ASCII_TABLE_H + sts CHARLINE,SysByteTempX + ldi SysValueCopy,1 + sts GLCDCOMDAT,SysValueCopy + lds SysValueCopy,CHARLINE + sts GLCDDAT,SysValueCopy + rcall GLCDWRITE + lds SysValueCopy,GLCDDAT + sts CHARLINE,SysValueCopy + lds SysTemp1,SysRepeatTemp4 + dec SysTemp1 + sts SysRepeatTemp4,SysTemp1 + brne SysRepeatLoop5 +SysRepeatLoopEnd5: +ENDIF17: + ldi SysValueCopy,1 + sts GLCDCOMDAT,SysValueCopy + ldi SysValueCopy,0 + sts GLCDDAT,SysValueCopy + rjmp GLCDWRITE + +;******************************************************************************** + +GLCDCLEAR: + ldi SysValueCopy,247 + sts SysRepeatTemp3,SysValueCopy + ldi SysValueCopy,2 + sts SysRepeatTemp3_H,SysValueCopy +SysRepeatLoop3: + ldi SysValueCopy,1 + sts GLCDCOMDAT,SysValueCopy + ldi SysValueCopy,0 + sts GLCDDAT,SysValueCopy + rcall GLCDWRITE + lds SysTemp1,SysRepeatTemp3 + lds SysTemp1_H,SysRepeatTemp3_H + dec SysTemp1 + sts SysRepeatTemp3,SysTemp1 + brne SysRepeatLoop3 + dec SysTemp1_H + sts SysRepeatTemp3_H,SysTemp1_H + brne SysRepeatLoop3 +SysRepeatLoopEnd3: + ret + +;******************************************************************************** + +GLCDDRAWFRAME: + ldi SysValueCopy,255 + sts GLCDINDEX,SysValueCopy +SysForLoop2: + lds SysTemp1,GLCDINDEX + inc SysTemp1 + sts GLCDINDEX,SysTemp1 + lds SysValueCopy,GLCDINDEX + sts GLCDP_X,SysValueCopy + ldi SysValueCopy,0 + sts GLCDP_Y,SysValueCopy + rcall GLCDGOTOXY + ldi SysValueCopy,1 + sts GLCDCOMDAT,SysValueCopy + ldi SysValueCopy,1 + sts GLCDDAT,SysValueCopy + rcall GLCDWRITE + lds SysCalcTempA,GLCDINDEX + cpi SysCalcTempA,83 + brlo SysForLoop2 +SysForLoopEnd2: + ldi SysValueCopy,255 + sts GLCDINDEX,SysValueCopy +SysForLoop3: + lds SysTemp1,GLCDINDEX + inc SysTemp1 + sts GLCDINDEX,SysTemp1 + lds SysValueCopy,GLCDINDEX + sts GLCDP_X,SysValueCopy + ldi SysValueCopy,5 + sts GLCDP_Y,SysValueCopy + rcall GLCDGOTOXY + ldi SysValueCopy,1 + sts GLCDCOMDAT,SysValueCopy + ldi SysValueCopy,128 + sts GLCDDAT,SysValueCopy + rcall GLCDWRITE + lds SysCalcTempA,GLCDINDEX + cpi SysCalcTempA,83 + brlo SysForLoop3 +SysForLoopEnd3: + ldi SysValueCopy,255 + sts GLCDINDEX,SysValueCopy +SysForLoop4: + lds SysTemp1,GLCDINDEX + inc SysTemp1 + sts GLCDINDEX,SysTemp1 + ldi SysValueCopy,83 + sts GLCDP_X,SysValueCopy + lds SysValueCopy,GLCDINDEX + sts GLCDP_Y,SysValueCopy + rcall GLCDGOTOXY + ldi SysValueCopy,1 + sts GLCDCOMDAT,SysValueCopy + ldi SysValueCopy,255 + sts GLCDDAT,SysValueCopy + rcall GLCDWRITE + lds SysCalcTempA,GLCDINDEX + cpi SysCalcTempA,5 + brlo SysForLoop4 +SysForLoopEnd4: + ldi SysValueCopy,255 + sts GLCDINDEX,SysValueCopy +SysForLoop5: + lds SysTemp1,GLCDINDEX + inc SysTemp1 + sts GLCDINDEX,SysTemp1 + ldi SysValueCopy,0 + sts GLCDP_X,SysValueCopy + lds SysValueCopy,GLCDINDEX + sts GLCDP_Y,SysValueCopy + rcall GLCDGOTOXY + ldi SysValueCopy,1 + sts GLCDCOMDAT,SysValueCopy + ldi SysValueCopy,255 + sts GLCDDAT,SysValueCopy + rcall GLCDWRITE + lds SysCalcTempA,GLCDINDEX + cpi SysCalcTempA,5 + brlo SysForLoop5 +SysForLoopEnd5: + ret + +;******************************************************************************** + +GLCDGOTOXY: + ldi SysValueCopy,0 + sts GLCDCOMDAT,SysValueCopy + ldi SysTemp2,128 + lds SysTemp1,GLCDP_X + or SysTemp1,SysTemp2 + sts GLCDDAT,SysTemp1 + rcall GLCDWRITE + ldi SysValueCopy,0 + sts GLCDCOMDAT,SysValueCopy + ldi SysTemp2,64 + lds SysTemp1,GLCDP_Y + or SysTemp1,SysTemp2 + sts GLCDDAT,SysTemp1 + rjmp GLCDWRITE + +;******************************************************************************** + +;Overloaded signature: STRING: +GLCDPRINT9: + ldi SysValueCopy,0 + sts GLCDINDEX,SysValueCopy + lds SysStringA,SysGLCDSTRDATHandler + lds SysStringA_H,SysGLCDSTRDATHandler_H + ld SysCalcTempA,X + cpi SysCalcTempA,1 + brlo SysForLoopEnd1 +SysForLoop1: + lds SysTemp1,GLCDINDEX + inc SysTemp1 + sts GLCDINDEX,SysTemp1 + lds SysTemp1,SysGLCDSTRDATHandler + lds SysTemp2,GLCDINDEX + add SysTemp1,SysTemp2 + mov SysStringA,SysTemp1 + lds SysTemp1,SysGLCDSTRDATHandler_H + ldi SysTemp2,0 + adc SysTemp1,SysTemp2 + mov SysStringA_H,SysTemp1 + ld SysValueCopy,X + sts GLCDCHAR,SysValueCopy + rcall GLCDCHARACTER + lds SysTemp1,SysGLCDSTRDATHandler + lds SysTemp2,GLCDINDEX + add SysTemp1,SysTemp2 + mov SysStringA,SysTemp1 + lds SysTemp1,SysGLCDSTRDATHandler_H + ldi SysTemp2,0 + adc SysTemp1,SysTemp2 + mov SysStringA_H,SysTemp1 + lds SysValueCopy,GLCDCHAR + st X,SysValueCopy + lds SysStringA,SysGLCDSTRDATHandler + lds SysStringA_H,SysGLCDSTRDATHandler_H + lds SysCalcTempA,GLCDINDEX + ld SysCalcTempB,X + cp SysCalcTempA,SysCalcTempB + brlo SysForLoop1 +SysForLoopEnd1: + ret + +;******************************************************************************** + +GLCDWRITE: + lds SysCalcTempA,GLCDCOMDAT + cpi SysCalcTempA,1 + brne ELSE9_1 + sbi PORTB,6 + rjmp ENDIF9 +ELSE9_1: + cbi PORTB,6 +ENDIF9: + ldi SysValueCopy,8 + sts SysRepeatTemp2,SysValueCopy +SysRepeatLoop2: + cbi PORTB,4 + lds SysBitTest,GLCDDAT + sbrs SysBitTest,7 + rjmp ELSE10_1 + sbi PORTB,5 + rjmp ENDIF10 +ELSE10_1: + cbi PORTB,5 +ENDIF10: + lds SysBYTETempA,GLCDDAT + rol SysBYTETempA + sts GLCDDAT,SysBYTETempA + sbi PORTB,4 + lds SysTemp1,SysRepeatTemp2 + dec SysTemp1 + sts SysRepeatTemp2,SysTemp1 + brne SysRepeatLoop2 +SysRepeatLoopEnd2: + ret + +;******************************************************************************** + +INITGLCD: + cbi PORTB,7 + ldi SysWaitTempMS,100 + ldi SysWaitTempMS_H,0 + rcall Delay_MS + sbi PORTB,7 + ldi SysValueCopy,0 + sts GLCDCOMDAT,SysValueCopy + ldi SysValueCopy,33 + sts GLCDDAT,SysValueCopy + rcall GLCDWRITE + ldi SysValueCopy,0 + sts GLCDCOMDAT,SysValueCopy + ldi SysValueCopy,191 + sts GLCDDAT,SysValueCopy + rcall GLCDWRITE + ldi SysValueCopy,0 + sts GLCDCOMDAT,SysValueCopy + ldi SysValueCopy,4 + sts GLCDDAT,SysValueCopy + rcall GLCDWRITE + ldi SysValueCopy,0 + sts GLCDCOMDAT,SysValueCopy + ldi SysValueCopy,20 + sts GLCDDAT,SysValueCopy + rcall GLCDWRITE + ldi SysValueCopy,0 + sts GLCDCOMDAT,SysValueCopy + ldi SysValueCopy,12 + sts GLCDDAT,SysValueCopy + rcall GLCDWRITE + ldi SysValueCopy,0 + sts GLCDCOMDAT,SysValueCopy + ldi SysValueCopy,32 + sts GLCDDAT,SysValueCopy + rcall GLCDWRITE + ldi SysValueCopy,0 + sts GLCDCOMDAT,SysValueCopy + ldi SysValueCopy,12 + sts GLCDDAT,SysValueCopy + rjmp GLCDWRITE + +;******************************************************************************** + +INITSYS: + ldi SysValueCopy,0 + out PORTB,SysValueCopy + ldi SysValueCopy,0 + out PORTC,SysValueCopy + ldi SysValueCopy,0 + out PORTD,SysValueCopy + ret + +;******************************************************************************** + +SYSREADSTRING: + lpm + mov SYSCALCTEMPA, SYSCALCTEMPX + inc SYSREADA + brne PC + 2 + inc SYSREADA_H + st Y+, SYSCALCTEMPA + rjmp SYSSTRINGREADCHECK +SYSREADSTRINGPART: + lpm + mov SYSCALCTEMPA, SYSCALCTEMPX + inc SYSREADA + brne PC + 2 + inc SYSREADA_H + add SYSSTRINGLENGTH, SYSCALCTEMPA +SYSSTRINGREADCHECK: + cpi SYSCALCTEMPA, 0 + brne SYSSTRINGREAD + ret +SYSSTRINGREAD: + lpm + inc SYSREADA + brne PC + 2 + inc SYSREADA_H + st Y+, SYSCALCTEMPX + dec SYSCALCTEMPA + brne SYSSTRINGREAD + ret + +;******************************************************************************** + +SysStringTables: + +StringTable1: +.DB 11,32,32,68,105,115,112,108,97,121,32,49 + + +StringTable2: +.DB 11,32,32,68,105,115,112,108,97,121,32,50 + + +StringTable3: +.DB 1,32 + + +StringTable4: +.DB 1,42 + + +;******************************************************************************** + + diff --git a/resources/examples/Avr/glcd8544_mega168/glcd8544_mega168.gcb b/resources/examples/Avr/glcd8544_mega168/glcd8544_mega168.gcb new file mode 100644 index 0000000..9bce93c --- /dev/null +++ b/resources/examples/Avr/glcd8544_mega168/glcd8544_mega168.gcb @@ -0,0 +1,116 @@ +#chip mega168,16 + +#include "glcd8544.h" + +#define GLCD_RESET PORTB.7 ' LCD RST .... +#define GLCD_DC PORTB.6 ' LCD Dat/Com. +#define GLCD_SDIN PORTB.5 ' LCD SPIDat . +#define GLCD_SCLK PORTB.4 ' LCD SPIClk . +#define GLCD_CS1 PORTB.3 ' Select Display 1 +#define GLCD_CS2 PORTB.2 ' Select Display 2 + +SelectDisplays +InitGlcd + +Repeat 3 + SelectDisplay1 + GlcdClear + wait 500 ms + + SelectDisplay2 + GlcdClear + wait 500 ms + + SelectDisplay1 + GlcdClear + GlcdDrawFrame + GlcdGotoXY( 1, 1 ) + GlcdPrint( " Display 1" ) + wait 500 ms + + SelectDisplay2 + GlcdClear + GlcdDrawFrame + GlcdDrawFrame + GlcdGotoXY( 1, 1 ) + GlcdPrint( " Display 2" ) + wait 500 ms +End Repeat +wait 1 S + +cc_x = 0 +c_x = 0 +c_y = 0 +d_x = 0 +d_y = 0 + +Do + Set PORTB.0 on + animate + wait 200 ms + + Set PORTB.0 off + animate + wait 200 ms +Loop + +Sub animate + if c_x > 78 then + SelectDisplay2 + else + SelectDisplay1 + end if + GlcdGotoXY( cc_x, c_y ) + GlcdPrint( " " ) + + if d_x = 0 then + c_x += 6 + else + c_x -= 6 + end if + + if d_y = 0 then + c_y += 1 + else + c_y -= 1 + end if + + if c_y = 5 then + d_y = 1 + end if + if c_y = 0 then + d_y = 0 + end if + + if c_x = 162 then + d_x = 1 + end if + if c_x = 0 then + d_x = 0 + end if + + if c_x > 78 then + cc_x = c_x-84 + SelectDisplay2 + else + cc_x = c_x + SelectDisplay1 + end if + GlcdGotoXY( cc_x, c_y ) + GlcdPrint( "*" ) +End Sub + +Macro SelectDisplay1 + GLCD_CS1 = 0 + GLCD_CS2 = 1 +End Macro + +Macro SelectDisplay2 + GLCD_CS1 = 1 + GLCD_CS2 = 0 +End Macro + +Macro SelectDisplays + GLCD_CS1 = 0 + GLCD_CS2 = 0 +End Macro diff --git a/resources/examples/Avr/glcd8544_mega168/glcd8544_mega168.html b/resources/examples/Avr/glcd8544_mega168/glcd8544_mega168.html new file mode 100644 index 0000000..405fe30 --- /dev/null +++ b/resources/examples/Avr/glcd8544_mega168/glcd8544_mega168.html @@ -0,0 +1,37 @@ + + + +Compilation Report + + +

Compilation Report

+

Compiler Version (DD/MM/YYYY): 0.94 2015-10-27

+

Chip resource usage:

+

Chip Model: MEGA168

+

Program Memory: 1022/16384 words (6.24%)

+

RAM: 61/1024 bytes (5.96%)

+

RAM Allocation

+ +
+

Subroutines

+ + + + + + + + + + + + + + + + + + +
NameCode Size (lines)Compiled Size (words)Outgoing calls
Main44143SYSREADSTRING(2), Delay_S(1), Delay_MS(6), ANIMATE(2), GLCDPRINT(2), GLCDGOTOXY(2), GLCDDRAWFRAME(3), GLCDCLEAR(4), INITGLCD(1), INITSYS(1)
ANIMATE38138SYSREADSTRING(2), GLCDPRINT(2), GLCDGOTOXY(2)
INITGLCD1062Delay_MS(1), GLCDWRITE(7)
GLCDWRITE1531
GLCDCLEAR327GLCDWRITE(1)
GLCDCHARACTER1699GLCDWRITE(3)
GLCDPRINT355GLCDCHARACTER(1)
GLCDGOTOXY222GLCDWRITE(2)
GLCDDRAWFRAME16117GLCDWRITE(4), GLCDGOTOXY(4)
INITSYS3657
SYSREADSTRING10324
Delay_MS012
Delay_S07Delay_MS(1)
SysStringTables014
ASCII_TABLE_L0132
ASCII_TABLE_H0132
+ + diff --git a/resources/examples/Avr/glcd8544_mega168/glcd8544_mega168.lst b/resources/examples/Avr/glcd8544_mega168/glcd8544_mega168.lst new file mode 100644 index 0000000..5fac3a6 --- /dev/null +++ b/resources/examples/Avr/glcd8544_mega168/glcd8544_mega168.lst @@ -0,0 +1,1506 @@ +GCASM List File (GCBASIC 0.94 2015-10-27) + +Symbols: +-X EQU 30 +-Y EQU 26 +-Z EQU 18 +ACBG EQU 6 +ACD EQU 7 +ACI EQU 4 +ACIC EQU 2 +ACIE EQU 3 +ACIS0 EQU 0 +ACIS1 EQU 1 +ACME EQU 6 +ACO EQU 5 +ACSR EQU 48 +ADATE EQU 5 +ADC0D EQU 0 +ADC1D EQU 1 +ADC2D EQU 2 +ADC3D EQU 3 +ADC4D EQU 4 +ADC5D EQU 5 +ADCH EQU 121 +ADCH0 EQU 0 +ADCH1 EQU 1 +ADCH2 EQU 2 +ADCH3 EQU 3 +ADCH4 EQU 4 +ADCH5 EQU 5 +ADCH6 EQU 6 +ADCH7 EQU 7 +ADCL EQU 120 +ADCL0 EQU 0 +ADCL1 EQU 1 +ADCL2 EQU 2 +ADCL3 EQU 3 +ADCL4 EQU 4 +ADCL5 EQU 5 +ADCL6 EQU 6 +ADCL7 EQU 7 +ADCSRA EQU 122 +ADCSRB EQU 123 +ADEN EQU 7 +ADIE EQU 3 +ADIF EQU 4 +ADLAR EQU 5 +ADMUX EQU 124 +ADPS0 EQU 0 +ADPS1 EQU 1 +ADPS2 EQU 2 +ADSC EQU 6 +ADTS0 EQU 0 +ADTS1 EQU 1 +ADTS2 EQU 2 +AIN0D EQU 0 +AIN1D EQU 1 +ANIMATE EQU 173 +AS2 EQU 5 +ASCII_TABLE_H EQU 305 +ASCII_TABLE_L EQU 437 +ASSR EQU 182 +BASPROGRAMEND EQU 171 +BASPROGRAMSTART EQU 53 +BLBSET EQU 3 +BORF EQU 2 +C EQU 0 +CAL0 EQU 0 +CAL1 EQU 1 +CAL2 EQU 2 +CAL3 EQU 3 +CAL4 EQU 4 +CAL5 EQU 5 +CAL6 EQU 6 +CAL7 EQU 7 +CC_X EQU 296 +CHARLINE EQU 297 +CLKPCE EQU 7 +CLKPR EQU 97 +CLKPS0 EQU 0 +CLKPS1 EQU 1 +CLKPS2 EQU 2 +CLKPS3 EQU 3 +COM0A0 EQU 6 +COM0A1 EQU 7 +COM0B0 EQU 4 +COM0B1 EQU 5 +COM1A0 EQU 6 +COM1A1 EQU 7 +COM1B0 EQU 4 +COM1B1 EQU 5 +COM2A0 EQU 6 +COM2A1 EQU 7 +COM2B0 EQU 4 +COM2B1 EQU 5 +CPHA EQU 2 +CPOL EQU 3 +CS00 EQU 0 +CS01 EQU 1 +CS02 EQU 2 +CS10 EQU 0 +CS11 EQU 1 +CS12 EQU 2 +CS20 EQU 0 +CS21 EQU 1 +CS22 EQU 2 +C_X EQU 298 +C_Y EQU 299 +DDB0 EQU 0 +DDB1 EQU 1 +DDB2 EQU 2 +DDB3 EQU 3 +DDB4 EQU 4 +DDB5 EQU 5 +DDB6 EQU 6 +DDB7 EQU 7 +DDC0 EQU 0 +DDC1 EQU 1 +DDC2 EQU 2 +DDC3 EQU 3 +DDC4 EQU 4 +DDC5 EQU 5 +DDC6 EQU 6 +DDD0 EQU 0 +DDD1 EQU 1 +DDD2 EQU 2 +DDD3 EQU 3 +DDD4 EQU 4 +DDD5 EQU 5 +DDD6 EQU 6 +DDD7 EQU 7 +DDRB EQU 4 +DDRC EQU 7 +DDRD EQU 10 +DELAYTEMP EQU r25 +DELAYTEMP2 EQU r26 +DELAY_MS EQU 569 +DELAY_S EQU 581 +DIDR0 EQU 126 +DIDR1 EQU 127 +DMS_INNER EQU 572 +DMS_OUTER EQU 571 +DMS_START EQU 570 +DOR0 EQU 3 +DORD EQU 5 +DS_START EQU 581 +D_X EQU 300 +D_Y EQU 301 +EEAR0 EQU 0 +EEAR1 EQU 1 +EEAR2 EQU 2 +EEAR3 EQU 3 +EEAR4 EQU 4 +EEAR5 EQU 5 +EEAR6 EQU 6 +EEAR7 EQU 7 +EEAR8 EQU 0 +EEARH EQU 34 +EEARL EQU 33 +EECR EQU 31 +EEDR EQU 32 +EEDR0 EQU 0 +EEDR1 EQU 1 +EEDR2 EQU 2 +EEDR3 EQU 3 +EEDR4 EQU 4 +EEDR5 EQU 5 +EEDR6 EQU 6 +EEDR7 EQU 7 +EEMPE EQU 2 +EEPE EQU 1 +EEPM0 EQU 4 +EEPM1 EQU 5 +EERE EQU 0 +EERIE EQU 3 +EICRA EQU 105 +EIFR EQU 28 +EIMSK EQU 29 +ELSE10_1 EQU 907 +ELSE17_1 EQU 633 +ELSE1_1 EQU 181 +ELSE2_1 EQU 215 +ELSE3_1 EQU 231 +ELSE8_1 EQU 278 +ELSE9_1 EQU 896 +ENDIF1 EQU 183 +ENDIF10 EQU 908 +ENDIF17 EQU 674 +ENDIF2 EQU 221 +ENDIF3 EQU 236 +ENDIF4 EQU 243 +ENDIF5 EQU 250 +ENDIF6 EQU 257 +ENDIF7 EQU 264 +ENDIF8 EQU 284 +ENDIF9 EQU 897 +EXCLK EQU 6 +EXTRF EQU 1 +FE0 EQU 4 +FOC0A EQU 7 +FOC0B EQU 6 +FOC1A EQU 7 +FOC1B EQU 6 +FOC2A EQU 7 +FOC2B EQU 6 +GLCDCHAR EQU 302 +GLCDCHARACTER EQU 587 +GLCDCLEAR EQU 681 +GLCDCOMDAT EQU 303 +GLCDDAT EQU 304 +GLCDDRAWFRAME EQU 707 +GLCDGOTOXY EQU 816 +GLCDINDEX EQU 305 +GLCDPRINT9 EQU 836 +GLCDP_X EQU 306 +GLCDP_Y EQU 307 +GLCDWRITE EQU 890 +GPIOR0 EQU 30 +GPIOR00 EQU 0 +GPIOR01 EQU 1 +GPIOR02 EQU 2 +GPIOR03 EQU 3 +GPIOR04 EQU 4 +GPIOR05 EQU 5 +GPIOR06 EQU 6 +GPIOR07 EQU 7 +GPIOR1 EQU 42 +GPIOR10 EQU 0 +GPIOR11 EQU 1 +GPIOR12 EQU 2 +GPIOR13 EQU 3 +GPIOR14 EQU 4 +GPIOR15 EQU 5 +GPIOR16 EQU 6 +GPIOR17 EQU 7 +GPIOR2 EQU 43 +GPIOR20 EQU 0 +GPIOR21 EQU 1 +GPIOR22 EQU 2 +GPIOR23 EQU 3 +GPIOR24 EQU 4 +GPIOR25 EQU 5 +GPIOR26 EQU 6 +GPIOR27 EQU 7 +GTCCR EQU 35 +H EQU 5 +I EQU 7 +ICES1 EQU 6 +ICF1 EQU 5 +ICIE1 EQU 5 +ICNC1 EQU 7 +ICR1H EQU 135 +ICR1H0 EQU 0 +ICR1H1 EQU 1 +ICR1H2 EQU 2 +ICR1H3 EQU 3 +ICR1H4 EQU 4 +ICR1H5 EQU 5 +ICR1H6 EQU 6 +ICR1H7 EQU 7 +ICR1L EQU 134 +ICR1L0 EQU 0 +ICR1L1 EQU 1 +ICR1L2 EQU 2 +ICR1L3 EQU 3 +ICR1L4 EQU 4 +ICR1L5 EQU 5 +ICR1L6 EQU 6 +ICR1L7 EQU 7 +INITGLCD EQU 921 +INITSYS EQU 975 +INT0 EQU 0 +INT1 EQU 1 +INTF0 EQU 0 +INTF1 EQU 1 +ISC00 EQU 0 +ISC01 EQU 1 +ISC10 EQU 2 +ISC11 EQU 3 +IVCE EQU 0 +IVSEL EQU 1 +MCUCR EQU 53 +MCUSR EQU 52 +MPCM0 EQU 0 +MSTR EQU 4 +MUX0 EQU 0 +MUX1 EQU 1 +MUX2 EQU 2 +MUX3 EQU 3 +N EQU 2 +OCF0A EQU 1 +OCF0B EQU 2 +OCF1A EQU 1 +OCF1B EQU 2 +OCF2A EQU 1 +OCF2B EQU 2 +OCIE0A EQU 1 +OCIE0B EQU 2 +OCIE1A EQU 1 +OCIE1B EQU 2 +OCIE2A EQU 1 +OCIE2B EQU 2 +OCR0A EQU 39 +OCR0B EQU 40 +OCR0B_0 EQU 0 +OCR0B_1 EQU 1 +OCR0B_2 EQU 2 +OCR0B_3 EQU 3 +OCR0B_4 EQU 4 +OCR0B_5 EQU 5 +OCR0B_6 EQU 6 +OCR0B_7 EQU 7 +OCR1AH EQU 137 +OCR1AH0 EQU 0 +OCR1AH1 EQU 1 +OCR1AH2 EQU 2 +OCR1AH3 EQU 3 +OCR1AH4 EQU 4 +OCR1AH5 EQU 5 +OCR1AH6 EQU 6 +OCR1AH7 EQU 7 +OCR1AL EQU 136 +OCR1AL0 EQU 0 +OCR1AL1 EQU 1 +OCR1AL2 EQU 2 +OCR1AL3 EQU 3 +OCR1AL4 EQU 4 +OCR1AL5 EQU 5 +OCR1AL6 EQU 6 +OCR1AL7 EQU 7 +OCR1BH EQU 139 +OCR1BH0 EQU 0 +OCR1BH1 EQU 1 +OCR1BH2 EQU 2 +OCR1BH3 EQU 3 +OCR1BH4 EQU 4 +OCR1BH5 EQU 5 +OCR1BH6 EQU 6 +OCR1BH7 EQU 7 +OCR1BL EQU 138 +OCR1BL0 EQU 0 +OCR1BL1 EQU 1 +OCR1BL2 EQU 2 +OCR1BL3 EQU 3 +OCR1BL4 EQU 4 +OCR1BL5 EQU 5 +OCR1BL6 EQU 6 +OCR1BL7 EQU 7 +OCR2A EQU 179 +OCR2AUB EQU 3 +OCR2A_0 EQU 0 +OCR2A_1 EQU 1 +OCR2A_2 EQU 2 +OCR2A_3 EQU 3 +OCR2A_4 EQU 4 +OCR2A_5 EQU 5 +OCR2A_6 EQU 6 +OCR2A_7 EQU 7 +OCR2B EQU 180 +OCR2BUB EQU 2 +OCR2B_0 EQU 0 +OCR2B_1 EQU 1 +OCR2B_2 EQU 2 +OCR2B_3 EQU 3 +OCR2B_4 EQU 4 +OCR2B_5 EQU 5 +OCR2B_6 EQU 6 +OCR2B_7 EQU 7 +OCROA_0 EQU 0 +OCROA_1 EQU 1 +OCROA_2 EQU 2 +OCROA_3 EQU 3 +OCROA_4 EQU 4 +OCROA_5 EQU 5 +OCROA_6 EQU 6 +OCROA_7 EQU 7 +OSCCAL EQU 102 +PCICR EQU 104 +PCIE0 EQU 0 +PCIE1 EQU 1 +PCIE2 EQU 2 +PCIF0 EQU 0 +PCIF1 EQU 1 +PCIF2 EQU 2 +PCIFR EQU 27 +PCINT0 EQU 0 +PCINT1 EQU 1 +PCINT10 EQU 2 +PCINT11 EQU 3 +PCINT12 EQU 4 +PCINT13 EQU 5 +PCINT14 EQU 6 +PCINT16 EQU 0 +PCINT17 EQU 1 +PCINT18 EQU 2 +PCINT19 EQU 3 +PCINT2 EQU 2 +PCINT20 EQU 4 +PCINT21 EQU 5 +PCINT22 EQU 6 +PCINT23 EQU 7 +PCINT3 EQU 3 +PCINT4 EQU 4 +PCINT5 EQU 5 +PCINT6 EQU 6 +PCINT7 EQU 7 +PCINT8 EQU 0 +PCINT9 EQU 1 +PCMSK0 EQU 107 +PCMSK1 EQU 108 +PCMSK2 EQU 109 +PGERS EQU 1 +PGWRT EQU 2 +PINB EQU 3 +PINB0 EQU 0 +PINB1 EQU 1 +PINB2 EQU 2 +PINB3 EQU 3 +PINB4 EQU 4 +PINB5 EQU 5 +PINB6 EQU 6 +PINB7 EQU 7 +PINC EQU 6 +PINC0 EQU 0 +PINC1 EQU 1 +PINC2 EQU 2 +PINC3 EQU 3 +PINC4 EQU 4 +PINC5 EQU 5 +PINC6 EQU 6 +PIND EQU 9 +PIND0 EQU 0 +PIND1 EQU 1 +PIND2 EQU 2 +PIND3 EQU 3 +PIND4 EQU 4 +PIND5 EQU 5 +PIND6 EQU 6 +PIND7 EQU 7 +PORF EQU 0 +PORTB EQU 5 +PORTB0 EQU 0 +PORTB1 EQU 1 +PORTB2 EQU 2 +PORTB3 EQU 3 +PORTB4 EQU 4 +PORTB5 EQU 5 +PORTB6 EQU 6 +PORTB7 EQU 7 +PORTC EQU 8 +PORTC0 EQU 0 +PORTC1 EQU 1 +PORTC2 EQU 2 +PORTC3 EQU 3 +PORTC4 EQU 4 +PORTC5 EQU 5 +PORTC6 EQU 6 +PORTD EQU 11 +PORTD0 EQU 0 +PORTD1 EQU 1 +PORTD2 EQU 2 +PORTD3 EQU 3 +PORTD4 EQU 4 +PORTD5 EQU 5 +PORTD6 EQU 6 +PORTD7 EQU 7 +PRADC EQU 0 +PRR EQU 100 +PRSPI EQU 2 +PRTIM0 EQU 5 +PRTIM1 EQU 3 +PRTIM2 EQU 6 +PRTWI EQU 7 +PRUSART0 EQU 1 +PSRASY EQU 1 +PSRSYNC EQU 0 +PUD EQU 4 +RAMEND EQU 1279 +REFS0 EQU 6 +REFS1 EQU 7 +RWWSB EQU 6 +RWWSRE EQU 4 +RXB80 EQU 1 +RXC0 EQU 7 +RXCIE0 EQU 7 +RXEN0 EQU 4 +S EQU 4 +SE EQU 0 +SELFPRGEN EQU 0 +SM0 EQU 1 +SM1 EQU 2 +SM2 EQU 3 +SMCR EQU 51 +SP0 EQU 0 +SP1 EQU 1 +SP10 EQU 2 +SP2 EQU 2 +SP3 EQU 3 +SP4 EQU 4 +SP5 EQU 5 +SP6 EQU 6 +SP7 EQU 7 +SP8 EQU 0 +SP9 EQU 1 +SPCR EQU 44 +SPDR EQU 46 +SPDR0 EQU 0 +SPDR1 EQU 1 +SPDR2 EQU 2 +SPDR3 EQU 3 +SPDR4 EQU 4 +SPDR5 EQU 5 +SPDR6 EQU 6 +SPDR7 EQU 7 +SPE EQU 6 +SPH EQU 62 +SPI2X EQU 0 +SPIE EQU 7 +SPIF EQU 7 +SPL EQU 61 +SPMCSR EQU 55 +SPMIE EQU 7 +SPR0 EQU 0 +SPR1 EQU 1 +SPSR EQU 45 +SREG EQU 63 +STRINGPOINTER EQU 309 +STRINGTABLE1 EQU 1006 +STRINGTABLE2 EQU 1012 +STRINGTABLE3 EQU 1018 +STRINGTABLE4 EQU 1019 +SYSCALCTEMPX EQU r0 +SYSDOLOOP_E1 EQU 171 +SYSDOLOOP_S1 EQU 160 +SYSFORLOOP1 EQU 846 +SYSFORLOOP2 EQU 710 +SYSFORLOOP3 EQU 737 +SYSFORLOOP4 EQU 764 +SYSFORLOOP5 EQU 791 +SYSFORLOOPEND1 EQU 889 +SYSFORLOOPEND2 EQU 734 +SYSFORLOOPEND3 EQU 761 +SYSFORLOOPEND4 EQU 788 +SYSFORLOOPEND5 EQU 815 +SYSGLCDSTRDATHANDLER EQU 310 +SYSGLCDSTRDATHANDLER_H EQU 311 +SYSPOINTERX EQU 308 +SYSREADSTRING EQU 982 +SYSREADSTRINGPART EQU 989 +SYSREPEATLOOP1 EQU 71 +SYSREPEATLOOP2 EQU 900 +SYSREPEATLOOP3 EQU 687 +SYSREPEATLOOP4 EQU 604 +SYSREPEATLOOP5 EQU 646 +SYSREPEATLOOPEND1 EQU 143 +SYSREPEATLOOPEND2 EQU 920 +SYSREPEATLOOPEND3 EQU 706 +SYSREPEATLOOPEND4 EQU 632 +SYSREPEATLOOPEND5 EQU 674 +SYSREPEATTEMP1 EQU 312 +SYSREPEATTEMP2 EQU 313 +SYSREPEATTEMP3 EQU 314 +SYSREPEATTEMP3_H EQU 315 +SYSREPEATTEMP4 EQU 316 +SYSSTRINGLENGTH EQU r25 +SYSSTRINGPARAM1 EQU 256 +SYSSTRINGREAD EQU 998 +SYSSTRINGREADCHECK EQU 995 +SYSSTRINGTABLES EQU 1006 +SysBYTETempA EQU r22 +SysBYTETempB EQU r28 +SysBYTETempX EQU r0 +SysBitTest EQU r5 +SysCalcTempA EQU r22 +SysCalcTempB EQU r28 +SysReadA EQU r30 +SysReadA_H EQU r31 +SysStringA EQU r26 +SysStringA_H EQU r27 +SysStringB EQU r28 +SysStringB_H EQU r29 +SysTemp1 EQU r1 +SysTemp1_H EQU r2 +SysTemp2 EQU r16 +SysTemp3 EQU r17 +SysValueCopy EQU r21 +SysWaitTempMS EQU r29 +SysWaitTempMS_H EQU r30 +SysWaitTempS EQU r31 +T EQU 6 +TABLEASCII_TABLE_H EQU 316 +TABLEASCII_TABLE_L EQU 448 +TCCR0A EQU 36 +TCCR0B EQU 37 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCCR2A EQU 176 +TCCR2B EQU 177 +TCN2UB EQU 4 +TCNT0 EQU 38 +TCNT0_0 EQU 0 +TCNT0_1 EQU 1 +TCNT0_2 EQU 2 +TCNT0_3 EQU 3 +TCNT0_4 EQU 4 +TCNT0_5 EQU 5 +TCNT0_6 EQU 6 +TCNT0_7 EQU 7 +TCNT1H EQU 133 +TCNT1H0 EQU 0 +TCNT1H1 EQU 1 +TCNT1H2 EQU 2 +TCNT1H3 EQU 3 +TCNT1H4 EQU 4 +TCNT1H5 EQU 5 +TCNT1H6 EQU 6 +TCNT1H7 EQU 7 +TCNT1L EQU 132 +TCNT1L0 EQU 0 +TCNT1L1 EQU 1 +TCNT1L2 EQU 2 +TCNT1L3 EQU 3 +TCNT1L4 EQU 4 +TCNT1L5 EQU 5 +TCNT1L6 EQU 6 +TCNT1L7 EQU 7 +TCNT2 EQU 178 +TCNT2_0 EQU 0 +TCNT2_1 EQU 1 +TCNT2_2 EQU 2 +TCNT2_3 EQU 3 +TCNT2_4 EQU 4 +TCNT2_5 EQU 5 +TCNT2_6 EQU 6 +TCNT2_7 EQU 7 +TCR2AUB EQU 1 +TCR2BUB EQU 0 +TIFR0 EQU 21 +TIFR1 EQU 22 +TIFR2 EQU 23 +TIMSK0 EQU 110 +TIMSK1 EQU 111 +TIMSK2 EQU 112 +TOIE0 EQU 0 +TOIE1 EQU 0 +TOIE2 EQU 0 +TOV0 EQU 0 +TOV1 EQU 0 +TOV2 EQU 0 +TSM EQU 7 +TWA0 EQU 1 +TWA1 EQU 2 +TWA2 EQU 3 +TWA3 EQU 4 +TWA4 EQU 5 +TWA5 EQU 6 +TWA6 EQU 7 +TWAM0 EQU 1 +TWAM1 EQU 2 +TWAM2 EQU 3 +TWAM3 EQU 4 +TWAM4 EQU 5 +TWAM5 EQU 6 +TWAM6 EQU 7 +TWAMR EQU 189 +TWAR EQU 186 +TWBR EQU 184 +TWBR0 EQU 0 +TWBR1 EQU 1 +TWBR2 EQU 2 +TWBR3 EQU 3 +TWBR4 EQU 4 +TWBR5 EQU 5 +TWBR6 EQU 6 +TWBR7 EQU 7 +TWCR EQU 188 +TWD0 EQU 0 +TWD1 EQU 1 +TWD2 EQU 2 +TWD3 EQU 3 +TWD4 EQU 4 +TWD5 EQU 5 +TWD6 EQU 6 +TWD7 EQU 7 +TWDR EQU 187 +TWEA EQU 6 +TWEN EQU 2 +TWGCE EQU 0 +TWIE EQU 0 +TWINT EQU 7 +TWPS0 EQU 0 +TWPS1 EQU 1 +TWS3 EQU 3 +TWS4 EQU 4 +TWS5 EQU 5 +TWS6 EQU 6 +TWS7 EQU 7 +TWSR EQU 185 +TWSTA EQU 5 +TWSTO EQU 4 +TWWC EQU 3 +TXB80 EQU 0 +TXC0 EQU 6 +TXCIE0 EQU 6 +TXEN0 EQU 3 +U2X0 EQU 1 +UBRR0 EQU 0 +UBRR0H EQU 197 +UBRR0L EQU 196 +UBRR1 EQU 1 +UBRR10 EQU 2 +UBRR11 EQU 3 +UBRR2 EQU 2 +UBRR3 EQU 3 +UBRR4 EQU 4 +UBRR5 EQU 5 +UBRR6 EQU 6 +UBRR7 EQU 7 +UBRR8 EQU 0 +UBRR9 EQU 1 +UCPOL0 EQU 0 +UCSR0A EQU 192 +UCSR0B EQU 193 +UCSR0C EQU 194 +UCSZ00 EQU 1 +UCSZ01 EQU 2 +UCSZ02 EQU 2 +UDR0 EQU 198 +UDR0-0 EQU 0 +UDR0-1 EQU 1 +UDR0-2 EQU 2 +UDR0-3 EQU 3 +UDR0-4 EQU 4 +UDR0-5 EQU 5 +UDR0-6 EQU 6 +UDR0-7 EQU 7 +UDRE0 EQU 5 +UDRIE0 EQU 5 +UMSEL00 EQU 6 +UMSEL01 EQU 7 +UPE0 EQU 2 +UPM00 EQU 4 +UPM01 EQU 5 +USBS0 EQU 3 +V EQU 3 +WCOL EQU 6 +WDCE EQU 4 +WDE EQU 3 +WDIE EQU 6 +WDIF EQU 7 +WDP0 EQU 0 +WDP1 EQU 1 +WDP2 EQU 2 +WDP3 EQU 5 +WDRF EQU 3 +WDTCSR EQU 96 +WGM00 EQU 0 +WGM01 EQU 1 +WGM02 EQU 3 +WGM10 EQU 0 +WGM11 EQU 1 +WGM12 EQU 3 +WGM13 EQU 4 +WGM20 EQU 0 +WGM21 EQU 1 +WGM22 EQU 3 +X EQU 28 +X+ EQU 29 +Y EQU 8 +Y+ EQU 25 +Z EQU 1 +Z+ EQU 17 +rZ EQU 0 + +Code: +Loc Obj Code Original Assembly +000000 0000 NOP +000001 C033 RJMP BASPROGRAMSTART +000002 0000 NOP +000003 9518 RETI +000004 0000 NOP +000005 9518 RETI +000006 0000 NOP +000007 9518 RETI +000008 0000 NOP +000009 9518 RETI +00000A 0000 NOP +00000B 9518 RETI +00000C 0000 NOP +00000D 9518 RETI +00000E 0000 NOP +00000F 9518 RETI +000010 0000 NOP +000011 9518 RETI +000012 0000 NOP +000013 9518 RETI +000014 0000 NOP +000015 9518 RETI +000016 0000 NOP +000017 9518 RETI +000018 0000 NOP +000019 9518 RETI +00001A 0000 NOP +00001B 9518 RETI +00001C 0000 NOP +00001D 9518 RETI +00001E 0000 NOP +00001F 9518 RETI +000020 0000 NOP +000021 9518 RETI +000022 0000 NOP +000023 9518 RETI +000024 0000 NOP +000025 9518 RETI +000026 0000 NOP +000027 9518 RETI +000028 0000 NOP +000029 9518 RETI +00002A 0000 NOP +00002B 9518 RETI +00002C 0000 NOP +00002D 9518 RETI +00002E 0000 NOP +00002F 9518 RETI +000030 0000 NOP +000031 9518 RETI +000032 0000 NOP +000033 9518 RETI + + +000034 0000 NOP + BASPROGRAMSTART +000035 E054 LDI SYSVALUECOPY,HIGH(RAMEND) +000036 BF5E OUT SPH, SYSVALUECOPY +000037 EF5F LDI SYSVALUECOPY,LOW(RAMEND) +000038 BF5D OUT SPL, SYSVALUECOPY +000039 D395 RCALL INITSYS +00003A 9A25 SBI DDRB,5 +00003B 9A24 SBI DDRB,4 +00003C 9A23 SBI DDRB,3 +00003D 9A22 SBI DDRB,2 +00003E 9A20 SBI DDRB,0 +00003F 9A27 SBI DDRB,7 +000040 9A26 SBI DDRB,6 + +000041 982B CBI PORTB,3 +000042 982A CBI PORTB,2 +000043 D355 RCALL INITGLCD +000044 E053 LDI SYSVALUECOPY,3 +000045 9350 0138 STS SYSREPEATTEMP1,SYSVALUECOPY + SYSREPEATLOOP1 +000047 982B CBI PORTB,3 +000048 9A2A SBI PORTB,2 +000049 D25F RCALL GLCDCLEAR +00004A EFD4 LDI SYSWAITTEMPMS,244 +00004B E0E1 LDI SYSWAITTEMPMS_H,1 +00004C D1EC RCALL DELAY_MS +00004D 9A2B SBI PORTB,3 +00004E 982A CBI PORTB,2 +00004F D259 RCALL GLCDCLEAR +000050 EFD4 LDI SYSWAITTEMPMS,244 +000051 E0E1 LDI SYSWAITTEMPMS_H,1 +000052 D1E6 RCALL DELAY_MS +000053 982B CBI PORTB,3 +000054 9A2A SBI PORTB,2 +000055 D253 RCALL GLCDCLEAR +000056 D26C RCALL GLCDDRAWFRAME +000057 E051 LDI SYSVALUECOPY,1 +000058 9350 0132 STS GLCDP_X,SYSVALUECOPY +00005A E051 LDI SYSVALUECOPY,1 +00005B 9350 0133 STS GLCDP_Y,SYSVALUECOPY +00005D D2D2 RCALL GLCDGOTOXY +00005E E0C0 LDI SYSSTRINGB,LOW(SYSSTRINGPARAM1) +00005F E0D1 LDI SYSSTRINGB_H,HIGH(SYSSTRINGPARAM1) +000060 EDEC LDI SYSREADA,LOW(STRINGTABLE1<<1) +000061 E0F7 LDI SYSREADA_H,HIGH(STRINGTABLE1<<1) +000062 D373 RCALL SYSREADSTRING +000063 E050 LDI SYSVALUECOPY,LOW(SYSSTRINGPARAM1) +000064 9350 0136 STS SYSGLCDSTRDATHANDLER,SYSVALUECOPY +000066 E051 LDI SYSVALUECOPY,HIGH(SYSSTRINGPARAM1) +000067 9350 0137 STS SYSGLCDSTRDATHANDLER_H,SYSVALUECOPY +000069 D2DA RCALL GLCDPRINT9 +00006A EFD4 LDI SYSWAITTEMPMS,244 +00006B E0E1 LDI SYSWAITTEMPMS_H,1 +00006C D1CC RCALL DELAY_MS +00006D 9A2B SBI PORTB,3 +00006E 982A CBI PORTB,2 +00006F D239 RCALL GLCDCLEAR +000070 D252 RCALL GLCDDRAWFRAME +000071 D251 RCALL GLCDDRAWFRAME +000072 E051 LDI SYSVALUECOPY,1 +000073 9350 0132 STS GLCDP_X,SYSVALUECOPY +000075 E051 LDI SYSVALUECOPY,1 +000076 9350 0133 STS GLCDP_Y,SYSVALUECOPY +000078 D2B7 RCALL GLCDGOTOXY +000079 E0C0 LDI SYSSTRINGB,LOW(SYSSTRINGPARAM1) +00007A E0D1 LDI SYSSTRINGB_H,HIGH(SYSSTRINGPARAM1) +00007B EEE8 LDI SYSREADA,LOW(STRINGTABLE2<<1) +00007C E0F7 LDI SYSREADA_H,HIGH(STRINGTABLE2<<1) +00007D D358 RCALL SYSREADSTRING +00007E E050 LDI SYSVALUECOPY,LOW(SYSSTRINGPARAM1) +00007F 9350 0136 STS SYSGLCDSTRDATHANDLER,SYSVALUECOPY +000081 E051 LDI SYSVALUECOPY,HIGH(SYSSTRINGPARAM1) +000082 9350 0137 STS SYSGLCDSTRDATHANDLER_H,SYSVALUECOPY +000084 D2BF RCALL GLCDPRINT9 +000085 EFD4 LDI SYSWAITTEMPMS,244 +000086 E0E1 LDI SYSWAITTEMPMS_H,1 +000087 D1B1 RCALL DELAY_MS +000088 9010 0138 LDS SYSTEMP1,SYSREPEATTEMP1 +00008A 941A DEC SYSTEMP1 +00008B 9210 0138 STS SYSREPEATTEMP1,SYSTEMP1 +00008D F009 BREQ PC + 2 +00008E CFB8 RJMP SYSREPEATLOOP1 + SYSREPEATLOOPEND1 +00008F E0F1 LDI SYSWAITTEMPS,1 +000090 D1B4 RCALL DELAY_S +000091 E050 LDI SYSVALUECOPY,0 +000092 9350 0128 STS CC_X,SYSVALUECOPY +000094 E050 LDI SYSVALUECOPY,0 +000095 9350 012A STS C_X,SYSVALUECOPY +000097 E050 LDI SYSVALUECOPY,0 +000098 9350 012B STS C_Y,SYSVALUECOPY +00009A E050 LDI SYSVALUECOPY,0 +00009B 9350 012C STS D_X,SYSVALUECOPY +00009D E050 LDI SYSVALUECOPY,0 +00009E 9350 012D STS D_Y,SYSVALUECOPY + SYSDOLOOP_S1 +0000A0 9A28 SBI PORTB,0 +0000A1 D00B RCALL ANIMATE +0000A2 ECD8 LDI SYSWAITTEMPMS,200 +0000A3 E0E0 LDI SYSWAITTEMPMS_H,0 +0000A4 D194 RCALL DELAY_MS +0000A5 9828 CBI PORTB,0 +0000A6 D006 RCALL ANIMATE +0000A7 ECD8 LDI SYSWAITTEMPMS,200 +0000A8 E0E0 LDI SYSWAITTEMPMS_H,0 +0000A9 D18F RCALL DELAY_MS +0000AA CFF5 RJMP SYSDOLOOP_S1 + SYSDOLOOP_E1 + BASPROGRAMEND +0000AB 9588 SLEEP +0000AC CFFE RJMP BASPROGRAMEND + + + ANIMATE +0000AD E46E LDI SYSCALCTEMPA,78 +0000AE 91C0 012A LDS SYSCALCTEMPB,C_X +0000B0 176C CP SYSCALCTEMPA,SYSCALCTEMPB +0000B1 F418 BRSH ELSE1_1 +0000B2 9A2B SBI PORTB,3 +0000B3 982A CBI PORTB,2 +0000B4 C002 RJMP ENDIF1 + ELSE1_1 +0000B5 982B CBI PORTB,3 +0000B6 9A2A SBI PORTB,2 + ENDIF1 +0000B7 9150 0128 LDS SYSVALUECOPY,CC_X +0000B9 9350 0132 STS GLCDP_X,SYSVALUECOPY +0000BB 9150 012B LDS SYSVALUECOPY,C_Y +0000BD 9350 0133 STS GLCDP_Y,SYSVALUECOPY +0000BF D270 RCALL GLCDGOTOXY +0000C0 E0C0 LDI SYSSTRINGB,LOW(SYSSTRINGPARAM1) +0000C1 E0D1 LDI SYSSTRINGB_H,HIGH(SYSSTRINGPARAM1) +0000C2 EFE4 LDI SYSREADA,LOW(STRINGTABLE3<<1) +0000C3 E0F7 LDI SYSREADA_H,HIGH(STRINGTABLE3<<1) +0000C4 D311 RCALL SYSREADSTRING +0000C5 E050 LDI SYSVALUECOPY,LOW(SYSSTRINGPARAM1) +0000C6 9350 0136 STS SYSGLCDSTRDATHANDLER,SYSVALUECOPY +0000C8 E051 LDI SYSVALUECOPY,HIGH(SYSSTRINGPARAM1) +0000C9 9350 0137 STS SYSGLCDSTRDATHANDLER_H,SYSVALUECOPY +0000CB D278 RCALL GLCDPRINT9 +0000CC 9160 012C LDS SYSCALCTEMPA,D_X +0000CE 2366 TST SYSCALCTEMPA +0000CF F439 BRNE ELSE2_1 +0000D0 9010 012A LDS SYSTEMP1,C_X +0000D2 E006 LDI SYSTEMP2,6 +0000D3 0E10 ADD SYSTEMP1,SYSTEMP2 +0000D4 9210 012A STS C_X,SYSTEMP1 +0000D6 C006 RJMP ENDIF2 + ELSE2_1 +0000D7 9010 012A LDS SYSTEMP1,C_X +0000D9 E006 LDI SYSTEMP2,6 +0000DA 1A10 SUB SYSTEMP1,SYSTEMP2 +0000DB 9210 012A STS C_X,SYSTEMP1 + ENDIF2 +0000DD 9160 012D LDS SYSCALCTEMPA,D_Y +0000DF 2366 TST SYSCALCTEMPA +0000E0 F431 BRNE ELSE3_1 +0000E1 9010 012B LDS SYSTEMP1,C_Y +0000E3 9413 INC SYSTEMP1 +0000E4 9210 012B STS C_Y,SYSTEMP1 +0000E6 C005 RJMP ENDIF3 + ELSE3_1 +0000E7 9010 012B LDS SYSTEMP1,C_Y +0000E9 941A DEC SYSTEMP1 +0000EA 9210 012B STS C_Y,SYSTEMP1 + ENDIF3 +0000EC 9160 012B LDS SYSCALCTEMPA,C_Y +0000EE 3065 CPI SYSCALCTEMPA,5 +0000EF F419 BRNE ENDIF4 +0000F0 E051 LDI SYSVALUECOPY,1 +0000F1 9350 012D STS D_Y,SYSVALUECOPY + ENDIF4 +0000F3 9160 012B LDS SYSCALCTEMPA,C_Y +0000F5 2366 TST SYSCALCTEMPA +0000F6 F419 BRNE ENDIF5 +0000F7 E050 LDI SYSVALUECOPY,0 +0000F8 9350 012D STS D_Y,SYSVALUECOPY + ENDIF5 +0000FA 9160 012A LDS SYSCALCTEMPA,C_X +0000FC 3A62 CPI SYSCALCTEMPA,162 +0000FD F419 BRNE ENDIF6 +0000FE E051 LDI SYSVALUECOPY,1 +0000FF 9350 012C STS D_X,SYSVALUECOPY + ENDIF6 +000101 9160 012A LDS SYSCALCTEMPA,C_X +000103 2366 TST SYSCALCTEMPA +000104 F419 BRNE ENDIF7 +000105 E050 LDI SYSVALUECOPY,0 +000106 9350 012C STS D_X,SYSVALUECOPY + ENDIF7 +000108 E46E LDI SYSCALCTEMPA,78 +000109 91C0 012A LDS SYSCALCTEMPB,C_X +00010B 176C CP SYSCALCTEMPA,SYSCALCTEMPB +00010C F448 BRSH ELSE8_1 +00010D 9010 012A LDS SYSTEMP1,C_X +00010F E504 LDI SYSTEMP2,84 +000110 1A10 SUB SYSTEMP1,SYSTEMP2 +000111 9210 0128 STS CC_X,SYSTEMP1 +000113 9A2B SBI PORTB,3 +000114 982A CBI PORTB,2 +000115 C006 RJMP ENDIF8 + ELSE8_1 +000116 9150 012A LDS SYSVALUECOPY,C_X +000118 9350 0128 STS CC_X,SYSVALUECOPY +00011A 982B CBI PORTB,3 +00011B 9A2A SBI PORTB,2 + ENDIF8 +00011C 9150 0128 LDS SYSVALUECOPY,CC_X +00011E 9350 0132 STS GLCDP_X,SYSVALUECOPY +000120 9150 012B LDS SYSVALUECOPY,C_Y +000122 9350 0133 STS GLCDP_Y,SYSVALUECOPY +000124 D20B RCALL GLCDGOTOXY +000125 E0C0 LDI SYSSTRINGB,LOW(SYSSTRINGPARAM1) +000126 E0D1 LDI SYSSTRINGB_H,HIGH(SYSSTRINGPARAM1) +000127 EFE6 LDI SYSREADA,LOW(STRINGTABLE4<<1) +000128 E0F7 LDI SYSREADA_H,HIGH(STRINGTABLE4<<1) +000129 D2AC RCALL SYSREADSTRING +00012A E050 LDI SYSVALUECOPY,LOW(SYSSTRINGPARAM1) +00012B 9350 0136 STS SYSGLCDSTRDATHANDLER,SYSVALUECOPY +00012D E051 LDI SYSVALUECOPY,HIGH(SYSSTRINGPARAM1) +00012E 9350 0137 STS SYSGLCDSTRDATHANDLER_H,SYSVALUECOPY +000130 C213 RJMP GLCDPRINT9 + + + ASCII_TABLE_H +000131 3FA1 CPI SYSSTRINGA, 241 +000132 F010 BRLO PC + 3 +000133 2400 CLR SYSBYTETEMPX +000134 9508 RET +000135 E7E8 LDI SYSREADA, LOW(TABLEASCII_TABLE_H<<1) +000136 E0F2 LDI SYSREADA_H, HIGH(TABLEASCII_TABLE_H<<1) +000137 0FEA ADD SYSREADA, SYSSTRINGA +000138 F408 BRCC PC + 2 +000139 95F3 INC SYSREADA_H +00013A 95C8 LPM +00013B 9508 RET + TABLEASCII_TABLE_H +00013C 7FF0 0909 0609 413E 2151 7F5E 1909 4629 4946 4949 0131 7F01 0101 403F RAW 7FF0,0909,0609,413E,2151,7F5E,1909,4629,4946,4949,0131,7F01,0101,403F +00014A 4040 1F3F 4020 1F20 403F 4038 633F 0814 6314 0807 0870 6107 4951 4345 RAW 4040,1F3F,4020,1F20,403F,4038,633F,0814,6314,0807,0870,6107,4951,4345 +000158 7F00 4141 0200 0804 2010 4100 7F41 0400 0102 0402 4040 4040 0040 0201 0004 5420 RAW 7F00,4141,0200,0804,2010,4100,7F41,0400,0102,0402,4040,4040,0040,0201,0004,5420 +000168 5454 7F78 4448 3844 4438 4444 3820 4444 7F48 5438 5454 0818 097E RAW 5454,7F78,4448,3844,4438,4444,3820,4444,7F48,5438,5454,0818,097E +000175 0201 520C 5252 7F3E 0408 7804 4400 407D 2000 4440 003D 107F 4428 0000 RAW 0201,520C,5252,7F3E,0408,7804,4400,407D,2000,4440,003D,107F,4428,0000 +000183 7F41 0040 047C 0418 7C78 0408 7804 4438 4444 7C38 1414 0814 1408 1814 RAW 7F41,0040,047C,0418,7C78,0408,7804,4438,4444,7C38,1414,0814,1408,1814 +000191 7C7C 0408 0804 5448 5454 0420 443F 2040 403C 2040 1C7C 4020 1C20 403C RAW 7C7C,0408,0804,5448,5454,0420,443F,2040,403C,2040,1C7C,4020,1C20,403C +00019F 4030 443C 1028 4428 500C 5050 443C 5464 444C 0800 4136 0000 7F00 0000 RAW 4030,443C,1028,4428,500C,5050,443C,5464,444C,0800,4136,0000,7F00,0000 +0001AD 4100 0836 1000 0808 0810 0600 0909 0006 RAW 4100,0836,1000,0808,0810,0600,0909,0006 + + + ASCII_TABLE_L +0001B5 3FA1 CPI SYSSTRINGA, 241 +0001B6 F010 BRLO PC + 3 +0001B7 2400 CLR SYSBYTETEMPX +0001B8 9508 RET +0001B9 E8E0 LDI SYSREADA, LOW(TABLEASCII_TABLE_L<<1) +0001BA E0F3 LDI SYSREADA_H, HIGH(TABLEASCII_TABLE_L<<1) +0001BB 0FEA ADD SYSREADA, SYSSTRINGA +0001BC F408 BRCC PC + 2 +0001BD 95F3 INC SYSREADA_H +0001BE 95C8 LPM +0001BF 9508 RET + TABLEASCII_TABLE_L +0001C0 00F0 0000 0000 0000 005F 0000 0007 0007 7F14 7F14 2414 7F2A 122A 1323 6408 RAW 00F0,0000,0000,0000,005F,0000,0007,0007,7F14,7F14,2414,7F2A,122A,1323,6408 +0001CF 3662 5549 5022 0500 0003 0000 221C 0041 4100 1C22 1400 3E08 1408 0808 083E 0008 RAW 3662,5549,5022,0500,0003,0000,221C,0041,4100,1C22,1400,3E08,1408,0808,083E,0008 +0001DF 3050 0000 0808 0808 0008 6060 0000 1020 0408 3E02 4951 3E45 4200 407F 4200 5161 RAW 3050,0000,0808,0808,0008,6060,0000,1020,0408,3E02,4951,3E45,4200,407F,4200,5161 +0001EF 4649 4121 4B45 1831 1214 107F 4527 4545 3C39 494A 3049 7101 0509 3603 RAW 4649,4121,4B45,1831,1214,107F,4527,4545,3C39,494A,3049,7101,0509,3603 +0001FD 4949 3649 4906 2949 001E 3636 0000 5600 0036 0800 2214 0041 1414 1414 0014 RAW 4949,3649,4906,2949,001E,3636,0000,5600,0036,0800,2214,0041,1414,1414,0014 +00020C 2241 0814 0102 0951 3206 7949 3E41 117E 1111 7F7E 4949 3649 413E 4141 RAW 2241,0814,0102,0951,3206,7949,3E41,117E,1111,7F7E,4949,3649,413E,4141 +00021A 7F22 4141 1C22 497F 4949 7F41 0909 0109 413E 4949 7F7A 0808 7F08 4100 RAW 7F22,4141,1C22,497F,4949,7F41,0909,0109,413E,4949,7F7A,0808,7F08,4100 +000228 417F 2000 4140 013F 087F 2214 7F41 4040 4040 027F 020C 7F7F 0804 7F10 RAW 417F,2000,4140,013F,087F,2214,7F41,4040,4040,027F,020C,7F7F,0804,7F10 +000236 413E 4141 003E RAW 413E,4141,003E + + + DELAY_MS +000239 95E3 INC SYSWAITTEMPMS_H + DMS_START +00023A EFAE LDI DELAYTEMP2,254 + DMS_OUTER +00023B E194 LDI DELAYTEMP,20 + DMS_INNER +00023C 959A DEC DELAYTEMP +00023D F7F1 BRNE DMS_INNER +00023E 95AA DEC DELAYTEMP2 +00023F F7D9 BRNE DMS_OUTER +000240 95DA DEC SYSWAITTEMPMS +000241 F7C1 BRNE DMS_START +000242 95EA DEC SYSWAITTEMPMS_H +000243 F7B1 BRNE DMS_START +000244 9508 RET + + + DELAY_S + DS_START +000245 EED8 LDI SYSWAITTEMPMS,232 +000246 E0E3 LDI SYSWAITTEMPMS_H,3 +000247 DFF1 RCALL DELAY_MS +000248 95FA DEC SYSWAITTEMPS +000249 F7D9 BRNE DS_START +00024A 9508 RET + + + GLCDCHARACTER +00024B 9160 012E LDS SYSCALCTEMPA,GLCDCHAR +00024D 3560 CPI SYSCALCTEMPA,80 +00024E F550 BRSH ELSE17_1 +00024F 9100 012E LDS SYSTEMP2,GLCDCHAR +000251 E210 LDI SYSTEMP3,32 +000252 1B01 SUB SYSTEMP2,SYSTEMP3 +000253 2E10 MOV SYSTEMP1,SYSTEMP2 +000254 2D61 MOV SYSBYTETEMPA,SYSTEMP1 +000255 E0C5 LDI SYSBYTETEMPB,5 +000256 9F6C MUL SYSBYTETEMPA,SYSBYTETEMPB +000257 9200 012E STS GLCDCHAR,SYSBYTETEMPX +000259 E055 LDI SYSVALUECOPY,5 +00025A 9350 013C STS SYSREPEATTEMP4,SYSVALUECOPY + SYSREPEATLOOP4 +00025C 9010 012E LDS SYSTEMP1,GLCDCHAR +00025E 9413 INC SYSTEMP1 +00025F 9210 012E STS GLCDCHAR,SYSTEMP1 +000261 91A0 012E LDS SYSSTRINGA,GLCDCHAR +000263 DF51 RCALL ASCII_TABLE_L +000264 9200 0129 STS CHARLINE,SYSBYTETEMPX +000266 E051 LDI SYSVALUECOPY,1 +000267 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +000269 9150 0129 LDS SYSVALUECOPY,CHARLINE +00026B 9350 0130 STS GLCDDAT,SYSVALUECOPY +00026D D10C RCALL GLCDWRITE +00026E 9150 0130 LDS SYSVALUECOPY,GLCDDAT +000270 9350 0129 STS CHARLINE,SYSVALUECOPY +000272 9010 013C LDS SYSTEMP1,SYSREPEATTEMP4 +000274 941A DEC SYSTEMP1 +000275 9210 013C STS SYSREPEATTEMP4,SYSTEMP1 +000277 F721 BRNE SYSREPEATLOOP4 + SYSREPEATLOOPEND4 +000278 C029 RJMP ENDIF17 + ELSE17_1 +000279 9100 012E LDS SYSTEMP2,GLCDCHAR +00027B E510 LDI SYSTEMP3,80 +00027C 1B01 SUB SYSTEMP2,SYSTEMP3 +00027D 2E10 MOV SYSTEMP1,SYSTEMP2 +00027E 2D61 MOV SYSBYTETEMPA,SYSTEMP1 +00027F E0C5 LDI SYSBYTETEMPB,5 +000280 9F6C MUL SYSBYTETEMPA,SYSBYTETEMPB +000281 9200 012E STS GLCDCHAR,SYSBYTETEMPX +000283 E055 LDI SYSVALUECOPY,5 +000284 9350 013C STS SYSREPEATTEMP4,SYSVALUECOPY + SYSREPEATLOOP5 +000286 9010 012E LDS SYSTEMP1,GLCDCHAR +000288 9413 INC SYSTEMP1 +000289 9210 012E STS GLCDCHAR,SYSTEMP1 +00028B 91A0 012E LDS SYSSTRINGA,GLCDCHAR +00028D DEA3 RCALL ASCII_TABLE_H +00028E 9200 0129 STS CHARLINE,SYSBYTETEMPX +000290 E051 LDI SYSVALUECOPY,1 +000291 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +000293 9150 0129 LDS SYSVALUECOPY,CHARLINE +000295 9350 0130 STS GLCDDAT,SYSVALUECOPY +000297 D0E2 RCALL GLCDWRITE +000298 9150 0130 LDS SYSVALUECOPY,GLCDDAT +00029A 9350 0129 STS CHARLINE,SYSVALUECOPY +00029C 9010 013C LDS SYSTEMP1,SYSREPEATTEMP4 +00029E 941A DEC SYSTEMP1 +00029F 9210 013C STS SYSREPEATTEMP4,SYSTEMP1 +0002A1 F721 BRNE SYSREPEATLOOP5 + SYSREPEATLOOPEND5 + ENDIF17 +0002A2 E051 LDI SYSVALUECOPY,1 +0002A3 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +0002A5 E050 LDI SYSVALUECOPY,0 +0002A6 9350 0130 STS GLCDDAT,SYSVALUECOPY +0002A8 C0D1 RJMP GLCDWRITE + + + GLCDCLEAR +0002A9 EF57 LDI SYSVALUECOPY,247 +0002AA 9350 013A STS SYSREPEATTEMP3,SYSVALUECOPY +0002AC E052 LDI SYSVALUECOPY,2 +0002AD 9350 013B STS SYSREPEATTEMP3_H,SYSVALUECOPY + SYSREPEATLOOP3 +0002AF E051 LDI SYSVALUECOPY,1 +0002B0 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +0002B2 E050 LDI SYSVALUECOPY,0 +0002B3 9350 0130 STS GLCDDAT,SYSVALUECOPY +0002B5 D0C4 RCALL GLCDWRITE +0002B6 9010 013A LDS SYSTEMP1,SYSREPEATTEMP3 +0002B8 9020 013B LDS SYSTEMP1_H,SYSREPEATTEMP3_H +0002BA 941A DEC SYSTEMP1 +0002BB 9210 013A STS SYSREPEATTEMP3,SYSTEMP1 +0002BD F789 BRNE SYSREPEATLOOP3 +0002BE 942A DEC SYSTEMP1_H +0002BF 9220 013B STS SYSREPEATTEMP3_H,SYSTEMP1_H +0002C1 F769 BRNE SYSREPEATLOOP3 + SYSREPEATLOOPEND3 +0002C2 9508 RET + + + GLCDDRAWFRAME +0002C3 EF5F LDI SYSVALUECOPY,255 +0002C4 9350 0131 STS GLCDINDEX,SYSVALUECOPY + SYSFORLOOP2 +0002C6 9010 0131 LDS SYSTEMP1,GLCDINDEX +0002C8 9413 INC SYSTEMP1 +0002C9 9210 0131 STS GLCDINDEX,SYSTEMP1 +0002CB 9150 0131 LDS SYSVALUECOPY,GLCDINDEX +0002CD 9350 0132 STS GLCDP_X,SYSVALUECOPY +0002CF E050 LDI SYSVALUECOPY,0 +0002D0 9350 0133 STS GLCDP_Y,SYSVALUECOPY +0002D2 D05D RCALL GLCDGOTOXY +0002D3 E051 LDI SYSVALUECOPY,1 +0002D4 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +0002D6 E051 LDI SYSVALUECOPY,1 +0002D7 9350 0130 STS GLCDDAT,SYSVALUECOPY +0002D9 D0A0 RCALL GLCDWRITE +0002DA 9160 0131 LDS SYSCALCTEMPA,GLCDINDEX +0002DC 3563 CPI SYSCALCTEMPA,83 +0002DD F340 BRLO SYSFORLOOP2 + SYSFORLOOPEND2 +0002DE EF5F LDI SYSVALUECOPY,255 +0002DF 9350 0131 STS GLCDINDEX,SYSVALUECOPY + SYSFORLOOP3 +0002E1 9010 0131 LDS SYSTEMP1,GLCDINDEX +0002E3 9413 INC SYSTEMP1 +0002E4 9210 0131 STS GLCDINDEX,SYSTEMP1 +0002E6 9150 0131 LDS SYSVALUECOPY,GLCDINDEX +0002E8 9350 0132 STS GLCDP_X,SYSVALUECOPY +0002EA E055 LDI SYSVALUECOPY,5 +0002EB 9350 0133 STS GLCDP_Y,SYSVALUECOPY +0002ED D042 RCALL GLCDGOTOXY +0002EE E051 LDI SYSVALUECOPY,1 +0002EF 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +0002F1 E850 LDI SYSVALUECOPY,128 +0002F2 9350 0130 STS GLCDDAT,SYSVALUECOPY +0002F4 D085 RCALL GLCDWRITE +0002F5 9160 0131 LDS SYSCALCTEMPA,GLCDINDEX +0002F7 3563 CPI SYSCALCTEMPA,83 +0002F8 F340 BRLO SYSFORLOOP3 + SYSFORLOOPEND3 +0002F9 EF5F LDI SYSVALUECOPY,255 +0002FA 9350 0131 STS GLCDINDEX,SYSVALUECOPY + SYSFORLOOP4 +0002FC 9010 0131 LDS SYSTEMP1,GLCDINDEX +0002FE 9413 INC SYSTEMP1 +0002FF 9210 0131 STS GLCDINDEX,SYSTEMP1 +000301 E553 LDI SYSVALUECOPY,83 +000302 9350 0132 STS GLCDP_X,SYSVALUECOPY +000304 9150 0131 LDS SYSVALUECOPY,GLCDINDEX +000306 9350 0133 STS GLCDP_Y,SYSVALUECOPY +000308 D027 RCALL GLCDGOTOXY +000309 E051 LDI SYSVALUECOPY,1 +00030A 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +00030C EF5F LDI SYSVALUECOPY,255 +00030D 9350 0130 STS GLCDDAT,SYSVALUECOPY +00030F D06A RCALL GLCDWRITE +000310 9160 0131 LDS SYSCALCTEMPA,GLCDINDEX +000312 3065 CPI SYSCALCTEMPA,5 +000313 F340 BRLO SYSFORLOOP4 + SYSFORLOOPEND4 +000314 EF5F LDI SYSVALUECOPY,255 +000315 9350 0131 STS GLCDINDEX,SYSVALUECOPY + SYSFORLOOP5 +000317 9010 0131 LDS SYSTEMP1,GLCDINDEX +000319 9413 INC SYSTEMP1 +00031A 9210 0131 STS GLCDINDEX,SYSTEMP1 +00031C E050 LDI SYSVALUECOPY,0 +00031D 9350 0132 STS GLCDP_X,SYSVALUECOPY +00031F 9150 0131 LDS SYSVALUECOPY,GLCDINDEX +000321 9350 0133 STS GLCDP_Y,SYSVALUECOPY +000323 D00C RCALL GLCDGOTOXY +000324 E051 LDI SYSVALUECOPY,1 +000325 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +000327 EF5F LDI SYSVALUECOPY,255 +000328 9350 0130 STS GLCDDAT,SYSVALUECOPY +00032A D04F RCALL GLCDWRITE +00032B 9160 0131 LDS SYSCALCTEMPA,GLCDINDEX +00032D 3065 CPI SYSCALCTEMPA,5 +00032E F340 BRLO SYSFORLOOP5 + SYSFORLOOPEND5 +00032F 9508 RET + + + GLCDGOTOXY +000330 E050 LDI SYSVALUECOPY,0 +000331 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +000333 E800 LDI SYSTEMP2,128 +000334 9010 0132 LDS SYSTEMP1,GLCDP_X +000336 2A10 OR SYSTEMP1,SYSTEMP2 +000337 9210 0130 STS GLCDDAT,SYSTEMP1 +000339 D040 RCALL GLCDWRITE +00033A E050 LDI SYSVALUECOPY,0 +00033B 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +00033D E400 LDI SYSTEMP2,64 +00033E 9010 0133 LDS SYSTEMP1,GLCDP_Y +000340 2A10 OR SYSTEMP1,SYSTEMP2 +000341 9210 0130 STS GLCDDAT,SYSTEMP1 +000343 C036 RJMP GLCDWRITE + + + GLCDPRINT9 +000344 E050 LDI SYSVALUECOPY,0 +000345 9350 0131 STS GLCDINDEX,SYSVALUECOPY +000347 91A0 0136 LDS SYSSTRINGA,SYSGLCDSTRDATHANDLER +000349 91B0 0137 LDS SYSSTRINGA_H,SYSGLCDSTRDATHANDLER_H +00034B 916C LD SYSCALCTEMPA,X +00034C 3061 CPI SYSCALCTEMPA,1 +00034D F158 BRLO SYSFORLOOPEND1 + SYSFORLOOP1 +00034E 9010 0131 LDS SYSTEMP1,GLCDINDEX +000350 9413 INC SYSTEMP1 +000351 9210 0131 STS GLCDINDEX,SYSTEMP1 +000353 9010 0136 LDS SYSTEMP1,SYSGLCDSTRDATHANDLER +000355 9100 0131 LDS SYSTEMP2,GLCDINDEX +000357 0E10 ADD SYSTEMP1,SYSTEMP2 +000358 2DA1 MOV SYSSTRINGA,SYSTEMP1 +000359 9010 0137 LDS SYSTEMP1,SYSGLCDSTRDATHANDLER_H +00035B E000 LDI SYSTEMP2,0 +00035C 1E10 ADC SYSTEMP1,SYSTEMP2 +00035D 2DB1 MOV SYSSTRINGA_H,SYSTEMP1 +00035E 915C LD SYSVALUECOPY,X +00035F 9350 012E STS GLCDCHAR,SYSVALUECOPY +000361 DEE9 RCALL GLCDCHARACTER +000362 9010 0136 LDS SYSTEMP1,SYSGLCDSTRDATHANDLER +000364 9100 0131 LDS SYSTEMP2,GLCDINDEX +000366 0E10 ADD SYSTEMP1,SYSTEMP2 +000367 2DA1 MOV SYSSTRINGA,SYSTEMP1 +000368 9010 0137 LDS SYSTEMP1,SYSGLCDSTRDATHANDLER_H +00036A E000 LDI SYSTEMP2,0 +00036B 1E10 ADC SYSTEMP1,SYSTEMP2 +00036C 2DB1 MOV SYSSTRINGA_H,SYSTEMP1 +00036D 9150 012E LDS SYSVALUECOPY,GLCDCHAR +00036F 935C ST X,SYSVALUECOPY +000370 91A0 0136 LDS SYSSTRINGA,SYSGLCDSTRDATHANDLER +000372 91B0 0137 LDS SYSSTRINGA_H,SYSGLCDSTRDATHANDLER_H +000374 9160 0131 LDS SYSCALCTEMPA,GLCDINDEX +000376 91CC LD SYSCALCTEMPB,X +000377 176C CP SYSCALCTEMPA,SYSCALCTEMPB +000378 F2A8 BRLO SYSFORLOOP1 + SYSFORLOOPEND1 +000379 9508 RET + + + GLCDWRITE +00037A 9160 012F LDS SYSCALCTEMPA,GLCDCOMDAT +00037C 3061 CPI SYSCALCTEMPA,1 +00037D F411 BRNE ELSE9_1 +00037E 9A2E SBI PORTB,6 +00037F C001 RJMP ENDIF9 + ELSE9_1 +000380 982E CBI PORTB,6 + ENDIF9 +000381 E058 LDI SYSVALUECOPY,8 +000382 9350 0139 STS SYSREPEATTEMP2,SYSVALUECOPY + SYSREPEATLOOP2 +000384 982C CBI PORTB,4 +000385 9050 0130 LDS SYSBITTEST,GLCDDAT +000387 FE57 SBRS SYSBITTEST,7 +000388 C002 RJMP ELSE10_1 +000389 9A2D SBI PORTB,5 +00038A C001 RJMP ENDIF10 + ELSE10_1 +00038B 982D CBI PORTB,5 + ENDIF10 +00038C 9160 0130 LDS SYSBYTETEMPA,GLCDDAT +00038E 1F66 ROL SYSBYTETEMPA +00038F 9360 0130 STS GLCDDAT,SYSBYTETEMPA +000391 9A2C SBI PORTB,4 +000392 9010 0139 LDS SYSTEMP1,SYSREPEATTEMP2 +000394 941A DEC SYSTEMP1 +000395 9210 0139 STS SYSREPEATTEMP2,SYSTEMP1 +000397 F761 BRNE SYSREPEATLOOP2 + SYSREPEATLOOPEND2 +000398 9508 RET + + + INITGLCD +000399 982F CBI PORTB,7 +00039A E6D4 LDI SYSWAITTEMPMS,100 +00039B E0E0 LDI SYSWAITTEMPMS_H,0 +00039C DE9C RCALL DELAY_MS +00039D 9A2F SBI PORTB,7 +00039E E050 LDI SYSVALUECOPY,0 +00039F 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +0003A1 E251 LDI SYSVALUECOPY,33 +0003A2 9350 0130 STS GLCDDAT,SYSVALUECOPY +0003A4 DFD5 RCALL GLCDWRITE +0003A5 E050 LDI SYSVALUECOPY,0 +0003A6 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +0003A8 EB5F LDI SYSVALUECOPY,191 +0003A9 9350 0130 STS GLCDDAT,SYSVALUECOPY +0003AB DFCE RCALL GLCDWRITE +0003AC E050 LDI SYSVALUECOPY,0 +0003AD 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +0003AF E054 LDI SYSVALUECOPY,4 +0003B0 9350 0130 STS GLCDDAT,SYSVALUECOPY +0003B2 DFC7 RCALL GLCDWRITE +0003B3 E050 LDI SYSVALUECOPY,0 +0003B4 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +0003B6 E154 LDI SYSVALUECOPY,20 +0003B7 9350 0130 STS GLCDDAT,SYSVALUECOPY +0003B9 DFC0 RCALL GLCDWRITE +0003BA E050 LDI SYSVALUECOPY,0 +0003BB 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +0003BD E05C LDI SYSVALUECOPY,12 +0003BE 9350 0130 STS GLCDDAT,SYSVALUECOPY +0003C0 DFB9 RCALL GLCDWRITE +0003C1 E050 LDI SYSVALUECOPY,0 +0003C2 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +0003C4 E250 LDI SYSVALUECOPY,32 +0003C5 9350 0130 STS GLCDDAT,SYSVALUECOPY +0003C7 DFB2 RCALL GLCDWRITE +0003C8 E050 LDI SYSVALUECOPY,0 +0003C9 9350 012F STS GLCDCOMDAT,SYSVALUECOPY +0003CB E05C LDI SYSVALUECOPY,12 +0003CC 9350 0130 STS GLCDDAT,SYSVALUECOPY +0003CE CFAB RJMP GLCDWRITE + + + INITSYS +0003CF E050 LDI SYSVALUECOPY,0 +0003D0 B955 OUT PORTB,SYSVALUECOPY +0003D1 E050 LDI SYSVALUECOPY,0 +0003D2 B958 OUT PORTC,SYSVALUECOPY +0003D3 E050 LDI SYSVALUECOPY,0 +0003D4 B95B OUT PORTD,SYSVALUECOPY +0003D5 9508 RET + + + SYSREADSTRING +0003D6 95C8 LPM +0003D7 2D60 MOV SYSCALCTEMPA, SYSCALCTEMPX +0003D8 95E3 INC SYSREADA +0003D9 F409 BRNE PC + 2 +0003DA 95F3 INC SYSREADA_H +0003DB 9369 ST Y+, SYSCALCTEMPA +0003DC C006 RJMP SYSSTRINGREADCHECK + SYSREADSTRINGPART +0003DD 95C8 LPM +0003DE 2D60 MOV SYSCALCTEMPA, SYSCALCTEMPX +0003DF 95E3 INC SYSREADA +0003E0 F409 BRNE PC + 2 +0003E1 95F3 INC SYSREADA_H +0003E2 0F96 ADD SYSSTRINGLENGTH, SYSCALCTEMPA + SYSSTRINGREADCHECK +0003E3 3060 CPI SYSCALCTEMPA, 0 +0003E4 F409 BRNE SYSSTRINGREAD +0003E5 9508 RET + SYSSTRINGREAD +0003E6 95C8 LPM +0003E7 95E3 INC SYSREADA +0003E8 F409 BRNE PC + 2 +0003E9 95F3 INC SYSREADA_H +0003EA 9209 ST Y+, SYSCALCTEMPX +0003EB 956A DEC SYSCALCTEMPA +0003EC F7C9 BRNE SYSSTRINGREAD +0003ED 9508 RET + + + SYSSTRINGTABLES + + STRINGTABLE1 +0003EE 200B 4420 7369 6C70 7961 3120 RAW 200B,4420,7369,6C70,7961,3120 + + + STRINGTABLE2 +0003F4 200B 4420 7369 6C70 7961 3220 RAW 200B,4420,7369,6C70,7961,3220 + + + STRINGTABLE3 +0003FA 2001 RAW 2001 + + + STRINGTABLE4 +0003FB 2A01 RAW 2A01 + + + diff --git a/resources/examples/Avr/glcd8544_mega168/glcd8544_mega168.simu b/resources/examples/Avr/glcd8544_mega168/glcd8544_mega168.simu new file mode 100644 index 0000000..5195f24 --- /dev/null +++ b/resources/examples/Avr/glcd8544_mega168/glcd8544_mega168.simu @@ -0,0 +1,72 @@ + + +Node-7: + + +Node-6: + + +Node-5: + + +Node-4: + + +Pcd8544-3: + + +Pcd8544-2: + + +atmega168-1: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-15: + + +Connector-16: + + +Connector-17: + + +Connector-18: + + +Connector-19: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-25: + + +Connector-26: + + +PlotterWidget-50: + + +SerialPortWidget-51: + + + diff --git a/resources/examples/Avr/hc595_mega328/74hc595.gcb b/resources/examples/Avr/hc595_mega328/74hc595.gcb new file mode 100644 index 0000000..189d60f --- /dev/null +++ b/resources/examples/Avr/hc595_mega328/74hc595.gcb @@ -0,0 +1,49 @@ + + + +'#define SER +'#define OE +'#define RCLK +'#define SRCLK +'#define SRCLR + +'#define delay595 + +#define clear595 SRCLR = 0 + +Sub init595 + Dir SRCLR out + Dir SRCLK out + Dir RCLK out + Dir OE out + Dir SER out + SRCLR = 0 'Clear shiht register + SRCLK = 0 ' + RCLK = 0 ' + OE = 0 'Enable outputs + SER = 0 + + SRCLR = 1 +End Sub + +Sub shiftByte( in byteout as byte ) 'LSB first + RCLK = 0 + for num=0 to 7 + SRCLK = 0 + SER = byteout.0 + SRCLK = 1 + rotate byteout right + #ifdef delay595 + wait delay595 + #endif + next + RCLK = 1 +End Sub + +Sub shiftBit( in bitout as bit ) + RCLK = 0 + SRCLK = 0 + SER = bitout.0 + SRCLK = 1 + RCLK = 1 +End Sub diff --git a/resources/examples/Avr/hc595_mega328/hc595_mega328.asm b/resources/examples/Avr/hc595_mega328/hc595_mega328.asm new file mode 100644 index 0000000..c0dd259 --- /dev/null +++ b/resources/examples/Avr/hc595_mega328/hc595_mega328.asm @@ -0,0 +1,201 @@ +;Program compiled by Great Cow BASIC (0.94 2015-10-27) +;Need help? See the GCBASIC forums at http://sourceforge.net/projects/gcbasic/forums, +;check the documentation or email w_cholmondeley at users dot sourceforge dot net. + +;******************************************************************************** + +;Chip Model: MEGA328P +;Assembler header file +.INCLUDE "m328pdef.inc" + +;SREG bit names (for AVR Assembler compatibility, GCBASIC uses different names) +#define I 7 +#define T 6 +#define H 5 +#define S 4 +#define V 3 +#define N 2 +#define Z 1 +#define C 0 + +;******************************************************************************** + +;Set aside memory locations for variables +.EQU BITOUT=256 +.EQU INDEX=257 + +;******************************************************************************** + +;Register variables +.DEF DELAYTEMP=r25 +.DEF DELAYTEMP2=r26 +.DEF SysBitTest=r5 +.DEF SysCalcTempA=r22 +.DEF SysValueCopy=r21 +.DEF SysWaitTempMS=r29 +.DEF SysWaitTempMS_H=r30 +.DEF SysTemp1=r0 + +;******************************************************************************** + +;Vectors +;Interrupt vectors + nop + rjmp BASPROGRAMSTART ;Reset + nop + reti ;INT0 + nop + reti ;INT1 + nop + reti ;PCINT0 + nop + reti ;PCINT1 + nop + reti ;PCINT2 + nop + reti ;WDT + nop + reti ;TIMER2_COMPA + nop + reti ;TIMER2_COMPB + nop + reti ;TIMER2_OVF + nop + reti ;TIMER1_CAPT + nop + reti ;TIMER1_COMPA + nop + reti ;TIMER1_COMPB + nop + reti ;TIMER1_OVF + nop + reti ;TIMER0_COMPA + nop + reti ;TIMER0_COMPB + nop + reti ;TIMER0_OVF + nop + reti ;SPI_STC + nop + reti ;USART_RX + nop + reti ;USART_UDRE + nop + reti ;USART_TX + nop + reti ;ADC + nop + reti ;EE_READY + nop + reti ;ANALOG_COMP + nop + reti ;TWI + nop + reti ;SPM_READY + +;******************************************************************************** + +;Start of program memory page 0 +nop +BASPROGRAMSTART: +;Initialise stack + ldi SysValueCopy,high(RAMEND) + out SPH, SysValueCopy + ldi SysValueCopy,low(RAMEND) + out SPL, SysValueCopy +;Call initialisation routines + rcall INITSYS + +;Start of the main program + rcall INIT595 +SysDoLoop_S1: + ldi SysValueCopy,1 + sts BITOUT,SysValueCopy + rcall SHIFTBIT + ldi SysWaitTempMS,244 + ldi SysWaitTempMS_H,1 + rcall Delay_MS + ldi SysValueCopy,0 + sts INDEX,SysValueCopy +SysForLoop1: + lds SysTemp1,INDEX + inc SysTemp1 + sts INDEX,SysTemp1 + ldi SysValueCopy,0 + sts BITOUT,SysValueCopy + rcall SHIFTBIT + ldi SysWaitTempMS,244 + ldi SysWaitTempMS_H,1 + rcall Delay_MS + lds SysCalcTempA,INDEX + cpi SysCalcTempA,7 + brlo SysForLoop1 +SysForLoopEnd1: + rjmp SysDoLoop_S1 +SysDoLoop_E1: +BASPROGRAMEND: + sleep + rjmp BASPROGRAMEND + +;******************************************************************************** + +Delay_MS: + inc SysWaitTempMS_H +DMS_START: + ldi DELAYTEMP2,254 +DMS_OUTER: + ldi DELAYTEMP,20 +DMS_INNER: + dec DELAYTEMP + brne DMS_INNER + dec DELAYTEMP2 + brne DMS_OUTER + dec SysWaitTempMS + brne DMS_START + dec SysWaitTempMS_H + brne DMS_START + ret + +;******************************************************************************** + +INIT595: + sbi DDRB,5 + sbi DDRB,4 + sbi DDRB,3 + sbi DDRB,2 + sbi DDRB,1 + cbi PORTB,5 + cbi PORTB,4 + cbi PORTB,3 + cbi PORTB,2 + cbi PORTB,1 + sbi PORTB,5 + ret + +;******************************************************************************** + +INITSYS: + ldi SysValueCopy,0 + out PORTB,SysValueCopy + ldi SysValueCopy,0 + out PORTC,SysValueCopy + ldi SysValueCopy,0 + out PORTD,SysValueCopy + ret + +;******************************************************************************** + +SHIFTBIT: + cbi PORTB,3 + cbi PORTB,4 + cbi PORTB,1 + lds SysBitTest,BITOUT + sbrc SysBitTest,0 + sbi PORTB,1 + sbi PORTB,4 + sbi PORTB,3 + ret + +;******************************************************************************** + + diff --git a/resources/examples/Avr/hc595_mega328/hc595_mega328.gcb b/resources/examples/Avr/hc595_mega328/hc595_mega328.gcb new file mode 100644 index 0000000..2dad151 --- /dev/null +++ b/resources/examples/Avr/hc595_mega328/hc595_mega328.gcb @@ -0,0 +1,21 @@ + +#chip mega328P, 16 + +#include "74hc595.gcb" + +#define SER portb.1 +#define OE portb.2 +#define RCLK portb.3 +#define SRCLK portb.4 +#define SRCLR portb.5 + +init595 +do + shiftBit( 1 ) + wait 500 ms + + for index=1 to 7 + shiftBit( 0 ) + wait 500 ms + next +loop diff --git a/resources/examples/Avr/hc595_mega328/hc595_mega328.html b/resources/examples/Avr/hc595_mega328/hc595_mega328.html new file mode 100644 index 0000000..6363195 --- /dev/null +++ b/resources/examples/Avr/hc595_mega328/hc595_mega328.html @@ -0,0 +1,26 @@ + + + +Compilation Report + + +

Compilation Report

+

Compiler Version (DD/MM/YYYY): 0.94 2015-10-27

+

Chip resource usage:

+

Chip Model: MEGA328P

+

Program Memory: 81/32768 words (.25%)

+

RAM: 2/2048 bytes (.1%)

+

RAM Allocation

+ +
+

Subroutines

+ + + + + + + +
NameCode Size (lines)Compiled Size (words)Outgoing calls
Main1540Delay_MS(2), SHIFTBIT(2), INIT595(1), INITSYS(1)
INIT5951112
SHIFTBIT510
INITSYS3657
Delay_MS012
+ + diff --git a/resources/examples/Avr/hc595_mega328/hc595_mega328.lst b/resources/examples/Avr/hc595_mega328/hc595_mega328.lst new file mode 100644 index 0000000..1c212d9 --- /dev/null +++ b/resources/examples/Avr/hc595_mega328/hc595_mega328.lst @@ -0,0 +1,836 @@ +GCASM List File (GCBASIC 0.94 2015-10-27) + +Symbols: +-X EQU 30 +-Y EQU 26 +-Z EQU 18 +ACBG EQU 6 +ACD EQU 7 +ACI EQU 4 +ACIC EQU 2 +ACIE EQU 3 +ACIS0 EQU 0 +ACIS1 EQU 1 +ACME EQU 6 +ACO EQU 5 +ACSR EQU 48 +ADATE EQU 5 +ADC0D EQU 0 +ADC1D EQU 1 +ADC2D EQU 2 +ADC3D EQU 3 +ADC4D EQU 4 +ADC5D EQU 5 +ADCH EQU 121 +ADCH0 EQU 0 +ADCH1 EQU 1 +ADCH2 EQU 2 +ADCH3 EQU 3 +ADCH4 EQU 4 +ADCH5 EQU 5 +ADCH6 EQU 6 +ADCH7 EQU 7 +ADCL EQU 120 +ADCL0 EQU 0 +ADCL1 EQU 1 +ADCL2 EQU 2 +ADCL3 EQU 3 +ADCL4 EQU 4 +ADCL5 EQU 5 +ADCL6 EQU 6 +ADCL7 EQU 7 +ADCSRA EQU 122 +ADCSRB EQU 123 +ADEN EQU 7 +ADIE EQU 3 +ADIF EQU 4 +ADLAR EQU 5 +ADMUX EQU 124 +ADPS0 EQU 0 +ADPS1 EQU 1 +ADPS2 EQU 2 +ADSC EQU 6 +ADTS0 EQU 0 +ADTS1 EQU 1 +ADTS2 EQU 2 +AIN0D EQU 0 +AIN1D EQU 1 +AS2 EQU 5 +ASSR EQU 182 +BASPROGRAMEND EQU 86 +BASPROGRAMSTART EQU 53 +BITOUT EQU 256 +BLBSET EQU 3 +BODS EQU 6 +BODSE EQU 5 +BORF EQU 2 +C EQU 0 +CAL0 EQU 0 +CAL1 EQU 1 +CAL2 EQU 2 +CAL3 EQU 3 +CAL4 EQU 4 +CAL5 EQU 5 +CAL6 EQU 6 +CAL7 EQU 7 +CLKPCE EQU 7 +CLKPR EQU 97 +CLKPS0 EQU 0 +CLKPS1 EQU 1 +CLKPS2 EQU 2 +CLKPS3 EQU 3 +COM0A0 EQU 6 +COM0A1 EQU 7 +COM0B0 EQU 4 +COM0B1 EQU 5 +COM1A0 EQU 6 +COM1A1 EQU 7 +COM1B0 EQU 4 +COM1B1 EQU 5 +COM2A0 EQU 6 +COM2A1 EQU 7 +COM2B0 EQU 4 +COM2B1 EQU 5 +CPHA EQU 2 +CPOL EQU 3 +CS00 EQU 0 +CS01 EQU 1 +CS02 EQU 2 +CS10 EQU 0 +CS11 EQU 1 +CS12 EQU 2 +CS20 EQU 0 +CS21 EQU 1 +CS22 EQU 2 +DDB0 EQU 0 +DDB1 EQU 1 +DDB2 EQU 2 +DDB3 EQU 3 +DDB4 EQU 4 +DDB5 EQU 5 +DDB6 EQU 6 +DDB7 EQU 7 +DDC0 EQU 0 +DDC1 EQU 1 +DDC2 EQU 2 +DDC3 EQU 3 +DDC4 EQU 4 +DDC5 EQU 5 +DDC6 EQU 6 +DDD0 EQU 0 +DDD1 EQU 1 +DDD2 EQU 2 +DDD3 EQU 3 +DDD4 EQU 4 +DDD5 EQU 5 +DDD6 EQU 6 +DDD7 EQU 7 +DDRB EQU 4 +DDRC EQU 7 +DDRD EQU 10 +DELAYTEMP EQU r25 +DELAYTEMP2 EQU r26 +DELAY_MS EQU 88 +DIDR0 EQU 126 +DIDR1 EQU 127 +DMS_INNER EQU 91 +DMS_OUTER EQU 90 +DMS_START EQU 89 +DOR0 EQU 3 +DORD EQU 5 +EEAR0 EQU 0 +EEAR1 EQU 1 +EEAR2 EQU 2 +EEAR3 EQU 3 +EEAR4 EQU 4 +EEAR5 EQU 5 +EEAR6 EQU 6 +EEAR7 EQU 7 +EEAR8 EQU 0 +EEAR9 EQU 1 +EEARH EQU 34 +EEARL EQU 33 +EECR EQU 31 +EEDR EQU 32 +EEDR0 EQU 0 +EEDR1 EQU 1 +EEDR2 EQU 2 +EEDR3 EQU 3 +EEDR4 EQU 4 +EEDR5 EQU 5 +EEDR6 EQU 6 +EEDR7 EQU 7 +EEMPE EQU 2 +EEPE EQU 1 +EEPM0 EQU 4 +EEPM1 EQU 5 +EERE EQU 0 +EERIE EQU 3 +EICRA EQU 105 +EIFR EQU 28 +EIMSK EQU 29 +EXCLK EQU 6 +EXTRF EQU 1 +FE0 EQU 4 +FOC0A EQU 7 +FOC0B EQU 6 +FOC1A EQU 7 +FOC1B EQU 6 +FOC2A EQU 7 +FOC2B EQU 6 +GPIOR0 EQU 30 +GPIOR00 EQU 0 +GPIOR01 EQU 1 +GPIOR02 EQU 2 +GPIOR03 EQU 3 +GPIOR04 EQU 4 +GPIOR05 EQU 5 +GPIOR06 EQU 6 +GPIOR07 EQU 7 +GPIOR1 EQU 42 +GPIOR10 EQU 0 +GPIOR11 EQU 1 +GPIOR12 EQU 2 +GPIOR13 EQU 3 +GPIOR14 EQU 4 +GPIOR15 EQU 5 +GPIOR16 EQU 6 +GPIOR17 EQU 7 +GPIOR2 EQU 43 +GPIOR20 EQU 0 +GPIOR21 EQU 1 +GPIOR22 EQU 2 +GPIOR23 EQU 3 +GPIOR24 EQU 4 +GPIOR25 EQU 5 +GPIOR26 EQU 6 +GPIOR27 EQU 7 +GTCCR EQU 35 +H EQU 5 +I EQU 7 +ICES1 EQU 6 +ICF1 EQU 5 +ICIE1 EQU 5 +ICNC1 EQU 7 +ICR1H EQU 135 +ICR1H0 EQU 0 +ICR1H1 EQU 1 +ICR1H2 EQU 2 +ICR1H3 EQU 3 +ICR1H4 EQU 4 +ICR1H5 EQU 5 +ICR1H6 EQU 6 +ICR1H7 EQU 7 +ICR1L EQU 134 +ICR1L0 EQU 0 +ICR1L1 EQU 1 +ICR1L2 EQU 2 +ICR1L3 EQU 3 +ICR1L4 EQU 4 +ICR1L5 EQU 5 +ICR1L6 EQU 6 +ICR1L7 EQU 7 +INDEX EQU 257 +INIT595 EQU 100 +INITSYS EQU 112 +INT0 EQU 0 +INT1 EQU 1 +INTF0 EQU 0 +INTF1 EQU 1 +ISC00 EQU 0 +ISC01 EQU 1 +ISC10 EQU 2 +ISC11 EQU 3 +IVCE EQU 0 +IVSEL EQU 1 +MCUCR EQU 53 +MCUSR EQU 52 +MPCM0 EQU 0 +MSTR EQU 4 +MUX0 EQU 0 +MUX1 EQU 1 +MUX2 EQU 2 +MUX3 EQU 3 +N EQU 2 +OCF0A EQU 1 +OCF0B EQU 2 +OCF1A EQU 1 +OCF1B EQU 2 +OCF2A EQU 1 +OCF2B EQU 2 +OCIE0A EQU 1 +OCIE0B EQU 2 +OCIE1A EQU 1 +OCIE1B EQU 2 +OCIE2A EQU 1 +OCIE2B EQU 2 +OCR0A EQU 39 +OCR0B EQU 40 +OCR0B_0 EQU 0 +OCR0B_1 EQU 1 +OCR0B_2 EQU 2 +OCR0B_3 EQU 3 +OCR0B_4 EQU 4 +OCR0B_5 EQU 5 +OCR0B_6 EQU 6 +OCR0B_7 EQU 7 +OCR1AH EQU 137 +OCR1AH0 EQU 0 +OCR1AH1 EQU 1 +OCR1AH2 EQU 2 +OCR1AH3 EQU 3 +OCR1AH4 EQU 4 +OCR1AH5 EQU 5 +OCR1AH6 EQU 6 +OCR1AH7 EQU 7 +OCR1AL EQU 136 +OCR1AL0 EQU 0 +OCR1AL1 EQU 1 +OCR1AL2 EQU 2 +OCR1AL3 EQU 3 +OCR1AL4 EQU 4 +OCR1AL5 EQU 5 +OCR1AL6 EQU 6 +OCR1AL7 EQU 7 +OCR1BH EQU 139 +OCR1BH0 EQU 0 +OCR1BH1 EQU 1 +OCR1BH2 EQU 2 +OCR1BH3 EQU 3 +OCR1BH4 EQU 4 +OCR1BH5 EQU 5 +OCR1BH6 EQU 6 +OCR1BH7 EQU 7 +OCR1BL EQU 138 +OCR1BL0 EQU 0 +OCR1BL1 EQU 1 +OCR1BL2 EQU 2 +OCR1BL3 EQU 3 +OCR1BL4 EQU 4 +OCR1BL5 EQU 5 +OCR1BL6 EQU 6 +OCR1BL7 EQU 7 +OCR2A EQU 179 +OCR2AUB EQU 3 +OCR2A_0 EQU 0 +OCR2A_1 EQU 1 +OCR2A_2 EQU 2 +OCR2A_3 EQU 3 +OCR2A_4 EQU 4 +OCR2A_5 EQU 5 +OCR2A_6 EQU 6 +OCR2A_7 EQU 7 +OCR2B EQU 180 +OCR2BUB EQU 2 +OCR2B_0 EQU 0 +OCR2B_1 EQU 1 +OCR2B_2 EQU 2 +OCR2B_3 EQU 3 +OCR2B_4 EQU 4 +OCR2B_5 EQU 5 +OCR2B_6 EQU 6 +OCR2B_7 EQU 7 +OCROA_0 EQU 0 +OCROA_1 EQU 1 +OCROA_2 EQU 2 +OCROA_3 EQU 3 +OCROA_4 EQU 4 +OCROA_5 EQU 5 +OCROA_6 EQU 6 +OCROA_7 EQU 7 +OSCCAL EQU 102 +PCICR EQU 104 +PCIE0 EQU 0 +PCIE1 EQU 1 +PCIE2 EQU 2 +PCIF0 EQU 0 +PCIF1 EQU 1 +PCIF2 EQU 2 +PCIFR EQU 27 +PCINT0 EQU 0 +PCINT1 EQU 1 +PCINT10 EQU 2 +PCINT11 EQU 3 +PCINT12 EQU 4 +PCINT13 EQU 5 +PCINT14 EQU 6 +PCINT16 EQU 0 +PCINT17 EQU 1 +PCINT18 EQU 2 +PCINT19 EQU 3 +PCINT2 EQU 2 +PCINT20 EQU 4 +PCINT21 EQU 5 +PCINT22 EQU 6 +PCINT23 EQU 7 +PCINT3 EQU 3 +PCINT4 EQU 4 +PCINT5 EQU 5 +PCINT6 EQU 6 +PCINT7 EQU 7 +PCINT8 EQU 0 +PCINT9 EQU 1 +PCMSK0 EQU 107 +PCMSK1 EQU 108 +PCMSK2 EQU 109 +PGERS EQU 1 +PGWRT EQU 2 +PINB EQU 3 +PINB0 EQU 0 +PINB1 EQU 1 +PINB2 EQU 2 +PINB3 EQU 3 +PINB4 EQU 4 +PINB5 EQU 5 +PINB6 EQU 6 +PINB7 EQU 7 +PINC EQU 6 +PINC0 EQU 0 +PINC1 EQU 1 +PINC2 EQU 2 +PINC3 EQU 3 +PINC4 EQU 4 +PINC5 EQU 5 +PINC6 EQU 6 +PIND EQU 9 +PIND0 EQU 0 +PIND1 EQU 1 +PIND2 EQU 2 +PIND3 EQU 3 +PIND4 EQU 4 +PIND5 EQU 5 +PIND6 EQU 6 +PIND7 EQU 7 +PORF EQU 0 +PORTB EQU 5 +PORTB0 EQU 0 +PORTB1 EQU 1 +PORTB2 EQU 2 +PORTB3 EQU 3 +PORTB4 EQU 4 +PORTB5 EQU 5 +PORTB6 EQU 6 +PORTB7 EQU 7 +PORTC EQU 8 +PORTC0 EQU 0 +PORTC1 EQU 1 +PORTC2 EQU 2 +PORTC3 EQU 3 +PORTC4 EQU 4 +PORTC5 EQU 5 +PORTC6 EQU 6 +PORTD EQU 11 +PORTD0 EQU 0 +PORTD1 EQU 1 +PORTD2 EQU 2 +PORTD3 EQU 3 +PORTD4 EQU 4 +PORTD5 EQU 5 +PORTD6 EQU 6 +PORTD7 EQU 7 +PRADC EQU 0 +PRR EQU 100 +PRSPI EQU 2 +PRTIM0 EQU 5 +PRTIM1 EQU 3 +PRTIM2 EQU 6 +PRTWI EQU 7 +PRUSART0 EQU 1 +PSRASY EQU 1 +PSRSYNC EQU 0 +PUD EQU 4 +RAMEND EQU 2303 +REFS0 EQU 6 +REFS1 EQU 7 +RWWSB EQU 6 +RWWSRE EQU 4 +RXB80 EQU 1 +RXC0 EQU 7 +RXCIE0 EQU 7 +RXEN0 EQU 4 +S EQU 4 +SE EQU 0 +SELFPRGEN EQU 0 +SHIFTBIT EQU 119 +SM0 EQU 1 +SM1 EQU 2 +SM2 EQU 3 +SMCR EQU 51 +SP0 EQU 0 +SP1 EQU 1 +SP10 EQU 2 +SP11 EQU 3 +SP2 EQU 2 +SP3 EQU 3 +SP4 EQU 4 +SP5 EQU 5 +SP6 EQU 6 +SP7 EQU 7 +SP8 EQU 0 +SP9 EQU 1 +SPCR EQU 44 +SPDR EQU 46 +SPDR0 EQU 0 +SPDR1 EQU 1 +SPDR2 EQU 2 +SPDR3 EQU 3 +SPDR4 EQU 4 +SPDR5 EQU 5 +SPDR6 EQU 6 +SPDR7 EQU 7 +SPE EQU 6 +SPH EQU 62 +SPI2X EQU 0 +SPIE EQU 7 +SPIF EQU 7 +SPL EQU 61 +SPMCSR EQU 55 +SPMIE EQU 7 +SPR0 EQU 0 +SPR1 EQU 1 +SPSR EQU 45 +SREG EQU 63 +SYSDOLOOP_E1 EQU 86 +SYSDOLOOP_S1 EQU 59 +SYSFORLOOP1 EQU 69 +SYSFORLOOPEND1 EQU 85 +SysBitTest EQU r5 +SysCalcTempA EQU r22 +SysTemp1 EQU r0 +SysValueCopy EQU r21 +SysWaitTempMS EQU r29 +SysWaitTempMS_H EQU r30 +T EQU 6 +TCCR0A EQU 36 +TCCR0B EQU 37 +TCCR1A EQU 128 +TCCR1B EQU 129 +TCCR1C EQU 130 +TCCR2A EQU 176 +TCCR2B EQU 177 +TCN2UB EQU 4 +TCNT0 EQU 38 +TCNT0_0 EQU 0 +TCNT0_1 EQU 1 +TCNT0_2 EQU 2 +TCNT0_3 EQU 3 +TCNT0_4 EQU 4 +TCNT0_5 EQU 5 +TCNT0_6 EQU 6 +TCNT0_7 EQU 7 +TCNT1H EQU 133 +TCNT1H0 EQU 0 +TCNT1H1 EQU 1 +TCNT1H2 EQU 2 +TCNT1H3 EQU 3 +TCNT1H4 EQU 4 +TCNT1H5 EQU 5 +TCNT1H6 EQU 6 +TCNT1H7 EQU 7 +TCNT1L EQU 132 +TCNT1L0 EQU 0 +TCNT1L1 EQU 1 +TCNT1L2 EQU 2 +TCNT1L3 EQU 3 +TCNT1L4 EQU 4 +TCNT1L5 EQU 5 +TCNT1L6 EQU 6 +TCNT1L7 EQU 7 +TCNT2 EQU 178 +TCNT2_0 EQU 0 +TCNT2_1 EQU 1 +TCNT2_2 EQU 2 +TCNT2_3 EQU 3 +TCNT2_4 EQU 4 +TCNT2_5 EQU 5 +TCNT2_6 EQU 6 +TCNT2_7 EQU 7 +TCR2AUB EQU 1 +TCR2BUB EQU 0 +TIFR0 EQU 21 +TIFR1 EQU 22 +TIFR2 EQU 23 +TIMSK0 EQU 110 +TIMSK1 EQU 111 +TIMSK2 EQU 112 +TOIE0 EQU 0 +TOIE1 EQU 0 +TOIE2 EQU 0 +TOV0 EQU 0 +TOV1 EQU 0 +TOV2 EQU 0 +TSM EQU 7 +TWA0 EQU 1 +TWA1 EQU 2 +TWA2 EQU 3 +TWA3 EQU 4 +TWA4 EQU 5 +TWA5 EQU 6 +TWA6 EQU 7 +TWAM0 EQU 1 +TWAM1 EQU 2 +TWAM2 EQU 3 +TWAM3 EQU 4 +TWAM4 EQU 5 +TWAM5 EQU 6 +TWAM6 EQU 7 +TWAMR EQU 189 +TWAR EQU 186 +TWBR EQU 184 +TWBR0 EQU 0 +TWBR1 EQU 1 +TWBR2 EQU 2 +TWBR3 EQU 3 +TWBR4 EQU 4 +TWBR5 EQU 5 +TWBR6 EQU 6 +TWBR7 EQU 7 +TWCR EQU 188 +TWD0 EQU 0 +TWD1 EQU 1 +TWD2 EQU 2 +TWD3 EQU 3 +TWD4 EQU 4 +TWD5 EQU 5 +TWD6 EQU 6 +TWD7 EQU 7 +TWDR EQU 187 +TWEA EQU 6 +TWEN EQU 2 +TWGCE EQU 0 +TWIE EQU 0 +TWINT EQU 7 +TWPS0 EQU 0 +TWPS1 EQU 1 +TWS3 EQU 3 +TWS4 EQU 4 +TWS5 EQU 5 +TWS6 EQU 6 +TWS7 EQU 7 +TWSR EQU 185 +TWSTA EQU 5 +TWSTO EQU 4 +TWWC EQU 3 +TXB80 EQU 0 +TXC0 EQU 6 +TXCIE0 EQU 6 +TXEN0 EQU 3 +U2X0 EQU 1 +UBRR0 EQU 0 +UBRR0H EQU 197 +UBRR0L EQU 196 +UBRR1 EQU 1 +UBRR10 EQU 2 +UBRR11 EQU 3 +UBRR2 EQU 2 +UBRR3 EQU 3 +UBRR4 EQU 4 +UBRR5 EQU 5 +UBRR6 EQU 6 +UBRR7 EQU 7 +UBRR8 EQU 0 +UBRR9 EQU 1 +UCPOL0 EQU 0 +UCSR0A EQU 192 +UCSR0B EQU 193 +UCSR0C EQU 194 +UCSZ00 EQU 1 +UCSZ01 EQU 2 +UCSZ02 EQU 2 +UDR0 EQU 198 +UDR0-0 EQU 0 +UDR0-1 EQU 1 +UDR0-2 EQU 2 +UDR0-3 EQU 3 +UDR0-4 EQU 4 +UDR0-5 EQU 5 +UDR0-6 EQU 6 +UDR0-7 EQU 7 +UDRE0 EQU 5 +UDRIE0 EQU 5 +UMSEL00 EQU 6 +UMSEL01 EQU 7 +UPE0 EQU 2 +UPM00 EQU 4 +UPM01 EQU 5 +USBS0 EQU 3 +V EQU 3 +WCOL EQU 6 +WDCE EQU 4 +WDE EQU 3 +WDIE EQU 6 +WDIF EQU 7 +WDP0 EQU 0 +WDP1 EQU 1 +WDP2 EQU 2 +WDP3 EQU 5 +WDRF EQU 3 +WDTCSR EQU 96 +WGM00 EQU 0 +WGM01 EQU 1 +WGM02 EQU 3 +WGM10 EQU 0 +WGM11 EQU 1 +WGM12 EQU 3 +WGM13 EQU 4 +WGM20 EQU 0 +WGM21 EQU 1 +WGM22 EQU 3 +X EQU 28 +X+ EQU 29 +Y EQU 8 +Y+ EQU 25 +Z EQU 1 +Z+ EQU 17 +rZ EQU 0 + +Code: +Loc Obj Code Original Assembly +000000 0000 NOP +000001 C033 RJMP BASPROGRAMSTART +000002 0000 NOP +000003 9518 RETI +000004 0000 NOP +000005 9518 RETI +000006 0000 NOP +000007 9518 RETI +000008 0000 NOP +000009 9518 RETI +00000A 0000 NOP +00000B 9518 RETI +00000C 0000 NOP +00000D 9518 RETI +00000E 0000 NOP +00000F 9518 RETI +000010 0000 NOP +000011 9518 RETI +000012 0000 NOP +000013 9518 RETI +000014 0000 NOP +000015 9518 RETI +000016 0000 NOP +000017 9518 RETI +000018 0000 NOP +000019 9518 RETI +00001A 0000 NOP +00001B 9518 RETI +00001C 0000 NOP +00001D 9518 RETI +00001E 0000 NOP +00001F 9518 RETI +000020 0000 NOP +000021 9518 RETI +000022 0000 NOP +000023 9518 RETI +000024 0000 NOP +000025 9518 RETI +000026 0000 NOP +000027 9518 RETI +000028 0000 NOP +000029 9518 RETI +00002A 0000 NOP +00002B 9518 RETI +00002C 0000 NOP +00002D 9518 RETI +00002E 0000 NOP +00002F 9518 RETI +000030 0000 NOP +000031 9518 RETI +000032 0000 NOP +000033 9518 RETI + + +000034 0000 NOP + BASPROGRAMSTART +000035 E058 LDI SYSVALUECOPY,HIGH(RAMEND) +000036 BF5E OUT SPH, SYSVALUECOPY +000037 EF5F LDI SYSVALUECOPY,LOW(RAMEND) +000038 BF5D OUT SPL, SYSVALUECOPY +000039 D036 RCALL INITSYS + +00003A D029 RCALL INIT595 + SYSDOLOOP_S1 +00003B E051 LDI SYSVALUECOPY,1 +00003C 9350 0100 STS BITOUT,SYSVALUECOPY +00003E D038 RCALL SHIFTBIT +00003F EFD4 LDI SYSWAITTEMPMS,244 +000040 E0E1 LDI SYSWAITTEMPMS_H,1 +000041 D016 RCALL DELAY_MS +000042 E050 LDI SYSVALUECOPY,0 +000043 9350 0101 STS INDEX,SYSVALUECOPY + SYSFORLOOP1 +000045 9000 0101 LDS SYSTEMP1,INDEX +000047 9403 INC SYSTEMP1 +000048 9200 0101 STS INDEX,SYSTEMP1 +00004A E050 LDI SYSVALUECOPY,0 +00004B 9350 0100 STS BITOUT,SYSVALUECOPY +00004D D029 RCALL SHIFTBIT +00004E EFD4 LDI SYSWAITTEMPMS,244 +00004F E0E1 LDI SYSWAITTEMPMS_H,1 +000050 D007 RCALL DELAY_MS +000051 9160 0101 LDS SYSCALCTEMPA,INDEX +000053 3067 CPI SYSCALCTEMPA,7 +000054 F380 BRLO SYSFORLOOP1 + SYSFORLOOPEND1 +000055 CFE5 RJMP SYSDOLOOP_S1 + SYSDOLOOP_E1 + BASPROGRAMEND +000056 9588 SLEEP +000057 CFFE RJMP BASPROGRAMEND + + + DELAY_MS +000058 95E3 INC SYSWAITTEMPMS_H + DMS_START +000059 EFAE LDI DELAYTEMP2,254 + DMS_OUTER +00005A E194 LDI DELAYTEMP,20 + DMS_INNER +00005B 959A DEC DELAYTEMP +00005C F7F1 BRNE DMS_INNER +00005D 95AA DEC DELAYTEMP2 +00005E F7D9 BRNE DMS_OUTER +00005F 95DA DEC SYSWAITTEMPMS +000060 F7C1 BRNE DMS_START +000061 95EA DEC SYSWAITTEMPMS_H +000062 F7B1 BRNE DMS_START +000063 9508 RET + + + INIT595 +000064 9A25 SBI DDRB,5 +000065 9A24 SBI DDRB,4 +000066 9A23 SBI DDRB,3 +000067 9A22 SBI DDRB,2 +000068 9A21 SBI DDRB,1 +000069 982D CBI PORTB,5 +00006A 982C CBI PORTB,4 +00006B 982B CBI PORTB,3 +00006C 982A CBI PORTB,2 +00006D 9829 CBI PORTB,1 +00006E 9A2D SBI PORTB,5 +00006F 9508 RET + + + INITSYS +000070 E050 LDI SYSVALUECOPY,0 +000071 B955 OUT PORTB,SYSVALUECOPY +000072 E050 LDI SYSVALUECOPY,0 +000073 B958 OUT PORTC,SYSVALUECOPY +000074 E050 LDI SYSVALUECOPY,0 +000075 B95B OUT PORTD,SYSVALUECOPY +000076 9508 RET + + + SHIFTBIT +000077 982B CBI PORTB,3 +000078 982C CBI PORTB,4 +000079 9829 CBI PORTB,1 +00007A 9050 0100 LDS SYSBITTEST,BITOUT +00007C FC50 SBRC SYSBITTEST,0 +00007D 9A29 SBI PORTB,1 +00007E 9A2C SBI PORTB,4 +00007F 9A2B SBI PORTB,3 +000080 9508 RET + + diff --git a/resources/examples/Avr/hc595_mega328/hc595_mega328.simu b/resources/examples/Avr/hc595_mega328/hc595_mega328.simu new file mode 100644 index 0000000..e310866 --- /dev/null +++ b/resources/examples/Avr/hc595_mega328/hc595_mega328.simu @@ -0,0 +1,195 @@ + + +Node-26: + + +Node-25: + + +Node-24: + + +Node-23: + + +Node-22: + + +Node-21: + + +Node-20: + + +Ground (0 V)-19: + + +Resistor-18: + + +Resistor-17: + + +Resistor-16: + + +Resistor-15: + + +Resistor-14: + + +Resistor-13: + + +Resistor-12: + + +Resistor-11: + + +Led-10: + + +Led-9: + + +Led-8: + + +Led-7: + + +Led-6: + + +Led-5: + + +Led-4: + + +Led-3: + + +74HC595-2: + + +atmega328-1: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +Connector-39: + + +Connector-41: + + +Connector-43: + + +Connector-45: + + +Connector-47: + + +Connector-49: + + +Connector-51: + + +Connector-52: + + +Connector-53: + + +Connector-54: + + +Connector-55: + + +Connector-56: + + +Connector-57: + + +Connector-58: + + +Connector-59: + + +Connector-60: + + +Connector-61: + + +Connector-62: + + +Connector-63: + + +Connector-64: + + +Connector-65: + + +Connector-67: + + +Connector-69: + + +Connector-71: + + +Connector-73: + + +Connector-75: + + +Connector-77: + + +Connector-79: + + +Connector-81: + + +Connector-83: + + +PlotterWidget-50: + + +SerialPortWidget-51: + + + diff --git a/resources/examples/Avr/oscope_mega328/oscope8544_2.ino b/resources/examples/Avr/oscope_mega328/oscope8544_2.ino new file mode 100644 index 0000000..cabc2b1 --- /dev/null +++ b/resources/examples/Avr/oscope_mega328/oscope8544_2.ino @@ -0,0 +1,131 @@ +#include +#include +#include + +// defines for setting and clearing register bits +#ifndef cbi +#define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit)) +#endif +#ifndef sbi +#define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit)) +#endif + +#define DISPLAY_WIDTH 84 +#define DISPLAY_HEIGHT 48 + +#define ARDUINO_PRECISION 1023.0 +Adafruit_PCD8544 display = Adafruit_PCD8544(7, 6, 5, 4, 3); + + +//Analog Pins +int channelAI = A0; // probe + +#define DELAY_POTENTIMETER //disabled it I don't have it connected +#ifdef DELAY_POTENTIMETER +int delayAI = A1; // delay potentiometer +#endif + +int height = DISPLAY_HEIGHT-1; +unsigned int delayVariable = 0; + +int xCounter = 0; +int yPosition = 0; +uint8_t readings[DISPLAY_WIDTH+1]; + +unsigned long drawtime = 0; +unsigned long lastdraw = 0; +unsigned long frames = 0; + +void setup(void) +{ + //FASTADC: set prescale to 16 + sbi(ADCSRA,ADPS2) ; + cbi(ADCSRA,ADPS1) ; + cbi(ADCSRA,ADPS0) ; + + display.begin(); + display.setContrast(60);// you might have a slightly different display so it might not be the optimal value for you + display.clearDisplay(); +} + +void loop() +{ + #ifdef DELAY_POTENTIMETER + delayVariable = analogRead( delayAI ); + delayVariable = delayVariable*2+1; + #endif + + // Get Rissing Edge: + while( analogRead(channelAI) > 512 ); + while( analogRead(channelAI) < 512 ); + + //record readings + unsigned long readTime = micros(); + unsigned long readTime2 = 0; + unsigned long totTime = 0; + bool positive = true; + int numCicles = 0; + for(xCounter = 0; xCounter <= DISPLAY_WIDTH; xCounter++) + { + yPosition = analogRead(channelAI); + + // Detect rising edges: + if( !positive && (yPosition > 512) ) + { + numCicles++; + readTime2 = micros(); + } + positive = yPosition > 512; + + // Record New Reading: + readings[xCounter] = yPosition>>5; // 0-32 + + // Wait + #ifdef DELAY_POTENTIMETER + delayMicroseconds( delayVariable ); + #endif + } + totTime = (micros()-readTime)/1000; // ms + readTime = readTime2-readTime; + + + display.clearDisplay(); + display.drawLine( 0, 24, 83, 24, BLACK); // 0 line + + // Draw Readings + int base = height-8; + int lastreading = base-readings[0]; + int reading; + for(xCounter = 1; xCounter <= DISPLAY_WIDTH; xCounter++) + { + reading = base-readings[xCounter]; + display.drawLine(xCounter-1, lastreading, xCounter, reading, BLACK); + lastreading = reading; + } + // Draw Frequency + unsigned long freq = numCicles*2000000/readTime; + display.setCursor(1,0); + display.print(freq); + display.print( " Hz" ); + + // Draw reading Time + display.setCursor(42,0); + display.print(totTime); + display.print( " mS" ); + + //Draw FPS + drawtime = micros(); + frames=1000000/*a second*//(drawtime-lastdraw); + lastdraw = drawtime; + display.setCursor(1,41); + display.print(frames); + display.print( " FPS" ); + + // Draw Sample rate + unsigned long rate = 85000/totTime; + display.setCursor(41,41); + display.print(rate); + display.print( " SPS" ); + + display.display(); +} diff --git a/resources/examples/Avr/oscope_mega328/oscope8544_2/oscope8544_2.ino b/resources/examples/Avr/oscope_mega328/oscope8544_2/oscope8544_2.ino new file mode 100644 index 0000000..cabc2b1 --- /dev/null +++ b/resources/examples/Avr/oscope_mega328/oscope8544_2/oscope8544_2.ino @@ -0,0 +1,131 @@ +#include +#include +#include + +// defines for setting and clearing register bits +#ifndef cbi +#define cbi(sfr, bit) (_SFR_BYTE(sfr) &= ~_BV(bit)) +#endif +#ifndef sbi +#define sbi(sfr, bit) (_SFR_BYTE(sfr) |= _BV(bit)) +#endif + +#define DISPLAY_WIDTH 84 +#define DISPLAY_HEIGHT 48 + +#define ARDUINO_PRECISION 1023.0 +Adafruit_PCD8544 display = Adafruit_PCD8544(7, 6, 5, 4, 3); + + +//Analog Pins +int channelAI = A0; // probe + +#define DELAY_POTENTIMETER //disabled it I don't have it connected +#ifdef DELAY_POTENTIMETER +int delayAI = A1; // delay potentiometer +#endif + +int height = DISPLAY_HEIGHT-1; +unsigned int delayVariable = 0; + +int xCounter = 0; +int yPosition = 0; +uint8_t readings[DISPLAY_WIDTH+1]; + +unsigned long drawtime = 0; +unsigned long lastdraw = 0; +unsigned long frames = 0; + +void setup(void) +{ + //FASTADC: set prescale to 16 + sbi(ADCSRA,ADPS2) ; + cbi(ADCSRA,ADPS1) ; + cbi(ADCSRA,ADPS0) ; + + display.begin(); + display.setContrast(60);// you might have a slightly different display so it might not be the optimal value for you + display.clearDisplay(); +} + +void loop() +{ + #ifdef DELAY_POTENTIMETER + delayVariable = analogRead( delayAI ); + delayVariable = delayVariable*2+1; + #endif + + // Get Rissing Edge: + while( analogRead(channelAI) > 512 ); + while( analogRead(channelAI) < 512 ); + + //record readings + unsigned long readTime = micros(); + unsigned long readTime2 = 0; + unsigned long totTime = 0; + bool positive = true; + int numCicles = 0; + for(xCounter = 0; xCounter <= DISPLAY_WIDTH; xCounter++) + { + yPosition = analogRead(channelAI); + + // Detect rising edges: + if( !positive && (yPosition > 512) ) + { + numCicles++; + readTime2 = micros(); + } + positive = yPosition > 512; + + // Record New Reading: + readings[xCounter] = yPosition>>5; // 0-32 + + // Wait + #ifdef DELAY_POTENTIMETER + delayMicroseconds( delayVariable ); + #endif + } + totTime = (micros()-readTime)/1000; // ms + readTime = readTime2-readTime; + + + display.clearDisplay(); + display.drawLine( 0, 24, 83, 24, BLACK); // 0 line + + // Draw Readings + int base = height-8; + int lastreading = base-readings[0]; + int reading; + for(xCounter = 1; xCounter <= DISPLAY_WIDTH; xCounter++) + { + reading = base-readings[xCounter]; + display.drawLine(xCounter-1, lastreading, xCounter, reading, BLACK); + lastreading = reading; + } + // Draw Frequency + unsigned long freq = numCicles*2000000/readTime; + display.setCursor(1,0); + display.print(freq); + display.print( " Hz" ); + + // Draw reading Time + display.setCursor(42,0); + display.print(totTime); + display.print( " mS" ); + + //Draw FPS + drawtime = micros(); + frames=1000000/*a second*//(drawtime-lastdraw); + lastdraw = drawtime; + display.setCursor(1,41); + display.print(frames); + display.print( " FPS" ); + + // Draw Sample rate + unsigned long rate = 85000/totTime; + display.setCursor(41,41); + display.print(rate); + display.print( " SPS" ); + + display.display(); +} diff --git a/resources/examples/Avr/oscope_mega328/oscope_mega328.simu b/resources/examples/Avr/oscope_mega328/oscope_mega328.simu new file mode 100644 index 0000000..720aa4a --- /dev/null +++ b/resources/examples/Avr/oscope_mega328/oscope_mega328.simu @@ -0,0 +1,165 @@ + + +Node-22: + + +Rail.-21: + + +Node-20: + + +Oscope-19: + + +Node-18: + + +Potentiometer-17: + + +Node-16: + + +Node-15: + + +Node-14: + + +Resistor-13: + + +Ground (0 V)-12: + + +Capacitor-11: + + +Resistor-10: + + +Resistor-9: + + +OpAmp-8: + + +Node-7: + + +Resistor-6: + + +atmega328-5: + + +Node-4: + + +Pcd8544-3: + + +Potentiometer-2: + + +Node-1: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-28: + + +Connector-30: + + +Connector-31: + + +Connector-32: + + +Connector-33: + + +Connector-34: + + +Connector-35: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-41: + + +Connector-42: + + +Connector-43: + + +Connector-45: + + +Connector-47: + + +Connector-49: + + +Connector-51: + + +Connector-53: + + +Connector-54: + + +Connector-55: + + +Connector-56: + + +Connector-58: + + +Connector-59: + + +Connector-60: + + +Connector-61: + + +Connector-63: + + +Connector-64: + + +PlotterWidget-65: + + +SerialPortWidget-66: + + + diff --git a/resources/examples/Avr/software_PWM_595/software_PWM_595.simu b/resources/examples/Avr/software_PWM_595/software_PWM_595.simu new file mode 100644 index 0000000..5ca05ba --- /dev/null +++ b/resources/examples/Avr/software_PWM_595/software_PWM_595.simu @@ -0,0 +1,201 @@ + + +Node-17: + + +Rail.-16: + + +LedBar-15: + + +atmega328-14: + + +74HC595-13: + + +74HC595-12: + + +74HC595-11: + + +Node-10: + + +Node-9: + + +Node-8: + + +Node-7: + + +Node-6: + + +Node-5: + + +LedBar-4: + + +LedBar-3: + + +Ground (0 V)-2: + + +Node-1: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-23: + + +Connector-24: + + +Connector-25: + + +Connector-26: + + +Connector-27: + + +Connector-28: + + +Connector-30: + + +Connector-31: + + +Connector-33: + + +Connector-34: + + +Connector-35: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-44: + + +Connector-46: + + +Connector-48: + + +Connector-50: + + +Connector-52: + + +Connector-54: + + +Connector-56: + + +Connector-58: + + +Connector-60: + + +Connector-62: + + +Connector-64: + + +Connector-66: + + +Connector-68: + + +Connector-70: + + +Connector-72: + + +Connector-74: + + +Connector-76: + + +Connector-78: + + +Connector-80: + + +Connector-82: + + +Connector-84: + + +Connector-86: + + +Connector-88: + + +Connector-90: + + +Connector-91: + + +Connector-92: + + +Connector-93: + + +Connector-94: + + +Connector-95: + + +PlotterWidget-65: + + +SerialPortWidget-66: + + + diff --git a/resources/examples/Avr/voltimeter_mega328/voltimeter_mega328.simu b/resources/examples/Avr/voltimeter_mega328/voltimeter_mega328.simu new file mode 100644 index 0000000..0b0e4e8 --- /dev/null +++ b/resources/examples/Avr/voltimeter_mega328/voltimeter_mega328.simu @@ -0,0 +1,99 @@ + + +Volt. Source-11: + + +Resistor-10: + + +Resistor-9: + + +Resistor-8: + + +Resistor-7: + + +Resistor-6: + + +Resistor-5: + + +Resistor-4: + + +Resistor-3: + + +Seven Segment-2: + + +atmega328-1: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-44: + + +Connector-46: + + +Connector-48: + + +PlotterWidget-65: + + +SerialPortWidget-66: + + + diff --git a/resources/examples/LED/basic_led.simu b/resources/examples/LED/basic_led.simu new file mode 100644 index 0000000..22c0c72 --- /dev/null +++ b/resources/examples/LED/basic_led.simu @@ -0,0 +1,36 @@ + + +Probe-6: + + +Probe-5: + + +Ground (0 V)-4: + + +Resistor-3: + + +Led-2: + + +Volt. Source-1: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +PlotterWidget-65: + + +SerialPortWidget-66: + + + diff --git a/resources/examples/LED/current_source.simu b/resources/examples/LED/current_source.simu new file mode 100644 index 0000000..dac85f6 --- /dev/null +++ b/resources/examples/LED/current_source.simu @@ -0,0 +1,30 @@ + + +Amperimeter-4: + + +Ground (0 V)-3: + + +Led-2: + + +Current Source-1: + + +Connector-5: + + +Connector-7: + + +Connector-9: + + +PlotterWidget-65: + + +SerialPortWidget-66: + + + diff --git a/resources/examples/LED/led_matirx.simu b/resources/examples/LED/led_matirx.simu new file mode 100644 index 0000000..5aa92d9 --- /dev/null +++ b/resources/examples/LED/led_matirx.simu @@ -0,0 +1,108 @@ + + +Matriz Led-17: + + +Voltage Fijo.-16: + + +Voltage Fijo.-15: + + +Voltage Fijo.-14: + + +Voltage Fijo.-13: + + +Voltage Fijo.-12: + + +Voltage Fijo.-11: + + +Voltage Fijo.-10: + + +Voltage Fijo.-9: + + +Voltage Fijo.-8: + + +Voltage Fijo.-7: + + +Voltage Fijo.-6: + + +Voltage Fijo.-5: + + +Voltage Fijo.-4: + + +Voltage Fijo.-3: + + +Voltage Fijo.-2: + + +Voltage Fijo.-1: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-44: + + +Connector-46: + + +Connector-48: + + +PlotterWidget-65: + + +SerialPortWidget-66: + + + diff --git a/resources/examples/OP_Amp/integrator-led.simu b/resources/examples/OP_Amp/integrator-led.simu new file mode 100644 index 0000000..a7c53b7 --- /dev/null +++ b/resources/examples/OP_Amp/integrator-led.simu @@ -0,0 +1,87 @@ + + +Probe-13: + + +Led-12: + + +Rail.-11: + + +Node-10: + + +Resistor-9: + + +Ground (0 V)-8: + + +OpAmp-7: + + +OpAmp-6: + + +Resistor-5: + + +Capacitor-4: + + +Node-3: + + +Node-2: + + +Wave Gen.-1: + + +Connector-14: + + +Connector-16: + + +Connector-17: + + +Connector-18: + + +Connector-20: + + +Connector-21: + + +Connector-23: + + +Connector-24: + + +Connector-25: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +PlotterWidget-34: + + +SerialPortWidget-35: + + + diff --git a/resources/examples/OP_Amp/integrator.simu b/resources/examples/OP_Amp/integrator.simu new file mode 100644 index 0000000..acbb251 --- /dev/null +++ b/resources/examples/OP_Amp/integrator.simu @@ -0,0 +1,57 @@ + + +Clock-8: + + +Rail.-7: + + +OpAmp-6: + + +Resistor-5: + + +Capacitor-4: + + +Node-3: + + +Probe-2: + + +Node-1: + + +Connector-9: + + +Connector-11: + + +Connector-12: + + +Connector-13: + + +Connector-15: + + +Connector-16: + + +Connector-17: + + +Connector-19: + + +PlotterWidget-21: + + +SerialPortWidget-22: + + + diff --git a/resources/examples/OP_Amp/inv_Amp.simu b/resources/examples/OP_Amp/inv_Amp.simu new file mode 100644 index 0000000..6a19e00 --- /dev/null +++ b/resources/examples/OP_Amp/inv_Amp.simu @@ -0,0 +1,45 @@ + + +Node-6: + + +Potentiometer-5: + + +OpAmp-4: + + +Volt. Source-3: + + +Probe-2: + + +Rail.-1: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-12: + + +Connector-13: + + +Connector-15: + + +PlotterWidget-21: + + +SerialPortWidget-22: + + + diff --git a/resources/examples/OP_Amp/no-Inv_Amp.simu b/resources/examples/OP_Amp/no-Inv_Amp.simu new file mode 100644 index 0000000..6e200c5 --- /dev/null +++ b/resources/examples/OP_Amp/no-Inv_Amp.simu @@ -0,0 +1,45 @@ + + +Node-6: + + +Potentiometer-5: + + +OpAmp-4: + + +Volt. Source-3: + + +Probe-2: + + +Ground (0 V)-1: + + +Connector-7: + + +Connector-9: + + +Connector-10: + + +Connector-11: + + +Connector-13: + + +Connector-15: + + +PlotterWidget-21: + + +SerialPortWidget-22: + + + diff --git a/resources/examples/OP_Amp/precision_rectifier-2.simu b/resources/examples/OP_Amp/precision_rectifier-2.simu new file mode 100644 index 0000000..77ba1db --- /dev/null +++ b/resources/examples/OP_Amp/precision_rectifier-2.simu @@ -0,0 +1,111 @@ + + +Amplificador Operacional-17: + + +Rail.-16: + + +Rail.-15: + + +Potenciometro-14: + + +Reistencia-13: + + +Reistencia-12: + + +Reistencia-11: + + +Diodo-10: + + +Diodo-9: + + +Node-8: + + +Tierra-7: + + +Node-6: + + +Sonda Voltaje.-5: + + +Sonda Voltaje.-4: + + +Node-3: + + +Node-2: + + +Node-1: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-27: + + +Connector-29: + + +Connector-30: + + +Connector-31: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-37: + + +Connector-38: + + +Connector-39: + + +Connector-40: + + +Connector-41: + + +PlotterWidget-42: + + +SerialPortWidget-43: + + + diff --git a/resources/examples/OP_Amp/precision_rectifier.simu b/resources/examples/OP_Amp/precision_rectifier.simu new file mode 100644 index 0000000..6afd67b --- /dev/null +++ b/resources/examples/OP_Amp/precision_rectifier.simu @@ -0,0 +1,69 @@ + + +Amplificador Operacional-11: + + +Reistencia-10: + + +Diodo-9: + + +Tierra-8: + + +Sonda Voltaje.-7: + + +Rail.-6: + + +Rail.-5: + + +Potenciometro-4: + + +Sonda Voltaje.-3: + + +Amperimetro-2: + + +Node-1: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-25: + + +Connector-26: + + +PlotterWidget-28: + + +SerialPortWidget-29: + + + diff --git a/resources/examples/OP_Amp/sin_wave.simu b/resources/examples/OP_Amp/sin_wave.simu new file mode 100644 index 0000000..a82c5ec --- /dev/null +++ b/resources/examples/OP_Amp/sin_wave.simu @@ -0,0 +1,120 @@ + + +Node-17: + + +Oscope-16: + + +Node-15: + + +Volt. Source-14: + + +Node-13: + + +Node-12: + + +Potentiometer-11: + + +OpAmp-10: + + +Capacitor-9: + + +Capacitor-8: + + +Capacitor-7: + + +Resistor-6: + + +Resistor-5: + + +Node-4: + + +Node-3: + + +Node-2: + + +Resistor-1: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-23: + + +Connector-24: + + +Connector-25: + + +Connector-26: + + +Connector-28: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-36: + + +Connector-37: + + +Connector-38: + + +Connector-39: + + +Connector-40: + + +Connector-41: + + +Connector-42: + + +Connector-43: + + +PlotterWidget-28: + + +SerialPortWidget-29: + + + diff --git a/resources/examples/OP_Amp/square_wave.simu b/resources/examples/OP_Amp/square_wave.simu new file mode 100644 index 0000000..c194bc4 --- /dev/null +++ b/resources/examples/OP_Amp/square_wave.simu @@ -0,0 +1,123 @@ + + +Node-18: + + +Probe-17: + + +Node-16: + + +Potentiometer-15: + + +Node-14: + + +Node-13: + + +Node-12: + + +Resistor-11: + + +Volt. Source-10: + + +Ground (0 V)-9: + + +Capacitor-8: + + +Resistor-7: + + +Resistor-6: + + +OpAmp-5: + + +Node-4: + + +Resistor-3: + + +Oscope-2: + + +Node-1: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-26: + + +Connector-28: + + +Connector-29: + + +Connector-30: + + +Connector-31: + + +Connector-32: + + +Connector-33: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-39: + + +Connector-40: + + +Connector-41: + + +Connector-42: + + +Connector-43: + + +Connector-44: + + +PlotterWidget-28: + + +SerialPortWidget-29: + + + diff --git a/resources/examples/OP_Amp/triangle_wave.simu b/resources/examples/OP_Amp/triangle_wave.simu new file mode 100644 index 0000000..da7c43a --- /dev/null +++ b/resources/examples/OP_Amp/triangle_wave.simu @@ -0,0 +1,60 @@ + + +Probe-9: + + +Node-8: + + +Oscope-7: + + +Rail.-6: + + +Clock-5: + + +OpAmp-4: + + +Resistor-3: + + +Capacitor-2: + + +Node-1: + + +Connector-10: + + +Connector-12: + + +Connector-13: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-21: + + +PlotterWidget-22: + + +SerialPortWidget-23: + + + diff --git a/resources/examples/OP_Amp/wave_gen-bom.txt b/resources/examples/OP_Amp/wave_gen-bom.txt new file mode 100644 index 0000000..fde098f --- /dev/null +++ b/resources/examples/OP_Amp/wave_gen-bom.txt @@ -0,0 +1,20 @@ + +Circuit: wave_gen.simu + +Bill of Materials: + +Capacitor-16 : Capacitor 500 nF +Capacitor-26 : Capacitor 570 nF +Capacitor-6 : Capacitor 10 nF +Follower : OpAmp +Follower : OpAmp +Inductor-34 : Inductor 100 mH +Integrator : OpAmp +OpAmp-9 : OpAmp +Resistor-11 : Resistor 75 kΩ +Resistor-15 : Resistor 450 Ω +Resistor-29 : Resistor 5 kΩ +Resistor-30 : Resistor 5 kΩ +Resistor-4 : Resistor 10 kΩ +Resistor-7 : Resistor 10 kΩ +Resistor-8 : Resistor 10 kΩ diff --git a/resources/examples/OP_Amp/wave_gen.simu b/resources/examples/OP_Amp/wave_gen.simu new file mode 100644 index 0000000..0450263 --- /dev/null +++ b/resources/examples/OP_Amp/wave_gen.simu @@ -0,0 +1,252 @@ + + +Node-37: + + +Node-36: + + +Node-35: + + +Resistor-34: + + +Ground (0 V)-33: + + +Capacitor-32: + + +Resistor-31: + + +Resistor-30: + + +OpAmp-29: + + +Node-28: + + +Resistor-27: + + +Oscope-26: + + +Rail.-25: + + +OpAmp-24: + + +Resistor-23: + + +Capacitor-22: + + +Node-21: + + +Node-20: + + +Oscope-19: + + +Node-18: + + +OpAmp-17: + + +Node-16: + + +Node-15: + + +Node-14: + + +OpAmp-13: + + +Capacitor-12: + + +Ground (0 V)-11: + + +Oscope-10: + + +Resistor-9: + + +Resistor-8: + + +Node-7: + + +Node-6: + + +Node-5: + + +Inductor-4: + + +Node-3: + + +Node-2: + + +Node-1: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-43: + + +Connector-45: + + +Connector-46: + + +Connector-47: + + +Connector-48: + + +Connector-49: + + +Connector-50: + + +Connector-51: + + +Connector-53: + + +Connector-54: + + +Connector-55: + + +Connector-56: + + +Connector-57: + + +Connector-59: + + +Connector-60: + + +Connector-62: + + +Connector-63: + + +Connector-64: + + +Connector-65: + + +Connector-66: + + +Connector-68: + + +Connector-69: + + +Connector-70: + + +Connector-72: + + +Connector-74: + + +Connector-75: + + +Connector-76: + + +Connector-78: + + +Connector-79: + + +Connector-80: + + +Connector-81: + + +Connector-82: + + +Connector-83: + + +Connector-85: + + +Connector-87: + + +Connector-88: + + +Connector-89: + + +Connector-90: + + +Connector-91: + + +Connector-92: + + +Connector-93: + + +PlotterWidget-22: + + +SerialPortWidget-23: + + + diff --git a/resources/examples/Other/keypad.simu b/resources/examples/Other/keypad.simu new file mode 100644 index 0000000..f966c81 --- /dev/null +++ b/resources/examples/Other/keypad.simu @@ -0,0 +1,153 @@ + + +Resistor-22: + + +Resistor-21: + + +Resistor-20: + + +Node-19: + + +Node-18: + + +Tierra-17: + + +Led-16: + + +Led-15: + + +Led-14: + + +Node-13: + + +Node-12: + + +Node-11: + + +Rail.-10: + + +Led-9: + + +Led-8: + + +Led-7: + + +Led-6: + + +Teclado-5: + + +Reistencia-4: + + +Reistencia-3: + + +Reistencia-2: + + +Reistencia-1: + + +Connector-23: + + +Connector-25: + + +Connector-26: + + +Connector-27: + + +Connector-28: + + +Connector-29: + + +Connector-30: + + +Connector-31: + + +Connector-33: + + +Connector-34: + + +Connector-35: + + +Connector-36: + + +Connector-37: + + +Connector-39: + + +Connector-41: + + +Connector-43: + + +Connector-45: + + +Connector-47: + + +Connector-49: + + +Connector-51: + + +Connector-53: + + +Connector-55: + + +Connector-57: + + +Connector-59: + + +Connector-61: + + +Connector-63: + + +PlotterWidget-65: + + +SerialPortWidget-66: + + + diff --git a/resources/examples/Other/pru-steeper.simu b/resources/examples/Other/pru-steeper.simu new file mode 100644 index 0000000..38b3f4d --- /dev/null +++ b/resources/examples/Other/pru-steeper.simu @@ -0,0 +1,42 @@ + + +Ground (0 V)-6: + + +Stepper-5: + + +Fixed Volt.-4: + + +Fixed Volt.-3: + + +Fixed Volt.-2: + + +Fixed Volt.-1: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +Connector-15: + + +PlotterWidget-65: + + +SerialPortWidget-66: + + + diff --git a/resources/examples/Other/prulcd.simu b/resources/examples/Other/prulcd.simu new file mode 100644 index 0000000..7d5cdb4 --- /dev/null +++ b/resources/examples/Other/prulcd.simu @@ -0,0 +1,48 @@ + + +Fixed Volt.-7: + + +Fixed Volt.-6: + + +Fixed Volt.-5: + + +Hd44780-4: + + +Fixed Volt.-3: + + +Fixed Volt.-2: + + +Fixed Volt.-1: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +PlotterWidget-65: + + +SerialPortWidget-66: + + + diff --git a/resources/examples/Other/zenner.simu b/resources/examples/Other/zenner.simu new file mode 100644 index 0000000..f3919f7 --- /dev/null +++ b/resources/examples/Other/zenner.simu @@ -0,0 +1,33 @@ + + +Diode-5: + + +Fixed Volt.-4: + + +Resistor-3: + + +Ground (0 V)-2: + + +Probe-1: + + +Connector-6: + + +Connector-8: + + +Connector-10: + + +PlotterWidget-65: + + +SerialPortWidget-66: + + + diff --git a/resources/examples/Pic/Comparator_p12f683/pic-comp.gcb b/resources/examples/Pic/Comparator_p12f683/pic-comp.gcb new file mode 100644 index 0000000..01e2d3b --- /dev/null +++ b/resources/examples/Pic/Comparator_p12f683/pic-comp.gcb @@ -0,0 +1,16 @@ +'This program tests comparator input CIN- (i.e. Vdd) +'against CIN+ (i.e.VRCON 15/24*Vdd) + +#chip 12F683, 4 'mhz + +dir GPIO.2 out + +VRCON = b'10101111' + +Main: + + CMCON0 = b'00010011' + + wait 100 ms + +goto Main diff --git a/resources/examples/Pic/Comparator_p12f683/pic-comp.simu b/resources/examples/Pic/Comparator_p12f683/pic-comp.simu new file mode 100644 index 0000000..6ad61ee --- /dev/null +++ b/resources/examples/Pic/Comparator_p12f683/pic-comp.simu @@ -0,0 +1,24 @@ + + +pic12f683-3: + + +Fuente Voltaje-2: + + +Sonda Voltaje.-1: + + +Connector-4: + + +Connector-6: + + +PlotterWidget-8: + + +SerialPortWidget-9: + + + diff --git a/resources/examples/Pic/LED_Dimmer2_16F886/LED_Dimmer2_16F886.asm b/resources/examples/Pic/LED_Dimmer2_16F886/LED_Dimmer2_16F886.asm new file mode 100644 index 0000000..3eaeae9 --- /dev/null +++ b/resources/examples/Pic/LED_Dimmer2_16F886/LED_Dimmer2_16F886.asm @@ -0,0 +1,175 @@ +;Program compiled by Great Cow BASIC (0.94 2015-10-27) +;Need help? See the GCBASIC forums at http://sourceforge.net/projects/gcbasic/forums, +;check the documentation or email w_cholmondeley at users dot sourceforge dot net. + +;******************************************************************************** + +;Set up the assembler options (Chip type, clock source, other bits and pieces) + LIST p=16F886, r=DEC +#include + __CONFIG _CONFIG1, _HS_OSC & _WDT_OFF & _MCLRE_OFF & _LVP_OFF + +;******************************************************************************** + +;Set aside memory locations for variables +CNT EQU 32 +DOPWM EQU 33 +PWMCHANNEL EQU 34 +PWMDUR EQU 35 +SOFTPWMCYCLES EQU 36 +SOFTPWMDUTY EQU 37 + +;******************************************************************************** + +;Vectors + ORG 0 + goto BASPROGRAMSTART + ORG 4 + retfie + +;******************************************************************************** + +;Start of program memory page 0 + ORG 5 +BASPROGRAMSTART +;Call initialisation routines + call INITSYS +;Automatic pin direction setting + banksel TRISB + bcf TRISB,5 + bcf TRISB,2 + +;Start of the main program +SysDoLoop_S1 + banksel CNT + clrf CNT +SysForLoop1 + movlw 10 + addwf CNT,F + movlw 1 + movwf PWMCHANNEL + movf CNT,W + movwf SOFTPWMDUTY + movlw 10 + movwf SOFTPWMCYCLES + call PWMOUT + movlw 2 + movwf PWMCHANNEL + movf CNT,W + sublw 250 + movwf SOFTPWMDUTY + movlw 10 + movwf SOFTPWMCYCLES + call PWMOUT + movlw 250 + subwf CNT,W + btfss STATUS, C + goto SysForLoop1 +SysForLoopEnd1 + movlw 4 + movwf CNT +SysForLoop2 + movlw 10 + subwf CNT,F + movlw 1 + movwf PWMCHANNEL + movf CNT,W + movwf SOFTPWMDUTY + movlw 10 + movwf SOFTPWMCYCLES + call PWMOUT + movlw 2 + movwf PWMCHANNEL + movf CNT,W + sublw 250 + movwf SOFTPWMDUTY + movlw 10 + movwf SOFTPWMCYCLES + call PWMOUT + movf CNT,W + sublw 10 + btfss STATUS, C + goto SysForLoop2 +SysForLoopEnd2 + goto SysDoLoop_S1 +SysDoLoop_E1 +BASPROGRAMEND + sleep + goto BASPROGRAMEND + +;******************************************************************************** + +INITSYS + banksel ADCON1 + bcf ADCON1,ADFM + banksel ADCON0 + bcf ADCON0,ADON + banksel ANSEL + clrf ANSEL + clrf ANSELH + banksel CM2CON0 + bcf CM2CON0,C2ON + bcf CM1CON0,C1ON + banksel PORTA + clrf PORTA + clrf PORTB + clrf PORTC + clrf PORTE + return + +;******************************************************************************** + +PWMOUT + clrf PWMDUR + movlw 1 + subwf SOFTPWMCYCLES,W + btfss STATUS, C + goto SysForLoopEnd3 +SysForLoop3 + incf PWMDUR,F + clrf DOPWM +SysForLoop4 + incf DOPWM,F + movf SOFTPWMDUTY,W + subwf DOPWM,W + btfsc STATUS, C + goto ELSE4_1 + decf PWMCHANNEL,W + btfsc STATUS, Z + bsf PORTB,5 + movlw 2 + subwf PWMCHANNEL,W + btfsc STATUS, Z + bsf PORTB,2 + goto ENDIF4 +ELSE4_1 + decf PWMCHANNEL,W + btfsc STATUS, Z + bcf PORTB,5 + movlw 2 + subwf PWMCHANNEL,W + btfsc STATUS, Z + bcf PORTB,2 +ENDIF4 + movlw 255 + subwf DOPWM,W + btfss STATUS, C + goto SysForLoop4 +SysForLoopEnd4 + movf SOFTPWMCYCLES,W + subwf PWMDUR,W + btfss STATUS, C + goto SysForLoop3 +SysForLoopEnd3 + return + +;******************************************************************************** + +;Start of program memory page 1 + ORG 2048 +;Start of program memory page 2 + ORG 4096 +;Start of program memory page 3 + ORG 6144 + + END diff --git a/resources/examples/Pic/LED_Dimmer2_16F886/LED_Dimmer2_16F886.cod b/resources/examples/Pic/LED_Dimmer2_16F886/LED_Dimmer2_16F886.cod new file mode 100644 index 0000000000000000000000000000000000000000..de3f02194fbcb2c36196118c0b85edb6f4b8d988 GIT binary patch literal 13824 zcmeI&2XtFSy1?| zJKK9%$<7Y%8o~=H}*O5jaC0Y zuRWqQl`JMVZQ0VZBVLTnZJs}W?u^wtxAeVVv3PUOn%LY|{GfhDY}Slqkv7Ucaez^*!fLD$9qKw|UDqk= zx=vZwb*SrpEp!*D33|PTAD$N8BF=;6NONgK-EB#bI~^4o5v=r#uozp`I3} ztaqkU9)n}?C>)35u@)!bM4W_^aS9%dQ?U-G;W2nD9*5KW>sDQw0TT!v{p0hePdwqZMFFpDcN zhj}bu2XH1g(u=kcru=XMLZQ(;~HGsXV+1(2iM~U+=!d-G&~(Qqdobl2 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zs@kdtR89T;YDH~?)Ju!Q^h@=%5qIo>IdsQ$JbS*;RL6%{|UNHB+i4MBGt5brW58 z^xhGX`iT*DbTE9gNe{K@A&2Uv)Y$I2$yJl&|DAPJW|(jJFEilCKd3#c1|C1?_qrb2A<}n^Clbgn|iqa1P + + +Compilation Report + + +

Compilation Report

+

Compiler Version (DD/MM/YYYY): 0.94 2015-10-27

+

Chip resource usage:

+

Chip Model: 16F886

+

Program Memory: 112/8192 words (1.37%)

+

RAM: 6/368 bytes (1.63%)

+

RAM Allocation

+ +
+

Subroutines

+ + + + + +
NameCode Size (lines)Compiled Size (words)PageOutgoing calls
Main13551PWMOUT(4), INITSYS(1)
PWMOUT50361
INITSYS365211
+ + diff --git a/resources/examples/Pic/LED_Dimmer2_16F886/LED_Dimmer2_16F886.lst b/resources/examples/Pic/LED_Dimmer2_16F886/LED_Dimmer2_16F886.lst new file mode 100644 index 0000000..bf124aa --- /dev/null +++ b/resources/examples/Pic/LED_Dimmer2_16F886/LED_Dimmer2_16F886.lst @@ -0,0 +1,551 @@ +GCASM List File (GCBASIC 0.94 2015-10-27) + +Symbols: +A EQU 0 +ABDEN EQU 0 +ABDOVF EQU 7 +ACCESS EQU 0 +ACKDT EQU 5 +ACKEN EQU 4 +ACKSTAT EQU 6 +ADCON0 EQU 31 +ADCON1 EQU 159 +ADCS0 EQU 6 +ADCS1 EQU 7 +ADDEN EQU 3 +ADFM EQU 7 +ADIE EQU 6 +ADIF EQU 6 +ADON EQU 0 +ADRESH EQU 30 +ADRESL EQU 158 +ANS0 EQU 0 +ANS1 EQU 1 +ANS10 EQU 2 +ANS11 EQU 3 +ANS12 EQU 4 +ANS13 EQU 5 +ANS2 EQU 2 +ANS3 EQU 3 +ANS4 EQU 4 +ANS8 EQU 0 +ANS9 EQU 1 +ANSEL EQU 392 +ANSELH EQU 393 +B EQU 1 +BANKED EQU 1 +BASPROGRAMEND EQU 58 +BASPROGRAMSTART EQU 5 +BAUDCTL EQU 391 +BCLIE EQU 3 +BCLIF EQU 3 +BF EQU 0 +BRG0 EQU 0 +BRG1 EQU 1 +BRG10 EQU 2 +BRG11 EQU 3 +BRG12 EQU 4 +BRG13 EQU 5 +BRG14 EQU 6 +BRG15 EQU 7 +BRG16 EQU 3 +BRG2 EQU 2 +BRG3 EQU 3 +BRG4 EQU 4 +BRG5 EQU 5 +BRG6 EQU 6 +BRG7 EQU 7 +BRG8 EQU 0 +BRG9 EQU 1 +BRGH EQU 2 +C EQU 0 +C1CH0 EQU 0 +C1CH1 EQU 1 +C1IE EQU 5 +C1IF EQU 5 +C1OE EQU 5 +C1ON EQU 7 +C1OUT EQU 6 +C1POL EQU 4 +C1R EQU 2 +C1RSEL EQU 5 +C1SEN EQU 5 +C2CH0 EQU 0 +C2CH1 EQU 1 +C2IE EQU 6 +C2IF EQU 6 +C2OE EQU 5 +C2ON EQU 7 +C2OUT EQU 6 +C2POL EQU 4 +C2R EQU 2 +C2REN EQU 4 +C2RSEL EQU 4 +C2SYNC EQU 0 +CCP1CON EQU 23 +CCP1IE EQU 2 +CCP1IF EQU 2 +CCP1M0 EQU 0 +CCP1M1 EQU 1 +CCP1M2 EQU 2 +CCP1M3 EQU 3 +CCP1X EQU 5 +CCP1Y EQU 4 +CCP2CON EQU 29 +CCP2IE EQU 0 +CCP2IF EQU 0 +CCP2M0 EQU 0 +CCP2M1 EQU 1 +CCP2M2 EQU 2 +CCP2M3 EQU 3 +CCP2X EQU 5 +CCP2Y EQU 4 +CCPR1H EQU 22 +CCPR1L EQU 21 +CCPR2H EQU 28 +CCPR2L EQU 27 +CHS0 EQU 2 +CHS1 EQU 3 +CHS2 EQU 4 +CHS3 EQU 5 +CKE EQU 6 +CKP EQU 4 +CM1CON0 EQU 263 +CM2CON0 EQU 264 +CM2CON1 EQU 265 +CNT EQU 32 +CREN EQU 4 +CSRC EQU 7 +D EQU 5 +DATA_ADDRESS EQU 5 +DC EQU 1 +DC1B0 EQU 4 +DC1B1 EQU 5 +DC2B0 EQU 4 +DC2B1 EQU 5 +DOPWM EQU 33 +D_A EQU 5 +ECCPAS EQU 156 +ECCPAS0 EQU 4 +ECCPAS1 EQU 5 +ECCPAS2 EQU 6 +ECCPASE EQU 7 +EEADR EQU 269 +EEADRH EQU 271 +EECON1 EQU 396 +EECON2 EQU 397 +EEDAT EQU 268 +EEDATA EQU 268 +EEDATH EQU 270 +EEIE EQU 4 +EEIF EQU 4 +EEPGD EQU 7 +ELSE4_1 EQU 101 +ENDIF4 EQU 108 +F EQU 1 +FERR EQU 2 +FSR EQU 4 +FVREN EQU 0 +GCEN EQU 7 +GIE EQU 7 +GO EQU 1 +GO_DONE EQU 1 +HTS EQU 2 +I2C_DATA EQU 5 +I2C_READ EQU 2 +I2C_START EQU 3 +I2C_STOP EQU 4 +INDF EQU 0 +INITSYS EQU 60 +INTCON EQU 11 +INTE EQU 4 +INTEDG EQU 6 +INTF EQU 1 +IOCB EQU 150 +IOCB0 EQU 0 +IOCB1 EQU 1 +IOCB2 EQU 2 +IOCB3 EQU 3 +IOCB4 EQU 4 +IOCB5 EQU 5 +IOCB6 EQU 6 +IOCB7 EQU 7 +IRCF0 EQU 4 +IRCF1 EQU 5 +IRCF2 EQU 6 +IRP EQU 7 +LTS EQU 1 +MC1OUT EQU 7 +MC2OUT EQU 6 +MSK EQU 147 +NOT_A EQU 5 +NOT_ADDRESS EQU 5 +NOT_BO EQU 0 +NOT_BOR EQU 0 +NOT_DONE EQU 1 +NOT_PD EQU 3 +NOT_POR EQU 1 +NOT_RBPU EQU 7 +NOT_RC8 EQU 6 +NOT_T1SYNC EQU 2 +NOT_TO EQU 4 +NOT_TX8 EQU 6 +NOT_W EQU 2 +NOT_WRITE EQU 2 +OERR EQU 1 +OPTION_REG EQU 129 +OSCCON EQU 143 +OSCTUNE EQU 144 +OSFIE EQU 7 +OSFIF EQU 7 +OSTS EQU 3 +P EQU 4 +P1M0 EQU 6 +P1M1 EQU 7 +PCL EQU 2 +PCLATH EQU 10 +PCON EQU 142 +PDC0 EQU 0 +PDC1 EQU 1 +PDC2 EQU 2 +PDC3 EQU 3 +PDC4 EQU 4 +PDC5 EQU 5 +PDC6 EQU 6 +PEIE EQU 6 +PEN EQU 2 +PIE1 EQU 140 +PIE2 EQU 141 +PIR1 EQU 12 +PIR2 EQU 13 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PORTE EQU 9 +PR2 EQU 146 +PRSEN EQU 7 +PS0 EQU 0 +PS1 EQU 1 +PS2 EQU 2 +PSA EQU 3 +PSSAC0 EQU 2 +PSSAC1 EQU 3 +PSSBD0 EQU 0 +PSSBD1 EQU 1 +PSTRCON EQU 157 +PULSR EQU 2 +PULSS EQU 3 +PWM1CON EQU 155 +PWMCHANNEL EQU 34 +PWMDUR EQU 35 +PWMOUT EQU 81 +R EQU 2 +RBIE EQU 3 +RBIF EQU 0 +RC8_9 EQU 6 +RC9 EQU 6 +RCD8 EQU 0 +RCEN EQU 3 +RCIDL EQU 6 +RCIE EQU 5 +RCIF EQU 5 +RCREG EQU 26 +RCSTA EQU 24 +RD EQU 0 +READ_WRITE EQU 2 +RP0 EQU 5 +RP1 EQU 6 +RSEN EQU 1 +RX9 EQU 6 +RX9D EQU 0 +R_W EQU 2 +S EQU 3 +SBOREN EQU 4 +SCKP EQU 4 +SCS EQU 0 +SEN EQU 0 +SENDB EQU 3 +SMP EQU 7 +SOFTPWMCYCLES EQU 36 +SOFTPWMDUTY EQU 37 +SPBRG EQU 153 +SPBRGH EQU 154 +SPEN EQU 7 +SR0 EQU 6 +SR1 EQU 7 +SRCON EQU 389 +SREN EQU 5 +SSPADD EQU 147 +SSPBUF EQU 19 +SSPCON EQU 20 +SSPCON2 EQU 145 +SSPEN EQU 5 +SSPIE EQU 3 +SSPIF EQU 3 +SSPM0 EQU 0 +SSPM1 EQU 1 +SSPM2 EQU 2 +SSPM3 EQU 3 +SSPMSK EQU 147 +SSPOV EQU 6 +SSPSTAT EQU 148 +STATUS EQU 3 +STRA EQU 0 +STRB EQU 1 +STRC EQU 2 +STRD EQU 3 +STRSYNC EQU 4 +SWDTEN EQU 0 +SYNC EQU 4 +SYSDOLOOP_E1 EQU 58 +SYSDOLOOP_S1 EQU 10 +SYSFORLOOP1 EQU 13 +SYSFORLOOP2 EQU 36 +SYSFORLOOP3 EQU 86 +SYSFORLOOP4 EQU 88 +SYSFORLOOPEND1 EQU 34 +SYSFORLOOPEND2 EQU 57 +SYSFORLOOPEND3 EQU 116 +SYSFORLOOPEND4 EQU 112 +T0CS EQU 5 +T0IE EQU 5 +T0IF EQU 2 +T0SE EQU 4 +T1CKPS0 EQU 4 +T1CKPS1 EQU 5 +T1CON EQU 16 +T1GIV EQU 7 +T1GSS EQU 1 +T1INSYNC EQU 2 +T1OSCEN EQU 3 +T1SYNC EQU 2 +T2CKPS0 EQU 0 +T2CKPS1 EQU 1 +T2CON EQU 18 +TMR0 EQU 1 +TMR0IE EQU 5 +TMR0IF EQU 2 +TMR1CS EQU 1 +TMR1GE EQU 6 +TMR1H EQU 15 +TMR1IE EQU 0 +TMR1IF EQU 0 +TMR1L EQU 14 +TMR1ON EQU 0 +TMR2 EQU 17 +TMR2IE EQU 1 +TMR2IF EQU 1 +TMR2ON EQU 2 +TOUTPS0 EQU 3 +TOUTPS1 EQU 4 +TOUTPS2 EQU 5 +TOUTPS3 EQU 6 +TRISA EQU 133 +TRISB EQU 134 +TRISC EQU 135 +TRISE EQU 137 +TRMT EQU 1 +TUN0 EQU 0 +TUN1 EQU 1 +TUN2 EQU 2 +TUN3 EQU 3 +TUN4 EQU 4 +TX8_9 EQU 6 +TX9 EQU 6 +TX9D EQU 0 +TXD8 EQU 0 +TXEN EQU 5 +TXIE EQU 4 +TXIF EQU 4 +TXREG EQU 25 +TXSTA EQU 152 +UA EQU 1 +ULPWUE EQU 5 +ULPWUIE EQU 2 +ULPWUIF EQU 2 +VCFG0 EQU 4 +VCFG1 EQU 5 +VR0 EQU 0 +VR1 EQU 1 +VR2 EQU 2 +VR3 EQU 3 +VRCON EQU 151 +VREN EQU 7 +VROE EQU 6 +VRR EQU 5 +VRSS EQU 4 +W EQU 0 +WCOL EQU 7 +WDTCON EQU 261 +WDTPS0 EQU 1 +WDTPS1 EQU 2 +WDTPS2 EQU 3 +WDTPS3 EQU 4 +WPUB EQU 149 +WPUB0 EQU 0 +WPUB1 EQU 1 +WPUB2 EQU 2 +WPUB3 EQU 3 +WPUB4 EQU 4 +WPUB5 EQU 5 +WPUB6 EQU 6 +WPUB7 EQU 7 +WR EQU 1 +WREN EQU 2 +WRERR EQU 3 +WUE EQU 1 +Z EQU 2 + +Code: +Loc Obj Code Original Assembly + + + + + + + +000000 2805 GOTO BASPROGRAMSTART + +000004 0009 RETFIE + + + + BASPROGRAMSTART +000005 203C CALL INITSYS +000000 1683 BANKSEL TRISB +000000 1683 1303 BANKSEL TRISB +000008 1286 BCF TRISB,5 +000009 1106 BCF TRISB,2 + + SYSDOLOOP_S1 +000000 1283 BANKSEL CNT +000000 1283 1303 BANKSEL CNT +00000C 01A0 CLRF CNT + SYSFORLOOP1 +00000D 300A MOVLW 10 +00000E 07A0 ADDWF CNT,F +00000F 3001 MOVLW 1 +000010 00A2 MOVWF PWMCHANNEL +000011 0820 MOVF CNT,W +000012 00A5 MOVWF SOFTPWMDUTY +000013 300A MOVLW 10 +000014 00A4 MOVWF SOFTPWMCYCLES +000015 2051 CALL PWMOUT +000016 3002 MOVLW 2 +000017 00A2 MOVWF PWMCHANNEL +000018 0820 MOVF CNT,W +000019 3CFA SUBLW 250 +00001A 00A5 MOVWF SOFTPWMDUTY +00001B 300A MOVLW 10 +00001C 00A4 MOVWF SOFTPWMCYCLES +00001D 2051 CALL PWMOUT +00001E 30FA MOVLW 250 +00001F 0220 SUBWF CNT,W +000020 1C03 BTFSS STATUS, C +000021 280D GOTO SYSFORLOOP1 + SYSFORLOOPEND1 +000022 3004 MOVLW 4 +000023 00A0 MOVWF CNT + SYSFORLOOP2 +000024 300A MOVLW 10 +000025 02A0 SUBWF CNT,F +000026 3001 MOVLW 1 +000027 00A2 MOVWF PWMCHANNEL +000028 0820 MOVF CNT,W +000029 00A5 MOVWF SOFTPWMDUTY +00002A 300A MOVLW 10 +00002B 00A4 MOVWF SOFTPWMCYCLES +00002C 2051 CALL PWMOUT +00002D 3002 MOVLW 2 +00002E 00A2 MOVWF PWMCHANNEL +00002F 0820 MOVF CNT,W +000030 3CFA SUBLW 250 +000031 00A5 MOVWF SOFTPWMDUTY +000032 300A MOVLW 10 +000033 00A4 MOVWF SOFTPWMCYCLES +000034 2051 CALL PWMOUT +000035 0820 MOVF CNT,W +000036 3C0A SUBLW 10 +000037 1C03 BTFSS STATUS, C +000038 2824 GOTO SYSFORLOOP2 + SYSFORLOOPEND2 +000039 280A GOTO SYSDOLOOP_S1 + SYSDOLOOP_E1 + BASPROGRAMEND +00003A 0063 SLEEP +00003B 283A GOTO BASPROGRAMEND + + + INITSYS +000000 1683 BANKSEL ADCON1 +000000 1683 1303 BANKSEL ADCON1 +00003E 139F BCF ADCON1,ADFM +000000 1283 BANKSEL ADCON0 +000000 1283 1303 BANKSEL ADCON0 +000041 101F BCF ADCON0,ADON +000000 1683 BANKSEL ANSEL +000000 1683 1703 BANKSEL ANSEL +000044 0188 CLRF ANSEL +000045 0189 CLRF ANSELH +000000 1283 BANKSEL CM2CON0 +000000 1283 1703 BANKSEL CM2CON0 +000048 1388 BCF CM2CON0,C2ON +000049 1387 BCF CM1CON0,C1ON +000000 1283 BANKSEL PORTA +000000 1283 1303 BANKSEL PORTA +00004C 0185 CLRF PORTA +00004D 0186 CLRF PORTB +00004E 0187 CLRF PORTC +00004F 0189 CLRF PORTE +000050 0008 RETURN + + + PWMOUT +000051 01A3 CLRF PWMDUR +000052 3001 MOVLW 1 +000053 0224 SUBWF SOFTPWMCYCLES,W +000054 1C03 BTFSS STATUS, C +000055 2874 GOTO SYSFORLOOPEND3 + SYSFORLOOP3 +000056 0AA3 INCF PWMDUR,F +000057 01A1 CLRF DOPWM + SYSFORLOOP4 +000058 0AA1 INCF DOPWM,F +000059 0825 MOVF SOFTPWMDUTY,W +00005A 0221 SUBWF DOPWM,W +00005B 1803 BTFSC STATUS, C +00005C 2865 GOTO ELSE4_1 +00005D 0322 DECF PWMCHANNEL,W +00005E 1903 BTFSC STATUS, Z +00005F 1686 BSF PORTB,5 +000060 3002 MOVLW 2 +000061 0222 SUBWF PWMCHANNEL,W +000062 1903 BTFSC STATUS, Z +000063 1506 BSF PORTB,2 +000064 286C GOTO ENDIF4 + ELSE4_1 +000065 0322 DECF PWMCHANNEL,W +000066 1903 BTFSC STATUS, Z +000067 1286 BCF PORTB,5 +000068 3002 MOVLW 2 +000069 0222 SUBWF PWMCHANNEL,W +00006A 1903 BTFSC STATUS, Z +00006B 1106 BCF PORTB,2 + ENDIF4 +00006C 30FF MOVLW 255 +00006D 0221 SUBWF DOPWM,W +00006E 1C03 BTFSS STATUS, C +00006F 2858 GOTO SYSFORLOOP4 + SYSFORLOOPEND4 +000070 0824 MOVF SOFTPWMCYCLES,W +000071 0223 SUBWF PWMDUR,W +000072 1C03 BTFSS STATUS, C +000073 2856 GOTO SYSFORLOOP3 + SYSFORLOOPEND3 +000074 0008 RETURN + + + + + diff --git a/resources/examples/Pic/LED_Dimmer2_16F886/LED_Dimmer2_16F886.simu b/resources/examples/Pic/LED_Dimmer2_16F886/LED_Dimmer2_16F886.simu new file mode 100644 index 0000000..12eb42f --- /dev/null +++ b/resources/examples/Pic/LED_Dimmer2_16F886/LED_Dimmer2_16F886.simu @@ -0,0 +1,51 @@ + + +Node-7: + + +Ground (0 V)-6: + + +Resistor-5: + + +Resistor-4: + + +Led-3: + + +Led-2: + + +pic16f886-1: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-15: + + +Connector-16: + + +Connector-18: + + +PlotterWidget-20: + + +SerialPortWidget-21: + + + diff --git a/resources/examples/Pic/Nokia5110LCDtester16F628A/Author.txt b/resources/examples/Pic/Nokia5110LCDtester16F628A/Author.txt new file mode 100644 index 0000000..4e5c700 --- /dev/null +++ b/resources/examples/Pic/Nokia5110LCDtester16F628A/Author.txt @@ -0,0 +1,5 @@ + +https://www.youtube.com/watch?v=8A5d3cIA3bM + +http://villamany.blogspot.com.es/2013/07/comprobador-lcd-nokia-5110-basado-en.html + diff --git a/resources/examples/Pic/Nokia5110LCDtester16F628A/Nokia5110LCDtester16F628A.simu b/resources/examples/Pic/Nokia5110LCDtester16F628A/Nokia5110LCDtester16F628A.simu new file mode 100644 index 0000000..cd5602c --- /dev/null +++ b/resources/examples/Pic/Nokia5110LCDtester16F628A/Nokia5110LCDtester16F628A.simu @@ -0,0 +1,60 @@ + + +Node-11: + + +Ground (0 V)-10: + + +Push-9: + + +Push-8: + + +Ground (0 V)-7: + + +Pcd8544-6: + + +pic16f628a-5: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-26: + + +Connector-30: + + +Connector-31: + + +Connector-28: + + +Connector-24: + + +PlotterWidget: + + +SerialPortWidget: + + + diff --git a/resources/examples/Pic/PWM_Pic16F627A/PWM_Pic16F627A.asm b/resources/examples/Pic/PWM_Pic16F627A/PWM_Pic16F627A.asm new file mode 100644 index 0000000..fca3b07 --- /dev/null +++ b/resources/examples/Pic/PWM_Pic16F627A/PWM_Pic16F627A.asm @@ -0,0 +1,118 @@ + +;********************************************************************** +;Filename: pwmdemo1.asm +;Uses PIC16F627A +;Date: 13 Nov. 2013 +;Author: Lewis Loflin +;http://www.bristolwatch.com +; +;Uses PWM to control LEDs from off to bight to off again +;Demonstrates the use of loops and PWM +;Delay routines based on 16 mHz external +; +;PWM Period = [(PR2) + 1] * 4 * TOSC * (TMR2 Prescale Value) +;PWM duty cycle = (DCxB9:DCxB0 bits value) * +; Tosc * (TMR2 prescale value) +;Tosc = 16 mHz / 4 +;PWM output PORTB, 3 +;********************************************************************** + + +list p=16f627A ; list directive to define processor +#include ; processor specific variable definitions +errorlevel -302 ; suppress message 302 from list file + +__CONFIG _CP_OFF & _LVP_OFF & _BOREN_OFF & _MCLRE_OFF & _WDT_OFF & _PWRTE_ON & _HS_OSC + +; Use _INTOSC_OSC_NOCLKOUT for +; internal 4 mHz osc and no ext reset, use pin RA5 as an input +; Use _HS_OSC for a 16 mHz ext crystal. +; Use _XT_OSC for 4 mHz ext crystal. Page 95 in spec sheet. + +;------------------------------------------------------------ + cblock 0x20 ; Begin General Purpose-Register +;-------------------------- counters + count1 + count2 + count3 + val + endc + + ORG 0x000 ; processor reset vector + goto setup ; go to beginning of program + + +setup ; init PIC16F627A + + movlw 0x07 + ; Turn comparators off and enable pins for I/O + movwf CMCON + clrf INTCON + clrf T2CON + clrf TMR2 + banksel TRISA + ; BSF STATUS,RP0 Jump to bank 1 use BANKSEL instead + clrf PIE1 + movlw d'255' ; frequency ~ 1000 Hz + movwf PR2 + clrf TRISA + clrf TRISB + banksel INTCON ; back to bank 0 + clrf PORTB + clrf PORTA + movlw b'00000111' + movwf T2CON ; turn on TMR2 prescale 16 + movlw d'0' ; duty cycle = 0% or no output + movwf CCPR1L + movlw b'00111100' + movwf CCP1CON ; turn on PWM + goto main + + +main + ; first loop increases brightness of LEDs + clrf val ; val = 0 +gg call delay_100ms + movf val, w + movwf CCPR1L ; output val to pwm RB3 + movlw d'10' + addwf val, F ; add 10 to val + btfss STATUS, C ; check for carry + goto gg ; no carry loop again + ; decreases brightness of LEDs + movlw 0xFF + movwf val +hh call delay_100ms + movfw val + movwf CCPR1L ; save val to register + movlw d'10' + subwf val, F ; subtract 10 from val save in val + btfsc STATUS, C ; check for < 0 + goto hh ; no loop again + clrf CCPR1L +goto main + + +delay_1ms + ; 16 mHz crystal, 4 mS with 4 mhz crystal + movlw 0x07 + movwf count1 +aa movlw 0xBC + movwf count2 + decfsz count2, F + goto $-1 + decfsz count1, F + goto aa + return + + +delay_100ms + ; 16 mHz crystal, 400 mS with 4 mHz crystal + movlw d'99' + movwf count3 +bb call delay_1ms + decfsz count3, F + goto bb + return + + END ; directive 'end of program' diff --git a/resources/examples/Pic/PWM_Pic16F627A/PWM_Pic16F627A.cod b/resources/examples/Pic/PWM_Pic16F627A/PWM_Pic16F627A.cod new file mode 100644 index 0000000000000000000000000000000000000000..ca2f04059ae2698b148974f243846c00feddc7e4 GIT binary patch literal 8192 zcmeI%XLJnzt1kscBZ}TKu@Bsr7pR)vASn)=YN({BH7ZrBT=`ez)DotR>vn#w)%#; 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+ 00012 ;PWM Period = [(PR2) + 1] * 4 * TOSC * (TMR2 Prescale Value) + 00013 ;PWM duty cycle = (DCxB9:DCxB0 bits value) * + 00014 ; Tosc * (TMR2 prescale value) + 00015 ;Tosc = 16 mHz / 4 + 00016 ;PWM output PORTB, 3 + 00017 ;********************************************************************** + 00018 + 00019 + 00020 list p=16f627A ; list directive to define processor + 00021 #include ; processor specific variable definitions +Warning[231]: Found lower case match for include filename. + 00001 LIST + 00002 ; P16F627A.INC Standard Header File, Version 1.10 Microchip Technology, Inc. + 00003 NOLIST + 00004 + 00005 ; This header file defines configurations, registers, and other useful bits of + 00006 ; information for the PIC16F627A microcontroller. These names are taken to match + 00007 ; the data sheets as closely as possible. + 00008 + 00009 ; Note that the processor must be selected before this file is + 00010 ; included. The processor may be selected the following ways: + 00011 + 00012 ; 1. Command line switch: + 00013 ; C:\ MPASM MYFILE.ASM /PIC16F627A + 00014 ; 2. LIST directive in the source file + 00015 ; LIST P=PIC16F627A + 00016 ; 3. Processor Type entry in the MPASM full-screen interface + 00017 + 00018 ;========================================================================== + 00019 ; + 00020 ; Revision History + 00021 ; + 00022 ;========================================================================== + 00023 + 00024 ;Rev: Date: Reason: + 00025 ;1.01 14 Nov 2002 Updated to reflect BOD terminology changed to BOR + 00026 ;1.00 22 Aug 2002 Initial Release + 00027 + 00028 ;========================================================================== + 00029 ; + 00030 ; Verify Processor + 00031 ; + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Pic16F627 2-12-2016 21:01:55 PAGE 2 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00032 ;========================================================================== + 00033 + 00034 IFNDEF __16F627A + 00035 MESSG "Processor-header file mismatch. Verify selected processor." + 00036 ENDIF + 00037 + 00038 ;========================================================================== + 00039 ; + 00040 ; Register Definitions + 00041 ; + 00042 ;========================================================================== + 00043 + 00000000 00044 W EQU H'0000' + 00000001 00045 F EQU H'0001' + 00046 + 00047 ;----- Register Files------------------------------------------------------ + 00048 + 00000000 00049 INDF EQU H'0000' + 00000001 00050 TMR0 EQU H'0001' + 00000002 00051 PCL EQU H'0002' + 00000003 00052 STATUS EQU H'0003' + 00000004 00053 FSR EQU H'0004' + 00000005 00054 PORTA EQU H'0005' + 00000006 00055 PORTB EQU H'0006' + 0000000A 00056 PCLATH EQU H'000A' + 0000000B 00057 INTCON EQU H'000B' + 0000000C 00058 PIR1 EQU H'000C' + 0000000E 00059 TMR1L EQU H'000E' + 0000000F 00060 TMR1H EQU H'000F' + 00000010 00061 T1CON EQU H'0010' + 00000011 00062 TMR2 EQU H'0011' + 00000012 00063 T2CON EQU H'0012' + 00000015 00064 CCPR1L EQU H'0015' + 00000016 00065 CCPR1H EQU H'0016' + 00000017 00066 CCP1CON EQU H'0017' + 00000018 00067 RCSTA EQU H'0018' + 00000019 00068 TXREG EQU H'0019' + 0000001A 00069 RCREG EQU H'001A' + 0000001F 00070 CMCON EQU H'001F' + 00071 + 00000081 00072 OPTION_REG EQU H'0081' + 00000085 00073 TRISA EQU H'0085' + 00000086 00074 TRISB EQU H'0086' + 0000008C 00075 PIE1 EQU H'008C' + 0000008E 00076 PCON EQU H'008E' + 00000092 00077 PR2 EQU H'0092' + 00000098 00078 TXSTA EQU H'0098' + 00000099 00079 SPBRG EQU H'0099' + 0000009A 00080 EEDATA EQU H'009A' + 0000009B 00081 EEADR EQU H'009B' + 0000009C 00082 EECON1 EQU H'009C' + 0000009D 00083 EECON2 EQU H'009D' + 0000009F 00084 VRCON EQU H'009F' + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Pic16F627 2-12-2016 21:01:55 PAGE 3 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00085 + 00086 ;----- STATUS Bits -------------------------------------------------------- + 00087 + 00000007 00088 IRP EQU H'0007' + 00000006 00089 RP1 EQU H'0006' + 00000005 00090 RP0 EQU H'0005' + 00000004 00091 NOT_TO EQU H'0004' + 00000003 00092 NOT_PD EQU H'0003' + 00000002 00093 Z EQU H'0002' + 00000001 00094 DC EQU H'0001' + 00000000 00095 C EQU H'0000' + 00096 + 00097 ;----- INTCON Bits -------------------------------------------------------- + 00098 + 00000007 00099 GIE EQU H'0007' + 00000006 00100 PEIE EQU H'0006' + 00000005 00101 T0IE EQU H'0005' + 00000004 00102 INTE EQU H'0004' + 00000003 00103 RBIE EQU H'0003' + 00000002 00104 T0IF EQU H'0002' + 00000001 00105 INTF EQU H'0001' + 00000000 00106 RBIF EQU H'0000' + 00107 + 00108 ;----- PIR1 Bits ---------------------------------------------------------- + 00109 + 00000007 00110 EEIF EQU H'0007' + 00000006 00111 CMIF EQU H'0006' + 00000005 00112 RCIF EQU H'0005' + 00000004 00113 TXIF EQU H'0004' + 00000002 00114 CCP1IF EQU H'0002' + 00000001 00115 TMR2IF EQU H'0001' + 00000000 00116 TMR1IF EQU H'0000' + 00117 + 00118 ;----- T1CON Bits --------------------------------------------------------- + 00000005 00119 T1CKPS1 EQU H'0005' + 00000004 00120 T1CKPS0 EQU H'0004' + 00000003 00121 T1OSCEN EQU H'0003' + 00000002 00122 NOT_T1SYNC EQU H'0002' + 00000001 00123 TMR1CS EQU H'0001' + 00000000 00124 TMR1ON EQU H'0000' + 00125 + 00126 ;----- T2CON Bits --------------------------------------------------------- + 00000006 00127 TOUTPS3 EQU H'0006' + 00000005 00128 TOUTPS2 EQU H'0005' + 00000004 00129 TOUTPS1 EQU H'0004' + 00000003 00130 TOUTPS0 EQU H'0003' + 00000002 00131 TMR2ON EQU H'0002' + 00000001 00132 T2CKPS1 EQU H'0001' + 00000000 00133 T2CKPS0 EQU H'0000' + 00134 + 00135 ;----- CCP1CON Bits --------------------------------------------------------- + 00000005 00136 CCP1X EQU H'0005' + 00000004 00137 CCP1Y EQU H'0004' + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Pic16F627 2-12-2016 21:01:55 PAGE 4 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00000003 00138 CCP1M3 EQU H'0003' + 00000002 00139 CCP1M2 EQU H'0002' + 00000001 00140 CCP1M1 EQU H'0001' + 00000000 00141 CCP1M0 EQU H'0000' + 00142 + 00143 ;----- RCSTA Bits --------------------------------------------------------- + 00000007 00144 SPEN EQU H'0007' + 00000006 00145 RX9 EQU H'0006' + 00000005 00146 SREN EQU H'0005' + 00000004 00147 CREN EQU H'0004' + 00000003 00148 ADEN EQU H'0003' + 00000002 00149 FERR EQU H'0002' + 00000001 00150 OERR EQU H'0001' + 00000000 00151 RX9D EQU H'0000' + 00152 + 00153 ;----- CMCON Bits --------------------------------------------------------- + 00154 + 00000007 00155 C2OUT EQU H'0007' + 00000006 00156 C1OUT EQU H'0006' + 00000005 00157 C2INV EQU H'0005' + 00000004 00158 C1INV EQU H'0004' + 00000003 00159 CIS EQU H'0003' + 00000002 00160 CM2 EQU H'0002' + 00000001 00161 CM1 EQU H'0001' + 00000000 00162 CM0 EQU H'0000' + 00163 + 00164 ;----- OPTION Bits -------------------------------------------------------- + 00165 + 00000007 00166 NOT_RBPU EQU H'0007' + 00000006 00167 INTEDG EQU H'0006' + 00000005 00168 T0CS EQU H'0005' + 00000004 00169 T0SE EQU H'0004' + 00000003 00170 PSA EQU H'0003' + 00000002 00171 PS2 EQU H'0002' + 00000001 00172 PS1 EQU H'0001' + 00000000 00173 PS0 EQU H'0000' + 00174 + 00175 ;----- PIE1 Bits ---------------------------------------------------------- + 00176 + 00000007 00177 EEIE EQU H'0007' + 00000006 00178 CMIE EQU H'0006' + 00000005 00179 RCIE EQU H'0005' + 00000004 00180 TXIE EQU H'0004' + 00000002 00181 CCP1IE EQU H'0002' + 00000001 00182 TMR2IE EQU H'0001' + 00000000 00183 TMR1IE EQU H'0000' + 00184 + 00185 ;----- PCON Bits ---------------------------------------------------------- + 00186 + 00000003 00187 OSCF EQU H'0003' + 00000001 00188 NOT_POR EQU H'0001' + 00000000 00189 NOT_BO EQU H'0000' + 00000000 00190 NOT_BOR EQU H'0000' + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Pic16F627 2-12-2016 21:01:55 PAGE 5 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00000000 00191 NOT_BOD EQU H'0000' ;Backwards compatability to 16F62X + 00192 + 00193 ;----- TXSTA Bits ---------------------------------------------------------- + 00000007 00194 CSRC EQU H'0007' + 00000006 00195 TX9 EQU H'0006' + 00000005 00196 TXEN EQU H'0005' + 00000004 00197 SYNC EQU H'0004' + 00000002 00198 BRGH EQU H'0002' + 00000001 00199 TRMT EQU H'0001' + 00000000 00200 TX9D EQU H'0000' + 00201 + 00202 ;----- EECON1 Bits --------------------------------------------------------- + 00000003 00203 WRERR EQU H'0003' + 00000002 00204 WREN EQU H'0002' + 00000001 00205 WR EQU H'0001' + 00000000 00206 RD EQU H'0000' + 00207 + 00208 ;----- VRCON Bits --------------------------------------------------------- + 00209 + 00000007 00210 VREN EQU H'0007' + 00000006 00211 VROE EQU H'0006' + 00000005 00212 VRR EQU H'0005' + 00000003 00213 VR3 EQU H'0003' + 00000002 00214 VR2 EQU H'0002' + 00000001 00215 VR1 EQU H'0001' + 00000000 00216 VR0 EQU H'0000' + 00217 + 00218 ;========================================================================== + 00219 ; + 00220 ; RAM Definition + 00221 ; + 00222 ;========================================================================== + 00223 + 000001FF 00224 __MAXRAM H'01FF' + 00225 __BADRAM H'07'-H'09', H'0D', H'13'-H'14', H'1B'-H'1E' + 00226 __BADRAM H'87'-H'89', H'8D', H'8F'-H'91', H'93'-H'97', H'9E' + 00227 __BADRAM H'105', H'107'-H'109', H'10C'-H'11F', H'150'-H'16F' + 00228 __BADRAM H'185', H'187'-H'189', H'18C'-H'1EF' + 00229 + 00230 ;========================================================================== + 00231 ; + 00232 ; Configuration Bits + 00233 ; + 00234 ;========================================================================== + 00235 + 00003FFF 00236 _BODEN_ON EQU H'3FFF' ;Backwards compatability to 16F62X + 00003FBF 00237 _BODEN_OFF EQU H'3FBF' ;Backwards compatability to 16F62X + 00003FFF 00238 _BOREN_ON EQU H'3FFF' + 00003FBF 00239 _BOREN_OFF EQU H'3FBF' + 00001FFF 00240 _CP_ON EQU H'1FFF' + 00003FFF 00241 _CP_OFF EQU H'3FFF' + 00003EFF 00242 _DATA_CP_ON EQU H'3EFF' + 00003FFF 00243 _DATA_CP_OFF EQU H'3FFF' + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Pic16F627 2-12-2016 21:01:55 PAGE 6 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00003FFF 00244 _PWRTE_OFF EQU H'3FFF' + 00003FF7 00245 _PWRTE_ON EQU H'3FF7' + 00003FFF 00246 _WDT_ON EQU H'3FFF' + 00003FFB 00247 _WDT_OFF EQU H'3FFB' + 00003FFF 00248 _LVP_ON EQU H'3FFF' + 00003F7F 00249 _LVP_OFF EQU H'3F7F' + 00003FFF 00250 _MCLRE_ON EQU H'3FFF' + 00003FDF 00251 _MCLRE_OFF EQU H'3FDF' + 00003FFF 00252 _RC_OSC_CLKOUT EQU H'3FFF' + 00003FFE 00253 _RC_OSC_NOCLKOUT EQU H'3FFE' + 00003FFF 00254 _ER_OSC_CLKOUT EQU H'3FFF' ;Backwards compatability to 16F62X + 00003FFE 00255 _ER_OSC_NOCLKOUT EQU H'3FFE' ;Backwards compatability to 16F62X + 00003FFD 00256 _INTOSC_OSC_CLKOUT EQU H'3FFD' + 00003FFC 00257 _INTOSC_OSC_NOCLKOUT EQU H'3FFC' + 00003FFD 00258 _INTRC_OSC_CLKOUT EQU H'3FFD' ;Backwards compatability to 16F62X + 00003FFC 00259 _INTRC_OSC_NOCLKOUT EQU H'3FFC' ;Backwards compatability to 16F62X + 00003FEF 00260 _EXTCLK_OSC EQU H'3FEF' + 00003FEE 00261 _HS_OSC EQU H'3FEE' + 00003FED 00262 _XT_OSC EQU H'3FED' + 00003FEC 00263 _LP_OSC EQU H'3FEC' + 00264 + 00265 LIST + 00022 errorlevel -302 ; suppress message 302 from list file + 00023 +Warning[205]: Found directive in column 1: "__CONFIG" +2007 3F02 00024 __CONFIG _CP_OFF & _LVP_OFF & _BOREN_OFF & _MCLRE_OFF & _WDT_OFF & _PWRTE_ON & _HS_OSC + 00025 + 00026 ; Use _INTOSC_OSC_NOCLKOUT for + 00027 ; internal 4 mHz osc and no ext reset, use pin RA5 as an input + 00028 ; Use _HS_OSC for a 16 mHz ext crystal. + 00029 ; Use _XT_OSC for 4 mHz ext crystal. Page 95 in spec sheet. + 00030 + 00031 ;------------------------------------------------------------ + 00032 cblock 0x20 ; Begin General Purpose-Register + 00000023 00033 ;-------------------------- counters + 00000020 00034 count1 + 00000021 00035 count2 + 00000022 00036 count3 + 00000023 00037 val + 00038 endc + 00039 +0000 00040 ORG 0x000 ; processor reset vector +0000 2801 00041 goto setup ; go to beginning of program + 00042 + 00043 +0001 00044 setup ; init PIC16F627A + 00045 +0001 3007 00046 movlw 0x07 + 00047 ; Turn comparators off and enable pins for I/O +0002 009F 00048 movwf CMCON +0003 018B 00049 clrf INTCON +0004 0192 00050 clrf T2CON +0005 0191 00051 clrf TMR2 + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Pic16F627 2-12-2016 21:01:55 PAGE 7 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +0006 1683 1303 00052 banksel TRISA + 00053 ; BSF STATUS,RP0 Jump to bank 1 use BANKSEL instead +0008 018C 00054 clrf PIE1 +0009 30FF 00055 movlw d'255' ; frequency ~ 1000 Hz +000A 0092 00056 movwf PR2 +000B 0185 00057 clrf TRISA +000C 0186 00058 clrf TRISB +000D 1283 1303 00059 banksel INTCON ; back to bank 0 +000F 0186 00060 clrf PORTB +0010 0185 00061 clrf PORTA +0011 3007 00062 movlw b'00000111' +0012 0092 00063 movwf T2CON ; turn on TMR2 prescale 16 +0013 3000 00064 movlw d'0' ; duty cycle = 0% or no output +0014 0095 00065 movwf CCPR1L +0015 303C 00066 movlw b'00111100' +0016 0097 00067 movwf CCP1CON ; turn on PWM +0017 2818 00068 goto main + 00069 + 00070 +0018 00071 main + 00072 ; first loop increases brightness of LEDs +0018 01A3 00073 clrf val ; val = 0 +0019 2034 00074 gg call delay_100ms +001A 0823 00075 movf val, w +001B 0095 00076 movwf CCPR1L ; output val to pwm RB3 +001C 300A 00077 movlw d'10' +001D 07A3 00078 addwf val, F ; add 10 to val +001E 1C03 00079 btfss STATUS, C ; check for carry +001F 2819 00080 goto gg ; no carry loop again + 00081 ; decreases brightness of LEDs +0020 30FF 00082 movlw 0xFF +0021 00A3 00083 movwf val +0022 2034 00084 hh call delay_100ms +0023 0823 00085 movfw val +0024 0095 00086 movwf CCPR1L ; save val to register +0025 300A 00087 movlw d'10' +0026 02A3 00088 subwf val, F ; subtract 10 from val save in val +0027 1803 00089 btfsc STATUS, C ; check for < 0 +0028 2822 00090 goto hh ; no loop again +0029 0195 00091 clrf CCPR1L +Warning[203]: Found opcode in column 1: "goto" +002A 2818 00092 goto main + 00093 + 00094 +002B 00095 delay_1ms + 00096 ; 16 mHz crystal, 4 mS with 4 mhz crystal +002B 3007 00097 movlw 0x07 +002C 00A0 00098 movwf count1 +002D 30BC 00099 aa movlw 0xBC +002E 00A1 00100 movwf count2 +002F 0BA1 00101 decfsz count2, F +0030 282F 00102 goto $-1 +0031 0BA0 00103 decfsz count1, F + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Pic16F627 2-12-2016 21:01:55 PAGE 8 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +0032 282D 00104 goto aa +0033 0008 00105 return + 00106 + 00107 +0034 00108 delay_100ms + 00109 ; 16 mHz crystal, 400 mS with 4 mHz crystal +0034 3063 00110 movlw d'99' +0035 00A2 00111 movwf count3 +0036 202B 00112 bb call delay_1ms +0037 0BA2 00113 decfsz count3, F +0038 2836 00114 goto bb +0039 0008 00115 return + 00116 + 00117 END ; directive 'end of program' + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Pic16F627 2-12-2016 21:01:55 PAGE 9 + + +SYMBOL TABLE + LABEL VALUE + +ADEN 00000003 +BRGH 00000002 +C 00000000 +C1INV 00000004 +C1OUT 00000006 +C2INV 00000005 +C2OUT 00000007 +CCP1CON 00000017 +CCP1IE 00000002 +CCP1IF 00000002 +CCP1M0 00000000 +CCP1M1 00000001 +CCP1M2 00000002 +CCP1M3 00000003 +CCP1X 00000005 +CCP1Y 00000004 +CCPR1H 00000016 +CCPR1L 00000015 +CIS 00000003 +CM0 00000000 +CM1 00000001 +CM2 00000002 +CMCON 0000001F +CMIE 00000006 +CMIF 00000006 +CREN 00000004 +CSRC 00000007 +DC 00000001 +EEADR 0000009B +EECON1 0000009C +EECON2 0000009D +EEDATA 0000009A +EEIE 00000007 +EEIF 00000007 +F 00000001 +FERR 00000002 +FSR 00000004 +GIE 00000007 +INDF 00000000 +INTCON 0000000B +INTE 00000004 +INTEDG 00000006 +INTF 00000001 +IRP 00000007 +NOT_BO 00000000 +NOT_BOD 00000000 +NOT_BOR 00000000 +NOT_PD 00000003 +NOT_POR 00000001 +NOT_RBPU 00000007 +NOT_T1SYNC 00000002 +NOT_TO 00000004 +OERR 00000001 + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Pic16F627 2-12-2016 21:01:55 PAGE 10 + + +SYMBOL TABLE + LABEL VALUE + +OPTION_REG 00000081 +OSCF 00000003 +PCL 00000002 +PCLATH 0000000A +PCON 0000008E +PEIE 00000006 +PIE1 0000008C +PIR1 0000000C +PORTA 00000005 +PORTB 00000006 +PR2 00000092 +PS0 00000000 +PS1 00000001 +PS2 00000002 +PSA 00000003 +RBIE 00000003 +RBIF 00000000 +RCIE 00000005 +RCIF 00000005 +RCREG 0000001A +RCSTA 00000018 +RD 00000000 +RP0 00000005 +RP1 00000006 +RX9 00000006 +RX9D 00000000 +SPBRG 00000099 +SPEN 00000007 +SREN 00000005 +STATUS 00000003 +SYNC 00000004 +T0CS 00000005 +T0IE 00000005 +T0IF 00000002 +T0SE 00000004 +T1CKPS0 00000004 +T1CKPS1 00000005 +T1CON 00000010 +T1OSCEN 00000003 +T2CKPS0 00000000 +T2CKPS1 00000001 +T2CON 00000012 +TMR0 00000001 +TMR1CS 00000001 +TMR1H 0000000F +TMR1IE 00000000 +TMR1IF 00000000 +TMR1L 0000000E +TMR1ON 00000000 +TMR2 00000011 +TMR2IE 00000001 +TMR2IF 00000001 +TMR2ON 00000002 + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Pic16F627 2-12-2016 21:01:55 PAGE 11 + + +SYMBOL TABLE + LABEL VALUE + +TOUTPS0 00000003 +TOUTPS1 00000004 +TOUTPS2 00000005 +TOUTPS3 00000006 +TRISA 00000085 +TRISB 00000086 +TRMT 00000001 +TX9 00000006 +TX9D 00000000 +TXEN 00000005 +TXIE 00000004 +TXIF 00000004 +TXREG 00000019 +TXSTA 00000098 +VR0 00000000 +VR1 00000001 +VR2 00000002 +VR3 00000003 +VRCON 0000009F +VREN 00000007 +VROE 00000006 +VRR 00000005 +W 00000000 +WR 00000001 +WREN 00000002 +WRERR 00000003 +Z 00000002 +_BODEN_OFF 00003FBF +_BODEN_ON 00003FFF +_BOREN_OFF 00003FBF +_BOREN_ON 00003FFF +_CP_OFF 00003FFF +_CP_ON 00001FFF +_DATA_CP_OFF 00003FFF +_DATA_CP_ON 00003EFF +_ER_OSC_CLKOUT 00003FFF +_ER_OSC_NOCLKOUT 00003FFE +_EXTCLK_OSC 00003FEF +_HS_OSC 00003FEE +_INTOSC_OSC_CLKOUT 00003FFD +_INTOSC_OSC_NOCLKOUT 00003FFC +_INTRC_OSC_CLKOUT 00003FFD +_INTRC_OSC_NOCLKOUT 00003FFC +_LP_OSC 00003FEC +_LVP_OFF 00003F7F +_LVP_ON 00003FFF +_MCLRE_OFF 00003FDF +_MCLRE_ON 00003FFF +_PWRTE_OFF 00003FFF +_PWRTE_ON 00003FF7 +_RC_OSC_CLKOUT 00003FFF +_RC_OSC_NOCLKOUT 00003FFE +_WDT_OFF 00003FFB + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Pic16F627 2-12-2016 21:01:55 PAGE 12 + + +SYMBOL TABLE + LABEL VALUE + +_WDT_ON 00003FFF +_XT_OSC 00003FED +__16F627A 00000001 +__CODE_END 000003FF +__CODE_START 00000000 +__COMMON_RAM_END 0000007F +__COMMON_RAM_START 00000070 +__EEPROM_END 0000217F +__EEPROM_START 00002100 +__VECTOR_INT 00000004 +__VECTOR_RESET 00000000 +aa 0000002D +bb 00000036 +count1 00000020 +count2 00000021 +count3 00000022 +delay_100ms 00000034 +delay_1ms 0000002B +gg 00000019 +hh 00000022 +main 00000018 +setup 00000001 +val 00000023 + + +MEMORY USAGE MAP ('X' = Used, '-' = Unused) + +0000 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXX------ +2000 : -------X-------- ---------------- ---------------- ---------------- + +All other memory blocks unused. + +Program Memory Words Used: 58 +Program Memory Words Free: 966 + + +Errors : 0 +Warnings : 3 reported, 0 suppressed +Messages : 0 reported, 4 suppressed + + \ No newline at end of file diff --git a/resources/examples/Pic/PWM_Pic16F627A/PWM_Pic16F627A.simu b/resources/examples/Pic/PWM_Pic16F627A/PWM_Pic16F627A.simu new file mode 100644 index 0000000..1184d9b --- /dev/null +++ b/resources/examples/Pic/PWM_Pic16F627A/PWM_Pic16F627A.simu @@ -0,0 +1,36 @@ + + +Node-6: + + +Probe-5: + + +pic16f627a-4: + + +Led-3: + + +Resistor-2: + + +Ground (0 V)-1: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +Connector-14: + + + diff --git a/resources/examples/Pic/PWM_Pic16F627A/PWM_Pic16F627A.vst b/resources/examples/Pic/PWM_Pic16F627A/PWM_Pic16F627A.vst new file mode 100644 index 0000000..37033aa --- /dev/null +++ b/resources/examples/Pic/PWM_Pic16F627A/PWM_Pic16F627A.vst @@ -0,0 +1,3 @@ +PR2 +CCP1CON +T2CON diff --git a/resources/examples/Pic/PWM_switch_Pic12F683/PWM_Switch_Pic12F683-2.simu b/resources/examples/Pic/PWM_switch_Pic12F683/PWM_Switch_Pic12F683-2.simu new file mode 100644 index 0000000..5b039d4 --- /dev/null +++ b/resources/examples/Pic/PWM_switch_Pic12F683/PWM_Switch_Pic12F683-2.simu @@ -0,0 +1,147 @@ + + +Node-22: + + +Node-21: + + +Push-20: + + +Node-19: + + +Push-18: + + +Node-17: + + +Potentiometer-16: + + +Resistor-15: + + +Resistor-14: + + +Led-13: + + +Led-12: + + +Ground (0 V)-11: + + +Resistor-10: + + +Resistor-9: + + +pic12f683-8: + + +Node-7: + + +Node-6: + + +Rail.-5: + + +Node-4: + + +Probe-3: + + +Node-2: + + +Probe-1: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-35: + + +Connector-36: + + +Connector-37: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-44: + + +Connector-45: + + +Connector-47: + + +Connector-49: + + +Connector-50: + + +Connector-51: + + +Connector-52: + + +Connector-53: + + +Connector-54: + + +Connector-55: + + +Connector-56: + + +Connector-57: + + +Connector-58: + + + diff --git a/resources/examples/Pic/PWM_switch_Pic12F683/PWM_Switch_Pic12F683.asm b/resources/examples/Pic/PWM_switch_Pic12F683/PWM_Switch_Pic12F683.asm new file mode 100644 index 0000000..1f6912c --- /dev/null +++ b/resources/examples/Pic/PWM_switch_Pic12F683/PWM_Switch_Pic12F683.asm @@ -0,0 +1,214 @@ +; CLOCK: Internal RC 4MHz (instruction execution time: 1usec) +; To control H-Bridge direction and speed. +; Read ADC GP0 write 10-bit value to PWM GP2 +; SW1 connected GP3, SW2 connected GP4 +; SW1 toggles GP1 ON-OFF +; SW2 toggles GP5 ON-OFF +; GP1 and GP5 connected to H-Bridge inputs. +; If GP1 is LOW AND GP5 is LOW PWM turned off. +; Lewis Loflin +; www.bristolwatch.com +;================================================================================== + list P=12F683, ST=OFF ; Turnoff Symbol Table in List file. + + errorlevel -302 ; Ignore error message when storing to Bank 1. +;================================================================================== + + #include + + __config _INTOSCIO & _WDT_OFF & _PWRTE_ON & _MCLRE_OFF & _CP_OFF & _CPD_OFF & _BOD_NSLEEP & _IESO_OFF & _FCMEN_OFF + +;*****[ Data Storage Reg's ]***** + CBLOCK 0x20 ; Assign each reg. from Bank 0 RAM area. + count1 + count2 + count3 + count4 + temp + RESULTHI + RESULTLO + ENDC ; Conclude Bank 0 RAM assignments. + +;********************************************************************** + ORG 0x000 ; processor reset vector + goto setup ; go to beginning of program + + ORG 0x004 ; interrupt vector location + +;********************************************************************** + + + +setup + BANKSEL OSCCON ; Switch to Bank 1. + MOVLW b'01100001' ; 4MHz Clk, IntOsc, SysClk via IntOsc + MOVWF OSCCON +; + BANKSEL CMCON0 ; Switch to Bank 0. + MOVLW b'00000111' ; Turn off Comparator. + MOVWF CMCON0 + + BANKSEL ANSEL ; Switch to Bank 1. + CLRF ANSEL ; Set I/O pins to Digital. +; + ; Define inputs & outputs. + CLRF TRISIO ; all output + BSF TRISIO, GP3 ; GP3 input + BSF TRISIO, GP4 +; + BANKSEL GPIO ; Switch to Bank 0. + CLRF GPIO + +; This code block configures the ADC for polling, +; Vdd reference, Frc clock and GP0 input. + + BANKSEL TRISIO ; bank 1 + BSF TRISIO, 0 ; Set GP0 for ADC input + BANKSEL ANSEL ; 0x9F P32 + MOVLW b'01110001' ; ADC Frc clock, + IORWF ANSEL ; and GP0 as analog + BANKSEL ADCON0 ; 0x1F + MOVLW b'00000001' ; Left justify, + MOVWF ADCON0 ; Vdd Vref, AN0, On + CALL delay_1ms ; Acquisiton delay + + + + +; setup PWM +; CCP1CON in bank 0 bits 4-5 are LSB of 10-bit PWM + + + movlw b'00000111' + movwf T2CON ; turn on TMR2 prescale 16 - frequency + movlw d'127' ; duty cycle = TMR2 = CCPR1L:CCP1CON<5:4> + + movwf CCPR1L + movlw b'00001110' + movwf CCP1CON ; turn on PWM + + goto loop +; +;================================================================================== + +loop + CALL ADCtoPWM + BTFSS GPIO, GP3 ; SW1 + CALL toggleGP1 + BTFSS GPIO, GP3 + GOTO $-1 ; wait for release + + BTFSS GPIO, GP4 + CALL toggleGP5 + BTFSS GPIO, GP4 + GOTO $-1 ; wait for release + +; If GP1 is LOW AND GP5 is LOW PWM turned off. + BTFSC GPIO, 1 + goto $+5 + BTFSC GPIO, 5 + goto $+3 + CALL PWMOFF + goto loop + Call PWMON + +goto loop + +; delay routines ************************************* + +; Calculating a 1mSec delay. 4mHz is divided by 4 internally to +; 1,000,000. Take reciprocal divide 1mSec by 1uSec = 1000. +; GOTO uses 2 cycles DECFSZ 1 cycle = 3 cycles or 3uSec. +; 3 * 167 * 2 = 1000uSec. or 1mSec. + + +delay_1ms + ; 4 mHz crystal + movlw D'2' + movwf count1 +aa movlw D'167' + decfsz count2, F + goto $-1 ; two cycles + decfsz count1, F + goto aa + return + + +delay_100ms + movlw d'100' + movwf count3 +bb call delay_1ms + decfsz count3, F + goto bb + return +;============================================================ + +PWMOFF + BANKSEL TRISIO + BSF TRISIO, GP2 + BANKSEL GPIO + CALL delay_1ms + RETURN + +PWMON + BANKSEL TRISIO + BCF TRISIO, GP2 + BANKSEL GPIO + CALL delay_1ms + RETURN + +;#################################### + +readADC0 + BSF ADCON0,GO ;Start conversion + BTFSC ADCON0,GO ;Is conversion done? + GOTO $-1 ;No, test again + MOVF ADRESH,W ;Read upper 8 bits + MOVWF RESULTHI ;Store in GPR space +; ADRESL bits 6, 7 LSB of ADC + BANKSEL ADRESL + MOVFW ADRESL + BANKSEL ADRESH ; bank 0 +; right shift bits 7, 6 to bits 4, 5 + MOVWF RESULTLO + RRF RESULTLO, f + RRF RESULTLO, f + return + +;###################################### + +ADCtoPWM + CALL readADC0 + MOVFW RESULTHI + MOVWF CCPR1L +; RESULTLO bits 5, 4 LSB of ADC +; CCP1CON bit 5,4 LSB PWM + + ;MOVLW b'00001110' + ;IORWF RESULTLO, w + ;MOVWF CCP1CON ; turn on PWM + return + +;###################################### + +; XOR toggle +toggleGP1 ; LED on GP1 + movlw 2 + xorwf GPIO, f + CALL delay_1ms + return + + +; non-XOR toggle +toggleGP5 ; LED on GP5 + + BTFSS GPIO, 5 + goto $+3 + BCF GPIO, 5 + goto $+2 + BSF GPIO, 5 + CALL delay_1ms + return + + +end diff --git a/resources/examples/Pic/PWM_switch_Pic12F683/PWM_Switch_Pic12F683.cod b/resources/examples/Pic/PWM_switch_Pic12F683/PWM_Switch_Pic12F683.cod new file mode 100644 index 0000000000000000000000000000000000000000..b21179112bad31c2dd1569a73b9cdb1a71df1b03 GIT binary patch literal 6656 zcmeI$cT`l@7Qo?s6chzf5fB>=3NjX8h9+3CfL&1(6bsT6j1dHlG0mGyCOz>)V-nL) z6E(f}UQ98)zutTAy(Ihmc)a&~&$TjZ`A61!i?h~z?0fFMXAk?b&K<_csf`||cKPRi zbxL{FqMC{w&D-jmYRa4IgSlmeMS0ovEe(;rvtV9XV_mQ?DAB>}{OrJqmql-Et!+QO zb1rjMOY6?I=8a9;eE#~ezF={2QC4msnD5)zx_w*o=5}9eTg#@#`fVq!aNs(+deTjvZE+}XI?0|Hn3Yl3B3dRC6wG@!X}&)og7LCn^1CeVkmiQ zpd%`jU;-VI>+2oZBfA27B|flE()^Xa@Q7-CrTe2(*ZHDT{r+%Dz#kqO@R#_~{H6Np z5jY@60|#RZ{0Cz5{V~!IIHao_ik+gduAUT1$n_Bo?2I}RJ5m<-Q)3S6+0>X&!Vx(V zcO))G=KC^Y_DYQO2!wmNE5fOD{%}IQKb-82y2q(^;8^aduhG52|567|zW@Dm)B4O` zB_n5hds|L>Q*B#g&ObJ?oTkRwhQ_v>*3MliyLn6fXD-v7@OgFM6XPn|PI;Q!p3FpH zH1@*Y$WCkf5cfr%N0x_??Z-?!_QwG@P&HIB)>Sc7G1gTv)>SdqRWa68G1gTvR58|7 zG1gTvR54UB)>SdqRWa68F}AZx0`VYB#3W3{!I*+Wa3~JL;Wz?QaU}XM4M*WI@S*r^&C zI}N8}3C_ToI16WEDVE_JoQv~tJ}$t8xCj^H5-i81xC|?BIj+D;tiqMJ3acY_HJNL0 zEv~~FT#vO_hi;QHwgDS)18&47Y{pG^8g54S5zp8y*n+LN72B{K-N!p)x8oVO1JA^r zcov?G=is?`9_~U9&&LZegco8MFT#uQ61)^IQ@e(-muqP36?i3Hg}Woxl6f`m!M%75 z?!#;GI=mkD;|+Kt-h?;fE!cqv@E{(-Tk$qLj7RV&-i~+Rop=}CjrZWacpu)658#9N z5I&5L;G_5$K8{b|llT-qjnCk-_#8fuFW`*~}#m&tquU&Yt(IKGZ=;G6gszK!qT zyZ9cyuXYV%KhV(F5Ah@X7{7pD#4q8O@hkXM{2G28zk%PxZ{fG`JNRAv9)2HxfIq|^ z;g9hr_*48D{v3aSzrcEkA{JpWPQuAJ1*hUPoQ@?p183qa zoQLk?6xTr#FgtwEL5{>6oG4K!_cKndrx{IL_&f#|aXx zahCMb{A}s1aSjIbe|YhN(nsfWrLV?$nD4&Xum$dG4O{5+CSsBF)3{jTb$*ic*LX5c zkpVh0RR*fla5|Pay%{)Dw5Q%I(Vlv^F%vk=ZkjA zF2IEmyNJxixCF~_snc7A6{6kumWy`Zt`P0ISBX`kz4um%_TH`%pT^ZryIS-P*fqEo z*Ezi!TrYZOyjmHp)=9crFBzKOAY(Lc#0`?E@ka5hO)^%`Hp@75le24hr@13S+TWysbb*lvQx;6=_?M@HvHp$hQ?RW<6z%y|to`q-QIe0Ff=k#`=CwUr2 z;`x%VnHNZb8j?cwLYb(BrAWO2=N8uvK8y?Bkx(0HHBRIim;>UA<(Gq0CYb-&ZQ0dJHtjc<}U>di7&y+!6}PKV4_ z58y#Ophh?F9L>8$>WwGYpE=x4N1Mie_jqj4BI)Aq;)A$~|S1L5VPnN6q z%L+aFfK;jv;zRf_KJuS--GBREXFO)SN2N+veN0yBdXLL0^$C0upTei{8K?Iw@pDqG zna|@3_#(dK^p4@nvRdO;WR3c&tkwM2WSx2(U&lA_O{e!3zAZHxza#6_ccoT+PwLe7 srC$9&8gzvZrBVF|KmM0pziao;lXSr7ZhTzgOZu0b + 00001 LIST + 00002 ; P12F683.INC Standard Header File, Version 1.00 Microchip Technology, Inc. + 00003 NOLIST + 00004 + 00005 ; This header file defines configurations, registers, and other useful bits of + 00006 ; information for the PIC12F683 microcontroller. These names are taken to match + 00007 ; the data sheets as closely as possible. + 00008 + 00009 ; Note that the processor must be selected before this file is + 00010 ; included. The processor may be selected the following ways: + 00011 + 00012 ; 1. Command line switch: + 00013 ; C:\ MPASM MYFILE.ASM /PIC16F684 + 00014 ; 2. LIST directive in the source file + 00015 ; LIST P=PIC12F683 + 00016 ; 3. Processor Type entry in the MPASM full-screen interface + 00017 + 00018 ;========================================================================== + 00019 ; + 00020 ; Revision History + 00021 ; + 00022 ;========================================================================== + 00023 ;1.00 12/09/03 Original + 00024 + 00025 ;========================================================================== + 00026 ; + 00027 ; Verify Processor + 00028 ; + 00029 ;========================================================================== + 00030 + 00031 IFNDEF __12F683 + 00032 MESSG "Processor-header file mismatch. Verify selected processor." + 00033 ENDIF + 00034 + 00035 ;========================================================================== + 00036 ; + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Switch_Pi 2-13-2016 00:49:20 PAGE 2 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00037 ; Register Definitions + 00038 ; + 00039 ;========================================================================== + 00040 + 00000000 00041 W EQU H'0000' + 00000001 00042 F EQU H'0001' + 00043 + 00044 ;----- Register Files------------------------------------------------------ + 00045 + 00000000 00046 INDF EQU H'0000' + 00000001 00047 TMR0 EQU H'0001' + 00000002 00048 PCL EQU H'0002' + 00000003 00049 STATUS EQU H'0003' + 00000004 00050 FSR EQU H'0004' + 00000005 00051 GPIO EQU H'0005' + 00052 + 0000000A 00053 PCLATH EQU H'000A' + 0000000B 00054 INTCON EQU H'000B' + 0000000C 00055 PIR1 EQU H'000C' + 00056 + 0000000E 00057 TMR1L EQU H'000E' + 0000000F 00058 TMR1H EQU H'000F' + 00000010 00059 T1CON EQU H'0010' + 00000011 00060 TMR2 EQU H'0011' + 00000012 00061 T2CON EQU H'0012' + 00000013 00062 CCPR1L EQU H'0013' + 00000014 00063 CCPR1H EQU H'0014' + 00000015 00064 CCP1CON EQU H'0015' + 00065 + 00000018 00066 WDTCON EQU H'0018' + 00000019 00067 CMCON0 EQU H'0019' + 0000001A 00068 CMCON1 EQU H'001A' + 00069 + 0000001E 00070 ADRESH EQU H'001E' + 0000001F 00071 ADCON0 EQU H'001F' + 00072 + 00000081 00073 OPTION_REG EQU H'0081' + 00074 + 00000085 00075 TRISIO EQU H'0085' + 00076 + 0000008C 00077 PIE1 EQU H'008C' + 00078 + 0000008E 00079 PCON EQU H'008E' + 0000008F 00080 OSCCON EQU H'008F' + 00000090 00081 OSCTUNE EQU H'0090' + 00082 + 00000092 00083 PR2 EQU H'0092' + 00084 + 00000095 00085 WPU EQU H'0095' + 00000095 00086 WPUA EQU H'0095' + 00000096 00087 IOC EQU H'0096' + 00000096 00088 IOCA EQU H'0096' + 00089 + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Switch_Pi 2-13-2016 00:49:20 PAGE 3 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00000099 00090 VRCON EQU H'0099' + 0000009A 00091 EEDATA EQU H'009A' + 0000009A 00092 EEDAT EQU H'009A' + 0000009B 00093 EEADR EQU H'009B' + 0000009C 00094 EECON1 EQU H'009C' + 0000009D 00095 EECON2 EQU H'009D' + 0000009E 00096 ADRESL EQU H'009E' + 0000009F 00097 ANSEL EQU H'009F' + 00098 + 00099 + 00100 ;----- STATUS Bits -------------------------------------------------------- + 00101 + 00000007 00102 IRP EQU H'0007' + 00000006 00103 RP1 EQU H'0006' + 00000005 00104 RP0 EQU H'0005' + 00000004 00105 NOT_TO EQU H'0004' + 00000003 00106 NOT_PD EQU H'0003' + 00000002 00107 Z EQU H'0002' + 00000001 00108 DC EQU H'0001' + 00000000 00109 C EQU H'0000' + 00110 + 00111 ;----- GPIO Bits ----------------------------------------------------------- + 00112 + 00000005 00113 GP5 EQU H'0005' + 00000004 00114 GP4 EQU H'0004' + 00000003 00115 GP3 EQU H'0003' + 00000002 00116 GP2 EQU H'0002' + 00000001 00117 GP1 EQU H'0001' + 00000000 00118 GP0 EQU H'0000' + 00119 + 00120 ;----- INTCON Bits -------------------------------------------------------- + 00121 + 00000007 00122 GIE EQU H'0007' + 00000006 00123 PEIE EQU H'0006' + 00000005 00124 T0IE EQU H'0005' + 00000004 00125 INTE EQU H'0004' + 00000003 00126 GPIE EQU H'0003' + 00000002 00127 T0IF EQU H'0002' + 00000001 00128 INTF EQU H'0001' + 00000000 00129 GPIF EQU H'0000' + 00130 + 00131 ;----- PIR1 Bits ---------------------------------------------------------- + 00132 + 00000007 00133 EEIF EQU H'0007' + 00000006 00134 ADIF EQU H'0006' + 00000005 00135 CCP1IF EQU H'0005' + 00000003 00136 CMIF EQU H'0003' + 00000002 00137 OSFIF EQU H'0002' + 00000001 00138 T2IF EQU H'0001' + 00000001 00139 TMR2IF EQU H'0001' + 00000000 00140 T1IF EQU H'0000' + 00000000 00141 TMR1IF EQU H'0000' + 00142 + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Switch_Pi 2-13-2016 00:49:20 PAGE 4 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00143 ;----- T1CON Bits --------------------------------------------------------- + 00144 + 00000007 00145 T1GINV EQU H'0007' + 00000006 00146 T1GE EQU H'0006' + 00000005 00147 T1CKPS1 EQU H'0005' + 00000004 00148 T1CKPS0 EQU H'0004' + 00000003 00149 T1OSCEN EQU H'0003' + 00000002 00150 NOT_T1SYNC EQU H'0002' + 00000001 00151 TMR1CS EQU H'0001' + 00000000 00152 TMR1ON EQU H'0000' + 00153 + 00154 ;----- T2CON Bits --------------------------------------------------------- + 00155 + 00000006 00156 TOUTPS3 EQU H'0006' + 00000005 00157 TOUTPS2 EQU H'0005' + 00000004 00158 TOUTPS1 EQU H'0004' + 00000003 00159 TOUTPS0 EQU H'0003' + 00000002 00160 TMR2ON EQU H'0002' + 00000001 00161 T2CKPS1 EQU H'0001' + 00000000 00162 T2CKPS0 EQU H'0000' + 00163 + 00164 ;----- CCP1CON Bits ------------------------------------------------------- + 00165 + 00000005 00166 DC1B1 EQU H'0005' + 00000004 00167 DC1B0 EQU H'0004' + 00000003 00168 CCP1M3 EQU H'0003' + 00000002 00169 CCP1M2 EQU H'0002' + 00000001 00170 CCP1M1 EQU H'0001' + 00000000 00171 CCP1M0 EQU H'0000' + 00172 + 00173 ;----- WDTCON Bits -------------------------------------------------------- + 00174 + 00000004 00175 WDTPS3 EQU H'0004' + 00000003 00176 WDTPS2 EQU H'0003' + 00000002 00177 WDTPS1 EQU H'0002' + 00000001 00178 WDTPS0 EQU H'0001' + 00000000 00179 SWDTEN EQU H'0000' + 00180 + 00181 ;----- COMCON0 Bits ------------------------------------------------------- + 00182 + 00000006 00183 COUT EQU H'0006' + 00000004 00184 CINV EQU H'0004' + 00000003 00185 CIS EQU H'0003' + 00000002 00186 CM2 EQU H'0002' + 00000001 00187 CM1 EQU H'0001' + 00000000 00188 CM0 EQU H'0000' + 00189 + 00190 ;----- COMCON1 Bits ------------------------------------------------------- + 00191 + 00000001 00192 T1GSS EQU H'0001' + 00000000 00193 CMSYNC EQU H'0000' + 00194 + 00195 ;----- ADCON0 Bits -------------------------------------------------------- + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Switch_Pi 2-13-2016 00:49:20 PAGE 5 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00196 + 00000007 00197 ADFM EQU H'0007' + 00000006 00198 VCFG EQU H'0006' + 00000004 00199 CHS2 EQU H'0004' + 00000003 00200 CHS1 EQU H'0003' + 00000002 00201 CHS0 EQU H'0002' + 00000001 00202 GO EQU H'0001' + 00000001 00203 NOT_DONE EQU H'0001' + 00000001 00204 GO_DONE EQU H'0001' + 00000000 00205 ADON EQU H'0000' + 00206 + 00207 ;----- OPTION Bits -------------------------------------------------------- + 00208 + 00000007 00209 NOT_GPPU EQU H'0007' + 00000006 00210 INTEDG EQU H'0006' + 00000005 00211 T0CS EQU H'0005' + 00000004 00212 T0SE EQU H'0004' + 00000003 00213 PSA EQU H'0003' + 00000002 00214 PS2 EQU H'0002' + 00000001 00215 PS1 EQU H'0001' + 00000000 00216 PS0 EQU H'0000' + 00217 + 00218 + 00219 ;----- PIE1 Bits ---------------------------------------------------------- + 00220 + 00000007 00221 EEIE EQU H'0007' + 00000006 00222 ADIE EQU H'0006' + 00000005 00223 CCP1IE EQU H'0005' + 00000003 00224 CMIE EQU H'0003' + 00000002 00225 OSFIE EQU H'0002' + 00000001 00226 T2IE EQU H'0001' + 00000001 00227 TMR2IE EQU H'0001' + 00000000 00228 T1IE EQU H'0000' + 00000000 00229 TMR1IE EQU H'0000' + 00230 + 00231 ;----- PCON Bits ---------------------------------------------------------- + 00232 + 00000005 00233 ULPWUE EQU H'0005' + 00000004 00234 SBODEN EQU H'0004' + 00000001 00235 NOT_POR EQU H'0001' + 00000000 00236 NOT_BOD EQU H'0000' + 00237 + 00238 ;----- OSCCON Bits -------------------------------------------------------- + 00239 + 00000006 00240 IRCF2 EQU H'0006' + 00000005 00241 IRCF1 EQU H'0005' + 00000004 00242 IRCF0 EQU H'0004' + 00000003 00243 OSTS EQU H'0003' + 00000002 00244 HTS EQU H'0002' + 00000001 00245 LTS EQU H'0001' + 00000000 00246 SCS EQU H'0000' + 00247 + 00248 ;----- OSCTUNE Bits ------------------------------------------------------- + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Switch_Pi 2-13-2016 00:49:20 PAGE 6 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00249 + 00000004 00250 TUN4 EQU H'0004' + 00000003 00251 TUN3 EQU H'0003' + 00000002 00252 TUN2 EQU H'0002' + 00000001 00253 TUN1 EQU H'0001' + 00000000 00254 TUN0 EQU H'0000' + 00255 + 00256 + 00257 ;----- IOC Bits --------------------------------------------------------- + 00258 + 00000005 00259 IOC5 EQU H'0005' + 00000004 00260 IOC4 EQU H'0004' + 00000003 00261 IOC3 EQU H'0003' + 00000002 00262 IOC2 EQU H'0002' + 00000001 00263 IOC1 EQU H'0001' + 00000000 00264 IOC0 EQU H'0000' + 00265 + 00266 ;----- IOCA Bits --------------------------------------------------------- + 00267 + 00000005 00268 IOCA5 EQU H'0005' + 00000004 00269 IOCA4 EQU H'0004' + 00000003 00270 IOCA3 EQU H'0003' + 00000002 00271 IOCA2 EQU H'0002' + 00000001 00272 IOCA1 EQU H'0001' + 00000000 00273 IOCA0 EQU H'0000' + 00274 + 00275 ;----- VRCON Bits --------------------------------------------------------- + 00276 + 00000007 00277 VREN EQU H'0007' + 00000005 00278 VRR EQU H'0005' + 00000003 00279 VR3 EQU H'0003' + 00000002 00280 VR2 EQU H'0002' + 00000001 00281 VR1 EQU H'0001' + 00000000 00282 VR0 EQU H'0000' + 00283 + 00284 ;----- EECON1 Bits -------------------------------------------------------- + 00285 + 00000003 00286 WRERR EQU H'0003' + 00000002 00287 WREN EQU H'0002' + 00000001 00288 WR EQU H'0001' + 00000000 00289 RD EQU H'0000' + 00290 + 00291 ;----- ANSEL Bits --------------------------------------------------------- + 00292 + 00000006 00293 ADCS2 EQU H'0006' + 00000005 00294 ADCS1 EQU H'0005' + 00000004 00295 ADCS0 EQU H'0004' + 00000003 00296 ANS3 EQU H'0003' + 00000002 00297 ANS2 EQU H'0002' + 00000001 00298 ANS1 EQU H'0001' + 00000000 00299 ANS0 EQU H'0000' + 00300 + 00301 ;========================================================================== + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Switch_Pi 2-13-2016 00:49:20 PAGE 7 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00302 ; + 00303 ; RAM Definition + 00304 ; + 00305 ;========================================================================== + 00306 + 000000FF 00307 __MAXRAM H'FF' + 00308 __BADRAM H'06', H'08'-H'09', H'0D', H'1B'-H'1D' + 00309 __BADRAM H'86', H'88'-H'89', H'8D', H'93'-H'94', H'97'-H'98', H'C0'-H'EF' + 00310 + 00311 ;========================================================================== + 00312 ; + 00313 ; Configuration Bits + 00314 ; + 00315 ;========================================================================== + 00316 + 00003FFF 00317 _FCMEN_ON EQU H'3FFF' + 000037FF 00318 _FCMEN_OFF EQU H'37FF' + 00003FFF 00319 _IESO_ON EQU H'3FFF' + 00003BFF 00320 _IESO_OFF EQU H'3BFF' + 00003FFF 00321 _BOD_ON EQU H'3FFF' + 00003EFF 00322 _BOD_NSLEEP EQU H'3EFF' + 00003DFF 00323 _BOD_SBODEN EQU H'3DFF' + 00003CFF 00324 _BOD_OFF EQU H'3CFF' + 00003F7F 00325 _CPD_ON EQU H'3F7F' + 00003FFF 00326 _CPD_OFF EQU H'3FFF' + 00003FBF 00327 _CP_ON EQU H'3FBF' + 00003FFF 00328 _CP_OFF EQU H'3FFF' + 00003FFF 00329 _MCLRE_ON EQU H'3FFF' + 00003FDF 00330 _MCLRE_OFF EQU H'3FDF' + 00003FFF 00331 _PWRTE_OFF EQU H'3FFF' + 00003FEF 00332 _PWRTE_ON EQU H'3FEF' + 00003FFF 00333 _WDT_ON EQU H'3FFF' + 00003FF7 00334 _WDT_OFF EQU H'3FF7' + 00003FF8 00335 _LP_OSC EQU H'3FF8' + 00003FF9 00336 _XT_OSC EQU H'3FF9' + 00003FFA 00337 _HS_OSC EQU H'3FFA' + 00003FFB 00338 _EC_OSC EQU H'3FFB' + 00003FFC 00339 _INTRC_OSC_NOCLKOUT EQU H'3FFC' + 00003FFC 00340 _INTOSCIO EQU H'3FFC' + 00003FFD 00341 _INTRC_OSC_CLKOUT EQU H'3FFD' + 00003FFD 00342 _INTOSC EQU H'3FFD' + 00003FFE 00343 _EXTRC_OSC_NOCLKOUT EQU H'3FFE' + 00003FFE 00344 _EXTRCIO EQU H'3FFE' + 00003FFF 00345 _EXTRC_OSC_CLKOUT EQU H'3FFF' + 00003FFF 00346 _EXTRC EQU H'3FFF' + 00347 + 00348 LIST + 00018 +2007 32C4 00019 __config _INTOSCIO & _WDT_OFF & _PWRTE_ON & _MCLRE_OFF & _CP_OFF & _CPD_OFF & _BOD_NSLEEP & _IESO_OFF + & _FCMEN_OFF + 00020 + 00021 ;*****[ Data Storage Reg's ]***** + 00022 CBLOCK 0x20 ; Assign each reg. from Bank 0 RAM area. + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Switch_Pi 2-13-2016 00:49:20 PAGE 8 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00000020 00023 count1 + 00000021 00024 count2 + 00000022 00025 count3 + 00000023 00026 count4 + 00000024 00027 temp + 00000025 00028 RESULTHI + 00000026 00029 RESULTLO + 00030 ENDC ; Conclude Bank 0 RAM assignments. + 00031 + 00032 ;********************************************************************** +0000 00033 ORG 0x000 ; processor reset vector +0000 2804 00034 goto setup ; go to beginning of program + 00035 +0004 00036 ORG 0x004 ; interrupt vector location + 00037 + 00038 ;********************************************************************** + 00039 + 00040 + 00041 +0004 00042 setup +0004 1683 00043 BANKSEL OSCCON ; Switch to Bank 1. +0005 3061 00044 MOVLW b'01100001' ; 4MHz Clk, IntOsc, SysClk via IntOsc +0006 008F 00045 MOVWF OSCCON + 00046 ; +0007 1283 00047 BANKSEL CMCON0 ; Switch to Bank 0. +0008 3007 00048 MOVLW b'00000111' ; Turn off Comparator. +0009 0099 00049 MOVWF CMCON0 + 00050 +000A 1683 00051 BANKSEL ANSEL ; Switch to Bank 1. +000B 019F 00052 CLRF ANSEL ; Set I/O pins to Digital. + 00053 ; + 00054 ; Define inputs & outputs. +000C 0185 00055 CLRF TRISIO ; all output +000D 1585 00056 BSF TRISIO, GP3 ; GP3 input +000E 1605 00057 BSF TRISIO, GP4 + 00058 ; +000F 1283 00059 BANKSEL GPIO ; Switch to Bank 0. +0010 0185 00060 CLRF GPIO + 00061 + 00062 ; This code block configures the ADC for polling, + 00063 ; Vdd reference, Frc clock and GP0 input. + 00064 +0011 1683 00065 BANKSEL TRISIO ; bank 1 +0012 1405 00066 BSF TRISIO, 0 ; Set GP0 for ADC input +0013 1683 00067 BANKSEL ANSEL ; 0x9F P32 +0014 3071 00068 MOVLW b'01110001' ; ADC Frc clock, +0015 049F 00069 IORWF ANSEL ; and GP0 as analog +0016 1283 00070 BANKSEL ADCON0 ; 0x1F +0017 3001 00071 MOVLW b'00000001' ; Left justify, +0018 009F 00072 MOVWF ADCON0 ; Vdd Vref, AN0, On +0019 2032 00073 CALL delay_1ms ; Acquisiton delay + 00074 + 00075 + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Switch_Pi 2-13-2016 00:49:20 PAGE 9 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00076 + 00077 + 00078 ; setup PWM + 00079 ; CCP1CON in bank 0 bits 4-5 are LSB of 10-bit PWM + 00080 + 00081 +001A 3007 00082 movlw b'00000111' +001B 0092 00083 movwf T2CON ; turn on TMR2 prescale 16 - frequency +001C 307F 00084 movlw d'127' ; duty cycle = TMR2 = CCPR1L:CCP1CON<5:4> + 00085 +001D 0093 00086 movwf CCPR1L +001E 300E 00087 movlw b'00001110' +001F 0095 00088 movwf CCP1CON ; turn on PWM + 00089 +0020 2821 00090 goto loop + 00091 ; + 00092 ;================================================================================== + 00093 +0021 00094 loop +0021 2056 00095 CALL ADCtoPWM +0022 1D85 00096 BTFSS GPIO, GP3 ; SW1 +0023 205A 00097 CALL toggleGP1 +0024 1D85 00098 BTFSS GPIO, GP3 +0025 2824 00099 GOTO $-1 ; wait for release + 00100 +0026 1E05 00101 BTFSS GPIO, GP4 +0027 205E 00102 CALL toggleGP5 +0028 1E05 00103 BTFSS GPIO, GP4 +0029 2828 00104 GOTO $-1 ; wait for release + 00105 + 00106 ; If GP1 is LOW AND GP5 is LOW PWM turned off. +002A 1885 00107 BTFSC GPIO, 1 +002B 2830 00108 goto $+5 +002C 1A85 00109 BTFSC GPIO, 5 +002D 2830 00110 goto $+3 +002E 2040 00111 CALL PWMOFF +002F 2821 00112 goto loop +0030 2045 00113 Call PWMON + 00114 +Warning[203]: Found opcode in column 1: "goto" +0031 2821 00115 goto loop + 00116 + 00117 ; delay routines ************************************* + 00118 + 00119 ; Calculating a 1mSec delay. 4mHz is divided by 4 internally to + 00120 ; 1,000,000. Take reciprocal divide 1mSec by 1uSec = 1000. + 00121 ; GOTO uses 2 cycles DECFSZ 1 cycle = 3 cycles or 3uSec. + 00122 ; 3 * 167 * 2 = 1000uSec. or 1mSec. + 00123 + 00124 +0032 00125 delay_1ms + 00126 ; 4 mHz crystal +0032 3002 00127 movlw D'2' + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Switch_Pi 2-13-2016 00:49:20 PAGE 10 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +0033 00A0 00128 movwf count1 +0034 30A7 00129 aa movlw D'167' +0035 0BA1 00130 decfsz count2, F +0036 2835 00131 goto $-1 ; two cycles +0037 0BA0 00132 decfsz count1, F +0038 2834 00133 goto aa +0039 0008 00134 return + 00135 + 00136 +003A 00137 delay_100ms +003A 3064 00138 movlw d'100' +003B 00A2 00139 movwf count3 +003C 2032 00140 bb call delay_1ms +003D 0BA2 00141 decfsz count3, F +003E 283C 00142 goto bb +003F 0008 00143 return + 00144 ;============================================================ + 00145 +0040 00146 PWMOFF +0040 1683 00147 BANKSEL TRISIO +0041 1505 00148 BSF TRISIO, GP2 +0042 1283 00149 BANKSEL GPIO +0043 2032 00150 CALL delay_1ms +0044 0008 00151 RETURN + 00152 +0045 00153 PWMON +0045 1683 00154 BANKSEL TRISIO +0046 1105 00155 BCF TRISIO, GP2 +0047 1283 00156 BANKSEL GPIO +0048 2032 00157 CALL delay_1ms +0049 0008 00158 RETURN + 00159 + 00160 ;#################################### + 00161 +004A 00162 readADC0 +004A 149F 00163 BSF ADCON0,GO ;Start conversion +004B 189F 00164 BTFSC ADCON0,GO ;Is conversion done? +004C 284B 00165 GOTO $-1 ;No, test again +004D 081E 00166 MOVF ADRESH,W ;Read upper 8 bits +004E 00A5 00167 MOVWF RESULTHI ;Store in GPR space + 00168 ; ADRESL bits 6, 7 LSB of ADC +004F 1683 00169 BANKSEL ADRESL +0050 081E 00170 MOVFW ADRESL +0051 1283 00171 BANKSEL ADRESH ; bank 0 + 00172 ; right shift bits 7, 6 to bits 4, 5 +0052 00A6 00173 MOVWF RESULTLO +0053 0CA6 00174 RRF RESULTLO, f +0054 0CA6 00175 RRF RESULTLO, f +0055 0008 00176 return + 00177 + 00178 ;###################################### + 00179 +0056 00180 ADCtoPWM + gpasm-1.4.0 #1107 (Jan 9 2015) PWM_Switch_Pi 2-13-2016 00:49:20 PAGE 11 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +0056 204A 00181 CALL readADC0 +0057 0825 00182 MOVFW RESULTHI +0058 0093 00183 MOVWF CCPR1L + 00184 ; RESULTLO bits 5, 4 LSB of ADC + 00185 ; CCP1CON bit 5,4 LSB PWM + 00186 + 00187 ;MOVLW b'00001110' + 00188 ;IORWF RESULTLO, w + 00189 ;MOVWF CCP1CON ; turn on PWM +0059 0008 00190 return + 00191 + 00192 ;###################################### + 00193 + 00194 ; XOR toggle +005A 00195 toggleGP1 ; LED on GP1 +005A 3002 00196 movlw 2 +005B 0685 00197 xorwf GPIO, f +005C 2032 00198 CALL delay_1ms +005D 0008 00199 return + 00200 + 00201 + 00202 ; non-XOR toggle +005E 00203 toggleGP5 ; LED on GP5 + 00204 +005E 1E85 00205 BTFSS GPIO, 5 +005F 2862 00206 goto $+3 +0060 1285 00207 BCF GPIO, 5 +0061 2863 00208 goto $+2 +0062 1685 00209 BSF GPIO, 5 +0063 2032 00210 CALL delay_1ms +0064 0008 00211 return + 00212 + 00213 +Warning[205]: Found directive in column 1: "end" + 00214 end + + +MEMORY USAGE MAP ('X' = Used, '-' = Unused) + +0000 : X---XXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX +0040 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXX----------- ---------------- +2000 : -------X-------- ---------------- ---------------- ---------------- + +All other memory blocks unused. + +Program Memory Words Used: 98 +Program Memory Words Free: 1950 + + +Errors : 0 +Warnings : 2 reported, 0 suppressed +Messages : 0 reported, 11 suppressed + + \ No newline at end of file diff --git a/resources/examples/Pic/PWM_switch_Pic12F683/PWM_Switch_Pic12F683.simu b/resources/examples/Pic/PWM_switch_Pic12F683/PWM_Switch_Pic12F683.simu new file mode 100644 index 0000000..dbf6680 --- /dev/null +++ b/resources/examples/Pic/PWM_switch_Pic12F683/PWM_Switch_Pic12F683.simu @@ -0,0 +1,174 @@ + + +Node-26: + + +Probe-25: + + +Probe-24: + + +pic12f683-23: + + +Resistor-22: + + +Resistor-21: + + +Ground (0 V)-20: + + +Led-19: + + +Resistor-18: + + +Led-17: + + +Led-16: + + +Resistor-15: + + +Resistor-14: + + +Potentiometer-13: + + +Node-12: + + +Node-11: + + +Node-10: + + +Node-9: + + +Push-8: + + +Node-7: + + +Node-6: + + +Push-5: + + +Node-4: + + +Node-3: + + +Rail.-2: + + +Node-1: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-36: + + +Connector-38: + + +Connector-39: + + +Connector-41: + + +Connector-42: + + +Connector-43: + + +Connector-45: + + +Connector-47: + + +Connector-48: + + +Connector-49: + + +Connector-51: + + +Connector-53: + + +Connector-54: + + +Connector-55: + + +Connector-56: + + +Connector-57: + + +Connector-58: + + +Connector-59: + + +Connector-60: + + +Connector-61: + + +Connector-62: + + +Connector-64: + + +Connector-65: + + +Connector-66: + + +Connector-67: + + +Connector-68: + + + diff --git a/resources/examples/Pic/SevSeg_Pic16F876A/SevSeg_Pic16F876A.simu b/resources/examples/Pic/SevSeg_Pic16F876A/SevSeg_Pic16F876A.simu new file mode 100644 index 0000000..f1b2939 --- /dev/null +++ b/resources/examples/Pic/SevSeg_Pic16F876A/SevSeg_Pic16F876A.simu @@ -0,0 +1,99 @@ + + +Rail.-51: + + +Ground (0 V)-12: + + +Volt. Source-11: + + +pic16f876a-10: + + +Resistor-9: + + +Resistor-8: + + +Resistor-7: + + +Resistor-6: + + +Resistor-5: + + +Resistor-4: + + +Resistor-3: + + +Resistor-2: + + +7 Segment-1: + + +Connector-13: + + +Connector-15: + + +Connector-17: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +Connector-39: + + +Connector-41: + + +Connector-43: + + +Connector-45: + + +Connector-47: + + +Connector-52: + + + diff --git a/resources/examples/Pic/SevSeg_Pic16F876A/sevseg_Pic16F876A.asm b/resources/examples/Pic/SevSeg_Pic16F876A/sevseg_Pic16F876A.asm new file mode 100644 index 0000000..3e867ad --- /dev/null +++ b/resources/examples/Pic/SevSeg_Pic16F876A/sevseg_Pic16F876A.asm @@ -0,0 +1,412 @@ +;Program compiled by Great Cow BASIC (0.95 2016-01-24) +;Need help? See the GCBASIC forums at http://sourceforge.net/projects/gcbasic/forums, +;check the documentation or email w_cholmondeley at users dot sourceforge dot net. + +;******************************************************************************** + +;Set up the assembler options (Chip type, clock source, other bits and pieces) + LIST p=16F876A, r=DEC +#include + __CONFIG _HS_OSC & _WDT_OFF & _LVP_OFF + +;******************************************************************************** + +;Set aside memory locations for variables +DELAYTEMP EQU 112 +DELAYTEMP2 EQU 113 +SYSDIVMULTA EQU 119 +SYSDIVMULTA_H EQU 120 +SYSDIVMULTB EQU 123 +SYSDIVMULTB_H EQU 124 +SYSDIVMULTX EQU 114 +SYSDIVMULTX_H EQU 115 +SYSINTEGERTEMPA EQU 117 +SYSINTEGERTEMPA_H EQU 118 +SYSINTEGERTEMPB EQU 121 +SYSINTEGERTEMPB_H EQU 122 +SYSINTEGERTEMPX EQU 112 +SYSINTEGERTEMPX_H EQU 113 +SYSSIGNBYTE EQU 125 +SYSWORDTEMPA EQU 117 +SYSWORDTEMPA_H EQU 118 +SYSWORDTEMPB EQU 121 +SYSWORDTEMPB_H EQU 122 +SYSWORDTEMPX EQU 112 +SYSWORDTEMPX_H EQU 113 +SysByteTempX EQU 112 +SysDivLoop EQU 116 +SysStringA EQU 119 +SysWaitTemp10US EQU 117 +SysWaitTempMS EQU 114 +SysWaitTempMS_H EQU 115 +ADN_PORT EQU 32 +ADREADPORT EQU 33 +DISPCHAR EQU 34 +DISPPORT EQU 35 +DISPTEMP EQU 36 +READAD EQU 37 +READAD_H EQU 38 +SysTemp1 EQU 39 +SysTemp1_H EQU 40 +VALUE EQU 41 + +;******************************************************************************** + +;Vectors + ORG 0 + goto BASPROGRAMSTART + ORG 4 + retfie + +;******************************************************************************** + +;Start of program memory page 0 + ORG 5 +BASPROGRAMSTART +;Call initialisation routines + call INITSYS + call INITSEVENSEG + +;Start of the main program + banksel TRISB + clrf TRISB + bsf TRISA,0 + bcf TRISC,7 +MAIN + banksel ADREADPORT + clrf ADREADPORT + movlw 255 + movwf ADN_PORT + call FN_READAD + movf READAD,W + movwf SysINTEGERTempA + movf READAD_H,W + movwf SysINTEGERTempA_H + movlw 26 + movwf SysINTEGERTempB + clrf SysINTEGERTempB_H + call SysDivSubINT + movf SysINTEGERTempA,W + movwf VALUE + movlw 1 + movwf DISPPORT + movf VALUE,W + movwf DISPCHAR + call DISPLAYVALUE + movlw 10 + movwf SysWaitTempMS + clrf SysWaitTempMS_H + call Delay_MS + goto MAIN +BASPROGRAMEND + sleep + goto BASPROGRAMEND + +;******************************************************************************** + +DISPLAYVALUE + incf DISPCHAR,W + movwf SYSSTRINGA + call SEVENSEGDISPDIGIT + movwf DISPTEMP + bcf PORTB,7 + bcf PORTB,6 + bcf PORTB,5 + bcf PORTB,4 + bcf PORTB,3 + bcf PORTB,2 + bcf PORTB,1 + bcf PORTB,0 + bcf PORTC,7 + decf DISPPORT,W + btfsc STATUS, Z + bsf PORTC,7 + btfsc DISPTEMP,0 + bsf PORTB,7 + btfsc DISPTEMP,1 + bsf PORTB,6 + btfsc DISPTEMP,2 + bsf PORTB,5 + btfsc DISPTEMP,3 + bsf PORTB,4 + btfsc DISPTEMP,4 + bsf PORTB,3 + btfsc DISPTEMP,5 + bsf PORTB,2 + btfsc DISPTEMP,6 + bsf PORTB,1 + btfsc DISPTEMP,7 + bsf PORTB,0 + return + +;******************************************************************************** + +Delay_10US +D10US_START + movlw 12 + movwf DELAYTEMP +DelayUS0 + decfsz DELAYTEMP,F + goto DelayUS0 + decfsz SysWaitTemp10US, F + goto D10US_START + return + +;******************************************************************************** + +Delay_MS + incf SysWaitTempMS_H, F +DMS_START + movlw 108 + movwf DELAYTEMP2 +DMS_OUTER + movlw 11 + movwf DELAYTEMP +DMS_INNER + decfsz DELAYTEMP, F + goto DMS_INNER + decfsz DELAYTEMP2, F + goto DMS_OUTER + decfsz SysWaitTempMS, F + goto DMS_START + decfsz SysWaitTempMS_H, F + goto DMS_START + return + +;******************************************************************************** + +INITSEVENSEG + banksel TRISB + bcf TRISB,7 + bcf TRISB,6 + bcf TRISB,5 + bcf TRISB,4 + bcf TRISB,3 + bcf TRISB,2 + bcf TRISB,1 + bcf TRISB,0 + bcf TRISC,7 + banksel STATUS + return + +;******************************************************************************** + +INITSYS + banksel ADCON1 + bcf ADCON1,ADFM + banksel ADCON0 + bcf ADCON0,ADON + banksel ADCON1 + bcf ADCON1,PCFG3 + bsf ADCON1,PCFG2 + bsf ADCON1,PCFG1 + bcf ADCON1,PCFG0 + movlw 7 + movwf CMCON + banksel PORTA + clrf PORTA + clrf PORTB + clrf PORTC + return + +;******************************************************************************** + +FN_READAD + banksel ADCON1 + bcf ADCON1,PCFG3 + bcf ADCON1,PCFG2 + bcf ADCON1,PCFG1 + bcf ADCON1,PCFG0 + banksel ADCON0 + bcf ADCON0,ADCS1 + bsf ADCON0,ADCS0 + bcf ADCON0,CHS0 + bcf ADCON0,CHS1 + bcf ADCON0,CHS2 + btfsc ADREADPORT,0 + bsf ADCON0,CHS0 + btfsc ADREADPORT,1 + bsf ADCON0,CHS1 + btfsc ADREADPORT,2 + bsf ADCON0,CHS2 + bsf ADCON0,ADON + movlw 2 + movwf SysWaitTemp10US + call Delay_10US + bsf ADCON0,GO_DONE +SysWaitLoop1 + btfsc ADCON0,GO_DONE + goto SysWaitLoop1 + bcf ADCON0,ADON + banksel ADCON1 + bcf ADCON1,PCFG3 + bsf ADCON1,PCFG2 + bsf ADCON1,PCFG1 + bcf ADCON1,PCFG0 + banksel ADRESH + movf ADRESH,W + movwf READAD + clrf READAD_H + return + +;******************************************************************************** + +SEVENSEGDISPDIGIT + movlw 17 + subwf SysStringA, W + btfsc STATUS, C + retlw 0 + movf SysStringA, W + addlw low TableSEVENSEGDISPDIGIT + movwf SysStringA + movlw high TableSEVENSEGDISPDIGIT + btfsc STATUS, C + addlw 1 + movwf PCLATH + movf SysStringA, W + movwf PCL +TableSEVENSEGDISPDIGIT + retlw 16 + retlw 63 + retlw 6 + retlw 91 + retlw 79 + retlw 102 + retlw 109 + retlw 125 + retlw 7 + retlw 127 + retlw 111 + retlw 119 + retlw 124 + retlw 57 + retlw 94 + retlw 121 + retlw 113 + +;******************************************************************************** + +SYSCOMPEQUAL16 + clrf SYSBYTETEMPX + movf SYSWORDTEMPA, W + subwf SYSWORDTEMPB, W + btfss STATUS, Z + return + movf SYSWORDTEMPA_H, W + subwf SYSWORDTEMPB_H, W + btfss STATUS, Z + return + comf SYSBYTETEMPX,F + return + +;******************************************************************************** + +SYSDIVSUB16 + movf SYSWORDTEMPA,W + movwf SYSDIVMULTA + movf SYSWORDTEMPA_H,W + movwf SYSDIVMULTA_H + movf SYSWORDTEMPB,W + movwf SYSDIVMULTB + movf SYSWORDTEMPB_H,W + movwf SYSDIVMULTB_H + clrf SYSDIVMULTX + clrf SYSDIVMULTX_H + movf SYSDIVMULTB,W + movwf SysWORDTempA + movf SYSDIVMULTB_H,W + movwf SysWORDTempA_H + clrf SysWORDTempB + clrf SysWORDTempB_H + call SysCompEqual16 + btfss SysByteTempX,0 + goto ENDIF16 + clrf SYSWORDTEMPA + clrf SYSWORDTEMPA_H + return +ENDIF16 + movlw 16 + movwf SYSDIVLOOP +SYSDIV16START + bcf STATUS,C + rlf SYSDIVMULTA,F + rlf SYSDIVMULTA_H,F + rlf SYSDIVMULTX,F + rlf SYSDIVMULTX_H,F + movf SYSDIVMULTB,W + subwf SYSDIVMULTX,F + movf SYSDIVMULTB_H,W + btfss STATUS,C + addlw 1 + subwf SYSDIVMULTX_H,F + bsf SYSDIVMULTA,0 + btfsc STATUS,C + goto ENDIF17 + bcf SYSDIVMULTA,0 + movf SYSDIVMULTB,W + addwf SYSDIVMULTX,F + movf SYSDIVMULTB_H,W + btfsc STATUS,C + addlw 1 + addwf SYSDIVMULTX_H,F +ENDIF17 + decfsz SYSDIVLOOP, F + goto SYSDIV16START + movf SYSDIVMULTA,W + movwf SYSWORDTEMPA + movf SYSDIVMULTA_H,W + movwf SYSWORDTEMPA_H + movf SYSDIVMULTX,W + movwf SYSWORDTEMPX + movf SYSDIVMULTX_H,W + movwf SYSWORDTEMPX_H + return + +;******************************************************************************** + +SYSDIVSUBINT + movf SYSINTEGERTEMPA_H,W + xorwf SYSINTEGERTEMPB_H,W + movwf SYSSIGNBYTE + btfss SYSINTEGERTEMPA_H,7 + goto ENDIF13 + comf SYSINTEGERTEMPA,F + comf SYSINTEGERTEMPA_H,F + incf SYSINTEGERTEMPA,F + btfsc STATUS,Z + incf SYSINTEGERTEMPA_H,F +ENDIF13 + btfss SYSINTEGERTEMPB_H,7 + goto ENDIF14 + comf SYSINTEGERTEMPB,F + comf SYSINTEGERTEMPB_H,F + incf SYSINTEGERTEMPB,F + btfsc STATUS,Z + incf SYSINTEGERTEMPB_H,F +ENDIF14 + call SYSDIVSUB16 + btfss SYSSIGNBYTE,7 + goto ENDIF15 + comf SYSINTEGERTEMPA,F + comf SYSINTEGERTEMPA_H,F + incf SYSINTEGERTEMPA,F + btfsc STATUS,Z + incf SYSINTEGERTEMPA_H,F + comf SYSINTEGERTEMPX,F + comf SYSINTEGERTEMPX_H,F + incf SYSINTEGERTEMPX,F + btfsc STATUS,Z + incf SYSINTEGERTEMPX_H,F +ENDIF15 + return + +;******************************************************************************** + +;Start of program memory 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+'''The 7 Segment display is connected to connection PORTB7-PORTB0 for segments A-G respectively. +'''The 7 Segment display enable pin connected to PORTC.7. +'''A potentiometer is connected to port A0. +'''@author EvanV plus works of HughC +'''@licence GPL +'''@version 1.0a +'''@date 31.01.2015 +'''******************************************************************************** + +''' Modified by Santiago Gonzalez + + +; ----- Configuration + + #chip 16F876a, 16 + #config HS_OSC, WDT_OFF, LVP_OFF + +; ----- Define Hardware settings + Dir PORTB Out + DIR PORTA.0 In + DIR PORTC.7 Out + +; ----- Constants + ; You need to specify the port settings + #define DISP_COUNT 1 + #define DISP_SEG_A PORTB.7 + #define DISP_SEG_B PORTB.6 + #define DISP_SEG_C PORTB.5 + #define DISP_SEG_D PORTB.4 + #define DISP_SEG_E PORTB.3 + #define DISP_SEG_F PORTB.2 + #define DISP_SEG_G PORTB.1 + #define DISP_SEG_DOT PORTB.0 + #define DISP_SEL_1 PORTC.7 + +; ----- Variables + ' No Variables specified in this example. All byte variables are defined upon use. + + +; ----- Main body of program commences her + + Main: + Value = ReadAD(AN0)/26 + DisplayValue( 1, Value ) + wait 10 ms + goto Main + + + + + + diff --git a/resources/examples/Pic/SevSeg_Pic16F876A/sevseg_Pic16F876A.html b/resources/examples/Pic/SevSeg_Pic16F876A/sevseg_Pic16F876A.html new file mode 100644 index 0000000..b2beb12 --- /dev/null +++ b/resources/examples/Pic/SevSeg_Pic16F876A/sevseg_Pic16F876A.html @@ -0,0 +1,32 @@ + + + +Compilation Report + + +

Compilation Report

+

Compiler Version (DD/MM/YYYY): 0.95 2016-01-24

+

Chip resource usage:

+

Chip Model: 16F876A

+

Program Memory: 290/8192 words (3.54%)

+

RAM: 10/368 bytes (2.72%)

+

RAM Allocation

+ +
+

Subroutines

+ + + + + + + + + + + + + +
NameCode Size (lines)Compiled Size (words)PageOutgoing calls
Main20351SYSDIVSUBINT(1), Delay_MS(1), DISPLAYVALUE(1), READAD(1), INITSYS(1)
READAD40391Delay_10US(1)
INITSEVENSEG48141
DISPLAYVALUE2331
INITSYS478201
SYSDIVSUB1638561SYSCOMPEQUAL16(1)
SYSDIVSUBINT14311SYSDIVSUB16(1)
SYSCOMPEQUAL1634111
Delay_10US071
Delay_MS0141
SEVENSEGDISPDIGIT0301
+ + diff --git a/resources/examples/Pic/SevSeg_Pic16F876A/sevseg_Pic16F876A.lst b/resources/examples/Pic/SevSeg_Pic16F876A/sevseg_Pic16F876A.lst new file mode 100644 index 0000000..7da260d --- /dev/null +++ b/resources/examples/Pic/SevSeg_Pic16F876A/sevseg_Pic16F876A.lst @@ -0,0 +1,1277 @@ +gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 1 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00001 ;Program compiled by Great Cow BASIC (0.95 2016-01-24) + 00002 ;Need help? See the GCBASIC forums at http://sourceforge.net/projects/gcbasic/forums, + 00003 ;check the documentation or email w_cholmondeley at users dot sourceforge dot net. + 00004 + 00005 ;******************************************************************************** + 00006 + 00007 ;Set up the assembler options (Chip type, clock source, other bits and pieces) + 00008 LIST p=16F876A, r=DEC + 00009 #include +Warning[231]: Found lower case match for include filename. + 00001 LIST + 00002 ; P16F876A.INC Standard Header File, Version 1.00 Microchip Technology, Inc. + 00003 NOLIST + 00004 + 00005 ; This header file defines configurations, registers, and other useful bits of + 00006 ; information for the PIC16F877A microcontroller. These names are taken to match + 00007 ; the data sheets as closely as possible. + 00008 + 00009 ; Note that the processor must be selected before this file is + 00010 ; included. The processor may be selected the following ways: + 00011 + 00012 ; 1. Command line switch: + 00013 ; C:\ MPASM MYFILE.ASM /PIC16F876A + 00014 ; 2. LIST directive in the source file + 00015 ; LIST P=PIC16F876A + 00016 ; 3. Processor Type entry in the MPASM full-screen interface + 00017 + 00018 ;========================================================================== + 00019 ; + 00020 ; Revision History + 00021 ; + 00022 ;========================================================================== + 00023 + 00024 ;Rev: Date: Reason: + 00025 ;1.03 11/17/05 Added the INTCON bits TMR0IE and TMR0IF and the ADCON1 bit ADCS2. + 00026 ;1.02 05/28/02 Corrected values for _CP_ALL and _CP_OFF in Configuration Bits section. + 00027 ;1.01 10/03/01 Added the PIR2 bit CMIF and the PIE2 bit CMIE + 00028 ;1.00 04/19/01 Initial Release (BD - generated from PIC16F877.inc) + 00029 + 00030 ;========================================================================== + 00031 ; + 00032 ; Verify Processor + 00033 ; + 00034 ;========================================================================== + 00035 + 00036 IFNDEF __16F876A + 00037 MESSG "Processor-header file mismatch. Verify selected processor." + 00038 ENDIF + 00039 + 00040 ;========================================================================== + 00041 ; + 00042 ; Register Definitions + 00043 ; + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 2 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00044 ;========================================================================== + 00045 + 00000000 00046 W EQU H'0000' + 00000001 00047 F EQU H'0001' + 00048 + 00049 ;----- Register Files------------------------------------------------------ + 00050 + 00000000 00051 INDF EQU H'0000' + 00000001 00052 TMR0 EQU H'0001' + 00000002 00053 PCL EQU H'0002' + 00000003 00054 STATUS EQU H'0003' + 00000004 00055 FSR EQU H'0004' + 00000005 00056 PORTA EQU H'0005' + 00000006 00057 PORTB EQU H'0006' + 00000007 00058 PORTC EQU H'0007' + 0000000A 00059 PCLATH EQU H'000A' + 0000000B 00060 INTCON EQU H'000B' + 0000000C 00061 PIR1 EQU H'000C' + 0000000D 00062 PIR2 EQU H'000D' + 0000000E 00063 TMR1L EQU H'000E' + 0000000F 00064 TMR1H EQU H'000F' + 00000010 00065 T1CON EQU H'0010' + 00000011 00066 TMR2 EQU H'0011' + 00000012 00067 T2CON EQU H'0012' + 00000013 00068 SSPBUF EQU H'0013' + 00000014 00069 SSPCON EQU H'0014' + 00000015 00070 CCPR1L EQU H'0015' + 00000016 00071 CCPR1H EQU H'0016' + 00000017 00072 CCP1CON EQU H'0017' + 00000018 00073 RCSTA EQU H'0018' + 00000019 00074 TXREG EQU H'0019' + 0000001A 00075 RCREG EQU H'001A' + 0000001B 00076 CCPR2L EQU H'001B' + 0000001C 00077 CCPR2H EQU H'001C' + 0000001D 00078 CCP2CON EQU H'001D' + 0000001E 00079 ADRESH EQU H'001E' + 0000001F 00080 ADCON0 EQU H'001F' + 00081 + 00000081 00082 OPTION_REG EQU H'0081' + 00000085 00083 TRISA EQU H'0085' + 00000086 00084 TRISB EQU H'0086' + 00000087 00085 TRISC EQU H'0087' + 0000008C 00086 PIE1 EQU H'008C' + 0000008D 00087 PIE2 EQU H'008D' + 0000008E 00088 PCON EQU H'008E' + 00000091 00089 SSPCON2 EQU H'0091' + 00000092 00090 PR2 EQU H'0092' + 00000093 00091 SSPADD EQU H'0093' + 00000094 00092 SSPSTAT EQU H'0094' + 00000098 00093 TXSTA EQU H'0098' + 00000099 00094 SPBRG EQU H'0099' + 0000009C 00095 CMCON EQU H'009C' + 0000009D 00096 CVRCON EQU H'009D' + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 3 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 0000009E 00097 ADRESL EQU H'009E' + 0000009F 00098 ADCON1 EQU H'009F' + 00099 + 0000010C 00100 EEDATA EQU H'010C' + 0000010D 00101 EEADR EQU H'010D' + 0000010E 00102 EEDATH EQU H'010E' + 0000010F 00103 EEADRH EQU H'010F' + 00104 + 0000018C 00105 EECON1 EQU H'018C' + 0000018D 00106 EECON2 EQU H'018D' + 00107 + 00108 ;----- STATUS Bits -------------------------------------------------------- + 00109 + 00000007 00110 IRP EQU H'0007' + 00000006 00111 RP1 EQU H'0006' + 00000005 00112 RP0 EQU H'0005' + 00000004 00113 NOT_TO EQU H'0004' + 00000003 00114 NOT_PD EQU H'0003' + 00000002 00115 Z EQU H'0002' + 00000001 00116 DC EQU H'0001' + 00000000 00117 C EQU H'0000' + 00118 + 00119 ;----- INTCON Bits -------------------------------------------------------- + 00120 + 00000007 00121 GIE EQU H'0007' + 00000006 00122 PEIE EQU H'0006' + 00000005 00123 T0IE EQU H'0005' + 00000005 00124 TMR0IE EQU H'0005' + 00000004 00125 INTE EQU H'0004' + 00000003 00126 RBIE EQU H'0003' + 00000002 00127 T0IF EQU H'0002' + 00000002 00128 TMR0IF EQU H'0002' + 00000001 00129 INTF EQU H'0001' + 00000000 00130 RBIF EQU H'0000' + 00131 + 00132 ;----- PIR1 Bits ---------------------------------------------------------- + 00133 + 00000006 00134 ADIF EQU H'0006' + 00000005 00135 RCIF EQU H'0005' + 00000004 00136 TXIF EQU H'0004' + 00000003 00137 SSPIF EQU H'0003' + 00000002 00138 CCP1IF EQU H'0002' + 00000001 00139 TMR2IF EQU H'0001' + 00000000 00140 TMR1IF EQU H'0000' + 00141 + 00142 ;----- PIR2 Bits ---------------------------------------------------------- + 00143 + 00000006 00144 CMIF EQU H'0006' + 00000004 00145 EEIF EQU H'0004' + 00000003 00146 BCLIF EQU H'0003' + 00000000 00147 CCP2IF EQU H'0000' + 00148 + 00149 ;----- T1CON Bits --------------------------------------------------------- + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 4 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00150 + 00000005 00151 T1CKPS1 EQU H'0005' + 00000004 00152 T1CKPS0 EQU H'0004' + 00000003 00153 T1OSCEN EQU H'0003' + 00000002 00154 NOT_T1SYNC EQU H'0002' + 00000002 00155 T1INSYNC EQU H'0002' ; Backward compatibility only + 00000002 00156 T1SYNC EQU H'0002' + 00000001 00157 TMR1CS EQU H'0001' + 00000000 00158 TMR1ON EQU H'0000' + 00159 + 00160 ;----- T2CON Bits --------------------------------------------------------- + 00161 + 00000006 00162 TOUTPS3 EQU H'0006' + 00000005 00163 TOUTPS2 EQU H'0005' + 00000004 00164 TOUTPS1 EQU H'0004' + 00000003 00165 TOUTPS0 EQU H'0003' + 00000002 00166 TMR2ON EQU H'0002' + 00000001 00167 T2CKPS1 EQU H'0001' + 00000000 00168 T2CKPS0 EQU H'0000' + 00169 + 00170 ;----- SSPCON Bits -------------------------------------------------------- + 00171 + 00000007 00172 WCOL EQU H'0007' + 00000006 00173 SSPOV EQU H'0006' + 00000005 00174 SSPEN EQU H'0005' + 00000004 00175 CKP EQU H'0004' + 00000003 00176 SSPM3 EQU H'0003' + 00000002 00177 SSPM2 EQU H'0002' + 00000001 00178 SSPM1 EQU H'0001' + 00000000 00179 SSPM0 EQU H'0000' + 00180 + 00181 ;----- CCP1CON Bits ------------------------------------------------------- + 00182 + 00000005 00183 CCP1X EQU H'0005' + 00000004 00184 CCP1Y EQU H'0004' + 00000003 00185 CCP1M3 EQU H'0003' + 00000002 00186 CCP1M2 EQU H'0002' + 00000001 00187 CCP1M1 EQU H'0001' + 00000000 00188 CCP1M0 EQU H'0000' + 00189 + 00190 ;----- RCSTA Bits --------------------------------------------------------- + 00191 + 00000007 00192 SPEN EQU H'0007' + 00000006 00193 RX9 EQU H'0006' + 00000006 00194 RC9 EQU H'0006' ; Backward compatibility only + 00000006 00195 NOT_RC8 EQU H'0006' ; Backward compatibility only + 00000006 00196 RC8_9 EQU H'0006' ; Backward compatibility only + 00000005 00197 SREN EQU H'0005' + 00000004 00198 CREN EQU H'0004' + 00000003 00199 ADDEN EQU H'0003' + 00000002 00200 FERR EQU H'0002' + 00000001 00201 OERR EQU H'0001' + 00000000 00202 RX9D EQU H'0000' + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 5 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00000000 00203 RCD8 EQU H'0000' ; Backward compatibility only + 00204 + 00205 ;----- CCP2CON Bits ------------------------------------------------------- + 00206 + 00000005 00207 CCP2X EQU H'0005' + 00000004 00208 CCP2Y EQU H'0004' + 00000003 00209 CCP2M3 EQU H'0003' + 00000002 00210 CCP2M2 EQU H'0002' + 00000001 00211 CCP2M1 EQU H'0001' + 00000000 00212 CCP2M0 EQU H'0000' + 00213 + 00214 ;----- ADCON0 Bits -------------------------------------------------------- + 00215 + 00000007 00216 ADCS1 EQU H'0007' + 00000006 00217 ADCS0 EQU H'0006' + 00000005 00218 CHS2 EQU H'0005' + 00000004 00219 CHS1 EQU H'0004' + 00000003 00220 CHS0 EQU H'0003' + 00000002 00221 GO EQU H'0002' + 00000002 00222 NOT_DONE EQU H'0002' + 00000002 00223 GO_DONE EQU H'0002' + 00000000 00224 ADON EQU H'0000' + 00225 + 00226 ;----- OPTION_REG Bits ----------------------------------------------------- + 00227 + 00000007 00228 NOT_RBPU EQU H'0007' + 00000006 00229 INTEDG EQU H'0006' + 00000005 00230 T0CS EQU H'0005' + 00000004 00231 T0SE EQU H'0004' + 00000003 00232 PSA EQU H'0003' + 00000002 00233 PS2 EQU H'0002' + 00000001 00234 PS1 EQU H'0001' + 00000000 00235 PS0 EQU H'0000' + 00236 + 00237 ;----- PIE1 Bits ---------------------------------------------------------- + 00238 + 00000006 00239 ADIE EQU H'0006' + 00000005 00240 RCIE EQU H'0005' + 00000004 00241 TXIE EQU H'0004' + 00000003 00242 SSPIE EQU H'0003' + 00000002 00243 CCP1IE EQU H'0002' + 00000001 00244 TMR2IE EQU H'0001' + 00000000 00245 TMR1IE EQU H'0000' + 00246 + 00247 ;----- PIE2 Bits ---------------------------------------------------------- + 00248 + 00000006 00249 CMIE EQU H'0006' + 00000004 00250 EEIE EQU H'0004' + 00000003 00251 BCLIE EQU H'0003' + 00000000 00252 CCP2IE EQU H'0000' + 00253 + 00254 ;----- PCON Bits ---------------------------------------------------------- + 00255 + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 6 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00000001 00256 NOT_POR EQU H'0001' + 00000000 00257 NOT_BO EQU H'0000' + 00000000 00258 NOT_BOR EQU H'0000' + 00259 + 00260 ;----- SSPCON2 Bits -------------------------------------------------------- + 00261 + 00000007 00262 GCEN EQU H'0007' + 00000006 00263 ACKSTAT EQU H'0006' + 00000005 00264 ACKDT EQU H'0005' + 00000004 00265 ACKEN EQU H'0004' + 00000003 00266 RCEN EQU H'0003' + 00000002 00267 PEN EQU H'0002' + 00000001 00268 RSEN EQU H'0001' + 00000000 00269 SEN EQU H'0000' + 00270 + 00271 ;----- SSPSTAT Bits ------------------------------------------------------- + 00272 + 00000007 00273 SMP EQU H'0007' + 00000006 00274 CKE EQU H'0006' + 00000005 00275 D EQU H'0005' + 00000005 00276 I2C_DATA EQU H'0005' + 00000005 00277 NOT_A EQU H'0005' + 00000005 00278 NOT_ADDRESS EQU H'0005' + 00000005 00279 D_A EQU H'0005' + 00000005 00280 DATA_ADDRESS EQU H'0005' + 00000004 00281 P EQU H'0004' + 00000004 00282 I2C_STOP EQU H'0004' + 00000003 00283 S EQU H'0003' + 00000003 00284 I2C_START EQU H'0003' + 00000002 00285 R EQU H'0002' + 00000002 00286 I2C_READ EQU H'0002' + 00000002 00287 NOT_W EQU H'0002' + 00000002 00288 NOT_WRITE EQU H'0002' + 00000002 00289 R_W EQU H'0002' + 00000002 00290 READ_WRITE EQU H'0002' + 00000001 00291 UA EQU H'0001' + 00000000 00292 BF EQU H'0000' + 00293 + 00294 ;----- TXSTA Bits --------------------------------------------------------- + 00295 + 00000007 00296 CSRC EQU H'0007' + 00000006 00297 TX9 EQU H'0006' + 00000006 00298 NOT_TX8 EQU H'0006' ; Backward compatibility only + 00000006 00299 TX8_9 EQU H'0006' ; Backward compatibility only + 00000005 00300 TXEN EQU H'0005' + 00000004 00301 SYNC EQU H'0004' + 00000002 00302 BRGH EQU H'0002' + 00000001 00303 TRMT EQU H'0001' + 00000000 00304 TX9D EQU H'0000' + 00000000 00305 TXD8 EQU H'0000' ; Backward compatibility only + 00306 + 00307 + 00308 ;----- CMCON Bits --------------------------------------------------------- + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 7 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00000007 00309 C2OUT EQU H'0007' + 00000006 00310 C1OUT EQU H'0006' + 00000005 00311 C2INV EQU H'0005' + 00000004 00312 C1INV EQU H'0004' + 00000003 00313 CIS EQU H'0003' + 00000002 00314 CM2 EQU H'0002' + 00000001 00315 CM1 EQU H'0001' + 00000000 00316 CM0 EQU H'0000' + 00317 + 00318 ;----- CVRCON Bits -------------------------------------------------------- + 00000007 00319 CVREN EQU H'0007' + 00000006 00320 CVROE EQU H'0006' + 00000005 00321 CVRR EQU H'0005' + 00000003 00322 CVR3 EQU H'0003' + 00000002 00323 CVR2 EQU H'0002' + 00000001 00324 CVR1 EQU H'0001' + 00000000 00325 CVR0 EQU H'0000' + 00326 + 00327 ;----- ADCON1 Bits -------------------------------------------------------- + 00328 + 00000007 00329 ADFM EQU H'0007' + 00000006 00330 ADCS2 EQU H'0006' + 00000003 00331 PCFG3 EQU H'0003' + 00000002 00332 PCFG2 EQU H'0002' + 00000001 00333 PCFG1 EQU H'0001' + 00000000 00334 PCFG0 EQU H'0000' + 00335 + 00336 ;----- EECON1 Bits -------------------------------------------------------- + 00337 + 00000007 00338 EEPGD EQU H'0007' + 00000003 00339 WRERR EQU H'0003' + 00000002 00340 WREN EQU H'0002' + 00000001 00341 WR EQU H'0001' + 00000000 00342 RD EQU H'0000' + 00343 + 00344 ;========================================================================== + 00345 ; + 00346 ; RAM Definition + 00347 ; + 00348 ;========================================================================== + 00349 + 000001FF 00350 __MAXRAM H'1FF' + 00351 __BADRAM H'8F'-H'90', H'95'-H'97', H'9A'-H'9B' + 00352 __BADRAM H'105', H'107'-H'109' + 00353 __BADRAM H'185', H'187'-H'189', H'18E'-H'18F' + 00354 + 00355 ;========================================================================== + 00356 ; + 00357 ; Configuration Bits + 00358 ; + 00359 ;========================================================================== + 00360 + 00001FFF 00361 _CP_ALL EQU H'1FFF' + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 8 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00003FFF 00362 _CP_OFF EQU H'3FFF' + 00003FFF 00363 _DEBUG_OFF EQU H'3FFF' + 000037FF 00364 _DEBUG_ON EQU H'37FF' + 00003FFF 00365 _WRT_OFF EQU H'3FFF' ; No prog memmory write protection + 00003DFF 00366 _WRT_256 EQU H'3DFF' ; First 256 prog memmory write protected + 00003BFF 00367 _WRT_1FOURTH EQU H'3BFF' ; First quarter prog memmory write protected + 000039FF 00368 _WRT_HALF EQU H'39FF' ; First half memmory write protected + 00003FFF 00369 _CPD_OFF EQU H'3FFF' + 00003EFF 00370 _CPD_ON EQU H'3EFF' + 00003FFF 00371 _LVP_ON EQU H'3FFF' + 00003F7F 00372 _LVP_OFF EQU H'3F7F' + 00003FFF 00373 _BODEN_ON EQU H'3FFF' + 00003FBF 00374 _BODEN_OFF EQU H'3FBF' + 00003FFF 00375 _PWRTE_OFF EQU H'3FFF' + 00003FF7 00376 _PWRTE_ON EQU H'3FF7' + 00003FFF 00377 _WDT_ON EQU H'3FFF' + 00003FFB 00378 _WDT_OFF EQU H'3FFB' + 00003FFF 00379 _RC_OSC EQU H'3FFF' + 00003FFE 00380 _HS_OSC EQU H'3FFE' + 00003FFD 00381 _XT_OSC EQU H'3FFD' + 00003FFC 00382 _LP_OSC EQU H'3FFC' + 00383 + 00384 LIST +2007 3F7A 00010 __CONFIG _HS_OSC & _WDT_OFF & _LVP_OFF + 00011 + 00012 ;******************************************************************************** + 00013 + 00014 ;Set aside memory locations for variables + 00000070 00015 DELAYTEMP EQU 112 + 00000071 00016 DELAYTEMP2 EQU 113 + 00000077 00017 SYSDIVMULTA EQU 119 + 00000078 00018 SYSDIVMULTA_H EQU 120 + 0000007B 00019 SYSDIVMULTB EQU 123 + 0000007C 00020 SYSDIVMULTB_H EQU 124 + 00000072 00021 SYSDIVMULTX EQU 114 + 00000073 00022 SYSDIVMULTX_H EQU 115 + 00000075 00023 SYSINTEGERTEMPA EQU 117 + 00000076 00024 SYSINTEGERTEMPA_H EQU 118 + 00000079 00025 SYSINTEGERTEMPB EQU 121 + 0000007A 00026 SYSINTEGERTEMPB_H EQU 122 + 00000070 00027 SYSINTEGERTEMPX EQU 112 + 00000071 00028 SYSINTEGERTEMPX_H EQU 113 + 0000007D 00029 SYSSIGNBYTE EQU 125 + 00000075 00030 SYSWORDTEMPA EQU 117 + 00000076 00031 SYSWORDTEMPA_H EQU 118 + 00000079 00032 SYSWORDTEMPB EQU 121 + 0000007A 00033 SYSWORDTEMPB_H EQU 122 + 00000070 00034 SYSWORDTEMPX EQU 112 + 00000071 00035 SYSWORDTEMPX_H EQU 113 + 00000070 00036 SysByteTempX EQU 112 + 00000074 00037 SysDivLoop EQU 116 + 00000077 00038 SysStringA EQU 119 + 00000075 00039 SysWaitTemp10US EQU 117 + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 9 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00000072 00040 SysWaitTempMS EQU 114 + 00000073 00041 SysWaitTempMS_H EQU 115 + 00000020 00042 ADN_PORT EQU 32 + 00000021 00043 ADREADPORT EQU 33 + 00000022 00044 DISPCHAR EQU 34 + 00000023 00045 DISPPORT EQU 35 + 00000024 00046 DISPTEMP EQU 36 + 00000025 00047 READAD EQU 37 + 00000026 00048 READAD_H EQU 38 + 00000027 00049 SysTemp1 EQU 39 + 00000028 00050 SysTemp1_H EQU 40 + 00000029 00051 VALUE EQU 41 + 00052 + 00053 ;******************************************************************************** + 00054 + 00055 ;Vectors +0000 00056 ORG 0 +0000 2805 00057 goto BASPROGRAMSTART +0004 00058 ORG 4 +0004 0009 00059 retfie + 00060 + 00061 ;******************************************************************************** + 00062 + 00063 ;Start of program memory page 0 +0005 00064 ORG 5 +0005 00065 BASPROGRAMSTART + 00066 ;Call initialisation routines +0005 206C 00067 call INITSYS +0006 205E 00068 call INITSEVENSEG + 00069 + 00070 ;Start of the main program +0007 1683 1303 00071 banksel TRISB +0009 0186 00072 clrf TRISB +000A 1405 00073 bsf TRISA,0 +000B 1387 00074 bcf TRISC,7 +000C 00075 MAIN +000C 1283 1303 00076 banksel ADREADPORT +000E 01A1 00077 clrf ADREADPORT +000F 30FF 00078 movlw 255 +0010 00A0 00079 movwf ADN_PORT +0011 2080 00080 call FN_READAD +0012 0825 00081 movf READAD,W +0013 00F5 00082 movwf SysINTEGERTempA +0014 0826 00083 movf READAD_H,W +0015 00F6 00084 movwf SysINTEGERTempA_H +0016 301A 00085 movlw 26 +0017 00F9 00086 movwf SysINTEGERTempB +0018 01FA 00087 clrf SysINTEGERTempB_H +0019 2108 00088 call SysDivSubINT +001A 0875 00089 movf SysINTEGERTempA,W +001B 00A9 00090 movwf VALUE +001C 3001 00091 movlw 1 +001D 00A3 00092 movwf DISPPORT + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 10 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +001E 0829 00093 movf VALUE,W +001F 00A2 00094 movwf DISPCHAR +0020 2028 00095 call DISPLAYVALUE +0021 300A 00096 movlw 10 +0022 00F2 00097 movwf SysWaitTempMS +0023 01F3 00098 clrf SysWaitTempMS_H +0024 2050 00099 call Delay_MS +0025 280C 00100 goto MAIN +0026 00101 BASPROGRAMEND +0026 0063 00102 sleep +0027 2826 00103 goto BASPROGRAMEND + 00104 + 00105 ;******************************************************************************** + 00106 +0028 00107 DISPLAYVALUE +0028 0A22 00108 incf DISPCHAR,W +0029 00F7 00109 movwf SYSSTRINGA +002A 20A7 00110 call SEVENSEGDISPDIGIT +002B 00A4 00111 movwf DISPTEMP +002C 1386 00112 bcf PORTB,7 +002D 1306 00113 bcf PORTB,6 +002E 1286 00114 bcf PORTB,5 +002F 1206 00115 bcf PORTB,4 +0030 1186 00116 bcf PORTB,3 +0031 1106 00117 bcf PORTB,2 +0032 1086 00118 bcf PORTB,1 +0033 1006 00119 bcf PORTB,0 +0034 1387 00120 bcf PORTC,7 +0035 0323 00121 decf DISPPORT,W +0036 1903 00122 btfsc STATUS, Z +0037 1787 00123 bsf PORTC,7 +0038 1824 00124 btfsc DISPTEMP,0 +0039 1786 00125 bsf PORTB,7 +003A 18A4 00126 btfsc DISPTEMP,1 +003B 1706 00127 bsf PORTB,6 +003C 1924 00128 btfsc DISPTEMP,2 +003D 1686 00129 bsf PORTB,5 +003E 19A4 00130 btfsc DISPTEMP,3 +003F 1606 00131 bsf PORTB,4 +0040 1A24 00132 btfsc DISPTEMP,4 +0041 1586 00133 bsf PORTB,3 +0042 1AA4 00134 btfsc DISPTEMP,5 +0043 1506 00135 bsf PORTB,2 +0044 1B24 00136 btfsc DISPTEMP,6 +0045 1486 00137 bsf PORTB,1 +0046 1BA4 00138 btfsc DISPTEMP,7 +0047 1406 00139 bsf PORTB,0 +0048 0008 00140 return + 00141 + 00142 ;******************************************************************************** + 00143 +0049 00144 Delay_10US +0049 00145 D10US_START + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 11 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +0049 300C 00146 movlw 12 +004A 00F0 00147 movwf DELAYTEMP +004B 00148 DelayUS0 +004B 0BF0 00149 decfsz DELAYTEMP,F +004C 284B 00150 goto DelayUS0 +004D 0BF5 00151 decfsz SysWaitTemp10US, F +004E 2849 00152 goto D10US_START +004F 0008 00153 return + 00154 + 00155 ;******************************************************************************** + 00156 +0050 00157 Delay_MS +0050 0AF3 00158 incf SysWaitTempMS_H, F +0051 00159 DMS_START +0051 306C 00160 movlw 108 +0052 00F1 00161 movwf DELAYTEMP2 +0053 00162 DMS_OUTER +0053 300B 00163 movlw 11 +0054 00F0 00164 movwf DELAYTEMP +0055 00165 DMS_INNER +0055 0BF0 00166 decfsz DELAYTEMP, F +0056 2855 00167 goto DMS_INNER +0057 0BF1 00168 decfsz DELAYTEMP2, F +0058 2853 00169 goto DMS_OUTER +0059 0BF2 00170 decfsz SysWaitTempMS, F +005A 2851 00171 goto DMS_START +005B 0BF3 00172 decfsz SysWaitTempMS_H, F +005C 2851 00173 goto DMS_START +005D 0008 00174 return + 00175 + 00176 ;******************************************************************************** + 00177 +005E 00178 INITSEVENSEG +005E 1683 1303 00179 banksel TRISB +0060 1386 00180 bcf TRISB,7 +0061 1306 00181 bcf TRISB,6 +0062 1286 00182 bcf TRISB,5 +0063 1206 00183 bcf TRISB,4 +0064 1186 00184 bcf TRISB,3 +0065 1106 00185 bcf TRISB,2 +0066 1086 00186 bcf TRISB,1 +0067 1006 00187 bcf TRISB,0 +0068 1387 00188 bcf TRISC,7 +0069 1283 1303 00189 banksel STATUS +006B 0008 00190 return + 00191 + 00192 ;******************************************************************************** + 00193 +006C 00194 INITSYS +006C 1683 1303 00195 banksel ADCON1 +006E 139F 00196 bcf ADCON1,ADFM +006F 1283 1303 00197 banksel ADCON0 +0071 101F 00198 bcf ADCON0,ADON + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 12 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +0072 1683 1303 00199 banksel ADCON1 +0074 119F 00200 bcf ADCON1,PCFG3 +0075 151F 00201 bsf ADCON1,PCFG2 +0076 149F 00202 bsf ADCON1,PCFG1 +0077 101F 00203 bcf ADCON1,PCFG0 +0078 3007 00204 movlw 7 +0079 009C 00205 movwf CMCON +007A 1283 1303 00206 banksel PORTA +007C 0185 00207 clrf PORTA +007D 0186 00208 clrf PORTB +007E 0187 00209 clrf PORTC +007F 0008 00210 return + 00211 + 00212 ;******************************************************************************** + 00213 +0080 00214 FN_READAD +0080 1683 1303 00215 banksel ADCON1 +0082 119F 00216 bcf ADCON1,PCFG3 +0083 111F 00217 bcf ADCON1,PCFG2 +0084 109F 00218 bcf ADCON1,PCFG1 +0085 101F 00219 bcf ADCON1,PCFG0 +0086 1283 1303 00220 banksel ADCON0 +0088 139F 00221 bcf ADCON0,ADCS1 +0089 171F 00222 bsf ADCON0,ADCS0 +008A 119F 00223 bcf ADCON0,CHS0 +008B 121F 00224 bcf ADCON0,CHS1 +008C 129F 00225 bcf ADCON0,CHS2 +008D 1821 00226 btfsc ADREADPORT,0 +008E 159F 00227 bsf ADCON0,CHS0 +008F 18A1 00228 btfsc ADREADPORT,1 +0090 161F 00229 bsf ADCON0,CHS1 +0091 1921 00230 btfsc ADREADPORT,2 +0092 169F 00231 bsf ADCON0,CHS2 +0093 141F 00232 bsf ADCON0,ADON +0094 3002 00233 movlw 2 +0095 00F5 00234 movwf SysWaitTemp10US +0096 2049 00235 call Delay_10US +0097 151F 00236 bsf ADCON0,GO_DONE +0098 00237 SysWaitLoop1 +0098 191F 00238 btfsc ADCON0,GO_DONE +0099 2898 00239 goto SysWaitLoop1 +009A 101F 00240 bcf ADCON0,ADON +009B 1683 1303 00241 banksel ADCON1 +009D 119F 00242 bcf ADCON1,PCFG3 +009E 151F 00243 bsf ADCON1,PCFG2 +009F 149F 00244 bsf ADCON1,PCFG1 +00A0 101F 00245 bcf ADCON1,PCFG0 +00A1 1283 1303 00246 banksel ADRESH +00A3 081E 00247 movf ADRESH,W +00A4 00A5 00248 movwf READAD +00A5 01A6 00249 clrf READAD_H +00A6 0008 00250 return + 00251 + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 13 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00252 ;******************************************************************************** + 00253 +00A7 00254 SEVENSEGDISPDIGIT +00A7 3011 00255 movlw 17 +00A8 0277 00256 subwf SysStringA, W +00A9 1803 00257 btfsc STATUS, C +00AA 3400 00258 retlw 0 +00AB 0877 00259 movf SysStringA, W +00AC 3EB4 00260 addlw low TableSEVENSEGDISPDIGIT +00AD 00F7 00261 movwf SysStringA +00AE 3000 00262 movlw high TableSEVENSEGDISPDIGIT +00AF 1803 00263 btfsc STATUS, C +00B0 3E01 00264 addlw 1 +00B1 008A 00265 movwf PCLATH +00B2 0877 00266 movf SysStringA, W +00B3 0082 00267 movwf PCL +00B4 00268 TableSEVENSEGDISPDIGIT +00B4 3410 00269 retlw 16 +00B5 343F 00270 retlw 63 +00B6 3406 00271 retlw 6 +00B7 345B 00272 retlw 91 +00B8 344F 00273 retlw 79 +00B9 3466 00274 retlw 102 +00BA 346D 00275 retlw 109 +00BB 347D 00276 retlw 125 +00BC 3407 00277 retlw 7 +00BD 347F 00278 retlw 127 +00BE 346F 00279 retlw 111 +00BF 3477 00280 retlw 119 +00C0 347C 00281 retlw 124 +00C1 3439 00282 retlw 57 +00C2 345E 00283 retlw 94 +00C3 3479 00284 retlw 121 +00C4 3471 00285 retlw 113 + 00286 + 00287 ;******************************************************************************** + 00288 +00C5 00289 SYSCOMPEQUAL16 +00C5 01F0 00290 clrf SYSBYTETEMPX +00C6 0875 00291 movf SYSWORDTEMPA, W +00C7 0279 00292 subwf SYSWORDTEMPB, W +00C8 1D03 00293 btfss STATUS, Z +00C9 0008 00294 return +00CA 0876 00295 movf SYSWORDTEMPA_H, W +00CB 027A 00296 subwf SYSWORDTEMPB_H, W +00CC 1D03 00297 btfss STATUS, Z +00CD 0008 00298 return +00CE 09F0 00299 comf SYSBYTETEMPX,F +00CF 0008 00300 return + 00301 + 00302 ;******************************************************************************** + 00303 +00D0 00304 SYSDIVSUB16 + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 14 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +00D0 0875 00305 movf SYSWORDTEMPA,W +00D1 00F7 00306 movwf SYSDIVMULTA +00D2 0876 00307 movf SYSWORDTEMPA_H,W +00D3 00F8 00308 movwf SYSDIVMULTA_H +00D4 0879 00309 movf SYSWORDTEMPB,W +00D5 00FB 00310 movwf SYSDIVMULTB +00D6 087A 00311 movf SYSWORDTEMPB_H,W +00D7 00FC 00312 movwf SYSDIVMULTB_H +00D8 01F2 00313 clrf SYSDIVMULTX +00D9 01F3 00314 clrf SYSDIVMULTX_H +00DA 087B 00315 movf SYSDIVMULTB,W +00DB 00F5 00316 movwf SysWORDTempA +00DC 087C 00317 movf SYSDIVMULTB_H,W +00DD 00F6 00318 movwf SysWORDTempA_H +00DE 01F9 00319 clrf SysWORDTempB +00DF 01FA 00320 clrf SysWORDTempB_H +00E0 20C5 00321 call SysCompEqual16 +00E1 1C70 00322 btfss SysByteTempX,0 +00E2 28E6 00323 goto ENDIF16 +00E3 01F5 00324 clrf SYSWORDTEMPA +00E4 01F6 00325 clrf SYSWORDTEMPA_H +00E5 0008 00326 return +00E6 00327 ENDIF16 +00E6 3010 00328 movlw 16 +00E7 00F4 00329 movwf SYSDIVLOOP +00E8 00330 SYSDIV16START +00E8 1003 00331 bcf STATUS,C +00E9 0DF7 00332 rlf SYSDIVMULTA,F +00EA 0DF8 00333 rlf SYSDIVMULTA_H,F +00EB 0DF2 00334 rlf SYSDIVMULTX,F +00EC 0DF3 00335 rlf SYSDIVMULTX_H,F +00ED 087B 00336 movf SYSDIVMULTB,W +00EE 02F2 00337 subwf SYSDIVMULTX,F +00EF 087C 00338 movf SYSDIVMULTB_H,W +00F0 1C03 00339 btfss STATUS,C +00F1 3E01 00340 addlw 1 +00F2 02F3 00341 subwf SYSDIVMULTX_H,F +00F3 1477 00342 bsf SYSDIVMULTA,0 +00F4 1803 00343 btfsc STATUS,C +00F5 28FD 00344 goto ENDIF17 +00F6 1077 00345 bcf SYSDIVMULTA,0 +00F7 087B 00346 movf SYSDIVMULTB,W +00F8 07F2 00347 addwf SYSDIVMULTX,F +00F9 087C 00348 movf SYSDIVMULTB_H,W +00FA 1803 00349 btfsc STATUS,C +00FB 3E01 00350 addlw 1 +00FC 07F3 00351 addwf SYSDIVMULTX_H,F +00FD 00352 ENDIF17 +00FD 0BF4 00353 decfsz SYSDIVLOOP, F +00FE 28E8 00354 goto SYSDIV16START +00FF 0877 00355 movf SYSDIVMULTA,W +0100 00F5 00356 movwf SYSWORDTEMPA +0101 0878 00357 movf SYSDIVMULTA_H,W + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 15 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +0102 00F6 00358 movwf SYSWORDTEMPA_H +0103 0872 00359 movf SYSDIVMULTX,W +0104 00F0 00360 movwf SYSWORDTEMPX +0105 0873 00361 movf SYSDIVMULTX_H,W +0106 00F1 00362 movwf SYSWORDTEMPX_H +0107 0008 00363 return + 00364 + 00365 ;******************************************************************************** + 00366 +0108 00367 SYSDIVSUBINT +0108 0876 00368 movf SYSINTEGERTEMPA_H,W +0109 067A 00369 xorwf SYSINTEGERTEMPB_H,W +010A 00FD 00370 movwf SYSSIGNBYTE +010B 1FF6 00371 btfss SYSINTEGERTEMPA_H,7 +010C 2912 00372 goto ENDIF13 +010D 09F5 00373 comf SYSINTEGERTEMPA,F +010E 09F6 00374 comf SYSINTEGERTEMPA_H,F +010F 0AF5 00375 incf SYSINTEGERTEMPA,F +0110 1903 00376 btfsc STATUS,Z +0111 0AF6 00377 incf SYSINTEGERTEMPA_H,F +0112 00378 ENDIF13 +0112 1FFA 00379 btfss SYSINTEGERTEMPB_H,7 +0113 2919 00380 goto ENDIF14 +0114 09F9 00381 comf SYSINTEGERTEMPB,F +0115 09FA 00382 comf SYSINTEGERTEMPB_H,F +0116 0AF9 00383 incf SYSINTEGERTEMPB,F +0117 1903 00384 btfsc STATUS,Z +0118 0AFA 00385 incf SYSINTEGERTEMPB_H,F +0119 00386 ENDIF14 +0119 20D0 00387 call SYSDIVSUB16 +011A 1FFD 00388 btfss SYSSIGNBYTE,7 +011B 2926 00389 goto ENDIF15 +011C 09F5 00390 comf SYSINTEGERTEMPA,F +011D 09F6 00391 comf SYSINTEGERTEMPA_H,F +011E 0AF5 00392 incf SYSINTEGERTEMPA,F +011F 1903 00393 btfsc STATUS,Z +0120 0AF6 00394 incf SYSINTEGERTEMPA_H,F +0121 09F0 00395 comf SYSINTEGERTEMPX,F +0122 09F1 00396 comf SYSINTEGERTEMPX_H,F +0123 0AF0 00397 incf SYSINTEGERTEMPX,F +0124 1903 00398 btfsc STATUS,Z +0125 0AF1 00399 incf SYSINTEGERTEMPX_H,F +0126 00400 ENDIF15 +0126 0008 00401 return + 00402 + 00403 ;******************************************************************************** + 00404 + 00405 ;Start of program memory page 1 +0800 00406 ORG 2048 + 00407 ;Start of program memory page 2 +1000 00408 ORG 4096 + 00409 ;Start of program memory page 3 +1800 00410 ORG 6144 + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 16 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00411 + 00412 END + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 17 + + +SYMBOL TABLE + LABEL VALUE + +ACKDT 00000005 +ACKEN 00000004 +ACKSTAT 00000006 +ADCON0 0000001F +ADCON1 0000009F +ADCS0 00000006 +ADCS1 00000007 +ADCS2 00000006 +ADDEN 00000003 +ADFM 00000007 +ADIE 00000006 +ADIF 00000006 +ADN_PORT 00000020 +ADON 00000000 +ADREADPORT 00000021 +ADRESH 0000001E +ADRESL 0000009E +BASPROGRAMEND 00000026 +BASPROGRAMSTART 00000005 +BCLIE 00000003 +BCLIF 00000003 +BF 00000000 +BRGH 00000002 +C 00000000 +C1INV 00000004 +C1OUT 00000006 +C2INV 00000005 +C2OUT 00000007 +CCP1CON 00000017 +CCP1IE 00000002 +CCP1IF 00000002 +CCP1M0 00000000 +CCP1M1 00000001 +CCP1M2 00000002 +CCP1M3 00000003 +CCP1X 00000005 +CCP1Y 00000004 +CCP2CON 0000001D +CCP2IE 00000000 +CCP2IF 00000000 +CCP2M0 00000000 +CCP2M1 00000001 +CCP2M2 00000002 +CCP2M3 00000003 +CCP2X 00000005 +CCP2Y 00000004 +CCPR1H 00000016 +CCPR1L 00000015 +CCPR2H 0000001C +CCPR2L 0000001B +CHS0 00000003 +CHS1 00000004 +CHS2 00000005 + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 18 + + +SYMBOL TABLE + LABEL VALUE + +CIS 00000003 +CKE 00000006 +CKP 00000004 +CM0 00000000 +CM1 00000001 +CM2 00000002 +CMCON 0000009C +CMIE 00000006 +CMIF 00000006 +CREN 00000004 +CSRC 00000007 +CVR0 00000000 +CVR1 00000001 +CVR2 00000002 +CVR3 00000003 +CVRCON 0000009D +CVREN 00000007 +CVROE 00000006 +CVRR 00000005 +D 00000005 +D10US_START 00000049 +DATA_ADDRESS 00000005 +DC 00000001 +DELAYTEMP 00000070 +DELAYTEMP2 00000071 +DISPCHAR 00000022 +DISPLAYVALUE 00000028 +DISPPORT 00000023 +DISPTEMP 00000024 +DMS_INNER 00000055 +DMS_OUTER 00000053 +DMS_START 00000051 +D_A 00000005 +DelayUS0 0000004B +Delay_10US 00000049 +Delay_MS 00000050 +EEADR 0000010D +EEADRH 0000010F +EECON1 0000018C +EECON2 0000018D +EEDATA 0000010C +EEDATH 0000010E +EEIE 00000004 +EEIF 00000004 +EEPGD 00000007 +ENDIF13 00000112 +ENDIF14 00000119 +ENDIF15 00000126 +ENDIF16 000000E6 +ENDIF17 000000FD +F 00000001 +FERR 00000002 +FN_READAD 00000080 + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 19 + + +SYMBOL TABLE + LABEL VALUE + +FSR 00000004 +GCEN 00000007 +GIE 00000007 +GO 00000002 +GO_DONE 00000002 +I2C_DATA 00000005 +I2C_READ 00000002 +I2C_START 00000003 +I2C_STOP 00000004 +INDF 00000000 +INITSEVENSEG 0000005E +INITSYS 0000006C +INTCON 0000000B +INTE 00000004 +INTEDG 00000006 +INTF 00000001 +IRP 00000007 +MAIN 0000000C +NOT_A 00000005 +NOT_ADDRESS 00000005 +NOT_BO 00000000 +NOT_BOR 00000000 +NOT_DONE 00000002 +NOT_PD 00000003 +NOT_POR 00000001 +NOT_RBPU 00000007 +NOT_RC8 00000006 +NOT_T1SYNC 00000002 +NOT_TO 00000004 +NOT_TX8 00000006 +NOT_W 00000002 +NOT_WRITE 00000002 +OERR 00000001 +OPTION_REG 00000081 +P 00000004 +PCFG0 00000000 +PCFG1 00000001 +PCFG2 00000002 +PCFG3 00000003 +PCL 00000002 +PCLATH 0000000A +PCON 0000008E +PEIE 00000006 +PEN 00000002 +PIE1 0000008C +PIE2 0000008D +PIR1 0000000C +PIR2 0000000D +PORTA 00000005 +PORTB 00000006 +PORTC 00000007 +PR2 00000092 +PS0 00000000 + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 20 + + +SYMBOL TABLE + LABEL VALUE + +PS1 00000001 +PS2 00000002 +PSA 00000003 +R 00000002 +RBIE 00000003 +RBIF 00000000 +RC8_9 00000006 +RC9 00000006 +RCD8 00000000 +RCEN 00000003 +RCIE 00000005 +RCIF 00000005 +RCREG 0000001A +RCSTA 00000018 +RD 00000000 +READAD 00000025 +READAD_H 00000026 +READ_WRITE 00000002 +RP0 00000005 +RP1 00000006 +RSEN 00000001 +RX9 00000006 +RX9D 00000000 +R_W 00000002 +S 00000003 +SEN 00000000 +SEVENSEGDISPDIGIT 000000A7 +SMP 00000007 +SPBRG 00000099 +SPEN 00000007 +SREN 00000005 +SSPADD 00000093 +SSPBUF 00000013 +SSPCON 00000014 +SSPCON2 00000091 +SSPEN 00000005 +SSPIE 00000003 +SSPIF 00000003 +SSPM0 00000000 +SSPM1 00000001 +SSPM2 00000002 +SSPM3 00000003 +SSPOV 00000006 +SSPSTAT 00000094 +STATUS 00000003 +SYNC 00000004 +SYSCOMPEQUAL16 000000C5 +SYSDIV16START 000000E8 +SYSDIVMULTA 00000077 +SYSDIVMULTA_H 00000078 +SYSDIVMULTB 0000007B +SYSDIVMULTB_H 0000007C +SYSDIVMULTX 00000072 + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 21 + + +SYMBOL TABLE + LABEL VALUE + +SYSDIVMULTX_H 00000073 +SYSDIVSUB16 000000D0 +SYSDIVSUBINT 00000108 +SYSINTEGERTEMPA 00000075 +SYSINTEGERTEMPA_H 00000076 +SYSINTEGERTEMPB 00000079 +SYSINTEGERTEMPB_H 0000007A +SYSINTEGERTEMPX 00000070 +SYSINTEGERTEMPX_H 00000071 +SYSSIGNBYTE 0000007D +SYSWORDTEMPA 00000075 +SYSWORDTEMPA_H 00000076 +SYSWORDTEMPB 00000079 +SYSWORDTEMPB_H 0000007A +SYSWORDTEMPX 00000070 +SYSWORDTEMPX_H 00000071 +SysByteTempX 00000070 +SysDivLoop 00000074 +SysStringA 00000077 +SysTemp1 00000027 +SysTemp1_H 00000028 +SysWaitLoop1 00000098 +SysWaitTemp10US 00000075 +SysWaitTempMS 00000072 +SysWaitTempMS_H 00000073 +T0CS 00000005 +T0IE 00000005 +T0IF 00000002 +T0SE 00000004 +T1CKPS0 00000004 +T1CKPS1 00000005 +T1CON 00000010 +T1INSYNC 00000002 +T1OSCEN 00000003 +T1SYNC 00000002 +T2CKPS0 00000000 +T2CKPS1 00000001 +T2CON 00000012 +TMR0 00000001 +TMR0IE 00000005 +TMR0IF 00000002 +TMR1CS 00000001 +TMR1H 0000000F +TMR1IE 00000000 +TMR1IF 00000000 +TMR1L 0000000E +TMR1ON 00000000 +TMR2 00000011 +TMR2IE 00000001 +TMR2IF 00000001 +TMR2ON 00000002 +TOUTPS0 00000003 +TOUTPS1 00000004 + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 22 + + +SYMBOL TABLE + LABEL VALUE + +TOUTPS2 00000005 +TOUTPS3 00000006 +TRISA 00000085 +TRISB 00000086 +TRISC 00000087 +TRMT 00000001 +TX8_9 00000006 +TX9 00000006 +TX9D 00000000 +TXD8 00000000 +TXEN 00000005 +TXIE 00000004 +TXIF 00000004 +TXREG 00000019 +TXSTA 00000098 +TableSEVENSEGDISPDIGIT 000000B4 +UA 00000001 +VALUE 00000029 +W 00000000 +WCOL 00000007 +WR 00000001 +WREN 00000002 +WRERR 00000003 +Z 00000002 +_BODEN_OFF 00003FBF +_BODEN_ON 00003FFF +_CPD_OFF 00003FFF +_CPD_ON 00003EFF +_CP_ALL 00001FFF +_CP_OFF 00003FFF +_DEBUG_OFF 00003FFF +_DEBUG_ON 000037FF +_HS_OSC 00003FFE +_LP_OSC 00003FFC +_LVP_OFF 00003F7F +_LVP_ON 00003FFF +_PWRTE_OFF 00003FFF +_PWRTE_ON 00003FF7 +_RC_OSC 00003FFF +_WDT_OFF 00003FFB +_WDT_ON 00003FFF +_WRT_1FOURTH 00003BFF +_WRT_256 00003DFF +_WRT_HALF 000039FF +_WRT_OFF 00003FFF +_XT_OSC 00003FFD +__16F876A 00000001 +__CODE_END 00001FFF +__CODE_START 00000000 +__COMMON_RAM_END 0000007F +__COMMON_RAM_START 00000070 +__EEPROM_END 000021FF +__EEPROM_START 00002100 + gpasm-1.4.0 #1107 (Jan 9 2015) sevseg_Pic16F 2-19-2016 17:06:21 PAGE 23 + + +SYMBOL TABLE + LABEL VALUE + +__VECTOR_INT 00000004 +__VECTOR_RESET 00000000 + + +MEMORY USAGE MAP ('X' = Used, '-' = Unused) + +0000 : X---XXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX +0040 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX +0080 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX +00C0 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX +0100 : XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXX--------- ---------------- +2000 : -------X-------- ---------------- ---------------- ---------------- + +All other memory blocks unused. + +Program Memory Words Used: 292 +Program Memory Words Free: 7900 + + +Errors : 0 +Warnings : 1 reported, 0 suppressed +Messages : 0 reported, 26 suppressed + + \ No newline at end of file diff --git a/resources/examples/Pic/Song_PIC16F886/song.simu b/resources/examples/Pic/Song_PIC16F886/song.simu new file mode 100644 index 0000000..a9da23d --- /dev/null +++ b/resources/examples/Pic/Song_PIC16F886/song.simu @@ -0,0 +1,60 @@ + + +pic16f886-9: + + +Salida Audio-8: + + +Tierra-7: + + +Rail.-6: + + +Pulsador-5: + + +Node-4: + + +Reistencia-3: + + +Node-2: + + +Sonda Voltaje.-1: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-17: + + +Connector-18: + + +Connector-20: + + +Connector-21: + + +PlotterWidget-22: + + +SerialPortWidget-23: + + + diff --git a/resources/examples/Pic/Song_PIC16F886/song_16F886.gcb b/resources/examples/Pic/Song_PIC16F886/song_16F886.gcb new file mode 100644 index 0000000..576b765 --- /dev/null +++ b/resources/examples/Pic/Song_PIC16F886/song_16F886.gcb @@ -0,0 +1,91 @@ +'''A demonstration program for GCGB and GCB. +'''-------------------------------------------------------------------------------------------------------------------------------- +'''This program plays 'Mary had a little lamb' on portc.2 connected to Piezo speaker. +'''It plays once and stops until the momentary switch on portb.0 is pressed then it plays again. +'''This uses a GCB table as the data source. +'''@author EvanV plus works of ChuckH +'''@licence GPL +'''@version 1.0a +'''@date 31.01.2015 +'''******************************************************************************** + +; ----- Configuration + #chip 16F886, 16 + #option explicit + +; ----- Define Hardware settings + DIR portb.0 in + +; ----- Constants + #define SoundOut portc.2 + + +; ----- Variables + 'Requires word size to hold note frequencies + dim note as word + Dim CNT as Byte + + +; ----- Main body of program commences here. + Do + hold: + If portb.0 = 1 Then goto hold 'play music when switch is pressed + + for cnt = 1 to 32 + readtable mary, cnt, note ' Read notes from table + tone note, 50 ' Play notes + next + + Loop + + Table MARY + 554 'C# + 494 'B + 440 'A + 494 'B + 554 'C# + 0 'SILENT + 554 'C# + 554 'C# + 494 'B + 0 'SILENT + 494 'B + 0 'SILENT + 494 'B + 554 'C# + 659 'E + 0 'SILENT + 659 'E + 554 'C# + 494 'B + 440 'A + 494 'B + 554 'C# + 0 'SILENT + 554 'C# + 0 'SILENT + 554 'C# + 494 'B + 0 'SILENT + 494 'B + 554 'C# + 494 'B + 440 'A + + end table + + +'Tone.gcb + +'440 ' A +'466 ' A# +'494 ' B +'523 ' C +'554 ' C# +'587 ' D +'622 ' D# +'659 ' E +'699 ' F +'740 ' F# +'784 ' G +'831 ' G# diff --git a/resources/examples/Pic/T0_IRQ_Pic16F628A/README b/resources/examples/Pic/T0_IRQ_Pic16F628A/README new file mode 100644 index 0000000..eab39a0 --- /dev/null +++ b/resources/examples/Pic/T0_IRQ_Pic16F628A/README @@ -0,0 +1,16 @@ +;********************************************************************** +; Filename: TMR0_IRQ.asm +; Date: Nov. 11, 2013 +; Author: Lewis Loflin +; Demonstrates how to use interrupts with TMR0 +; State of LED on Ra0 is inverted by toggle every 61 interrupts +; PIC16F628A and 16 mHz crystal +;********************************************************************** + +Set Pic Mhz to 16 + +Assembled with gpasm-0.13.7 (gputils): http://gputils.sourceforge.net/ + gpasm -L -w1 -i -ainhx32 T0_IRQ_Pic16F628A.asm + +Source and explanations about Pic16f628a Timer0: + http://www.bristolwatch.com/PIC16F628A/a3.htm diff --git a/resources/examples/Pic/T0_IRQ_Pic16F628A/T0_IRQ_Pic16F628A.asm b/resources/examples/Pic/T0_IRQ_Pic16F628A/T0_IRQ_Pic16F628A.asm new file mode 100644 index 0000000..f08207b --- /dev/null +++ b/resources/examples/Pic/T0_IRQ_Pic16F628A/T0_IRQ_Pic16F628A.asm @@ -0,0 +1,111 @@ + + +;********************************************************************** +; Filename: TMR0_IRQ.asm +; Date: Nov. 11, 2013 +; Author: Lewis Loflin +; Demonstrates how to use interrupts with TMR0 +; State of LED on Ra0 is inverted by toggle every 61 interrupts +; PIC16F628A and 16 mHz crystal +;********************************************************************** + + + + + list p=16f628A ; list directive to define processor + #include ; processor specific variable definitions + errorlevel -302 ; suppress message 302 from list file + +__CONFIG _CP_OFF & _LVP_OFF & _BOREN_OFF & _MCLRE_OFF & _WDT_OFF & _PWRTE_ON & _HS_OSC + +; Use _INTOSC_OSC_NOCLKOUT for +; internal 4 mHz osc and no ext reset, use pin Ra5 as an input +; Use _HS_OSC for a 16 mHz ext crystal. +; Use _XT_OSC for 4 mHz ext crystal. Page 95 in spec sheet. + + + cblock 0x20 ; Begin General Purpose-Register + count1 + count2 + count3 + CNT + endc + + + ;***** VARIABLE DEFINITIONS +w_temp EQU 0x71 ; variable used for context saving +status_temp EQU 0x72 ; variable used for context saving + +;----------------------------------------------- +RA0 EQU 0 ; + +;********************************************************************** + ORG 0x000 ; processor reset vector + goto setup ; go to beginning of program + + ORG 0x004 ; interrupt vector location + movwf w_temp ; save off current W register contents + movf STATUS,w ; move status register into W register + movwf status_temp ; save off contents of STATUS register +; isr code can go here or be located as a call subroutine elsewhere + + movlw d'61' + ; approx 61 interrupts = 1 sec. at 16 mHz crystal + subwf CNT, w + btfss STATUS, Z ; i = 10 + goto $+4 + call toggle ; state = !state PORTA, 0 + clrf CNT + goto $+2 + incf CNT + bcf INTCON, T0IF ; clr TMR0 interrupt flag + + movf status_temp,w ; retrieve copy of STATUS register + movwf STATUS ; restore pre-isr STATUS register contents + swapf w_temp,f + swapf w_temp,w ; restore pre-isr W register contents + retfie ; return from interrupt + +;********************************************************************** + +setup ; init PIC16F628A + + movlw 0x07 ; Turn comparators off and enable pins for I/O + movwf CMCON + banksel TRISA ; BSF STATUS,RP0 Jump to bank 1 use BANKSEL instead + clrf TRISA + clrf TRISB + banksel INTCON ; back to bank 0 + clrf PORTA + clrf PORTB + + ; setp TMR0 interrupts + banksel OPTION_REG ; Reg. 0x81 BANK1 + movlw b'10000111' ; internal clock, pos edge, prescale 256 + movwf OPTION_REG + banksel INTCON ; + bsf INTCON, GIE ; enable global interrupt + bsf INTCON, PEIE ; enable all unmasked interrupts + bsf INTCON, T0IE ; enable TMR0 interrupt + bcf INTCON, T0IF ; clr TMR0 interrupt flag + ; to turn on, must be cleared after interrupt + clrf CNT ; RAM location 0x23 + +goto main + +main + ; do nothing + goto main + +;************************************************************************ + +toggle + btfss PORTA, RA0 + goto $+3 + bcf PORTA, RA0 + return + bsf PORTA, RA0 + return + +END ; directive 'end of program' + diff --git a/resources/examples/Pic/T0_IRQ_Pic16F628A/T0_IRQ_Pic16F628A.cod b/resources/examples/Pic/T0_IRQ_Pic16F628A/T0_IRQ_Pic16F628A.cod new file mode 100644 index 0000000000000000000000000000000000000000..8e81b37bdffddfe4647e9ce3905480f467a4f39e GIT binary patch literal 7680 zcmeI$cXSlT9S884+onQLkuccgx-)30&4f2q6qesKjxa zmk@Al9B1M**N}wt-h1No-g|d?#ddItleoyg`Od76?0@tg&kldEdhes(l-=L#Z%22h zo5s%UC_A&$|LxrnS~3Pg$tR53z>x@3l}mA7cvV+7LF`j z$Sho_ER~37z?pCsoDHks95@%wgXh8dZ~;6YE`-%^5nK$Hzzg7oaOsp?hM6^RIlKt2 zfGgoDSPSc55~g4pu7(%GHLxDaUC6~cxE@{tFNK$p@xjFg3c1(_8{j6`2%De_n_&jF zz*e{!X5r;<3v7e!FbDI{gIl2w3owA&UT5N8nL-BYX+G3EoV`2N%aEZd=-2(d=0!E z-U07~cfq^iJ@B>gID8#^J$wT^0pAGU1m6tb0^bVX2Hy_f0pAJV1>X(d1K$hZ2j34r z06z#n1V0Qv0zV2r20soz0Y3>p1wRe%g`a_+g`b0;hhKnSgkOSRhF_VoU&YL?!LP$_ zz;D8D!EeLw!0*EEk@3OB_bKG!2k?jRNASn+C-A56XYl9n7x0(xSMWagYxo=ZTlhQp zd-w8#OWuq=e6^*tts%W%>QANcSj4B#kDHT^S zs;jtK8bJ{rwAhsa# z>RiK(lToBIQKZvYZhO4ug{IrCS8U5rt=Bf(T#%4OT4K7su9s=L1z*+4Ni?f~TbWE_ zvyY^A*_jMoR%N?eHB`cTsL|XQG-BGFW+tOEIxm`hqf{IL|b^MHM zu361wb~YEpw^3?RLlxeX{h8)gB(r6|zOuX>dg@uL(!}HUKZZo`s z-i;K+8^kN9(FFCWhh-Rkqn>B_P5L1iGSm;j^j+O+$x!uLmQTAz-Pt^f3wkYc62305 z;d|<`7DXz(ZTMa5)iO8f6f z!g!HP#%h%b3JZGAI6=zY5|_l(EwwJoqA~p!UQQ$QpyC%0CrF<@i|LjwrbT1=tV%Oz z_touko5GY{7q?_XJ>KaU(5qysp-YTeYDbh|Kwp+_rCmSH3fZ65XCp^i-=u2jGZIcf zuUzqM8oH$xOgD`&wF4~OQZGfe75G`bBaR?e`{}4jUnZzmNNxndD%4 zmXGa2Z`|_WooKN{r|RZrXM9@1qEOE^_zuiVl+a5Ay<>#=7CerIdyC@^yy!QK$q96Y z$rI3_Cpe+&jgOAmXklpK*tAf-EKV9PJ>7*#8^_ARj33gj3*ELY`i-YytUT__&d$si(}C&_DSMCv2lT z)+;z!6t;DoF2D^mD4XNeYj@lH%y@n7D-LzX_yn)h4^B@QD-Lysn(%O0_|&ygd35Kb zg~`voMPX-iFrMxaM>TaaC+wmzz3}^s!%%-ghONNuo`KN=BPqNuR;xxDjYX=l8jZ!~ z{_g$*^f86871nU?$mk&AS*61x-6NyJ;YjcPL0oUh9vSHC+t-WXmG*U~M-Ix9&mB)o z1+~0yb$fcdcl8d{4eDKN#RHqT{R<>#Srn7jF=a%-2R3Opt MjHEf2 ; processor specific variable definitions +Warning [231] : found lower case match for include filename + 00001 LIST + 00002 ; P16F628A.INC Standard Header File, Version 1.10 Microchip Technology, Inc. + 00003 NOLIST + 00004 + 00005 ; This header file defines configurations, registers, and other useful bits of + 00006 ; information for the PIC16F628A microcontroller. These names are taken to match + 00007 ; the data sheets as closely as possible. + 00008 + 00009 ; Note that the processor must be selected before this file is + 00010 ; included. The processor may be selected the following ways: + 00011 + 00012 ; 1. Command line switch: + 00013 ; C:\ MPASM MYFILE.ASM /PIC16F628A + 00014 ; 2. LIST directive in the source file + 00015 ; LIST P=PIC16F628A + 00016 ; 3. Processor Type entry in the MPASM full-screen interface + 00017 + 00018 ;========================================================================== + 00019 ; + 00020 ; Revision History + 00021 ; + 00022 ;========================================================================== + 00023 + 00024 ;Rev: Date: Reason: + 00025 ;1.01 14 Nov 2002 Updated to reflect BOD terminology changed to BOR + 00026 ;1.00 22 Aug 2002 Initial Release + 00027 + 00028 ;========================================================================== + 00029 ; + 00030 ; Verify Processor + 00031 ; + 00032 ;========================================================================== + 00033 + 00034 IFNDEF __16F628A + 00035 MESSG "Processor-header file mismatch. Verify selected processor." + 00036 ENDIF + 00037 + gpasm-0.13.7 beta TRM0_IRQ_Pic16F628A.asm2-7-2016 15:16:53 PAGE 2 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00038 ;========================================================================== + 00039 ; + 00040 ; Register Definitions + 00041 ; + 00042 ;========================================================================== + 00043 + 00000000 00044 W EQU H'0000' + 00000001 00045 F EQU H'0001' + 00046 + 00047 ;----- Register Files------------------------------------------------------ + 00048 + 00000000 00049 INDF EQU H'0000' + 00000001 00050 TMR0 EQU H'0001' + 00000002 00051 PCL EQU H'0002' + 00000003 00052 STATUS EQU H'0003' + 00000004 00053 FSR EQU H'0004' + 00000005 00054 PORTA EQU H'0005' + 00000006 00055 PORTB EQU H'0006' + 0000000A 00056 PCLATH EQU H'000A' + 0000000B 00057 INTCON EQU H'000B' + 0000000C 00058 PIR1 EQU H'000C' + 0000000E 00059 TMR1L EQU H'000E' + 0000000F 00060 TMR1H EQU H'000F' + 00000010 00061 T1CON EQU H'0010' + 00000011 00062 TMR2 EQU H'0011' + 00000012 00063 T2CON EQU H'0012' + 00000015 00064 CCPR1L EQU H'0015' + 00000016 00065 CCPR1H EQU H'0016' + 00000017 00066 CCP1CON EQU H'0017' + 00000018 00067 RCSTA EQU H'0018' + 00000019 00068 TXREG EQU H'0019' + 0000001A 00069 RCREG EQU H'001A' + 0000001F 00070 CMCON EQU H'001F' + 00071 + 00000081 00072 OPTION_REG EQU H'0081' + 00000085 00073 TRISA EQU H'0085' + 00000086 00074 TRISB EQU H'0086' + 0000008C 00075 PIE1 EQU H'008C' + 0000008E 00076 PCON EQU H'008E' + 00000092 00077 PR2 EQU H'0092' + 00000098 00078 TXSTA EQU H'0098' + 00000099 00079 SPBRG EQU H'0099' + 0000009A 00080 EEDATA EQU H'009A' + 0000009B 00081 EEADR EQU H'009B' + 0000009C 00082 EECON1 EQU H'009C' + 0000009D 00083 EECON2 EQU H'009D' + 0000009F 00084 VRCON EQU H'009F' + 00085 + 00086 ;----- STATUS Bits -------------------------------------------------------- + 00087 + 00000007 00088 IRP EQU H'0007' + 00000006 00089 RP1 EQU H'0006' + 00000005 00090 RP0 EQU H'0005' + 00000004 00091 NOT_TO EQU H'0004' + gpasm-0.13.7 beta TRM0_IRQ_Pic16F628A.asm2-7-2016 15:16:53 PAGE 3 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00000003 00092 NOT_PD EQU H'0003' + 00000002 00093 Z EQU H'0002' + 00000001 00094 DC EQU H'0001' + 00000000 00095 C EQU H'0000' + 00096 + 00097 ;----- INTCON Bits -------------------------------------------------------- + 00098 + 00000007 00099 GIE EQU H'0007' + 00000006 00100 PEIE EQU H'0006' + 00000005 00101 T0IE EQU H'0005' + 00000004 00102 INTE EQU H'0004' + 00000003 00103 RBIE EQU H'0003' + 00000002 00104 T0IF EQU H'0002' + 00000001 00105 INTF EQU H'0001' + 00000000 00106 RBIF EQU H'0000' + 00107 + 00108 ;----- PIR1 Bits ---------------------------------------------------------- + 00109 + 00000007 00110 EEIF EQU H'0007' + 00000006 00111 CMIF EQU H'0006' + 00000005 00112 RCIF EQU H'0005' + 00000004 00113 TXIF EQU H'0004' + 00000002 00114 CCP1IF EQU H'0002' + 00000001 00115 TMR2IF EQU H'0001' + 00000000 00116 TMR1IF EQU H'0000' + 00117 + 00118 ;----- T1CON Bits --------------------------------------------------------- + 00000005 00119 T1CKPS1 EQU H'0005' + 00000004 00120 T1CKPS0 EQU H'0004' + 00000003 00121 T1OSCEN EQU H'0003' + 00000002 00122 NOT_T1SYNC EQU H'0002' + 00000001 00123 TMR1CS EQU H'0001' + 00000000 00124 TMR1ON EQU H'0000' + 00125 + 00126 ;----- T2CON Bits --------------------------------------------------------- + 00000006 00127 TOUTPS3 EQU H'0006' + 00000005 00128 TOUTPS2 EQU H'0005' + 00000004 00129 TOUTPS1 EQU H'0004' + 00000003 00130 TOUTPS0 EQU H'0003' + 00000002 00131 TMR2ON EQU H'0002' + 00000001 00132 T2CKPS1 EQU H'0001' + 00000000 00133 T2CKPS0 EQU H'0000' + 00134 + 00135 ;----- CCP1CON Bits --------------------------------------------------------- + 00000005 00136 CCP1X EQU H'0005' + 00000004 00137 CCP1Y EQU H'0004' + 00000003 00138 CCP1M3 EQU H'0003' + 00000002 00139 CCP1M2 EQU H'0002' + 00000001 00140 CCP1M1 EQU H'0001' + 00000000 00141 CCP1M0 EQU H'0000' + 00142 + 00143 ;----- RCSTA Bits --------------------------------------------------------- + 00000007 00144 SPEN EQU H'0007' + 00000006 00145 RX9 EQU H'0006' + gpasm-0.13.7 beta TRM0_IRQ_Pic16F628A.asm2-7-2016 15:16:53 PAGE 4 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00000005 00146 SREN EQU H'0005' + 00000004 00147 CREN EQU H'0004' + 00000003 00148 ADEN EQU H'0003' + 00000002 00149 FERR EQU H'0002' + 00000001 00150 OERR EQU H'0001' + 00000000 00151 RX9D EQU H'0000' + 00152 + 00153 ;----- CMCON Bits --------------------------------------------------------- + 00154 + 00000007 00155 C2OUT EQU H'0007' + 00000006 00156 C1OUT EQU H'0006' + 00000005 00157 C2INV EQU H'0005' + 00000004 00158 C1INV EQU H'0004' + 00000003 00159 CIS EQU H'0003' + 00000002 00160 CM2 EQU H'0002' + 00000001 00161 CM1 EQU H'0001' + 00000000 00162 CM0 EQU H'0000' + 00163 + 00164 ;----- OPTION Bits -------------------------------------------------------- + 00165 + 00000007 00166 NOT_RBPU EQU H'0007' + 00000006 00167 INTEDG EQU H'0006' + 00000005 00168 T0CS EQU H'0005' + 00000004 00169 T0SE EQU H'0004' + 00000003 00170 PSA EQU H'0003' + 00000002 00171 PS2 EQU H'0002' + 00000001 00172 PS1 EQU H'0001' + 00000000 00173 PS0 EQU H'0000' + 00174 + 00175 ;----- PIE1 Bits ---------------------------------------------------------- + 00176 + 00000007 00177 EEIE EQU H'0007' + 00000006 00178 CMIE EQU H'0006' + 00000005 00179 RCIE EQU H'0005' + 00000004 00180 TXIE EQU H'0004' + 00000002 00181 CCP1IE EQU H'0002' + 00000001 00182 TMR2IE EQU H'0001' + 00000000 00183 TMR1IE EQU H'0000' + 00184 + 00185 ;----- PCON Bits ---------------------------------------------------------- + 00186 + 00000003 00187 OSCF EQU H'0003' + 00000001 00188 NOT_POR EQU H'0001' + 00000000 00189 NOT_BO EQU H'0000' + 00000000 00190 NOT_BOR EQU H'0000' + 00000000 00191 NOT_BOD EQU H'0000' ;Backwards compatability to 16F62X + 00192 + 00193 ;----- TXSTA Bits ---------------------------------------------------------- + 00000007 00194 CSRC EQU H'0007' + 00000006 00195 TX9 EQU H'0006' + 00000005 00196 TXEN EQU H'0005' + 00000004 00197 SYNC EQU H'0004' + 00000002 00198 BRGH EQU H'0002' + 00000001 00199 TRMT EQU H'0001' + gpasm-0.13.7 beta TRM0_IRQ_Pic16F628A.asm2-7-2016 15:16:53 PAGE 5 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00000000 00200 TX9D EQU H'0000' + 00201 + 00202 ;----- EECON1 Bits --------------------------------------------------------- + 00000003 00203 WRERR EQU H'0003' + 00000002 00204 WREN EQU H'0002' + 00000001 00205 WR EQU H'0001' + 00000000 00206 RD EQU H'0000' + 00207 + 00208 ;----- VRCON Bits --------------------------------------------------------- + 00209 + 00000007 00210 VREN EQU H'0007' + 00000006 00211 VROE EQU H'0006' + 00000005 00212 VRR EQU H'0005' + 00000003 00213 VR3 EQU H'0003' + 00000002 00214 VR2 EQU H'0002' + 00000001 00215 VR1 EQU H'0001' + 00000000 00216 VR0 EQU H'0000' + 00217 + 00218 ;========================================================================== + 00219 ; + 00220 ; RAM Definition + 00221 ; + 00222 ;========================================================================== + 00223 + 00224 __MAXRAM H'01FF' + 00225 __BADRAM H'07'-H'09', H'0D', H'13'-H'14', H'1B'-H'1E' + 00226 __BADRAM H'87'-H'89', H'8D', H'8F'-H'91', H'93'-H'97', H'9E' + 00227 __BADRAM H'105', H'107'-H'109', H'10C'-H'11F', H'150'-H'16F' + 00228 __BADRAM H'185', H'187'-H'189', H'18C'-H'1EF' + 00229 + 00230 ;========================================================================== + 00231 ; + 00232 ; Configuration Bits + 00233 ; + 00234 ;========================================================================== + 00235 + 00003FFF 00236 _BODEN_ON EQU H'3FFF' ;Backwards compatability to 16F62X + 00003FBF 00237 _BODEN_OFF EQU H'3FBF' ;Backwards compatability to 16F62X + 00003FFF 00238 _BOREN_ON EQU H'3FFF' + 00003FBF 00239 _BOREN_OFF EQU H'3FBF' + 00001FFF 00240 _CP_ON EQU H'1FFF' + 00003FFF 00241 _CP_OFF EQU H'3FFF' + 00003EFF 00242 _DATA_CP_ON EQU H'3EFF' + 00003FFF 00243 _DATA_CP_OFF EQU H'3FFF' + 00003FFF 00244 _PWRTE_OFF EQU H'3FFF' + 00003FF7 00245 _PWRTE_ON EQU H'3FF7' + 00003FFF 00246 _WDT_ON EQU H'3FFF' + 00003FFB 00247 _WDT_OFF EQU H'3FFB' + 00003FFF 00248 _LVP_ON EQU H'3FFF' + 00003F7F 00249 _LVP_OFF EQU H'3F7F' + 00003FFF 00250 _MCLRE_ON EQU H'3FFF' + 00003FDF 00251 _MCLRE_OFF EQU H'3FDF' + 00003FFF 00252 _RC_OSC_CLKOUT EQU H'3FFF' + 00003FFE 00253 _RC_OSC_NOCLKOUT EQU H'3FFE' + gpasm-0.13.7 beta TRM0_IRQ_Pic16F628A.asm2-7-2016 15:16:53 PAGE 6 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00003FFF 00254 _ER_OSC_CLKOUT EQU H'3FFF' ;Backwards compatability to 16F62X + 00003FFE 00255 _ER_OSC_NOCLKOUT EQU H'3FFE' ;Backwards compatability to 16F62X + 00003FFD 00256 _INTOSC_OSC_CLKOUT EQU H'3FFD' + 00003FFC 00257 _INTOSC_OSC_NOCLKOUT EQU H'3FFC' + 00003FFD 00258 _INTRC_OSC_CLKOUT EQU H'3FFD' ;Backwards compatability to 16F62X + 00003FFC 00259 _INTRC_OSC_NOCLKOUT EQU H'3FFC' ;Backwards compatability to 16F62X + 00003FEF 00260 _EXTCLK_OSC EQU H'3FEF' + 00003FEE 00261 _HS_OSC EQU H'3FEE' + 00003FED 00262 _XT_OSC EQU H'3FED' + 00003FEC 00263 _LP_OSC EQU H'3FEC' + 00264 + 00265 LIST + 00266 + 00017 errorlevel -302 ; suppress message 302 from list file + 00018 +Warning [205] : Found directive in column 1. +002007 3F02 00019 __CONFIG _CP_OFF & _LVP_OFF & _BOREN_OFF & _MCLRE_OFF & _WDT_OFF & _PWRTE_ON & _HS_OSC + 00020 + 00021 ; Use _INTOSC_OSC_NOCLKOUT for + 00022 ; internal 4 mHz osc and no ext reset, use pin Ra5 as an input + 00023 ; Use _HS_OSC for a 16 mHz ext crystal. + 00024 ; Use _XT_OSC for 4 mHz ext crystal. Page 95 in spec sheet. + 00025 + 00026 + 00027 cblock 0x20 ; Begin General Purpose-Register + 00028 count1 + 00029 count2 + 00030 count3 + 00031 CNT + 00032 endc + 00033 + 00034 + 00035 ;***** VARIABLE DEFINITIONS + 00000071 00036 w_temp EQU 0x71 ; variable used for context saving + 00000072 00037 status_temp EQU 0x72 ; variable used for context saving + 00038 + 00039 ;----------------------------------------------- + 00000000 00040 RA0 EQU 0 ; + 00041 + 00042 ;********************************************************************** +0000 00043 ORG 0x000 ; processor reset vector +0000 2815 00044 goto setup ; go to beginning of program + 00045 +0004 00046 ORG 0x004 ; interrupt vector location +0004 00F1 00047 movwf w_temp ; save off current W register contents +0005 0803 00048 movf STATUS,w ; move status register into W register +0006 00F2 00049 movwf status_temp ; save off contents of STATUS register + 00050 ; isr code can go here or be located as a call subroutine elsewhere + 00051 +0007 303D 00052 movlw d'61' + 00053 ; approx 61 interrupts = 1 sec. at 16 mHz crystal +0008 0223 00054 subwf CNT, w +0009 1D03 00055 btfss STATUS, Z ; i = 10 +000A 280E 00056 goto $+4 + gpasm-0.13.7 beta TRM0_IRQ_Pic16F628A.asm2-7-2016 15:16:53 PAGE 7 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +000B 202C 00057 call toggle ; state = !state PORTA, 0 +000C 01A3 00058 clrf CNT +000D 280F 00059 goto $+2 +000E 0AA3 00060 incf CNT +000F 110B 00061 bcf INTCON, T0IF ; clr TMR0 interrupt flag + 00062 +0010 0872 00063 movf status_temp,w ; retrieve copy of STATUS register +0011 0083 00064 movwf STATUS ; restore pre-isr STATUS register contents +0012 0EF1 00065 swapf w_temp,f +0013 0E71 00066 swapf w_temp,w ; restore pre-isr W register contents +0014 0009 00067 retfie ; return from interrupt + 00068 + 00069 ;********************************************************************** + 00070 +0015 00071 setup ; init PIC16F628A + 00072 +0015 3007 00073 movlw 0x07 ; Turn comparators off and enable pins for I/O +0016 009F 00074 movwf CMCON +0017 1683 1303 00075 banksel TRISA ; BSF STATUS,RP0 Jump to bank 1 use BANKSEL instead +0019 0185 00076 clrf TRISA +001A 0186 00077 clrf TRISB +001B 1283 1303 00078 banksel INTCON ; back to bank 0 +001D 0185 00079 clrf PORTA +001E 0186 00080 clrf PORTB + 00081 + 00082 ; setp TMR0 interrupts +001F 1683 1303 00083 banksel OPTION_REG ; Reg. 0x81 BANK1 +0021 3087 00084 movlw b'10000111' ; internal clock, pos edge, prescale 256 +0022 0081 00085 movwf OPTION_REG +0023 1283 1303 00086 banksel INTCON ; +0025 178B 00087 bsf INTCON, GIE ; enable global interrupt +0026 170B 00088 bsf INTCON, PEIE ; enable all unmasked interrupts +0027 168B 00089 bsf INTCON, T0IE ; enable TMR0 interrupt +0028 110B 00090 bcf INTCON, T0IF ; clr TMR0 interrupt flag + 00091 ; to turn on, must be cleared after interrupt +0029 01A3 00092 clrf CNT ; RAM location 0x23 + 00093 +Warning [203] : Found opcode in column 1. +002A 282B 00094 goto main + 00095 +002B 00096 main + 00097 ; do nothing +002B 282B 00098 goto main + 00099 + 00100 ;************************************************************************ + 00101 +002C 00102 toggle +002C 1C05 00103 btfss PORTA, RA0 +002D 2830 00104 goto $+3 +002E 1005 00105 bcf PORTA, RA0 +002F 0008 00106 return +0030 1405 00107 bsf PORTA, RA0 +0031 0008 00108 return + 00109 + gpasm-0.13.7 beta TRM0_IRQ_Pic16F628A.asm2-7-2016 15:16:53 PAGE 8 + + +SYMBOL TABLE + LABEL VALUE + +ADEN 00000003 +BRGH 00000002 +C 00000000 +C1INV 00000004 +C1OUT 00000006 +C2INV 00000005 +C2OUT 00000007 +CCP1CON 00000017 +CCP1IE 00000002 +CCP1IF 00000002 +CCP1M0 00000000 +CCP1M1 00000001 +CCP1M2 00000002 +CCP1M3 00000003 +CCP1X 00000005 +CCP1Y 00000004 +CCPR1H 00000016 +CCPR1L 00000015 +CIS 00000003 +CM0 00000000 +CM1 00000001 +CM2 00000002 +CMCON 0000001F +CMIE 00000006 +CMIF 00000006 +CNT 00000023 +CREN 00000004 +CSRC 00000007 +DC 00000001 +EEADR 0000009B +EECON1 0000009C +EECON2 0000009D +EEDATA 0000009A +EEIE 00000007 +EEIF 00000007 +F 00000001 +FERR 00000002 +FSR 00000004 +GIE 00000007 +INDF 00000000 +INTCON 0000000B +INTE 00000004 +INTEDG 00000006 +INTF 00000001 +IRP 00000007 +NOT_BO 00000000 +NOT_BOD 00000000 +NOT_BOR 00000000 +NOT_PD 00000003 +NOT_POR 00000001 +NOT_RBPU 00000007 +NOT_T1SYNC 00000002 +NOT_TO 00000004 + gpasm-0.13.7 beta TRM0_IRQ_Pic16F628A.asm2-7-2016 15:16:53 PAGE 9 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +OERR 00000001 +OPTION_REG 00000081 +OSCF 00000003 +PCL 00000002 +PCLATH 0000000A +PCON 0000008E +PEIE 00000006 +PIE1 0000008C +PIR1 0000000C +PORTA 00000005 +PORTB 00000006 +PR2 00000092 +PS0 00000000 +PS1 00000001 +PS2 00000002 +PSA 00000003 +RA0 00000000 +RBIE 00000003 +RBIF 00000000 +RCIE 00000005 +RCIF 00000005 +RCREG 0000001A +RCSTA 00000018 +RD 00000000 +RP0 00000005 +RP1 00000006 +RX9 00000006 +RX9D 00000000 +SPBRG 00000099 +SPEN 00000007 +SREN 00000005 +STATUS 00000003 +SYNC 00000004 +T0CS 00000005 +T0IE 00000005 +T0IF 00000002 +T0SE 00000004 +T1CKPS0 00000004 +T1CKPS1 00000005 +T1CON 00000010 +T1OSCEN 00000003 +T2CKPS0 00000000 +T2CKPS1 00000001 +T2CON 00000012 +TMR0 00000001 +TMR1CS 00000001 +TMR1H 0000000F +TMR1IE 00000000 +TMR1IF 00000000 +TMR1L 0000000E +TMR1ON 00000000 +TMR2 00000011 +TMR2IE 00000001 +TMR2IF 00000001 + gpasm-0.13.7 beta TRM0_IRQ_Pic16F628A.asm2-7-2016 15:16:53 PAGE 10 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +TMR2ON 00000002 +TOUTPS0 00000003 +TOUTPS1 00000004 +TOUTPS2 00000005 +TOUTPS3 00000006 +TRISA 00000085 +TRISB 00000086 +TRMT 00000001 +TX9 00000006 +TX9D 00000000 +TXEN 00000005 +TXIE 00000004 +TXIF 00000004 +TXREG 00000019 +TXSTA 00000098 +VR0 00000000 +VR1 00000001 +VR2 00000002 +VR3 00000003 +VRCON 0000009F +VREN 00000007 +VROE 00000006 +VRR 00000005 +W 00000000 +WR 00000001 +WREN 00000002 +WRERR 00000003 +Z 00000002 +_BODEN_OFF 00003FBF +_BODEN_ON 00003FFF +_BOREN_OFF 00003FBF +_BOREN_ON 00003FFF +_CP_OFF 00003FFF +_CP_ON 00001FFF +_DATA_CP_OFF 00003FFF +_DATA_CP_ON 00003EFF +_ER_OSC_CLKOUT 00003FFF +_ER_OSC_NOCLKOUT 00003FFE +_EXTCLK_OSC 00003FEF +_HS_OSC 00003FEE +_INTOSC_OSC_CLKOUT 00003FFD +_INTOSC_OSC_NOCLKOUT 00003FFC +_INTRC_OSC_CLKOUT 00003FFD +_INTRC_OSC_NOCLKOUT 00003FFC +_LP_OSC 00003FEC +_LVP_OFF 00003F7F +_LVP_ON 00003FFF +_MCLRE_OFF 00003FDF +_MCLRE_ON 00003FFF +_PWRTE_OFF 00003FFF +_PWRTE_ON 00003FF7 +_RC_OSC_CLKOUT 00003FFF +_RC_OSC_NOCLKOUT 00003FFE +_WDT_OFF 00003FFB + gpasm-0.13.7 beta TRM0_IRQ_Pic16F628A.asm2-7-2016 15:16:53 PAGE 11 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +_WDT_ON 00003FFF +_XT_OSC 00003FED +__16F628A 00000001 +count1 00000020 +count2 00000021 +count3 00000022 +main 0000002B +setup 00000015 +status_temp 00000072 +toggle 0000002C +w_temp 00000071 + + +MEMORY USAGE MAP ('X' = Used, '-' = Unused) + +00000000 : X---XXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXXXX XX-------------- +00002000 : -------X-------- ---------------- ---------------- ---------------- + +All other memory blocks unused. + +Program Memory Words Used: 48 + + +Errors : 0 +Warnings : 3 reported, 0 suppressed +Messages : 0 reported, 4 suppressed + diff --git a/resources/examples/Pic/T0_IRQ_Pic16F628A/T0_IRQ_Pic16F628A.simu b/resources/examples/Pic/T0_IRQ_Pic16F628A/T0_IRQ_Pic16F628A.simu new file mode 100644 index 0000000..77934ba --- /dev/null +++ b/resources/examples/Pic/T0_IRQ_Pic16F628A/T0_IRQ_Pic16F628A.simu @@ -0,0 +1,27 @@ + + +Text-5: + + +Ground (0 V)-4: + + +Resistor-3: + + +pic16f628a-2: + + +Led-1: + + +Connector-6: + + +Connector-8: + + +Connector-10: + + + diff --git a/resources/examples/Pic/T1_IRQ_Pic16F628A/README b/resources/examples/Pic/T1_IRQ_Pic16F628A/README new file mode 100644 index 0000000..646bb28 --- /dev/null +++ b/resources/examples/Pic/T1_IRQ_Pic16F628A/README @@ -0,0 +1,16 @@ +;********************************************************************** +; Filename: PIC16F628A_TMR1.asm +; Date: 12 Nov. 2013 +; Author: Lewis Loflin +; Uses TMR1 with ext. 32 kHz crystal to generate interrupt +; that toggles the state of RA5 LED +; 16 mHz crystal +;********************************************************************** + +Set Pic Mhz to 16 + +Assembled with gpasm-0.13.7 (gputils): http://gputils.sourceforge.net/ + gpasm -L -w1 -i -ainhx32 T1_IRQ_Pic16F628A.asm + +Source and explanations about Pic16f628a Timer1: + http://www.bristolwatch.com/PIC16F628A/a4.htm diff --git a/resources/examples/Pic/T1_IRQ_Pic16F628A/T1_IRQ_Pic16F628A.asm b/resources/examples/Pic/T1_IRQ_Pic16F628A/T1_IRQ_Pic16F628A.asm new file mode 100644 index 0000000..95c2436 --- /dev/null +++ b/resources/examples/Pic/T1_IRQ_Pic16F628A/T1_IRQ_Pic16F628A.asm @@ -0,0 +1,119 @@ +;********************************************************************** +; Filename: PIC16F628A_TMR1.asm +; Date: 12 Nov. 2013 +; Author: Lewis Loflin +; Uses TMR1 with ext. 32 kHz crystal to generate interrupt +; that toggles the state of RA5 LED +; 16 mHz crystal +;********************************************************************** + + + list p=16f628A ; list directive to define processor + #include ; processor specific variable definitions + + errorlevel -302 ; suppress message 302 from list file + +__CONFIG _CP_OFF & _LVP_OFF & _BOREN_OFF & _MCLRE_OFF & _WDT_OFF & _PWRTE_ON & _HS_OSC + +; Use _INTOSC_OSC_NOCLKOUT for +; internal 4 mHz osc, no ext reset, use pin RA5 as an input +; Use _HS_OSC for a 16 mHz ext crystal. +; Use _XT_OSC for 4 mHz ext crystal. Page 95 in spec sheet. + +;------------------------------------------------------------ + cblock 0x20 ; Begin General Purpose-Register +;-------------------------- counters + count1 + count2 + count3 + count4 + CNT + + endc +;-------------------------- +#DEFINE pwmu PORTB,3 +;-------------------------- + +;***** VARIABLE DEFINITIONS + +w_temp EQU 0x71 ; variable used for context saving +status_temp EQU 0x72 ; variable used for context saving + +;----------------------------------------------- +RA5 EQU 5 ; + +;********************************************************************** + + ORG 0x000 ; processor reset vector + goto setup ; go to beginning of program + + + ORG 0x004 ; interrupt vector location + movwf w_temp ; save off current W register contents + movf STATUS,w ; move status register into W register + movwf status_temp ; save off contents of STATUS register + +; isr code can go here or be located as a call subroutine elsewhere + + movlw 0x80 ; reload TMR1 + movwf TMR1H + bcf PIR1, TMR1IF ; clr TMR1 interrupt flag + call toggle ; flip state on RA0 + + + movf status_temp,w ; retrieve copy of STATUS register + movwf STATUS ; restore pre-isr STATUS register contents + swapf w_temp,f + swapf w_temp,w ; restore pre-isr W register contents + retfie ; return from interrupt + +;********************************************************************** + +setup ; init PIC16F628A + + movlw 0x07 ; Turn comparators off and enable pins for I/O + movwf CMCON + banksel TRISA ; BSF STATUS,RP0 Jump to bank 1 use BANKSEL instead + clrf TRISA + clrf TRISB + + bsf PIE1, TMR1IE ; enable TMR1 interrupt + banksel INTCON + clrf PORTA + clrf PORTB + bsf INTCON, GIE ; enable global interrupt + bsf INTCON, PEIE ; enable all unmasked interrupts + + bcf PIR1, TMR1IF ; clr TMR1 interrupt flag + clrf T1CON + bsf T1CON, TMR1ON ; Timer1 On bit + bsf T1CON, TMR1CS ; external oscillator crystal + bsf T1CON, 2 ; T1SYNC set to asynchronous + bsf T1CON, T1OSCEN ; Timer1 Oscillator Enable Control bit + ; two lines below same as 5 lines above + ; movlw b'00001111' + ; movwf T1CON + + clrf TMR1L ; set to 0 + movlw 0x80 ; value for 1 sec. delay + movwf TMR1H ; must be reloaded after every interrupt + + goto main + +main +; remaining code goes here + ; do nothing + goto main + + +toggle + btfss PORTA, RA5 + goto $+3 + bcf PORTA, RA5 + return + bsf PORTA, RA5 + return + + END ; directive 'end of program' + + diff --git a/resources/examples/Pic/T1_IRQ_Pic16F628A/T1_IRQ_Pic16F628A.cod b/resources/examples/Pic/T1_IRQ_Pic16F628A/T1_IRQ_Pic16F628A.cod new file mode 100644 index 0000000000000000000000000000000000000000..4649ef07dca9738e3244966786299c5d9a961547 GIT binary patch literal 8192 zcmeI$2XIu!83*v)drb`?ghaCqq8JGqB;5frxC!a$1ZSkX$Ge9l!1l8cLI?vADt4Ua z=Ma%%2XCC_8q$03-RZse?)2&soZ=)d^0)upCnS3&qYQWwW^~N_^ljhUZ?AB(*r`2c zpW5*M`RK|Z8D{)#q1WG&Y-nvrZD^|P9zOVAY%7^;?cJSh*ic~C*CyB2UNB{-)i*dX zTeUkdc->Hc-@cKmnx0iv$&DK~tVz|^udnJG93AODFkCe_G_b$7XJpC*PbieI62_U$ zOj%z_|J1`tHteOXcQc0->#Ax08RxRAP$m!?5Nikvu?-zq01IIe#G0Z6@hpgq33)d- zX68c9%!Qnp3pq2#%v{KsxsWq+A!p`7&di0JnF~2H$IM*FnYoZNb3Jnz;yJJ!&V?1Q z63&D3;R3i2E`n#lv*9^#FmU@!H>gFz`Nlm;iurI;b-7y;pgDz;TPZ+;g{f-r|nnJ^Q-V{@aym!@SE^k z@Z0b^@VjLE;Np7}a`Aom1NcMuBlu(Z6Zlj3Gx&3O5BvrECHxiqHT(_yE&Lt)J^Taw zBm5KmGrSkx2k(auz`wu~@Im-j_&4}>_z(CH{3rYu{5O0UJ^~+wkHK+BAE|T#(~+ZR z0vgbS7PO%Q3t%BEA{jojm?)!=i8-)*l5-JPz)Cm|&W8)&LbwQ?1VbP0Wh?4s zlr6EBQI?`Uso2LTSE3*8hgVCZ1BeeY%Aq&}2mX^XTk;_$^@;}Ni0Ck*8xRdKx&hHJ zqZ<&7FuDQJD5D!7u3@+VYV?d}_z9RzE$J*?%!b+QZ{C71!Cm}imYd9EI}n=`=e7rk zZOcu?^%li(z2ms9mvnP#!uhr=WzuR&RcM`5Xs<_sp`|^E0#}99jn7ksHndb4ZYHnB8g9H8MS3NQ^fH#)9`AXH>9*?~+cH%9wGB5LBxI&n zn69tS%QW4*ug=Lyw5Whv>2ys0Ht$LQ7N7gl@N+>9k(ak)c}A z;p#6pThqRpFJZLiRb(2QCq`tlEvhH8Gua@18pS3R)WMswKHahzi`lYX&#W%4k?}n= zId(P|gv~h=n4=0UQ%Y)ehK`sU}_^hxyIkb~R;@EC$K^j;uPK1cnA`4b#lU zPmLGlydaayhJIS@^9D1Qchx=(!*f+W6E;Onfy#7|>BUd>nCZnQXq#Rptxo(V3Vjup zShPWX+!o?y?9VnlKZWQP!^`X2NKt%2yu4~nP@PJaVfan!F~TzaW}O5>hB^tR@9J9W z;Obh-^6A#7XSRsqyxz-#gs%_S@IAG>MUh(GHvF!QYMUlSx}%l%=v9j9+swSDucBk- z<6CLjG<&dJ-+Oc7=uI=IcU7%LVZ2EuW3~4Lg?W8voFM6LjgQ3CCABZhqBi{sFQXPp zRQv|w1gVpwm@etVw5UywDmR06Up-xJQ<&8I;+8C^^v*_u-X&87eZ=UcZbT^>^tAL; z+I2eT$oiBXjWtsGNveV#k#GWf=Zc@Ep-XDR^rX?IZh)mr>aEDO0zac~#28|ApN^V= z->%*vxe-ick0PBtGw9N1MLFow`=iWs>D`%D&=p^lg%rmZQeb zbFD~6W=<$7KhaVQL3d=nhWkdK0bVHcDt(GF}qOx5X*##V4!K>C*AiFzttQ z>q56}tN!3=950J2v$;vtj}?dMu7E0Jf4Tq02b^$Aexh`Lc}VYva;_)L_h`lBhADGC zGDkM~PaZONQvK8sPS{4zSnuH8g0QXQiJ= zuI)e6b9y#AGs|f|finD;pRp6nD0q-X^*6JUvYM))f+Ori>EY5s=F}f&N9GxG$M{iR zQgNhQMK{hbo?lWXcv*$0D615e$G99>T~l2%ws>{TSa|^(n@9gopLv`CC&1|!m0hfK b)9g)Wz-DK*_>`VNqVXx6erEFjyAyaE6pdrd literal 0 HcmV?d00001 diff --git a/resources/examples/Pic/T1_IRQ_Pic16F628A/T1_IRQ_Pic16F628A.lst b/resources/examples/Pic/T1_IRQ_Pic16F628A/T1_IRQ_Pic16F628A.lst new file mode 100644 index 0000000..3000192 --- /dev/null +++ b/resources/examples/Pic/T1_IRQ_Pic16F628A/T1_IRQ_Pic16F628A.lst @@ -0,0 +1,648 @@ +gpasm-0.13.7 beta T1_IRQ_Pic16F628A.asm2-11-2016 21:04:55 PAGE 1 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00001 + 00002 + 00003 ;********************************************************************** + 00004 ; Filename: PIC16F628A_TMR1.asm + 00005 ; Date: 12 Nov. 2013 + 00006 ; Author: Lewis Loflin + 00007 ; Uses TMR1 with ext. 32 kHz crystal to generate interrupt + 00008 ; that toggles the state of RA5 LED + 00009 ; 16 mHz crystal + 00010 ;********************************************************************** + 00011 + 00012 + 00013 list p=16f628A ; list directive to define processor + 00014 #include ; processor specific variable definitions +Warning [231] : found lower case match for include filename + 00001 LIST + 00002 ; P16F628A.INC Standard Header File, Version 1.10 Microchip Technology, Inc. + 00003 NOLIST + 00004 + 00005 ; This header file defines configurations, registers, and other useful bits of + 00006 ; information for the PIC16F628A microcontroller. These names are taken to match + 00007 ; the data sheets as closely as possible. + 00008 + 00009 ; Note that the processor must be selected before this file is + 00010 ; included. The processor may be selected the following ways: + 00011 + 00012 ; 1. Command line switch: + 00013 ; C:\ MPASM MYFILE.ASM /PIC16F628A + 00014 ; 2. LIST directive in the source file + 00015 ; LIST P=PIC16F628A + 00016 ; 3. Processor Type entry in the MPASM full-screen interface + 00017 + 00018 ;========================================================================== + 00019 ; + 00020 ; Revision History + 00021 ; + 00022 ;========================================================================== + 00023 + 00024 ;Rev: Date: Reason: + 00025 ;1.01 14 Nov 2002 Updated to reflect BOD terminology changed to BOR + 00026 ;1.00 22 Aug 2002 Initial Release + 00027 + 00028 ;========================================================================== + 00029 ; + 00030 ; Verify Processor + 00031 ; + 00032 ;========================================================================== + 00033 + 00034 IFNDEF __16F628A + 00035 MESSG "Processor-header file mismatch. Verify selected processor." + 00036 ENDIF + 00037 + 00038 ;========================================================================== + 00039 ; + gpasm-0.13.7 beta T1_IRQ_Pic16F628A.asm2-11-2016 21:04:55 PAGE 2 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00040 ; Register Definitions + 00041 ; + 00042 ;========================================================================== + 00043 + 00000000 00044 W EQU H'0000' + 00000001 00045 F EQU H'0001' + 00046 + 00047 ;----- Register Files------------------------------------------------------ + 00048 + 00000000 00049 INDF EQU H'0000' + 00000001 00050 TMR0 EQU H'0001' + 00000002 00051 PCL EQU H'0002' + 00000003 00052 STATUS EQU H'0003' + 00000004 00053 FSR EQU H'0004' + 00000005 00054 PORTA EQU H'0005' + 00000006 00055 PORTB EQU H'0006' + 0000000A 00056 PCLATH EQU H'000A' + 0000000B 00057 INTCON EQU H'000B' + 0000000C 00058 PIR1 EQU H'000C' + 0000000E 00059 TMR1L EQU H'000E' + 0000000F 00060 TMR1H EQU H'000F' + 00000010 00061 T1CON EQU H'0010' + 00000011 00062 TMR2 EQU H'0011' + 00000012 00063 T2CON EQU H'0012' + 00000015 00064 CCPR1L EQU H'0015' + 00000016 00065 CCPR1H EQU H'0016' + 00000017 00066 CCP1CON EQU H'0017' + 00000018 00067 RCSTA EQU H'0018' + 00000019 00068 TXREG EQU H'0019' + 0000001A 00069 RCREG EQU H'001A' + 0000001F 00070 CMCON EQU H'001F' + 00071 + 00000081 00072 OPTION_REG EQU H'0081' + 00000085 00073 TRISA EQU H'0085' + 00000086 00074 TRISB EQU H'0086' + 0000008C 00075 PIE1 EQU H'008C' + 0000008E 00076 PCON EQU H'008E' + 00000092 00077 PR2 EQU H'0092' + 00000098 00078 TXSTA EQU H'0098' + 00000099 00079 SPBRG EQU H'0099' + 0000009A 00080 EEDATA EQU H'009A' + 0000009B 00081 EEADR EQU H'009B' + 0000009C 00082 EECON1 EQU H'009C' + 0000009D 00083 EECON2 EQU H'009D' + 0000009F 00084 VRCON EQU H'009F' + 00085 + 00086 ;----- STATUS Bits -------------------------------------------------------- + 00087 + 00000007 00088 IRP EQU H'0007' + 00000006 00089 RP1 EQU H'0006' + 00000005 00090 RP0 EQU H'0005' + 00000004 00091 NOT_TO EQU H'0004' + 00000003 00092 NOT_PD EQU H'0003' + 00000002 00093 Z EQU H'0002' + gpasm-0.13.7 beta T1_IRQ_Pic16F628A.asm2-11-2016 21:04:55 PAGE 3 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00000001 00094 DC EQU H'0001' + 00000000 00095 C EQU H'0000' + 00096 + 00097 ;----- INTCON Bits -------------------------------------------------------- + 00098 + 00000007 00099 GIE EQU H'0007' + 00000006 00100 PEIE EQU H'0006' + 00000005 00101 T0IE EQU H'0005' + 00000004 00102 INTE EQU H'0004' + 00000003 00103 RBIE EQU H'0003' + 00000002 00104 T0IF EQU H'0002' + 00000001 00105 INTF EQU H'0001' + 00000000 00106 RBIF EQU H'0000' + 00107 + 00108 ;----- PIR1 Bits ---------------------------------------------------------- + 00109 + 00000007 00110 EEIF EQU H'0007' + 00000006 00111 CMIF EQU H'0006' + 00000005 00112 RCIF EQU H'0005' + 00000004 00113 TXIF EQU H'0004' + 00000002 00114 CCP1IF EQU H'0002' + 00000001 00115 TMR2IF EQU H'0001' + 00000000 00116 TMR1IF EQU H'0000' + 00117 + 00118 ;----- T1CON Bits --------------------------------------------------------- + 00000005 00119 T1CKPS1 EQU H'0005' + 00000004 00120 T1CKPS0 EQU H'0004' + 00000003 00121 T1OSCEN EQU H'0003' + 00000002 00122 NOT_T1SYNC EQU H'0002' + 00000001 00123 TMR1CS EQU H'0001' + 00000000 00124 TMR1ON EQU H'0000' + 00125 + 00126 ;----- T2CON Bits --------------------------------------------------------- + 00000006 00127 TOUTPS3 EQU H'0006' + 00000005 00128 TOUTPS2 EQU H'0005' + 00000004 00129 TOUTPS1 EQU H'0004' + 00000003 00130 TOUTPS0 EQU H'0003' + 00000002 00131 TMR2ON EQU H'0002' + 00000001 00132 T2CKPS1 EQU H'0001' + 00000000 00133 T2CKPS0 EQU H'0000' + 00134 + 00135 ;----- CCP1CON Bits --------------------------------------------------------- + 00000005 00136 CCP1X EQU H'0005' + 00000004 00137 CCP1Y EQU H'0004' + 00000003 00138 CCP1M3 EQU H'0003' + 00000002 00139 CCP1M2 EQU H'0002' + 00000001 00140 CCP1M1 EQU H'0001' + 00000000 00141 CCP1M0 EQU H'0000' + 00142 + 00143 ;----- RCSTA Bits --------------------------------------------------------- + 00000007 00144 SPEN EQU H'0007' + 00000006 00145 RX9 EQU H'0006' + 00000005 00146 SREN EQU H'0005' + 00000004 00147 CREN EQU H'0004' + gpasm-0.13.7 beta T1_IRQ_Pic16F628A.asm2-11-2016 21:04:55 PAGE 4 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00000003 00148 ADEN EQU H'0003' + 00000002 00149 FERR EQU H'0002' + 00000001 00150 OERR EQU H'0001' + 00000000 00151 RX9D EQU H'0000' + 00152 + 00153 ;----- CMCON Bits --------------------------------------------------------- + 00154 + 00000007 00155 C2OUT EQU H'0007' + 00000006 00156 C1OUT EQU H'0006' + 00000005 00157 C2INV EQU H'0005' + 00000004 00158 C1INV EQU H'0004' + 00000003 00159 CIS EQU H'0003' + 00000002 00160 CM2 EQU H'0002' + 00000001 00161 CM1 EQU H'0001' + 00000000 00162 CM0 EQU H'0000' + 00163 + 00164 ;----- OPTION Bits -------------------------------------------------------- + 00165 + 00000007 00166 NOT_RBPU EQU H'0007' + 00000006 00167 INTEDG EQU H'0006' + 00000005 00168 T0CS EQU H'0005' + 00000004 00169 T0SE EQU H'0004' + 00000003 00170 PSA EQU H'0003' + 00000002 00171 PS2 EQU H'0002' + 00000001 00172 PS1 EQU H'0001' + 00000000 00173 PS0 EQU H'0000' + 00174 + 00175 ;----- PIE1 Bits ---------------------------------------------------------- + 00176 + 00000007 00177 EEIE EQU H'0007' + 00000006 00178 CMIE EQU H'0006' + 00000005 00179 RCIE EQU H'0005' + 00000004 00180 TXIE EQU H'0004' + 00000002 00181 CCP1IE EQU H'0002' + 00000001 00182 TMR2IE EQU H'0001' + 00000000 00183 TMR1IE EQU H'0000' + 00184 + 00185 ;----- PCON Bits ---------------------------------------------------------- + 00186 + 00000003 00187 OSCF EQU H'0003' + 00000001 00188 NOT_POR EQU H'0001' + 00000000 00189 NOT_BO EQU H'0000' + 00000000 00190 NOT_BOR EQU H'0000' + 00000000 00191 NOT_BOD EQU H'0000' ;Backwards compatability to 16F62X + 00192 + 00193 ;----- TXSTA Bits ---------------------------------------------------------- + 00000007 00194 CSRC EQU H'0007' + 00000006 00195 TX9 EQU H'0006' + 00000005 00196 TXEN EQU H'0005' + 00000004 00197 SYNC EQU H'0004' + 00000002 00198 BRGH EQU H'0002' + 00000001 00199 TRMT EQU H'0001' + 00000000 00200 TX9D EQU H'0000' + 00201 + gpasm-0.13.7 beta T1_IRQ_Pic16F628A.asm2-11-2016 21:04:55 PAGE 5 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00202 ;----- EECON1 Bits --------------------------------------------------------- + 00000003 00203 WRERR EQU H'0003' + 00000002 00204 WREN EQU H'0002' + 00000001 00205 WR EQU H'0001' + 00000000 00206 RD EQU H'0000' + 00207 + 00208 ;----- VRCON Bits --------------------------------------------------------- + 00209 + 00000007 00210 VREN EQU H'0007' + 00000006 00211 VROE EQU H'0006' + 00000005 00212 VRR EQU H'0005' + 00000003 00213 VR3 EQU H'0003' + 00000002 00214 VR2 EQU H'0002' + 00000001 00215 VR1 EQU H'0001' + 00000000 00216 VR0 EQU H'0000' + 00217 + 00218 ;========================================================================== + 00219 ; + 00220 ; RAM Definition + 00221 ; + 00222 ;========================================================================== + 00223 + 00224 __MAXRAM H'01FF' + 00225 __BADRAM H'07'-H'09', H'0D', H'13'-H'14', H'1B'-H'1E' + 00226 __BADRAM H'87'-H'89', H'8D', H'8F'-H'91', H'93'-H'97', H'9E' + 00227 __BADRAM H'105', H'107'-H'109', H'10C'-H'11F', H'150'-H'16F' + 00228 __BADRAM H'185', H'187'-H'189', H'18C'-H'1EF' + 00229 + 00230 ;========================================================================== + 00231 ; + 00232 ; Configuration Bits + 00233 ; + 00234 ;========================================================================== + 00235 + 00003FFF 00236 _BODEN_ON EQU H'3FFF' ;Backwards compatability to 16F62X + 00003FBF 00237 _BODEN_OFF EQU H'3FBF' ;Backwards compatability to 16F62X + 00003FFF 00238 _BOREN_ON EQU H'3FFF' + 00003FBF 00239 _BOREN_OFF EQU H'3FBF' + 00001FFF 00240 _CP_ON EQU H'1FFF' + 00003FFF 00241 _CP_OFF EQU H'3FFF' + 00003EFF 00242 _DATA_CP_ON EQU H'3EFF' + 00003FFF 00243 _DATA_CP_OFF EQU H'3FFF' + 00003FFF 00244 _PWRTE_OFF EQU H'3FFF' + 00003FF7 00245 _PWRTE_ON EQU H'3FF7' + 00003FFF 00246 _WDT_ON EQU H'3FFF' + 00003FFB 00247 _WDT_OFF EQU H'3FFB' + 00003FFF 00248 _LVP_ON EQU H'3FFF' + 00003F7F 00249 _LVP_OFF EQU H'3F7F' + 00003FFF 00250 _MCLRE_ON EQU H'3FFF' + 00003FDF 00251 _MCLRE_OFF EQU H'3FDF' + 00003FFF 00252 _RC_OSC_CLKOUT EQU H'3FFF' + 00003FFE 00253 _RC_OSC_NOCLKOUT EQU H'3FFE' + 00003FFF 00254 _ER_OSC_CLKOUT EQU H'3FFF' ;Backwards compatability to 16F62X + 00003FFE 00255 _ER_OSC_NOCLKOUT EQU H'3FFE' ;Backwards compatability to 16F62X + gpasm-0.13.7 beta T1_IRQ_Pic16F628A.asm2-11-2016 21:04:55 PAGE 6 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00003FFD 00256 _INTOSC_OSC_CLKOUT EQU H'3FFD' + 00003FFC 00257 _INTOSC_OSC_NOCLKOUT EQU H'3FFC' + 00003FFD 00258 _INTRC_OSC_CLKOUT EQU H'3FFD' ;Backwards compatability to 16F62X + 00003FFC 00259 _INTRC_OSC_NOCLKOUT EQU H'3FFC' ;Backwards compatability to 16F62X + 00003FEF 00260 _EXTCLK_OSC EQU H'3FEF' + 00003FEE 00261 _HS_OSC EQU H'3FEE' + 00003FED 00262 _XT_OSC EQU H'3FED' + 00003FEC 00263 _LP_OSC EQU H'3FEC' + 00264 + 00265 LIST + 00266 + 00015 + 00016 errorlevel -302 ; suppress message 302 from list file + 00017 +Warning [205] : Found directive in column 1. +002007 3F02 00018 __CONFIG _CP_OFF & _LVP_OFF & _BOREN_OFF & _MCLRE_OFF & _WDT_OFF & _PWRTE_ON & _HS_OSC + 00019 + 00020 ; Use _INTOSC_OSC_NOCLKOUT for + 00021 ; internal 4 mHz osc, no ext reset, use pin RA5 as an input + 00022 ; Use _HS_OSC for a 16 mHz ext crystal. + 00023 ; Use _XT_OSC for 4 mHz ext crystal. Page 95 in spec sheet. + 00024 + 00025 ;------------------------------------------------------------ + 00026 cblock 0x20 ; Begin General Purpose-Register + 00027 ;-------------------------- counters + 00028 count1 + 00029 count2 + 00030 count3 + 00031 count4 + 00032 CNT + 00033 + 00034 endc + 00035 ;-------------------------- +0000 00036 #DEFINE pwmu PORTB,3 + 00037 ;-------------------------- + 00038 + 00039 ;***** VARIABLE DEFINITIONS + 00040 + 00000071 00041 w_temp EQU 0x71 ; variable used for context saving + 00000072 00042 status_temp EQU 0x72 ; variable used for context saving + 00043 + 00044 ;----------------------------------------------- + 00000005 00045 RA5 EQU 5 ; + 00046 + 00047 ;********************************************************************** + 00048 +0000 00049 ORG 0x000 ; processor reset vector +0000 2810 00050 goto setup ; go to beginning of program + 00051 + 00052 +0004 00053 ORG 0x004 ; interrupt vector location +0004 00F1 00054 movwf w_temp ; save off current W register contents +0005 0803 00055 movf STATUS,w ; move status register into W register +0006 00F2 00056 movwf status_temp ; save off contents of STATUS register + gpasm-0.13.7 beta T1_IRQ_Pic16F628A.asm2-11-2016 21:04:55 PAGE 7 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + + 00057 + 00058 ; isr code can go here or be located as a call subroutine elsewhere + 00059 +0007 3080 00060 movlw 0x80 ; reload TMR1 +0008 008F 00061 movwf TMR1H +0009 100C 00062 bcf PIR1, TMR1IF ; clr TMR1 interrupt flag +000A 2028 00063 call toggle ; flip state on RA0 + 00064 + 00065 +000B 0872 00066 movf status_temp,w ; retrieve copy of STATUS register +000C 0083 00067 movwf STATUS ; restore pre-isr STATUS register contents +000D 0EF1 00068 swapf w_temp,f +000E 0E71 00069 swapf w_temp,w ; restore pre-isr W register contents +000F 0009 00070 retfie ; return from interrupt + 00071 + 00072 ;********************************************************************** + 00073 +0010 00074 setup ; init PIC16F628A + 00075 +0010 3007 00076 movlw 0x07 ; Turn comparators off and enable pins for I/O +0011 009F 00077 movwf CMCON +0012 1683 1303 00078 banksel TRISA ; BSF STATUS,RP0 Jump to bank 1 use BANKSEL instead +0014 0185 00079 clrf TRISA +0015 0186 00080 clrf TRISB + 00081 +0016 140C 00082 bsf PIE1, TMR1IE ; enable TMR1 interrupt +0017 1283 1303 00083 banksel INTCON +0019 0185 00084 clrf PORTA +001A 0186 00085 clrf PORTB +001B 178B 00086 bsf INTCON, GIE ; enable global interrupt +001C 170B 00087 bsf INTCON, PEIE ; enable all unmasked interrupts + 00088 +001D 100C 00089 bcf PIR1, TMR1IF ; clr TMR1 interrupt flag +001E 0190 00090 clrf T1CON +001F 1410 00091 bsf T1CON, TMR1ON ; Timer1 On bit +0020 1490 00092 bsf T1CON, TMR1CS ; external oscillator crystal +0021 1510 00093 bsf T1CON, 2 ; T1SYNC set to asynchronous +0022 1590 00094 bsf T1CON, T1OSCEN ; Timer1 Oscillator Enable Control bit + 00095 ; two lines below same as 5 lines above + 00096 ; movlw b'00001111' + 00097 ; movwf T1CON + 00098 +0023 018E 00099 clrf TMR1L ; set to 0 +0024 3080 00100 movlw 0x80 ; value for 1 sec. delay +0025 008F 00101 movwf TMR1H ; must be reloaded after every interrupt + 00102 +0026 2827 00103 goto main + 00104 +0027 00105 main + 00106 ; remaining code goes here + 00107 ; do nothing +0027 2827 00108 goto main + 00109 + 00110 + gpasm-0.13.7 beta T1_IRQ_Pic16F628A.asm2-11-2016 21:04:55 PAGE 8 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +0028 00111 toggle +0028 1E85 00112 btfss PORTA, RA5 +0029 282C 00113 goto $+3 +002A 1285 00114 bcf PORTA, RA5 +002B 0008 00115 return +002C 1685 00116 bsf PORTA, RA5 +002D 0008 00117 return + 00118 + gpasm-0.13.7 beta T1_IRQ_Pic16F628A.asm2-11-2016 21:04:55 PAGE 9 + + +SYMBOL TABLE + LABEL VALUE + +ADEN 00000003 +BRGH 00000002 +C 00000000 +C1INV 00000004 +C1OUT 00000006 +C2INV 00000005 +C2OUT 00000007 +CCP1CON 00000017 +CCP1IE 00000002 +CCP1IF 00000002 +CCP1M0 00000000 +CCP1M1 00000001 +CCP1M2 00000002 +CCP1M3 00000003 +CCP1X 00000005 +CCP1Y 00000004 +CCPR1H 00000016 +CCPR1L 00000015 +CIS 00000003 +CM0 00000000 +CM1 00000001 +CM2 00000002 +CMCON 0000001F +CMIE 00000006 +CMIF 00000006 +CNT 00000024 +CREN 00000004 +CSRC 00000007 +DC 00000001 +EEADR 0000009B +EECON1 0000009C +EECON2 0000009D +EEDATA 0000009A +EEIE 00000007 +EEIF 00000007 +F 00000001 +FERR 00000002 +FSR 00000004 +GIE 00000007 +INDF 00000000 +INTCON 0000000B +INTE 00000004 +INTEDG 00000006 +INTF 00000001 +IRP 00000007 +NOT_BO 00000000 +NOT_BOD 00000000 +NOT_BOR 00000000 +NOT_PD 00000003 +NOT_POR 00000001 +NOT_RBPU 00000007 +NOT_T1SYNC 00000002 +NOT_TO 00000004 + gpasm-0.13.7 beta T1_IRQ_Pic16F628A.asm2-11-2016 21:04:55 PAGE 10 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +OERR 00000001 +OPTION_REG 00000081 +OSCF 00000003 +PCL 00000002 +PCLATH 0000000A +PCON 0000008E +PEIE 00000006 +PIE1 0000008C +PIR1 0000000C +PORTA 00000005 +PORTB 00000006 +PR2 00000092 +PS0 00000000 +PS1 00000001 +PS2 00000002 +PSA 00000003 +RA5 00000005 +RBIE 00000003 +RBIF 00000000 +RCIE 00000005 +RCIF 00000005 +RCREG 0000001A +RCSTA 00000018 +RD 00000000 +RP0 00000005 +RP1 00000006 +RX9 00000006 +RX9D 00000000 +SPBRG 00000099 +SPEN 00000007 +SREN 00000005 +STATUS 00000003 +SYNC 00000004 +T0CS 00000005 +T0IE 00000005 +T0IF 00000002 +T0SE 00000004 +T1CKPS0 00000004 +T1CKPS1 00000005 +T1CON 00000010 +T1OSCEN 00000003 +T2CKPS0 00000000 +T2CKPS1 00000001 +T2CON 00000012 +TMR0 00000001 +TMR1CS 00000001 +TMR1H 0000000F +TMR1IE 00000000 +TMR1IF 00000000 +TMR1L 0000000E +TMR1ON 00000000 +TMR2 00000011 +TMR2IE 00000001 +TMR2IF 00000001 + gpasm-0.13.7 beta T1_IRQ_Pic16F628A.asm2-11-2016 21:04:55 PAGE 11 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +TMR2ON 00000002 +TOUTPS0 00000003 +TOUTPS1 00000004 +TOUTPS2 00000005 +TOUTPS3 00000006 +TRISA 00000085 +TRISB 00000086 +TRMT 00000001 +TX9 00000006 +TX9D 00000000 +TXEN 00000005 +TXIE 00000004 +TXIF 00000004 +TXREG 00000019 +TXSTA 00000098 +VR0 00000000 +VR1 00000001 +VR2 00000002 +VR3 00000003 +VRCON 0000009F +VREN 00000007 +VROE 00000006 +VRR 00000005 +W 00000000 +WR 00000001 +WREN 00000002 +WRERR 00000003 +Z 00000002 +_BODEN_OFF 00003FBF +_BODEN_ON 00003FFF +_BOREN_OFF 00003FBF +_BOREN_ON 00003FFF +_CP_OFF 00003FFF +_CP_ON 00001FFF +_DATA_CP_OFF 00003FFF +_DATA_CP_ON 00003EFF +_ER_OSC_CLKOUT 00003FFF +_ER_OSC_NOCLKOUT 00003FFE +_EXTCLK_OSC 00003FEF +_HS_OSC 00003FEE +_INTOSC_OSC_CLKOUT 00003FFD +_INTOSC_OSC_NOCLKOUT 00003FFC +_INTRC_OSC_CLKOUT 00003FFD +_INTRC_OSC_NOCLKOUT 00003FFC +_LP_OSC 00003FEC +_LVP_OFF 00003F7F +_LVP_ON 00003FFF +_MCLRE_OFF 00003FDF +_MCLRE_ON 00003FFF +_PWRTE_OFF 00003FFF +_PWRTE_ON 00003FF7 +_RC_OSC_CLKOUT 00003FFF +_RC_OSC_NOCLKOUT 00003FFE +_WDT_OFF 00003FFB + gpasm-0.13.7 beta T1_IRQ_Pic16F628A.asm2-11-2016 21:04:55 PAGE 12 + + +LOC OBJECT CODE LINE SOURCE TEXT + VALUE + +_WDT_ON 00003FFF +_XT_OSC 00003FED +__16F628A 00000001 +count1 00000020 +count2 00000021 +count3 00000022 +count4 00000023 +main 00000027 +setup 00000010 +status_temp 00000072 +toggle 00000028 +w_temp 00000071 +pwmu PORTB,3 + + +MEMORY USAGE MAP ('X' = Used, '-' = Unused) + +00000000 : X---XXXXXXXXXXXX XXXXXXXXXXXXXXXX XXXXXXXXXXXXXX-- ---------------- +00002000 : -------X-------- ---------------- ---------------- ---------------- + +All other memory blocks unused. + +Program Memory Words Used: 44 + + +Errors : 0 +Warnings : 2 reported, 0 suppressed +Messages : 0 reported, 3 suppressed + diff --git a/resources/examples/Pic/T1_IRQ_Pic16F628A/T1_IRQ_Pic16F628A.simu b/resources/examples/Pic/T1_IRQ_Pic16F628A/T1_IRQ_Pic16F628A.simu new file mode 100644 index 0000000..0a5cd0f --- /dev/null +++ b/resources/examples/Pic/T1_IRQ_Pic16F628A/T1_IRQ_Pic16F628A.simu @@ -0,0 +1,24 @@ + + +Ground (0 V)-4: + + +Resistor-3: + + +Led-2: + + +pic16f628a-1: + + +Connector-5: + + +Connector-7: + + +Connector-9: + + + diff --git a/resources/examples/Pic/Timer1_Pic16F689/PICTimer.c b/resources/examples/Pic/Timer1_Pic16F689/PICTimer.c new file mode 100644 index 0000000..966c250 --- /dev/null +++ b/resources/examples/Pic/Timer1_Pic16F689/PICTimer.c @@ -0,0 +1,525 @@ +/*************************************************************************** + * Copyright (C) 2018 by hovercraft: * + * https://github.com/hovercraft-github * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + +#include +#include + +/*************************************************************************** +* * +* This source code is optimized for use with SDCC compiler and piklab IDE * +* * +****************************************************************************/ + +/* ----------------------------------------------------------------------- */ +/* Configuration bits: adapt to your setup and needs */ +typedef unsigned int word; +word __at 0x2007 CONFIG = _INTRC_OSC_NOCLKOUT & _WDT_ON & _PWRTE_ON & _MCLRE_OFF & _CP_OFF & _CPD_OFF & _BOR_OFF & _IESO_ON & _FCMEN_ON; + +//#define GPSIM + +#define COL_Msd RA1 +#define COL_Lsd RA5 +#define COL_ON 1 +#define COL_OFF 0 +#define COL_IX_Msd 0 +#define COL_IX_Lsd 1 + +/* +#define SEGM_A RC0 +#define SEGM_B RC1 +#define SEGM_C RC2 +#define SEGM_D RC3 +#define SEGM_E RC4 +#define SEGM_F RC5 +#define SEGM_G RC6 +#define SEGM_ON 1 +#define SEGM_OFF 0 +*/ + +#define SEGMENTS_OFF 0 +#define SEGMENTS_0 0x3F +#define SEGMENTS_1 0x06 +#define SEGMENTS_2 0x5B +#define SEGMENTS_3 0x4F +#define SEGMENTS_4 0x66 +#define SEGMENTS_5 0x6D +#define SEGMENTS_6 0x7D +#define SEGMENTS_7 0x07 +#define SEGMENTS_8 0x7F +#define SEGMENTS_9 0x6F +#define SEGMENTS_E 0x79 + +#define LOAD1 RB4 +#define LOAD2 RB5 +#define LOAD3 RB6 +#define LOAD_ON 1 +#define LOAD_OFF 0 + +#define BUZZER RA0 +#define BUZZER_ON 1 +#define BUZZER_OFF 0 + +#define KEY_TOGGLE_MASK 2 // RC1 +#define KEY_UP_MASK 0x10 // RC4 +#define KEY_DOWN_MASK 0x20 // RC5 +#define KEY_OK_MASK 0x40 // RC6 +#define KEYS_MASK (KEY_TOGGLE_MASK | KEY_UP_MASK | KEY_DOWN_MASK | KEY_OK_MASK) + +#define EEPROM_IX_FLAG 0 +#define EEPROM_IX_MINUTES 1 + +#define clrwdt() \ + __asm \ + CLRWDT \ + __endasm + +typedef enum KeyPressedComb { + PRESSED_NONE=0, + PRESSED_TOGGLE=KEY_TOGGLE_MASK, + PRESSED_UP=KEY_UP_MASK, + PRESSED_DOWN=KEY_DOWN_MASK, + PRESSED_CANCEL=KEY_UP_MASK | KEY_DOWN_MASK, + PRESSED_OK=KEY_OK_MASK, +}; + +typedef enum OpModes { + MODE_Idle = 0, + MODE_Work, + MODE_EditMsd, // edit the most significant digit + MODE_EditLsd, // edit the least significant digit +}; + +volatile uint8_t clk = 0; +volatile uint8_t sec = 0; +volatile uint8_t min_left = 10; +uint8_t mode = MODE_Work; + +/* Adjust to your clock frequency (in Hz). */ +/* Instructions per millisecond. */ +#define INSNS_PER_MS ((4U*1000U/4000U*1000U)) +/* Delay loop is about 10 cycles per iteration. */ +#define LOOPS_PER_MS (INSNS_PER_MS / 10U) +void delay_ms(uint16_t ms) { + uint16_t u; + while (ms--) { + /* Inner loop takes about 10 cycles per iteration + 4 cycles setup. */ + for (u = 0; u < LOOPS_PER_MS; u++) { + /* Prevent this loop from being optimized away. */ + __asm nop __endasm; + } + } +} + +uint8_t ee_write_byte(uint8_t address, uint8_t *_data){ + uint8_t int_enabled = GIE; + EEDATA = *_data; + EEADR = address; + // start write sequence as described in datasheet, page 91 + EEPGD = 0; + //CFGS = 0; + WREN = 1; // enable writes to data EEPROM + GIE = 0; // disable interrupts + EECON2 = 0x55; + EECON2 = 0x0AA; + WR = 1; // start writing + while (WR) { + __asm nop __endasm;} + if (WRERR) { + return 0; + } + WREN = 0; + GIE = int_enabled; // restore the interrupts enable state + return 1; +} + +void ee_read_byte(uint8_t address, uint8_t *_data){ + EEADR = address; + //CFGS = 0; + EEPGD = 0; + RD = 1; + *_data = EEDATA; +} + +void store_minutes(void) { + uint8_t flag; + flag = 'T'; + ee_write_byte(EEPROM_IX_FLAG, &flag); + ee_write_byte(EEPROM_IX_MINUTES, &min_left); +} + +void retrieve_minutes(void) { + uint8_t flag; + ee_read_byte(EEPROM_IX_FLAG, &flag); + if (flag != 'T') { + min_left = 10; + store_minutes(); + } else { + ee_read_byte(EEPROM_IX_MINUTES, &min_left); + } +} + + uint8_t scanKeys(void) { + uint8_t keys_state; + // Switch key pins to input mode + TRISC |= KEYS_MASK; + delay_ms(1); + keys_state = PORTC; + TRISC &= ~KEYS_MASK; + PORTC = SEGMENTS_OFF; + keys_state = (~keys_state) & KEYS_MASK; + // Switch key pins to output mode + if ((keys_state & KEY_UP_MASK) && (keys_state & KEY_DOWN_MASK)) + return PRESSED_OK; + switch (keys_state) { + case PRESSED_TOGGLE: + return PRESSED_TOGGLE; + break; + case PRESSED_CANCEL: + return PRESSED_CANCEL; + break; + case PRESSED_OK: + return PRESSED_OK; + break; + case PRESSED_UP: + return PRESSED_UP; + break; + case PRESSED_DOWN: + return PRESSED_DOWN; + break; + default: + return PRESSED_NONE; + break; + } +} + +uint8_t bin2decimal(uint8_t n, uint8_t pos) { + //n - binary number + //d2...d0 - decimal numbers + uint8_t d2 = 0, d1, d0; + d1 = n / 10; + d2 = d1 / 10; + if (d1 > 9) { + d1 = d1 % 10; + } + d0 = n - d2 * 100 - d1 * 10; + // d2 always ignored + if (pos == COL_IX_Lsd) + return d0; + return d1; +} + +void segments_off(void) { + COL_Msd = COL_OFF; + COL_Lsd = COL_OFF; + PORTC = SEGMENTS_OFF; +} + +void segments_on(char c, uint8_t col_ix) { + switch (c) { + case '0': + PORTC = SEGMENTS_0; + break; + case '1': + PORTC = SEGMENTS_1; + break; + case '2': + PORTC = SEGMENTS_2; + break; + case '3': + PORTC = SEGMENTS_3; + break; + case '4': + PORTC = SEGMENTS_4; + break; + case '5': + PORTC = SEGMENTS_5; + break; + case '6': + PORTC = SEGMENTS_6; + break; + case '7': + PORTC = SEGMENTS_7; + break; + case '8': + PORTC = SEGMENTS_8; + break; + case '9': + PORTC = SEGMENTS_9; + break; + case 'E': + PORTC = SEGMENTS_E; + break; + default: + PORTC = SEGMENTS_OFF; + break; + } + if (col_ix == COL_IX_Msd) + COL_Msd = COL_ON; + else + COL_Lsd = COL_ON; +} + +volatile uint8_t toggle = 0; +volatile uint8_t kbstate_prev = PRESSED_NONE; + +void show_digit(void) { + uint8_t value; + uint8_t kbstate; + segments_off(); + kbstate = scanKeys(); + if ((kbstate != PRESSED_NONE) && (kbstate != kbstate_prev)) { + BUZZER = BUZZER_OFF; + switch (mode) { + case MODE_EditLsd: + if (toggle < 2) + toggle = 2; + switch (kbstate) { + case PRESSED_CANCEL: + mode = MODE_Idle; + toggle = 2; + break; + case PRESSED_OK: + store_minutes(); + mode = MODE_Idle; + toggle = 2; + break; + case PRESSED_TOGGLE: + mode = MODE_EditMsd; + break; + case PRESSED_UP: + value = bin2decimal(min_left, COL_IX_Lsd) + 1; + if (value > 9) + value = 0; + min_left = bin2decimal(min_left, COL_IX_Msd)*10 + value; + break; + case PRESSED_DOWN: + value = bin2decimal(min_left, COL_IX_Lsd); + if (value > 0) + value -= 1; + else + value = 9; + min_left = bin2decimal(min_left, COL_IX_Msd)*10 + value; + break; + }; + break; + case MODE_EditMsd: + if (toggle < 2) + toggle = 2; + switch (kbstate) { + case PRESSED_CANCEL: + mode = MODE_Idle; + toggle = 2; + break; + case PRESSED_OK: + store_minutes(); + mode = MODE_Idle; + toggle = 2; + break; + case PRESSED_TOGGLE: + mode = MODE_EditLsd; + break; + case PRESSED_UP: + value = bin2decimal(min_left, COL_IX_Msd) + 1; + if (value > 9) + value = 0; + min_left = bin2decimal(min_left, COL_IX_Lsd) + value*10; + break; + case PRESSED_DOWN: + value = bin2decimal(min_left, COL_IX_Msd); + if (value > 0) + value -= 1; + else + value = 9; + min_left = bin2decimal(min_left, COL_IX_Lsd) + value*10; + break; + }; + break; + case MODE_Idle: + retrieve_minutes(); + if (kbstate == PRESSED_OK) { + mode = MODE_Work; + toggle = 0; + LOAD1 = LOAD_ON; + LOAD2 = LOAD_ON; + LOAD3 = LOAD_ON; + sec = 0; + } else if (kbstate == PRESSED_TOGGLE) { + mode = MODE_EditLsd; + toggle = 2; + } + break; + case MODE_Work: + default: + LOAD1 = LOAD_OFF; + LOAD2 = LOAD_OFF; + LOAD3 = LOAD_OFF; + toggle = 2; + if (kbstate == PRESSED_TOGGLE) { + mode = MODE_EditLsd; + } + else + mode = MODE_Idle; + break; + }; + } + kbstate_prev = kbstate; + if (toggle == 0) { + toggle = 1; + value = bin2decimal(min_left, toggle); + segments_on('0' + value, toggle); + } else if (toggle == 1) { + toggle = 0; + value = bin2decimal(min_left, toggle); + segments_on('0' + value, toggle); + } else { + toggle++; + if (mode == MODE_EditLsd || mode == MODE_EditMsd) { + if (toggle < 100) { // dim the edited position + if (mode == MODE_EditLsd) { + if (toggle % 2 == COL_IX_Msd) + segments_on('0' + bin2decimal(min_left, COL_IX_Msd), COL_IX_Msd); // show only msd + } else if (mode == MODE_EditMsd) { + if (toggle % 2 == COL_IX_Lsd) + segments_on('0' + bin2decimal(min_left, COL_IX_Lsd), COL_IX_Lsd); // show only lsd + } else { + segments_on('0' + bin2decimal(min_left, toggle % 2), toggle % 2); // show both digits + } + } else if (toggle < 200) { // lit the edited position + segments_on('0' + bin2decimal(min_left, toggle % 2), toggle % 2); // show both digits + } else { + toggle = 2; + } + } else if (mode == MODE_Idle) { + if (toggle < 100) { // dim both positions + if (!min_left) + BUZZER = BUZZER_ON; + } else if (toggle < 200) { // lit both positions + BUZZER = BUZZER_OFF; + segments_on('0' + bin2decimal(min_left, toggle % 2), toggle % 2); // show both digits + } else { + toggle = 2; + } + } + }; +} + +/* interrupt service routine */ +void isr() __interrupt 0 { + clrwdt(); + TMR1H = 0xF6; + TMR1L = 0x3C; + clk++; + if (clk == 200) { + clk = 0; + sec++; + if (sec == 60) { + sec = 0; + if (mode == MODE_Work) { + if (min_left) + --min_left; + if (!min_left) { + LOAD1 = LOAD_OFF; + LOAD2 = LOAD_OFF; + LOAD3 = LOAD_OFF; + //BUZZER = BUZZER_ON; + toggle = 2; + mode = MODE_Idle; + } + } + } + } + show_digit(); + TMR1IF = 0; +} + +volatile uint16_t cnt = 0; + +void main() { + GIE = 0; + WDTPS0 = 1; + WDTPS1 = 1; + WDTPS2 = 1; + // Select 8Mhz internall oscillator with 1/2 prescaler to produce 4MHz clock. + // This is the default. + /* + IRCF0 = 0; + IRCF1 = 1; + IRCF2 = 1; + SCS = 1; + //SCS = OSTS; + */ + + SSPEN = 0; + INTE = 0; + T0IE = 0; + IOCA = 0; + IOCB = 0; + RABIE = 0; + RABIF = 0; + + ADIE = 0; + ANSEL = 0; + ANSELH = 0; + TRISA = 0x3F; + TRISA0 = 0; // buzzer + TRISA1 = 0; // column 1 + TRISA5 = 0; // column 2 + + TRISB = 0; // All outputs + TRISC = 0x80; // All outputs, except RC7 + segments_off(); + + BUZZER = BUZZER_OFF; // buzzer off + + T1CON = 0; + T1CKPS0 = 1; + T1CKPS1 = 0; + + PIE1 = 0; + INTCON = 0; + + // setup timer1 interrupt frequency + // 4000000/4/2/(2^16-63036) = 200Hz + //TMR1 = 63036L; + TMR1H = 0xF6; + TMR1L = 0x3C; + TMR1IE = 1; + TMR1CS = 0; + TMR1GE = 0; + T1OSCEN = 0; + //T1SYNC = 1; + TMR1ON = 1; + PEIE = 1; + retrieve_minutes(); + TMR1IF = 0; + GIE = 1; + LOAD1 = LOAD_ON; + LOAD2 = LOAD_ON; + LOAD3 = LOAD_ON; + while (1) { + cnt++; +#ifdef GPSIM + if (cnt > 512) { + cnt = 0; + isr(); + } +#endif + }; +} diff --git a/resources/examples/Pic/Timer1_Pic16F689/PICTimer.piklab b/resources/examples/Pic/Timer1_Pic16F689/PICTimer.piklab new file mode 100644 index 0000000..d9fd04d --- /dev/null +++ b/resources/examples/Pic/Timer1_Pic16F689/PICTimer.piklab @@ -0,0 +1,65 @@ + + + + 16F689 + sdcc + icd2 + + PICTimer.c + + + 0.1 + executable + + + + + + + false + + + --use-non-free + -m%FAMILY + -%DEVICE + -V + -I$(SRCPATH) + -c + %I + + + $(SRCPATH) + + + + false + + inhx32 + + --use-non-free + -m%FAMILY + -%DEVICE + -V + -Wl-c + -Wl-m + $LKR(-Wl-s%LKR) + -I$(SRCPATH) + -o%O + %OBJS + %LIBS + + + $(SRCPATH) + + + + false + + + -c + %O + %OBJS + %LIBS + + + diff --git a/resources/examples/Pic/Timer1_Pic16F689/PICTimer.simu b/resources/examples/Pic/Timer1_Pic16F689/PICTimer.simu new file mode 100644 index 0000000..4e1bcdd --- /dev/null +++ b/resources/examples/Pic/Timer1_Pic16F689/PICTimer.simu @@ -0,0 +1,366 @@ + + +Node-56: + + +Led-55: + + +Node-54: + + +Node-53: + + +Node-52: + + +Node-51: + + +Node-50: + + +Node-49: + + +Node-48: + + +Node-47: + + +Node-46: + + +Node-45: + + +Node-44: + + +Push-43: + + +Push-42: + + +Push-41: + + +Push-40: + + +Node-39: + + +Node-38: + + +Node-37: + + +Diode-36: + + +Diode-35: + + +Diode-34: + + +Diode-33: + + +Ground (0 V)-32: + + +Resistor-31: + + +Resistor-30: + + +Resistor-29: + + +Resistor-28: + + +Rail.-27: + + +Buffer-26: + + +7 Segment-25: + + +Buffer-24: + + +pic16f689-23: + + +Text-22: + + +Text-21: + + +Text-20: + + +Text-19: + + +Buffer-18: + + +Buffer-17: + + +Buffer-16: + + +Buffer-15: + + +Rail.-14: + + +Led-13: + + +Led-12: + + +Led-11: + + +Node-10: + + +Node-9: + + +Text-8: + + +Text-7: + + +Text-6: + + +Text-5: + + +Text-4: + + +Oscope-3: + + +Ground (0 V)-2: + + +Node-1: + + +Connector-57: + + +Connector-59: + + +Connector-61: + + +Connector-63: + + +Connector-65: + + +Connector-67: + + +Connector-69: + + +Connector-71: + + +Connector-73: + + +Connector-74: + + +Connector-75: + + +Connector-76: + + +Connector-77: + + +Connector-78: + + +Connector-79: + + +Connector-81: + + +Connector-82: + + +Connector-83: + + +Connector-84: + + +Connector-85: + + +Connector-86: + + +Connector-87: + + +Connector-89: + + +Connector-91: + + +Connector-93: + + +Connector-95: + + +Connector-96: + + +Connector-97: + + +Connector-98: + + +Connector-99: + + +Connector-100: + + +Connector-101: + + +Connector-102: + + +Connector-103: + + +Connector-104: + + +Connector-105: + + +Connector-106: + + +Connector-107: + + +Connector-108: + + +Connector-109: + + +Connector-110: + + +Connector-111: + + +Connector-113: + + +Connector-115: + + +Connector-117: + + +Connector-119: + + +Connector-121: + + +Connector-123: + + +Connector-125: + + +Connector-127: + + +Connector-128: + + +Connector-129: + + +Connector-130: + + +Connector-131: + + +Connector-132: + + +Connector-133: + + +Connector-135: + + +Connector-137: + + +Connector-139: + + +Connector-141: + + +Connector-143: + + +Connector-145: + + +Connector-146: + + +PlotterWidget-722: + + +SerialPortWidget-723: + + + diff --git a/resources/examples/Pic/Timer1_Pic16F689/README b/resources/examples/Pic/Timer1_Pic16F689/README new file mode 100644 index 0000000..67d7e3b --- /dev/null +++ b/resources/examples/Pic/Timer1_Pic16F689/README @@ -0,0 +1,20 @@ +Copyright (C) 2018 by hovercraft: https://github.com/hovercraft-github +This work is under the terms of the GNU General Public License (GPL 2) + +This is the pre-set timer using pic16f689 processor. +This application is driven by interrupts from the timer1 PIC peripgeral module, +interrupts frequiency is 200Hz. +Clock is 4MHz derived from the PICs internal calibrated 8MHz generator with prescaler 2. +Application is writen in C language, +optimized for SDCC free compiler, +piklab IDE was used during development. + +How it works: +Right after turn-up it switchs all the loads on +and starts to count-down the preset time (in minuts). +When reachs zero, it switchs loads off, +blinks with display and beeps with buzzer. +To change the preset time, press KEY_TOGGLE and ajust +value in the blinking position using KEY_UP & KEY_DOWN. +Switch blinking position with KEY_TOGGLE. +Press KEY_OK to store new setting into EEPROM. diff --git a/resources/examples/Pic/adc_p18f14k22/adc_p18f14k22.gcb b/resources/examples/Pic/adc_p18f14k22/adc_p18f14k22.gcb new file mode 100644 index 0000000..2e5c1e8 --- /dev/null +++ b/resources/examples/Pic/adc_p18f14k22/adc_p18f14k22.gcb @@ -0,0 +1,105 @@ +'''A demonstration program for GCGB and GCB. +'''-------------------------------------------------------------------------------------------------------------------------------- +'''This program will demonstrate reading the analog to digital converter (ADC or A/D) module. +'''This is implemented within Great Cow Basic to support 8-bit, 10-bit and 12-bit read operations. +'''This is supported for Single channel measurement mode and Differential Channel Measurement mode. +''': +'''This is a Single channel measurement mode, or normal mode demonstration. +''': +'''Great Cow Basic will configure the analog to digitalconverter clock source, the programmed acquisition time and justification of the returned value. +'''The response can be a byte, word or integer (as defined in the Great Cow Basic method) these are 8-bit, 10-bit and 12-bit values respectively. +''': +'''This demonstration show the usage for normal or Single channel measurement of the ADC. +'''See the Help for connectivity but essential the source device is connected to the appropiate ADC (ANx) pin. +''': +'''This demonstation assumes you have a 10k POT connected to AN9 port of the microchip processor. +'''*** Note *** +'''AN0 is pin 19 on 18F14K22 +'''Check datasheet for your specific chip +''': +''' +'''@author Bill Roth +'''@licence GPL +'''@version 1.0a +'''@date 21.12.2015 +'''******************************************************************************** + +; ----- Configuration + + #Chip 18F14K22, 4 + #Config XINST OFF + #config MCLRE = OFF + +; ----- Constants + +; ----- Define Hardware settings + + ;Setup LCD Parameters + #define LCD_IO 4 + #define LCD_NO_RW + #define LCD_Speed fast + + ; ----- Define Hardware settings + #define LCD_RS PORTC.0 + #define LCD_Enable PORTC.1 + #define LCD_DB4 PORTB.4 + #define LCD_DB5 PORTB.5 + #define LCD_DB6 PORTB.6 + #define LCD_DB7 PORTB.7 + +; ----- Variables + DIM ad_val as integer 'lets read negative values also! + + +; ----- Main body of program commences here. + 'Show start up message + SPLASH + + Wait 1 S + CLS + + 'Display fixed messages to display + Locate 0,0: Print "ReadAD:" + Locate 1,0 : Print "ReadAD10:" + Locate 2,0 : Print "ReadAD12:" + + + '*** Note *** + 'Check datasheet for you specific chip + + + Do + + 'read 8-bit value to Variable + ad_val = Readad(an0) + Locate 0,10 + Print ad_val + Print " " + wait 20 ms + + 'read 10-bit value to Variable + ad_val = ReadAd10(an0) + Locate 1,10 + Print ad_val + Print " " + wait 20 ms + + 'read 12-bit value to Variable + ad_val = ReadAD12(an0) + Locate 2,10 + Print ad_val + Print " " + wait 20 ms + + loop + + End + +; ----- Support methods. Subroutines and Functions + + Sub Splash + Locate 0,0 : Print "CHIP: ": Print ChipNameStr + Locate 1,0 : Print "RAM: ": Print ChipRam: Print " Bytes" + Locate 2,0 : Print "MEMORY:" : Print ChipWords: Print " Words" + End sub + diff --git a/resources/examples/Pic/adc_p18f14k22/adc_p18f14k22.simu b/resources/examples/Pic/adc_p18f14k22/adc_p18f14k22.simu new file mode 100644 index 0000000..86bed95 --- /dev/null +++ b/resources/examples/Pic/adc_p18f14k22/adc_p18f14k22.simu @@ -0,0 +1,39 @@ + + +Fuente Voltaje-3: + + +Hd44780-2: + + +pic18f14k22-1: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-4: + + +Connector-28: + + +PlotterWidget-18: + + +SerialPortWidget-19: + + + diff --git a/resources/examples/Pic/glcd8544_p18f2550/glcd8544.h b/resources/examples/Pic/glcd8544_p18f2550/glcd8544.h new file mode 100644 index 0000000..91997f4 --- /dev/null +++ b/resources/examples/Pic/glcd8544_p18f2550/glcd8544.h @@ -0,0 +1,266 @@ +'USART settings +'#define USART_BAUD_RATE 9600 +'#define USART_BLOCKING +'#define USART_TX_BLOCKING + +'#define GLCD_RESET 8 ' LCD RST .... Pin 1 +'#define GLCD_DC 0 ' LCD Dat/Com. Pin 5 +'#define GLCD_SDIN 1 ' LCD SPIDat . Pin 6 +'#define GLCD_SCLK 3 ' LCD SPIClk . Pin 4 + +#define LCD_X 84 +#define LCD_Y 48 + +#define LCD_COM 0 +#define LCD_DAT 1 + + +Sub InitGlcd + + Set GLCD_RESET Off + wait 100 ms + Set GLCD_RESET On + + GlcdWrite( LCD_COM, 0x21 ) ' LCD Extended Commands + GlcdWrite( LCD_COM, 0xBf ) ' Set LCD Vop Contrast. 'B1 + GlcdWrite( LCD_COM, 0x04 ) ' Set Temp coefficent. '0x04 + GlcdWrite( LCD_COM, 0x14 ) ' LCD bias mode 1:48. '0x13 + GlcdWrite( LCD_COM, 0x0C ) ' LCD in normal mode. 0x0d for inverse + GlcdWrite( LCD_COM, 0x20 ) + GlcdWrite( LCD_COM, 0x0C ) +End Sub + +Sub GlcdWrite( Glcdcomdat, Glcddat ) + + if Glcdcomdat=1 then ' Is data + Set GLCD_DC On + else + Set GLCD_DC Off + end if + repeat 8 ' Send byte to lcd + Set GLCD_SCLK Off + + if Glcddat.7=1 then + Set GLCD_SDIN On + else + Set GLCD_SDIN Off + end if + rotate Glcddat left + + Set GLCD_SCLK On + wait 1 us + end repeat +End Sub + +Sub GlcdClear + repeat 503 + GlcdWrite( LCD_DAT, 0x00 ) + end repeat +End Sub + +Sub GlcdCharacter( Glcdchar ) + + if Glcdchar < 0x50 then + Glcdchar = (Glcdchar-0x20)*5 + repeat 5 + Glcdchar += 1 + ReadTable ascii_table_L, Glcdchar, charLine + GlcdWrite( LCD_DAT, charLine ) + end repeat + else + Glcdchar = (Glcdchar-0x50)*5 + repeat 5 + Glcdchar += 1 + ReadTable ascii_table_H, Glcdchar, charLine + GlcdWrite( LCD_DAT, charLine ) + end repeat + end if + GlcdWrite( LCD_DAT, 0x00 ) +End Sub + +Sub GlcdPrint( in GlcdstrDat as string ) + + for GlcdIndex=1 to GlcdstrDat(0) + GlcdCharacter( GlcdstrDat( GlcdIndex ) ) + next +End Sub + +Sub GlcdPrint( In GlcdNumberI as Integer ) + + if GlcdNumberI < 0 then + GlcdPrint( "-" ) + GlcdNumberI = -GlcdNumberI; + end if + GlcdPrintFa( GlcdNumberI ) +End Sub + +Sub GlcdPrint( In GlcdNumber as long ) + + GlcdPrintFa( GlcdNumber ) +End Sub + +Sub GlcdPrintFa( in GlcdNumber as long ) + + Dim GlcdNum(10) + + for GlcdIndex=10 to 1 'Process digits + GlcdNum(GlcdIndex) = GlcdNumber%10 + GlcdNumber = GlcdNumber/10 + next + Do while GlcdNum(GlcdIndex)=0 'Find first non cero + GlcdIndex += 1 + Loop + Do while GlcdIndex < 11 'Print number + GlcdCharacter( GlcdNum(GlcdIndex)+0x30 ) + GlcdIndex += 1 + Loop +End Sub + +Sub GlcdGotoXY( In Glcdp_x, In Glcdp_y ) + + GlcdWrite( LCD_COM, (0x80 | Glcdp_x) ) ' Column + GlcdWrite( LCD_COM, (0x40 | Glcdp_y) ) ' Row +End Sub + +Sub GlcdDrawPixel( In Glcdp_x, In Glcdp_y ) + + ReadTable pix_table, Glcdp_y%8+1, Glcdpix + Glcdp_y = Glcdp_y/8 + GlcdGotoXY( Glcdp_x, Glcdp_y ) + + GlcdWrite( LCD_DAT, Glcdpix ) +End Sub + +Sub GlcdDrawFrame 'draw display frame + + for GlcdIndex=0 to 83 ' Top + GlcdGotoXY( GlcdIndex, 0 ) + GlcdWrite( LCD_DAT, 0x01 ) + next + for GlcdIndex=0 to 83 'Bottom + GlcdGotoXY( GlcdIndex, 5 ) + GlcdWrite( LCD_DAT, 0x80 ) + next + for GlcdIndex=0 to 5 ' Right + GlcdGotoXY( 83, GlcdIndex ) + GlcdWrite( LCD_DAT, 0xff ) + next + for GlcdIndex=0 to 5 ' Left + GlcdGotoXY( 0, GlcdIndex ) + GlcdWrite( LCD_DAT, 0xff) + next +End Sub + +Table ascii_table_L +0x00, 0x00, 0x00, 0x00, 0x00 ' 20 +0x00, 0x00, 0x5f, 0x00, 0x00 ' 21 ! +0x00, 0x07, 0x00, 0x07, 0x00 ' 22 " +0x14, 0x7f, 0x14, 0x7f, 0x14 ' 23 # +0x24, 0x2a, 0x7f, 0x2a, 0x12 ' 24 $ +0x23, 0x13, 0x08, 0x64, 0x62 ' 25 % +0x36, 0x49, 0x55, 0x22, 0x50 ' 26 & +0x00, 0x05, 0x03, 0x00, 0x00 ' 27 +0x00, 0x1c, 0x22, 0x41, 0x00 ' 28 ( +0x00, 0x41, 0x22, 0x1c, 0x00 ' 29 ) +0x14, 0x08, 0x3e, 0x08, 0x14 ' 2a * +0x08, 0x08, 0x3e, 0x08, 0x08 ' 2b + +0x00, 0x50, 0x30, 0x00, 0x00 ' 2c , +0x08, 0x08, 0x08, 0x08, 0x08 ' 2d - +0x00, 0x60, 0x60, 0x00, 0x00 ' 2e . +0x20, 0x10, 0x08, 0x04, 0x02 ' 2f / +0x3e, 0x51, 0x49, 0x45, 0x3e ' 30 0 +0x00, 0x42, 0x7f, 0x40, 0x00 ' 31 1 +0x42, 0x61, 0x51, 0x49, 0x46 ' 32 2 +0x21, 0x41, 0x45, 0x4b, 0x31 ' 33 3 +0x18, 0x14, 0x12, 0x7f, 0x10 ' 34 4 +0x27, 0x45, 0x45, 0x45, 0x39 ' 35 5 +0x3c, 0x4a, 0x49, 0x49, 0x30 ' 36 6 +0x01, 0x71, 0x09, 0x05, 0x03 ' 37 7 +0x36, 0x49, 0x49, 0x49, 0x36 ' 38 8 +0x06, 0x49, 0x49, 0x29, 0x1e ' 39 9 +0x00, 0x36, 0x36, 0x00, 0x00 ' 3a : +0x00, 0x56, 0x36, 0x00, 0x00 ' 3b , +0x08, 0x14, 0x22, 0x41, 0x00 ' 3c < +0x14, 0x14, 0x14, 0x14, 0x14 ' 3d = +0x00, 0x41, 0x22, 0x14, 0x08 ' 3e > +0x02, 0x01, 0x51, 0x09, 0x06 ' 3f ? +0x32, 0x49, 0x79, 0x41, 0x3e ' 40 @ +0x7e, 0x11, 0x11, 0x11, 0x7e ' 41 A +0x7f, 0x49, 0x49, 0x49, 0x36 ' 42 B +0x3e, 0x41, 0x41, 0x41, 0x22 ' 43 C +0x7f, 0x41, 0x41, 0x22, 0x1c ' 44 D +0x7f, 0x49, 0x49, 0x49, 0x41 ' 45 E +0x7f, 0x09, 0x09, 0x09, 0x01 ' 46 F +0x3e, 0x41, 0x49, 0x49, 0x7a ' 47 G +0x7f, 0x08, 0x08, 0x08, 0x7f ' 48 H +0x00, 0x41, 0x7f, 0x41, 0x00 ' 49 I +0x20, 0x40, 0x41, 0x3f, 0x01 ' 4a J +0x7f, 0x08, 0x14, 0x22, 0x41 ' 4b K +0x7f, 0x40, 0x40, 0x40, 0x40 ' 4c L +0x7f, 0x02, 0x0c, 0x02, 0x7f ' 4d M +0x7f, 0x04, 0x08, 0x10, 0x7f ' 4e N +0x3e, 0x41, 0x41, 0x41, 0x3e ' 4f O +End Table + +Table ascii_table_H +0x7f, 0x09, 0x09, 0x09, 0x06 ' 50 P +0x3e, 0x41, 0x51, 0x21, 0x5e ' 51 Q +0x7f, 0x09, 0x19, 0x29, 0x46 ' 52 R +0x46, 0x49, 0x49, 0x49, 0x31 ' 53 S +0x01, 0x01, 0x7f, 0x01, 0x01 ' 54 T +0x3f, 0x40, 0x40, 0x40, 0x3f ' 55 U +0x1f, 0x20, 0x40, 0x20, 0x1f ' 56 V +0x3f, 0x40, 0x38, 0x40, 0x3f ' 57 W +0x63, 0x14, 0x08, 0x14, 0x63 ' 58 X +0x07, 0x08, 0x70, 0x08, 0x07 ' 59 Y +0x61, 0x51, 0x49, 0x45, 0x43 ' 5a Z +0x00, 0x7f, 0x41, 0x41, 0x00 ' 5b [ +0x02, 0x04, 0x08, 0x10, 0x20 ' 5c ¥ +0x00, 0x41, 0x41, 0x7f, 0x00 ' 5d ] +0x04, 0x02, 0x01, 0x02, 0x04 ' 5e ^ +0x40, 0x40, 0x40, 0x40, 0x40 ' 5f _ +0x00, 0x01, 0x02, 0x04, 0x00 ' 60 ` +0x20, 0x54, 0x54, 0x54, 0x78 ' 61 a +0x7f, 0x48, 0x44, 0x44, 0x38 ' 62 b +0x38, 0x44, 0x44, 0x44, 0x20 ' 63 c +0x38, 0x44, 0x44, 0x48, 0x7f ' 64 d +0x38, 0x54, 0x54, 0x54, 0x18 ' 65 e +0x08, 0x7e, 0x09, 0x01, 0x02 ' 66 f +0x0c, 0x52, 0x52, 0x52, 0x3e ' 67 g +0x7f, 0x08, 0x04, 0x04, 0x78 ' 68 h +0x00, 0x44, 0x7d, 0x40, 0x00 ' 69 i +0x20, 0x40, 0x44, 0x3d, 0x00 ' 6a j +0x7f, 0x10, 0x28, 0x44, 0x00 ' 6b k +0x00, 0x41, 0x7f, 0x40, 0x00 ' 6c l +0x7c, 0x04, 0x18, 0x04, 0x78 ' 6d m +0x7c, 0x08, 0x04, 0x04, 0x78 ' 6e n +0x38, 0x44, 0x44, 0x44, 0x38 ' 6f o +0x7c, 0x14, 0x14, 0x14, 0x08 ' 70 p +0x08, 0x14, 0x14, 0x18, 0x7c ' 71 q +0x7c, 0x08, 0x04, 0x04, 0x08 ' 72 r +0x48, 0x54, 0x54, 0x54, 0x20 ' 73 s +0x04, 0x3f, 0x44, 0x40, 0x20 ' 74 t +0x3c, 0x40, 0x40, 0x20, 0x7c ' 75 u +0x1c, 0x20, 0x40, 0x20, 0x1c ' 76 v +0x3c, 0x40, 0x30, 0x40, 0x3c ' 77 w +0x44, 0x28, 0x10, 0x28, 0x44 ' 78 x +0x0c, 0x50, 0x50, 0x50, 0x3c ' 79 y +0x44, 0x64, 0x54, 0x4c, 0x44 ' 7a z +0x00, 0x08, 0x36, 0x41, 0x00 ' 7b { +0x00, 0x00, 0x7f, 0x00, 0x00 ' 7c | +0x00, 0x41, 0x36, 0x08, 0x00 ' 7d , +0x10, 0x08, 0x08, 0x10, 0x08 ' 7e ← +0x00, 0x06, 0x09, 0x09, 0x06 ' 7f → +End Table + +Table pix_table +b'00000001' +b'00000010' +b'00000100' +b'00001000' +b'00010000' +b'00100000' +b'01000000' +b'10000000' +End Table + diff --git a/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.asm b/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.asm new file mode 100644 index 0000000..73cf5bc --- /dev/null +++ b/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.asm @@ -0,0 +1,931 @@ +;Program compiled by Great Cow BASIC (0.94 2015-10-27) +;Need help? See the GCBASIC forums at http://sourceforge.net/projects/gcbasic/forums, +;check the documentation or email w_cholmondeley at users dot sourceforge dot net. + +;******************************************************************************** + +;Set up the assembler options (Chip type, clock source, other bits and pieces) + LIST p=18F2550, r=DEC +#include + CONFIG LVP = OFF, MCLRE = OFF, WDT = OFF, FOSC = HS + +;******************************************************************************** + +;Set aside memory locations for variables +DELAYTEMP EQU 0 +DELAYTEMP2 EQU 1 +SYSCALCTEMPA EQU 5 +SYSSTRINGLENGTH EQU 6 +SysStringA EQU 7 +SysStringA_H EQU 8 +SysWaitTempMS EQU 2 +SysWaitTempMS_H EQU 3 +SysWaitTempS EQU 4 +SysWaitTempUS EQU 5 +SysWaitTempUS_H EQU 6 +SYSSTRINGPARAM1 EQU 2006 +CC_X EQU 9 +CHARLINE EQU 10 +C_X EQU 11 +C_Y EQU 12 +DISPLAY EQU 13 +D_X EQU 14 +D_Y EQU 15 +GLCDCHAR EQU 16 +GLCDCOMDAT EQU 17 +GLCDDAT EQU 18 +GLCDINDEX EQU 19 +GLCDP_X EQU 20 +GLCDP_Y EQU 21 +PRINTLEN EQU 22 +SERDATA EQU 23 +SYSPRINTTEMP EQU 24 +StringPointer EQU 25 +SysGLCDSTRDATHandler EQU 26 +SysGLCDSTRDATHandler_H EQU 27 +SysPRINTDATAHandler EQU 28 +SysPRINTDATAHandler_H EQU 29 +SysRepeatTemp1 EQU 30 +SysRepeatTemp2 EQU 31 +SysRepeatTemp3 EQU 32 +SysRepeatTemp3_H EQU 33 +SysRepeatTemp4 EQU 34 +SysTemp1 EQU 35 + +;******************************************************************************** + +;Alias variables +AFSR0 EQU 4073 +AFSR0_H EQU 4074 + +;******************************************************************************** + +;Vectors + ORG 0 + goto BASPROGRAMSTART + ORG 8 + retfie + +;******************************************************************************** + +;Start of program memory page 0 + ORG 12 +BASPROGRAMSTART +;Call initialisation routines + rcall INITSYS + rcall INITUSART +;Automatic pin direction setting + bcf TRISB,7,ACCESS + bcf TRISB,6,ACCESS + bcf TRISB,5,ACCESS + bcf TRISB,4,ACCESS + bcf TRISB,3,ACCESS + bcf TRISB,2,ACCESS + bcf TRISB,0,ACCESS + +;Start of the main program + bcf LATB,3,ACCESS + bcf LATB,2,ACCESS + rcall INITGLCD + movlw 3 + movwf SysRepeatTemp1,BANKED +SysRepeatLoop1 + bcf LATB,3,ACCESS + bsf LATB,2,ACCESS + movlw 1 + movwf DISPLAY,BANKED + lfsr 1,SYSSTRINGPARAM1 + movlw low StringTable5 + movwf TBLPTRL,ACCESS + movlw high StringTable5 + movwf TBLPTRH,ACCESS + rcall SysReadString + movlw low SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler,BANKED + movlw high SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler_H,BANKED + rcall HSERPRINT125 + movlw 10 + movwf SERDATA,BANKED + rcall HSERSEND + rcall GLCDCLEAR + movlw 244 + movwf SysWaitTempMS,ACCESS + movlw 1 + movwf SysWaitTempMS_H,ACCESS + rcall Delay_MS + bsf LATB,3,ACCESS + bcf LATB,2,ACCESS + movlw 2 + movwf DISPLAY,BANKED + lfsr 1,SYSSTRINGPARAM1 + movlw low StringTable6 + movwf TBLPTRL,ACCESS + movlw high StringTable6 + movwf TBLPTRH,ACCESS + rcall SysReadString + movlw low SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler,BANKED + movlw high SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler_H,BANKED + rcall HSERPRINT125 + movlw 10 + movwf SERDATA,BANKED + rcall HSERSEND + rcall GLCDCLEAR + movlw 244 + movwf SysWaitTempMS,ACCESS + movlw 1 + movwf SysWaitTempMS_H,ACCESS + rcall Delay_MS + bcf LATB,3,ACCESS + bsf LATB,2,ACCESS + movlw 1 + movwf DISPLAY,BANKED + lfsr 1,SYSSTRINGPARAM1 + movlw low StringTable5 + movwf TBLPTRL,ACCESS + movlw high StringTable5 + movwf TBLPTRH,ACCESS + rcall SysReadString + movlw low SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler,BANKED + movlw high SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler_H,BANKED + rcall HSERPRINT125 + movlw 10 + movwf SERDATA,BANKED + rcall HSERSEND + rcall GLCDCLEAR + rcall GLCDDRAWFRAME + movlw 1 + movwf GLCDP_X,BANKED + movlw 1 + movwf GLCDP_Y,BANKED + rcall GLCDGOTOXY + lfsr 1,SYSSTRINGPARAM1 + movlw low StringTable1 + movwf TBLPTRL,ACCESS + movlw high StringTable1 + movwf TBLPTRH,ACCESS + rcall SysReadString + movlw low SYSSTRINGPARAM1 + movwf SysGLCDSTRDATHandler,BANKED + movlw high SYSSTRINGPARAM1 + movwf SysGLCDSTRDATHandler_H,BANKED + rcall GLCDPRINT9 + movlw 244 + movwf SysWaitTempMS,ACCESS + movlw 1 + movwf SysWaitTempMS_H,ACCESS + rcall Delay_MS + bsf LATB,3,ACCESS + bcf LATB,2,ACCESS + movlw 2 + movwf DISPLAY,BANKED + lfsr 1,SYSSTRINGPARAM1 + movlw low StringTable6 + movwf TBLPTRL,ACCESS + movlw high StringTable6 + movwf TBLPTRH,ACCESS + rcall SysReadString + movlw low SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler,BANKED + movlw high SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler_H,BANKED + rcall HSERPRINT125 + movlw 10 + movwf SERDATA,BANKED + rcall HSERSEND + rcall GLCDCLEAR + rcall GLCDDRAWFRAME + rcall GLCDDRAWFRAME + movlw 1 + movwf GLCDP_X,BANKED + movlw 1 + movwf GLCDP_Y,BANKED + rcall GLCDGOTOXY + lfsr 1,SYSSTRINGPARAM1 + movlw low StringTable2 + movwf TBLPTRL,ACCESS + movlw high StringTable2 + movwf TBLPTRH,ACCESS + rcall SysReadString + movlw low SYSSTRINGPARAM1 + movwf SysGLCDSTRDATHandler,BANKED + movlw high SYSSTRINGPARAM1 + movwf SysGLCDSTRDATHandler_H,BANKED + rcall GLCDPRINT9 + movlw 244 + movwf SysWaitTempMS,ACCESS + movlw 1 + movwf SysWaitTempMS_H,ACCESS + rcall Delay_MS + decfsz SysRepeatTemp1,F,BANKED + bra SysRepeatLoop1 +SysRepeatLoopEnd1 + movlw 1 + movwf SysWaitTempS,ACCESS + rcall Delay_S + clrf CC_X,BANKED + clrf C_X,BANKED + clrf C_Y,BANKED + clrf D_X,BANKED + clrf D_Y,BANKED +SysDoLoop_S1 + bsf LATB,0,ACCESS + rcall ANIMATE + movlw 200 + movwf SysWaitTempMS,ACCESS + clrf SysWaitTempMS_H,ACCESS + rcall Delay_MS + bcf LATB,0,ACCESS + rcall ANIMATE + movlw 200 + movwf SysWaitTempMS,ACCESS + clrf SysWaitTempMS_H,ACCESS + rcall Delay_MS + bra SysDoLoop_S1 +SysDoLoop_E1 +BASPROGRAMEND + sleep + bra BASPROGRAMEND + +;******************************************************************************** + +ANIMATE + movf C_X,W,BANKED + sublw 78 + btfsc STATUS, C,ACCESS + bra ELSE1_1 + decf DISPLAY,W,BANKED + btfss STATUS, Z,ACCESS + bra ENDIF9 + bsf LATB,3,ACCESS + bcf LATB,2,ACCESS + movlw 2 + movwf DISPLAY,BANKED + lfsr 1,SYSSTRINGPARAM1 + movlw low StringTable6 + movwf TBLPTRL,ACCESS + movlw high StringTable6 + movwf TBLPTRH,ACCESS + rcall SysReadString + movlw low SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler,BANKED + movlw high SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler_H,BANKED + rcall HSERPRINT125 + movlw 10 + movwf SERDATA,BANKED + rcall HSERSEND +ENDIF9 + bra ENDIF1 +ELSE1_1 + movlw 2 + subwf DISPLAY,W,BANKED + btfss STATUS, Z,ACCESS + bra ENDIF10 + bcf LATB,3,ACCESS + bsf LATB,2,ACCESS + movlw 1 + movwf DISPLAY,BANKED + lfsr 1,SYSSTRINGPARAM1 + movlw low StringTable5 + movwf TBLPTRL,ACCESS + movlw high StringTable5 + movwf TBLPTRH,ACCESS + rcall SysReadString + movlw low SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler,BANKED + movlw high SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler_H,BANKED + rcall HSERPRINT125 + movlw 10 + movwf SERDATA,BANKED + rcall HSERSEND +ENDIF10 +ENDIF1 + movff CC_X,GLCDP_X + movff C_Y,GLCDP_Y + rcall GLCDGOTOXY + lfsr 1,SYSSTRINGPARAM1 + movlw low StringTable3 + movwf TBLPTRL,ACCESS + movlw high StringTable3 + movwf TBLPTRH,ACCESS + rcall SysReadString + movlw low SYSSTRINGPARAM1 + movwf SysGLCDSTRDATHandler,BANKED + movlw high SYSSTRINGPARAM1 + movwf SysGLCDSTRDATHandler_H,BANKED + rcall GLCDPRINT9 + movf D_X,F,BANKED + btfss STATUS, Z,ACCESS + bra ELSE2_1 + movlw 6 + addwf C_X,F,BANKED + bra ENDIF2 +ELSE2_1 + movlw 6 + subwf C_X,F,BANKED +ENDIF2 + movf D_Y,F,BANKED + btfss STATUS, Z,ACCESS + bra ELSE3_1 + incf C_Y,F,BANKED + bra ENDIF3 +ELSE3_1 + decf C_Y,F,BANKED +ENDIF3 + movlw 5 + subwf C_Y,W,BANKED + btfss STATUS, Z,ACCESS + bra ENDIF4 + movlw 1 + movwf D_Y,BANKED +ENDIF4 + movf C_Y,F,BANKED + btfsc STATUS, Z,ACCESS + clrf D_Y,BANKED + movlw 162 + subwf C_X,W,BANKED + btfss STATUS, Z,ACCESS + bra ENDIF6 + movlw 1 + movwf D_X,BANKED +ENDIF6 + movf C_X,F,BANKED + btfsc STATUS, Z,ACCESS + clrf D_X,BANKED + movf C_X,W,BANKED + sublw 78 + btfsc STATUS, C,ACCESS + bra ELSE8_1 + movlw 84 + subwf C_X,W,BANKED + movwf CC_X,BANKED + decf DISPLAY,W,BANKED + btfss STATUS, Z,ACCESS + bra ENDIF11 + bsf LATB,3,ACCESS + bcf LATB,2,ACCESS + movlw 2 + movwf DISPLAY,BANKED + lfsr 1,SYSSTRINGPARAM1 + movlw low StringTable6 + movwf TBLPTRL,ACCESS + movlw high StringTable6 + movwf TBLPTRH,ACCESS + rcall SysReadString + movlw low SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler,BANKED + movlw high SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler_H,BANKED + rcall HSERPRINT125 + movlw 10 + movwf SERDATA,BANKED + rcall HSERSEND +ENDIF11 + bra ENDIF8 +ELSE8_1 + movff C_X,CC_X + movlw 2 + subwf DISPLAY,W,BANKED + btfss STATUS, Z,ACCESS + bra ENDIF12 + bcf LATB,3,ACCESS + bsf LATB,2,ACCESS + movlw 1 + movwf DISPLAY,BANKED + lfsr 1,SYSSTRINGPARAM1 + movlw low StringTable5 + movwf TBLPTRL,ACCESS + movlw high StringTable5 + movwf TBLPTRH,ACCESS + rcall SysReadString + movlw low SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler,BANKED + movlw high SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler_H,BANKED + rcall HSERPRINT125 + movlw 10 + movwf SERDATA,BANKED + rcall HSERSEND +ENDIF12 +ENDIF8 + movff CC_X,GLCDP_X + movff C_Y,GLCDP_Y + rcall GLCDGOTOXY + lfsr 1,SYSSTRINGPARAM1 + movlw low StringTable4 + movwf TBLPTRL,ACCESS + movlw high StringTable4 + movwf TBLPTRH,ACCESS + rcall SysReadString + movlw low SYSSTRINGPARAM1 + movwf SysGLCDSTRDATHandler,BANKED + movlw high SYSSTRINGPARAM1 + movwf SysGLCDSTRDATHandler_H,BANKED + rcall GLCDPRINT9 + lfsr 1,SYSSTRINGPARAM1 + movlw low StringTable4 + movwf TBLPTRL,ACCESS + movlw high StringTable4 + movwf TBLPTRH,ACCESS + rcall SysReadString + movlw low SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler,BANKED + movlw high SYSSTRINGPARAM1 + movwf SysPRINTDATAHandler_H,BANKED + bra HSERPRINT125 + +;******************************************************************************** + +ASCII_TABLE_H + movlw 241 + cpfslt SysStringA,ACCESS + retlw 0 + movf SysStringA, W,ACCESS + addlw low TableASCII_TABLE_H + movwf TBLPTRL,ACCESS + movlw high TableASCII_TABLE_H + btfsc STATUS, C,ACCESS + addlw 1 + movwf TBLPTRH,ACCESS + tblrd* + movf TABLAT, W,ACCESS + return +TableASCII_TABLE_H + db 240,127,9,9,9,6,62,65,81,33,94,127,9,25,41,70,70,73,73,73,49,1,1,127,1,1,63,64 + db 64,64,63,31,32,64,32,31,63,64,56,64,63,99,20,8,20,99,7,8,112,8,7,97,81,73,69,67 + db 0,127,65,65,0,2,4,8,16,32,0,65,65,127,0,4,2,1,2,4,64,64,64,64,64,0,1,2,4,0,32,84 + db 84,84,120,127,72,68,68,56,56,68,68,68,32,56,68,68,72,127,56,84,84,84,24,8,126,9 + db 1,2,12,82,82,82,62,127,8,4,4,120,0,68,125,64,0,32,64,68,61,0,127,16,40,68,0,0 + db 65,127,64,0,124,4,24,4,120,124,8,4,4,120,56,68,68,68,56,124,20,20,20,8,8,20,20,24 + db 124,124,8,4,4,8,72,84,84,84,32,4,63,68,64,32,60,64,64,32,124,28,32,64,32,28,60,64 + db 48,64,60,68,40,16,40,68,12,80,80,80,60,68,100,84,76,68,0,8,54,65,0,0,0,127,0,0 + db 0,65,54,8,0,16,8,8,16,8,0,6,9,9,6 + +;******************************************************************************** + +ASCII_TABLE_L + movlw 241 + cpfslt SysStringA,ACCESS + retlw 0 + movf SysStringA, W,ACCESS + addlw low TableASCII_TABLE_L + movwf TBLPTRL,ACCESS + movlw high TableASCII_TABLE_L + btfsc STATUS, C,ACCESS + addlw 1 + movwf TBLPTRH,ACCESS + tblrd* + movf TABLAT, W,ACCESS + return +TableASCII_TABLE_L + db 240,0,0,0,0,0,0,0,95,0,0,0,7,0,7,0,20,127,20,127,20,36,42,127,42,18,35,19,8,100 + db 98,54,73,85,34,80,0,5,3,0,0,0,28,34,65,0,0,65,34,28,0,20,8,62,8,20,8,8,62,8,8,0 + db 80,48,0,0,8,8,8,8,8,0,96,96,0,0,32,16,8,4,2,62,81,73,69,62,0,66,127,64,0,66,97,81 + db 73,70,33,65,69,75,49,24,20,18,127,16,39,69,69,69,57,60,74,73,73,48,1,113,9,5,3,54 + db 73,73,73,54,6,73,73,41,30,0,54,54,0,0,0,86,54,0,0,8,20,34,65,0,20,20,20,20,20,0 + db 65,34,20,8,2,1,81,9,6,50,73,121,65,62,126,17,17,17,126,127,73,73,73,54,62,65,65,65 + db 34,127,65,65,34,28,127,73,73,73,65,127,9,9,9,1,62,65,73,73,122,127,8,8,8,127,0,65 + db 127,65,0,32,64,65,63,1,127,8,20,34,65,127,64,64,64,64,127,2,12,2,127,127,4,8,16,127 + db 62,65,65,65,62 + +;******************************************************************************** + +Delay_MS + incf SysWaitTempMS_H, F,ACCESS +DMS_START + movlw 108 + movwf DELAYTEMP2,ACCESS +DMS_OUTER + movlw 11 + movwf DELAYTEMP,ACCESS +DMS_INNER + decfsz DELAYTEMP, F,ACCESS + bra DMS_INNER + decfsz DELAYTEMP2, F,ACCESS + bra DMS_OUTER + decfsz SysWaitTempMS, F,ACCESS + bra DMS_START + decfsz SysWaitTempMS_H, F,ACCESS + bra DMS_START + return + +;******************************************************************************** + +Delay_S +DS_START + movlw 232 + movwf SysWaitTempMS,ACCESS + movlw 3 + movwf SysWaitTempMS_H,ACCESS + rcall Delay_MS + decfsz SysWaitTempS, F,ACCESS + bra DS_START + return + +;******************************************************************************** + +GLCDCHARACTER + movlw 80 + subwf GLCDCHAR,W,BANKED + btfsc STATUS, C,ACCESS + bra ELSE24_1 + movlw 32 + subwf GLCDCHAR,W,BANKED + movwf SysTemp1,BANKED + mullw 5 + movff PRODL,GLCDCHAR + movlw 5 + movwf SysRepeatTemp4,BANKED +SysRepeatLoop4 + incf GLCDCHAR,F,BANKED + movff GLCDCHAR,SysStringA + rcall ASCII_TABLE_L + movwf CHARLINE,BANKED + movlw 1 + movwf GLCDCOMDAT,BANKED + movff CHARLINE,GLCDDAT + rcall GLCDWRITE + movff GLCDDAT,CHARLINE + decfsz SysRepeatTemp4,F,BANKED + bra SysRepeatLoop4 +SysRepeatLoopEnd4 + bra ENDIF24 +ELSE24_1 + movlw 80 + subwf GLCDCHAR,W,BANKED + movwf SysTemp1,BANKED + mullw 5 + movff PRODL,GLCDCHAR + movlw 5 + movwf SysRepeatTemp4,BANKED +SysRepeatLoop5 + incf GLCDCHAR,F,BANKED + movff GLCDCHAR,SysStringA + rcall ASCII_TABLE_H + movwf CHARLINE,BANKED + movlw 1 + movwf GLCDCOMDAT,BANKED + movff CHARLINE,GLCDDAT + rcall GLCDWRITE + movff GLCDDAT,CHARLINE + decfsz SysRepeatTemp4,F,BANKED + bra SysRepeatLoop5 +SysRepeatLoopEnd5 +ENDIF24 + movlw 1 + movwf GLCDCOMDAT,BANKED + clrf GLCDDAT,BANKED + bra GLCDWRITE + +;******************************************************************************** + +GLCDCLEAR + movlw 247 + movwf SysRepeatTemp3,BANKED + movlw 2 + movwf SysRepeatTemp3_H,BANKED +SysRepeatLoop3 + movlw 1 + movwf GLCDCOMDAT,BANKED + clrf GLCDDAT,BANKED + rcall GLCDWRITE + decfsz SysRepeatTemp3,F,BANKED + bra SysRepeatLoop3 + decfsz SysRepeatTemp3_H,F,BANKED + bra SysRepeatLoop3 +SysRepeatLoopEnd3 + return + +;******************************************************************************** + +GLCDDRAWFRAME + setf GLCDINDEX,BANKED +SysForLoop2 + incf GLCDINDEX,F,BANKED + movff GLCDINDEX,GLCDP_X + clrf GLCDP_Y,BANKED + rcall GLCDGOTOXY + movlw 1 + movwf GLCDCOMDAT,BANKED + movlw 1 + movwf GLCDDAT,BANKED + rcall GLCDWRITE + movlw 83 + subwf GLCDINDEX,W,BANKED + btfss STATUS, C,ACCESS + bra SysForLoop2 +SysForLoopEnd2 + setf GLCDINDEX,BANKED +SysForLoop3 + incf GLCDINDEX,F,BANKED + movff GLCDINDEX,GLCDP_X + movlw 5 + movwf GLCDP_Y,BANKED + rcall GLCDGOTOXY + movlw 1 + movwf GLCDCOMDAT,BANKED + movlw 128 + movwf GLCDDAT,BANKED + rcall GLCDWRITE + movlw 83 + subwf GLCDINDEX,W,BANKED + btfss STATUS, C,ACCESS + bra SysForLoop3 +SysForLoopEnd3 + setf GLCDINDEX,BANKED +SysForLoop4 + incf GLCDINDEX,F,BANKED + movlw 83 + movwf GLCDP_X,BANKED + movff GLCDINDEX,GLCDP_Y + rcall GLCDGOTOXY + movlw 1 + movwf GLCDCOMDAT,BANKED + setf GLCDDAT,BANKED + rcall GLCDWRITE + movlw 5 + subwf GLCDINDEX,W,BANKED + btfss STATUS, C,ACCESS + bra SysForLoop4 +SysForLoopEnd4 + setf GLCDINDEX,BANKED +SysForLoop5 + incf GLCDINDEX,F,BANKED + clrf GLCDP_X,BANKED + movff GLCDINDEX,GLCDP_Y + rcall GLCDGOTOXY + movlw 1 + movwf GLCDCOMDAT,BANKED + setf GLCDDAT,BANKED + rcall GLCDWRITE + movlw 5 + subwf GLCDINDEX,W,BANKED + btfss STATUS, C,ACCESS + bra SysForLoop5 +SysForLoopEnd5 + return + +;******************************************************************************** + +GLCDGOTOXY + clrf GLCDCOMDAT,BANKED + movlw 128 + iorwf GLCDP_X,W,BANKED + movwf GLCDDAT,BANKED + rcall GLCDWRITE + clrf GLCDCOMDAT,BANKED + movlw 64 + iorwf GLCDP_Y,W,BANKED + movwf GLCDDAT,BANKED + bra GLCDWRITE + +;******************************************************************************** + +;Overloaded signature: STRING: +GLCDPRINT9 + clrf GLCDINDEX,BANKED + movff SysGLCDSTRDATHandler,AFSR0 + movff SysGLCDSTRDATHandler_H,AFSR0_H + movlw 1 + subwf INDF0,W,ACCESS + btfss STATUS, C,ACCESS + bra SysForLoopEnd1 +SysForLoop1 + incf GLCDINDEX,F,BANKED + movf GLCDINDEX,W,BANKED + addwf SysGLCDSTRDATHandler,W,BANKED + movwf AFSR0,ACCESS + movlw 0 + addwfc SysGLCDSTRDATHandler_H,W,BANKED + movwf AFSR0_H,ACCESS + movff INDF0,GLCDCHAR + rcall GLCDCHARACTER + movf GLCDINDEX,W,BANKED + addwf SysGLCDSTRDATHandler,W,BANKED + movwf AFSR0,ACCESS + movlw 0 + addwfc SysGLCDSTRDATHandler_H,W,BANKED + movwf AFSR0_H,ACCESS + movff GLCDCHAR,INDF0 + movff SysGLCDSTRDATHandler,AFSR0 + movff SysGLCDSTRDATHandler_H,AFSR0_H + movf INDF0,W,ACCESS + subwf GLCDINDEX,W,BANKED + btfss STATUS, C,ACCESS + bra SysForLoop1 +SysForLoopEnd1 + return + +;******************************************************************************** + +GLCDWRITE + decf GLCDCOMDAT,W,BANKED + btfss STATUS, Z,ACCESS + bra ELSE13_1 + bsf LATB,6,ACCESS + bra ENDIF13 +ELSE13_1 + bcf LATB,6,ACCESS +ENDIF13 + movlw 8 + movwf SysRepeatTemp2,BANKED +SysRepeatLoop2 + bcf LATB,4,ACCESS + btfss GLCDDAT,7,BANKED + bra ELSE14_1 + bsf LATB,5,ACCESS + bra ENDIF14 +ELSE14_1 + bcf LATB,5,ACCESS +ENDIF14 + rlcf GLCDDAT,F,BANKED + bsf LATB,4,ACCESS + nop + nop + nop + nop + decfsz SysRepeatTemp2,F,BANKED + bra SysRepeatLoop2 +SysRepeatLoopEnd2 + return + +;******************************************************************************** + +;Overloaded signature: STRING: +HSERPRINT125 + movff SysPRINTDATAHandler,AFSR0 + movff SysPRINTDATAHandler_H,AFSR0_H + movff INDF0,PRINTLEN + movf PRINTLEN,F,BANKED + btfsc STATUS, Z,ACCESS + bra ENDIF21 + clrf SYSPRINTTEMP,BANKED + movlw 1 + subwf PRINTLEN,W,BANKED + btfss STATUS, C,ACCESS + bra SysForLoopEnd6 +SysForLoop6 + incf SYSPRINTTEMP,F,BANKED + movf SYSPRINTTEMP,W,BANKED + addwf SysPRINTDATAHandler,W,BANKED + movwf AFSR0,ACCESS + movlw 0 + addwfc SysPRINTDATAHandler_H,W,BANKED + movwf AFSR0_H,ACCESS + movff INDF0,SERDATA + rcall HSERSEND + movlw 12 + movwf SysWaitTempMS,ACCESS + clrf SysWaitTempMS_H,ACCESS + rcall Delay_MS + movf PRINTLEN,W,BANKED + subwf SYSPRINTTEMP,W,BANKED + btfss STATUS, C,ACCESS + bra SysForLoop6 +SysForLoopEnd6 +ENDIF21 + return + +;******************************************************************************** + +HSERSEND +SysWaitLoop1 + btfss PIR1,TXIF,ACCESS + bra SysWaitLoop1 + movff SERDATA,TXREG + return + +;******************************************************************************** + +INITGLCD + bcf LATB,7,ACCESS + movlw 100 + movwf SysWaitTempMS,ACCESS + clrf SysWaitTempMS_H,ACCESS + rcall Delay_MS + bsf LATB,7,ACCESS + clrf GLCDCOMDAT,BANKED + movlw 33 + movwf GLCDDAT,BANKED + rcall GLCDWRITE + clrf GLCDCOMDAT,BANKED + movlw 191 + movwf GLCDDAT,BANKED + rcall GLCDWRITE + clrf GLCDCOMDAT,BANKED + movlw 4 + movwf GLCDDAT,BANKED + rcall GLCDWRITE + clrf GLCDCOMDAT,BANKED + movlw 20 + movwf GLCDDAT,BANKED + rcall GLCDWRITE + clrf GLCDCOMDAT,BANKED + movlw 12 + movwf GLCDDAT,BANKED + rcall GLCDWRITE + clrf GLCDCOMDAT,BANKED + movlw 32 + movwf GLCDDAT,BANKED + rcall GLCDWRITE + clrf GLCDCOMDAT,BANKED + movlw 12 + movwf GLCDDAT,BANKED + bra GLCDWRITE + +;******************************************************************************** + +INITSYS + clrf BSR,ACCESS + clrf TBLPTRU,ACCESS + bcf ADCON2,ADFM,ACCESS + bcf ADCON0,ADON,ACCESS + bsf ADCON1,PCFG3,ACCESS + bsf ADCON1,PCFG2,ACCESS + bsf ADCON1,PCFG1,ACCESS + bsf ADCON1,PCFG0,ACCESS + movlw 7 + movwf CMCON,ACCESS + clrf PORTA,ACCESS + clrf PORTB,ACCESS + clrf PORTC,ACCESS + clrf PORTE,ACCESS + return + +;******************************************************************************** + +INITUSART + movlw 33 + movwf SPBRG,ACCESS + clrf SPBRGH,ACCESS + bsf BAUDCON,BRG16,ACCESS + bsf TXSTA,BRGH,ACCESS + bcf TXSTA,SYNC,ACCESS + bsf RCSTA,SPEN,ACCESS + bsf RCSTA,CREN,ACCESS + bsf TXSTA,TXEN,ACCESS + return + +;******************************************************************************** + +SYSREADSTRING + tblrd*+ + movff TABLAT,SYSCALCTEMPA + movff TABLAT,INDF1 + tblrd*+ + bra SYSSTRINGREADCHECK +SYSREADSTRINGPART + tblrd*+ + movf TABLAT, W,ACCESS + movwf SYSCALCTEMPA,ACCESS + addwf SYSSTRINGLENGTH,F,ACCESS + tblrd*+ +SYSSTRINGREADCHECK + movf SYSCALCTEMPA,F,ACCESS + btfsc STATUS,Z,ACCESS + return +SYSSTRINGREAD + tblrd*+ + movff TABLAT,PREINC1 + decfsz SYSCALCTEMPA, F,ACCESS + bra SYSSTRINGREAD + return + +;******************************************************************************** + +SysStringTables + +StringTable1 + dw 2827," Display-1" + + +StringTable2 + dw 2827," Display-2" + + +StringTable3 + dw 257," " + + +StringTable4 + dw 257,"*" + + +StringTable5 + dw 4883,"Printing Display: 1" + + +StringTable6 + dw 4883,"Printing Display: 2" + + +;******************************************************************************** + + + END diff --git a/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.cod b/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.cod new file mode 100644 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zlrTN9(cdR=m4u7S`iJRF0?lCbf7l!!riU+&*GSaR7|R4b6$e77L;VWVUs(&3m8e>W z8J+7!%BV;GlN_{-3a>jvkC1dv2p9R(-w3uRH^|fG(QI>SLsh3&FkZE-f1MNmo67$O DAI+Y& literal 0 HcmV?d00001 diff --git a/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.gcb b/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.gcb new file mode 100644 index 0000000..75d1a8d --- /dev/null +++ b/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.gcb @@ -0,0 +1,126 @@ +#chip p18f2550,16 + +#include "glcd8544.h" + +#define GLCD_RESET PORTB.7 ' LCD RST .... +#define GLCD_DC PORTB.6 ' LCD Dat/Com. +#define GLCD_SDIN PORTB.5 ' LCD SPIDat . +#define GLCD_SCLK PORTB.4 ' LCD SPIClk . +#define GLCD_CS1 PORTB.3 ' Select Display 1 +#define GLCD_CS2 PORTB.2 ' Select Display 2 + +#define USART_BAUD_RATE 115200 +#define USART_BLOCKING false + +SelectDisplays +InitGlcd + +Repeat 3 + SelectDisplay1 + GlcdClear + wait 500 ms + + SelectDisplay2 + GlcdClear + wait 500 ms + + SelectDisplay1 + GlcdClear + GlcdDrawFrame + GlcdGotoXY( 1, 1 ) + GlcdPrint( " Display-1" ) + wait 500 ms + + SelectDisplay2 + GlcdClear + GlcdDrawFrame + GlcdDrawFrame + GlcdGotoXY( 1, 1 ) + GlcdPrint( " Display-2" ) + wait 500 ms +End Repeat +wait 1 S + +cc_x = 0 +c_x = 0 +c_y = 0 +d_x = 0 +d_y = 0 + +Do + Set PORTB.0 on + animate + wait 200 ms + + Set PORTB.0 off + animate + wait 200 ms +Loop + +Sub animate + if c_x > 78 then + if display = 1 then SelectDisplay2 + else + if display = 2 then SelectDisplay1 + end if + GlcdGotoXY( cc_x, c_y ) + GlcdPrint( " " ) + + if d_x = 0 then + c_x += 6 + else + c_x -= 6 + end if + + if d_y = 0 then + c_y += 1 + else + c_y -= 1 + end if + + if c_y = 5 then + d_y = 1 + end if + if c_y = 0 then + d_y = 0 + end if + + if c_x = 162 then + d_x = 1 + end if + if c_x = 0 then + d_x = 0 + end if + + if c_x > 78 then + cc_x = c_x-84 + if display = 1 then SelectDisplay2 + else + cc_x = c_x + if display = 2 then SelectDisplay1 + end if + GlcdGotoXY( cc_x, c_y ) + GlcdPrint( "*" ) + HSerPrint "*" +End Sub + +Macro SelectDisplay1 + GLCD_CS1 = 0 + GLCD_CS2 = 1 + display = 1 + HSerPrint "Printing Display: 1" + HSerSend 10 +End Macro + +Macro SelectDisplay2 + GLCD_CS1 = 1 + GLCD_CS2 = 0 + display = 2 + HSerPrint "Printing Display: 2" + HSerSend 10 +End Macro + +Macro SelectDisplays + GLCD_CS1 = 0 + GLCD_CS2 = 0 +End Macro diff --git a/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.html b/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.html new file mode 100644 index 0000000..96d38a1 --- /dev/null +++ b/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.html @@ -0,0 +1,40 @@ + + + +Compilation Report + + +

Compilation Report

+

Compiler Version (DD/MM/YYYY): 0.94 2015-10-27

+

Chip resource usage:

+

Chip Model: 18F2550

+

Program Memory: 1133/16384 words (6.92%)

+

RAM: 67/2048 bytes (3.27%)

+

RAM Allocation

+ +
+

Subroutines

+ + + + + + + + + + + + + + + + + + + + + +
NameCode Size (lines)Compiled Size (words)Outgoing calls
Main46216INITUSART(1), SYSREADSTRING(6), Delay_S(1), Delay_MS(6), ANIMATE(2), GLCDPRINT(2), GLCDGOTOXY(2), GLCDDRAWFRAME(3), GLCDCLEAR(4), HSERSEND(4), HSERPRINT(4), INITGLCD(1), INITSYS(1)
ANIMATE47217SYSREADSTRING(7), GLCDPRINT(2), GLCDGOTOXY(2), HSERSEND(4), HSERPRINT(5)
INITGLCD1042Delay_MS(1), GLCDWRITE(7)
GLCDWRITE1628
GLCDCLEAR316GLCDWRITE(1)
GLCDCHARACTER1662GLCDWRITE(3)
GLCDPRINT339GLCDCHARACTER(1)
GLCDGOTOXY212GLCDWRITE(2)
GLCDDRAWFRAME1673GLCDWRITE(4), GLCDGOTOXY(4)
INITSYS36515
SYSREADSTRING10323
INITUSART6410
HSERSEND226
HSERPRINT1538Delay_MS(1), HSERSEND(1)
Delay_MS018
Delay_S010Delay_MS(1)
SysStringTables040
ASCII_TABLE_L0134
ASCII_TABLE_H0134
+ + diff --git a/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.lst b/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.lst new file mode 100644 index 0000000..347ceed --- /dev/null +++ b/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.lst @@ -0,0 +1,1740 @@ +GCASM List File (GCBASIC 0.94 2015-10-27) + +Symbols: +A EQU 0 +ABDEN EQU 0 +ABDOVF EQU 7 +ACCESS EQU 0 +ACKDT EQU 5 +ACKEN EQU 4 +ACKSTAT EQU 6 +ACQT0 EQU 3 +ACQT1 EQU 4 +ACQT2 EQU 5 +ACTVIE EQU 2 +ACTVIF EQU 2 +ADCON0 EQU 4034 +ADCON1 EQU 4033 +ADCON2 EQU 4032 +ADCS0 EQU 0 +ADCS1 EQU 1 +ADCS2 EQU 2 +ADDEN EQU 3 +ADDR0 EQU 0 +ADDR1 EQU 1 +ADDR2 EQU 2 +ADDR3 EQU 3 +ADDR4 EQU 4 +ADDR5 EQU 5 +ADDR6 EQU 6 +ADEN EQU 3 +ADFM EQU 7 +ADIE EQU 6 +ADIF EQU 6 +ADIP EQU 6 +ADON EQU 0 +ADRES EQU 4035 +ADRESH EQU 4036 +ADRESL EQU 4035 +AFSR0 EQU 4073 +AFSR0 EQU 4073 +AFSR0_H EQU 4074 +AFSR0_H EQU 4074 +AN0 EQU 0 +AN1 EQU 1 +AN2 EQU 2 +AN3 EQU 3 +AN4 EQU 5 +ANIMATE EQU 364 +ASCII_TABLE_H EQU 730 +ASCII_TABLE_L EQU 998 +B EQU 1 +BANKED EQU 1 +BASPROGRAMEND EQU 360 +BASPROGRAMSTART EQU 12 +BAUDCON EQU 4024 +BCLIE EQU 3 +BCLIF EQU 3 +BCLIP EQU 3 +BF EQU 0 +BGST EQU 5 +BOR EQU 0 +BRG16 EQU 3 +BRGH EQU 2 +BSR EQU 4064 +BTOEE EQU 4 +BTOEF EQU 4 +BTSEE EQU 7 +BTSEF EQU 7 +C EQU 0 +C1INV EQU 4 +C1OUT EQU 6 +C2INV EQU 5 +C2OUT EQU 7 +CCP1 EQU 2 +CCP1AS EQU 4022 +CCP1CON EQU 4029 +CCP1DEL EQU 4023 +CCP1IE EQU 2 +CCP1IF EQU 2 +CCP1IP EQU 2 +CCP1M0 EQU 0 +CCP1M1 EQU 1 +CCP1M2 EQU 2 +CCP1M3 EQU 3 +CCP2CON EQU 4026 +CCP2IE EQU 0 +CCP2IF EQU 0 +CCP2IP EQU 0 +CCP2M0 EQU 0 +CCP2M1 EQU 1 +CCP2M2 EQU 2 +CCP2M3 EQU 3 +CCPR1 EQU 4030 +CCPR1H EQU 4031 +CCPR1L EQU 4030 +CCPR2 EQU 4027 +CCPR2H EQU 4028 +CCPR2L EQU 4027 +CC_X EQU 9 +CFGS EQU 6 +CHARLINE EQU 10 +CHS0 EQU 2 +CHS1 EQU 3 +CHS2 EQU 4 +CHS3 EQU 5 +CIS EQU 3 +CK EQU 6 +CKE EQU 6 +CKP EQU 4 +CM0 EQU 0 +CM1 EQU 1 +CM2 EQU 2 +CMCON EQU 4020 +CMIE EQU 6 +CMIF EQU 6 +CMIP EQU 6 +CRC16EE EQU 2 +CRC16EF EQU 2 +CRC5EE EQU 1 +CRC5EF EQU 1 +CREN EQU 4 +CSRC EQU 7 +CVR0 EQU 0 +CVR1 EQU 1 +CVR2 EQU 2 +CVR3 EQU 3 +CVRCON EQU 4021 +CVREF EQU 4 +CVREN EQU 7 +CVROE EQU 6 +CVRR EQU 5 +CVRSS EQU 4 +C_X EQU 11 +C_Y EQU 12 +D EQU 5 +DATA_ADDRESS EQU 5 +DC EQU 1 +DC1B0 EQU 4 +DC1B1 EQU 5 +DC2B0 EQU 4 +DC2B1 EQU 5 +DDRA EQU 3986 +DDRA_RA0 EQU 0 +DDRA_RA1 EQU 1 +DDRA_RA2 EQU 2 +DDRA_RA3 EQU 3 +DDRA_RA4 EQU 4 +DDRA_RA5 EQU 5 +DDRA_RA6 EQU 6 +DDRB EQU 3987 +DDRB_RB0 EQU 0 +DDRB_RB1 EQU 1 +DDRB_RB2 EQU 2 +DDRB_RB3 EQU 3 +DDRB_RB4 EQU 4 +DDRB_RB5 EQU 5 +DDRB_RB6 EQU 6 +DDRB_RB7 EQU 7 +DDRC EQU 3988 +DDRC_RC0 EQU 0 +DDRC_RC1 EQU 1 +DDRC_RC2 EQU 2 +DDRC_RC6 EQU 6 +DDRC_RC7 EQU 7 +DELAYTEMP EQU 0 +DELAYTEMP2 EQU 1 +DELAY_MS EQU 1266 +DELAY_S EQU 1294 +DFN8EE EQU 3 +DFN8EF EQU 3 +DIR EQU 2 +DISPLAY EQU 13 +DMS_INNER EQU 1276 +DMS_OUTER EQU 1272 +DMS_START EQU 1268 +DONE EQU 1 +DS_START EQU 1294 +D_A EQU 5 +D_X EQU 14 +D_Y EQU 15 +ECCP1AS EQU 4022 +ECCP1AS_ECCPAS0 EQU 4 +ECCP1AS_ECCPAS1 EQU 5 +ECCP1AS_ECCPAS2 EQU 6 +ECCP1AS_ECCPASE EQU 7 +ECCP1AS_PSSAC0 EQU 2 +ECCP1AS_PSSAC1 EQU 3 +ECCP1DEL EQU 4023 +ECCP1DEL_PRSEN EQU 7 +ECCPAS0 EQU 4 +ECCPAS1 EQU 5 +ECCPAS2 EQU 6 +ECCPASE EQU 7 +EEADR EQU 4009 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEIE EQU 4 +EEIF EQU 4 +EEIP EQU 4 +EEPGD EQU 7 +ELSE13_1 EQU 1666 +ELSE14_1 EQU 1682 +ELSE1_1 EQU 418 +ELSE24_1 EQU 1364 +ELSE2_1 EQU 510 +ELSE3_1 EQU 524 +ELSE8_1 EQU 622 +ENDIF1 EQU 464 +ENDIF10 EQU 464 +ENDIF11 EQU 620 +ENDIF12 EQU 672 +ENDIF13 EQU 1668 +ENDIF14 EQU 1684 +ENDIF2 EQU 514 +ENDIF21 EQU 1766 +ENDIF24 EQU 1408 +ENDIF3 EQU 526 +ENDIF4 EQU 538 +ENDIF6 EQU 556 +ENDIF8 EQU 672 +ENDIF9 EQU 416 +ENDP0 EQU 3 +ENDP1 EQU 4 +ENDP2 EQU 5 +ENDP3 EQU 6 +EPCONDIS EQU 3 +EPHSHK EQU 4 +EPINEN EQU 1 +EPOUTEN EQU 2 +EPSTALL EQU 0 +F EQU 1 +FERR EQU 2 +FLTS EQU 2 +FREE EQU 4 +FRM0 EQU 0 +FRM1 EQU 1 +FRM10 EQU 2 +FRM2 EQU 2 +FRM3 EQU 3 +FRM4 EQU 4 +FRM5 EQU 5 +FRM6 EQU 6 +FRM7 EQU 7 +FRM8 EQU 0 +FRM9 EQU 1 +FSEN EQU 2 +FSR0H EQU 4074 +FSR0L EQU 4073 +FSR1H EQU 4066 +FSR1L EQU 4065 +FSR2H EQU 4058 +FSR2L EQU 4057 +GCEN EQU 7 +GIE EQU 7 +GIEH EQU 7 +GIEL EQU 6 +GLCDCHAR EQU 16 +GLCDCHARACTER EQU 1310 +GLCDCLEAR EQU 1416 +GLCDCOMDAT EQU 17 +GLCDDAT EQU 18 +GLCDDRAWFRAME EQU 1442 +GLCDGOTOXY EQU 1564 +GLCDINDEX EQU 19 +GLCDPRINT9 EQU 1584 +GLCDP_X EQU 20 +GLCDP_Y EQU 21 +GLCDWRITE EQU 1656 +GO EQU 1 +GO_DONE EQU 1 +HLVDCON EQU 4050 +HLVDEN EQU 4 +HLVDIE EQU 2 +HLVDIF EQU 2 +HLVDIN EQU 5 +HLVDIP EQU 2 +HLVDL0 EQU 0 +HLVDL1 EQU 1 +HLVDL2 EQU 2 +HLVDL3 EQU 3 +HSERPRINT125 EQU 1702 +HSERSEND EQU 1768 +I2C_DAT EQU 5 +I2C_READ EQU 2 +I2C_START EQU 3 +I2C_STOP EQU 4 +IDLEIE EQU 4 +IDLEIF EQU 4 +IDLEN EQU 7 +INDF0 EQU 4079 +INDF1 EQU 4071 +INDF2 EQU 4063 +INITGLCD EQU 1778 +INITSYS EQU 1846 +INITUSART EQU 1876 +INT0 EQU 0 +INT0E EQU 4 +INT0F EQU 1 +INT0IE EQU 4 +INT0IF EQU 1 +INT1 EQU 1 +INT1E EQU 3 +INT1F EQU 0 +INT1IE EQU 3 +INT1IF EQU 0 +INT1IP EQU 6 +INT1P EQU 6 +INT2 EQU 2 +INT2E EQU 4 +INT2F EQU 1 +INT2IE EQU 4 +INT2IF EQU 1 +INT2IP EQU 7 +INT2P EQU 7 +INTCON EQU 4082 +INTCON2 EQU 4081 +INTCON3 EQU 4080 +INTEDG0 EQU 6 +INTEDG1 EQU 5 +INTEDG2 EQU 4 +INTSRC EQU 7 +IOFS EQU 2 +IPEN EQU 7 +IPR1 EQU 3999 +IPR2 EQU 4002 +IRCF0 EQU 4 +IRCF1 EQU 5 +IRCF2 EQU 6 +IRVST EQU 5 +IVRST EQU 5 +LATA EQU 3977 +LATA0 EQU 0 +LATA1 EQU 1 +LATA2 EQU 2 +LATA3 EQU 3 +LATA4 EQU 4 +LATA5 EQU 5 +LATA6 EQU 6 +LATB EQU 3978 +LATB0 EQU 0 +LATB1 EQU 1 +LATB2 EQU 2 +LATB3 EQU 3 +LATB4 EQU 4 +LATB5 EQU 5 +LATB6 EQU 6 +LATB7 EQU 7 +LATC EQU 3979 +LATC0 EQU 0 +LATC1 EQU 1 +LATC2 EQU 2 +LATC6 EQU 6 +LATC7 EQU 7 +LVDCON EQU 4050 +LVDCON_BGST EQU 5 +LVDCON_HLVDEN EQU 4 +LVDCON_HLVDL0 EQU 0 +LVDCON_HLVDL1 EQU 1 +LVDCON_HLVDL2 EQU 2 +LVDCON_HLVDL3 EQU 3 +LVDCON_IRVST EQU 5 +LVDCON_IVRST EQU 5 +LVDCON_LVDEN EQU 4 +LVDCON_LVDL0 EQU 0 +LVDCON_LVDL1 EQU 1 +LVDCON_LVDL2 EQU 2 +LVDCON_LVDL3 EQU 3 +LVDCON_LVV0 EQU 0 +LVDCON_LVV1 EQU 1 +LVDCON_LVV2 EQU 2 +LVDCON_LVV3 EQU 3 +LVDCON_VDIRMAG EQU 7 +LVDEN EQU 4 +LVDIE EQU 2 +LVDIF EQU 2 +LVDIN EQU 5 +LVDIP EQU 2 +LVDL0 EQU 0 +LVDL1 EQU 1 +LVDL2 EQU 2 +LVDL3 EQU 3 +LVV0 EQU 0 +LVV1 EQU 1 +LVV2 EQU 2 +LVV3 EQU 3 +N EQU 4 +NOT_A EQU 5 +NOT_ADDRESS EQU 5 +NOT_BOR EQU 0 +NOT_DONE EQU 1 +NOT_IPEN EQU 7 +NOT_PD EQU 2 +NOT_POR EQU 1 +NOT_RBPU EQU 7 +NOT_RI EQU 4 +NOT_T1SYNC EQU 2 +NOT_T3SYNC EQU 2 +NOT_TO EQU 3 +NOT_W EQU 2 +NOT_WRITE EQU 2 +OERR EQU 1 +OSC2 EQU 6 +OSCCON EQU 4051 +OSCFIE EQU 7 +OSCFIF EQU 7 +OSCFIP EQU 7 +OSCTUNE EQU 3995 +OSTS EQU 3 +OV EQU 3 +P EQU 4 +P1A EQU 2 +PC EQU 4089 +PCFG0 EQU 0 +PCFG1 EQU 1 +PCFG2 EQU 2 +PCFG3 EQU 3 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +PD EQU 2 +PEIE EQU 6 +PEN EQU 2 +PGC EQU 6 +PGD EQU 7 +PGM EQU 5 +PIDEE EQU 0 +PIDEF EQU 0 +PIE1 EQU 3997 +PIE2 EQU 4000 +PIR1 EQU 3998 +PIR2 EQU 4001 +PKTDIS EQU 4 +PLUSW0 EQU 4075 +PLUSW1 EQU 4067 +PLUSW2 EQU 4059 +POR EQU 1 +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +PORTE EQU 3972 +POSTDEC0 EQU 4077 +POSTDEC1 EQU 4069 +POSTDEC2 EQU 4061 +POSTINC0 EQU 4078 +POSTINC1 EQU 4070 +POSTINC2 EQU 4062 +PPB0 EQU 0 +PPB1 EQU 1 +PPBI EQU 1 +PPBRST EQU 6 +PR2 EQU 4043 +PREINC0 EQU 4076 +PREINC1 EQU 4068 +PREINC2 EQU 4060 +PRINTLEN EQU 22 +PROD EQU 4083 +PRODH EQU 4084 +PRODL EQU 4083 +PRSEN EQU 7 +PSA EQU 3 +PSSAC0 EQU 2 +PSSAC1 EQU 3 +R EQU 2 +RA0 EQU 0 +RA1 EQU 1 +RA2 EQU 2 +RA3 EQU 3 +RA4 EQU 4 +RA5 EQU 5 +RA6 EQU 6 +RB0 EQU 0 +RB1 EQU 1 +RB2 EQU 2 +RB3 EQU 3 +RB4 EQU 4 +RB5 EQU 5 +RB6 EQU 6 +RB7 EQU 7 +RBIE EQU 3 +RBIF EQU 0 +RBIP EQU 0 +RBPU EQU 7 +RC0 EQU 0 +RC1 EQU 1 +RC2 EQU 2 +RC4 EQU 4 +RC5 EQU 5 +RC6 EQU 6 +RC7 EQU 7 +RCEN EQU 3 +RCIDL EQU 6 +RCIE EQU 5 +RCIF EQU 5 +RCIP EQU 5 +RCMT EQU 6 +RCON EQU 4048 +RCREG EQU 4014 +RCSTA EQU 4011 +RD EQU 0 +RD16 EQU 7 +RE3 EQU 3 +READ_WRITE EQU 2 +RESUME EQU 2 +RI EQU 4 +RSEN EQU 1 +RX EQU 7 +RX9 EQU 6 +RX9D EQU 0 +RXDTP EQU 5 +R_W EQU 2 +S EQU 3 +SBOREN EQU 6 +SCKP EQU 4 +SCS0 EQU 0 +SCS1 EQU 1 +SE0 EQU 5 +SEN EQU 0 +SENDB EQU 3 +SERDATA EQU 23 +SMP EQU 7 +SOFIE EQU 6 +SOFIF EQU 6 +SPBRG EQU 4015 +SPBRGH EQU 4016 +SPEN EQU 7 +SREN EQU 5 +SSPADD EQU 4040 +SSPBUF EQU 4041 +SSPCON1 EQU 4038 +SSPCON2 EQU 4037 +SSPEN EQU 5 +SSPIE EQU 3 +SSPIF EQU 3 +SSPIP EQU 3 +SSPM0 EQU 0 +SSPM1 EQU 1 +SSPM2 EQU 2 +SSPM3 EQU 3 +SSPOV EQU 6 +SSPSTAT EQU 4039 +STALLIE EQU 5 +STALLIF EQU 5 +STATUS EQU 4056 +STKFUL EQU 7 +STKPTR EQU 4092 +STKPTR0 EQU 0 +STKPTR1 EQU 1 +STKPTR2 EQU 2 +STKPTR3 EQU 3 +STKPTR4 EQU 4 +STKUNF EQU 6 +STRINGPOINTER EQU 25 +STRINGTABLE1 EQU 1938 +STRINGTABLE2 EQU 1952 +STRINGTABLE3 EQU 1966 +STRINGTABLE4 EQU 1970 +STRINGTABLE5 EQU 1974 +STRINGTABLE6 EQU 1996 +SUSPND EQU 1 +SWDTE EQU 0 +SWDTEN EQU 0 +SYNC EQU 4 +SYSCALCTEMPA EQU 5 +SYSDOLOOP_E1 EQU 360 +SYSDOLOOP_S1 EQU 334 +SYSFORLOOP1 EQU 1602 +SYSFORLOOP2 EQU 1444 +SYSFORLOOP3 EQU 1474 +SYSFORLOOP4 EQU 1506 +SYSFORLOOP5 EQU 1536 +SYSFORLOOP6 EQU 1730 +SYSFORLOOPEND1 EQU 1654 +SYSFORLOOPEND2 EQU 1472 +SYSFORLOOPEND3 EQU 1504 +SYSFORLOOPEND4 EQU 1534 +SYSFORLOOPEND5 EQU 1562 +SYSFORLOOPEND6 EQU 1766 +SYSGLCDSTRDATHANDLER EQU 26 +SYSGLCDSTRDATHANDLER_H EQU 27 +SYSPRINTDATAHANDLER EQU 28 +SYSPRINTDATAHANDLER_H EQU 29 +SYSPRINTTEMP EQU 24 +SYSREADSTRING EQU 1896 +SYSREADSTRINGPART EQU 1910 +SYSREPEATLOOP1 EQU 40 +SYSREPEATLOOP2 EQU 1672 +SYSREPEATLOOP3 EQU 1424 +SYSREPEATLOOP4 EQU 1334 +SYSREPEATLOOP5 EQU 1380 +SYSREPEATLOOPEND1 EQU 318 +SYSREPEATLOOPEND2 EQU 1700 +SYSREPEATLOOPEND3 EQU 1440 +SYSREPEATLOOPEND4 EQU 1362 +SYSREPEATLOOPEND5 EQU 1408 +SYSREPEATTEMP1 EQU 30 +SYSREPEATTEMP2 EQU 31 +SYSREPEATTEMP3 EQU 32 +SYSREPEATTEMP3_H EQU 33 +SYSREPEATTEMP4 EQU 34 +SYSSTRINGA EQU 7 +SYSSTRINGA_H EQU 8 +SYSSTRINGLENGTH EQU 6 +SYSSTRINGPARAM1 EQU 2006 +SYSSTRINGREAD EQU 1926 +SYSSTRINGREADCHECK EQU 1920 +SYSSTRINGTABLES EQU 1938 +SYSTEMP1 EQU 35 +SYSWAITLOOP1 EQU 1768 +SYSWAITTEMPMS EQU 2 +SYSWAITTEMPMS_H EQU 3 +SYSWAITTEMPS EQU 4 +SYSWAITTEMPUS EQU 5 +SYSWAITTEMPUS_H EQU 6 +T08BIT EQU 6 +T0CKI EQU 4 +T0CON EQU 4053 +T0CS EQU 5 +T0IE EQU 5 +T0IF EQU 2 +T0IP EQU 2 +T0PS0 EQU 0 +T0PS1 EQU 1 +T0PS2 EQU 2 +T0SE EQU 4 +T13CKI EQU 0 +T1CKPS0 EQU 4 +T1CKPS1 EQU 5 +T1CON EQU 4045 +T1CON_RD16 EQU 7 +T1OSCEN EQU 3 +T1OSI EQU 1 +T1OSO EQU 0 +T1RUN EQU 6 +T1SYNC EQU 2 +T2CKPS0 EQU 0 +T2CKPS1 EQU 1 +T2CON EQU 4042 +T2OUTPS0 EQU 3 +T2OUTPS1 EQU 4 +T2OUTPS2 EQU 5 +T2OUTPS3 EQU 6 +T3CCP1 EQU 3 +T3CCP2 EQU 6 +T3CKPS0 EQU 4 +T3CKPS1 EQU 5 +T3CON EQU 4017 +T3NSYNC EQU 2 +T3SYNC EQU 2 +TABLAT EQU 4085 +TABLEASCII_TABLE_H EQU 756 +TABLEASCII_TABLE_L EQU 1024 +TBLPTR EQU 4086 +TBLPTRH EQU 4087 +TBLPTRL EQU 4086 +TBLPTRU EQU 4088 +TMR0H EQU 4055 +TMR0IE EQU 5 +TMR0IF EQU 2 +TMR0IP EQU 2 +TMR0L EQU 4054 +TMR0ON EQU 7 +TMR1CS EQU 1 +TMR1H EQU 4047 +TMR1IE EQU 0 +TMR1IF EQU 0 +TMR1IP EQU 0 +TMR1L EQU 4046 +TMR1ON EQU 0 +TMR2 EQU 4044 +TMR2IE EQU 1 +TMR2IF EQU 1 +TMR2IP EQU 1 +TMR2ON EQU 2 +TMR3CS EQU 1 +TMR3H EQU 4019 +TMR3IE EQU 1 +TMR3IF EQU 1 +TMR3IP EQU 1 +TMR3L EQU 4018 +TMR3ON EQU 0 +TO EQU 3 +TOS EQU 4093 +TOSH EQU 4094 +TOSL EQU 4093 +TOSU EQU 4095 +TRISA EQU 3986 +TRISA0 EQU 0 +TRISA1 EQU 1 +TRISA2 EQU 2 +TRISA3 EQU 3 +TRISA4 EQU 4 +TRISA5 EQU 5 +TRISA6 EQU 6 +TRISB EQU 3987 +TRISB0 EQU 0 +TRISB1 EQU 1 +TRISB2 EQU 2 +TRISB3 EQU 3 +TRISB4 EQU 4 +TRISB5 EQU 5 +TRISB6 EQU 6 +TRISB7 EQU 7 +TRISC EQU 3988 +TRISC0 EQU 0 +TRISC1 EQU 1 +TRISC2 EQU 2 +TRISC6 EQU 6 +TRISC7 EQU 7 +TRMT EQU 1 +TRNIE EQU 3 +TRNIF EQU 3 +TUN0 EQU 0 +TUN1 EQU 1 +TUN2 EQU 2 +TUN3 EQU 3 +TUN4 EQU 4 +TX EQU 6 +TX9 EQU 6 +TX9D EQU 0 +TXCKP EQU 4 +TXEN EQU 5 +TXIE EQU 4 +TXIF EQU 4 +TXIP EQU 4 +TXREG EQU 4013 +TXSTA EQU 4012 +UA EQU 1 +UADDR EQU 3950 +UCFG EQU 3951 +UCON EQU 3949 +UEIE EQU 3947 +UEIR EQU 3946 +UEP0 EQU 3952 +UEP1 EQU 3953 +UEP10 EQU 3962 +UEP10_EPCONDIS EQU 3 +UEP10_EPHSHK EQU 4 +UEP10_EPINEN EQU 1 +UEP10_EPOUTEN EQU 2 +UEP10_EPSTALL EQU 0 +UEP11 EQU 3963 +UEP11_EPCONDIS EQU 3 +UEP11_EPHSHK EQU 4 +UEP11_EPINEN EQU 1 +UEP11_EPOUTEN EQU 2 +UEP11_EPSTALL EQU 0 +UEP12 EQU 3964 +UEP12_EPCONDIS EQU 3 +UEP12_EPHSHK EQU 4 +UEP12_EPINEN EQU 1 +UEP12_EPOUTEN EQU 2 +UEP12_EPSTALL EQU 0 +UEP13 EQU 3965 +UEP13_EPCONDIS EQU 3 +UEP13_EPHSHK EQU 4 +UEP13_EPINEN EQU 1 +UEP13_EPOUTEN EQU 2 +UEP13_EPSTALL EQU 0 +UEP14 EQU 3966 +UEP14_EPCONDIS EQU 3 +UEP14_EPHSHK EQU 4 +UEP14_EPINEN EQU 1 +UEP14_EPOUTEN EQU 2 +UEP14_EPSTALL EQU 0 +UEP15 EQU 3967 +UEP15_EPCONDIS EQU 3 +UEP15_EPHSHK EQU 4 +UEP15_EPINEN EQU 1 +UEP15_EPOUTEN EQU 2 +UEP15_EPSTALL EQU 0 +UEP1_EPCONDIS EQU 3 +UEP1_EPHSHK EQU 4 +UEP1_EPINEN EQU 1 +UEP1_EPOUTEN EQU 2 +UEP1_EPSTALL EQU 0 +UEP2 EQU 3954 +UEP2_EPCONDIS EQU 3 +UEP2_EPHSHK EQU 4 +UEP2_EPINEN EQU 1 +UEP2_EPOUTEN EQU 2 +UEP2_EPSTALL EQU 0 +UEP3 EQU 3955 +UEP3_EPCONDIS EQU 3 +UEP3_EPHSHK EQU 4 +UEP3_EPINEN EQU 1 +UEP3_EPOUTEN EQU 2 +UEP3_EPSTALL EQU 0 +UEP4 EQU 3956 +UEP4_EPCONDIS EQU 3 +UEP4_EPHSHK EQU 4 +UEP4_EPINEN EQU 1 +UEP4_EPOUTEN EQU 2 +UEP4_EPSTALL EQU 0 +UEP5 EQU 3957 +UEP5_EPCONDIS EQU 3 +UEP5_EPHSHK EQU 4 +UEP5_EPINEN EQU 1 +UEP5_EPOUTEN EQU 2 +UEP5_EPSTALL EQU 0 +UEP6 EQU 3958 +UEP6_EPCONDIS EQU 3 +UEP6_EPHSHK EQU 4 +UEP6_EPINEN EQU 1 +UEP6_EPOUTEN EQU 2 +UEP6_EPSTALL EQU 0 +UEP7 EQU 3959 +UEP7_EPCONDIS EQU 3 +UEP7_EPHSHK EQU 4 +UEP7_EPINEN EQU 1 +UEP7_EPOUTEN EQU 2 +UEP7_EPSTALL EQU 0 +UEP8 EQU 3960 +UEP8_EPCONDIS EQU 3 +UEP8_EPHSHK EQU 4 +UEP8_EPINEN EQU 1 +UEP8_EPOUTEN EQU 2 +UEP8_EPSTALL EQU 0 +UEP9 EQU 3961 +UEP9_EPCONDIS EQU 3 +UEP9_EPHSHK EQU 4 +UEP9_EPINEN EQU 1 +UEP9_EPOUTEN EQU 2 +UEP9_EPSTALL EQU 0 +UERRIE EQU 1 +UERRIF EQU 1 +UFRM EQU 3942 +UFRMH EQU 3943 +UFRML EQU 3942 +UIE EQU 3945 +UIR EQU 3944 +UOEMON EQU 6 +UPUEN EQU 4 +URSTIE EQU 0 +URSTIF EQU 0 +USBEN EQU 3 +USBIE EQU 5 +USBIF EQU 5 +USBIP EQU 5 +USTAT EQU 3948 +UTEYE EQU 7 +UTRDIS EQU 3 +VCFG0 EQU 4 +VCFG1 EQU 5 +VDIRMAG EQU 7 +VREFM EQU 2 +VREFP EQU 3 +W EQU 0 +WCOL EQU 7 +WDTCON EQU 4049 +WR EQU 1 +WREG EQU 4072 +WREN EQU 2 +WRERR EQU 3 +WUE EQU 1 +Z EQU 2 + +Code: +Loc Obj Code Original Assembly + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +000000 EF06 F000 GOTO BASPROGRAMSTART + +000008 0010 RETFIE + + + + BASPROGRAMSTART +00000C DB94 RCALL INITSYS +00000E DBA2 RCALL INITUSART +000010 9E93 BCF TRISB,7,ACCESS +000012 9C93 BCF TRISB,6,ACCESS +000014 9A93 BCF TRISB,5,ACCESS +000016 9893 BCF TRISB,4,ACCESS +000018 9693 BCF TRISB,3,ACCESS +00001A 9493 BCF TRISB,2,ACCESS +00001C 9093 BCF TRISB,0,ACCESS + +00001E 968A BCF LATB,3,ACCESS +000020 948A BCF LATB,2,ACCESS +000022 DB67 RCALL INITGLCD +000024 0E03 MOVLW 3 +000026 6F1E MOVWF SYSREPEATTEMP1,BANKED + SYSREPEATLOOP1 +000028 968A BCF LATB,3,ACCESS +00002A 848A BSF LATB,2,ACCESS +00002C 0E01 MOVLW 1 +00002E 6F0D MOVWF DISPLAY,BANKED +000030 EE17 F0D6 LFSR 1,SYSSTRINGPARAM1 +000034 0EB6 MOVLW LOW STRINGTABLE5 +000036 6EF6 MOVWF TBLPTRL,ACCESS +000038 0E07 MOVLW HIGH STRINGTABLE5 +00003A 6EF7 MOVWF TBLPTRH,ACCESS +00003C DB95 RCALL SYSREADSTRING +00003E 0ED6 MOVLW LOW SYSSTRINGPARAM1 +000040 6F1C MOVWF SYSPRINTDATAHANDLER,BANKED +000042 0E07 MOVLW HIGH SYSSTRINGPARAM1 +000044 6F1D MOVWF SYSPRINTDATAHANDLER_H,BANKED +000046 DB2F RCALL HSERPRINT125 +000048 0E0A MOVLW 10 +00004A 6F17 MOVWF SERDATA,BANKED +00004C DB4D RCALL HSERSEND +00004E DA9C RCALL GLCDCLEAR +000050 0EF4 MOVLW 244 +000052 6E02 MOVWF SYSWAITTEMPMS,ACCESS +000054 0E01 MOVLW 1 +000056 6E03 MOVWF SYSWAITTEMPMS_H,ACCESS +000058 DA4C RCALL DELAY_MS +00005A 868A BSF LATB,3,ACCESS +00005C 948A BCF LATB,2,ACCESS +00005E 0E02 MOVLW 2 +000060 6F0D MOVWF DISPLAY,BANKED +000062 EE17 F0D6 LFSR 1,SYSSTRINGPARAM1 +000066 0ECC MOVLW LOW STRINGTABLE6 +000068 6EF6 MOVWF TBLPTRL,ACCESS +00006A 0E07 MOVLW HIGH STRINGTABLE6 +00006C 6EF7 MOVWF TBLPTRH,ACCESS +00006E DB7C RCALL SYSREADSTRING +000070 0ED6 MOVLW LOW SYSSTRINGPARAM1 +000072 6F1C MOVWF SYSPRINTDATAHANDLER,BANKED +000074 0E07 MOVLW HIGH SYSSTRINGPARAM1 +000076 6F1D MOVWF SYSPRINTDATAHANDLER_H,BANKED +000078 DB16 RCALL HSERPRINT125 +00007A 0E0A MOVLW 10 +00007C 6F17 MOVWF SERDATA,BANKED +00007E DB34 RCALL HSERSEND +000080 DA83 RCALL GLCDCLEAR +000082 0EF4 MOVLW 244 +000084 6E02 MOVWF SYSWAITTEMPMS,ACCESS +000086 0E01 MOVLW 1 +000088 6E03 MOVWF SYSWAITTEMPMS_H,ACCESS +00008A DA33 RCALL DELAY_MS +00008C 968A BCF LATB,3,ACCESS +00008E 848A BSF LATB,2,ACCESS +000090 0E01 MOVLW 1 +000092 6F0D MOVWF DISPLAY,BANKED +000094 EE17 F0D6 LFSR 1,SYSSTRINGPARAM1 +000098 0EB6 MOVLW LOW STRINGTABLE5 +00009A 6EF6 MOVWF TBLPTRL,ACCESS +00009C 0E07 MOVLW HIGH STRINGTABLE5 +00009E 6EF7 MOVWF TBLPTRH,ACCESS +0000A0 DB63 RCALL SYSREADSTRING +0000A2 0ED6 MOVLW LOW SYSSTRINGPARAM1 +0000A4 6F1C MOVWF SYSPRINTDATAHANDLER,BANKED +0000A6 0E07 MOVLW HIGH SYSSTRINGPARAM1 +0000A8 6F1D MOVWF SYSPRINTDATAHANDLER_H,BANKED +0000AA DAFD RCALL HSERPRINT125 +0000AC 0E0A MOVLW 10 +0000AE 6F17 MOVWF SERDATA,BANKED +0000B0 DB1B RCALL HSERSEND +0000B2 DA6A RCALL GLCDCLEAR +0000B4 DA76 RCALL GLCDDRAWFRAME +0000B6 0E01 MOVLW 1 +0000B8 6F14 MOVWF GLCDP_X,BANKED +0000BA 0E01 MOVLW 1 +0000BC 6F15 MOVWF GLCDP_Y,BANKED +0000BE DAAE RCALL GLCDGOTOXY +0000C0 EE17 F0D6 LFSR 1,SYSSTRINGPARAM1 +0000C4 0E92 MOVLW LOW STRINGTABLE1 +0000C6 6EF6 MOVWF TBLPTRL,ACCESS +0000C8 0E07 MOVLW HIGH STRINGTABLE1 +0000CA 6EF7 MOVWF TBLPTRH,ACCESS +0000CC DB4D RCALL SYSREADSTRING +0000CE 0ED6 MOVLW LOW SYSSTRINGPARAM1 +0000D0 6F1A MOVWF SYSGLCDSTRDATHANDLER,BANKED +0000D2 0E07 MOVLW HIGH SYSSTRINGPARAM1 +0000D4 6F1B MOVWF SYSGLCDSTRDATHANDLER_H,BANKED +0000D6 DAAC RCALL GLCDPRINT9 +0000D8 0EF4 MOVLW 244 +0000DA 6E02 MOVWF SYSWAITTEMPMS,ACCESS +0000DC 0E01 MOVLW 1 +0000DE 6E03 MOVWF SYSWAITTEMPMS_H,ACCESS +0000E0 DA08 RCALL DELAY_MS +0000E2 868A BSF LATB,3,ACCESS +0000E4 948A BCF LATB,2,ACCESS +0000E6 0E02 MOVLW 2 +0000E8 6F0D MOVWF DISPLAY,BANKED +0000EA EE17 F0D6 LFSR 1,SYSSTRINGPARAM1 +0000EE 0ECC MOVLW LOW STRINGTABLE6 +0000F0 6EF6 MOVWF TBLPTRL,ACCESS +0000F2 0E07 MOVLW HIGH STRINGTABLE6 +0000F4 6EF7 MOVWF TBLPTRH,ACCESS +0000F6 DB38 RCALL SYSREADSTRING +0000F8 0ED6 MOVLW LOW SYSSTRINGPARAM1 +0000FA 6F1C MOVWF SYSPRINTDATAHANDLER,BANKED +0000FC 0E07 MOVLW HIGH SYSSTRINGPARAM1 +0000FE 6F1D MOVWF SYSPRINTDATAHANDLER_H,BANKED +000100 DAD2 RCALL HSERPRINT125 +000102 0E0A MOVLW 10 +000104 6F17 MOVWF SERDATA,BANKED +000106 DAF0 RCALL HSERSEND +000108 DA3F RCALL GLCDCLEAR +00010A DA4B RCALL GLCDDRAWFRAME +00010C DA4A RCALL GLCDDRAWFRAME +00010E 0E01 MOVLW 1 +000110 6F14 MOVWF GLCDP_X,BANKED +000112 0E01 MOVLW 1 +000114 6F15 MOVWF GLCDP_Y,BANKED +000116 DA82 RCALL GLCDGOTOXY +000118 EE17 F0D6 LFSR 1,SYSSTRINGPARAM1 +00011C 0EA0 MOVLW LOW STRINGTABLE2 +00011E 6EF6 MOVWF TBLPTRL,ACCESS +000120 0E07 MOVLW HIGH STRINGTABLE2 +000122 6EF7 MOVWF TBLPTRH,ACCESS +000124 DB21 RCALL SYSREADSTRING +000126 0ED6 MOVLW LOW SYSSTRINGPARAM1 +000128 6F1A MOVWF SYSGLCDSTRDATHANDLER,BANKED +00012A 0E07 MOVLW HIGH SYSSTRINGPARAM1 +00012C 6F1B MOVWF SYSGLCDSTRDATHANDLER_H,BANKED +00012E DA80 RCALL GLCDPRINT9 +000130 0EF4 MOVLW 244 +000132 6E02 MOVWF SYSWAITTEMPMS,ACCESS +000134 0E01 MOVLW 1 +000136 6E03 MOVWF SYSWAITTEMPMS_H,ACCESS +000138 D9DC RCALL DELAY_MS +00013A 2F1E DECFSZ SYSREPEATTEMP1,F,BANKED +00013C D775 BRA SYSREPEATLOOP1 + SYSREPEATLOOPEND1 +00013E 0E01 MOVLW 1 +000140 6E04 MOVWF SYSWAITTEMPS,ACCESS +000142 D9E5 RCALL DELAY_S +000144 6B09 CLRF CC_X,BANKED +000146 6B0B CLRF C_X,BANKED +000148 6B0C CLRF C_Y,BANKED +00014A 6B0E CLRF D_X,BANKED +00014C 6B0F CLRF D_Y,BANKED + SYSDOLOOP_S1 +00014E 808A BSF LATB,0,ACCESS +000150 D80D RCALL ANIMATE +000152 0EC8 MOVLW 200 +000154 6E02 MOVWF SYSWAITTEMPMS,ACCESS +000156 6A03 CLRF SYSWAITTEMPMS_H,ACCESS +000158 D9CC RCALL DELAY_MS +00015A 908A BCF LATB,0,ACCESS +00015C D807 RCALL ANIMATE +00015E 0EC8 MOVLW 200 +000160 6E02 MOVWF SYSWAITTEMPMS,ACCESS +000162 6A03 CLRF SYSWAITTEMPMS_H,ACCESS +000164 D9C6 RCALL DELAY_MS +000166 D7F3 BRA SYSDOLOOP_S1 + SYSDOLOOP_E1 + BASPROGRAMEND +000168 0003 SLEEP +00016A D7FE BRA BASPROGRAMEND + + + ANIMATE +00016C 510B MOVF C_X,W,BANKED +00016E 084E SUBLW 78 +000170 B0D8 BTFSC STATUS, C,ACCESS +000172 D017 BRA ELSE1_1 +000174 050D DECF DISPLAY,W,BANKED +000176 A4D8 BTFSS STATUS, Z,ACCESS +000178 D013 BRA ENDIF9 +00017A 868A BSF LATB,3,ACCESS +00017C 948A BCF LATB,2,ACCESS +00017E 0E02 MOVLW 2 +000180 6F0D MOVWF DISPLAY,BANKED +000182 EE17 F0D6 LFSR 1,SYSSTRINGPARAM1 +000186 0ECC MOVLW LOW STRINGTABLE6 +000188 6EF6 MOVWF TBLPTRL,ACCESS +00018A 0E07 MOVLW HIGH STRINGTABLE6 +00018C 6EF7 MOVWF TBLPTRH,ACCESS +00018E DAEC RCALL SYSREADSTRING +000190 0ED6 MOVLW LOW SYSSTRINGPARAM1 +000192 6F1C MOVWF SYSPRINTDATAHANDLER,BANKED +000194 0E07 MOVLW HIGH SYSSTRINGPARAM1 +000196 6F1D MOVWF SYSPRINTDATAHANDLER_H,BANKED +000198 DA86 RCALL HSERPRINT125 +00019A 0E0A MOVLW 10 +00019C 6F17 MOVWF SERDATA,BANKED +00019E DAA4 RCALL HSERSEND + ENDIF9 +0001A0 D017 BRA ENDIF1 + ELSE1_1 +0001A2 0E02 MOVLW 2 +0001A4 5D0D SUBWF DISPLAY,W,BANKED +0001A6 A4D8 BTFSS STATUS, Z,ACCESS +0001A8 D013 BRA ENDIF10 +0001AA 968A BCF LATB,3,ACCESS +0001AC 848A BSF LATB,2,ACCESS +0001AE 0E01 MOVLW 1 +0001B0 6F0D MOVWF DISPLAY,BANKED +0001B2 EE17 F0D6 LFSR 1,SYSSTRINGPARAM1 +0001B6 0EB6 MOVLW LOW STRINGTABLE5 +0001B8 6EF6 MOVWF TBLPTRL,ACCESS +0001BA 0E07 MOVLW HIGH STRINGTABLE5 +0001BC 6EF7 MOVWF TBLPTRH,ACCESS +0001BE DAD4 RCALL SYSREADSTRING +0001C0 0ED6 MOVLW LOW SYSSTRINGPARAM1 +0001C2 6F1C MOVWF SYSPRINTDATAHANDLER,BANKED +0001C4 0E07 MOVLW HIGH SYSSTRINGPARAM1 +0001C6 6F1D MOVWF SYSPRINTDATAHANDLER_H,BANKED +0001C8 DA6E RCALL HSERPRINT125 +0001CA 0E0A MOVLW 10 +0001CC 6F17 MOVWF SERDATA,BANKED +0001CE DA8C RCALL HSERSEND + ENDIF10 + ENDIF1 +0001D0 C009 F014 MOVFF CC_X,GLCDP_X +0001D4 C00C F015 MOVFF C_Y,GLCDP_Y +0001D8 DA21 RCALL GLCDGOTOXY +0001DA EE17 F0D6 LFSR 1,SYSSTRINGPARAM1 +0001DE 0EAE MOVLW LOW STRINGTABLE3 +0001E0 6EF6 MOVWF TBLPTRL,ACCESS +0001E2 0E07 MOVLW HIGH STRINGTABLE3 +0001E4 6EF7 MOVWF TBLPTRH,ACCESS +0001E6 DAC0 RCALL SYSREADSTRING +0001E8 0ED6 MOVLW LOW SYSSTRINGPARAM1 +0001EA 6F1A MOVWF SYSGLCDSTRDATHANDLER,BANKED +0001EC 0E07 MOVLW HIGH SYSSTRINGPARAM1 +0001EE 6F1B MOVWF SYSGLCDSTRDATHANDLER_H,BANKED +0001F0 DA1F RCALL GLCDPRINT9 +0001F2 530E MOVF D_X,F,BANKED +0001F4 A4D8 BTFSS STATUS, Z,ACCESS +0001F6 D003 BRA ELSE2_1 +0001F8 0E06 MOVLW 6 +0001FA 270B ADDWF C_X,F,BANKED +0001FC D002 BRA ENDIF2 + ELSE2_1 +0001FE 0E06 MOVLW 6 +000200 5F0B SUBWF C_X,F,BANKED + ENDIF2 +000202 530F MOVF D_Y,F,BANKED +000204 A4D8 BTFSS STATUS, Z,ACCESS +000206 D002 BRA ELSE3_1 +000208 2B0C INCF C_Y,F,BANKED +00020A D001 BRA ENDIF3 + ELSE3_1 +00020C 070C DECF C_Y,F,BANKED + ENDIF3 +00020E 0E05 MOVLW 5 +000210 5D0C SUBWF C_Y,W,BANKED +000212 A4D8 BTFSS STATUS, Z,ACCESS +000214 D002 BRA ENDIF4 +000216 0E01 MOVLW 1 +000218 6F0F MOVWF D_Y,BANKED + ENDIF4 +00021A 530C MOVF C_Y,F,BANKED +00021C B4D8 BTFSC STATUS, Z,ACCESS +00021E 6B0F CLRF D_Y,BANKED +000220 0EA2 MOVLW 162 +000222 5D0B SUBWF C_X,W,BANKED +000224 A4D8 BTFSS STATUS, Z,ACCESS +000226 D002 BRA ENDIF6 +000228 0E01 MOVLW 1 +00022A 6F0E MOVWF D_X,BANKED + ENDIF6 +00022C 530B MOVF C_X,F,BANKED +00022E B4D8 BTFSC STATUS, Z,ACCESS +000230 6B0E CLRF D_X,BANKED +000232 510B MOVF C_X,W,BANKED +000234 084E SUBLW 78 +000236 B0D8 BTFSC STATUS, C,ACCESS +000238 D01A BRA ELSE8_1 +00023A 0E54 MOVLW 84 +00023C 5D0B SUBWF C_X,W,BANKED +00023E 6F09 MOVWF CC_X,BANKED +000240 050D DECF DISPLAY,W,BANKED +000242 A4D8 BTFSS STATUS, Z,ACCESS +000244 D013 BRA ENDIF11 +000246 868A BSF LATB,3,ACCESS +000248 948A BCF LATB,2,ACCESS +00024A 0E02 MOVLW 2 +00024C 6F0D MOVWF DISPLAY,BANKED +00024E EE17 F0D6 LFSR 1,SYSSTRINGPARAM1 +000252 0ECC MOVLW LOW STRINGTABLE6 +000254 6EF6 MOVWF TBLPTRL,ACCESS +000256 0E07 MOVLW HIGH STRINGTABLE6 +000258 6EF7 MOVWF TBLPTRH,ACCESS +00025A DA86 RCALL SYSREADSTRING +00025C 0ED6 MOVLW LOW SYSSTRINGPARAM1 +00025E 6F1C MOVWF SYSPRINTDATAHANDLER,BANKED +000260 0E07 MOVLW HIGH SYSSTRINGPARAM1 +000262 6F1D MOVWF SYSPRINTDATAHANDLER_H,BANKED +000264 DA20 RCALL HSERPRINT125 +000266 0E0A MOVLW 10 +000268 6F17 MOVWF SERDATA,BANKED +00026A DA3E RCALL HSERSEND + ENDIF11 +00026C D019 BRA ENDIF8 + ELSE8_1 +00026E C00B F009 MOVFF C_X,CC_X +000272 0E02 MOVLW 2 +000274 5D0D SUBWF DISPLAY,W,BANKED +000276 A4D8 BTFSS STATUS, Z,ACCESS +000278 D013 BRA ENDIF12 +00027A 968A BCF LATB,3,ACCESS +00027C 848A BSF LATB,2,ACCESS +00027E 0E01 MOVLW 1 +000280 6F0D MOVWF DISPLAY,BANKED +000282 EE17 F0D6 LFSR 1,SYSSTRINGPARAM1 +000286 0EB6 MOVLW LOW STRINGTABLE5 +000288 6EF6 MOVWF TBLPTRL,ACCESS +00028A 0E07 MOVLW HIGH STRINGTABLE5 +00028C 6EF7 MOVWF TBLPTRH,ACCESS +00028E DA6C RCALL SYSREADSTRING +000290 0ED6 MOVLW LOW SYSSTRINGPARAM1 +000292 6F1C MOVWF SYSPRINTDATAHANDLER,BANKED +000294 0E07 MOVLW HIGH SYSSTRINGPARAM1 +000296 6F1D MOVWF SYSPRINTDATAHANDLER_H,BANKED +000298 DA06 RCALL HSERPRINT125 +00029A 0E0A MOVLW 10 +00029C 6F17 MOVWF SERDATA,BANKED +00029E DA24 RCALL HSERSEND + ENDIF12 + ENDIF8 +0002A0 C009 F014 MOVFF CC_X,GLCDP_X +0002A4 C00C F015 MOVFF C_Y,GLCDP_Y +0002A8 D9B9 RCALL GLCDGOTOXY +0002AA EE17 F0D6 LFSR 1,SYSSTRINGPARAM1 +0002AE 0EB2 MOVLW LOW STRINGTABLE4 +0002B0 6EF6 MOVWF TBLPTRL,ACCESS +0002B2 0E07 MOVLW HIGH STRINGTABLE4 +0002B4 6EF7 MOVWF TBLPTRH,ACCESS +0002B6 DA58 RCALL SYSREADSTRING +0002B8 0ED6 MOVLW LOW SYSSTRINGPARAM1 +0002BA 6F1A MOVWF SYSGLCDSTRDATHANDLER,BANKED +0002BC 0E07 MOVLW HIGH SYSSTRINGPARAM1 +0002BE 6F1B MOVWF SYSGLCDSTRDATHANDLER_H,BANKED +0002C0 D9B7 RCALL GLCDPRINT9 +0002C2 EE17 F0D6 LFSR 1,SYSSTRINGPARAM1 +0002C6 0EB2 MOVLW LOW STRINGTABLE4 +0002C8 6EF6 MOVWF TBLPTRL,ACCESS +0002CA 0E07 MOVLW HIGH STRINGTABLE4 +0002CC 6EF7 MOVWF TBLPTRH,ACCESS +0002CE DA4C RCALL SYSREADSTRING +0002D0 0ED6 MOVLW LOW SYSSTRINGPARAM1 +0002D2 6F1C MOVWF SYSPRINTDATAHANDLER,BANKED +0002D4 0E07 MOVLW HIGH SYSSTRINGPARAM1 +0002D6 6F1D MOVWF SYSPRINTDATAHANDLER_H,BANKED +0002D8 D1E6 BRA HSERPRINT125 + + + ASCII_TABLE_H +0002DA 0EF1 MOVLW 241 +0002DC 6007 CPFSLT SYSSTRINGA,ACCESS +0002DE 0C00 RETLW 0 +0002E0 5007 MOVF SYSSTRINGA, W,ACCESS +0002E2 0FF4 ADDLW LOW TABLEASCII_TABLE_H +0002E4 6EF6 MOVWF TBLPTRL,ACCESS +0002E6 0E02 MOVLW HIGH TABLEASCII_TABLE_H +0002E8 B0D8 BTFSC STATUS, C,ACCESS +0002EA 0F01 ADDLW 1 +0002EC 6EF7 MOVWF TBLPTRH,ACCESS +0002EE 0008 TBLRD* +0002F0 50F5 MOVF TABLAT, W,ACCESS +0002F2 0012 RETURN + TABLEASCII_TABLE_H +0002F4 7FF0 0909 0609 413E 2151 7F5E 1909 4629 4946 4949 0131 7F01 0101 403F RAW 7FF0,0909,0609,413E,2151,7F5E,1909,4629,4946,4949,0131,7F01,0101,403F +000310 4040 1F3F 4020 1F20 403F 4038 633F 0814 6314 0807 0870 6107 4951 4345 RAW 4040,1F3F,4020,1F20,403F,4038,633F,0814,6314,0807,0870,6107,4951,4345 +00032C 7F00 4141 0200 0804 2010 4100 7F41 0400 0102 0402 4040 4040 0040 0201 0004 5420 RAW 7F00,4141,0200,0804,2010,4100,7F41,0400,0102,0402,4040,4040,0040,0201,0004,5420 +00034C 5454 7F78 4448 3844 4438 4444 3820 4444 7F48 5438 5454 0818 097E RAW 5454,7F78,4448,3844,4438,4444,3820,4444,7F48,5438,5454,0818,097E +000366 0201 520C 5252 7F3E 0408 7804 4400 407D 2000 4440 003D 107F 4428 0000 RAW 0201,520C,5252,7F3E,0408,7804,4400,407D,2000,4440,003D,107F,4428,0000 +000382 7F41 0040 047C 0418 7C78 0408 7804 4438 4444 7C38 1414 0814 1408 1814 RAW 7F41,0040,047C,0418,7C78,0408,7804,4438,4444,7C38,1414,0814,1408,1814 +00039E 7C7C 0408 0804 5448 5454 0420 443F 2040 403C 2040 1C7C 4020 1C20 403C RAW 7C7C,0408,0804,5448,5454,0420,443F,2040,403C,2040,1C7C,4020,1C20,403C +0003BA 4030 443C 1028 4428 500C 5050 443C 5464 444C 0800 4136 0000 7F00 0000 RAW 4030,443C,1028,4428,500C,5050,443C,5464,444C,0800,4136,0000,7F00,0000 +0003D6 4100 0836 1000 0808 0810 0600 0909 0006 RAW 4100,0836,1000,0808,0810,0600,0909,0006 + + + ASCII_TABLE_L +0003E6 0EF1 MOVLW 241 +0003E8 6007 CPFSLT SYSSTRINGA,ACCESS +0003EA 0C00 RETLW 0 +0003EC 5007 MOVF SYSSTRINGA, W,ACCESS +0003EE 0F00 ADDLW LOW TABLEASCII_TABLE_L +0003F0 6EF6 MOVWF TBLPTRL,ACCESS +0003F2 0E04 MOVLW HIGH TABLEASCII_TABLE_L +0003F4 B0D8 BTFSC STATUS, C,ACCESS +0003F6 0F01 ADDLW 1 +0003F8 6EF7 MOVWF TBLPTRH,ACCESS +0003FA 0008 TBLRD* +0003FC 50F5 MOVF TABLAT, W,ACCESS +0003FE 0012 RETURN + TABLEASCII_TABLE_L +000400 00F0 0000 0000 0000 005F 0000 0007 0007 7F14 7F14 2414 7F2A 122A 1323 6408 RAW 00F0,0000,0000,0000,005F,0000,0007,0007,7F14,7F14,2414,7F2A,122A,1323,6408 +00041E 3662 5549 5022 0500 0003 0000 221C 0041 4100 1C22 1400 3E08 1408 0808 083E 0008 RAW 3662,5549,5022,0500,0003,0000,221C,0041,4100,1C22,1400,3E08,1408,0808,083E,0008 +00043E 3050 0000 0808 0808 0008 6060 0000 1020 0408 3E02 4951 3E45 4200 407F 4200 5161 RAW 3050,0000,0808,0808,0008,6060,0000,1020,0408,3E02,4951,3E45,4200,407F,4200,5161 +00045E 4649 4121 4B45 1831 1214 107F 4527 4545 3C39 494A 3049 7101 0509 3603 RAW 4649,4121,4B45,1831,1214,107F,4527,4545,3C39,494A,3049,7101,0509,3603 +00047A 4949 3649 4906 2949 001E 3636 0000 5600 0036 0800 2214 0041 1414 1414 0014 RAW 4949,3649,4906,2949,001E,3636,0000,5600,0036,0800,2214,0041,1414,1414,0014 +000498 2241 0814 0102 0951 3206 7949 3E41 117E 1111 7F7E 4949 3649 413E 4141 RAW 2241,0814,0102,0951,3206,7949,3E41,117E,1111,7F7E,4949,3649,413E,4141 +0004B4 7F22 4141 1C22 497F 4949 7F41 0909 0109 413E 4949 7F7A 0808 7F08 4100 RAW 7F22,4141,1C22,497F,4949,7F41,0909,0109,413E,4949,7F7A,0808,7F08,4100 +0004D0 417F 2000 4140 013F 087F 2214 7F41 4040 4040 027F 020C 7F7F 0804 7F10 RAW 417F,2000,4140,013F,087F,2214,7F41,4040,4040,027F,020C,7F7F,0804,7F10 +0004EC 413E 4141 003E RAW 413E,4141,003E + + + DELAY_MS +0004F2 2A03 INCF SYSWAITTEMPMS_H, F,ACCESS + DMS_START +0004F4 0E6C MOVLW 108 +0004F6 6E01 MOVWF DELAYTEMP2,ACCESS + DMS_OUTER +0004F8 0E0B MOVLW 11 +0004FA 6E00 MOVWF DELAYTEMP,ACCESS + DMS_INNER +0004FC 2E00 DECFSZ DELAYTEMP, F,ACCESS +0004FE D7FE BRA DMS_INNER +000500 2E01 DECFSZ DELAYTEMP2, F,ACCESS +000502 D7FA BRA DMS_OUTER +000504 2E02 DECFSZ SYSWAITTEMPMS, F,ACCESS +000506 D7F6 BRA DMS_START +000508 2E03 DECFSZ SYSWAITTEMPMS_H, F,ACCESS +00050A D7F4 BRA DMS_START +00050C 0012 RETURN + + + DELAY_S + DS_START +00050E 0EE8 MOVLW 232 +000510 6E02 MOVWF SYSWAITTEMPMS,ACCESS +000512 0E03 MOVLW 3 +000514 6E03 MOVWF SYSWAITTEMPMS_H,ACCESS +000516 DFED RCALL DELAY_MS +000518 2E04 DECFSZ SYSWAITTEMPS, F,ACCESS +00051A D7F9 BRA DS_START +00051C 0012 RETURN + + + GLCDCHARACTER +00051E 0E50 MOVLW 80 +000520 5D10 SUBWF GLCDCHAR,W,BANKED +000522 B0D8 BTFSC STATUS, C,ACCESS +000524 D017 BRA ELSE24_1 +000526 0E20 MOVLW 32 +000528 5D10 SUBWF GLCDCHAR,W,BANKED +00052A 6F23 MOVWF SYSTEMP1,BANKED +00052C 0D05 MULLW 5 +00052E CFF3 F010 MOVFF PRODL,GLCDCHAR +000532 0E05 MOVLW 5 +000534 6F22 MOVWF SYSREPEATTEMP4,BANKED + SYSREPEATLOOP4 +000536 2B10 INCF GLCDCHAR,F,BANKED +000538 C010 F007 MOVFF GLCDCHAR,SYSSTRINGA +00053C DF54 RCALL ASCII_TABLE_L +00053E 6F0A MOVWF CHARLINE,BANKED +000540 0E01 MOVLW 1 +000542 6F11 MOVWF GLCDCOMDAT,BANKED +000544 C00A F012 MOVFF CHARLINE,GLCDDAT +000548 D897 RCALL GLCDWRITE +00054A C012 F00A MOVFF GLCDDAT,CHARLINE +00054E 2F22 DECFSZ SYSREPEATTEMP4,F,BANKED +000550 D7F2 BRA SYSREPEATLOOP4 + SYSREPEATLOOPEND4 +000552 D016 BRA ENDIF24 + ELSE24_1 +000554 0E50 MOVLW 80 +000556 5D10 SUBWF GLCDCHAR,W,BANKED +000558 6F23 MOVWF SYSTEMP1,BANKED +00055A 0D05 MULLW 5 +00055C CFF3 F010 MOVFF PRODL,GLCDCHAR +000560 0E05 MOVLW 5 +000562 6F22 MOVWF SYSREPEATTEMP4,BANKED + SYSREPEATLOOP5 +000564 2B10 INCF GLCDCHAR,F,BANKED +000566 C010 F007 MOVFF GLCDCHAR,SYSSTRINGA +00056A DEB7 RCALL ASCII_TABLE_H +00056C 6F0A MOVWF CHARLINE,BANKED +00056E 0E01 MOVLW 1 +000570 6F11 MOVWF GLCDCOMDAT,BANKED +000572 C00A F012 MOVFF CHARLINE,GLCDDAT +000576 D880 RCALL GLCDWRITE +000578 C012 F00A MOVFF GLCDDAT,CHARLINE +00057C 2F22 DECFSZ SYSREPEATTEMP4,F,BANKED +00057E D7F2 BRA SYSREPEATLOOP5 + SYSREPEATLOOPEND5 + ENDIF24 +000580 0E01 MOVLW 1 +000582 6F11 MOVWF GLCDCOMDAT,BANKED +000584 6B12 CLRF GLCDDAT,BANKED +000586 D078 BRA GLCDWRITE + + + GLCDCLEAR +000588 0EF7 MOVLW 247 +00058A 6F20 MOVWF SYSREPEATTEMP3,BANKED +00058C 0E02 MOVLW 2 +00058E 6F21 MOVWF SYSREPEATTEMP3_H,BANKED + SYSREPEATLOOP3 +000590 0E01 MOVLW 1 +000592 6F11 MOVWF GLCDCOMDAT,BANKED +000594 6B12 CLRF GLCDDAT,BANKED +000596 D870 RCALL GLCDWRITE +000598 2F20 DECFSZ SYSREPEATTEMP3,F,BANKED +00059A D7FA BRA SYSREPEATLOOP3 +00059C 2F21 DECFSZ SYSREPEATTEMP3_H,F,BANKED +00059E D7F8 BRA SYSREPEATLOOP3 + SYSREPEATLOOPEND3 +0005A0 0012 RETURN + + + GLCDDRAWFRAME +0005A2 6913 SETF GLCDINDEX,BANKED + SYSFORLOOP2 +0005A4 2B13 INCF GLCDINDEX,F,BANKED +0005A6 C013 F014 MOVFF GLCDINDEX,GLCDP_X +0005AA 6B15 CLRF GLCDP_Y,BANKED +0005AC D837 RCALL GLCDGOTOXY +0005AE 0E01 MOVLW 1 +0005B0 6F11 MOVWF GLCDCOMDAT,BANKED +0005B2 0E01 MOVLW 1 +0005B4 6F12 MOVWF GLCDDAT,BANKED +0005B6 D860 RCALL GLCDWRITE +0005B8 0E53 MOVLW 83 +0005BA 5D13 SUBWF GLCDINDEX,W,BANKED +0005BC A0D8 BTFSS STATUS, C,ACCESS +0005BE D7F2 BRA SYSFORLOOP2 + SYSFORLOOPEND2 +0005C0 6913 SETF GLCDINDEX,BANKED + SYSFORLOOP3 +0005C2 2B13 INCF GLCDINDEX,F,BANKED +0005C4 C013 F014 MOVFF GLCDINDEX,GLCDP_X +0005C8 0E05 MOVLW 5 +0005CA 6F15 MOVWF GLCDP_Y,BANKED +0005CC D827 RCALL GLCDGOTOXY +0005CE 0E01 MOVLW 1 +0005D0 6F11 MOVWF GLCDCOMDAT,BANKED +0005D2 0E80 MOVLW 128 +0005D4 6F12 MOVWF GLCDDAT,BANKED +0005D6 D850 RCALL GLCDWRITE +0005D8 0E53 MOVLW 83 +0005DA 5D13 SUBWF GLCDINDEX,W,BANKED +0005DC A0D8 BTFSS STATUS, C,ACCESS +0005DE D7F1 BRA SYSFORLOOP3 + SYSFORLOOPEND3 +0005E0 6913 SETF GLCDINDEX,BANKED + SYSFORLOOP4 +0005E2 2B13 INCF GLCDINDEX,F,BANKED +0005E4 0E53 MOVLW 83 +0005E6 6F14 MOVWF GLCDP_X,BANKED +0005E8 C013 F015 MOVFF GLCDINDEX,GLCDP_Y +0005EC D817 RCALL GLCDGOTOXY +0005EE 0E01 MOVLW 1 +0005F0 6F11 MOVWF GLCDCOMDAT,BANKED +0005F2 6912 SETF GLCDDAT,BANKED +0005F4 D841 RCALL GLCDWRITE +0005F6 0E05 MOVLW 5 +0005F8 5D13 SUBWF GLCDINDEX,W,BANKED +0005FA A0D8 BTFSS STATUS, C,ACCESS +0005FC D7F2 BRA SYSFORLOOP4 + SYSFORLOOPEND4 +0005FE 6913 SETF GLCDINDEX,BANKED + SYSFORLOOP5 +000600 2B13 INCF GLCDINDEX,F,BANKED +000602 6B14 CLRF GLCDP_X,BANKED +000604 C013 F015 MOVFF GLCDINDEX,GLCDP_Y +000608 D809 RCALL GLCDGOTOXY +00060A 0E01 MOVLW 1 +00060C 6F11 MOVWF GLCDCOMDAT,BANKED +00060E 6912 SETF GLCDDAT,BANKED +000610 D833 RCALL GLCDWRITE +000612 0E05 MOVLW 5 +000614 5D13 SUBWF GLCDINDEX,W,BANKED +000616 A0D8 BTFSS STATUS, C,ACCESS +000618 D7F3 BRA SYSFORLOOP5 + SYSFORLOOPEND5 +00061A 0012 RETURN + + + GLCDGOTOXY +00061C 6B11 CLRF GLCDCOMDAT,BANKED +00061E 0E80 MOVLW 128 +000620 1114 IORWF GLCDP_X,W,BANKED +000622 6F12 MOVWF GLCDDAT,BANKED +000624 D829 RCALL GLCDWRITE +000626 6B11 CLRF GLCDCOMDAT,BANKED +000628 0E40 MOVLW 64 +00062A 1115 IORWF GLCDP_Y,W,BANKED +00062C 6F12 MOVWF GLCDDAT,BANKED +00062E D024 BRA GLCDWRITE + + + GLCDPRINT9 +000630 6B13 CLRF GLCDINDEX,BANKED +000632 C01A FFE9 MOVFF SYSGLCDSTRDATHANDLER,AFSR0 +000636 C01B FFEA MOVFF SYSGLCDSTRDATHANDLER_H,AFSR0_H +00063A 0E01 MOVLW 1 +00063C 5CEF SUBWF INDF0,W,ACCESS +00063E A0D8 BTFSS STATUS, C,ACCESS +000640 D01A BRA SYSFORLOOPEND1 + SYSFORLOOP1 +000642 2B13 INCF GLCDINDEX,F,BANKED +000644 5113 MOVF GLCDINDEX,W,BANKED +000646 251A ADDWF SYSGLCDSTRDATHANDLER,W,BANKED +000648 6EE9 MOVWF AFSR0,ACCESS +00064A 0E00 MOVLW 0 +00064C 211B ADDWFC SYSGLCDSTRDATHANDLER_H,W,BANKED +00064E 6EEA MOVWF AFSR0_H,ACCESS +000650 CFEF F010 MOVFF INDF0,GLCDCHAR +000654 DF64 RCALL GLCDCHARACTER +000656 5113 MOVF GLCDINDEX,W,BANKED +000658 251A ADDWF SYSGLCDSTRDATHANDLER,W,BANKED +00065A 6EE9 MOVWF AFSR0,ACCESS +00065C 0E00 MOVLW 0 +00065E 211B ADDWFC SYSGLCDSTRDATHANDLER_H,W,BANKED +000660 6EEA MOVWF AFSR0_H,ACCESS +000662 C010 FFEF MOVFF GLCDCHAR,INDF0 +000666 C01A FFE9 MOVFF SYSGLCDSTRDATHANDLER,AFSR0 +00066A C01B FFEA MOVFF SYSGLCDSTRDATHANDLER_H,AFSR0_H +00066E 50EF MOVF INDF0,W,ACCESS +000670 5D13 SUBWF GLCDINDEX,W,BANKED +000672 A0D8 BTFSS STATUS, C,ACCESS +000674 D7E6 BRA SYSFORLOOP1 + SYSFORLOOPEND1 +000676 0012 RETURN + + + GLCDWRITE +000678 0511 DECF GLCDCOMDAT,W,BANKED +00067A A4D8 BTFSS STATUS, Z,ACCESS +00067C D002 BRA ELSE13_1 +00067E 8C8A BSF LATB,6,ACCESS +000680 D001 BRA ENDIF13 + ELSE13_1 +000682 9C8A BCF LATB,6,ACCESS + ENDIF13 +000684 0E08 MOVLW 8 +000686 6F1F MOVWF SYSREPEATTEMP2,BANKED + SYSREPEATLOOP2 +000688 988A BCF LATB,4,ACCESS +00068A AF12 BTFSS GLCDDAT,7,BANKED +00068C D002 BRA ELSE14_1 +00068E 8A8A BSF LATB,5,ACCESS +000690 D001 BRA ENDIF14 + ELSE14_1 +000692 9A8A BCF LATB,5,ACCESS + ENDIF14 +000694 3712 RLCF GLCDDAT,F,BANKED +000696 888A BSF LATB,4,ACCESS +000698 0000 NOP +00069A 0000 NOP +00069C 0000 NOP +00069E 0000 NOP +0006A0 2F1F DECFSZ SYSREPEATTEMP2,F,BANKED +0006A2 D7F2 BRA SYSREPEATLOOP2 + SYSREPEATLOOPEND2 +0006A4 0012 RETURN + + + HSERPRINT125 +0006A6 C01C FFE9 MOVFF SYSPRINTDATAHANDLER,AFSR0 +0006AA C01D FFEA MOVFF SYSPRINTDATAHANDLER_H,AFSR0_H +0006AE CFEF F016 MOVFF INDF0,PRINTLEN +0006B2 5316 MOVF PRINTLEN,F,BANKED +0006B4 B4D8 BTFSC STATUS, Z,ACCESS +0006B6 D017 BRA ENDIF21 +0006B8 6B18 CLRF SYSPRINTTEMP,BANKED +0006BA 0E01 MOVLW 1 +0006BC 5D16 SUBWF PRINTLEN,W,BANKED +0006BE A0D8 BTFSS STATUS, C,ACCESS +0006C0 D012 BRA SYSFORLOOPEND6 + SYSFORLOOP6 +0006C2 2B18 INCF SYSPRINTTEMP,F,BANKED +0006C4 5118 MOVF SYSPRINTTEMP,W,BANKED +0006C6 251C ADDWF SYSPRINTDATAHANDLER,W,BANKED +0006C8 6EE9 MOVWF AFSR0,ACCESS +0006CA 0E00 MOVLW 0 +0006CC 211D ADDWFC SYSPRINTDATAHANDLER_H,W,BANKED +0006CE 6EEA MOVWF AFSR0_H,ACCESS +0006D0 CFEF F017 MOVFF INDF0,SERDATA +0006D4 D809 RCALL HSERSEND +0006D6 0E0C MOVLW 12 +0006D8 6E02 MOVWF SYSWAITTEMPMS,ACCESS +0006DA 6A03 CLRF SYSWAITTEMPMS_H,ACCESS +0006DC DF0A RCALL DELAY_MS +0006DE 5116 MOVF PRINTLEN,W,BANKED +0006E0 5D18 SUBWF SYSPRINTTEMP,W,BANKED +0006E2 A0D8 BTFSS STATUS, C,ACCESS +0006E4 D7EE BRA SYSFORLOOP6 + SYSFORLOOPEND6 + ENDIF21 +0006E6 0012 RETURN + + + HSERSEND + SYSWAITLOOP1 +0006E8 A89E BTFSS PIR1,TXIF,ACCESS +0006EA D7FE BRA SYSWAITLOOP1 +0006EC C017 FFAD MOVFF SERDATA,TXREG +0006F0 0012 RETURN + + + INITGLCD +0006F2 9E8A BCF LATB,7,ACCESS +0006F4 0E64 MOVLW 100 +0006F6 6E02 MOVWF SYSWAITTEMPMS,ACCESS +0006F8 6A03 CLRF SYSWAITTEMPMS_H,ACCESS +0006FA DEFB RCALL DELAY_MS +0006FC 8E8A BSF LATB,7,ACCESS +0006FE 6B11 CLRF GLCDCOMDAT,BANKED +000700 0E21 MOVLW 33 +000702 6F12 MOVWF GLCDDAT,BANKED +000704 DFB9 RCALL GLCDWRITE +000706 6B11 CLRF GLCDCOMDAT,BANKED +000708 0EBF MOVLW 191 +00070A 6F12 MOVWF GLCDDAT,BANKED +00070C DFB5 RCALL GLCDWRITE +00070E 6B11 CLRF GLCDCOMDAT,BANKED +000710 0E04 MOVLW 4 +000712 6F12 MOVWF GLCDDAT,BANKED +000714 DFB1 RCALL GLCDWRITE +000716 6B11 CLRF GLCDCOMDAT,BANKED +000718 0E14 MOVLW 20 +00071A 6F12 MOVWF GLCDDAT,BANKED +00071C DFAD RCALL GLCDWRITE +00071E 6B11 CLRF GLCDCOMDAT,BANKED +000720 0E0C MOVLW 12 +000722 6F12 MOVWF GLCDDAT,BANKED +000724 DFA9 RCALL GLCDWRITE +000726 6B11 CLRF GLCDCOMDAT,BANKED +000728 0E20 MOVLW 32 +00072A 6F12 MOVWF GLCDDAT,BANKED +00072C DFA5 RCALL GLCDWRITE +00072E 6B11 CLRF GLCDCOMDAT,BANKED +000730 0E0C MOVLW 12 +000732 6F12 MOVWF GLCDDAT,BANKED +000734 D7A1 BRA GLCDWRITE + + + INITSYS +000736 6AE0 CLRF BSR,ACCESS +000738 6AF8 CLRF TBLPTRU,ACCESS +00073A 9EC0 BCF ADCON2,ADFM,ACCESS +00073C 90C2 BCF ADCON0,ADON,ACCESS +00073E 86C1 BSF ADCON1,PCFG3,ACCESS +000740 84C1 BSF ADCON1,PCFG2,ACCESS +000742 82C1 BSF ADCON1,PCFG1,ACCESS +000744 80C1 BSF ADCON1,PCFG0,ACCESS +000746 0E07 MOVLW 7 +000748 6EB4 MOVWF CMCON,ACCESS +00074A 6A80 CLRF PORTA,ACCESS +00074C 6A81 CLRF PORTB,ACCESS +00074E 6A82 CLRF PORTC,ACCESS +000750 6A84 CLRF PORTE,ACCESS +000752 0012 RETURN + + + INITUSART +000754 0E21 MOVLW 33 +000756 6EAF MOVWF SPBRG,ACCESS +000758 6AB0 CLRF SPBRGH,ACCESS +00075A 86B8 BSF BAUDCON,BRG16,ACCESS +00075C 84AC BSF TXSTA,BRGH,ACCESS +00075E 98AC BCF TXSTA,SYNC,ACCESS +000760 8EAB BSF RCSTA,SPEN,ACCESS +000762 88AB BSF RCSTA,CREN,ACCESS +000764 8AAC BSF TXSTA,TXEN,ACCESS +000766 0012 RETURN + + + SYSREADSTRING +000768 0009 TBLRD*+ +00076A CFF5 F005 MOVFF TABLAT,SYSCALCTEMPA +00076E CFF5 FFE7 MOVFF TABLAT,INDF1 +000772 0009 TBLRD*+ +000774 D005 BRA SYSSTRINGREADCHECK + SYSREADSTRINGPART +000776 0009 TBLRD*+ +000778 50F5 MOVF TABLAT, W,ACCESS +00077A 6E05 MOVWF SYSCALCTEMPA,ACCESS +00077C 2606 ADDWF SYSSTRINGLENGTH,F,ACCESS +00077E 0009 TBLRD*+ + SYSSTRINGREADCHECK +000780 5205 MOVF SYSCALCTEMPA,F,ACCESS +000782 B4D8 BTFSC STATUS,Z,ACCESS +000784 0012 RETURN + SYSSTRINGREAD +000786 0009 TBLRD*+ +000788 CFF5 FFE4 MOVFF TABLAT,PREINC1 +00078C 2E05 DECFSZ SYSCALCTEMPA, F,ACCESS +00078E D7FB BRA SYSSTRINGREAD +000790 0012 RETURN + + + SYSSTRINGTABLES + + STRINGTABLE1 +000792 0B0B 2020 6944 7073 616C 2D79 0031 RAW 0B0B,2020,6944,7073,616C,2D79,0031 + + + STRINGTABLE2 +0007A0 0B0B 2020 6944 7073 616C 2D79 0032 RAW 0B0B,2020,6944,7073,616C,2D79,0032 + + + STRINGTABLE3 +0007AE 0101 0020 RAW 0101,0020 + + + STRINGTABLE4 +0007B2 0101 002A RAW 0101,002A + + + STRINGTABLE5 +0007B6 1313 7250 6E69 6974 676E 4420 7369 6C70 7961 203A 0031 RAW 1313,7250,6E69,6974,676E,4420,7369,6C70,7961,203A,0031 + + + STRINGTABLE6 +0007CC 1313 7250 6E69 6974 676E 4420 7369 6C70 7961 203A 0032 RAW 1313,7250,6E69,6974,676E,4420,7369,6C70,7961,203A,0032 + + + diff --git a/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.simu b/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.simu new file mode 100644 index 0000000..6d9746a --- /dev/null +++ b/resources/examples/Pic/glcd8544_p18f2550/glcd8544_p18f2550.simu @@ -0,0 +1,72 @@ + + +Probe-8: + + +Node-7: + + +Node-6: + + +Node-5: + + +Node-4: + + +Pcd8544-3: + + +pic18f2550-2: + + +Pcd8544-1: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +Connector-15: + + +Connector-17: + + +Connector-18: + + +Connector-19: + + +Connector-20: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-26: + + +Connector-27: + + +Connector-28: + + +Connector-29: + + + diff --git a/resources/examples/Pic/i2c-Lcd/hi2c-lcd.gcb b/resources/examples/Pic/i2c-Lcd/hi2c-lcd.gcb new file mode 100644 index 0000000..f51eab5 --- /dev/null +++ b/resources/examples/Pic/i2c-Lcd/hi2c-lcd.gcb @@ -0,0 +1,130 @@ +'''A demonstration program for GCGB and GCB. +'''-------------------------------------------------------------------------------------------------------------------------------- +'''This program demonstrates shows one LCD (16x2 & 16x4) being driven using a LCD I2C adapters. +'''This uses the GCB hardware implementation of IC2 for Microchip devices. +'''Two types are supported as shown below. This example is using "#define LCD_IO 10" +'''- Set LCD_I0 to 10 for the YwRobot LCD1602 IIC V1 or the Sainsmart LCD_PIC I2C adapter. +'''- Set LCD_I0 to 12 for the Ywmjkdz I2C adapter with pot bent over top of chip. +'''- Use the following to address a diferent I2C device. +'''- #define LCD_I2C_Address 0x4e 'This is the default value, change as appropiate +'''@author EvanV +'''@licence GPL +'''@version 1.0a +'''@date 17.02.2015 +'''******************************************************************************** + + + #chip 16f876, 16 + + ; ----- Define Hardware settings + ' Define I2C settings + #define HI2C_BAUD_RATE 100 + #define HI2C_DATA PORTC.4 + #define HI2C_CLOCK PORTC.3 + 'I2C pins need to be input for SSP module + Dir HI2C_DATA in + Dir HI2C_CLOCK in + 'MASTER MODE + HI2CMode Master + + + '''Set up LCD + #define LCD_IO 10 + + 'You may need to use SLOW or MEDIUM if your LCD is a slower device. + #define LCD_SPEED FAST + 'You may need to invert these states. Dependent of LCD I2C adapter. + #define LCD_Backlight_On_State 1 + #define LCD_Backlight_Off_State 0 + +; ----- Constants + 'None required beyond the scope of the hardware. + +; ----- Quick Command Reference: + + '''Set LCD_10 to 10 for the YwRobot LCD1602 IIC V1 or the Sainsmart LCD_PIC I2C adapter + '''Set LCD_10 to 12 for the Ywmjkdz I2C adapter with pot bent over top of chip + +; ----- Main body of program commences here. + PRINT "Great Cow Basic" + WAIT 1 s + + Do Forever + CLS + WAIT 3 s + PRINT "START TEST" + locate 1,0 + PRINT "DISPLAY ON" + wait 3 s + + CLS + Locate 0,0 + Print "Cursor ON" + Locate 1,0 + LCDcursor CursorOn + wait 3 S + CLS + LCDcursor CursorOFF + locate 0,0 + Print "Cursor OFF" + wait 3 s + CLS + Locate 0,0 + Print "FLASH ON" + Locate 1,0 + LCDcursor FLASHON + wait 3 s + + CLS + locate 0,0 + Print "FLASH OFF" + LCDCURSOR FLASHOFF + wait 3 sec + + Locate 0,0 + Print "CURSR & FLSH ON" + locate 1,0 + LCDCURSOR CURSORON + LCDCURSOR FLASHON + Wait 3 sec + + Locate 0,0 + Print "CURSR & FLSH OFF" + locate 1,0 + LCDCURSOR CursorOFF + LCDCURSOR FLASHOFF + Wait 3 sec + + CLS + Locate 0,4 + PRINT "Flashing" + Locate 1,4 + Print "Display" + wait 500 ms + + repeat 10 + LCDCURSOR LCDOFF + wait 500 ms + LCDCURSOR LCDON + wait 500 ms + end repeat + CLS + Locate 0,0 + Print "DISPLAY & BACKL." + Locate 1,0 + Print "FOR 5 SEC" + Wait 2 SEC + LCDCURSOR LCDOFF + LCDBacklight OFF + WAIT 5 s + LCDBacklight ON + CLS + Locate 0,0 + LCDCURSOR LCDON + Print "END TEST" + wait 3 s + loop + + +end + diff --git a/resources/examples/Pic/i2c-Lcd/i2c-lcd.gcb b/resources/examples/Pic/i2c-Lcd/i2c-lcd.gcb new file mode 100644 index 0000000..0fee986 --- /dev/null +++ b/resources/examples/Pic/i2c-Lcd/i2c-lcd.gcb @@ -0,0 +1,130 @@ +'''A demonstration program for GCGB and GCB. +'''-------------------------------------------------------------------------------------------------------------------------------- +'''This program demonstrates shows one LCD (16x2 & 16x4) being driven using a LCD I2C adapters. +'''This uses the GCB software implementation of IC2 for Microchip devices. +'''Two types are supported as shown below. This example is using "#define LCD_IO 10" +'''- Set LCD_I0 to 10 for the YwRobot LCD1602 IIC V1 or the Sainsmart LCD_PIC I2C adapter. +'''- Set LCD_I0 to 12 for the Ywmjkdz I2C adapter with pot bent over top of chip. +'''- Use the following to address a diferent I2C device. +'''- #define LCD_I2C_Address 0x4e 'This is the default value, change as appropiate +'''@author EvanV +'''@licence GPL +'''@version 1.0a +'''@date 14.02.2015 +'''******************************************************************************** + +; ----- Configuration + + #chip 16f876, 16 + + ; ----- Define Hardware settings + ' Define I2C settings - CHANGE PORTS + #define I2C_MODE Master + #define I2C_DATA PORTC.4 + #define I2C_CLOCK PORTC.3 + #define I2C_DISABLE_INTERRUPTS ON + 'Optionally, you can reduce the I2C timings. +' #define I2C_BIT_DELAY 0 us +' #define I2C_CLOCK_DELAY 1 us +' #define I2C_END_DELAY 0 us + + '''Set up LCD + #define LCD_IO 10 + + 'You may need to use SLOW or MEDIUM if your LCD is a slower device. + #define LCD_SPEED FAST + 'You may need to invert these states. Dependent of LCD I2C adapter. + #define LCD_Backlight_On_State 1 + #define LCD_Backlight_Off_State 0 + +; ----- Constants + 'None required beyond the scope of the hardware. + +; ----- Quick Command Reference: + + '''Set LCD_10 to 10 for the YwRobot LCD1602 IIC V1 or the Sainsmart LCD_PIC I2C adapter + '''Set LCD_10 to 12 for the Ywmjkdz I2C adapter with pot bent over top of chip + +; ----- Main body of program commences here. + PRINT "Great Cow Basic" + WAIT 1 s + + Do Forever + CLS + WAIT 3 s + PRINT "START TEST" + locate 1,0 + PRINT "DISPLAY ON" + wait 3 s + + CLS + Locate 0,0 + Print "Cursor ON" + Locate 1,0 + LCDcursor CursorOn + wait 3 S + CLS + LCDcursor CursorOFF + locate 0,0 + Print "Cursor OFF" + wait 3 s + CLS + Locate 0,0 + Print "FLASH ON" + Locate 1,0 + LCDcursor FLASHON + wait 3 s + + CLS + locate 0,0 + Print "FLASH OFF" + LCDCURSOR FLASHOFF + wait 3 sec + + Locate 0,0 + Print "CURSR & FLSH ON" + locate 1,0 + LCDCURSOR CURSORON + LCDCURSOR FLASHON + Wait 3 sec + + Locate 0,0 + Print "CURSR & FLSH OFF" + locate 1,0 + LCDCURSOR CursorOFF + LCDCURSOR FLASHOFF + Wait 3 sec + + CLS + Locate 0,4 + PRINT "Flashing" + Locate 1,4 + Print "Display" + wait 500 ms + + repeat 10 + LCDCURSOR LCDOFF + wait 500 ms + LCDCURSOR LCDON + wait 500 ms + end repeat + CLS + Locate 0,0 + Print "DISPLAY & BACKL." + Locate 1,0 + Print "FOR 5 SEC" + Wait 2 SEC + LCDCURSOR LCDOFF + LCDBacklight OFF + WAIT 5 s + LCDBacklight ON + CLS + Locate 0,0 + LCDCURSOR LCDON + Print "END TEST" + wait 3 s + loop + + +end + diff --git a/resources/examples/Pic/i2c-Lcd/i2c-lcd.simu b/resources/examples/Pic/i2c-Lcd/i2c-lcd.simu new file mode 100644 index 0000000..16ff7ae --- /dev/null +++ b/resources/examples/Pic/i2c-Lcd/i2c-lcd.simu @@ -0,0 +1,84 @@ + + +pic16f876-9: + + +Resistor-8: + + +Rail.-7: + + +Resistor-6: + + +Node-5: + + +I2C to Parallel-4: + + +Node-3: + + +Node-2: + + +Hd44780-1: + + +Connector-10: + + +Connector-12: + + +Connector-13: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-19: + + +Connector-20: + + +Connector-21: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +PlotterWidget-22: + + +SerialPortWidget-23: + + + diff --git a/resources/examples/Pic/ks0108_p16f877a/KS0108_16f877a.asm b/resources/examples/Pic/ks0108_p16f877a/KS0108_16f877a.asm new file mode 100644 index 0000000..7e0036b --- /dev/null +++ b/resources/examples/Pic/ks0108_p16f877a/KS0108_16f877a.asm @@ -0,0 +1,2711 @@ +;Program compiled by Great Cow BASIC (0.96.<<>> 2016-12-14) +;Need help? See the GCBASIC forums at http://sourceforge.net/projects/gcbasic/forums, +;check the documentation or email w_cholmondeley at users dot sourceforge dot net. + +;******************************************************************************** + +;Set up the assembler options (Chip type, clock source, other bits and pieces) + LIST p=16F877A, r=DEC +#include + __CONFIG _LVP_OFF & _WDTE_OFF & _FOSC_HS + +;******************************************************************************** + +;Set aside memory locations for variables +CHAR EQU 32 +CHARCODE EQU 33 +CHARCOL EQU 34 +CHARCOLS EQU 36 +CHARCOL_H EQU 35 +CHARLOCX EQU 37 +CHARLOCX_H EQU 38 +CHARLOCY EQU 39 +CHARLOCY_H EQU 40 +CHARROW EQU 41 +CHARROWS EQU 43 +CHARROW_H EQU 42 +COL EQU 44 +CURRCHARCOL EQU 45 +CURRCHARROW EQU 46 +CURRCHARVAL EQU 47 +CURRCOL EQU 48 +CURRPAGE EQU 49 +DELAYTEMP EQU 112 +DELAYTEMP2 EQU 113 +DRAWLINE EQU 50 +DRAWLINE_H EQU 51 +GLCDBACKGROUND EQU 52 +GLCDBACKGROUND_H EQU 53 +GLCDBITNO EQU 54 +GLCDCHANGE EQU 55 +GLCDCOLOUR EQU 56 +GLCDCOLOUR_H EQU 57 +GLCDDATATEMP EQU 58 +GLCDFNTDEFAULT EQU 59 +GLCDFNTDEFAULTSIZE EQU 60 +GLCDFONTWIDTH EQU 61 +GLCDFOREGROUND EQU 62 +GLCDFOREGROUND_H EQU 63 +GLCDPRINTLOC EQU 64 +GLCDPRINTLOC_H EQU 65 +GLCDREADBYTE_KS0108 EQU 66 +GLCDTEMP EQU 67 +GLCDX EQU 68 +GLCDY EQU 69 +GLCD_COUNT EQU 70 +GLCD_YORDINATE EQU 71 +GLCD_YORDINATE_H EQU 72 +LCDBYTE EQU 73 +LINECOLOUR EQU 74 +LINECOLOUR_H EQU 75 +LINEDIFFX EQU 76 +LINEDIFFX_H EQU 77 +LINEDIFFX_X2 EQU 78 +LINEDIFFX_X2_H EQU 79 +LINEDIFFY EQU 80 +LINEDIFFY_H EQU 81 +LINEDIFFY_X2 EQU 82 +LINEDIFFY_X2_H EQU 83 +LINEERR EQU 84 +LINEERR_H EQU 85 +LINESTEPX EQU 86 +LINESTEPX_H EQU 87 +LINESTEPY EQU 88 +LINESTEPY_H EQU 89 +LINEX1 EQU 90 +LINEX1_H EQU 91 +LINEX2 EQU 92 +LINEX2_H EQU 93 +LINEY1 EQU 94 +LINEY1_H EQU 95 +LINEY2 EQU 96 +LINEY2_H EQU 97 +PRINTLEN EQU 98 +PRINTLOCX EQU 99 +PRINTLOCX_H EQU 100 +PRINTLOCY EQU 101 +PRINTLOCY_H EQU 102 +ROW EQU 103 +STR EQU 447 +STRINGPOINTER EQU 104 +SYSBITVAR0 EQU 105 +SYSBYTETEMPA EQU 117 +SYSBYTETEMPB EQU 121 +SYSBYTETEMPX EQU 112 +SYSCALCTEMPA EQU 117 +SYSCALCTEMPX EQU 112 +SYSCALCTEMPX_H EQU 113 +SYSCHARCOUNT EQU 106 +SYSDIVLOOP EQU 116 +SYSDIVMULTA EQU 119 +SYSDIVMULTA_H EQU 120 +SYSDIVMULTB EQU 123 +SYSDIVMULTB_H EQU 124 +SYSDIVMULTX EQU 114 +SYSDIVMULTX_H EQU 115 +SYSINTEGERTEMPA EQU 117 +SYSINTEGERTEMPA_H EQU 118 +SYSINTEGERTEMPB EQU 121 +SYSINTEGERTEMPB_H EQU 122 +SYSINTEGERTEMPX EQU 112 +SYSINTEGERTEMPX_H EQU 113 +SYSLCDPRINTDATAHANDLER EQU 107 +SYSLCDPRINTDATAHANDLER_H EQU 108 +SYSPRINTTEMP EQU 109 +SYSREPEATTEMP1 EQU 110 +SYSSIGNBYTE EQU 125 +SYSSTRDATA EQU 111 +SYSSTRINGA EQU 119 +SYSSTRINGA_H EQU 120 +SYSSTRINGB EQU 114 +SYSSTRINGB_H EQU 115 +SYSSTRINGLENGTH EQU 118 +SYSSTRINGPARAM1 EQU 453 +SYSTEMP1 EQU 126 +SYSTEMP1_H EQU 127 +SYSTEMP2 EQU 160 +SYSVALTEMP EQU 161 +SYSVALTEMP_H EQU 162 +SYSWAITTEMPMS EQU 114 +SYSWAITTEMPMS_H EQU 115 +SYSWAITTEMPS EQU 116 +SYSWAITTEMPUS EQU 117 +SYSWAITTEMPUS_H EQU 118 +SYSWORDTEMPA EQU 117 +SYSWORDTEMPA_H EQU 118 +SYSWORDTEMPB EQU 121 +SYSWORDTEMPB_H EQU 122 +SYSWORDTEMPX EQU 112 +SYSWORDTEMPX_H EQU 113 +XVAR EQU 163 + +;******************************************************************************** + +;Alias variables +SYSSTR_0 EQU 447 + +;******************************************************************************** + +;Vectors + ORG 0 + pagesel BASPROGRAMSTART + goto BASPROGRAMSTART + ORG 4 + retfie + +;******************************************************************************** + +;Start of program memory page 0 + ORG 5 +BASPROGRAMSTART +;Call initialisation routines + pagesel INITSYS + call INITSYS + pagesel $ + call INITGLCD_KS0108 + +;Start of the main program +START + pagesel GLCDCLS_KS0108 + call GLCDCLS_KS0108 + pagesel $ + + clrf PRINTLOCX + clrf PRINTLOCX_H + movlw 10 + movwf PRINTLOCY + clrf PRINTLOCY_H + movlw low SYSSTRINGPARAM1 + movwf SysStringB + movlw high SYSSTRINGPARAM1 + movwf SysStringB_H + movlw low StringTable1 + movwf SysStringA + movlw high StringTable1 + movwf SysStringA_H + pagesel SysReadString + call SysReadString + pagesel $ + movlw low SYSSTRINGPARAM1 + movwf SysLCDPRINTDATAHandler + movlw high SYSSTRINGPARAM1 + movwf SysLCDPRINTDATAHandler_H + call GLCDPRINT3 + + movlw 1 + movwf SysWaitTempS + pagesel Delay_S + call Delay_S + pagesel $ + clrf PRINTLOCX + clrf PRINTLOCX_H + movlw 10 + movwf PRINTLOCY + clrf PRINTLOCY_H + movlw low SYSSTRINGPARAM1 + movwf SysStringB + movlw high SYSSTRINGPARAM1 + movwf SysStringB_H + movlw low StringTable2 + movwf SysStringA + movlw high StringTable2 + movwf SysStringA_H + pagesel SysReadString + call SysReadString + pagesel $ + movlw low SYSSTRINGPARAM1 + movwf SysLCDPRINTDATAHandler + movlw high SYSSTRINGPARAM1 + movwf SysLCDPRINTDATAHandler_H + call GLCDPRINT3 + + movlw 18 + movwf LINEX1 + clrf LINEX1_H + movlw 30 + movwf LINEY1 + clrf LINEY1_H + movlw 28 + movwf LINEX2 + clrf LINEX2_H + movlw 40 + movwf LINEY2 + clrf LINEY2_H + movf GLCDFOREGROUND,W + movwf LINECOLOUR + movf GLCDFOREGROUND_H,W + movwf LINECOLOUR_H + call BOX + + movlw 14 + movwf CHAR +SysForLoop1 + incf CHAR,F + movlw 17 + movwf PRINTLOCX + clrf PRINTLOCX_H + movlw 20 + movwf PRINTLOCY + clrf PRINTLOCY_H + movf CHAR,W + banksel SYSVALTEMP + movwf SYSVALTEMP + clrf SYSVALTEMP_H + banksel STATUS + call FN_STR + movlw low STR + movwf SysLCDPRINTDATAHandler + movlw high STR + movwf SysLCDPRINTDATAHandler_H + call GLCDPRINT3 + + movlw 20 + movwf CHARLOCX + clrf CHARLOCX_H + movlw 30 + movwf CHARLOCY + clrf CHARLOCY_H + movf CHAR,W + movwf CHARCODE + movf GLCDFOREGROUND,W + movwf LINECOLOUR + movf GLCDFOREGROUND_H,W + movwf LINECOLOUR_H + call GLCDDRAWCHAR + + movlw 1 + movwf SysWaitTempS + pagesel Delay_S + call Delay_S + pagesel $ + movlw 129 + subwf CHAR,W + btfss STATUS, C + goto SysForLoop1 +SysForLoopEnd1 + clrf LINEX1 + clrf LINEX1_H + movlw 50 + movwf LINEY1 + clrf LINEY1_H + movlw 127 + movwf LINEX2 + clrf LINEX2_H + movlw 50 + movwf LINEY2 + clrf LINEY2_H + movf GLCDFOREGROUND,W + movwf LINECOLOUR + movf GLCDFOREGROUND_H,W + movwf LINECOLOUR_H + call LINE + + movlw 255 + banksel XVAR + movwf XVAR +SysForLoop2 + incf XVAR,F + movf XVAR,W + banksel GLCDX + movwf GLCDX + movlw 63 + movwf GLCDY + movlw 1 + movwf GLCDCOLOUR + clrf GLCDCOLOUR_H + call PSET_KS0108 + + movlw 80 + banksel XVAR + subwf XVAR,W + btfss STATUS, C + goto SysForLoop2 +SysForLoopEnd2 + movlw 10 + movwf SysWaitTempS + banksel STATUS + pagesel Delay_S + call Delay_S + pagesel $ + goto START + goto BASPROGRAMEND +BASPROGRAMEND + sleep + goto BASPROGRAMEND + +;******************************************************************************** + +BOX + movf LINEX1,W + movwf SysWORDTempB + movf LINEX1_H,W + movwf SysWORDTempB_H + movf LINEX2,W + movwf SysWORDTempA + movf LINEX2_H,W + movwf SysWORDTempA_H + call SysCompLessThan16 + btfss SysByteTempX,0 + goto ENDIF15 + movf LINEX1,W + movwf GLCDTEMP + movf LINEX2,W + movwf LINEX1 + movf LINEX2_H,W + movwf LINEX1_H + movf GLCDTEMP,W + movwf LINEX2 + clrf LINEX2_H +ENDIF15 + movf LINEY1,W + movwf SysWORDTempB + movf LINEY1_H,W + movwf SysWORDTempB_H + movf LINEY2,W + movwf SysWORDTempA + movf LINEY2_H,W + movwf SysWORDTempA_H + call SysCompLessThan16 + btfss SysByteTempX,0 + goto ENDIF16 + movf LINEY1,W + movwf GLCDTEMP + movf LINEY2,W + movwf LINEY1 + movf LINEY2_H,W + movwf LINEY1_H + movf GLCDTEMP,W + movwf LINEY2 + clrf LINEY2_H +ENDIF16 + movlw 1 + subwf LINEX1,W + movwf DRAWLINE + movlw 0 + btfss STATUS,C + addlw 1 + subwf LINEX1_H,W + movwf DRAWLINE_H + movf LINEX1,W + movwf SysWORDTempB + movf LINEX1_H,W + movwf SysWORDTempB_H + movf LINEX2,W + movwf SysWORDTempA + movf LINEX2_H,W + movwf SysWORDTempA_H + call SysCompLessThan16 + btfsc SysByteTempX,0 + goto SysForLoopEnd8 +SysForLoop8 + incf DRAWLINE,F + btfsc STATUS,Z + incf DRAWLINE_H,F + movf DRAWLINE,W + movwf GLCDX + movf LINEY1,W + movwf GLCDY + movf LINECOLOUR,W + movwf GLCDCOLOUR + movf LINECOLOUR_H,W + movwf GLCDCOLOUR_H + call PSET_KS0108 + + movf DRAWLINE,W + movwf GLCDX + movf LINEY2,W + movwf GLCDY + movf LINECOLOUR,W + movwf GLCDCOLOUR + movf LINECOLOUR_H,W + movwf GLCDCOLOUR_H + call PSET_KS0108 + + movf DRAWLINE,W + movwf SysWORDTempA + movf DRAWLINE_H,W + movwf SysWORDTempA_H + movf LINEX2,W + movwf SysWORDTempB + movf LINEX2_H,W + movwf SysWORDTempB_H + call SysCompLessThan16 + btfsc SysByteTempX,0 + goto SysForLoop8 +SysForLoopEnd8 + movlw 1 + subwf LINEY1,W + movwf DRAWLINE + movlw 0 + btfss STATUS,C + addlw 1 + subwf LINEY1_H,W + movwf DRAWLINE_H + movf LINEY1,W + movwf SysWORDTempB + movf LINEY1_H,W + movwf SysWORDTempB_H + movf LINEY2,W + movwf SysWORDTempA + movf LINEY2_H,W + movwf SysWORDTempA_H + call SysCompLessThan16 + btfsc SysByteTempX,0 + goto SysForLoopEnd9 +SysForLoop9 + incf DRAWLINE,F + btfsc STATUS,Z + incf DRAWLINE_H,F + movf LINEX1,W + movwf GLCDX + movf DRAWLINE,W + movwf GLCDY + movf LINECOLOUR,W + movwf GLCDCOLOUR + movf LINECOLOUR_H,W + movwf GLCDCOLOUR_H + call PSET_KS0108 + + movf LINEX2,W + movwf GLCDX + movf DRAWLINE,W + movwf GLCDY + movf LINECOLOUR,W + movwf GLCDCOLOUR + movf LINECOLOUR_H,W + movwf GLCDCOLOUR_H + call PSET_KS0108 + + movf DRAWLINE,W + movwf SysWORDTempA + movf DRAWLINE_H,W + movwf SysWORDTempA_H + movf LINEY2,W + movwf SysWORDTempB + movf LINEY2_H,W + movwf SysWORDTempB_H + call SysCompLessThan16 + btfsc SysByteTempX,0 + goto SysForLoop9 +SysForLoopEnd9 + return + +;******************************************************************************** + +GLCDCHARCOL3 + movlw 113 + subwf SysStringA, W + btfsc STATUS, C + retlw 0 + movf SysStringA, W + addlw low TableGLCDCHARCOL3 + movwf SysStringA + movlw high TableGLCDCHARCOL3 + btfsc STATUS, C + addlw 1 + movwf PCLATH + movf SysStringA, W + movwf PCL +TableGLCDCHARCOL3 + retlw 112 + retlw 0 + retlw 16 + retlw 12 + retlw 10 + retlw 136 + retlw 34 + retlw 56 + retlw 32 + retlw 8 + retlw 32 + retlw 16 + retlw 16 + retlw 128 + retlw 128 + retlw 64 + retlw 4 + retlw 0 + retlw 0 + retlw 0 + retlw 40 + retlw 72 + retlw 70 + retlw 108 + retlw 0 + retlw 0 + retlw 0 + retlw 40 + retlw 16 + retlw 0 + retlw 16 + retlw 0 + retlw 64 + retlw 124 + retlw 0 + retlw 132 + retlw 130 + retlw 48 + retlw 78 + retlw 120 + retlw 6 + retlw 108 + retlw 12 + retlw 0 + retlw 0 + retlw 16 + retlw 40 + retlw 0 + retlw 4 + retlw 100 + retlw 248 + retlw 254 + retlw 124 + retlw 254 + retlw 254 + retlw 254 + retlw 124 + retlw 254 + retlw 0 + retlw 64 + retlw 254 + retlw 254 + retlw 254 + retlw 254 + retlw 124 + retlw 254 + retlw 124 + retlw 254 + retlw 76 + retlw 2 + retlw 126 + retlw 62 + retlw 126 + retlw 198 + retlw 14 + retlw 194 + retlw 0 + retlw 4 + retlw 0 + retlw 8 + retlw 128 + retlw 0 + retlw 64 + retlw 254 + retlw 112 + retlw 112 + retlw 112 + retlw 16 + retlw 16 + retlw 254 + retlw 0 + retlw 64 + retlw 254 + retlw 0 + retlw 248 + retlw 248 + retlw 112 + retlw 248 + retlw 16 + retlw 248 + retlw 144 + retlw 16 + retlw 120 + retlw 56 + retlw 120 + retlw 136 + retlw 24 + retlw 136 + retlw 0 + retlw 0 + retlw 0 + retlw 32 + retlw 120 + +;******************************************************************************** + +GLCDCHARCOL4 + movlw 113 + subwf SysStringA, W + btfsc STATUS, C + retlw 0 + movf SysStringA, W + addlw low TableGLCDCHARCOL4 + movwf SysStringA + movlw high TableGLCDCHARCOL4 + btfsc STATUS, C + addlw 1 + movwf PCLATH + movf SysStringA, W + movwf PCL +TableGLCDCHARCOL4 + retlw 112 + retlw 254 + retlw 56 + retlw 10 + retlw 6 + retlw 204 + retlw 102 + retlw 124 + retlw 112 + retlw 4 + retlw 64 + retlw 16 + retlw 56 + retlw 136 + retlw 162 + retlw 112 + retlw 28 + retlw 0 + retlw 0 + retlw 14 + retlw 254 + retlw 84 + retlw 38 + retlw 146 + retlw 10 + retlw 56 + retlw 130 + retlw 16 + retlw 16 + retlw 160 + retlw 16 + retlw 192 + retlw 32 + retlw 162 + retlw 132 + retlw 194 + retlw 130 + retlw 40 + retlw 138 + retlw 148 + retlw 2 + retlw 146 + retlw 146 + retlw 108 + retlw 172 + retlw 40 + retlw 40 + retlw 130 + retlw 2 + retlw 146 + retlw 36 + retlw 146 + retlw 130 + retlw 130 + retlw 146 + retlw 18 + retlw 130 + retlw 16 + retlw 130 + retlw 128 + retlw 16 + retlw 128 + retlw 4 + retlw 8 + retlw 130 + retlw 18 + retlw 130 + retlw 18 + retlw 146 + retlw 2 + retlw 128 + retlw 64 + retlw 128 + retlw 40 + retlw 16 + retlw 162 + retlw 254 + retlw 8 + retlw 130 + retlw 4 + retlw 128 + retlw 2 + retlw 168 + retlw 144 + retlw 136 + retlw 136 + retlw 168 + retlw 252 + retlw 168 + retlw 16 + retlw 144 + retlw 128 + retlw 32 + retlw 130 + retlw 8 + retlw 16 + retlw 136 + retlw 40 + retlw 40 + retlw 16 + retlw 168 + retlw 124 + retlw 128 + retlw 64 + retlw 128 + retlw 80 + retlw 160 + retlw 200 + retlw 16 + retlw 0 + retlw 130 + retlw 16 + retlw 68 + +;******************************************************************************** + +GLCDCHARCOL5 + movlw 113 + subwf SysStringA, W + btfsc STATUS, C + retlw 0 + movf SysStringA, W + addlw low TableGLCDCHARCOL5 + movwf SysStringA + movlw high TableGLCDCHARCOL5 + btfsc STATUS, C + addlw 1 + movwf PCLATH + movf SysStringA, W + movwf PCL +TableGLCDCHARCOL5 + retlw 112 + retlw 124 + retlw 124 + retlw 0 + retlw 0 + retlw 238 + retlw 238 + retlw 124 + retlw 168 + retlw 254 + retlw 254 + retlw 84 + retlw 84 + retlw 148 + retlw 148 + retlw 124 + retlw 124 + retlw 0 + retlw 158 + retlw 0 + retlw 40 + retlw 254 + retlw 16 + retlw 170 + retlw 6 + retlw 68 + retlw 68 + retlw 124 + retlw 124 + retlw 96 + retlw 16 + retlw 192 + retlw 16 + retlw 146 + retlw 254 + retlw 162 + retlw 138 + retlw 36 + retlw 138 + retlw 146 + retlw 226 + retlw 146 + retlw 146 + retlw 108 + retlw 108 + retlw 68 + retlw 40 + retlw 68 + retlw 162 + retlw 242 + retlw 34 + retlw 146 + retlw 130 + retlw 130 + retlw 146 + retlw 18 + retlw 146 + retlw 16 + retlw 254 + retlw 130 + retlw 40 + retlw 128 + retlw 24 + retlw 16 + retlw 130 + retlw 18 + retlw 162 + retlw 50 + retlw 146 + retlw 254 + retlw 128 + retlw 128 + retlw 112 + retlw 16 + retlw 224 + retlw 146 + retlw 130 + retlw 16 + retlw 130 + retlw 2 + retlw 128 + retlw 4 + retlw 168 + retlw 136 + retlw 136 + retlw 136 + retlw 168 + retlw 18 + retlw 168 + retlw 8 + retlw 250 + retlw 136 + retlw 80 + retlw 254 + retlw 240 + retlw 8 + retlw 136 + retlw 40 + retlw 40 + retlw 8 + retlw 168 + retlw 144 + retlw 128 + retlw 128 + retlw 96 + retlw 32 + retlw 160 + retlw 168 + retlw 108 + retlw 254 + retlw 108 + retlw 16 + retlw 66 + +;******************************************************************************** + +GLCDCHARCOL6 + movlw 113 + subwf SysStringA, W + btfsc STATUS, C + retlw 0 + movf SysStringA, W + addlw low TableGLCDCHARCOL6 + movwf SysStringA + movlw high TableGLCDCHARCOL6 + btfsc STATUS, C + addlw 1 + movwf PCLATH + movf SysStringA, W + movwf PCL +TableGLCDCHARCOL6 + retlw 112 + retlw 56 + retlw 254 + retlw 12 + retlw 10 + retlw 204 + retlw 102 + retlw 124 + retlw 32 + retlw 4 + retlw 64 + retlw 56 + retlw 16 + retlw 162 + retlw 136 + retlw 112 + retlw 28 + retlw 0 + retlw 0 + retlw 14 + retlw 254 + retlw 84 + retlw 200 + retlw 68 + retlw 0 + retlw 130 + retlw 56 + retlw 16 + retlw 16 + retlw 0 + retlw 16 + retlw 0 + retlw 8 + retlw 138 + retlw 128 + retlw 146 + retlw 150 + retlw 254 + retlw 138 + retlw 146 + retlw 18 + retlw 146 + retlw 82 + retlw 0 + retlw 0 + retlw 130 + retlw 40 + retlw 40 + retlw 18 + retlw 130 + retlw 36 + retlw 146 + retlw 130 + retlw 68 + retlw 146 + retlw 18 + retlw 146 + retlw 16 + retlw 130 + retlw 126 + retlw 68 + retlw 128 + retlw 4 + retlw 32 + retlw 130 + retlw 18 + retlw 66 + retlw 82 + retlw 146 + retlw 2 + retlw 128 + retlw 64 + retlw 128 + retlw 40 + retlw 16 + retlw 138 + retlw 130 + retlw 32 + retlw 254 + retlw 4 + retlw 128 + retlw 8 + retlw 168 + retlw 136 + retlw 136 + retlw 144 + retlw 168 + retlw 2 + retlw 168 + retlw 8 + retlw 128 + retlw 122 + retlw 136 + retlw 128 + retlw 8 + retlw 8 + retlw 136 + retlw 40 + retlw 48 + retlw 8 + retlw 168 + retlw 128 + retlw 64 + retlw 64 + retlw 128 + retlw 80 + retlw 160 + retlw 152 + retlw 130 + retlw 0 + retlw 16 + retlw 32 + retlw 68 + +;******************************************************************************** + +GLCDCHARCOL7 + movlw 113 + subwf SysStringA, W + btfsc STATUS, C + retlw 0 + movf SysStringA, W + addlw low TableGLCDCHARCOL7 + movwf SysStringA + movlw high TableGLCDCHARCOL7 + btfsc STATUS, C + addlw 1 + movwf PCLATH + movf SysStringA, W + movwf PCL +TableGLCDCHARCOL7 + retlw 112 + retlw 16 + retlw 0 + retlw 10 + retlw 6 + retlw 136 + retlw 34 + retlw 56 + retlw 62 + retlw 8 + retlw 32 + retlw 16 + retlw 16 + retlw 128 + retlw 128 + retlw 64 + retlw 4 + retlw 0 + retlw 0 + retlw 0 + retlw 40 + retlw 36 + retlw 196 + retlw 160 + retlw 0 + retlw 0 + retlw 0 + retlw 40 + retlw 16 + retlw 0 + retlw 16 + retlw 0 + retlw 4 + retlw 124 + retlw 0 + retlw 140 + retlw 98 + retlw 32 + retlw 114 + retlw 96 + retlw 14 + retlw 108 + retlw 60 + retlw 0 + retlw 0 + retlw 0 + retlw 40 + retlw 16 + retlw 12 + retlw 124 + retlw 248 + retlw 108 + retlw 68 + retlw 56 + retlw 130 + retlw 2 + retlw 244 + retlw 254 + retlw 0 + retlw 2 + retlw 130 + retlw 128 + retlw 254 + retlw 254 + retlw 124 + retlw 12 + retlw 188 + retlw 140 + retlw 100 + retlw 2 + retlw 126 + retlw 62 + retlw 126 + retlw 198 + retlw 14 + retlw 134 + retlw 0 + retlw 64 + retlw 0 + retlw 8 + retlw 128 + retlw 0 + retlw 240 + retlw 112 + retlw 64 + retlw 254 + retlw 48 + retlw 4 + retlw 120 + retlw 240 + retlw 0 + retlw 0 + retlw 0 + retlw 0 + retlw 240 + retlw 240 + retlw 112 + retlw 16 + retlw 248 + retlw 16 + retlw 64 + retlw 64 + retlw 248 + retlw 56 + retlw 120 + retlw 136 + retlw 120 + retlw 136 + retlw 0 + retlw 0 + retlw 0 + retlw 16 + retlw 120 + +;******************************************************************************** + +GLCDDRAWCHAR + movf LINECOLOUR,W + movwf SysWORDTempA + movf LINECOLOUR_H,W + movwf SysWORDTempA_H + movf GLCDFOREGROUND,W + movwf SysWORDTempB + movf GLCDFOREGROUND_H,W + movwf SysWORDTempB_H + pagesel SysCompEqual16 + call SysCompEqual16 + pagesel $ + comf SysByteTempX,F + btfss SysByteTempX,0 + goto ENDIF6 + movlw 1 + movwf GLCDBACKGROUND + clrf GLCDBACKGROUND_H + clrf GLCDFOREGROUND + clrf GLCDFOREGROUND_H +ENDIF6 + movlw 15 + subwf CHARCODE,F + movf CHARCODE,W + movwf SysBYTETempA + movlw 178 + movwf SysBYTETempB + pagesel SysCompLessThan + call SysCompLessThan + pagesel $ + comf SysByteTempX,F + movf SysByteTempX,W + movwf SysTemp1 + movf CHARCODE,W + movwf SysBYTETempB + movlw 202 + movwf SysBYTETempA + pagesel SysCompLessThan + call SysCompLessThan + pagesel $ + comf SysByteTempX,F + movf SysTemp1,W + andwf SysByteTempX,W + banksel SYSTEMP2 + movwf SysTemp2 + btfss SysTemp2,0 + goto ENDIF7 + movlw 1 + banksel CHARLOCY + subwf CHARLOCY,F + movlw 0 + btfss STATUS,C + addlw 1 + subwf CHARLOCY_H,F +ENDIF7 + movlw 1 + banksel CHARCOL + movwf CHARCOL + clrf CHARCOL_H + clrf CURRCHARCOL +SysForLoop4 + incf CURRCHARCOL,F +SysSelect1Case1 + decf CURRCHARCOL,W + btfss STATUS, Z + goto SysSelect1Case2 + movf CHARCODE,W + movwf SYSSTRINGA + call GLCDCHARCOL3 + movwf CURRCHARVAL + goto SysSelectEnd1 +SysSelect1Case2 + movlw 2 + subwf CURRCHARCOL,W + btfss STATUS, Z + goto SysSelect1Case3 + movf CHARCODE,W + movwf SYSSTRINGA + call GLCDCHARCOL4 + movwf CURRCHARVAL + goto SysSelectEnd1 +SysSelect1Case3 + movlw 3 + subwf CURRCHARCOL,W + btfss STATUS, Z + goto SysSelect1Case4 + movf CHARCODE,W + movwf SYSSTRINGA + call GLCDCHARCOL5 + movwf CURRCHARVAL + goto SysSelectEnd1 +SysSelect1Case4 + movlw 4 + subwf CURRCHARCOL,W + btfss STATUS, Z + goto SysSelect1Case5 + movf CHARCODE,W + movwf SYSSTRINGA + call GLCDCHARCOL6 + movwf CURRCHARVAL + goto SysSelectEnd1 +SysSelect1Case5 + movlw 5 + subwf CURRCHARCOL,W + btfss STATUS, Z + goto SysSelect1Case6 + movf CHARCODE,W + movwf SYSSTRINGA + call GLCDCHARCOL7 + movwf CURRCHARVAL +SysSelect1Case6 +SysSelectEnd1 + clrf CHARROW + clrf CHARROW_H + clrf CURRCHARROW +SysForLoop5 + incf CURRCHARROW,F + clrf CHARCOLS + clrf COL + movlw 1 + subwf GLCDFNTDEFAULTSIZE,W + btfss STATUS, C + goto SysForLoopEnd6 +SysForLoop6 + incf COL,F + incf CHARCOLS,F + clrf CHARROWS + clrf ROW + movlw 1 + subwf GLCDFNTDEFAULTSIZE,W + btfss STATUS, C + goto SysForLoopEnd7 +SysForLoop7 + incf ROW,F + incf CHARROWS,F + btfss CURRCHARVAL,0 + goto ELSE10_1 + movf CHARCOL,W + addwf CHARLOCX,W + movwf SysTemp1 + movf CHARCOLS,W + addwf SysTemp1,W + movwf GLCDX + movf CHARROW,W + addwf CHARLOCY,W + movwf SysTemp1 + movf CHARROWS,W + addwf SysTemp1,W + movwf GLCDY + movf LINECOLOUR,W + movwf GLCDCOLOUR + movf LINECOLOUR_H,W + movwf GLCDCOLOUR_H + call PSET_KS0108 + + goto ENDIF10 +ELSE10_1 + movf CHARCOL,W + addwf CHARLOCX,W + movwf SysTemp1 + movf CHARCOLS,W + addwf SysTemp1,W + movwf GLCDX + movf CHARROW,W + addwf CHARLOCY,W + movwf SysTemp1 + movf CHARROWS,W + addwf SysTemp1,W + movwf GLCDY + movf GLCDBACKGROUND,W + movwf GLCDCOLOUR + movf GLCDBACKGROUND_H,W + movwf GLCDCOLOUR_H + call PSET_KS0108 + +ENDIF10 + movf GLCDFNTDEFAULTSIZE,W + subwf ROW,W + btfss STATUS, C + goto SysForLoop7 +SysForLoopEnd7 + movf GLCDFNTDEFAULTSIZE,W + subwf COL,W + btfss STATUS, C + goto SysForLoop6 +SysForLoopEnd6 + rrf CURRCHARVAL,F + movf GLCDFNTDEFAULTSIZE,W + addwf CHARROW,F + movlw 0 + btfsc STATUS,C + addlw 1 + addwf CHARROW_H,F + movlw 8 + subwf CURRCHARROW,W + btfss STATUS, C + goto SysForLoop5 +SysForLoopEnd5 + movf GLCDFNTDEFAULTSIZE,W + addwf CHARCOL,F + movlw 0 + btfsc STATUS,C + addlw 1 + addwf CHARCOL_H,F + movlw 5 + subwf CURRCHARCOL,W + btfss STATUS, C + goto SysForLoop4 +SysForLoopEnd4 + clrf GLCDBACKGROUND + clrf GLCDBACKGROUND_H + movlw 1 + movwf GLCDFOREGROUND + clrf GLCDFOREGROUND_H + return + +;******************************************************************************** + +;Overloaded signature: WORD:WORD:STRING: +GLCDPRINT3 + movf SysLCDPRINTDATAHandler,W + movwf FSR + bcf STATUS, IRP + btfsc SysLCDPRINTDATAHandler_H,0 + bsf STATUS, IRP + movf INDF,W + movwf PRINTLEN + movf PRINTLEN,F + btfsc STATUS, Z + return + movf PRINTLOCX,W + movwf GLCDPRINTLOC + movf PRINTLOCX_H,W + movwf GLCDPRINTLOC_H + clrf SYSPRINTTEMP + movlw 1 + subwf PRINTLEN,W + btfss STATUS, C + goto SysForLoopEnd3 +SysForLoop3 + incf SYSPRINTTEMP,F + movf GLCDPRINTLOC,W + movwf CHARLOCX + movf GLCDPRINTLOC_H,W + movwf CHARLOCX_H + movf PRINTLOCY,W + movwf CHARLOCY + movf PRINTLOCY_H,W + movwf CHARLOCY_H + movf SYSPRINTTEMP,W + addwf SysLCDPRINTDATAHandler,W + movwf FSR + bcf STATUS, IRP + btfsc SysLCDPRINTDATAHandler_H,0 + bsf STATUS, IRP + movf INDF,W + movwf CHARCODE + movf GLCDFOREGROUND,W + movwf LINECOLOUR + movf GLCDFOREGROUND_H,W + movwf LINECOLOUR_H + call GLCDDRAWCHAR + + movf GLCDFONTWIDTH,W + movwf SysBYTETempA + movf GLCDFNTDEFAULTSIZE,W + movwf SysBYTETempB + pagesel SysMultSub + call SysMultSub + pagesel $ + movf SysBYTETempX,W + addwf GLCDPRINTLOC,F + movlw 0 + btfsc STATUS,C + addlw 1 + addwf GLCDPRINTLOC_H,F + movf PRINTLEN,W + subwf SYSPRINTTEMP,W + btfss STATUS, C + goto SysForLoop3 +SysForLoopEnd3 + return + +;******************************************************************************** + +GLCDWRITEBYTE_KS0108 + bcf SYSBITVAR0,0 + btfsc PORTE,0 + bsf SYSBITVAR0,0 + bcf SYSBITVAR0,1 + btfsc PORTC,1 + bsf SYSBITVAR0,1 + btfsc PORTC,0 + bcf PORTC,1 + bcf PORTE,0 +SysWaitLoop1 + pagesel FN_GLCDREADBYTE_KS0108 + call FN_GLCDREADBYTE_KS0108 + pagesel $ + btfsc GLCDREADBYTE_KS0108,7 + goto SysWaitLoop1 + bcf PORTE,0 + btfsc SYSBITVAR0,0 + bsf PORTE,0 + bcf PORTC,1 + btfsc SYSBITVAR0,1 + bsf PORTC,1 + bcf PORTE,1 + banksel TRISD + bcf TRISD,0 + bcf TRISD,1 + bcf TRISD,2 + bcf TRISD,3 + bcf TRISD,4 + bcf TRISD,5 + bcf TRISD,6 + bcf TRISD,7 + banksel PORTD + bcf PORTD,7 + btfsc LCDBYTE,7 + bsf PORTD,7 + bcf PORTD,6 + btfsc LCDBYTE,6 + bsf PORTD,6 + bcf PORTD,5 + btfsc LCDBYTE,5 + bsf PORTD,5 + bcf PORTD,4 + btfsc LCDBYTE,4 + bsf PORTD,4 + bcf PORTD,3 + btfsc LCDBYTE,3 + bsf PORTD,3 + bcf PORTD,2 + btfsc LCDBYTE,2 + bsf PORTD,2 + bcf PORTD,1 + btfsc LCDBYTE,1 + bsf PORTD,1 + bcf PORTD,0 + btfsc LCDBYTE,0 + bsf PORTD,0 + goto $+1 + goto $+1 + bsf PORTE,2 + goto $+1 + goto $+1 + bcf PORTE,2 + goto $+1 + goto $+1 + return + +;******************************************************************************** + +INITGLCD_KS0108 + banksel TRISE + bcf TRISE,0 + bcf TRISE,1 + bcf TRISE,2 + bcf TRISC,0 + bcf TRISC,1 + bcf TRISC,2 + banksel PORTC + bcf PORTC,2 + movlw 1 + movwf SysWaitTempMS + clrf SysWaitTempMS_H + pagesel Delay_MS + call Delay_MS + pagesel $ + bsf PORTC,2 + movlw 1 + movwf SysWaitTempMS + clrf SysWaitTempMS_H + pagesel Delay_MS + call Delay_MS + pagesel $ + bsf PORTC,0 + bsf PORTC,1 + bcf PORTE,0 + movlw 63 + movwf LCDBYTE + call GLCDWRITEBYTE_KS0108 + + movlw 192 + movwf LCDBYTE + call GLCDWRITEBYTE_KS0108 + + bcf PORTC,0 + bcf PORTC,1 + clrf GLCDBACKGROUND + clrf GLCDBACKGROUND_H + movlw 1 + movwf GLCDFOREGROUND + clrf GLCDFOREGROUND_H + movlw 6 + movwf GLCDFONTWIDTH + clrf GLCDFNTDEFAULT + movlw 1 + movwf GLCDFNTDEFAULTSIZE + pagesel GLCDCLS_KS0108 + call GLCDCLS_KS0108 + pagesel $ + + return + +;******************************************************************************** + +LINE + clrf LINEDIFFX + clrf LINEDIFFX_H + clrf LINEDIFFY + clrf LINEDIFFY_H + clrf LINESTEPX + clrf LINESTEPX_H + clrf LINESTEPY + clrf LINESTEPY_H + clrf LINEDIFFX_X2 + clrf LINEDIFFX_X2_H + clrf LINEDIFFY_X2 + clrf LINEDIFFY_X2_H + clrf LINEERR + clrf LINEERR_H + movf LINEX1,W + subwf LINEX2,W + movwf LINEDIFFX + movf LINEX1_H,W + btfss STATUS,C + addlw 1 + subwf LINEX2_H,W + movwf LINEDIFFX_H + movf LINEY1,W + subwf LINEY2,W + movwf LINEDIFFY + movf LINEY1_H,W + btfss STATUS,C + addlw 1 + subwf LINEY2_H,W + movwf LINEDIFFY_H + movf LINEDIFFX,W + movwf SysINTEGERTempB + movf LINEDIFFX_H,W + movwf SysINTEGERTempB_H + clrf SysINTEGERTempA + clrf SysINTEGERTempA_H + pagesel SysCompLessThanINT + call SysCompLessThanINT + pagesel $ + btfss SysByteTempX,0 + goto ELSE21_1 + movlw 1 + movwf LINESTEPX + clrf LINESTEPX_H + goto ENDIF21 +ELSE21_1 + movlw 255 + movwf LINESTEPX + movwf LINESTEPX_H +ENDIF21 + movf LINEDIFFY,W + movwf SysINTEGERTempB + movf LINEDIFFY_H,W + movwf SysINTEGERTempB_H + clrf SysINTEGERTempA + clrf SysINTEGERTempA_H + pagesel SysCompLessThanINT + call SysCompLessThanINT + pagesel $ + btfss SysByteTempX,0 + goto ELSE22_1 + movlw 1 + movwf LINESTEPY + clrf LINESTEPY_H + goto ENDIF22 +ELSE22_1 + movlw 255 + movwf LINESTEPY + movwf LINESTEPY_H +ENDIF22 + movf LINESTEPX,W + movwf SysINTEGERTempA + movf LINESTEPX_H,W + movwf SysINTEGERTempA_H + movf LINEDIFFX,W + movwf SysINTEGERTempB + movf LINEDIFFX_H,W + movwf SysINTEGERTempB_H + pagesel SysMultSubINT + call SysMultSubINT + pagesel $ + movf SysINTEGERTempX,W + movwf LINEDIFFX + movf SysINTEGERTempX_H,W + movwf LINEDIFFX_H + movf LINESTEPY,W + movwf SysINTEGERTempA + movf LINESTEPY_H,W + movwf SysINTEGERTempA_H + movf LINEDIFFY,W + movwf SysINTEGERTempB + movf LINEDIFFY_H,W + movwf SysINTEGERTempB_H + pagesel SysMultSubINT + call SysMultSubINT + pagesel $ + movf SysINTEGERTempX,W + movwf LINEDIFFY + movf SysINTEGERTempX_H,W + movwf LINEDIFFY_H + movf LINEDIFFX,W + movwf SysINTEGERTempA + movf LINEDIFFX_H,W + movwf SysINTEGERTempA_H + movlw 2 + movwf SysINTEGERTempB + clrf SysINTEGERTempB_H + pagesel SysMultSubINT + call SysMultSubINT + pagesel $ + movf SysINTEGERTempX,W + movwf LINEDIFFX_X2 + movf SysINTEGERTempX_H,W + movwf LINEDIFFX_X2_H + movf LINEDIFFY,W + movwf SysINTEGERTempA + movf LINEDIFFY_H,W + movwf SysINTEGERTempA_H + movlw 2 + movwf SysINTEGERTempB + clrf SysINTEGERTempB_H + pagesel SysMultSubINT + call SysMultSubINT + pagesel $ + movf SysINTEGERTempX,W + movwf LINEDIFFY_X2 + movf SysINTEGERTempX_H,W + movwf LINEDIFFY_X2_H + movf LINEDIFFX,W + movwf SysINTEGERTempA + movf LINEDIFFX_H,W + movwf SysINTEGERTempA_H + movf LINEDIFFY,W + movwf SysINTEGERTempB + movf LINEDIFFY_H,W + movwf SysINTEGERTempB_H + pagesel SysCompLessThanINT + call SysCompLessThanINT + pagesel $ + comf SysByteTempX,F + btfss SysByteTempX,0 + goto ELSE23_1 + movf LINEDIFFX,W + subwf LINEDIFFY_X2,W + movwf LINEERR + movf LINEDIFFX_H,W + btfss STATUS,C + addlw 1 + subwf LINEDIFFY_X2_H,W + movwf LINEERR_H +SysDoLoop_S1 + movf linex1,W + movwf SysWORDTempA + movf linex1_H,W + movwf SysWORDTempA_H + movf linex2,W + movwf SysWORDTempB + movf linex2_H,W + movwf SysWORDTempB_H + pagesel SysCompEqual16 + call SysCompEqual16 + pagesel $ + comf SysByteTempX,F + btfss SysByteTempX,0 + goto SysDoLoop_E1 + movf LINEX1,W + movwf GLCDX + movf LINEY1,W + movwf GLCDY + movf LINECOLOUR,W + movwf GLCDCOLOUR + movf LINECOLOUR_H,W + movwf GLCDCOLOUR_H + call PSET_KS0108 + + movf LINESTEPX,W + addwf LINEX1,F + movf LINESTEPX_H,W + btfsc STATUS,C + addlw 1 + addwf LINEX1_H,F + movf LINEERR,W + movwf SysINTEGERTempA + movf LINEERR_H,W + movwf SysINTEGERTempA_H + clrf SysINTEGERTempB + clrf SysINTEGERTempB_H + pagesel SysCompLessThanINT + call SysCompLessThanINT + pagesel $ + btfss SysByteTempX,0 + goto ELSE24_1 + movf LINEDIFFY_X2,W + addwf LINEERR,F + movf LINEDIFFY_X2_H,W + btfsc STATUS,C + addlw 1 + addwf LINEERR_H,F + goto ENDIF24 +ELSE24_1 + movf LINEDIFFX_X2,W + subwf LINEDIFFY_X2,W + movwf SysTemp1 + movf LINEDIFFX_X2_H,W + btfss STATUS,C + addlw 1 + subwf LINEDIFFY_X2_H,W + movwf SysTemp1_H + movf SysTemp1,W + addwf LINEERR,F + movf SysTemp1_H,W + btfsc STATUS,C + addlw 1 + addwf LINEERR_H,F + movf LINESTEPY,W + addwf LINEY1,F + movf LINESTEPY_H,W + btfsc STATUS,C + addlw 1 + addwf LINEY1_H,F +ENDIF24 + goto SysDoLoop_S1 +SysDoLoop_E1 + movf LINEX1,W + movwf GLCDX + movf LINEY1,W + movwf GLCDY + movf LINECOLOUR,W + movwf GLCDCOLOUR + movf LINECOLOUR_H,W + movwf GLCDCOLOUR_H + call PSET_KS0108 + + goto ENDIF23 +ELSE23_1 + movf LINEDIFFY,W + subwf LINEDIFFX_X2,W + movwf LINEERR + movf LINEDIFFY_H,W + btfss STATUS,C + addlw 1 + subwf LINEDIFFX_X2_H,W + movwf LINEERR_H +SysDoLoop_S2 + movf liney1,W + movwf SysWORDTempA + movf liney1_H,W + movwf SysWORDTempA_H + movf liney2,W + movwf SysWORDTempB + movf liney2_H,W + movwf SysWORDTempB_H + pagesel SysCompEqual16 + call SysCompEqual16 + pagesel $ + comf SysByteTempX,F + btfss SysByteTempX,0 + goto SysDoLoop_E2 + movf LINEX1,W + movwf GLCDX + movf LINEY1,W + movwf GLCDY + movf LINECOLOUR,W + movwf GLCDCOLOUR + movf LINECOLOUR_H,W + movwf GLCDCOLOUR_H + call PSET_KS0108 + + movf LINESTEPY,W + addwf LINEY1,F + movf LINESTEPY_H,W + btfsc STATUS,C + addlw 1 + addwf LINEY1_H,F + movf LINEERR,W + movwf SysINTEGERTempA + movf LINEERR_H,W + movwf SysINTEGERTempA_H + clrf SysINTEGERTempB + clrf SysINTEGERTempB_H + pagesel SysCompLessThanINT + call SysCompLessThanINT + pagesel $ + btfss SysByteTempX,0 + goto ELSE25_1 + movf LINEDIFFX_X2,W + addwf LINEERR,F + movf LINEDIFFX_X2_H,W + btfsc STATUS,C + addlw 1 + addwf LINEERR_H,F + goto ENDIF25 +ELSE25_1 + movf LINEDIFFY_X2,W + subwf LINEDIFFX_X2,W + movwf SysTemp1 + movf LINEDIFFY_X2_H,W + btfss STATUS,C + addlw 1 + subwf LINEDIFFX_X2_H,W + movwf SysTemp1_H + movf SysTemp1,W + addwf LINEERR,F + movf SysTemp1_H,W + btfsc STATUS,C + addlw 1 + addwf LINEERR_H,F + movf LINESTEPX,W + addwf LINEX1,F + movf LINESTEPX_H,W + btfsc STATUS,C + addlw 1 + addwf LINEX1_H,F +ENDIF25 + goto SysDoLoop_S2 +SysDoLoop_E2 + movf LINEX1,W + movwf GLCDX + movf LINEY1,W + movwf GLCDY + movf LINECOLOUR,W + movwf GLCDCOLOUR + movf LINECOLOUR_H,W + movwf GLCDCOLOUR_H + call PSET_KS0108 + +ENDIF23 + return + +;******************************************************************************** + +PSET_KS0108 + btfsc GLCDX,6 + goto ENDIF30 + bsf PORTC,1 + bcf PORTC,0 +ENDIF30 + btfss GLCDX,6 + goto ENDIF31 + bsf PORTC,0 + movlw 64 + subwf GLCDX,F + bcf PORTC,1 +ENDIF31 + movf GLCDY,W + movwf SysBYTETempA + movlw 8 + movwf SysBYTETempB + pagesel SysDivSub + call SysDivSub + pagesel $ + movf SysBYTETempA,W + movwf CURRPAGE + bcf PORTE,0 + movlw 184 + iorwf CURRPAGE,W + movwf LCDBYTE + call GLCDWRITEBYTE_KS0108 + + bcf PORTE,0 + movlw 64 + iorwf GLCDX,W + movwf LCDBYTE + call GLCDWRITEBYTE_KS0108 + + bsf PORTE,0 + pagesel FN_GLCDREADBYTE_KS0108 + call FN_GLCDREADBYTE_KS0108 + pagesel $ + movf GLCDREADBYTE_KS0108,W + movwf GLCDDATATEMP + bsf PORTE,0 + pagesel FN_GLCDREADBYTE_KS0108 + call FN_GLCDREADBYTE_KS0108 + pagesel $ + movf GLCDREADBYTE_KS0108,W + movwf GLCDDATATEMP + movlw 7 + andwf GLCDY,W + movwf GLCDBITNO + btfsc GLCDCOLOUR,0 + goto ELSE32_1 + movlw 254 + movwf GLCDCHANGE + bsf STATUS,C + goto ENDIF32 +ELSE32_1 + movlw 1 + movwf GLCDCHANGE + bcf STATUS,C +ENDIF32 + movf GLCDBITNO,W + movwf SysRepeatTemp1 + btfsc STATUS,Z + goto SysRepeatLoopEnd1 +SysRepeatLoop1 + rlf GLCDCHANGE,F + decfsz SysRepeatTemp1,F + goto SysRepeatLoop1 +SysRepeatLoopEnd1 + btfsc GLCDCOLOUR,0 + goto ELSE33_1 + movf GLCDDATATEMP,W + andwf GLCDCHANGE,W + movwf GLCDDATATEMP + goto ENDIF33 +ELSE33_1 + movf GLCDDATATEMP,W + iorwf GLCDCHANGE,W + movwf GLCDDATATEMP +ENDIF33 + bcf PORTE,0 + movlw 64 + iorwf GLCDX,W + movwf LCDBYTE + call GLCDWRITEBYTE_KS0108 + + bsf PORTE,0 + movf GLCDDATATEMP,W + movwf LCDBYTE + call GLCDWRITEBYTE_KS0108 + + bcf PORTC,0 + bcf PORTC,1 + return + +;******************************************************************************** + +FN_STR + clrf SYSCHARCOUNT + banksel SYSVALTEMP + movf SYSVALTEMP,W + movwf SysWORDTempA + movf SYSVALTEMP_H,W + movwf SysWORDTempA_H + movlw 16 + movwf SysWORDTempB + movlw 39 + movwf SysWORDTempB_H + banksel STATUS + call SysCompLessThan16 + comf SysByteTempX,F + btfss SysByteTempX,0 + goto ENDIF61 + banksel SYSVALTEMP + movf SYSVALTEMP,W + movwf SysWORDTempA + movf SYSVALTEMP_H,W + movwf SysWORDTempA_H + movlw 16 + movwf SysWORDTempB + movlw 39 + movwf SysWORDTempB_H + banksel STATUS + call SysDivSub16 + movf SysWORDTempA,W + movwf SYSSTRDATA + movf SYSCALCTEMPX,W + banksel SYSVALTEMP + movwf SYSVALTEMP + movf SYSCALCTEMPX_H,W + movwf SYSVALTEMP_H + banksel SYSCHARCOUNT + incf SYSCHARCOUNT,F + movlw low(STR) + addwf SYSCHARCOUNT,W + movwf FSR + bankisel STR + movlw 48 + addwf SYSSTRDATA,W + movwf INDF + goto SYSVALTHOUSANDS +ENDIF61 + banksel SYSVALTEMP + movf SYSVALTEMP,W + movwf SysWORDTempA + movf SYSVALTEMP_H,W + movwf SysWORDTempA_H + movlw 232 + movwf SysWORDTempB + movlw 3 + movwf SysWORDTempB_H + banksel STATUS + call SysCompLessThan16 + comf SysByteTempX,F + btfss SysByteTempX,0 + goto ENDIF62 +SYSVALTHOUSANDS + banksel SYSVALTEMP + movf SYSVALTEMP,W + movwf SysWORDTempA + movf SYSVALTEMP_H,W + movwf SysWORDTempA_H + movlw 232 + movwf SysWORDTempB + movlw 3 + movwf SysWORDTempB_H + banksel STATUS + call SysDivSub16 + movf SysWORDTempA,W + movwf SYSSTRDATA + movf SYSCALCTEMPX,W + banksel SYSVALTEMP + movwf SYSVALTEMP + movf SYSCALCTEMPX_H,W + movwf SYSVALTEMP_H + banksel SYSCHARCOUNT + incf SYSCHARCOUNT,F + movlw low(STR) + addwf SYSCHARCOUNT,W + movwf FSR + bankisel STR + movlw 48 + addwf SYSSTRDATA,W + movwf INDF + goto SYSVALHUNDREDS +ENDIF62 + banksel SYSVALTEMP + movf SYSVALTEMP,W + movwf SysWORDTempA + movf SYSVALTEMP_H,W + movwf SysWORDTempA_H + movlw 100 + movwf SysWORDTempB + clrf SysWORDTempB_H + banksel STATUS + call SysCompLessThan16 + comf SysByteTempX,F + btfss SysByteTempX,0 + goto ENDIF63 +SYSVALHUNDREDS + banksel SYSVALTEMP + movf SYSVALTEMP,W + movwf SysWORDTempA + movf SYSVALTEMP_H,W + movwf SysWORDTempA_H + movlw 100 + movwf SysWORDTempB + clrf SysWORDTempB_H + banksel STATUS + call SysDivSub16 + movf SysWORDTempA,W + movwf SYSSTRDATA + movf SYSCALCTEMPX,W + banksel SYSVALTEMP + movwf SYSVALTEMP + movf SYSCALCTEMPX_H,W + movwf SYSVALTEMP_H + banksel SYSCHARCOUNT + incf SYSCHARCOUNT,F + movlw low(STR) + addwf SYSCHARCOUNT,W + movwf FSR + bankisel STR + movlw 48 + addwf SYSSTRDATA,W + movwf INDF + goto SYSVALTENS +ENDIF63 + banksel SYSVALTEMP + movf SYSVALTEMP,W + movwf SysWORDTempA + movf SYSVALTEMP_H,W + movwf SysWORDTempA_H + movlw 10 + movwf SysWORDTempB + clrf SysWORDTempB_H + banksel STATUS + call SysCompLessThan16 + comf SysByteTempX,F + btfss SysByteTempX,0 + goto ENDIF64 +SYSVALTENS + banksel SYSVALTEMP + movf SYSVALTEMP,W + movwf SysWORDTempA + movf SYSVALTEMP_H,W + movwf SysWORDTempA_H + movlw 10 + movwf SysWORDTempB + clrf SysWORDTempB_H + banksel STATUS + call SysDivSub16 + movf SysWORDTempA,W + movwf SYSSTRDATA + movf SYSCALCTEMPX,W + banksel SYSVALTEMP + movwf SYSVALTEMP + movf SYSCALCTEMPX_H,W + movwf SYSVALTEMP_H + banksel SYSCHARCOUNT + incf SYSCHARCOUNT,F + movlw low(STR) + addwf SYSCHARCOUNT,W + movwf FSR + bankisel STR + movlw 48 + addwf SYSSTRDATA,W + movwf INDF +ENDIF64 + incf SYSCHARCOUNT,F + movlw low(STR) + addwf SYSCHARCOUNT,W + movwf FSR + bankisel STR + movlw 48 + banksel SYSVALTEMP + addwf SYSVALTEMP,W + movwf INDF + movf SYSCALCTEMPX,W + movwf SYSVALTEMP + movf SYSCALCTEMPX_H,W + movwf SYSVALTEMP_H + banksel SYSCHARCOUNT + movf SYSCHARCOUNT,W + banksel SYSSTR_0 + movwf SYSSTR_0 + banksel STATUS + return + +;******************************************************************************** + +SYSCOMPLESSTHAN16 + clrf SYSBYTETEMPX + movf SYSWORDTEMPA_H,W + subwf SYSWORDTEMPB_H,W + btfss STATUS,C + return + movf SYSWORDTEMPB_H,W + subwf SYSWORDTEMPA_H,W + btfss STATUS,C + goto SCLT16TRUE + movf SYSWORDTEMPB,W + subwf SYSWORDTEMPA,W + btfsc STATUS,C + return +SCLT16TRUE + comf SYSBYTETEMPX,F + return + +;******************************************************************************** + +SYSDIVSUB16 + movf SYSWORDTEMPA,W + movwf SYSDIVMULTA + movf SYSWORDTEMPA_H,W + movwf SYSDIVMULTA_H + movf SYSWORDTEMPB,W + movwf SYSDIVMULTB + movf SYSWORDTEMPB_H,W + movwf SYSDIVMULTB_H + clrf SYSDIVMULTX + clrf SYSDIVMULTX_H + movf SYSDIVMULTB,W + movwf SysWORDTempA + movf SYSDIVMULTB_H,W + movwf SysWORDTempA_H + clrf SysWORDTempB + clrf SysWORDTempB_H + pagesel SysCompEqual16 + call SysCompEqual16 + pagesel $ + btfss SysByteTempX,0 + goto ENDIF67 + clrf SYSWORDTEMPA + clrf SYSWORDTEMPA_H + return +ENDIF67 + movlw 16 + movwf SYSDIVLOOP +SYSDIV16START + bcf STATUS,C + rlf SYSDIVMULTA,F + rlf SYSDIVMULTA_H,F + rlf SYSDIVMULTX,F + rlf SYSDIVMULTX_H,F + movf SYSDIVMULTB,W + subwf SYSDIVMULTX,F + movf SYSDIVMULTB_H,W + btfss STATUS,C + addlw 1 + subwf SYSDIVMULTX_H,F + bsf SYSDIVMULTA,0 + btfsc STATUS,C + goto ENDIF68 + bcf SYSDIVMULTA,0 + movf SYSDIVMULTB,W + addwf SYSDIVMULTX,F + movf SYSDIVMULTB_H,W + btfsc STATUS,C + addlw 1 + addwf SYSDIVMULTX_H,F +ENDIF68 + decfsz SYSDIVLOOP, F + goto SYSDIV16START + movf SYSDIVMULTA,W + movwf SYSWORDTEMPA + movf SYSDIVMULTA_H,W + movwf SYSWORDTEMPA_H + movf SYSDIVMULTX,W + movwf SYSWORDTEMPX + movf SYSDIVMULTX_H,W + movwf SYSWORDTEMPX_H + return + +;******************************************************************************** + +;Start of program memory page 1 + ORG 2048 +Delay_MS + incf SysWaitTempMS_H, F +DMS_START + movlw 108 + movwf DELAYTEMP2 +DMS_OUTER + movlw 11 + movwf DELAYTEMP +DMS_INNER + decfsz DELAYTEMP, F + goto DMS_INNER + decfsz DELAYTEMP2, F + goto DMS_OUTER + decfsz SysWaitTempMS, F + goto DMS_START + decfsz SysWaitTempMS_H, F + goto DMS_START + return + +;******************************************************************************** + +Delay_S +DS_START + movlw 232 + movwf SysWaitTempMS + movlw 3 + movwf SysWaitTempMS_H + call Delay_MS + + decfsz SysWaitTempS, F + goto DS_START + return + +;******************************************************************************** + +GLCDCLS_KS0108 + clrf GLCD_YORDINATE + clrf GLCD_YORDINATE_H + bsf PORTC,0 + bcf PORTC,1 + clrf GLCD_COUNT +SysForLoop10 + incf GLCD_COUNT,F + movlw 255 + movwf CURRPAGE +SysForLoop11 + incf CURRPAGE,F + bcf PORTE,0 + movlw 184 + iorwf CURRPAGE,W + movwf LCDBYTE + pagesel GLCDWRITEBYTE_KS0108 + call GLCDWRITEBYTE_KS0108 + pagesel $ + + movlw 255 + movwf CURRCOL +SysForLoop12 + incf CURRCOL,F + bcf PORTE,0 + movlw 64 + iorwf CURRCOL,W + movwf LCDBYTE + pagesel GLCDWRITEBYTE_KS0108 + call GLCDWRITEBYTE_KS0108 + pagesel $ + + bsf PORTE,0 + clrf LCDBYTE + pagesel GLCDWRITEBYTE_KS0108 + call GLCDWRITEBYTE_KS0108 + pagesel $ + + movlw 63 + subwf CURRCOL,W + btfss STATUS, C + goto SysForLoop12 +SysForLoopEnd12 + movlw 7 + subwf CURRPAGE,W + btfss STATUS, C + goto SysForLoop11 +SysForLoopEnd11 + bcf PORTC,0 + bsf PORTC,1 + movlw 2 + subwf GLCD_COUNT,W + btfss STATUS, C + goto SysForLoop10 +SysForLoopEnd10 + bcf PORTC,0 + bcf PORTC,1 + return + +;******************************************************************************** + +FN_GLCDREADBYTE_KS0108 + banksel TRISD + bsf TRISD,7 + bsf TRISD,6 + bsf TRISD,5 + bsf TRISD,4 + bsf TRISD,3 + bsf TRISD,2 + bsf TRISD,1 + bsf TRISD,0 + banksel PORTE + bsf PORTE,1 + bsf PORTE,2 + movlw 2 + movwf DELAYTEMP +DelayUS1 + decfsz DELAYTEMP,F + goto DelayUS1 + nop + bcf GLCDREADBYTE_KS0108,7 + btfsc PORTD,7 + bsf GLCDREADBYTE_KS0108,7 + bcf GLCDREADBYTE_KS0108,6 + btfsc PORTD,6 + bsf GLCDREADBYTE_KS0108,6 + bcf GLCDREADBYTE_KS0108,5 + btfsc PORTD,5 + bsf GLCDREADBYTE_KS0108,5 + bcf GLCDREADBYTE_KS0108,4 + btfsc PORTD,4 + bsf GLCDREADBYTE_KS0108,4 + bcf GLCDREADBYTE_KS0108,3 + btfsc PORTD,3 + bsf GLCDREADBYTE_KS0108,3 + bcf GLCDREADBYTE_KS0108,2 + btfsc PORTD,2 + bsf GLCDREADBYTE_KS0108,2 + bcf GLCDREADBYTE_KS0108,1 + btfsc PORTD,1 + bsf GLCDREADBYTE_KS0108,1 + bcf GLCDREADBYTE_KS0108,0 + btfsc PORTD,0 + bsf GLCDREADBYTE_KS0108,0 + bcf PORTE,2 + movlw 2 + movwf DELAYTEMP +DelayUS2 + decfsz DELAYTEMP,F + goto DelayUS2 + nop + return + +;******************************************************************************** + +INITSYS + banksel ADCON1 + bcf ADCON1,ADFM + banksel ADCON0 + bcf ADCON0,ADON + banksel ADCON1 + bcf ADCON1,PCFG3 + bsf ADCON1,PCFG2 + bsf ADCON1,PCFG1 + bcf ADCON1,PCFG0 + movlw 7 + movwf CMCON + banksel PORTA + clrf PORTA + clrf PORTB + clrf PORTC + clrf PORTD + clrf PORTE + return + +;******************************************************************************** + +SYSCOMPEQUAL16 + clrf SYSBYTETEMPX + movf SYSWORDTEMPA, W + subwf SYSWORDTEMPB, W + btfss STATUS, Z + return + movf SYSWORDTEMPA_H, W + subwf SYSWORDTEMPB_H, W + btfss STATUS, Z + return + comf SYSBYTETEMPX,F + return + +;******************************************************************************** + +SYSCOMPLESSTHAN + clrf SYSBYTETEMPX + bsf STATUS, C + movf SYSBYTETEMPB, W + subwf SYSBYTETEMPA, W + btfss STATUS, C + comf SYSBYTETEMPX,F + return + +;******************************************************************************** + +SYSCOMPLESSTHANINT + clrf SYSBYTETEMPX + btfss SYSINTEGERTEMPA_H,7 + goto ELSE58_1 + btfsc SYSINTEGERTEMPB_H,7 + goto ENDIF59 + comf SYSBYTETEMPX,F + return +ENDIF59 + comf SYSINTEGERTEMPA,W + movwf SYSDIVMULTA + comf SYSINTEGERTEMPA_H,W + movwf SYSDIVMULTA_H + incf SYSDIVMULTA,F + btfsc STATUS,Z + incf SYSDIVMULTA_H,F + comf SYSINTEGERTEMPB,W + movwf SYSINTEGERTEMPA + comf SYSINTEGERTEMPB_H,W + movwf SYSINTEGERTEMPA_H + incf SYSINTEGERTEMPA,F + btfsc STATUS,Z + incf SYSINTEGERTEMPA_H,F + movf SYSDIVMULTA,W + movwf SYSINTEGERTEMPB + movf SYSDIVMULTA_H,W + movwf SYSINTEGERTEMPB_H + goto ENDIF58 +ELSE58_1 + btfsc SYSINTEGERTEMPB_H,7 + return +ENDIF58 + movf SYSINTEGERTEMPA_H,W + subwf SYSINTEGERTEMPB_H,W + btfss STATUS,C + return + movf SYSINTEGERTEMPB_H,W + subwf SYSINTEGERTEMPA_H,W + btfss STATUS,C + goto SCLTINTTRUE + movf SYSINTEGERTEMPB,W + subwf SYSINTEGERTEMPA,W + btfsc STATUS,C + return +SCLTINTTRUE + comf SYSBYTETEMPX,F + return + +;******************************************************************************** + +SYSDIVSUB + movf SYSBYTETEMPB, F + btfsc STATUS, Z + return + clrf SYSBYTETEMPX + movlw 8 + movwf SYSDIVLOOP +SYSDIV8START + bcf STATUS, C + rlf SYSBYTETEMPA, F + rlf SYSBYTETEMPX, F + movf SYSBYTETEMPB, W + subwf SYSBYTETEMPX, F + bsf SYSBYTETEMPA, 0 + btfsc STATUS, C + goto DIV8NOTNEG + bcf SYSBYTETEMPA, 0 + movf SYSBYTETEMPB, W + addwf SYSBYTETEMPX, F +DIV8NOTNEG + decfsz SYSDIVLOOP, F + goto SYSDIV8START + return + +;******************************************************************************** + +SYSMULTSUB + clrf SYSBYTETEMPX +MUL8LOOP + movf SYSBYTETEMPA, W + btfsc SYSBYTETEMPB, 0 + addwf SYSBYTETEMPX, F + bcf STATUS, C + rrf SYSBYTETEMPB, F + bcf STATUS, C + rlf SYSBYTETEMPA, F + movf SYSBYTETEMPB, F + btfss STATUS, Z + goto MUL8LOOP + return + +;******************************************************************************** + +SYSMULTSUB16 + movf SYSWORDTEMPA,W + movwf SYSDIVMULTA + movf SYSWORDTEMPA_H,W + movwf SYSDIVMULTA_H + movf SYSWORDTEMPB,W + movwf SYSDIVMULTB + movf SYSWORDTEMPB_H,W + movwf SYSDIVMULTB_H + clrf SYSDIVMULTX + clrf SYSDIVMULTX_H +MUL16LOOP + btfss SYSDIVMULTB,0 + goto ENDIF65 + movf SYSDIVMULTA,W + addwf SYSDIVMULTX,F + movf SYSDIVMULTA_H,W + btfsc STATUS,C + addlw 1 + addwf SYSDIVMULTX_H,F +ENDIF65 + bcf STATUS,C + rrf SYSDIVMULTB_H,F + rrf SYSDIVMULTB,F + bcf STATUS,C + rlf SYSDIVMULTA,F + rlf SYSDIVMULTA_H,F + movf SYSDIVMULTB,W + movwf SysWORDTempB + movf SYSDIVMULTB_H,W + movwf SysWORDTempB_H + clrf SysWORDTempA + clrf SysWORDTempA_H + pagesel SysCompLessThan16 + call SysCompLessThan16 + pagesel $ + btfsc SysByteTempX,0 + goto MUL16LOOP + movf SYSDIVMULTX,W + movwf SYSWORDTEMPX + movf SYSDIVMULTX_H,W + movwf SYSWORDTEMPX_H + return + +;******************************************************************************** + +SYSMULTSUBINT + movf SYSINTEGERTEMPA_H,W + xorwf SYSINTEGERTEMPB_H,W + movwf SYSSIGNBYTE + btfss SYSINTEGERTEMPA_H,7 + goto ENDIF55 + comf SYSINTEGERTEMPA,F + comf SYSINTEGERTEMPA_H,F + incf SYSINTEGERTEMPA,F + btfsc STATUS,Z + incf SYSINTEGERTEMPA_H,F +ENDIF55 + btfss SYSINTEGERTEMPB_H,7 + goto ENDIF56 + comf SYSINTEGERTEMPB,F + comf SYSINTEGERTEMPB_H,F + incf SYSINTEGERTEMPB,F + btfsc STATUS,Z + incf SYSINTEGERTEMPB_H,F +ENDIF56 + call SYSMULTSUB16 + + btfss SYSSIGNBYTE,7 + goto ENDIF57 + comf SYSINTEGERTEMPX,F + comf SYSINTEGERTEMPX_H,F + incf SYSINTEGERTEMPX,F + btfsc STATUS,Z + incf SYSINTEGERTEMPX_H,F +ENDIF57 + return + +;******************************************************************************** + +SYSREADSTRING + movf SYSSTRINGB, W + movwf FSR + bcf STATUS, IRP + btfsc SYSSTRINGB_H, 0 + bsf STATUS, IRP + call SYSSTRINGTABLES + movwf SYSCALCTEMPA + movwf INDF + addwf SYSSTRINGB, F + goto SYSSTRINGREADCHECK +SYSREADSTRINGPART + movf SYSSTRINGB, W + movwf FSR + bcf STATUS, IRP + btfsc SYSSTRINGB_H, 0 + bsf STATUS, IRP + call SYSSTRINGTABLES + movwf SYSCALCTEMPA + addwf SYSSTRINGLENGTH,F + addwf SYSSTRINGB,F +SYSSTRINGREADCHECK + movf SYSCALCTEMPA,F + btfsc STATUS,Z + return +SYSSTRINGREAD + call SYSSTRINGTABLES + incf FSR, F + movwf INDF + decfsz SYSCALCTEMPA, F + goto SYSSTRINGREAD + return + +;******************************************************************************** + +SysStringTables + movf SysStringA_H,W + movwf PCLATH + movf SysStringA,W + incf SysStringA,F + btfsc STATUS,Z + incf SysStringA_H,F + movwf PCL + +StringTable1 + retlw 5 + retlw 72 ;H + retlw 101 ;e + retlw 108 ;l + retlw 108 ;l + retlw 111 ;o + + +StringTable2 + retlw 8 + retlw 65 ;A + retlw 83 ;S + retlw 67 ;C + retlw 73 ;I + retlw 73 ;I + retlw 32 ; + retlw 35 ;# + retlw 58 ;: + + +;******************************************************************************** + +;Start of program memory page 2 + ORG 4096 +;Start of program memory page 3 + ORG 6144 + + END diff --git a/resources/examples/Pic/ks0108_p16f877a/KS0108_16f877a.gcb b/resources/examples/Pic/ks0108_p16f877a/KS0108_16f877a.gcb new file mode 100644 index 0000000..6e469e2 --- /dev/null +++ b/resources/examples/Pic/ks0108_p16f877a/KS0108_16f877a.gcb @@ -0,0 +1,74 @@ +'''A demonstration program for GCGB and GCB. +'''-------------------------------------------------------------------------------------------------------------------------------- +'''This program is a simple GLCD demonstration of the KS0108 GLCD capabilities. +'''This program draws lines, boxes, circles and prints strings and numbers. +'''The GLCD is connected to the microprocessor as shown in the hardware section of this code. +'''@author EvanV with works of ChuckH +'''@licence GPL +'''@version 1.2c +'''@date 22.12.14 +'''******************************************************************************** + + #chip 16f877a,16 + + #include + #define GLCD_TYPE GLCD_TYPE_KS0108 ' This is the Default value, not required. + + + #define GLCD_CS1 PORTC.0 'D12 to actually since CS1, CS2 can be reversed on some devices + #define GLCD_CS2 PORTC.1 + #define GLCD_DB0 PORTD.0 'D0 to pin 7 on LCD + #define GLCD_DB1 PORTD.1 'D1 to pin 8 on LCD + #define GLCD_DB2 PORTD.2 'D2 to pin 9 on LCD + #define GLCD_DB3 PORTD.3 'D3 to pin 10 on LCD + #define GLCD_DB4 PORTD.4 'D4 to pin 11 on LCD + #define GLCD_DB5 PORTD.5 'D5 to pin 12 on LCD + #define GLCD_DB6 PORTD.6 'D6 to pin 13 on LCD + #define GLCD_DB7 PORTD.7 'D7 to pin 14 on LCD + + #define GLCD_RS PORTe.0 + #define GLCD_Enable PORTe.2 + #define GLCD_RW PORTe.1 + #define GLCD_RESET PORTC.2 + + ' Changed timing for 32 mhz device + #define KS0108ReadDelay 2 ; = 2 normal usage, 6 or above is OK at 32 mhz! + #define KS0108WriteDelay 1 ; = 1 normal usage you may get away with 0, 2 or above is OK at 32 mhz! + #define KS0108ClockDelay 1 ; = 1 normal usage you may get away with 0, 2 or above is OK at 32 mhz! + 'change to LED height, this, avoids set the 4 LED signals + #define LED_GLCD_HEIGHT GLCD_HEIGHT-1 + +; ----- Variables + Dim CHAR, XVAR as Byte + +; ----- Main body of program commences here. + Start: + GLCDCLS + + 'Print Hello + GLCDPrint 0,10,"Hello" + wait 1 s + + 'Print ASCII #: + GLCDPrint 0,10, "ASCII #:" + + 'Draw Box Around ASCII Character + Box 18,30,28,40 + + 'Print 0 through 9 + for char = 15 to 129 + GLCDPrint 17, 20 , Str(char) + GLCDdrawCHAR 20,30, char + wait 1 s + next + + 'Draw Line using line command + line 0,50,127,50 + for xvar = 0 to 80 + 'draw line using Pset command + pset xvar,63,on + next + Wait 10 s + + Goto Start +end diff --git a/resources/examples/Pic/ks0108_p16f877a/KS0108_16f877a.html b/resources/examples/Pic/ks0108_p16f877a/KS0108_16f877a.html new file mode 100644 index 0000000..3dd6dbe --- /dev/null +++ b/resources/examples/Pic/ks0108_p16f877a/KS0108_16f877a.html @@ -0,0 +1,51 @@ + + + +Compilation Report + + +

Compilation Report

+

Compiler Version (DD/MM/YYYY): 0.96.<<>> 2016-12-14

+

Chip resource usage:

+

Chip Model: 16F877A

+

Program Memory: 2399/8192 words (29.28%)

+

RAM: 133/368 bytes (36.14%)

+

RAM Allocation

+ +
+

Subroutines

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
NameCode Size (lines)Compiled Size (words)PageOutgoing calls
Main381771INITGLCD_KS0108(25), SYSREADSTRING(2), Delay_S(3), PSET_KS0108(1), LINE(1), GLCDDRAWCHAR(1), STR(1), BOX(1), GLCDPRINT(3), GLCDCLS_KS0108(1), INITSYS(1)
GLCDPRINT10611SYSMULTSUB(1), GLCDDRAWCHAR(1)
GLCDDRAWCHAR452021SYSCOMPLESSTHAN(2), SYSCOMPEQUAL16(1), PSET_KS0108(2)
BOX191431SYSCOMPLESSTHAN16(6), PSET_KS0108(4)
LINE553321SYSMULTSUBINT(4), SYSCOMPLESSTHANINT(5), SYSCOMPEQUAL16(2), PSET_KS0108(4)
INITGLCD_KS010825551Delay_MS(2), GLCDCLS_KS0108(1), GLCDWRITEBYTE_KS0108(2)
GLCDCLS_KS010821542GLCDWRITEBYTE_KS0108(3)
PSET_KS010848871SYSDIVSUB(1), GLCDREADBYTE_KS0108(2), GLCDWRITEBYTE_KS0108(4)
GLCDWRITEBYTE_KS010845681GLCDREADBYTE_KS0108(1)
GLCDREADBYTE_KS010821502
INITSYS579222
SYSREADSTRING101282
SYSMULTSUB39122
SYSMULTSUB1673422SYSCOMPLESSTHAN16(1)
SYSMULTSUBINT13262SYSMULTSUB16(1)
SYSDIVSUB48202
SYSDIVSUB1638601SYSCOMPEQUAL16(1)
SYSCOMPEQUAL1634112
SYSCOMPLESSTHAN2372
SYSCOMPLESSTHAN1638151
SYSCOMPLESSTHANINT48422
STR362111SYSDIVSUB16(4), SYSCOMPLESSTHAN16(4)
Delay_MS0142
Delay_S082Delay_MS(1)
SysStringTables0222
GLCDCHARCOL301261
GLCDCHARCOL401261
GLCDCHARCOL501261
GLCDCHARCOL601261
GLCDCHARCOL701261
+ + diff --git a/resources/examples/Pic/ks0108_p16f877a/KS0108_16f877a.lst b/resources/examples/Pic/ks0108_p16f877a/KS0108_16f877a.lst new file mode 100644 index 0000000..09df065 --- /dev/null +++ b/resources/examples/Pic/ks0108_p16f877a/KS0108_16f877a.lst @@ -0,0 +1,3342 @@ +GCASM List File (GCBASIC 0.96.<<>> 2016-12-14) + +Symbols: +A EQU 0 +ACCESS EQU 0 +ACKDT EQU 5 +ACKEN EQU 4 +ACKSTAT EQU 6 +ADCON0 EQU 31 +ADCON0_GO_DONE EQU 2 +ADCON1 EQU 159 +ADCS0 EQU 6 +ADCS1 EQU 7 +ADCS2 EQU 6 +ADDEN EQU 3 +ADFM EQU 7 +ADIE EQU 6 +ADIF EQU 6 +ADON EQU 0 +ADRESH EQU 30 +ADRESL EQU 158 +B EQU 1 +BANKED EQU 1 +BASPROGRAMEND EQU 180 +BASPROGRAMSTART EQU 5 +BCLIE EQU 3 +BCLIF EQU 3 +BF EQU 0 +BOX EQU 182 +BRGH EQU 2 +C EQU 0 +C1INV EQU 4 +C1OUT EQU 6 +C2INV EQU 5 +C2OUT EQU 7 +CCP1CON EQU 23 +CCP1IE EQU 2 +CCP1IF EQU 2 +CCP1M0 EQU 0 +CCP1M1 EQU 1 +CCP1M2 EQU 2 +CCP1M3 EQU 3 +CCP1X EQU 5 +CCP1Y EQU 4 +CCP2CON EQU 29 +CCP2IE EQU 0 +CCP2IF EQU 0 +CCP2M0 EQU 0 +CCP2M1 EQU 1 +CCP2M2 EQU 2 +CCP2M3 EQU 3 +CCP2X EQU 5 +CCP2Y EQU 4 +CCPR1 EQU 21 +CCPR1H EQU 22 +CCPR1L EQU 21 +CCPR2 EQU 27 +CCPR2H EQU 28 +CCPR2L EQU 27 +CHAR EQU 32 +CHARCODE EQU 33 +CHARCOL EQU 34 +CHARCOLS EQU 36 +CHARCOL_H EQU 35 +CHARLOCX EQU 37 +CHARLOCX_H EQU 38 +CHARLOCY EQU 39 +CHARLOCY_H EQU 40 +CHARROW EQU 41 +CHARROWS EQU 43 +CHARROW_H EQU 42 +CHS0 EQU 3 +CHS1 EQU 4 +CHS2 EQU 5 +CIS EQU 3 +CKE EQU 6 +CKP EQU 4 +CM0 EQU 0 +CM1 EQU 1 +CM2 EQU 2 +CMCON EQU 156 +CMIE EQU 6 +CMIF EQU 6 +COL EQU 44 +CREN EQU 4 +CSRC EQU 7 +CURRCHARCOL EQU 45 +CURRCHARROW EQU 46 +CURRCHARVAL EQU 47 +CURRCOL EQU 48 +CURRPAGE EQU 49 +CVR0 EQU 0 +CVR1 EQU 1 +CVR2 EQU 2 +CVR3 EQU 3 +CVRCON EQU 157 +CVREN EQU 7 +CVROE EQU 6 +CVRR EQU 5 +D EQU 5 +DATA_ADDRESS EQU 5 +DC EQU 1 +DELAYTEMP EQU 112 +DELAYTEMP2 EQU 113 +DELAYUS1 EQU 2140 +DELAYUS2 EQU 2170 +DELAY_MS EQU 2048 +DELAY_S EQU 2062 +DIV8NOTNEG EQU 2273 +DMS_INNER EQU 2053 +DMS_OUTER EQU 2051 +DMS_START EQU 2049 +DRAWLINE EQU 50 +DRAWLINE_H EQU 51 +DS_START EQU 2062 +D_A EQU 5 +D_NOT_A EQU 5 +EEADR EQU 269 +EEADRH EQU 271 +EECON1 EQU 396 +EECON2 EQU 397 +EEDATA EQU 268 +EEDATH EQU 270 +EEIE EQU 4 +EEIF EQU 4 +EEPGD EQU 7 +ELSE10_1 EQU 1105 +ELSE21_1 EQU 1388 +ELSE22_1 EQU 1408 +ELSE23_1 EQU 1583 +ELSE24_1 EQU 1552 +ELSE25_1 EQU 1642 +ELSE32_1 EQU 1729 +ELSE33_1 EQU 1745 +ELSE58_1 EQU 2240 +ENDIF10 EQU 1122 +ENDIF15 EQU 202 +ENDIF16 EQU 222 +ENDIF21 EQU 1391 +ENDIF22 EQU 1411 +ENDIF23 EQU 1672 +ENDIF24 EQU 1572 +ENDIF25 EQU 1662 +ENDIF30 EQU 1677 +ENDIF31 EQU 1683 +ENDIF32 EQU 1732 +ENDIF33 EQU 1748 +ENDIF55 EQU 2340 +ENDIF56 EQU 2347 +ENDIF57 EQU 2355 +ENDIF58 EQU 2242 +ENDIF59 EQU 2221 +ENDIF6 EQU 976 +ENDIF61 EQU 1809 +ENDIF62 EQU 1857 +ENDIF63 EQU 1903 +ENDIF64 EQU 1948 +ENDIF65 EQU 2306 +ENDIF67 EQU 2012 +ENDIF68 EQU 2035 +ENDIF7 EQU 1015 +F EQU 1 +FERR EQU 2 +FN_GLCDREADBYTE_KS0108 EQU 2124 +FN_STR EQU 1760 +FSR EQU 4 +GCEN EQU 7 +GIE EQU 7 +GLCDBACKGROUND EQU 52 +GLCDBACKGROUND_H EQU 53 +GLCDBITNO EQU 54 +GLCDCHANGE EQU 55 +GLCDCHARCOL3 EQU 325 +GLCDCHARCOL4 EQU 451 +GLCDCHARCOL5 EQU 577 +GLCDCHARCOL6 EQU 703 +GLCDCHARCOL7 EQU 829 +GLCDCLS_KS0108 EQU 2070 +GLCDCOLOUR EQU 56 +GLCDCOLOUR_H EQU 57 +GLCDDATATEMP EQU 58 +GLCDDRAWCHAR EQU 955 +GLCDFNTDEFAULT EQU 59 +GLCDFNTDEFAULTSIZE EQU 60 +GLCDFONTWIDTH EQU 61 +GLCDFOREGROUND EQU 62 +GLCDFOREGROUND_H EQU 63 +GLCDPRINT3 EQU 1157 +GLCDPRINTLOC EQU 64 +GLCDPRINTLOC_H EQU 65 +GLCDREADBYTE_KS0108 EQU 66 +GLCDTEMP EQU 67 +GLCDWRITEBYTE_KS0108 EQU 1218 +GLCDX EQU 68 +GLCDY EQU 69 +GLCD_COUNT EQU 70 +GLCD_YORDINATE EQU 71 +GLCD_YORDINATE_H EQU 72 +GO EQU 2 +GO_DONE EQU 2 +GO_NOT_DONE EQU 2 +I2C_DATA EQU 5 +I2C_READ EQU 2 +I2C_START EQU 3 +I2C_STOP EQU 4 +IBF EQU 7 +IBOV EQU 5 +INDF EQU 0 +INITGLCD_KS0108 EQU 1286 +INITSYS EQU 2174 +INTCON EQU 11 +INTE EQU 4 +INTEDG EQU 6 +INTF EQU 1 +IRP EQU 7 +LCDBYTE EQU 73 +LINE EQU 1341 +LINECOLOUR EQU 74 +LINECOLOUR_H EQU 75 +LINEDIFFX EQU 76 +LINEDIFFX_H EQU 77 +LINEDIFFX_X2 EQU 78 +LINEDIFFX_X2_H EQU 79 +LINEDIFFY EQU 80 +LINEDIFFY_H EQU 81 +LINEDIFFY_X2 EQU 82 +LINEDIFFY_X2_H EQU 83 +LINEERR EQU 84 +LINEERR_H EQU 85 +LINESTEPX EQU 86 +LINESTEPX_H EQU 87 +LINESTEPY EQU 88 +LINESTEPY_H EQU 89 +LINEX1 EQU 90 +LINEX1_H EQU 91 +LINEX2 EQU 92 +LINEX2_H EQU 93 +LINEY1 EQU 94 +LINEY1_H EQU 95 +LINEY2 EQU 96 +LINEY2_H EQU 97 +MUL16LOOP EQU 2298 +MUL8LOOP EQU 2277 +NOT_A EQU 5 +NOT_ADDRESS EQU 5 +NOT_BO EQU 0 +NOT_BOR EQU 0 +NOT_DONE EQU 2 +NOT_PD EQU 3 +NOT_POR EQU 1 +NOT_RBPU EQU 7 +NOT_RC8 EQU 6 +NOT_T1SYNC EQU 2 +NOT_TO EQU 4 +NOT_TX8 EQU 6 +NOT_W EQU 2 +NOT_WRITE EQU 2 +OBF EQU 6 +OERR EQU 1 +OPTION_REG EQU 129 +P EQU 4 +PCFG0 EQU 0 +PCFG1 EQU 1 +PCFG2 EQU 2 +PCFG3 EQU 3 +PCL EQU 2 +PCLATH EQU 10 +PCON EQU 142 +PEIE EQU 6 +PEN EQU 2 +PIE1 EQU 140 +PIE2 EQU 141 +PIR1 EQU 12 +PIR2 EQU 13 +PORTA EQU 5 +PORTB EQU 6 +PORTC EQU 7 +PORTD EQU 8 +PORTE EQU 9 +PR2 EQU 146 +PRINTLEN EQU 98 +PRINTLOCX EQU 99 +PRINTLOCX_H EQU 100 +PRINTLOCY EQU 101 +PRINTLOCY_H EQU 102 +PS0 EQU 0 +PS1 EQU 1 +PS2 EQU 2 +PSA EQU 3 +PSET_KS0108 EQU 1673 +PSPIE EQU 7 +PSPIF EQU 7 +PSPMODE EQU 4 +R EQU 2 +RA0 EQU 0 +RA1 EQU 1 +RA2 EQU 2 +RA3 EQU 3 +RA4 EQU 4 +RA5 EQU 5 +RB0 EQU 0 +RB1 EQU 1 +RB2 EQU 2 +RB3 EQU 3 +RB4 EQU 4 +RB5 EQU 5 +RB6 EQU 6 +RB7 EQU 7 +RBIE EQU 3 +RBIF EQU 0 +RC0 EQU 0 +RC1 EQU 1 +RC2 EQU 2 +RC3 EQU 3 +RC4 EQU 4 +RC5 EQU 5 +RC6 EQU 6 +RC7 EQU 7 +RC8_9 EQU 6 +RC9 EQU 6 +RCD8 EQU 0 +RCEN EQU 3 +RCIE EQU 5 +RCIF EQU 5 +RCREG EQU 26 +RCSTA EQU 24 +RD EQU 0 +RD0 EQU 0 +RD1 EQU 1 +RD2 EQU 2 +RD3 EQU 3 +RD4 EQU 4 +RD5 EQU 5 +RD6 EQU 6 +RD7 EQU 7 +RE0 EQU 0 +RE1 EQU 1 +RE2 EQU 2 +READ_WRITE EQU 2 +ROW EQU 103 +RP0 EQU 5 +RP1 EQU 6 +RSEN EQU 1 +RX9 EQU 6 +RX9D EQU 0 +R_NOT_W EQU 2 +R_W EQU 2 +S EQU 3 +SCLT16TRUE EQU 1984 +SCLTINTTRUE EQU 2254 +SEN EQU 0 +SMP EQU 7 +SPBRG EQU 153 +SPEN EQU 7 +SREN EQU 5 +SSPADD EQU 147 +SSPBUF EQU 19 +SSPCON EQU 20 +SSPCON2 EQU 145 +SSPEN EQU 5 +SSPIE EQU 3 +SSPIF EQU 3 +SSPM0 EQU 0 +SSPM1 EQU 1 +SSPM2 EQU 2 +SSPM3 EQU 3 +SSPOV EQU 6 +SSPSTAT EQU 148 +START EQU 11 +STATUS EQU 3 +STR EQU 447 +STRINGPOINTER EQU 104 +STRINGTABLE1 EQU 2391 +STRINGTABLE2 EQU 2397 +SYNC EQU 4 +SYSBITVAR0 EQU 105 +SYSBYTETEMPA EQU 117 +SYSBYTETEMPB EQU 121 +SYSBYTETEMPX EQU 112 +SYSCALCTEMPA EQU 117 +SYSCALCTEMPX EQU 112 +SYSCALCTEMPX_H EQU 113 +SYSCHARCOUNT EQU 106 +SYSCOMPEQUAL16 EQU 2196 +SYSCOMPLESSTHAN EQU 2207 +SYSCOMPLESSTHAN16 EQU 1971 +SYSCOMPLESSTHANINT EQU 2214 +SYSDIV16START EQU 2014 +SYSDIV8START EQU 2262 +SYSDIVLOOP EQU 116 +SYSDIVMULTA EQU 119 +SYSDIVMULTA_H EQU 120 +SYSDIVMULTB EQU 123 +SYSDIVMULTB_H EQU 124 +SYSDIVMULTX EQU 114 +SYSDIVMULTX_H EQU 115 +SYSDIVSUB EQU 2256 +SYSDIVSUB16 EQU 1986 +SYSDOLOOP_E1 EQU 1573 +SYSDOLOOP_E2 EQU 1663 +SYSDOLOOP_S1 EQU 1501 +SYSDOLOOP_S2 EQU 1591 +SYSFORLOOP1 EQU 88 +SYSFORLOOP10 EQU 2075 +SYSFORLOOP11 EQU 2078 +SYSFORLOOP12 EQU 2090 +SYSFORLOOP2 EQU 152 +SYSFORLOOP3 EQU 1176 +SYSFORLOOP4 EQU 1021 +SYSFORLOOP5 EQU 1068 +SYSFORLOOP6 EQU 1075 +SYSFORLOOP7 EQU 1083 +SYSFORLOOP8 EQU 241 +SYSFORLOOP9 EQU 292 +SYSFORLOOPEND1 EQU 132 +SYSFORLOOPEND10 EQU 2121 +SYSFORLOOPEND11 EQU 2115 +SYSFORLOOPEND12 EQU 2111 +SYSFORLOOPEND2 EQU 169 +SYSFORLOOPEND3 EQU 1217 +SYSFORLOOPEND4 EQU 1151 +SYSFORLOOPEND5 EQU 1141 +SYSFORLOOPEND6 EQU 1130 +SYSFORLOOPEND7 EQU 1126 +SYSFORLOOPEND8 EQU 273 +SYSFORLOOPEND9 EQU 324 +SYSINTEGERTEMPA EQU 117 +SYSINTEGERTEMPA_H EQU 118 +SYSINTEGERTEMPB EQU 121 +SYSINTEGERTEMPB_H EQU 122 +SYSINTEGERTEMPX EQU 112 +SYSINTEGERTEMPX_H EQU 113 +SYSLCDPRINTDATAHANDLER EQU 107 +SYSLCDPRINTDATAHANDLER_H EQU 108 +SYSMULTSUB EQU 2276 +SYSMULTSUB16 EQU 2288 +SYSMULTSUBINT EQU 2330 +SYSPRINTTEMP EQU 109 +SYSREADSTRING EQU 2356 +SYSREADSTRINGPART EQU 2366 +SYSREPEATLOOP1 EQU 1736 +SYSREPEATLOOPEND1 EQU 1739 +SYSREPEATTEMP1 EQU 110 +SYSSELECT1CASE1 EQU 1022 +SYSSELECT1CASE2 EQU 1030 +SYSSELECT1CASE3 EQU 1039 +SYSSELECT1CASE4 EQU 1048 +SYSSELECT1CASE5 EQU 1057 +SYSSELECT1CASE6 EQU 1065 +SYSSELECTEND1 EQU 1065 +SYSSIGNBYTE EQU 125 +SYSSTRDATA EQU 111 +SYSSTRINGA EQU 119 +SYSSTRINGA_H EQU 120 +SYSSTRINGB EQU 114 +SYSSTRINGB_H EQU 115 +SYSSTRINGLENGTH EQU 118 +SYSSTRINGPARAM1 EQU 453 +SYSSTRINGREAD EQU 2378 +SYSSTRINGREADCHECK EQU 2375 +SYSSTRINGTABLES EQU 2384 +SYSSTR_0 EQU 447 +SYSTEMP1 EQU 126 +SYSTEMP1_H EQU 127 +SYSTEMP2 EQU 160 +SYSVALHUNDREDS EQU 1872 +SYSVALTEMP EQU 161 +SYSVALTEMP_H EQU 162 +SYSVALTENS EQU 1918 +SYSVALTHOUSANDS EQU 1825 +SYSWAITLOOP1 EQU 1227 +SYSWAITTEMPMS EQU 114 +SYSWAITTEMPMS_H EQU 115 +SYSWAITTEMPS EQU 116 +SYSWAITTEMPUS EQU 117 +SYSWAITTEMPUS_H EQU 118 +SYSWORDTEMPA EQU 117 +SYSWORDTEMPA_H EQU 118 +SYSWORDTEMPB EQU 121 +SYSWORDTEMPB_H EQU 122 +SYSWORDTEMPX EQU 112 +SYSWORDTEMPX_H EQU 113 +T0CS EQU 5 +T0IE EQU 5 +T0IF EQU 2 +T0SE EQU 4 +T1CKPS0 EQU 4 +T1CKPS1 EQU 5 +T1CON EQU 16 +T1INSYNC EQU 2 +T1OSCEN EQU 3 +T1SYNC EQU 2 +T2CKPS0 EQU 0 +T2CKPS1 EQU 1 +T2CON EQU 18 +TABLEGLCDCHARCOL3 EQU 338 +TABLEGLCDCHARCOL4 EQU 464 +TABLEGLCDCHARCOL5 EQU 590 +TABLEGLCDCHARCOL6 EQU 716 +TABLEGLCDCHARCOL7 EQU 842 +TMR0 EQU 1 +TMR0IE EQU 5 +TMR0IF EQU 2 +TMR1 EQU 14 +TMR1CS EQU 1 +TMR1H EQU 15 +TMR1IE EQU 0 +TMR1IF EQU 0 +TMR1L EQU 14 +TMR1ON EQU 0 +TMR2 EQU 17 +TMR2IE EQU 1 +TMR2IF EQU 1 +TMR2ON EQU 2 +TOUTPS0 EQU 3 +TOUTPS1 EQU 4 +TOUTPS2 EQU 5 +TOUTPS3 EQU 6 +TRISA EQU 133 +TRISA0 EQU 0 +TRISA1 EQU 1 +TRISA2 EQU 2 +TRISA3 EQU 3 +TRISA4 EQU 4 +TRISA5 EQU 5 +TRISB EQU 134 +TRISB0 EQU 0 +TRISB1 EQU 1 +TRISB2 EQU 2 +TRISB3 EQU 3 +TRISB4 EQU 4 +TRISB5 EQU 5 +TRISB6 EQU 6 +TRISB7 EQU 7 +TRISC EQU 135 +TRISC0 EQU 0 +TRISC1 EQU 1 +TRISC2 EQU 2 +TRISC3 EQU 3 +TRISC4 EQU 4 +TRISC5 EQU 5 +TRISC6 EQU 6 +TRISC7 EQU 7 +TRISD EQU 136 +TRISD0 EQU 0 +TRISD1 EQU 1 +TRISD2 EQU 2 +TRISD3 EQU 3 +TRISD4 EQU 4 +TRISD5 EQU 5 +TRISD6 EQU 6 +TRISD7 EQU 7 +TRISE EQU 137 +TRISE0 EQU 0 +TRISE1 EQU 1 +TRISE2 EQU 2 +TRMT EQU 1 +TX8_9 EQU 6 +TX9 EQU 6 +TX9D EQU 0 +TXD8 EQU 0 +TXEN EQU 5 +TXIE EQU 4 +TXIF EQU 4 +TXREG EQU 25 +TXSTA EQU 152 +UA EQU 1 +W EQU 0 +WCOL EQU 7 +WR EQU 1 +WREN EQU 2 +WRERR EQU 3 +XVAR EQU 163 +Z EQU 2 + +Code: +Loc Obj Code Original Assembly + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +000000 118A PAGESEL BASPROGRAMSTART +000000 118A 120A PAGESEL BASPROGRAMSTART +000002 2805 GOTO BASPROGRAMSTART + +000004 0009 RETFIE + + + + BASPROGRAMSTART +000000 158A PAGESEL INITSYS +000000 158A 120A PAGESEL INITSYS +000007 207E CALL INITSYS +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +00000A 2506 CALL INITGLCD_KS0108 + + START +000000 158A PAGESEL GLCDCLS_KS0108 +000000 158A 120A PAGESEL GLCDCLS_KS0108 +00000D 2016 CALL GLCDCLS_KS0108 +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ + +000010 01E3 CLRF PRINTLOCX +000011 01E4 CLRF PRINTLOCX_H +000012 300A MOVLW 10 +000013 00E5 MOVWF PRINTLOCY +000014 01E6 CLRF PRINTLOCY_H +000015 30C5 MOVLW LOW SYSSTRINGPARAM1 +000016 00F2 MOVWF SYSSTRINGB +000017 3001 MOVLW HIGH SYSSTRINGPARAM1 +000018 00F3 MOVWF SYSSTRINGB_H +000019 3057 MOVLW LOW STRINGTABLE1 +00001A 00F7 MOVWF SYSSTRINGA +00001B 3009 MOVLW HIGH STRINGTABLE1 +00001C 00F8 MOVWF SYSSTRINGA_H +000000 158A PAGESEL SYSREADSTRING +000000 158A 120A PAGESEL SYSREADSTRING +00001F 2134 CALL SYSREADSTRING +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +000022 30C5 MOVLW LOW SYSSTRINGPARAM1 +000023 00EB MOVWF SYSLCDPRINTDATAHANDLER +000024 3001 MOVLW HIGH SYSSTRINGPARAM1 +000025 00EC MOVWF SYSLCDPRINTDATAHANDLER_H +000026 2485 CALL GLCDPRINT3 + +000027 3001 MOVLW 1 +000028 00F4 MOVWF SYSWAITTEMPS +000000 158A PAGESEL DELAY_S +000000 158A 120A PAGESEL DELAY_S +00002B 200E CALL DELAY_S +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +00002E 01E3 CLRF PRINTLOCX +00002F 01E4 CLRF PRINTLOCX_H +000030 300A MOVLW 10 +000031 00E5 MOVWF PRINTLOCY +000032 01E6 CLRF PRINTLOCY_H +000033 30C5 MOVLW LOW SYSSTRINGPARAM1 +000034 00F2 MOVWF SYSSTRINGB +000035 3001 MOVLW HIGH SYSSTRINGPARAM1 +000036 00F3 MOVWF SYSSTRINGB_H +000037 305D MOVLW LOW STRINGTABLE2 +000038 00F7 MOVWF SYSSTRINGA +000039 3009 MOVLW HIGH STRINGTABLE2 +00003A 00F8 MOVWF SYSSTRINGA_H +000000 158A PAGESEL SYSREADSTRING +000000 158A 120A PAGESEL SYSREADSTRING +00003D 2134 CALL SYSREADSTRING +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +000040 30C5 MOVLW LOW SYSSTRINGPARAM1 +000041 00EB MOVWF SYSLCDPRINTDATAHANDLER +000042 3001 MOVLW HIGH SYSSTRINGPARAM1 +000043 00EC MOVWF SYSLCDPRINTDATAHANDLER_H +000044 2485 CALL GLCDPRINT3 + +000045 3012 MOVLW 18 +000046 00DA MOVWF LINEX1 +000047 01DB CLRF LINEX1_H +000048 301E MOVLW 30 +000049 00DE MOVWF LINEY1 +00004A 01DF CLRF LINEY1_H +00004B 301C MOVLW 28 +00004C 00DC MOVWF LINEX2 +00004D 01DD CLRF LINEX2_H +00004E 3028 MOVLW 40 +00004F 00E0 MOVWF LINEY2 +000050 01E1 CLRF LINEY2_H +000051 083E MOVF GLCDFOREGROUND,W +000052 00CA MOVWF LINECOLOUR +000053 083F MOVF GLCDFOREGROUND_H,W +000054 00CB MOVWF LINECOLOUR_H +000055 20B6 CALL BOX + +000056 300E MOVLW 14 +000057 00A0 MOVWF CHAR + SYSFORLOOP1 +000058 0AA0 INCF CHAR,F +000059 3011 MOVLW 17 +00005A 00E3 MOVWF PRINTLOCX +00005B 01E4 CLRF PRINTLOCX_H +00005C 3014 MOVLW 20 +00005D 00E5 MOVWF PRINTLOCY +00005E 01E6 CLRF PRINTLOCY_H +00005F 0820 MOVF CHAR,W +000000 1683 BANKSEL SYSVALTEMP +000000 1683 1303 BANKSEL SYSVALTEMP +000062 00A1 MOVWF SYSVALTEMP +000063 01A2 CLRF SYSVALTEMP_H +000000 1283 BANKSEL STATUS +000000 1283 1303 BANKSEL STATUS +000066 26E0 CALL FN_STR +000067 30BF MOVLW LOW STR +000068 00EB MOVWF SYSLCDPRINTDATAHANDLER +000069 3001 MOVLW HIGH STR +00006A 00EC MOVWF SYSLCDPRINTDATAHANDLER_H +00006B 2485 CALL GLCDPRINT3 + +00006C 3014 MOVLW 20 +00006D 00A5 MOVWF CHARLOCX +00006E 01A6 CLRF CHARLOCX_H +00006F 301E MOVLW 30 +000070 00A7 MOVWF CHARLOCY +000071 01A8 CLRF CHARLOCY_H +000072 0820 MOVF CHAR,W +000073 00A1 MOVWF CHARCODE +000074 083E MOVF GLCDFOREGROUND,W +000075 00CA MOVWF LINECOLOUR +000076 083F MOVF GLCDFOREGROUND_H,W +000077 00CB MOVWF LINECOLOUR_H +000078 23BB CALL GLCDDRAWCHAR + +000079 3001 MOVLW 1 +00007A 00F4 MOVWF SYSWAITTEMPS +000000 158A PAGESEL DELAY_S +000000 158A 120A PAGESEL DELAY_S +00007D 200E CALL DELAY_S +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +000080 3081 MOVLW 129 +000081 0220 SUBWF CHAR,W +000082 1C03 BTFSS STATUS, C +000083 2858 GOTO SYSFORLOOP1 + SYSFORLOOPEND1 +000084 01DA CLRF LINEX1 +000085 01DB CLRF LINEX1_H +000086 3032 MOVLW 50 +000087 00DE MOVWF LINEY1 +000088 01DF CLRF LINEY1_H +000089 307F MOVLW 127 +00008A 00DC MOVWF LINEX2 +00008B 01DD CLRF LINEX2_H +00008C 3032 MOVLW 50 +00008D 00E0 MOVWF LINEY2 +00008E 01E1 CLRF LINEY2_H +00008F 083E MOVF GLCDFOREGROUND,W +000090 00CA MOVWF LINECOLOUR +000091 083F MOVF GLCDFOREGROUND_H,W +000092 00CB MOVWF LINECOLOUR_H +000093 253D CALL LINE + +000094 30FF MOVLW 255 +000000 1683 BANKSEL XVAR +000000 1683 1303 BANKSEL XVAR +000097 00A3 MOVWF XVAR + SYSFORLOOP2 +000098 0AA3 INCF XVAR,F +000099 0823 MOVF XVAR,W +000000 1283 BANKSEL GLCDX +000000 1283 1303 BANKSEL GLCDX +00009C 00C4 MOVWF GLCDX +00009D 303F MOVLW 63 +00009E 00C5 MOVWF GLCDY +00009F 3001 MOVLW 1 +0000A0 00B8 MOVWF GLCDCOLOUR +0000A1 01B9 CLRF GLCDCOLOUR_H +0000A2 2689 CALL PSET_KS0108 + +0000A3 3050 MOVLW 80 +000000 1683 BANKSEL XVAR +000000 1683 1303 BANKSEL XVAR +0000A6 0223 SUBWF XVAR,W +0000A7 1C03 BTFSS STATUS, C +0000A8 2898 GOTO SYSFORLOOP2 + SYSFORLOOPEND2 +0000A9 300A MOVLW 10 +0000AA 00F4 MOVWF SYSWAITTEMPS +000000 1283 BANKSEL STATUS +000000 1283 1303 BANKSEL STATUS +000000 158A PAGESEL DELAY_S +000000 158A 120A PAGESEL DELAY_S +0000AF 200E CALL DELAY_S +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +0000B2 280B GOTO START +0000B3 28B4 GOTO BASPROGRAMEND + BASPROGRAMEND +0000B4 0063 SLEEP +0000B5 28B4 GOTO BASPROGRAMEND + + + BOX +0000B6 085A MOVF LINEX1,W +0000B7 00F9 MOVWF SYSWORDTEMPB +0000B8 085B MOVF LINEX1_H,W +0000B9 00FA MOVWF SYSWORDTEMPB_H +0000BA 085C MOVF LINEX2,W +0000BB 00F5 MOVWF SYSWORDTEMPA +0000BC 085D MOVF LINEX2_H,W +0000BD 00F6 MOVWF SYSWORDTEMPA_H +0000BE 27B3 CALL SYSCOMPLESSTHAN16 +0000BF 1C70 BTFSS SYSBYTETEMPX,0 +0000C0 28CA GOTO ENDIF15 +0000C1 085A MOVF LINEX1,W +0000C2 00C3 MOVWF GLCDTEMP +0000C3 085C MOVF LINEX2,W +0000C4 00DA MOVWF LINEX1 +0000C5 085D MOVF LINEX2_H,W +0000C6 00DB MOVWF LINEX1_H +0000C7 0843 MOVF GLCDTEMP,W +0000C8 00DC MOVWF LINEX2 +0000C9 01DD CLRF LINEX2_H + ENDIF15 +0000CA 085E MOVF LINEY1,W +0000CB 00F9 MOVWF SYSWORDTEMPB +0000CC 085F MOVF LINEY1_H,W +0000CD 00FA MOVWF SYSWORDTEMPB_H +0000CE 0860 MOVF LINEY2,W +0000CF 00F5 MOVWF SYSWORDTEMPA +0000D0 0861 MOVF LINEY2_H,W +0000D1 00F6 MOVWF SYSWORDTEMPA_H +0000D2 27B3 CALL SYSCOMPLESSTHAN16 +0000D3 1C70 BTFSS SYSBYTETEMPX,0 +0000D4 28DE GOTO ENDIF16 +0000D5 085E MOVF LINEY1,W +0000D6 00C3 MOVWF GLCDTEMP +0000D7 0860 MOVF LINEY2,W +0000D8 00DE MOVWF LINEY1 +0000D9 0861 MOVF LINEY2_H,W +0000DA 00DF MOVWF LINEY1_H +0000DB 0843 MOVF GLCDTEMP,W +0000DC 00E0 MOVWF LINEY2 +0000DD 01E1 CLRF LINEY2_H + ENDIF16 +0000DE 3001 MOVLW 1 +0000DF 025A SUBWF LINEX1,W +0000E0 00B2 MOVWF DRAWLINE +0000E1 3000 MOVLW 0 +0000E2 1C03 BTFSS STATUS,C +0000E3 3E01 ADDLW 1 +0000E4 025B SUBWF LINEX1_H,W +0000E5 00B3 MOVWF DRAWLINE_H +0000E6 085A MOVF LINEX1,W +0000E7 00F9 MOVWF SYSWORDTEMPB +0000E8 085B MOVF LINEX1_H,W +0000E9 00FA MOVWF SYSWORDTEMPB_H +0000EA 085C MOVF LINEX2,W +0000EB 00F5 MOVWF SYSWORDTEMPA +0000EC 085D MOVF LINEX2_H,W +0000ED 00F6 MOVWF SYSWORDTEMPA_H +0000EE 27B3 CALL SYSCOMPLESSTHAN16 +0000EF 1870 BTFSC SYSBYTETEMPX,0 +0000F0 2911 GOTO SYSFORLOOPEND8 + SYSFORLOOP8 +0000F1 0AB2 INCF DRAWLINE,F +0000F2 1903 BTFSC STATUS,Z +0000F3 0AB3 INCF DRAWLINE_H,F +0000F4 0832 MOVF DRAWLINE,W +0000F5 00C4 MOVWF GLCDX +0000F6 085E MOVF LINEY1,W +0000F7 00C5 MOVWF GLCDY +0000F8 084A MOVF LINECOLOUR,W +0000F9 00B8 MOVWF GLCDCOLOUR +0000FA 084B MOVF LINECOLOUR_H,W +0000FB 00B9 MOVWF GLCDCOLOUR_H +0000FC 2689 CALL PSET_KS0108 + +0000FD 0832 MOVF DRAWLINE,W +0000FE 00C4 MOVWF GLCDX +0000FF 0860 MOVF LINEY2,W +000100 00C5 MOVWF GLCDY +000101 084A MOVF LINECOLOUR,W +000102 00B8 MOVWF GLCDCOLOUR +000103 084B MOVF LINECOLOUR_H,W +000104 00B9 MOVWF GLCDCOLOUR_H +000105 2689 CALL PSET_KS0108 + +000106 0832 MOVF DRAWLINE,W +000107 00F5 MOVWF SYSWORDTEMPA +000108 0833 MOVF DRAWLINE_H,W +000109 00F6 MOVWF SYSWORDTEMPA_H +00010A 085C MOVF LINEX2,W +00010B 00F9 MOVWF SYSWORDTEMPB +00010C 085D MOVF LINEX2_H,W +00010D 00FA MOVWF SYSWORDTEMPB_H +00010E 27B3 CALL SYSCOMPLESSTHAN16 +00010F 1870 BTFSC SYSBYTETEMPX,0 +000110 28F1 GOTO SYSFORLOOP8 + SYSFORLOOPEND8 +000111 3001 MOVLW 1 +000112 025E SUBWF LINEY1,W +000113 00B2 MOVWF DRAWLINE +000114 3000 MOVLW 0 +000115 1C03 BTFSS STATUS,C +000116 3E01 ADDLW 1 +000117 025F SUBWF LINEY1_H,W +000118 00B3 MOVWF DRAWLINE_H +000119 085E MOVF LINEY1,W +00011A 00F9 MOVWF SYSWORDTEMPB +00011B 085F MOVF LINEY1_H,W +00011C 00FA MOVWF SYSWORDTEMPB_H +00011D 0860 MOVF LINEY2,W +00011E 00F5 MOVWF SYSWORDTEMPA +00011F 0861 MOVF LINEY2_H,W +000120 00F6 MOVWF SYSWORDTEMPA_H +000121 27B3 CALL SYSCOMPLESSTHAN16 +000122 1870 BTFSC SYSBYTETEMPX,0 +000123 2944 GOTO SYSFORLOOPEND9 + SYSFORLOOP9 +000124 0AB2 INCF DRAWLINE,F +000125 1903 BTFSC STATUS,Z +000126 0AB3 INCF DRAWLINE_H,F +000127 085A MOVF LINEX1,W +000128 00C4 MOVWF GLCDX +000129 0832 MOVF DRAWLINE,W +00012A 00C5 MOVWF GLCDY +00012B 084A MOVF LINECOLOUR,W +00012C 00B8 MOVWF GLCDCOLOUR +00012D 084B MOVF LINECOLOUR_H,W +00012E 00B9 MOVWF GLCDCOLOUR_H +00012F 2689 CALL PSET_KS0108 + +000130 085C MOVF LINEX2,W +000131 00C4 MOVWF GLCDX +000132 0832 MOVF DRAWLINE,W +000133 00C5 MOVWF GLCDY +000134 084A MOVF LINECOLOUR,W +000135 00B8 MOVWF GLCDCOLOUR +000136 084B MOVF LINECOLOUR_H,W +000137 00B9 MOVWF GLCDCOLOUR_H +000138 2689 CALL PSET_KS0108 + +000139 0832 MOVF DRAWLINE,W +00013A 00F5 MOVWF SYSWORDTEMPA +00013B 0833 MOVF DRAWLINE_H,W +00013C 00F6 MOVWF SYSWORDTEMPA_H +00013D 0860 MOVF LINEY2,W +00013E 00F9 MOVWF SYSWORDTEMPB +00013F 0861 MOVF LINEY2_H,W +000140 00FA MOVWF SYSWORDTEMPB_H +000141 27B3 CALL SYSCOMPLESSTHAN16 +000142 1870 BTFSC SYSBYTETEMPX,0 +000143 2924 GOTO SYSFORLOOP9 + SYSFORLOOPEND9 +000144 0008 RETURN + + + GLCDCHARCOL3 +000145 3071 MOVLW 113 +000146 0277 SUBWF SYSSTRINGA, W +000147 1803 BTFSC STATUS, C +000148 3400 RETLW 0 +000149 0877 MOVF SYSSTRINGA, W +00014A 3E52 ADDLW LOW TABLEGLCDCHARCOL3 +00014B 00F7 MOVWF SYSSTRINGA +00014C 3001 MOVLW HIGH TABLEGLCDCHARCOL3 +00014D 1803 BTFSC STATUS, C +00014E 3E01 ADDLW 1 +00014F 008A MOVWF PCLATH +000150 0877 MOVF SYSSTRINGA, W +000151 0082 MOVWF PCL + TABLEGLCDCHARCOL3 +000152 3470 RETLW 112 +000153 3400 RETLW 0 +000154 3410 RETLW 16 +000155 340C RETLW 12 +000156 340A RETLW 10 +000157 3488 RETLW 136 +000158 3422 RETLW 34 +000159 3438 RETLW 56 +00015A 3420 RETLW 32 +00015B 3408 RETLW 8 +00015C 3420 RETLW 32 +00015D 3410 RETLW 16 +00015E 3410 RETLW 16 +00015F 3480 RETLW 128 +000160 3480 RETLW 128 +000161 3440 RETLW 64 +000162 3404 RETLW 4 +000163 3400 RETLW 0 +000164 3400 RETLW 0 +000165 3400 RETLW 0 +000166 3428 RETLW 40 +000167 3448 RETLW 72 +000168 3446 RETLW 70 +000169 346C RETLW 108 +00016A 3400 RETLW 0 +00016B 3400 RETLW 0 +00016C 3400 RETLW 0 +00016D 3428 RETLW 40 +00016E 3410 RETLW 16 +00016F 3400 RETLW 0 +000170 3410 RETLW 16 +000171 3400 RETLW 0 +000172 3440 RETLW 64 +000173 347C RETLW 124 +000174 3400 RETLW 0 +000175 3484 RETLW 132 +000176 3482 RETLW 130 +000177 3430 RETLW 48 +000178 344E RETLW 78 +000179 3478 RETLW 120 +00017A 3406 RETLW 6 +00017B 346C RETLW 108 +00017C 340C RETLW 12 +00017D 3400 RETLW 0 +00017E 3400 RETLW 0 +00017F 3410 RETLW 16 +000180 3428 RETLW 40 +000181 3400 RETLW 0 +000182 3404 RETLW 4 +000183 3464 RETLW 100 +000184 34F8 RETLW 248 +000185 34FE RETLW 254 +000186 347C RETLW 124 +000187 34FE RETLW 254 +000188 34FE RETLW 254 +000189 34FE RETLW 254 +00018A 347C RETLW 124 +00018B 34FE RETLW 254 +00018C 3400 RETLW 0 +00018D 3440 RETLW 64 +00018E 34FE RETLW 254 +00018F 34FE RETLW 254 +000190 34FE RETLW 254 +000191 34FE RETLW 254 +000192 347C RETLW 124 +000193 34FE RETLW 254 +000194 347C RETLW 124 +000195 34FE RETLW 254 +000196 344C RETLW 76 +000197 3402 RETLW 2 +000198 347E RETLW 126 +000199 343E RETLW 62 +00019A 347E RETLW 126 +00019B 34C6 RETLW 198 +00019C 340E RETLW 14 +00019D 34C2 RETLW 194 +00019E 3400 RETLW 0 +00019F 3404 RETLW 4 +0001A0 3400 RETLW 0 +0001A1 3408 RETLW 8 +0001A2 3480 RETLW 128 +0001A3 3400 RETLW 0 +0001A4 3440 RETLW 64 +0001A5 34FE RETLW 254 +0001A6 3470 RETLW 112 +0001A7 3470 RETLW 112 +0001A8 3470 RETLW 112 +0001A9 3410 RETLW 16 +0001AA 3410 RETLW 16 +0001AB 34FE RETLW 254 +0001AC 3400 RETLW 0 +0001AD 3440 RETLW 64 +0001AE 34FE RETLW 254 +0001AF 3400 RETLW 0 +0001B0 34F8 RETLW 248 +0001B1 34F8 RETLW 248 +0001B2 3470 RETLW 112 +0001B3 34F8 RETLW 248 +0001B4 3410 RETLW 16 +0001B5 34F8 RETLW 248 +0001B6 3490 RETLW 144 +0001B7 3410 RETLW 16 +0001B8 3478 RETLW 120 +0001B9 3438 RETLW 56 +0001BA 3478 RETLW 120 +0001BB 3488 RETLW 136 +0001BC 3418 RETLW 24 +0001BD 3488 RETLW 136 +0001BE 3400 RETLW 0 +0001BF 3400 RETLW 0 +0001C0 3400 RETLW 0 +0001C1 3420 RETLW 32 +0001C2 3478 RETLW 120 + + + GLCDCHARCOL4 +0001C3 3071 MOVLW 113 +0001C4 0277 SUBWF SYSSTRINGA, W +0001C5 1803 BTFSC STATUS, C +0001C6 3400 RETLW 0 +0001C7 0877 MOVF SYSSTRINGA, W +0001C8 3ED0 ADDLW LOW TABLEGLCDCHARCOL4 +0001C9 00F7 MOVWF SYSSTRINGA +0001CA 3001 MOVLW HIGH TABLEGLCDCHARCOL4 +0001CB 1803 BTFSC STATUS, C +0001CC 3E01 ADDLW 1 +0001CD 008A MOVWF PCLATH +0001CE 0877 MOVF SYSSTRINGA, W +0001CF 0082 MOVWF PCL + TABLEGLCDCHARCOL4 +0001D0 3470 RETLW 112 +0001D1 34FE RETLW 254 +0001D2 3438 RETLW 56 +0001D3 340A RETLW 10 +0001D4 3406 RETLW 6 +0001D5 34CC RETLW 204 +0001D6 3466 RETLW 102 +0001D7 347C RETLW 124 +0001D8 3470 RETLW 112 +0001D9 3404 RETLW 4 +0001DA 3440 RETLW 64 +0001DB 3410 RETLW 16 +0001DC 3438 RETLW 56 +0001DD 3488 RETLW 136 +0001DE 34A2 RETLW 162 +0001DF 3470 RETLW 112 +0001E0 341C RETLW 28 +0001E1 3400 RETLW 0 +0001E2 3400 RETLW 0 +0001E3 340E RETLW 14 +0001E4 34FE RETLW 254 +0001E5 3454 RETLW 84 +0001E6 3426 RETLW 38 +0001E7 3492 RETLW 146 +0001E8 340A RETLW 10 +0001E9 3438 RETLW 56 +0001EA 3482 RETLW 130 +0001EB 3410 RETLW 16 +0001EC 3410 RETLW 16 +0001ED 34A0 RETLW 160 +0001EE 3410 RETLW 16 +0001EF 34C0 RETLW 192 +0001F0 3420 RETLW 32 +0001F1 34A2 RETLW 162 +0001F2 3484 RETLW 132 +0001F3 34C2 RETLW 194 +0001F4 3482 RETLW 130 +0001F5 3428 RETLW 40 +0001F6 348A RETLW 138 +0001F7 3494 RETLW 148 +0001F8 3402 RETLW 2 +0001F9 3492 RETLW 146 +0001FA 3492 RETLW 146 +0001FB 346C RETLW 108 +0001FC 34AC RETLW 172 +0001FD 3428 RETLW 40 +0001FE 3428 RETLW 40 +0001FF 3482 RETLW 130 +000200 3402 RETLW 2 +000201 3492 RETLW 146 +000202 3424 RETLW 36 +000203 3492 RETLW 146 +000204 3482 RETLW 130 +000205 3482 RETLW 130 +000206 3492 RETLW 146 +000207 3412 RETLW 18 +000208 3482 RETLW 130 +000209 3410 RETLW 16 +00020A 3482 RETLW 130 +00020B 3480 RETLW 128 +00020C 3410 RETLW 16 +00020D 3480 RETLW 128 +00020E 3404 RETLW 4 +00020F 3408 RETLW 8 +000210 3482 RETLW 130 +000211 3412 RETLW 18 +000212 3482 RETLW 130 +000213 3412 RETLW 18 +000214 3492 RETLW 146 +000215 3402 RETLW 2 +000216 3480 RETLW 128 +000217 3440 RETLW 64 +000218 3480 RETLW 128 +000219 3428 RETLW 40 +00021A 3410 RETLW 16 +00021B 34A2 RETLW 162 +00021C 34FE RETLW 254 +00021D 3408 RETLW 8 +00021E 3482 RETLW 130 +00021F 3404 RETLW 4 +000220 3480 RETLW 128 +000221 3402 RETLW 2 +000222 34A8 RETLW 168 +000223 3490 RETLW 144 +000224 3488 RETLW 136 +000225 3488 RETLW 136 +000226 34A8 RETLW 168 +000227 34FC RETLW 252 +000228 34A8 RETLW 168 +000229 3410 RETLW 16 +00022A 3490 RETLW 144 +00022B 3480 RETLW 128 +00022C 3420 RETLW 32 +00022D 3482 RETLW 130 +00022E 3408 RETLW 8 +00022F 3410 RETLW 16 +000230 3488 RETLW 136 +000231 3428 RETLW 40 +000232 3428 RETLW 40 +000233 3410 RETLW 16 +000234 34A8 RETLW 168 +000235 347C RETLW 124 +000236 3480 RETLW 128 +000237 3440 RETLW 64 +000238 3480 RETLW 128 +000239 3450 RETLW 80 +00023A 34A0 RETLW 160 +00023B 34C8 RETLW 200 +00023C 3410 RETLW 16 +00023D 3400 RETLW 0 +00023E 3482 RETLW 130 +00023F 3410 RETLW 16 +000240 3444 RETLW 68 + + + GLCDCHARCOL5 +000241 3071 MOVLW 113 +000242 0277 SUBWF SYSSTRINGA, W +000243 1803 BTFSC STATUS, C +000244 3400 RETLW 0 +000245 0877 MOVF SYSSTRINGA, W +000246 3E4E ADDLW LOW TABLEGLCDCHARCOL5 +000247 00F7 MOVWF SYSSTRINGA +000248 3002 MOVLW HIGH TABLEGLCDCHARCOL5 +000249 1803 BTFSC STATUS, C +00024A 3E01 ADDLW 1 +00024B 008A MOVWF PCLATH +00024C 0877 MOVF SYSSTRINGA, W +00024D 0082 MOVWF PCL + TABLEGLCDCHARCOL5 +00024E 3470 RETLW 112 +00024F 347C RETLW 124 +000250 347C RETLW 124 +000251 3400 RETLW 0 +000252 3400 RETLW 0 +000253 34EE RETLW 238 +000254 34EE RETLW 238 +000255 347C RETLW 124 +000256 34A8 RETLW 168 +000257 34FE RETLW 254 +000258 34FE RETLW 254 +000259 3454 RETLW 84 +00025A 3454 RETLW 84 +00025B 3494 RETLW 148 +00025C 3494 RETLW 148 +00025D 347C RETLW 124 +00025E 347C RETLW 124 +00025F 3400 RETLW 0 +000260 349E RETLW 158 +000261 3400 RETLW 0 +000262 3428 RETLW 40 +000263 34FE RETLW 254 +000264 3410 RETLW 16 +000265 34AA RETLW 170 +000266 3406 RETLW 6 +000267 3444 RETLW 68 +000268 3444 RETLW 68 +000269 347C RETLW 124 +00026A 347C RETLW 124 +00026B 3460 RETLW 96 +00026C 3410 RETLW 16 +00026D 34C0 RETLW 192 +00026E 3410 RETLW 16 +00026F 3492 RETLW 146 +000270 34FE RETLW 254 +000271 34A2 RETLW 162 +000272 348A RETLW 138 +000273 3424 RETLW 36 +000274 348A RETLW 138 +000275 3492 RETLW 146 +000276 34E2 RETLW 226 +000277 3492 RETLW 146 +000278 3492 RETLW 146 +000279 346C RETLW 108 +00027A 346C RETLW 108 +00027B 3444 RETLW 68 +00027C 3428 RETLW 40 +00027D 3444 RETLW 68 +00027E 34A2 RETLW 162 +00027F 34F2 RETLW 242 +000280 3422 RETLW 34 +000281 3492 RETLW 146 +000282 3482 RETLW 130 +000283 3482 RETLW 130 +000284 3492 RETLW 146 +000285 3412 RETLW 18 +000286 3492 RETLW 146 +000287 3410 RETLW 16 +000288 34FE RETLW 254 +000289 3482 RETLW 130 +00028A 3428 RETLW 40 +00028B 3480 RETLW 128 +00028C 3418 RETLW 24 +00028D 3410 RETLW 16 +00028E 3482 RETLW 130 +00028F 3412 RETLW 18 +000290 34A2 RETLW 162 +000291 3432 RETLW 50 +000292 3492 RETLW 146 +000293 34FE RETLW 254 +000294 3480 RETLW 128 +000295 3480 RETLW 128 +000296 3470 RETLW 112 +000297 3410 RETLW 16 +000298 34E0 RETLW 224 +000299 3492 RETLW 146 +00029A 3482 RETLW 130 +00029B 3410 RETLW 16 +00029C 3482 RETLW 130 +00029D 3402 RETLW 2 +00029E 3480 RETLW 128 +00029F 3404 RETLW 4 +0002A0 34A8 RETLW 168 +0002A1 3488 RETLW 136 +0002A2 3488 RETLW 136 +0002A3 3488 RETLW 136 +0002A4 34A8 RETLW 168 +0002A5 3412 RETLW 18 +0002A6 34A8 RETLW 168 +0002A7 3408 RETLW 8 +0002A8 34FA RETLW 250 +0002A9 3488 RETLW 136 +0002AA 3450 RETLW 80 +0002AB 34FE RETLW 254 +0002AC 34F0 RETLW 240 +0002AD 3408 RETLW 8 +0002AE 3488 RETLW 136 +0002AF 3428 RETLW 40 +0002B0 3428 RETLW 40 +0002B1 3408 RETLW 8 +0002B2 34A8 RETLW 168 +0002B3 3490 RETLW 144 +0002B4 3480 RETLW 128 +0002B5 3480 RETLW 128 +0002B6 3460 RETLW 96 +0002B7 3420 RETLW 32 +0002B8 34A0 RETLW 160 +0002B9 34A8 RETLW 168 +0002BA 346C RETLW 108 +0002BB 34FE RETLW 254 +0002BC 346C RETLW 108 +0002BD 3410 RETLW 16 +0002BE 3442 RETLW 66 + + + GLCDCHARCOL6 +0002BF 3071 MOVLW 113 +0002C0 0277 SUBWF SYSSTRINGA, W +0002C1 1803 BTFSC STATUS, C +0002C2 3400 RETLW 0 +0002C3 0877 MOVF SYSSTRINGA, W +0002C4 3ECC ADDLW LOW TABLEGLCDCHARCOL6 +0002C5 00F7 MOVWF SYSSTRINGA +0002C6 3002 MOVLW HIGH TABLEGLCDCHARCOL6 +0002C7 1803 BTFSC STATUS, C +0002C8 3E01 ADDLW 1 +0002C9 008A MOVWF PCLATH +0002CA 0877 MOVF SYSSTRINGA, W +0002CB 0082 MOVWF PCL + TABLEGLCDCHARCOL6 +0002CC 3470 RETLW 112 +0002CD 3438 RETLW 56 +0002CE 34FE RETLW 254 +0002CF 340C RETLW 12 +0002D0 340A RETLW 10 +0002D1 34CC RETLW 204 +0002D2 3466 RETLW 102 +0002D3 347C RETLW 124 +0002D4 3420 RETLW 32 +0002D5 3404 RETLW 4 +0002D6 3440 RETLW 64 +0002D7 3438 RETLW 56 +0002D8 3410 RETLW 16 +0002D9 34A2 RETLW 162 +0002DA 3488 RETLW 136 +0002DB 3470 RETLW 112 +0002DC 341C RETLW 28 +0002DD 3400 RETLW 0 +0002DE 3400 RETLW 0 +0002DF 340E RETLW 14 +0002E0 34FE RETLW 254 +0002E1 3454 RETLW 84 +0002E2 34C8 RETLW 200 +0002E3 3444 RETLW 68 +0002E4 3400 RETLW 0 +0002E5 3482 RETLW 130 +0002E6 3438 RETLW 56 +0002E7 3410 RETLW 16 +0002E8 3410 RETLW 16 +0002E9 3400 RETLW 0 +0002EA 3410 RETLW 16 +0002EB 3400 RETLW 0 +0002EC 3408 RETLW 8 +0002ED 348A RETLW 138 +0002EE 3480 RETLW 128 +0002EF 3492 RETLW 146 +0002F0 3496 RETLW 150 +0002F1 34FE RETLW 254 +0002F2 348A RETLW 138 +0002F3 3492 RETLW 146 +0002F4 3412 RETLW 18 +0002F5 3492 RETLW 146 +0002F6 3452 RETLW 82 +0002F7 3400 RETLW 0 +0002F8 3400 RETLW 0 +0002F9 3482 RETLW 130 +0002FA 3428 RETLW 40 +0002FB 3428 RETLW 40 +0002FC 3412 RETLW 18 +0002FD 3482 RETLW 130 +0002FE 3424 RETLW 36 +0002FF 3492 RETLW 146 +000300 3482 RETLW 130 +000301 3444 RETLW 68 +000302 3492 RETLW 146 +000303 3412 RETLW 18 +000304 3492 RETLW 146 +000305 3410 RETLW 16 +000306 3482 RETLW 130 +000307 347E RETLW 126 +000308 3444 RETLW 68 +000309 3480 RETLW 128 +00030A 3404 RETLW 4 +00030B 3420 RETLW 32 +00030C 3482 RETLW 130 +00030D 3412 RETLW 18 +00030E 3442 RETLW 66 +00030F 3452 RETLW 82 +000310 3492 RETLW 146 +000311 3402 RETLW 2 +000312 3480 RETLW 128 +000313 3440 RETLW 64 +000314 3480 RETLW 128 +000315 3428 RETLW 40 +000316 3410 RETLW 16 +000317 348A RETLW 138 +000318 3482 RETLW 130 +000319 3420 RETLW 32 +00031A 34FE RETLW 254 +00031B 3404 RETLW 4 +00031C 3480 RETLW 128 +00031D 3408 RETLW 8 +00031E 34A8 RETLW 168 +00031F 3488 RETLW 136 +000320 3488 RETLW 136 +000321 3490 RETLW 144 +000322 34A8 RETLW 168 +000323 3402 RETLW 2 +000324 34A8 RETLW 168 +000325 3408 RETLW 8 +000326 3480 RETLW 128 +000327 347A RETLW 122 +000328 3488 RETLW 136 +000329 3480 RETLW 128 +00032A 3408 RETLW 8 +00032B 3408 RETLW 8 +00032C 3488 RETLW 136 +00032D 3428 RETLW 40 +00032E 3430 RETLW 48 +00032F 3408 RETLW 8 +000330 34A8 RETLW 168 +000331 3480 RETLW 128 +000332 3440 RETLW 64 +000333 3440 RETLW 64 +000334 3480 RETLW 128 +000335 3450 RETLW 80 +000336 34A0 RETLW 160 +000337 3498 RETLW 152 +000338 3482 RETLW 130 +000339 3400 RETLW 0 +00033A 3410 RETLW 16 +00033B 3420 RETLW 32 +00033C 3444 RETLW 68 + + + GLCDCHARCOL7 +00033D 3071 MOVLW 113 +00033E 0277 SUBWF SYSSTRINGA, W +00033F 1803 BTFSC STATUS, C +000340 3400 RETLW 0 +000341 0877 MOVF SYSSTRINGA, W +000342 3E4A ADDLW LOW TABLEGLCDCHARCOL7 +000343 00F7 MOVWF SYSSTRINGA +000344 3003 MOVLW HIGH TABLEGLCDCHARCOL7 +000345 1803 BTFSC STATUS, C +000346 3E01 ADDLW 1 +000347 008A MOVWF PCLATH +000348 0877 MOVF SYSSTRINGA, W +000349 0082 MOVWF PCL + TABLEGLCDCHARCOL7 +00034A 3470 RETLW 112 +00034B 3410 RETLW 16 +00034C 3400 RETLW 0 +00034D 340A RETLW 10 +00034E 3406 RETLW 6 +00034F 3488 RETLW 136 +000350 3422 RETLW 34 +000351 3438 RETLW 56 +000352 343E RETLW 62 +000353 3408 RETLW 8 +000354 3420 RETLW 32 +000355 3410 RETLW 16 +000356 3410 RETLW 16 +000357 3480 RETLW 128 +000358 3480 RETLW 128 +000359 3440 RETLW 64 +00035A 3404 RETLW 4 +00035B 3400 RETLW 0 +00035C 3400 RETLW 0 +00035D 3400 RETLW 0 +00035E 3428 RETLW 40 +00035F 3424 RETLW 36 +000360 34C4 RETLW 196 +000361 34A0 RETLW 160 +000362 3400 RETLW 0 +000363 3400 RETLW 0 +000364 3400 RETLW 0 +000365 3428 RETLW 40 +000366 3410 RETLW 16 +000367 3400 RETLW 0 +000368 3410 RETLW 16 +000369 3400 RETLW 0 +00036A 3404 RETLW 4 +00036B 347C RETLW 124 +00036C 3400 RETLW 0 +00036D 348C RETLW 140 +00036E 3462 RETLW 98 +00036F 3420 RETLW 32 +000370 3472 RETLW 114 +000371 3460 RETLW 96 +000372 340E RETLW 14 +000373 346C RETLW 108 +000374 343C RETLW 60 +000375 3400 RETLW 0 +000376 3400 RETLW 0 +000377 3400 RETLW 0 +000378 3428 RETLW 40 +000379 3410 RETLW 16 +00037A 340C RETLW 12 +00037B 347C RETLW 124 +00037C 34F8 RETLW 248 +00037D 346C RETLW 108 +00037E 3444 RETLW 68 +00037F 3438 RETLW 56 +000380 3482 RETLW 130 +000381 3402 RETLW 2 +000382 34F4 RETLW 244 +000383 34FE RETLW 254 +000384 3400 RETLW 0 +000385 3402 RETLW 2 +000386 3482 RETLW 130 +000387 3480 RETLW 128 +000388 34FE RETLW 254 +000389 34FE RETLW 254 +00038A 347C RETLW 124 +00038B 340C RETLW 12 +00038C 34BC RETLW 188 +00038D 348C RETLW 140 +00038E 3464 RETLW 100 +00038F 3402 RETLW 2 +000390 347E RETLW 126 +000391 343E RETLW 62 +000392 347E RETLW 126 +000393 34C6 RETLW 198 +000394 340E RETLW 14 +000395 3486 RETLW 134 +000396 3400 RETLW 0 +000397 3440 RETLW 64 +000398 3400 RETLW 0 +000399 3408 RETLW 8 +00039A 3480 RETLW 128 +00039B 3400 RETLW 0 +00039C 34F0 RETLW 240 +00039D 3470 RETLW 112 +00039E 3440 RETLW 64 +00039F 34FE RETLW 254 +0003A0 3430 RETLW 48 +0003A1 3404 RETLW 4 +0003A2 3478 RETLW 120 +0003A3 34F0 RETLW 240 +0003A4 3400 RETLW 0 +0003A5 3400 RETLW 0 +0003A6 3400 RETLW 0 +0003A7 3400 RETLW 0 +0003A8 34F0 RETLW 240 +0003A9 34F0 RETLW 240 +0003AA 3470 RETLW 112 +0003AB 3410 RETLW 16 +0003AC 34F8 RETLW 248 +0003AD 3410 RETLW 16 +0003AE 3440 RETLW 64 +0003AF 3440 RETLW 64 +0003B0 34F8 RETLW 248 +0003B1 3438 RETLW 56 +0003B2 3478 RETLW 120 +0003B3 3488 RETLW 136 +0003B4 3478 RETLW 120 +0003B5 3488 RETLW 136 +0003B6 3400 RETLW 0 +0003B7 3400 RETLW 0 +0003B8 3400 RETLW 0 +0003B9 3410 RETLW 16 +0003BA 3478 RETLW 120 + + + GLCDDRAWCHAR +0003BB 084A MOVF LINECOLOUR,W +0003BC 00F5 MOVWF SYSWORDTEMPA +0003BD 084B MOVF LINECOLOUR_H,W +0003BE 00F6 MOVWF SYSWORDTEMPA_H +0003BF 083E MOVF GLCDFOREGROUND,W +0003C0 00F9 MOVWF SYSWORDTEMPB +0003C1 083F MOVF GLCDFOREGROUND_H,W +0003C2 00FA MOVWF SYSWORDTEMPB_H +000000 158A PAGESEL SYSCOMPEQUAL16 +000000 158A 120A PAGESEL SYSCOMPEQUAL16 +0003C5 2094 CALL SYSCOMPEQUAL16 +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +0003C8 09F0 COMF SYSBYTETEMPX,F +0003C9 1C70 BTFSS SYSBYTETEMPX,0 +0003CA 2BD0 GOTO ENDIF6 +0003CB 3001 MOVLW 1 +0003CC 00B4 MOVWF GLCDBACKGROUND +0003CD 01B5 CLRF GLCDBACKGROUND_H +0003CE 01BE CLRF GLCDFOREGROUND +0003CF 01BF CLRF GLCDFOREGROUND_H + ENDIF6 +0003D0 300F MOVLW 15 +0003D1 02A1 SUBWF CHARCODE,F +0003D2 0821 MOVF CHARCODE,W +0003D3 00F5 MOVWF SYSBYTETEMPA +0003D4 30B2 MOVLW 178 +0003D5 00F9 MOVWF SYSBYTETEMPB +000000 158A PAGESEL SYSCOMPLESSTHAN +000000 158A 120A PAGESEL SYSCOMPLESSTHAN +0003D8 209F CALL SYSCOMPLESSTHAN +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +0003DB 09F0 COMF SYSBYTETEMPX,F +0003DC 0870 MOVF SYSBYTETEMPX,W +0003DD 00FE MOVWF SYSTEMP1 +0003DE 0821 MOVF CHARCODE,W +0003DF 00F9 MOVWF SYSBYTETEMPB +0003E0 30CA MOVLW 202 +0003E1 00F5 MOVWF SYSBYTETEMPA +000000 158A PAGESEL SYSCOMPLESSTHAN +000000 158A 120A PAGESEL SYSCOMPLESSTHAN +0003E4 209F CALL SYSCOMPLESSTHAN +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +0003E7 09F0 COMF SYSBYTETEMPX,F +0003E8 087E MOVF SYSTEMP1,W +0003E9 0570 ANDWF SYSBYTETEMPX,W +000000 1683 BANKSEL SYSTEMP2 +000000 1683 1303 BANKSEL SYSTEMP2 +0003EC 00A0 MOVWF SYSTEMP2 +0003ED 1C20 BTFSS SYSTEMP2,0 +0003EE 2BF7 GOTO ENDIF7 +0003EF 3001 MOVLW 1 +000000 1283 BANKSEL CHARLOCY +000000 1283 1303 BANKSEL CHARLOCY +0003F2 02A7 SUBWF CHARLOCY,F +0003F3 3000 MOVLW 0 +0003F4 1C03 BTFSS STATUS,C +0003F5 3E01 ADDLW 1 +0003F6 02A8 SUBWF CHARLOCY_H,F + ENDIF7 +0003F7 3001 MOVLW 1 +000000 1283 BANKSEL CHARCOL +000000 1283 1303 BANKSEL CHARCOL +0003FA 00A2 MOVWF CHARCOL +0003FB 01A3 CLRF CHARCOL_H +0003FC 01AD CLRF CURRCHARCOL + SYSFORLOOP4 +0003FD 0AAD INCF CURRCHARCOL,F + SYSSELECT1CASE1 +0003FE 032D DECF CURRCHARCOL,W +0003FF 1D03 BTFSS STATUS, Z +000400 2C06 GOTO SYSSELECT1CASE2 +000401 0821 MOVF CHARCODE,W +000402 00F7 MOVWF SYSSTRINGA +000403 2145 CALL GLCDCHARCOL3 +000404 00AF MOVWF CURRCHARVAL +000405 2C29 GOTO SYSSELECTEND1 + SYSSELECT1CASE2 +000406 3002 MOVLW 2 +000407 022D SUBWF CURRCHARCOL,W +000408 1D03 BTFSS STATUS, Z +000409 2C0F GOTO SYSSELECT1CASE3 +00040A 0821 MOVF CHARCODE,W +00040B 00F7 MOVWF SYSSTRINGA +00040C 21C3 CALL GLCDCHARCOL4 +00040D 00AF MOVWF CURRCHARVAL +00040E 2C29 GOTO SYSSELECTEND1 + SYSSELECT1CASE3 +00040F 3003 MOVLW 3 +000410 022D SUBWF CURRCHARCOL,W +000411 1D03 BTFSS STATUS, Z +000412 2C18 GOTO SYSSELECT1CASE4 +000413 0821 MOVF CHARCODE,W +000414 00F7 MOVWF SYSSTRINGA +000415 2241 CALL GLCDCHARCOL5 +000416 00AF MOVWF CURRCHARVAL +000417 2C29 GOTO SYSSELECTEND1 + SYSSELECT1CASE4 +000418 3004 MOVLW 4 +000419 022D SUBWF CURRCHARCOL,W +00041A 1D03 BTFSS STATUS, Z +00041B 2C21 GOTO SYSSELECT1CASE5 +00041C 0821 MOVF CHARCODE,W +00041D 00F7 MOVWF SYSSTRINGA +00041E 22BF CALL GLCDCHARCOL6 +00041F 00AF MOVWF CURRCHARVAL +000420 2C29 GOTO SYSSELECTEND1 + SYSSELECT1CASE5 +000421 3005 MOVLW 5 +000422 022D SUBWF CURRCHARCOL,W +000423 1D03 BTFSS STATUS, Z +000424 2C29 GOTO SYSSELECT1CASE6 +000425 0821 MOVF CHARCODE,W +000426 00F7 MOVWF SYSSTRINGA +000427 233D CALL GLCDCHARCOL7 +000428 00AF MOVWF CURRCHARVAL + SYSSELECT1CASE6 + SYSSELECTEND1 +000429 01A9 CLRF CHARROW +00042A 01AA CLRF CHARROW_H +00042B 01AE CLRF CURRCHARROW + SYSFORLOOP5 +00042C 0AAE INCF CURRCHARROW,F +00042D 01A4 CLRF CHARCOLS +00042E 01AC CLRF COL +00042F 3001 MOVLW 1 +000430 023C SUBWF GLCDFNTDEFAULTSIZE,W +000431 1C03 BTFSS STATUS, C +000432 2C6A GOTO SYSFORLOOPEND6 + SYSFORLOOP6 +000433 0AAC INCF COL,F +000434 0AA4 INCF CHARCOLS,F +000435 01AB CLRF CHARROWS +000436 01E7 CLRF ROW +000437 3001 MOVLW 1 +000438 023C SUBWF GLCDFNTDEFAULTSIZE,W +000439 1C03 BTFSS STATUS, C +00043A 2C66 GOTO SYSFORLOOPEND7 + SYSFORLOOP7 +00043B 0AE7 INCF ROW,F +00043C 0AAB INCF CHARROWS,F +00043D 1C2F BTFSS CURRCHARVAL,0 +00043E 2C51 GOTO ELSE10_1 +00043F 0822 MOVF CHARCOL,W +000440 0725 ADDWF CHARLOCX,W +000441 00FE MOVWF SYSTEMP1 +000442 0824 MOVF CHARCOLS,W +000443 077E ADDWF SYSTEMP1,W +000444 00C4 MOVWF GLCDX +000445 0829 MOVF CHARROW,W +000446 0727 ADDWF CHARLOCY,W +000447 00FE MOVWF SYSTEMP1 +000448 082B MOVF CHARROWS,W +000449 077E ADDWF SYSTEMP1,W +00044A 00C5 MOVWF GLCDY +00044B 084A MOVF LINECOLOUR,W +00044C 00B8 MOVWF GLCDCOLOUR +00044D 084B MOVF LINECOLOUR_H,W +00044E 00B9 MOVWF GLCDCOLOUR_H +00044F 2689 CALL PSET_KS0108 + +000450 2C62 GOTO ENDIF10 + ELSE10_1 +000451 0822 MOVF CHARCOL,W +000452 0725 ADDWF CHARLOCX,W +000453 00FE MOVWF SYSTEMP1 +000454 0824 MOVF CHARCOLS,W +000455 077E ADDWF SYSTEMP1,W +000456 00C4 MOVWF GLCDX +000457 0829 MOVF CHARROW,W +000458 0727 ADDWF CHARLOCY,W +000459 00FE MOVWF SYSTEMP1 +00045A 082B MOVF CHARROWS,W +00045B 077E ADDWF SYSTEMP1,W +00045C 00C5 MOVWF GLCDY +00045D 0834 MOVF GLCDBACKGROUND,W +00045E 00B8 MOVWF GLCDCOLOUR +00045F 0835 MOVF GLCDBACKGROUND_H,W +000460 00B9 MOVWF GLCDCOLOUR_H +000461 2689 CALL PSET_KS0108 + + ENDIF10 +000462 083C MOVF GLCDFNTDEFAULTSIZE,W +000463 0267 SUBWF ROW,W +000464 1C03 BTFSS STATUS, C +000465 2C3B GOTO SYSFORLOOP7 + SYSFORLOOPEND7 +000466 083C MOVF GLCDFNTDEFAULTSIZE,W +000467 022C SUBWF COL,W +000468 1C03 BTFSS STATUS, C +000469 2C33 GOTO SYSFORLOOP6 + SYSFORLOOPEND6 +00046A 0CAF RRF CURRCHARVAL,F +00046B 083C MOVF GLCDFNTDEFAULTSIZE,W +00046C 07A9 ADDWF CHARROW,F +00046D 3000 MOVLW 0 +00046E 1803 BTFSC STATUS,C +00046F 3E01 ADDLW 1 +000470 07AA ADDWF CHARROW_H,F +000471 3008 MOVLW 8 +000472 022E SUBWF CURRCHARROW,W +000473 1C03 BTFSS STATUS, C +000474 2C2C GOTO SYSFORLOOP5 + SYSFORLOOPEND5 +000475 083C MOVF GLCDFNTDEFAULTSIZE,W +000476 07A2 ADDWF CHARCOL,F +000477 3000 MOVLW 0 +000478 1803 BTFSC STATUS,C +000479 3E01 ADDLW 1 +00047A 07A3 ADDWF CHARCOL_H,F +00047B 3005 MOVLW 5 +00047C 022D SUBWF CURRCHARCOL,W +00047D 1C03 BTFSS STATUS, C +00047E 2BFD GOTO SYSFORLOOP4 + SYSFORLOOPEND4 +00047F 01B4 CLRF GLCDBACKGROUND +000480 01B5 CLRF GLCDBACKGROUND_H +000481 3001 MOVLW 1 +000482 00BE MOVWF GLCDFOREGROUND +000483 01BF CLRF GLCDFOREGROUND_H +000484 0008 RETURN + + + GLCDPRINT3 +000485 086B MOVF SYSLCDPRINTDATAHANDLER,W +000486 0084 MOVWF FSR +000487 1383 BCF STATUS, IRP +000488 186C BTFSC SYSLCDPRINTDATAHANDLER_H,0 +000489 1783 BSF STATUS, IRP +00048A 0800 MOVF INDF,W +00048B 00E2 MOVWF PRINTLEN +00048C 08E2 MOVF PRINTLEN,F +00048D 1903 BTFSC STATUS, Z +00048E 0008 RETURN +00048F 0863 MOVF PRINTLOCX,W +000490 00C0 MOVWF GLCDPRINTLOC +000491 0864 MOVF PRINTLOCX_H,W +000492 00C1 MOVWF GLCDPRINTLOC_H +000493 01ED CLRF SYSPRINTTEMP +000494 3001 MOVLW 1 +000495 0262 SUBWF PRINTLEN,W +000496 1C03 BTFSS STATUS, C +000497 2CC1 GOTO SYSFORLOOPEND3 + SYSFORLOOP3 +000498 0AED INCF SYSPRINTTEMP,F +000499 0840 MOVF GLCDPRINTLOC,W +00049A 00A5 MOVWF CHARLOCX +00049B 0841 MOVF GLCDPRINTLOC_H,W +00049C 00A6 MOVWF CHARLOCX_H +00049D 0865 MOVF PRINTLOCY,W +00049E 00A7 MOVWF CHARLOCY +00049F 0866 MOVF PRINTLOCY_H,W +0004A0 00A8 MOVWF CHARLOCY_H +0004A1 086D MOVF SYSPRINTTEMP,W +0004A2 076B ADDWF SYSLCDPRINTDATAHANDLER,W +0004A3 0084 MOVWF FSR +0004A4 1383 BCF STATUS, IRP +0004A5 186C BTFSC SYSLCDPRINTDATAHANDLER_H,0 +0004A6 1783 BSF STATUS, IRP +0004A7 0800 MOVF INDF,W +0004A8 00A1 MOVWF CHARCODE +0004A9 083E MOVF GLCDFOREGROUND,W +0004AA 00CA MOVWF LINECOLOUR +0004AB 083F MOVF GLCDFOREGROUND_H,W +0004AC 00CB MOVWF LINECOLOUR_H +0004AD 23BB CALL GLCDDRAWCHAR + +0004AE 083D MOVF GLCDFONTWIDTH,W +0004AF 00F5 MOVWF SYSBYTETEMPA +0004B0 083C MOVF GLCDFNTDEFAULTSIZE,W +0004B1 00F9 MOVWF SYSBYTETEMPB +000000 158A PAGESEL SYSMULTSUB +000000 158A 120A PAGESEL SYSMULTSUB +0004B4 20E4 CALL SYSMULTSUB +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +0004B7 0870 MOVF SYSBYTETEMPX,W +0004B8 07C0 ADDWF GLCDPRINTLOC,F +0004B9 3000 MOVLW 0 +0004BA 1803 BTFSC STATUS,C +0004BB 3E01 ADDLW 1 +0004BC 07C1 ADDWF GLCDPRINTLOC_H,F +0004BD 0862 MOVF PRINTLEN,W +0004BE 026D SUBWF SYSPRINTTEMP,W +0004BF 1C03 BTFSS STATUS, C +0004C0 2C98 GOTO SYSFORLOOP3 + SYSFORLOOPEND3 +0004C1 0008 RETURN + + + GLCDWRITEBYTE_KS0108 +0004C2 1069 BCF SYSBITVAR0,0 +0004C3 1809 BTFSC PORTE,0 +0004C4 1469 BSF SYSBITVAR0,0 +0004C5 10E9 BCF SYSBITVAR0,1 +0004C6 1887 BTFSC PORTC,1 +0004C7 14E9 BSF SYSBITVAR0,1 +0004C8 1807 BTFSC PORTC,0 +0004C9 1087 BCF PORTC,1 +0004CA 1009 BCF PORTE,0 + SYSWAITLOOP1 +000000 158A PAGESEL FN_GLCDREADBYTE_KS0108 +000000 158A 120A PAGESEL FN_GLCDREADBYTE_KS0108 +0004CD 204C CALL FN_GLCDREADBYTE_KS0108 +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +0004D0 1BC2 BTFSC GLCDREADBYTE_KS0108,7 +0004D1 2CCB GOTO SYSWAITLOOP1 +0004D2 1009 BCF PORTE,0 +0004D3 1869 BTFSC SYSBITVAR0,0 +0004D4 1409 BSF PORTE,0 +0004D5 1087 BCF PORTC,1 +0004D6 18E9 BTFSC SYSBITVAR0,1 +0004D7 1487 BSF PORTC,1 +0004D8 1089 BCF PORTE,1 +000000 1683 BANKSEL TRISD +000000 1683 1303 BANKSEL TRISD +0004DB 1008 BCF TRISD,0 +0004DC 1088 BCF TRISD,1 +0004DD 1108 BCF TRISD,2 +0004DE 1188 BCF TRISD,3 +0004DF 1208 BCF TRISD,4 +0004E0 1288 BCF TRISD,5 +0004E1 1308 BCF TRISD,6 +0004E2 1388 BCF TRISD,7 +000000 1283 BANKSEL PORTD +000000 1283 1303 BANKSEL PORTD +0004E5 1388 BCF PORTD,7 +0004E6 1BC9 BTFSC LCDBYTE,7 +0004E7 1788 BSF PORTD,7 +0004E8 1308 BCF PORTD,6 +0004E9 1B49 BTFSC LCDBYTE,6 +0004EA 1708 BSF PORTD,6 +0004EB 1288 BCF PORTD,5 +0004EC 1AC9 BTFSC LCDBYTE,5 +0004ED 1688 BSF PORTD,5 +0004EE 1208 BCF PORTD,4 +0004EF 1A49 BTFSC LCDBYTE,4 +0004F0 1608 BSF PORTD,4 +0004F1 1188 BCF PORTD,3 +0004F2 19C9 BTFSC LCDBYTE,3 +0004F3 1588 BSF PORTD,3 +0004F4 1108 BCF PORTD,2 +0004F5 1949 BTFSC LCDBYTE,2 +0004F6 1508 BSF PORTD,2 +0004F7 1088 BCF PORTD,1 +0004F8 18C9 BTFSC LCDBYTE,1 +0004F9 1488 BSF PORTD,1 +0004FA 1008 BCF PORTD,0 +0004FB 1849 BTFSC LCDBYTE,0 +0004FC 1408 BSF PORTD,0 +0004FD 2CFE GOTO $+1 +0004FE 2CFF GOTO $+1 +0004FF 1509 BSF PORTE,2 +000500 2D01 GOTO $+1 +000501 2D02 GOTO $+1 +000502 1109 BCF PORTE,2 +000503 2D04 GOTO $+1 +000504 2D05 GOTO $+1 +000505 0008 RETURN + + + INITGLCD_KS0108 +000000 1683 BANKSEL TRISE +000000 1683 1303 BANKSEL TRISE +000508 1009 BCF TRISE,0 +000509 1089 BCF TRISE,1 +00050A 1109 BCF TRISE,2 +00050B 1007 BCF TRISC,0 +00050C 1087 BCF TRISC,1 +00050D 1107 BCF TRISC,2 +000000 1283 BANKSEL PORTC +000000 1283 1303 BANKSEL PORTC +000510 1107 BCF PORTC,2 +000511 3001 MOVLW 1 +000512 00F2 MOVWF SYSWAITTEMPMS +000513 01F3 CLRF SYSWAITTEMPMS_H +000000 158A PAGESEL DELAY_MS +000000 158A 120A PAGESEL DELAY_MS +000516 2000 CALL DELAY_MS +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +000519 1507 BSF PORTC,2 +00051A 3001 MOVLW 1 +00051B 00F2 MOVWF SYSWAITTEMPMS +00051C 01F3 CLRF SYSWAITTEMPMS_H +000000 158A PAGESEL DELAY_MS +000000 158A 120A PAGESEL DELAY_MS +00051F 2000 CALL DELAY_MS +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +000522 1407 BSF PORTC,0 +000523 1487 BSF PORTC,1 +000524 1009 BCF PORTE,0 +000525 303F MOVLW 63 +000526 00C9 MOVWF LCDBYTE +000527 24C2 CALL GLCDWRITEBYTE_KS0108 + +000528 30C0 MOVLW 192 +000529 00C9 MOVWF LCDBYTE +00052A 24C2 CALL GLCDWRITEBYTE_KS0108 + +00052B 1007 BCF PORTC,0 +00052C 1087 BCF PORTC,1 +00052D 01B4 CLRF GLCDBACKGROUND +00052E 01B5 CLRF GLCDBACKGROUND_H +00052F 3001 MOVLW 1 +000530 00BE MOVWF GLCDFOREGROUND +000531 01BF CLRF GLCDFOREGROUND_H +000532 3006 MOVLW 6 +000533 00BD MOVWF GLCDFONTWIDTH +000534 01BB CLRF GLCDFNTDEFAULT +000535 3001 MOVLW 1 +000536 00BC MOVWF GLCDFNTDEFAULTSIZE +000000 158A PAGESEL GLCDCLS_KS0108 +000000 158A 120A PAGESEL GLCDCLS_KS0108 +000539 2016 CALL GLCDCLS_KS0108 +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ + +00053C 0008 RETURN + + + LINE +00053D 01CC CLRF LINEDIFFX +00053E 01CD CLRF LINEDIFFX_H +00053F 01D0 CLRF LINEDIFFY +000540 01D1 CLRF LINEDIFFY_H +000541 01D6 CLRF LINESTEPX +000542 01D7 CLRF LINESTEPX_H +000543 01D8 CLRF LINESTEPY +000544 01D9 CLRF LINESTEPY_H +000545 01CE CLRF LINEDIFFX_X2 +000546 01CF CLRF LINEDIFFX_X2_H +000547 01D2 CLRF LINEDIFFY_X2 +000548 01D3 CLRF LINEDIFFY_X2_H +000549 01D4 CLRF LINEERR +00054A 01D5 CLRF LINEERR_H +00054B 085A MOVF LINEX1,W +00054C 025C SUBWF LINEX2,W +00054D 00CC MOVWF LINEDIFFX +00054E 085B MOVF LINEX1_H,W +00054F 1C03 BTFSS STATUS,C +000550 3E01 ADDLW 1 +000551 025D SUBWF LINEX2_H,W +000552 00CD MOVWF LINEDIFFX_H +000553 085E MOVF LINEY1,W +000554 0260 SUBWF LINEY2,W +000555 00D0 MOVWF LINEDIFFY +000556 085F MOVF LINEY1_H,W +000557 1C03 BTFSS STATUS,C +000558 3E01 ADDLW 1 +000559 0261 SUBWF LINEY2_H,W +00055A 00D1 MOVWF LINEDIFFY_H +00055B 084C MOVF LINEDIFFX,W +00055C 00F9 MOVWF SYSINTEGERTEMPB +00055D 084D MOVF LINEDIFFX_H,W +00055E 00FA MOVWF SYSINTEGERTEMPB_H +00055F 01F5 CLRF SYSINTEGERTEMPA +000560 01F6 CLRF SYSINTEGERTEMPA_H +000000 158A PAGESEL SYSCOMPLESSTHANINT +000000 158A 120A PAGESEL SYSCOMPLESSTHANINT +000563 20A6 CALL SYSCOMPLESSTHANINT +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +000566 1C70 BTFSS SYSBYTETEMPX,0 +000567 2D6C GOTO ELSE21_1 +000568 3001 MOVLW 1 +000569 00D6 MOVWF LINESTEPX +00056A 01D7 CLRF LINESTEPX_H +00056B 2D6F GOTO ENDIF21 + ELSE21_1 +00056C 30FF MOVLW 255 +00056D 00D6 MOVWF LINESTEPX +00056E 00D7 MOVWF LINESTEPX_H + ENDIF21 +00056F 0850 MOVF LINEDIFFY,W +000570 00F9 MOVWF SYSINTEGERTEMPB +000571 0851 MOVF LINEDIFFY_H,W +000572 00FA MOVWF SYSINTEGERTEMPB_H +000573 01F5 CLRF SYSINTEGERTEMPA +000574 01F6 CLRF SYSINTEGERTEMPA_H +000000 158A PAGESEL SYSCOMPLESSTHANINT +000000 158A 120A PAGESEL SYSCOMPLESSTHANINT +000577 20A6 CALL SYSCOMPLESSTHANINT +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +00057A 1C70 BTFSS SYSBYTETEMPX,0 +00057B 2D80 GOTO ELSE22_1 +00057C 3001 MOVLW 1 +00057D 00D8 MOVWF LINESTEPY +00057E 01D9 CLRF LINESTEPY_H +00057F 2D83 GOTO ENDIF22 + ELSE22_1 +000580 30FF MOVLW 255 +000581 00D8 MOVWF LINESTEPY +000582 00D9 MOVWF LINESTEPY_H + ENDIF22 +000583 0856 MOVF LINESTEPX,W +000584 00F5 MOVWF SYSINTEGERTEMPA +000585 0857 MOVF LINESTEPX_H,W +000586 00F6 MOVWF SYSINTEGERTEMPA_H +000587 084C MOVF LINEDIFFX,W +000588 00F9 MOVWF SYSINTEGERTEMPB +000589 084D MOVF LINEDIFFX_H,W +00058A 00FA MOVWF SYSINTEGERTEMPB_H +000000 158A PAGESEL SYSMULTSUBINT +000000 158A 120A PAGESEL SYSMULTSUBINT +00058D 211A CALL SYSMULTSUBINT +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +000590 0870 MOVF SYSINTEGERTEMPX,W +000591 00CC MOVWF LINEDIFFX +000592 0871 MOVF SYSINTEGERTEMPX_H,W +000593 00CD MOVWF LINEDIFFX_H +000594 0858 MOVF LINESTEPY,W +000595 00F5 MOVWF SYSINTEGERTEMPA +000596 0859 MOVF LINESTEPY_H,W +000597 00F6 MOVWF SYSINTEGERTEMPA_H +000598 0850 MOVF LINEDIFFY,W +000599 00F9 MOVWF SYSINTEGERTEMPB +00059A 0851 MOVF LINEDIFFY_H,W +00059B 00FA MOVWF SYSINTEGERTEMPB_H +000000 158A PAGESEL SYSMULTSUBINT +000000 158A 120A PAGESEL SYSMULTSUBINT +00059E 211A CALL SYSMULTSUBINT +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +0005A1 0870 MOVF SYSINTEGERTEMPX,W +0005A2 00D0 MOVWF LINEDIFFY +0005A3 0871 MOVF SYSINTEGERTEMPX_H,W +0005A4 00D1 MOVWF LINEDIFFY_H +0005A5 084C MOVF LINEDIFFX,W +0005A6 00F5 MOVWF SYSINTEGERTEMPA +0005A7 084D MOVF LINEDIFFX_H,W +0005A8 00F6 MOVWF SYSINTEGERTEMPA_H +0005A9 3002 MOVLW 2 +0005AA 00F9 MOVWF SYSINTEGERTEMPB +0005AB 01FA CLRF SYSINTEGERTEMPB_H +000000 158A PAGESEL SYSMULTSUBINT +000000 158A 120A PAGESEL SYSMULTSUBINT +0005AE 211A CALL SYSMULTSUBINT +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +0005B1 0870 MOVF SYSINTEGERTEMPX,W +0005B2 00CE MOVWF LINEDIFFX_X2 +0005B3 0871 MOVF SYSINTEGERTEMPX_H,W +0005B4 00CF MOVWF LINEDIFFX_X2_H +0005B5 0850 MOVF LINEDIFFY,W +0005B6 00F5 MOVWF SYSINTEGERTEMPA +0005B7 0851 MOVF LINEDIFFY_H,W +0005B8 00F6 MOVWF SYSINTEGERTEMPA_H +0005B9 3002 MOVLW 2 +0005BA 00F9 MOVWF SYSINTEGERTEMPB +0005BB 01FA CLRF SYSINTEGERTEMPB_H +000000 158A PAGESEL SYSMULTSUBINT +000000 158A 120A PAGESEL SYSMULTSUBINT +0005BE 211A CALL SYSMULTSUBINT +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +0005C1 0870 MOVF SYSINTEGERTEMPX,W +0005C2 00D2 MOVWF LINEDIFFY_X2 +0005C3 0871 MOVF SYSINTEGERTEMPX_H,W +0005C4 00D3 MOVWF LINEDIFFY_X2_H +0005C5 084C MOVF LINEDIFFX,W +0005C6 00F5 MOVWF SYSINTEGERTEMPA +0005C7 084D MOVF LINEDIFFX_H,W +0005C8 00F6 MOVWF SYSINTEGERTEMPA_H +0005C9 0850 MOVF LINEDIFFY,W +0005CA 00F9 MOVWF SYSINTEGERTEMPB +0005CB 0851 MOVF LINEDIFFY_H,W +0005CC 00FA MOVWF SYSINTEGERTEMPB_H +000000 158A PAGESEL SYSCOMPLESSTHANINT +000000 158A 120A PAGESEL SYSCOMPLESSTHANINT +0005CF 20A6 CALL SYSCOMPLESSTHANINT +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +0005D2 09F0 COMF SYSBYTETEMPX,F +0005D3 1C70 BTFSS SYSBYTETEMPX,0 +0005D4 2E2F GOTO ELSE23_1 +0005D5 084C MOVF LINEDIFFX,W +0005D6 0252 SUBWF LINEDIFFY_X2,W +0005D7 00D4 MOVWF LINEERR +0005D8 084D MOVF LINEDIFFX_H,W +0005D9 1C03 BTFSS STATUS,C +0005DA 3E01 ADDLW 1 +0005DB 0253 SUBWF LINEDIFFY_X2_H,W +0005DC 00D5 MOVWF LINEERR_H + SYSDOLOOP_S1 +0005DD 085A MOVF LINEX1,W +0005DE 00F5 MOVWF SYSWORDTEMPA +0005DF 085B MOVF LINEX1_H,W +0005E0 00F6 MOVWF SYSWORDTEMPA_H +0005E1 085C MOVF LINEX2,W +0005E2 00F9 MOVWF SYSWORDTEMPB +0005E3 085D MOVF LINEX2_H,W +0005E4 00FA MOVWF SYSWORDTEMPB_H +000000 158A PAGESEL SYSCOMPEQUAL16 +000000 158A 120A PAGESEL SYSCOMPEQUAL16 +0005E7 2094 CALL SYSCOMPEQUAL16 +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +0005EA 09F0 COMF SYSBYTETEMPX,F +0005EB 1C70 BTFSS SYSBYTETEMPX,0 +0005EC 2E25 GOTO SYSDOLOOP_E1 +0005ED 085A MOVF LINEX1,W +0005EE 00C4 MOVWF GLCDX +0005EF 085E MOVF LINEY1,W +0005F0 00C5 MOVWF GLCDY +0005F1 084A MOVF LINECOLOUR,W +0005F2 00B8 MOVWF GLCDCOLOUR +0005F3 084B MOVF LINECOLOUR_H,W +0005F4 00B9 MOVWF GLCDCOLOUR_H +0005F5 2689 CALL PSET_KS0108 + +0005F6 0856 MOVF LINESTEPX,W +0005F7 07DA ADDWF LINEX1,F +0005F8 0857 MOVF LINESTEPX_H,W +0005F9 1803 BTFSC STATUS,C +0005FA 3E01 ADDLW 1 +0005FB 07DB ADDWF LINEX1_H,F +0005FC 0854 MOVF LINEERR,W +0005FD 00F5 MOVWF SYSINTEGERTEMPA +0005FE 0855 MOVF LINEERR_H,W +0005FF 00F6 MOVWF SYSINTEGERTEMPA_H +000600 01F9 CLRF SYSINTEGERTEMPB +000601 01FA CLRF SYSINTEGERTEMPB_H +000000 158A PAGESEL SYSCOMPLESSTHANINT +000000 158A 120A PAGESEL SYSCOMPLESSTHANINT +000604 20A6 CALL SYSCOMPLESSTHANINT +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +000607 1C70 BTFSS SYSBYTETEMPX,0 +000608 2E10 GOTO ELSE24_1 +000609 0852 MOVF LINEDIFFY_X2,W +00060A 07D4 ADDWF LINEERR,F +00060B 0853 MOVF LINEDIFFY_X2_H,W +00060C 1803 BTFSC STATUS,C +00060D 3E01 ADDLW 1 +00060E 07D5 ADDWF LINEERR_H,F +00060F 2E24 GOTO ENDIF24 + ELSE24_1 +000610 084E MOVF LINEDIFFX_X2,W +000611 0252 SUBWF LINEDIFFY_X2,W +000612 00FE MOVWF SYSTEMP1 +000613 084F MOVF LINEDIFFX_X2_H,W +000614 1C03 BTFSS STATUS,C +000615 3E01 ADDLW 1 +000616 0253 SUBWF LINEDIFFY_X2_H,W +000617 00FF MOVWF SYSTEMP1_H +000618 087E MOVF SYSTEMP1,W +000619 07D4 ADDWF LINEERR,F +00061A 087F MOVF SYSTEMP1_H,W +00061B 1803 BTFSC STATUS,C +00061C 3E01 ADDLW 1 +00061D 07D5 ADDWF LINEERR_H,F +00061E 0858 MOVF LINESTEPY,W +00061F 07DE ADDWF LINEY1,F +000620 0859 MOVF LINESTEPY_H,W +000621 1803 BTFSC STATUS,C +000622 3E01 ADDLW 1 +000623 07DF ADDWF LINEY1_H,F + ENDIF24 +000624 2DDD GOTO SYSDOLOOP_S1 + SYSDOLOOP_E1 +000625 085A MOVF LINEX1,W +000626 00C4 MOVWF GLCDX +000627 085E MOVF LINEY1,W +000628 00C5 MOVWF GLCDY +000629 084A MOVF LINECOLOUR,W +00062A 00B8 MOVWF GLCDCOLOUR +00062B 084B MOVF LINECOLOUR_H,W +00062C 00B9 MOVWF GLCDCOLOUR_H +00062D 2689 CALL PSET_KS0108 + +00062E 2E88 GOTO ENDIF23 + ELSE23_1 +00062F 0850 MOVF LINEDIFFY,W +000630 024E SUBWF LINEDIFFX_X2,W +000631 00D4 MOVWF LINEERR +000632 0851 MOVF LINEDIFFY_H,W +000633 1C03 BTFSS STATUS,C +000634 3E01 ADDLW 1 +000635 024F SUBWF LINEDIFFX_X2_H,W +000636 00D5 MOVWF LINEERR_H + SYSDOLOOP_S2 +000637 085E MOVF LINEY1,W +000638 00F5 MOVWF SYSWORDTEMPA +000639 085F MOVF LINEY1_H,W +00063A 00F6 MOVWF SYSWORDTEMPA_H +00063B 0860 MOVF LINEY2,W +00063C 00F9 MOVWF SYSWORDTEMPB +00063D 0861 MOVF LINEY2_H,W +00063E 00FA MOVWF SYSWORDTEMPB_H +000000 158A PAGESEL SYSCOMPEQUAL16 +000000 158A 120A PAGESEL SYSCOMPEQUAL16 +000641 2094 CALL SYSCOMPEQUAL16 +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +000644 09F0 COMF SYSBYTETEMPX,F +000645 1C70 BTFSS SYSBYTETEMPX,0 +000646 2E7F GOTO SYSDOLOOP_E2 +000647 085A MOVF LINEX1,W +000648 00C4 MOVWF GLCDX +000649 085E MOVF LINEY1,W +00064A 00C5 MOVWF GLCDY +00064B 084A MOVF LINECOLOUR,W +00064C 00B8 MOVWF GLCDCOLOUR +00064D 084B MOVF LINECOLOUR_H,W +00064E 00B9 MOVWF GLCDCOLOUR_H +00064F 2689 CALL PSET_KS0108 + +000650 0858 MOVF LINESTEPY,W +000651 07DE ADDWF LINEY1,F +000652 0859 MOVF LINESTEPY_H,W +000653 1803 BTFSC STATUS,C +000654 3E01 ADDLW 1 +000655 07DF ADDWF LINEY1_H,F +000656 0854 MOVF LINEERR,W +000657 00F5 MOVWF SYSINTEGERTEMPA +000658 0855 MOVF LINEERR_H,W +000659 00F6 MOVWF SYSINTEGERTEMPA_H +00065A 01F9 CLRF SYSINTEGERTEMPB +00065B 01FA CLRF SYSINTEGERTEMPB_H +000000 158A PAGESEL SYSCOMPLESSTHANINT +000000 158A 120A PAGESEL SYSCOMPLESSTHANINT +00065E 20A6 CALL SYSCOMPLESSTHANINT +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +000661 1C70 BTFSS SYSBYTETEMPX,0 +000662 2E6A GOTO ELSE25_1 +000663 084E MOVF LINEDIFFX_X2,W +000664 07D4 ADDWF LINEERR,F +000665 084F MOVF LINEDIFFX_X2_H,W +000666 1803 BTFSC STATUS,C +000667 3E01 ADDLW 1 +000668 07D5 ADDWF LINEERR_H,F +000669 2E7E GOTO ENDIF25 + ELSE25_1 +00066A 0852 MOVF LINEDIFFY_X2,W +00066B 024E SUBWF LINEDIFFX_X2,W +00066C 00FE MOVWF SYSTEMP1 +00066D 0853 MOVF LINEDIFFY_X2_H,W +00066E 1C03 BTFSS STATUS,C +00066F 3E01 ADDLW 1 +000670 024F SUBWF LINEDIFFX_X2_H,W +000671 00FF MOVWF SYSTEMP1_H +000672 087E MOVF SYSTEMP1,W +000673 07D4 ADDWF LINEERR,F +000674 087F MOVF SYSTEMP1_H,W +000675 1803 BTFSC STATUS,C +000676 3E01 ADDLW 1 +000677 07D5 ADDWF LINEERR_H,F +000678 0856 MOVF LINESTEPX,W +000679 07DA ADDWF LINEX1,F +00067A 0857 MOVF LINESTEPX_H,W +00067B 1803 BTFSC STATUS,C +00067C 3E01 ADDLW 1 +00067D 07DB ADDWF LINEX1_H,F + ENDIF25 +00067E 2E37 GOTO SYSDOLOOP_S2 + SYSDOLOOP_E2 +00067F 085A MOVF LINEX1,W +000680 00C4 MOVWF GLCDX +000681 085E MOVF LINEY1,W +000682 00C5 MOVWF GLCDY +000683 084A MOVF LINECOLOUR,W +000684 00B8 MOVWF GLCDCOLOUR +000685 084B MOVF LINECOLOUR_H,W +000686 00B9 MOVWF GLCDCOLOUR_H +000687 2689 CALL PSET_KS0108 + + ENDIF23 +000688 0008 RETURN + + + PSET_KS0108 +000689 1B44 BTFSC GLCDX,6 +00068A 2E8D GOTO ENDIF30 +00068B 1487 BSF PORTC,1 +00068C 1007 BCF PORTC,0 + ENDIF30 +00068D 1F44 BTFSS GLCDX,6 +00068E 2E93 GOTO ENDIF31 +00068F 1407 BSF PORTC,0 +000690 3040 MOVLW 64 +000691 02C4 SUBWF GLCDX,F +000692 1087 BCF PORTC,1 + ENDIF31 +000693 0845 MOVF GLCDY,W +000694 00F5 MOVWF SYSBYTETEMPA +000695 3008 MOVLW 8 +000696 00F9 MOVWF SYSBYTETEMPB +000000 158A PAGESEL SYSDIVSUB +000000 158A 120A PAGESEL SYSDIVSUB +000699 20D0 CALL SYSDIVSUB +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +00069C 0875 MOVF SYSBYTETEMPA,W +00069D 00B1 MOVWF CURRPAGE +00069E 1009 BCF PORTE,0 +00069F 30B8 MOVLW 184 +0006A0 0431 IORWF CURRPAGE,W +0006A1 00C9 MOVWF LCDBYTE +0006A2 24C2 CALL GLCDWRITEBYTE_KS0108 + +0006A3 1009 BCF PORTE,0 +0006A4 3040 MOVLW 64 +0006A5 0444 IORWF GLCDX,W +0006A6 00C9 MOVWF LCDBYTE +0006A7 24C2 CALL GLCDWRITEBYTE_KS0108 + +0006A8 1409 BSF PORTE,0 +000000 158A PAGESEL FN_GLCDREADBYTE_KS0108 +000000 158A 120A PAGESEL FN_GLCDREADBYTE_KS0108 +0006AB 204C CALL FN_GLCDREADBYTE_KS0108 +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +0006AE 0842 MOVF GLCDREADBYTE_KS0108,W +0006AF 00BA MOVWF GLCDDATATEMP +0006B0 1409 BSF PORTE,0 +000000 158A PAGESEL FN_GLCDREADBYTE_KS0108 +000000 158A 120A PAGESEL FN_GLCDREADBYTE_KS0108 +0006B3 204C CALL FN_GLCDREADBYTE_KS0108 +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +0006B6 0842 MOVF GLCDREADBYTE_KS0108,W +0006B7 00BA MOVWF GLCDDATATEMP +0006B8 3007 MOVLW 7 +0006B9 0545 ANDWF GLCDY,W +0006BA 00B6 MOVWF GLCDBITNO +0006BB 1838 BTFSC GLCDCOLOUR,0 +0006BC 2EC1 GOTO ELSE32_1 +0006BD 30FE MOVLW 254 +0006BE 00B7 MOVWF GLCDCHANGE +0006BF 1403 BSF STATUS,C +0006C0 2EC4 GOTO ENDIF32 + ELSE32_1 +0006C1 3001 MOVLW 1 +0006C2 00B7 MOVWF GLCDCHANGE +0006C3 1003 BCF STATUS,C + ENDIF32 +0006C4 0836 MOVF GLCDBITNO,W +0006C5 00EE MOVWF SYSREPEATTEMP1 +0006C6 1903 BTFSC STATUS,Z +0006C7 2ECB GOTO SYSREPEATLOOPEND1 + SYSREPEATLOOP1 +0006C8 0DB7 RLF GLCDCHANGE,F +0006C9 0BEE DECFSZ SYSREPEATTEMP1,F +0006CA 2EC8 GOTO SYSREPEATLOOP1 + SYSREPEATLOOPEND1 +0006CB 1838 BTFSC GLCDCOLOUR,0 +0006CC 2ED1 GOTO ELSE33_1 +0006CD 083A MOVF GLCDDATATEMP,W +0006CE 0537 ANDWF GLCDCHANGE,W +0006CF 00BA MOVWF GLCDDATATEMP +0006D0 2ED4 GOTO ENDIF33 + ELSE33_1 +0006D1 083A MOVF GLCDDATATEMP,W +0006D2 0437 IORWF GLCDCHANGE,W +0006D3 00BA MOVWF GLCDDATATEMP + ENDIF33 +0006D4 1009 BCF PORTE,0 +0006D5 3040 MOVLW 64 +0006D6 0444 IORWF GLCDX,W +0006D7 00C9 MOVWF LCDBYTE +0006D8 24C2 CALL GLCDWRITEBYTE_KS0108 + +0006D9 1409 BSF PORTE,0 +0006DA 083A MOVF GLCDDATATEMP,W +0006DB 00C9 MOVWF LCDBYTE +0006DC 24C2 CALL GLCDWRITEBYTE_KS0108 + +0006DD 1007 BCF PORTC,0 +0006DE 1087 BCF PORTC,1 +0006DF 0008 RETURN + + + FN_STR +0006E0 01EA CLRF SYSCHARCOUNT +000000 1683 BANKSEL SYSVALTEMP +000000 1683 1303 BANKSEL SYSVALTEMP +0006E3 0821 MOVF SYSVALTEMP,W +0006E4 00F5 MOVWF SYSWORDTEMPA +0006E5 0822 MOVF SYSVALTEMP_H,W +0006E6 00F6 MOVWF SYSWORDTEMPA_H +0006E7 3010 MOVLW 16 +0006E8 00F9 MOVWF SYSWORDTEMPB +0006E9 3027 MOVLW 39 +0006EA 00FA MOVWF SYSWORDTEMPB_H +000000 1283 BANKSEL STATUS +000000 1283 1303 BANKSEL STATUS +0006ED 27B3 CALL SYSCOMPLESSTHAN16 +0006EE 09F0 COMF SYSBYTETEMPX,F +0006EF 1C70 BTFSS SYSBYTETEMPX,0 +0006F0 2F11 GOTO ENDIF61 +000000 1683 BANKSEL SYSVALTEMP +000000 1683 1303 BANKSEL SYSVALTEMP +0006F3 0821 MOVF SYSVALTEMP,W +0006F4 00F5 MOVWF SYSWORDTEMPA +0006F5 0822 MOVF SYSVALTEMP_H,W +0006F6 00F6 MOVWF SYSWORDTEMPA_H +0006F7 3010 MOVLW 16 +0006F8 00F9 MOVWF SYSWORDTEMPB +0006F9 3027 MOVLW 39 +0006FA 00FA MOVWF SYSWORDTEMPB_H +000000 1283 BANKSEL STATUS +000000 1283 1303 BANKSEL STATUS +0006FD 27C2 CALL SYSDIVSUB16 +0006FE 0875 MOVF SYSWORDTEMPA,W +0006FF 00EF MOVWF SYSSTRDATA +000700 0870 MOVF SYSCALCTEMPX,W +000000 1683 BANKSEL SYSVALTEMP +000000 1683 1303 BANKSEL SYSVALTEMP +000703 00A1 MOVWF SYSVALTEMP +000704 0871 MOVF SYSCALCTEMPX_H,W +000705 00A2 MOVWF SYSVALTEMP_H +000000 1283 BANKSEL SYSCHARCOUNT +000000 1283 1303 BANKSEL SYSCHARCOUNT +000708 0AEA INCF SYSCHARCOUNT,F +000709 30BF MOVLW LOW(STR) +00070A 076A ADDWF SYSCHARCOUNT,W +00070B 0084 MOVWF FSR +00070C 1783 BANKISEL STR +00070D 3030 MOVLW 48 +00070E 076F ADDWF SYSSTRDATA,W +00070F 0080 MOVWF INDF +000710 2F21 GOTO SYSVALTHOUSANDS + ENDIF61 +000000 1683 BANKSEL SYSVALTEMP +000000 1683 1303 BANKSEL SYSVALTEMP +000713 0821 MOVF SYSVALTEMP,W +000714 00F5 MOVWF SYSWORDTEMPA +000715 0822 MOVF SYSVALTEMP_H,W +000716 00F6 MOVWF SYSWORDTEMPA_H +000717 30E8 MOVLW 232 +000718 00F9 MOVWF SYSWORDTEMPB +000719 3003 MOVLW 3 +00071A 00FA MOVWF SYSWORDTEMPB_H +000000 1283 BANKSEL STATUS +000000 1283 1303 BANKSEL STATUS +00071D 27B3 CALL SYSCOMPLESSTHAN16 +00071E 09F0 COMF SYSBYTETEMPX,F +00071F 1C70 BTFSS SYSBYTETEMPX,0 +000720 2F41 GOTO ENDIF62 + SYSVALTHOUSANDS +000000 1683 BANKSEL SYSVALTEMP +000000 1683 1303 BANKSEL SYSVALTEMP +000723 0821 MOVF SYSVALTEMP,W +000724 00F5 MOVWF SYSWORDTEMPA +000725 0822 MOVF SYSVALTEMP_H,W +000726 00F6 MOVWF SYSWORDTEMPA_H +000727 30E8 MOVLW 232 +000728 00F9 MOVWF SYSWORDTEMPB +000729 3003 MOVLW 3 +00072A 00FA MOVWF SYSWORDTEMPB_H +000000 1283 BANKSEL STATUS +000000 1283 1303 BANKSEL STATUS +00072D 27C2 CALL SYSDIVSUB16 +00072E 0875 MOVF SYSWORDTEMPA,W +00072F 00EF MOVWF SYSSTRDATA +000730 0870 MOVF SYSCALCTEMPX,W +000000 1683 BANKSEL SYSVALTEMP +000000 1683 1303 BANKSEL SYSVALTEMP +000733 00A1 MOVWF SYSVALTEMP +000734 0871 MOVF SYSCALCTEMPX_H,W +000735 00A2 MOVWF SYSVALTEMP_H +000000 1283 BANKSEL SYSCHARCOUNT +000000 1283 1303 BANKSEL SYSCHARCOUNT +000738 0AEA INCF SYSCHARCOUNT,F +000739 30BF MOVLW LOW(STR) +00073A 076A ADDWF SYSCHARCOUNT,W +00073B 0084 MOVWF FSR +00073C 1783 BANKISEL STR +00073D 3030 MOVLW 48 +00073E 076F ADDWF SYSSTRDATA,W +00073F 0080 MOVWF INDF +000740 2F50 GOTO SYSVALHUNDREDS + ENDIF62 +000000 1683 BANKSEL SYSVALTEMP +000000 1683 1303 BANKSEL SYSVALTEMP +000743 0821 MOVF SYSVALTEMP,W +000744 00F5 MOVWF SYSWORDTEMPA +000745 0822 MOVF SYSVALTEMP_H,W +000746 00F6 MOVWF SYSWORDTEMPA_H +000747 3064 MOVLW 100 +000748 00F9 MOVWF SYSWORDTEMPB +000749 01FA CLRF SYSWORDTEMPB_H +000000 1283 BANKSEL STATUS +000000 1283 1303 BANKSEL STATUS +00074C 27B3 CALL SYSCOMPLESSTHAN16 +00074D 09F0 COMF SYSBYTETEMPX,F +00074E 1C70 BTFSS SYSBYTETEMPX,0 +00074F 2F6F GOTO ENDIF63 + SYSVALHUNDREDS +000000 1683 BANKSEL SYSVALTEMP +000000 1683 1303 BANKSEL SYSVALTEMP +000752 0821 MOVF SYSVALTEMP,W +000753 00F5 MOVWF SYSWORDTEMPA +000754 0822 MOVF SYSVALTEMP_H,W +000755 00F6 MOVWF SYSWORDTEMPA_H +000756 3064 MOVLW 100 +000757 00F9 MOVWF SYSWORDTEMPB +000758 01FA CLRF SYSWORDTEMPB_H +000000 1283 BANKSEL STATUS +000000 1283 1303 BANKSEL STATUS +00075B 27C2 CALL SYSDIVSUB16 +00075C 0875 MOVF SYSWORDTEMPA,W +00075D 00EF MOVWF SYSSTRDATA +00075E 0870 MOVF SYSCALCTEMPX,W +000000 1683 BANKSEL SYSVALTEMP +000000 1683 1303 BANKSEL SYSVALTEMP +000761 00A1 MOVWF SYSVALTEMP +000762 0871 MOVF SYSCALCTEMPX_H,W +000763 00A2 MOVWF SYSVALTEMP_H +000000 1283 BANKSEL SYSCHARCOUNT +000000 1283 1303 BANKSEL SYSCHARCOUNT +000766 0AEA INCF SYSCHARCOUNT,F +000767 30BF MOVLW LOW(STR) +000768 076A ADDWF SYSCHARCOUNT,W +000769 0084 MOVWF FSR +00076A 1783 BANKISEL STR +00076B 3030 MOVLW 48 +00076C 076F ADDWF SYSSTRDATA,W +00076D 0080 MOVWF INDF +00076E 2F7E GOTO SYSVALTENS + ENDIF63 +000000 1683 BANKSEL SYSVALTEMP +000000 1683 1303 BANKSEL SYSVALTEMP +000771 0821 MOVF SYSVALTEMP,W +000772 00F5 MOVWF SYSWORDTEMPA +000773 0822 MOVF SYSVALTEMP_H,W +000774 00F6 MOVWF SYSWORDTEMPA_H +000775 300A MOVLW 10 +000776 00F9 MOVWF SYSWORDTEMPB +000777 01FA CLRF SYSWORDTEMPB_H +000000 1283 BANKSEL STATUS +000000 1283 1303 BANKSEL STATUS +00077A 27B3 CALL SYSCOMPLESSTHAN16 +00077B 09F0 COMF SYSBYTETEMPX,F +00077C 1C70 BTFSS SYSBYTETEMPX,0 +00077D 2F9C GOTO ENDIF64 + SYSVALTENS +000000 1683 BANKSEL SYSVALTEMP +000000 1683 1303 BANKSEL SYSVALTEMP +000780 0821 MOVF SYSVALTEMP,W +000781 00F5 MOVWF SYSWORDTEMPA +000782 0822 MOVF SYSVALTEMP_H,W +000783 00F6 MOVWF SYSWORDTEMPA_H +000784 300A MOVLW 10 +000785 00F9 MOVWF SYSWORDTEMPB +000786 01FA CLRF SYSWORDTEMPB_H +000000 1283 BANKSEL STATUS +000000 1283 1303 BANKSEL STATUS +000789 27C2 CALL SYSDIVSUB16 +00078A 0875 MOVF SYSWORDTEMPA,W +00078B 00EF MOVWF SYSSTRDATA +00078C 0870 MOVF SYSCALCTEMPX,W +000000 1683 BANKSEL SYSVALTEMP +000000 1683 1303 BANKSEL SYSVALTEMP +00078F 00A1 MOVWF SYSVALTEMP +000790 0871 MOVF SYSCALCTEMPX_H,W +000791 00A2 MOVWF SYSVALTEMP_H +000000 1283 BANKSEL SYSCHARCOUNT +000000 1283 1303 BANKSEL SYSCHARCOUNT +000794 0AEA INCF SYSCHARCOUNT,F +000795 30BF MOVLW LOW(STR) +000796 076A ADDWF SYSCHARCOUNT,W +000797 0084 MOVWF FSR +000798 1783 BANKISEL STR +000799 3030 MOVLW 48 +00079A 076F ADDWF SYSSTRDATA,W +00079B 0080 MOVWF INDF + ENDIF64 +00079C 0AEA INCF SYSCHARCOUNT,F +00079D 30BF MOVLW LOW(STR) +00079E 076A ADDWF SYSCHARCOUNT,W +00079F 0084 MOVWF FSR +0007A0 1783 BANKISEL STR +0007A1 3030 MOVLW 48 +000000 1683 BANKSEL SYSVALTEMP +000000 1683 1303 BANKSEL SYSVALTEMP +0007A4 0721 ADDWF SYSVALTEMP,W +0007A5 0080 MOVWF INDF +0007A6 0870 MOVF SYSCALCTEMPX,W +0007A7 00A1 MOVWF SYSVALTEMP +0007A8 0871 MOVF SYSCALCTEMPX_H,W +0007A9 00A2 MOVWF SYSVALTEMP_H +000000 1283 BANKSEL SYSCHARCOUNT +000000 1283 1303 BANKSEL SYSCHARCOUNT +0007AC 086A MOVF SYSCHARCOUNT,W +000000 1683 BANKSEL SYSSTR_0 +000000 1683 1703 BANKSEL SYSSTR_0 +0007AF 00BF MOVWF SYSSTR_0 +000000 1283 BANKSEL STATUS +000000 1283 1303 BANKSEL STATUS +0007B2 0008 RETURN + + + SYSCOMPLESSTHAN16 +0007B3 01F0 CLRF SYSBYTETEMPX +0007B4 0876 MOVF SYSWORDTEMPA_H,W +0007B5 027A SUBWF SYSWORDTEMPB_H,W +0007B6 1C03 BTFSS STATUS,C +0007B7 0008 RETURN +0007B8 087A MOVF SYSWORDTEMPB_H,W +0007B9 0276 SUBWF SYSWORDTEMPA_H,W +0007BA 1C03 BTFSS STATUS,C +0007BB 2FC0 GOTO SCLT16TRUE +0007BC 0879 MOVF SYSWORDTEMPB,W +0007BD 0275 SUBWF SYSWORDTEMPA,W +0007BE 1803 BTFSC STATUS,C +0007BF 0008 RETURN + SCLT16TRUE +0007C0 09F0 COMF SYSBYTETEMPX,F +0007C1 0008 RETURN + + + SYSDIVSUB16 +0007C2 0875 MOVF SYSWORDTEMPA,W +0007C3 00F7 MOVWF SYSDIVMULTA +0007C4 0876 MOVF SYSWORDTEMPA_H,W +0007C5 00F8 MOVWF SYSDIVMULTA_H +0007C6 0879 MOVF SYSWORDTEMPB,W +0007C7 00FB MOVWF SYSDIVMULTB +0007C8 087A MOVF SYSWORDTEMPB_H,W +0007C9 00FC MOVWF SYSDIVMULTB_H +0007CA 01F2 CLRF SYSDIVMULTX +0007CB 01F3 CLRF SYSDIVMULTX_H +0007CC 087B MOVF SYSDIVMULTB,W +0007CD 00F5 MOVWF SYSWORDTEMPA +0007CE 087C MOVF SYSDIVMULTB_H,W +0007CF 00F6 MOVWF SYSWORDTEMPA_H +0007D0 01F9 CLRF SYSWORDTEMPB +0007D1 01FA CLRF SYSWORDTEMPB_H +000000 158A PAGESEL SYSCOMPEQUAL16 +000000 158A 120A PAGESEL SYSCOMPEQUAL16 +0007D4 2094 CALL SYSCOMPEQUAL16 +000000 118A PAGESEL $ +000000 118A 120A PAGESEL $ +0007D7 1C70 BTFSS SYSBYTETEMPX,0 +0007D8 2FDC GOTO ENDIF67 +0007D9 01F5 CLRF SYSWORDTEMPA +0007DA 01F6 CLRF SYSWORDTEMPA_H +0007DB 0008 RETURN + ENDIF67 +0007DC 3010 MOVLW 16 +0007DD 00F4 MOVWF SYSDIVLOOP + SYSDIV16START +0007DE 1003 BCF STATUS,C +0007DF 0DF7 RLF SYSDIVMULTA,F +0007E0 0DF8 RLF SYSDIVMULTA_H,F +0007E1 0DF2 RLF SYSDIVMULTX,F +0007E2 0DF3 RLF SYSDIVMULTX_H,F +0007E3 087B MOVF SYSDIVMULTB,W +0007E4 02F2 SUBWF SYSDIVMULTX,F +0007E5 087C MOVF SYSDIVMULTB_H,W +0007E6 1C03 BTFSS STATUS,C +0007E7 3E01 ADDLW 1 +0007E8 02F3 SUBWF SYSDIVMULTX_H,F +0007E9 1477 BSF SYSDIVMULTA,0 +0007EA 1803 BTFSC STATUS,C +0007EB 2FF3 GOTO ENDIF68 +0007EC 1077 BCF SYSDIVMULTA,0 +0007ED 087B MOVF SYSDIVMULTB,W +0007EE 07F2 ADDWF SYSDIVMULTX,F +0007EF 087C MOVF SYSDIVMULTB_H,W +0007F0 1803 BTFSC STATUS,C +0007F1 3E01 ADDLW 1 +0007F2 07F3 ADDWF SYSDIVMULTX_H,F + ENDIF68 +0007F3 0BF4 DECFSZ SYSDIVLOOP, F +0007F4 2FDE GOTO SYSDIV16START +0007F5 0877 MOVF SYSDIVMULTA,W +0007F6 00F5 MOVWF SYSWORDTEMPA +0007F7 0878 MOVF SYSDIVMULTA_H,W +0007F8 00F6 MOVWF SYSWORDTEMPA_H +0007F9 0872 MOVF SYSDIVMULTX,W +0007FA 00F0 MOVWF SYSWORDTEMPX +0007FB 0873 MOVF SYSDIVMULTX_H,W +0007FC 00F1 MOVWF SYSWORDTEMPX_H +0007FD 0008 RETURN + + + + DELAY_MS +000800 0AF3 INCF SYSWAITTEMPMS_H, F + DMS_START +000801 306C MOVLW 108 +000802 00F1 MOVWF DELAYTEMP2 + DMS_OUTER +000803 300B MOVLW 11 +000804 00F0 MOVWF DELAYTEMP + DMS_INNER +000805 0BF0 DECFSZ DELAYTEMP, F +000806 2805 GOTO DMS_INNER +000807 0BF1 DECFSZ DELAYTEMP2, F +000808 2803 GOTO DMS_OUTER +000809 0BF2 DECFSZ SYSWAITTEMPMS, F +00080A 2801 GOTO DMS_START +00080B 0BF3 DECFSZ SYSWAITTEMPMS_H, F +00080C 2801 GOTO DMS_START +00080D 0008 RETURN + + + DELAY_S + DS_START +00080E 30E8 MOVLW 232 +00080F 00F2 MOVWF SYSWAITTEMPMS +000810 3003 MOVLW 3 +000811 00F3 MOVWF SYSWAITTEMPMS_H +000812 2000 CALL DELAY_MS + +000813 0BF4 DECFSZ SYSWAITTEMPS, F +000814 280E GOTO DS_START +000815 0008 RETURN + + + GLCDCLS_KS0108 +000816 01C7 CLRF GLCD_YORDINATE +000817 01C8 CLRF GLCD_YORDINATE_H +000818 1407 BSF PORTC,0 +000819 1087 BCF PORTC,1 +00081A 01C6 CLRF GLCD_COUNT + SYSFORLOOP10 +00081B 0AC6 INCF GLCD_COUNT,F +00081C 30FF MOVLW 255 +00081D 00B1 MOVWF CURRPAGE + SYSFORLOOP11 +00081E 0AB1 INCF CURRPAGE,F +00081F 1009 BCF PORTE,0 +000820 30B8 MOVLW 184 +000821 0431 IORWF CURRPAGE,W +000822 00C9 MOVWF LCDBYTE +000000 118A PAGESEL GLCDWRITEBYTE_KS0108 +000000 118A 120A PAGESEL GLCDWRITEBYTE_KS0108 +000825 24C2 CALL GLCDWRITEBYTE_KS0108 +000000 158A PAGESEL $ +000000 158A 120A PAGESEL $ + +000828 30FF MOVLW 255 +000829 00B0 MOVWF CURRCOL + SYSFORLOOP12 +00082A 0AB0 INCF CURRCOL,F +00082B 1009 BCF PORTE,0 +00082C 3040 MOVLW 64 +00082D 0430 IORWF CURRCOL,W +00082E 00C9 MOVWF LCDBYTE +000000 118A PAGESEL GLCDWRITEBYTE_KS0108 +000000 118A 120A PAGESEL GLCDWRITEBYTE_KS0108 +000831 24C2 CALL GLCDWRITEBYTE_KS0108 +000000 158A PAGESEL $ +000000 158A 120A PAGESEL $ + +000834 1409 BSF PORTE,0 +000835 01C9 CLRF LCDBYTE +000000 118A PAGESEL GLCDWRITEBYTE_KS0108 +000000 118A 120A PAGESEL GLCDWRITEBYTE_KS0108 +000838 24C2 CALL GLCDWRITEBYTE_KS0108 +000000 158A PAGESEL $ +000000 158A 120A PAGESEL $ + +00083B 303F MOVLW 63 +00083C 0230 SUBWF CURRCOL,W +00083D 1C03 BTFSS STATUS, C +00083E 282A GOTO SYSFORLOOP12 + SYSFORLOOPEND12 +00083F 3007 MOVLW 7 +000840 0231 SUBWF CURRPAGE,W +000841 1C03 BTFSS STATUS, C +000842 281E GOTO SYSFORLOOP11 + SYSFORLOOPEND11 +000843 1007 BCF PORTC,0 +000844 1487 BSF PORTC,1 +000845 3002 MOVLW 2 +000846 0246 SUBWF GLCD_COUNT,W +000847 1C03 BTFSS STATUS, C +000848 281B GOTO SYSFORLOOP10 + SYSFORLOOPEND10 +000849 1007 BCF PORTC,0 +00084A 1087 BCF PORTC,1 +00084B 0008 RETURN + + + FN_GLCDREADBYTE_KS0108 +000000 1683 BANKSEL TRISD +000000 1683 1303 BANKSEL TRISD +00084E 1788 BSF TRISD,7 +00084F 1708 BSF TRISD,6 +000850 1688 BSF TRISD,5 +000851 1608 BSF TRISD,4 +000852 1588 BSF TRISD,3 +000853 1508 BSF TRISD,2 +000854 1488 BSF TRISD,1 +000855 1408 BSF TRISD,0 +000000 1283 BANKSEL PORTE +000000 1283 1303 BANKSEL PORTE +000858 1489 BSF PORTE,1 +000859 1509 BSF PORTE,2 +00085A 3002 MOVLW 2 +00085B 00F0 MOVWF DELAYTEMP + DELAYUS1 +00085C 0BF0 DECFSZ DELAYTEMP,F +00085D 285C GOTO DELAYUS1 +00085E 0000 NOP +00085F 13C2 BCF GLCDREADBYTE_KS0108,7 +000860 1B88 BTFSC PORTD,7 +000861 17C2 BSF GLCDREADBYTE_KS0108,7 +000862 1342 BCF GLCDREADBYTE_KS0108,6 +000863 1B08 BTFSC PORTD,6 +000864 1742 BSF GLCDREADBYTE_KS0108,6 +000865 12C2 BCF GLCDREADBYTE_KS0108,5 +000866 1A88 BTFSC PORTD,5 +000867 16C2 BSF GLCDREADBYTE_KS0108,5 +000868 1242 BCF GLCDREADBYTE_KS0108,4 +000869 1A08 BTFSC PORTD,4 +00086A 1642 BSF GLCDREADBYTE_KS0108,4 +00086B 11C2 BCF GLCDREADBYTE_KS0108,3 +00086C 1988 BTFSC PORTD,3 +00086D 15C2 BSF GLCDREADBYTE_KS0108,3 +00086E 1142 BCF GLCDREADBYTE_KS0108,2 +00086F 1908 BTFSC PORTD,2 +000870 1542 BSF GLCDREADBYTE_KS0108,2 +000871 10C2 BCF GLCDREADBYTE_KS0108,1 +000872 1888 BTFSC PORTD,1 +000873 14C2 BSF GLCDREADBYTE_KS0108,1 +000874 1042 BCF GLCDREADBYTE_KS0108,0 +000875 1808 BTFSC PORTD,0 +000876 1442 BSF GLCDREADBYTE_KS0108,0 +000877 1109 BCF PORTE,2 +000878 3002 MOVLW 2 +000879 00F0 MOVWF DELAYTEMP + DELAYUS2 +00087A 0BF0 DECFSZ DELAYTEMP,F +00087B 287A GOTO DELAYUS2 +00087C 0000 NOP +00087D 0008 RETURN + + + INITSYS +000000 1683 BANKSEL ADCON1 +000000 1683 1303 BANKSEL ADCON1 +000880 139F BCF ADCON1,ADFM +000000 1283 BANKSEL ADCON0 +000000 1283 1303 BANKSEL ADCON0 +000883 101F BCF ADCON0,ADON +000000 1683 BANKSEL ADCON1 +000000 1683 1303 BANKSEL ADCON1 +000886 119F BCF ADCON1,PCFG3 +000887 151F BSF ADCON1,PCFG2 +000888 149F BSF ADCON1,PCFG1 +000889 101F BCF ADCON1,PCFG0 +00088A 3007 MOVLW 7 +00088B 009C MOVWF CMCON +000000 1283 BANKSEL PORTA +000000 1283 1303 BANKSEL PORTA +00088E 0185 CLRF PORTA +00088F 0186 CLRF PORTB +000890 0187 CLRF PORTC +000891 0188 CLRF PORTD +000892 0189 CLRF PORTE +000893 0008 RETURN + + + SYSCOMPEQUAL16 +000894 01F0 CLRF SYSBYTETEMPX +000895 0875 MOVF SYSWORDTEMPA, W +000896 0279 SUBWF SYSWORDTEMPB, W +000897 1D03 BTFSS STATUS, Z +000898 0008 RETURN +000899 0876 MOVF SYSWORDTEMPA_H, W +00089A 027A SUBWF SYSWORDTEMPB_H, W +00089B 1D03 BTFSS STATUS, Z +00089C 0008 RETURN +00089D 09F0 COMF SYSBYTETEMPX,F +00089E 0008 RETURN + + + SYSCOMPLESSTHAN +00089F 01F0 CLRF SYSBYTETEMPX +0008A0 1403 BSF STATUS, C +0008A1 0879 MOVF SYSBYTETEMPB, W +0008A2 0275 SUBWF SYSBYTETEMPA, W +0008A3 1C03 BTFSS STATUS, C +0008A4 09F0 COMF SYSBYTETEMPX,F +0008A5 0008 RETURN + + + SYSCOMPLESSTHANINT +0008A6 01F0 CLRF SYSBYTETEMPX +0008A7 1FF6 BTFSS SYSINTEGERTEMPA_H,7 +0008A8 28C0 GOTO ELSE58_1 +0008A9 1BFA BTFSC SYSINTEGERTEMPB_H,7 +0008AA 28AD GOTO ENDIF59 +0008AB 09F0 COMF SYSBYTETEMPX,F +0008AC 0008 RETURN + ENDIF59 +0008AD 0975 COMF SYSINTEGERTEMPA,W +0008AE 00F7 MOVWF SYSDIVMULTA +0008AF 0976 COMF SYSINTEGERTEMPA_H,W +0008B0 00F8 MOVWF SYSDIVMULTA_H +0008B1 0AF7 INCF SYSDIVMULTA,F +0008B2 1903 BTFSC STATUS,Z +0008B3 0AF8 INCF SYSDIVMULTA_H,F +0008B4 0979 COMF SYSINTEGERTEMPB,W +0008B5 00F5 MOVWF SYSINTEGERTEMPA +0008B6 097A COMF SYSINTEGERTEMPB_H,W +0008B7 00F6 MOVWF SYSINTEGERTEMPA_H +0008B8 0AF5 INCF SYSINTEGERTEMPA,F +0008B9 1903 BTFSC STATUS,Z +0008BA 0AF6 INCF SYSINTEGERTEMPA_H,F +0008BB 0877 MOVF SYSDIVMULTA,W +0008BC 00F9 MOVWF SYSINTEGERTEMPB +0008BD 0878 MOVF SYSDIVMULTA_H,W +0008BE 00FA MOVWF SYSINTEGERTEMPB_H +0008BF 28C2 GOTO ENDIF58 + ELSE58_1 +0008C0 1BFA BTFSC SYSINTEGERTEMPB_H,7 +0008C1 0008 RETURN + ENDIF58 +0008C2 0876 MOVF SYSINTEGERTEMPA_H,W +0008C3 027A SUBWF SYSINTEGERTEMPB_H,W +0008C4 1C03 BTFSS STATUS,C +0008C5 0008 RETURN +0008C6 087A MOVF SYSINTEGERTEMPB_H,W +0008C7 0276 SUBWF SYSINTEGERTEMPA_H,W +0008C8 1C03 BTFSS STATUS,C +0008C9 28CE GOTO SCLTINTTRUE +0008CA 0879 MOVF SYSINTEGERTEMPB,W +0008CB 0275 SUBWF SYSINTEGERTEMPA,W +0008CC 1803 BTFSC STATUS,C +0008CD 0008 RETURN + SCLTINTTRUE +0008CE 09F0 COMF SYSBYTETEMPX,F +0008CF 0008 RETURN + + + SYSDIVSUB +0008D0 08F9 MOVF SYSBYTETEMPB, F +0008D1 1903 BTFSC STATUS, Z +0008D2 0008 RETURN +0008D3 01F0 CLRF SYSBYTETEMPX +0008D4 3008 MOVLW 8 +0008D5 00F4 MOVWF SYSDIVLOOP + SYSDIV8START +0008D6 1003 BCF STATUS, C +0008D7 0DF5 RLF SYSBYTETEMPA, F +0008D8 0DF0 RLF SYSBYTETEMPX, F +0008D9 0879 MOVF SYSBYTETEMPB, W +0008DA 02F0 SUBWF SYSBYTETEMPX, F +0008DB 1475 BSF SYSBYTETEMPA, 0 +0008DC 1803 BTFSC STATUS, C +0008DD 28E1 GOTO DIV8NOTNEG +0008DE 1075 BCF SYSBYTETEMPA, 0 +0008DF 0879 MOVF SYSBYTETEMPB, W +0008E0 07F0 ADDWF SYSBYTETEMPX, F + DIV8NOTNEG +0008E1 0BF4 DECFSZ SYSDIVLOOP, F +0008E2 28D6 GOTO SYSDIV8START +0008E3 0008 RETURN + + + SYSMULTSUB +0008E4 01F0 CLRF SYSBYTETEMPX + MUL8LOOP +0008E5 0875 MOVF SYSBYTETEMPA, W +0008E6 1879 BTFSC SYSBYTETEMPB, 0 +0008E7 07F0 ADDWF SYSBYTETEMPX, F +0008E8 1003 BCF STATUS, C +0008E9 0CF9 RRF SYSBYTETEMPB, F +0008EA 1003 BCF STATUS, C +0008EB 0DF5 RLF SYSBYTETEMPA, F +0008EC 08F9 MOVF SYSBYTETEMPB, F +0008ED 1D03 BTFSS STATUS, Z +0008EE 28E5 GOTO MUL8LOOP +0008EF 0008 RETURN + + + SYSMULTSUB16 +0008F0 0875 MOVF SYSWORDTEMPA,W +0008F1 00F7 MOVWF SYSDIVMULTA +0008F2 0876 MOVF SYSWORDTEMPA_H,W +0008F3 00F8 MOVWF SYSDIVMULTA_H +0008F4 0879 MOVF SYSWORDTEMPB,W +0008F5 00FB MOVWF SYSDIVMULTB +0008F6 087A MOVF SYSWORDTEMPB_H,W +0008F7 00FC MOVWF SYSDIVMULTB_H +0008F8 01F2 CLRF SYSDIVMULTX +0008F9 01F3 CLRF SYSDIVMULTX_H + MUL16LOOP +0008FA 1C7B BTFSS SYSDIVMULTB,0 +0008FB 2902 GOTO ENDIF65 +0008FC 0877 MOVF SYSDIVMULTA,W +0008FD 07F2 ADDWF SYSDIVMULTX,F +0008FE 0878 MOVF SYSDIVMULTA_H,W +0008FF 1803 BTFSC STATUS,C +000900 3E01 ADDLW 1 +000901 07F3 ADDWF SYSDIVMULTX_H,F + ENDIF65 +000902 1003 BCF STATUS,C +000903 0CFC RRF SYSDIVMULTB_H,F +000904 0CFB RRF SYSDIVMULTB,F +000905 1003 BCF STATUS,C +000906 0DF7 RLF SYSDIVMULTA,F +000907 0DF8 RLF SYSDIVMULTA_H,F +000908 087B MOVF SYSDIVMULTB,W +000909 00F9 MOVWF SYSWORDTEMPB +00090A 087C MOVF SYSDIVMULTB_H,W +00090B 00FA MOVWF SYSWORDTEMPB_H +00090C 01F5 CLRF SYSWORDTEMPA +00090D 01F6 CLRF SYSWORDTEMPA_H +000000 118A PAGESEL SYSCOMPLESSTHAN16 +000000 118A 120A PAGESEL SYSCOMPLESSTHAN16 +000910 27B3 CALL SYSCOMPLESSTHAN16 +000000 158A PAGESEL $ +000000 158A 120A PAGESEL $ +000913 1870 BTFSC SYSBYTETEMPX,0 +000914 28FA GOTO MUL16LOOP +000915 0872 MOVF SYSDIVMULTX,W +000916 00F0 MOVWF SYSWORDTEMPX +000917 0873 MOVF SYSDIVMULTX_H,W +000918 00F1 MOVWF SYSWORDTEMPX_H +000919 0008 RETURN + + + SYSMULTSUBINT +00091A 0876 MOVF SYSINTEGERTEMPA_H,W +00091B 067A XORWF SYSINTEGERTEMPB_H,W +00091C 00FD MOVWF SYSSIGNBYTE +00091D 1FF6 BTFSS SYSINTEGERTEMPA_H,7 +00091E 2924 GOTO ENDIF55 +00091F 09F5 COMF SYSINTEGERTEMPA,F +000920 09F6 COMF SYSINTEGERTEMPA_H,F +000921 0AF5 INCF SYSINTEGERTEMPA,F +000922 1903 BTFSC STATUS,Z +000923 0AF6 INCF SYSINTEGERTEMPA_H,F + ENDIF55 +000924 1FFA BTFSS SYSINTEGERTEMPB_H,7 +000925 292B GOTO ENDIF56 +000926 09F9 COMF SYSINTEGERTEMPB,F +000927 09FA COMF SYSINTEGERTEMPB_H,F +000928 0AF9 INCF SYSINTEGERTEMPB,F +000929 1903 BTFSC STATUS,Z +00092A 0AFA INCF SYSINTEGERTEMPB_H,F + ENDIF56 +00092B 20F0 CALL SYSMULTSUB16 + +00092C 1FFD BTFSS SYSSIGNBYTE,7 +00092D 2933 GOTO ENDIF57 +00092E 09F0 COMF SYSINTEGERTEMPX,F +00092F 09F1 COMF SYSINTEGERTEMPX_H,F +000930 0AF0 INCF SYSINTEGERTEMPX,F +000931 1903 BTFSC STATUS,Z +000932 0AF1 INCF SYSINTEGERTEMPX_H,F + ENDIF57 +000933 0008 RETURN + + + SYSREADSTRING +000934 0872 MOVF SYSSTRINGB, W +000935 0084 MOVWF FSR +000936 1383 BCF STATUS, IRP +000937 1873 BTFSC SYSSTRINGB_H, 0 +000938 1783 BSF STATUS, IRP +000939 2150 CALL SYSSTRINGTABLES +00093A 00F5 MOVWF SYSCALCTEMPA +00093B 0080 MOVWF INDF +00093C 07F2 ADDWF SYSSTRINGB, F +00093D 2947 GOTO SYSSTRINGREADCHECK + SYSREADSTRINGPART +00093E 0872 MOVF SYSSTRINGB, W +00093F 0084 MOVWF FSR +000940 1383 BCF STATUS, IRP +000941 1873 BTFSC SYSSTRINGB_H, 0 +000942 1783 BSF STATUS, IRP +000943 2150 CALL SYSSTRINGTABLES +000944 00F5 MOVWF SYSCALCTEMPA +000945 07F6 ADDWF SYSSTRINGLENGTH,F +000946 07F2 ADDWF SYSSTRINGB,F + SYSSTRINGREADCHECK +000947 08F5 MOVF SYSCALCTEMPA,F +000948 1903 BTFSC STATUS,Z +000949 0008 RETURN + SYSSTRINGREAD +00094A 2150 CALL SYSSTRINGTABLES +00094B 0A84 INCF FSR, F +00094C 0080 MOVWF INDF +00094D 0BF5 DECFSZ SYSCALCTEMPA, F +00094E 294A GOTO SYSSTRINGREAD +00094F 0008 RETURN + + + SYSSTRINGTABLES +000950 0878 MOVF SYSSTRINGA_H,W +000951 008A MOVWF PCLATH +000952 0877 MOVF SYSSTRINGA,W +000953 0AF7 INCF SYSSTRINGA,F +000954 1903 BTFSC STATUS,Z +000955 0AF8 INCF SYSSTRINGA_H,F +000956 0082 MOVWF PCL + + STRINGTABLE1 +000957 3405 RETLW 5 +000958 3448 RETLW 72 +000959 3465 RETLW 101 +00095A 346C RETLW 108 +00095B 346C RETLW 108 +00095C 346F RETLW 111 + + + STRINGTABLE2 +00095D 3408 RETLW 8 +00095E 3441 RETLW 65 +00095F 3453 RETLW 83 +000960 3443 RETLW 67 +000961 3449 RETLW 73 +000962 3449 RETLW 73 +000963 3420 RETLW 32 +000964 3423 RETLW 35 +000965 343A RETLW 58 + + + + + diff --git a/resources/examples/Pic/ks0108_p16f877a/ks0183_p16f877a.simu b/resources/examples/Pic/ks0108_p16f877a/ks0183_p16f877a.simu new file mode 100644 index 0000000..35955ee --- /dev/null +++ b/resources/examples/Pic/ks0108_p16f877a/ks0183_p16f877a.simu @@ -0,0 +1,63 @@ + + +Ks0108-3: + + +pic16f877a-2: + + +Rail.-1: + + +Connector-4: + + +Connector-6: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +PlotterWidget: + + +SerialPortWidget: + + + diff --git a/resources/examples/Pic/ks0108_p18f4550/KS0108_18f4550.asm b/resources/examples/Pic/ks0108_p18f4550/KS0108_18f4550.asm new file mode 100644 index 0000000..7e891dd --- /dev/null +++ b/resources/examples/Pic/ks0108_p18f4550/KS0108_18f4550.asm @@ -0,0 +1,1267 @@ +;Program compiled by Great Cow BASIC (0.96.<<>> 2016-12-14) +;Need help? See the GCBASIC forums at http://sourceforge.net/projects/gcbasic/forums, +;check the documentation or email w_cholmondeley at users dot sourceforge dot net. + +;******************************************************************************** + +;Set up the assembler options (Chip type, clock source, other bits and pieces) + LIST p=18F4550, r=DEC +#include + CONFIG LVP = OFF, MCLRE = OFF, WDT = OFF, FOSC = HS + +;******************************************************************************** + +;Set aside memory locations for variables +CURRCHARROW EQU 11 +CURRCOL EQU 12 +CURRPAGE EQU 13 +DELAYTEMP EQU 0 +DELAYTEMP2 EQU 1 +GLCDBACKGROUND EQU 14 +GLCDBACKGROUND_H EQU 15 +GLCDBITNO EQU 16 +GLCDCHANGE EQU 17 +GLCDCOLOUR EQU 18 +GLCDCOLOUR_H EQU 19 +GLCDDATATEMP EQU 20 +GLCDFNTDEFAULT EQU 21 +GLCDFNTDEFAULTSIZE EQU 22 +GLCDFONTWIDTH EQU 23 +GLCDFOREGROUND EQU 24 +GLCDFOREGROUND_H EQU 25 +GLCDREADBYTE_KS0108 EQU 26 +GLCDX EQU 27 +GLCDXPOS EQU 28 +GLCDY EQU 29 +GLCDYPOS EQU 30 +GLCD_COUNT EQU 31 +GLCD_YORDINATE EQU 32 +GLCD_YORDINATE_H EQU 33 +HCOUNT EQU 34 +LASTIMG EQU 35 +LCDBYTE EQU 36 +MAXHEIGHT EQU 37 +OBJHEIGHT EQU 38 +OBJWIDTH EQU 39 +OLDGLCDXPOS EQU 40 +ONPAGEBOUNDARY EQU 41 +OPTMISEGLCDDRAW EQU 42 +SELECTEDTABLE EQU 43 +SELECTEDTABLE_H EQU 44 +SYSBITVAR0 EQU 45 +SYSBYTETEMPA EQU 5 +SYSBYTETEMPB EQU 9 +SYSBYTETEMPX EQU 0 +SYSDIVLOOP EQU 4 +SYSREPEATTEMP1 EQU 46 +SYSSTRINGA EQU 7 +SYSSTRINGA_H EQU 8 +SYSTEMP1 EQU 47 +SYSTEMP2 EQU 48 +SYSWAITTEMPMS EQU 2 +SYSWAITTEMPMS_H EQU 3 +SYSWAITTEMPUS EQU 5 +SYSWAITTEMPUS_H EQU 6 +SYSWORDTEMPA EQU 5 +SYSWORDTEMPA_H EQU 6 +SYSWORDTEMPB EQU 9 +SYSWORDTEMPB_H EQU 10 +TABLEREADPOSITION EQU 49 +TABLEREADPOSITION_H EQU 50 +WBYTE EQU 51 +WHOLEYBYTES EQU 52 +WIDTHCOUNT EQU 53 + +;******************************************************************************** + +;Vectors + ORG 0 + goto BASPROGRAMSTART + ORG 8 + retfie + +;******************************************************************************** + +;Start of program memory page 0 + ORG 12 +BASPROGRAMSTART +;Call initialisation routines + call INITSYS + call INITGLCD_KS0108 +;Automatic pin direction setting + bsf TRISB,0,ACCESS + +;Start of the main program + clrf OPTMISEGLCDDRAW,BANKED + movlw 2 + movwf LASTIMG,BANKED +SysDoLoop_S1 + btfsc PORTB,0,ACCESS + bra ENDIF1 + movf LASTIMG,F,BANKED + btfsc STATUS, Z,ACCESS + bra ENDIF3 + rcall GLCDCLS_KS0108 + + movlw 34 + movwf GLCDXPOS,BANKED + clrf GLCDYPOS,BANKED + movlw low(GLCDTABLE1) + movwf SELECTEDTABLE,BANKED + movlw high(GLCDTABLE1) + movwf SELECTEDTABLE_H,BANKED + rcall GLCDBMPLOAD + + movlw 238 + movwf SysWaitTempMS,ACCESS + movlw 2 + movwf SysWaitTempMS_H,ACCESS + rcall Delay_MS +ENDIF3 + clrf LASTIMG,BANKED +ENDIF1 + btfss PORTB,0,ACCESS + bra ENDIF2 + decf LASTIMG,W,BANKED + btfsc STATUS, Z,ACCESS + bra ENDIF4 + rcall GLCDCLS_KS0108 + + movlw 20 + movwf GLCDXPOS,BANKED + clrf GLCDYPOS,BANKED + movlw low(GLCDTABLE2) + movwf SELECTEDTABLE,BANKED + movlw high(GLCDTABLE2) + movwf SELECTEDTABLE_H,BANKED + rcall GLCDBMPLOAD + + movlw 238 + movwf SysWaitTempMS,ACCESS + movlw 2 + movwf SysWaitTempMS_H,ACCESS + rcall Delay_MS +ENDIF4 + movlw 1 + movwf LASTIMG,BANKED +ENDIF2 + bra SysDoLoop_S1 +SysDoLoop_E1 + bra BASPROGRAMEND +BASPROGRAMEND + sleep + bra BASPROGRAMEND + +;******************************************************************************** + +Delay_MS + incf SysWaitTempMS_H, F,ACCESS +DMS_START + movlw 227 + movwf DELAYTEMP2,ACCESS +DMS_OUTER + movlw 6 + movwf DELAYTEMP,ACCESS +DMS_INNER + decfsz DELAYTEMP, F,ACCESS + bra DMS_INNER + decfsz DELAYTEMP2, F,ACCESS + bra DMS_OUTER + decfsz SysWaitTempMS, F,ACCESS + bra DMS_START + decfsz SysWaitTempMS_H, F,ACCESS + bra DMS_START + return + +;******************************************************************************** + +GLCDBMPLOAD + movlw 1 + movwf TABLEREADPOSITION,BANKED + clrf TABLEREADPOSITION_H,BANKED +SysSelect1Case1 + movff SELECTEDTABLE,SysWORDTempA + movff SELECTEDTABLE_H,SysWORDTempA_H + movlw low(GLCDTABLE1) + movwf SysWORDTempB,ACCESS + movlw high(GLCDTABLE1) + movwf SysWORDTempB_H,ACCESS + call SysCompEqual16 + btfss SysByteTempX,0,ACCESS + bra SysSelect1Case2 + movff TABLEREADPOSITION,SYSSTRINGA + movff TABLEREADPOSITION_H,SYSSTRINGA_H + rcall GLCDTABLE1 + movwf OBJWIDTH,BANKED + incf TABLEREADPOSITION,F,BANKED + btfsc STATUS,Z,ACCESS + incf TABLEREADPOSITION_H,F,BANKED + movff TABLEREADPOSITION,SYSSTRINGA + movff TABLEREADPOSITION_H,SYSSTRINGA_H + rcall GLCDTABLE1 + movwf OBJHEIGHT,BANKED + bra SysSelectEnd1 +SysSelect1Case2 + movff SELECTEDTABLE,SysWORDTempA + movff SELECTEDTABLE_H,SysWORDTempA_H + movlw low(GLCDTABLE2) + movwf SysWORDTempB,ACCESS + movlw high(GLCDTABLE2) + movwf SysWORDTempB_H,ACCESS + call SysCompEqual16 + btfss SysByteTempX,0,ACCESS + bra SysSelect1Case3 + movff TABLEREADPOSITION,SYSSTRINGA + movff TABLEREADPOSITION_H,SYSSTRINGA_H + rcall GLCDTABLE2 + movwf OBJWIDTH,BANKED + incf TABLEREADPOSITION,F,BANKED + btfsc STATUS,Z,ACCESS + incf TABLEREADPOSITION_H,F,BANKED + movff TABLEREADPOSITION,SYSSTRINGA + movff TABLEREADPOSITION_H,SYSSTRINGA_H + rcall GLCDTABLE2 + movwf OBJHEIGHT,BANKED + bra SysSelectEnd1 +SysSelect1Case3 + movff SELECTEDTABLE,SysWORDTempA + movff SELECTEDTABLE_H,SysWORDTempA_H + movlw low(GLCDTABLE3) + movwf SysWORDTempB,ACCESS + movlw high(GLCDTABLE3) + movwf SysWORDTempB_H,ACCESS + call SysCompEqual16 + btfss SysByteTempX,0,ACCESS + bra SysSelect1Case4 + movff TABLEREADPOSITION,SYSSTRINGA + call GLCDTABLE3 + movwf OBJWIDTH,BANKED + incf TABLEREADPOSITION,F,BANKED + btfsc STATUS,Z,ACCESS + incf TABLEREADPOSITION_H,F,BANKED + movff TABLEREADPOSITION,SYSSTRINGA + call GLCDTABLE3 + movwf OBJHEIGHT,BANKED + bra SysSelectEnd1 +SysSelect1Case4 + movff SELECTEDTABLE,SysWORDTempA + movff SELECTEDTABLE_H,SysWORDTempA_H + movlw low(GLCDTABLE4) + movwf SysWORDTempB,ACCESS + movlw high(GLCDTABLE4) + movwf SysWORDTempB_H,ACCESS + call SysCompEqual16 + btfss SysByteTempX,0,ACCESS + bra SysSelect1Case5 + movff TABLEREADPOSITION,SYSSTRINGA + call GLCDTABLE4 + movwf OBJWIDTH,BANKED + incf TABLEREADPOSITION,F,BANKED + btfsc STATUS,Z,ACCESS + incf TABLEREADPOSITION_H,F,BANKED + movff TABLEREADPOSITION,SYSSTRINGA + call GLCDTABLE4 + movwf OBJHEIGHT,BANKED + bra SysSelectEnd1 +SysSelect1Case5 + movff SELECTEDTABLE,SysWORDTempA + movff SELECTEDTABLE_H,SysWORDTempA_H + movlw low(GLCDTABLE5) + movwf SysWORDTempB,ACCESS + movlw high(GLCDTABLE5) + movwf SysWORDTempB_H,ACCESS + call SysCompEqual16 + btfss SysByteTempX,0,ACCESS + bra SysSelect1Case6 + movff TABLEREADPOSITION,SYSSTRINGA + call GLCDTABLE5 + movwf OBJWIDTH,BANKED + incf TABLEREADPOSITION,F,BANKED + btfsc STATUS,Z,ACCESS + incf TABLEREADPOSITION_H,F,BANKED + movff TABLEREADPOSITION,SYSSTRINGA + call GLCDTABLE5 + movwf OBJHEIGHT,BANKED +SysSelect1Case6 +SysSelectEnd1 + movff GLCDXPOS,OLDGLCDXPOS + movlw 3 + movwf TABLEREADPOSITION,BANKED + clrf TABLEREADPOSITION_H,BANKED + movff OBJHEIGHT,SysBYTETempA + movlw 8 + movwf SysBYTETempB,ACCESS + call SysDivSub + movff SysBYTETempA,WHOLEYBYTES + movff GLCDYPOS,SysBYTETempA + movlw 8 + movwf SysBYTETempB,ACCESS + call SysDivSub + movff SysBYTETempX,SysTemp1 + movff SysTemp1,SysBYTETempA + clrf SysBYTETempB,ACCESS + call SysCompEqual + movff SysByteTempX,ONPAGEBOUNDARY + movf WHOLEYBYTES,F,BANKED + btfsc STATUS, Z,ACCESS + bra ENDIF5 + setf HCOUNT,BANKED + decf WHOLEYBYTES,W,BANKED + movwf SysTemp1,BANKED + clrf SysBYTETempB,ACCESS + movff SysTemp1,SysBYTETempA + call SysCompLessThan + btfsc SysByteTempX,0,ACCESS + bra SysForLoopEnd1 +SysForLoop1 + incf HCOUNT,F,BANKED + movf HCOUNT,W,BANKED + addwf GLCDYPOS,W,BANKED + movwf GLCDY,BANKED + setf WIDTHCOUNT,BANKED + decf OBJWIDTH,W,BANKED + movwf SysTemp1,BANKED + clrf SysBYTETempB,ACCESS + movff SysTemp1,SysBYTETempA + call SysCompLessThan + btfsc SysByteTempX,0,ACCESS + bra SysForLoopEnd2 +SysForLoop2 + incf WIDTHCOUNT,F,BANKED +SysSelect2Case1 + movff SELECTEDTABLE,SysWORDTempA + movff SELECTEDTABLE_H,SysWORDTempA_H + movlw low(GLCDTABLE1) + movwf SysWORDTempB,ACCESS + movlw high(GLCDTABLE1) + movwf SysWORDTempB_H,ACCESS + call SysCompEqual16 + btfss SysByteTempX,0,ACCESS + bra SysSelect2Case2 + movff TABLEREADPOSITION,SYSSTRINGA + movff TABLEREADPOSITION_H,SYSSTRINGA_H + rcall GLCDTABLE1 + movwf WBYTE,BANKED + bra SysSelectEnd2 +SysSelect2Case2 + movff SELECTEDTABLE,SysWORDTempA + movff SELECTEDTABLE_H,SysWORDTempA_H + movlw low(GLCDTABLE2) + movwf SysWORDTempB,ACCESS + movlw high(GLCDTABLE2) + movwf SysWORDTempB_H,ACCESS + call SysCompEqual16 + btfss SysByteTempX,0,ACCESS + bra SysSelect2Case3 + movff TABLEREADPOSITION,SYSSTRINGA + movff TABLEREADPOSITION_H,SYSSTRINGA_H + rcall GLCDTABLE2 + movwf WBYTE,BANKED + bra SysSelectEnd2 +SysSelect2Case3 + movff SELECTEDTABLE,SysWORDTempA + movff SELECTEDTABLE_H,SysWORDTempA_H + movlw low(GLCDTABLE3) + movwf SysWORDTempB,ACCESS + movlw high(GLCDTABLE3) + movwf SysWORDTempB_H,ACCESS + call SysCompEqual16 + btfss SysByteTempX,0,ACCESS + bra SysSelect2Case4 + movff TABLEREADPOSITION,SYSSTRINGA + call GLCDTABLE3 + movwf WBYTE,BANKED + bra SysSelectEnd2 +SysSelect2Case4 + movff SELECTEDTABLE,SysWORDTempA + movff SELECTEDTABLE_H,SysWORDTempA_H + movlw low(GLCDTABLE4) + movwf SysWORDTempB,ACCESS + movlw high(GLCDTABLE4) + movwf SysWORDTempB_H,ACCESS + call SysCompEqual16 + btfss SysByteTempX,0,ACCESS + bra SysSelect2Case5 + movff TABLEREADPOSITION,SYSSTRINGA + call GLCDTABLE4 + movwf WBYTE,BANKED + bra SysSelectEnd2 +SysSelect2Case5 + movff SELECTEDTABLE,SysWORDTempA + movff SELECTEDTABLE_H,SysWORDTempA_H + movlw low(GLCDTABLE5) + movwf SysWORDTempB,ACCESS + movlw high(GLCDTABLE5) + movwf SysWORDTempB_H,ACCESS + call SysCompEqual16 + btfss SysByteTempX,0,ACCESS + bra SysSelect2Case6 + movff TABLEREADPOSITION,SYSSTRINGA + call GLCDTABLE5 + movwf WBYTE,BANKED +SysSelect2Case6 +SysSelectEnd2 + incf TABLEREADPOSITION,F,BANKED + btfsc STATUS,Z,ACCESS + incf TABLEREADPOSITION_H,F,BANKED + movf OPTMISEGLCDDRAW,W,BANKED + subwf WBYTE,W,BANKED + btfsc STATUS, Z,ACCESS + bra ENDIF9 + incf ONPAGEBOUNDARY,W,BANKED + btfss STATUS, Z,ACCESS + bra ELSE17_1 + movf WIDTHCOUNT,W,BANKED + addwf GLCDXPOS,W,BANKED + movwf GLCDX,BANKED + btfsc GLCDX,6,BANKED + bra ENDIF18 + bsf LATC,1,ACCESS + bcf LATC,0,ACCESS +ENDIF18 + btfss GLCDX,6,BANKED + bra ENDIF19 + bsf LATC,0,ACCESS + movlw 64 + subwf GLCDX,F,BANKED + bcf LATC,1,ACCESS +ENDIF19 + movff GLCDY,SysBYTETempA + movlw 8 + movwf SysBYTETempB,ACCESS + call SysDivSub + movff SysBYTETempA,CURRPAGE + bcf LATE,0,ACCESS + movlw 184 + iorwf CURRPAGE,W,BANKED + movwf LCDBYTE,BANKED + call GLCDWRITEBYTE_KS0108 + + movlw 64 + iorwf GLCDX,W,BANKED + movwf LCDBYTE,BANKED + rcall GLCDWRITEBYTE_KS0108 + + bsf LATE,0,ACCESS + movff WBYTE,LCDBYTE + rcall GLCDWRITEBYTE_KS0108 + + bra ENDIF17 +ELSE17_1 + setf CURRCHARROW,BANKED +SysForLoop3 + incf CURRCHARROW,F,BANKED + btfsc WBYTE,0,BANKED + bra ELSE20_1 + movf WIDTHCOUNT,W,BANKED + addwf GLCDXPOS,W,BANKED + movwf GLCDX,BANKED + movf GLCDYPOS,W,BANKED + addwf CURRCHARROW,W,BANKED + movwf GLCDY,BANKED + movff GLCDBACKGROUND,GLCDCOLOUR + movff GLCDBACKGROUND_H,GLCDCOLOUR_H + call PSET_KS0108 + + bra ENDIF20 +ELSE20_1 + movf WIDTHCOUNT,W,BANKED + addwf GLCDXPOS,W,BANKED + movwf GLCDX,BANKED + movf GLCDYPOS,W,BANKED + addwf CURRCHARROW,W,BANKED + movwf GLCDY,BANKED + movff GLCDFOREGROUND,GLCDCOLOUR + movff GLCDFOREGROUND_H,GLCDCOLOUR_H + call PSET_KS0108 + +ENDIF20 + rrcf WBYTE,F,BANKED + movlw 7 + subwf CURRCHARROW,W,BANKED + btfss STATUS, C,ACCESS + bra SysForLoop3 +SysForLoopEnd3 +ENDIF17 +ENDIF9 + decf OBJWIDTH,W,BANKED + movwf SysTemp1,BANKED + movff WIDTHCOUNT,SysBYTETempA + movff SysTemp1,SysBYTETempB + call SysCompLessThan + btfsc SysByteTempX,0,ACCESS + bra SysForLoop2 +SysForLoopEnd2 + movff OLDGLCDXPOS,GLCDXPOS + movlw 8 + addwf GLCDYPOS,F,BANKED + decf WHOLEYBYTES,W,BANKED + movwf SysTemp1,BANKED + movff HCOUNT,SysBYTETempA + movff SysTemp1,SysBYTETempB + call SysCompLessThan + btfsc SysByteTempX,0,ACCESS + bra SysForLoop1 +SysForLoopEnd1 +ENDIF5 + movff OBJHEIGHT,SysBYTETempA + movlw 8 + movwf SysBYTETempB,ACCESS + call SysDivSub + movff SysBYTETempX,MAXHEIGHT + movf MAXHEIGHT,F,BANKED + btfsc STATUS, Z,ACCESS + bra ENDIF6 + setf WIDTHCOUNT,BANKED + decf OBJWIDTH,W,BANKED + movwf SysTemp1,BANKED + clrf SysBYTETempB,ACCESS + movff SysTemp1,SysBYTETempA + call SysCompLessThan + btfsc SysByteTempX,0,ACCESS + bra SysForLoopEnd4 +SysForLoop4 + incf WIDTHCOUNT,F,BANKED +SysSelect3Case1 + movff SELECTEDTABLE,SysWORDTempA + movff SELECTEDTABLE_H,SysWORDTempA_H + movlw low(GLCDTABLE1) + movwf SysWORDTempB,ACCESS + movlw high(GLCDTABLE1) + movwf SysWORDTempB_H,ACCESS + call SysCompEqual16 + btfss SysByteTempX,0,ACCESS + bra SysSelect3Case2 + movff TABLEREADPOSITION,SYSSTRINGA + movff TABLEREADPOSITION_H,SYSSTRINGA_H + rcall GLCDTABLE1 + movwf WBYTE,BANKED + bra SysSelectEnd3 +SysSelect3Case2 + movff SELECTEDTABLE,SysWORDTempA + movff SELECTEDTABLE_H,SysWORDTempA_H + movlw low(GLCDTABLE2) + movwf SysWORDTempB,ACCESS + movlw high(GLCDTABLE2) + movwf SysWORDTempB_H,ACCESS + call SysCompEqual16 + btfss SysByteTempX,0,ACCESS + bra SysSelect3Case3 + movff TABLEREADPOSITION,SYSSTRINGA + movff TABLEREADPOSITION_H,SYSSTRINGA_H + rcall GLCDTABLE2 + movwf WBYTE,BANKED + bra SysSelectEnd3 +SysSelect3Case3 + movff SELECTEDTABLE,SysWORDTempA + movff SELECTEDTABLE_H,SysWORDTempA_H + movlw low(GLCDTABLE3) + movwf SysWORDTempB,ACCESS + movlw high(GLCDTABLE3) + movwf SysWORDTempB_H,ACCESS + call SysCompEqual16 + btfss SysByteTempX,0,ACCESS + bra SysSelect3Case4 + movff TABLEREADPOSITION,SYSSTRINGA + rcall GLCDTABLE3 + movwf WBYTE,BANKED + bra SysSelectEnd3 +SysSelect3Case4 + movff SELECTEDTABLE,SysWORDTempA + movff SELECTEDTABLE_H,SysWORDTempA_H + movlw low(GLCDTABLE4) + movwf SysWORDTempB,ACCESS + movlw high(GLCDTABLE4) + movwf SysWORDTempB_H,ACCESS + call SysCompEqual16 + btfss SysByteTempX,0,ACCESS + bra SysSelect3Case5 + movff TABLEREADPOSITION,SYSSTRINGA + rcall GLCDTABLE4 + movwf WBYTE,BANKED + bra SysSelectEnd3 +SysSelect3Case5 + movff SELECTEDTABLE,SysWORDTempA + movff SELECTEDTABLE_H,SysWORDTempA_H + movlw low(GLCDTABLE5) + movwf SysWORDTempB,ACCESS + movlw high(GLCDTABLE5) + movwf SysWORDTempB_H,ACCESS + call SysCompEqual16 + btfss SysByteTempX,0,ACCESS + bra SysSelect3Case6 + movff TABLEREADPOSITION,SYSSTRINGA + rcall GLCDTABLE5 + movwf WBYTE,BANKED +SysSelect3Case6 +SysSelectEnd3 + incf TABLEREADPOSITION,F,BANKED + btfsc STATUS,Z,ACCESS + incf TABLEREADPOSITION_H,F,BANKED + setf CURRCHARROW,BANKED + decf MAXHEIGHT,W,BANKED + movwf SysTemp1,BANKED + clrf SysBYTETempB,ACCESS + movff SysTemp1,SysBYTETempA + call SysCompLessThan + btfsc SysByteTempX,0,ACCESS + bra SysForLoopEnd5 +SysForLoop5 + incf CURRCHARROW,F,BANKED + btfsc WBYTE,0,BANKED + bra ELSE14_1 + movf WIDTHCOUNT,W,BANKED + addwf GLCDXPOS,W,BANKED + movwf GLCDX,BANKED + movf GLCDYPOS,W,BANKED + addwf CURRCHARROW,W,BANKED + movwf GLCDY,BANKED + movff GLCDBACKGROUND,GLCDCOLOUR + movff GLCDBACKGROUND_H,GLCDCOLOUR_H + rcall PSET_KS0108 + + bra ENDIF14 +ELSE14_1 + movf WIDTHCOUNT,W,BANKED + addwf GLCDXPOS,W,BANKED + movwf GLCDX,BANKED + movf GLCDYPOS,W,BANKED + addwf CURRCHARROW,W,BANKED + movwf GLCDY,BANKED + movff GLCDFOREGROUND,GLCDCOLOUR + movff GLCDFOREGROUND_H,GLCDCOLOUR_H + rcall PSET_KS0108 + +ENDIF14 + rrcf WBYTE,F,BANKED + decf MAXHEIGHT,W,BANKED + movwf SysTemp1,BANKED + movff CURRCHARROW,SysBYTETempA + movff SysTemp1,SysBYTETempB + rcall SysCompLessThan + btfsc SysByteTempX,0,ACCESS + bra SysForLoop5 +SysForLoopEnd5 + decf OBJWIDTH,W,BANKED + movwf SysTemp1,BANKED + movff WIDTHCOUNT,SysBYTETempA + movff SysTemp1,SysBYTETempB + rcall SysCompLessThan + btfsc SysByteTempX,0,ACCESS + bra SysForLoop4 +SysForLoopEnd4 +ENDIF6 + bcf LATC,0,ACCESS + bcf LATC,1,ACCESS + return + +;******************************************************************************** + +GLCDCLS_KS0108 + clrf GLCD_YORDINATE,BANKED + clrf GLCD_YORDINATE_H,BANKED + bsf LATC,0,ACCESS + bcf LATC,1,ACCESS + clrf GLCD_COUNT,BANKED +SysForLoop6 + incf GLCD_COUNT,F,BANKED + setf CURRPAGE,BANKED +SysForLoop7 + incf CURRPAGE,F,BANKED + bcf LATE,0,ACCESS + movlw 184 + iorwf CURRPAGE,W,BANKED + movwf LCDBYTE,BANKED + rcall GLCDWRITEBYTE_KS0108 + + setf CURRCOL,BANKED +SysForLoop8 + incf CURRCOL,F,BANKED + bcf LATE,0,ACCESS + movlw 64 + iorwf CURRCOL,W,BANKED + movwf LCDBYTE,BANKED + rcall GLCDWRITEBYTE_KS0108 + + bsf LATE,0,ACCESS + clrf LCDBYTE,BANKED + rcall GLCDWRITEBYTE_KS0108 + + movlw 63 + subwf CURRCOL,W,BANKED + btfss STATUS, C,ACCESS + bra SysForLoop8 +SysForLoopEnd8 + movlw 7 + subwf CURRPAGE,W,BANKED + btfss STATUS, C,ACCESS + bra SysForLoop7 +SysForLoopEnd7 + bcf LATC,0,ACCESS + bsf LATC,1,ACCESS + movlw 2 + subwf GLCD_COUNT,W,BANKED + btfss STATUS, C,ACCESS + bra SysForLoop6 +SysForLoopEnd6 + bcf LATC,0,ACCESS + bcf LATC,1,ACCESS + return + +;******************************************************************************** + +FN_GLCDREADBYTE_KS0108 + bsf TRISD,7,ACCESS + bsf TRISD,6,ACCESS + bsf TRISD,5,ACCESS + bsf TRISD,4,ACCESS + bsf TRISD,3,ACCESS + bsf TRISD,2,ACCESS + bsf TRISD,1,ACCESS + bsf TRISD,0,ACCESS + bsf LATE,1,ACCESS + bsf LATE,2,ACCESS + movlw 15 + movwf DELAYTEMP,ACCESS +DelayUS4 + decfsz DELAYTEMP,F,ACCESS + bra DelayUS4 + bcf GLCDREADBYTE_KS0108,7,BANKED + btfsc PORTD,7,ACCESS + bsf GLCDREADBYTE_KS0108,7,BANKED + bcf GLCDREADBYTE_KS0108,6,BANKED + btfsc PORTD,6,ACCESS + bsf GLCDREADBYTE_KS0108,6,BANKED + bcf GLCDREADBYTE_KS0108,5,BANKED + btfsc PORTD,5,ACCESS + bsf GLCDREADBYTE_KS0108,5,BANKED + bcf GLCDREADBYTE_KS0108,4,BANKED + btfsc PORTD,4,ACCESS + bsf GLCDREADBYTE_KS0108,4,BANKED + bcf GLCDREADBYTE_KS0108,3,BANKED + btfsc PORTD,3,ACCESS + bsf GLCDREADBYTE_KS0108,3,BANKED + bcf GLCDREADBYTE_KS0108,2,BANKED + btfsc PORTD,2,ACCESS + bsf GLCDREADBYTE_KS0108,2,BANKED + bcf GLCDREADBYTE_KS0108,1,BANKED + btfsc PORTD,1,ACCESS + bsf GLCDREADBYTE_KS0108,1,BANKED + bcf GLCDREADBYTE_KS0108,0,BANKED + btfsc PORTD,0,ACCESS + bsf GLCDREADBYTE_KS0108,0,BANKED + bcf LATE,2,ACCESS + movlw 15 + movwf DELAYTEMP,ACCESS +DelayUS5 + decfsz DELAYTEMP,F,ACCESS + bra DelayUS5 + return + +;******************************************************************************** + +GLCDTABLE1 + movff SYSSTRINGA,SysWORDTempA + movff SYSSTRINGA_H,SysWORDTempA_H + movlw 227 + movwf SysWORDTempB,ACCESS + movlw 1 + movwf SysWORDTempB_H,ACCESS + rcall SysCompLessThan16 + btfss SysByteTempX,0,ACCESS + retlw 0 + movf SysStringA, W,ACCESS + addlw low TableGLCDTABLE1 + movwf TBLPTRL,ACCESS + movlw high TableGLCDTABLE1 + btfsc STATUS, C,ACCESS + addlw 1 + addwf SysStringA_H, W,ACCESS + movwf TBLPTRH,ACCESS + tblrd* + movf TABLAT, W,ACCESS + return +TableGLCDTABLE1 + db 226,60,64,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 + db 128,224,0,192,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,64,192,176,96,192,128,0 + db 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,192,112,222,115,28,7,1,0,0,0,0 + db 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,3,6,13,27,62,236,24,16,16,16,24,24,8 + db 8,12,12,12,4,4,4,6,6,2,2,2,3,3,1,1,3,15,28,112,224,128,0,0,0,0,0,0,0,0,0,0,0,0 + db 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 + db 0,0,0,0,0,0,0,1,7,14,56,112,192,128,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 + db 0,0,255,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,192,99 + db 54,28,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,7,12,8,24,16,48,48,32,96,64 + db 192,192,128,128,0,0,0,0,0,0,0,0,0,0,0,0,128,192,112,56,28,14,3,1,0,0,0,0,0,0,0,0 + db 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,192,32,192,0,0,0,0,0,0,0,0,0,0,0,0,1,1,3,3,2,6,4 + db 12,236,8,12,6,3,1,0,0,32,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,192 + db 56,22,17,16,17,22,56,192,0,255,2,1,1,1,254,0,0,126,129,129,129,129,126,0,0,255 + db 66,129,129,129,126,0,0,255,0,0,127,128,128,128,64,255,0,0,255,2,1,1,1,254,2,1,1,1 + db 254 + +;******************************************************************************** + +GLCDTABLE1_H + movff SYSSTRINGA,SysWORDTempA + movff SYSSTRINGA_H,SysWORDTempA_H + movlw 1 + movwf SysWORDTempB,ACCESS + clrf SysWORDTempB_H,ACCESS + rcall SysCompLessThan16 + btfss SysByteTempX,0,ACCESS + retlw 0 + movf SysStringA, W,ACCESS + addlw low TableGLCDTABLE1_H + movwf TBLPTRL,ACCESS + movlw high TableGLCDTABLE1_H + btfsc STATUS, C,ACCESS + addlw 1 + addwf SysStringA_H, W,ACCESS + movwf TBLPTRH,ACCESS + tblrd* + movf TABLAT, W,ACCESS + return +TableGLCDTABLE1_H + db 1 + +;******************************************************************************** + +GLCDTABLE2 + movff SYSSTRINGA,SysWORDTempA + movff SYSSTRINGA_H,SysWORDTempA_H + movlw 137 + movwf SysWORDTempB,ACCESS + movlw 2 + movwf SysWORDTempB_H,ACCESS + rcall SysCompLessThan16 + btfss SysByteTempX,0,ACCESS + retlw 0 + movf SysStringA, W,ACCESS + addlw low TableGLCDTABLE2 + movwf TBLPTRL,ACCESS + movlw high TableGLCDTABLE2 + btfsc STATUS, C,ACCESS + addlw 1 + addwf SysStringA_H, W,ACCESS + movwf TBLPTRH,ACCESS + tblrd* + movf TABLAT, W,ACCESS + return +TableGLCDTABLE2 + db 162,84,63,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 + db 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,32,96,192,128,128,192 + db 224,224,224,240,184,222,192,128,0,0,0,0,0,0,0,0,0,0,0,0,0,128,192,224,240,248 + db 248,248,248,248,248,248,240,240,240,240,240,224,224,224,224,224,224,224,224,224 + db 224,224,224,224,224,224,224,224,224,240,240,240,240,240,248,248,248,248,252,252 + db 252,252,252,252,252,252,254,254,254,254,254,254,254,254,255,255,255,255,255,255 + db 255,255,255,255,255,241,192,128,0,0,0,0,0,0,0,0,0,248,254,255,255,255,255,255 + db 255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255 + db 255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255 + db 255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255 + db 255,255,255,127,63,63,63,63,30,12,0,0,0,0,0,0,224,255,7,63,255,255,255,255,255,255 + db 255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255 + db 255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255 + db 255,255,255,255,255,255,255,255,255,255,255,63,63,63,25,0,0,0,0,0,0,0,0,0,0,0,0,0 + db 0,0,0,0,128,252,255,255,0,0,1,15,255,255,255,255,255,255,255,255,255,255,255,255 + db 255,255,127,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255 + db 127,127,127,255,255,255,255,255,255,255,255,255,255,255,255,127,63,31,15,7,3,1 + db 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,128,255,255,255,31,0,0,240,252,255,255 + db 255,255,255,255,255,15,31,15,7,15,1,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,255 + db 255,63,15,3,0,47,255,255,255,127,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 + db 0,0,0,0,0,0,3,3,1,0,0,0,0,255,255,255,7,1,7,31,255,255,240,192,128,0,0,0,0,0,0,0 + db 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,20,31,31,31,16,0,0,0,0,255,255,255,192,128,0,0,0 + db 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,12,63,127,127 + db 120,0,0,0,3,3,7,3,3,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 + db 0,1,1,1,1 + +;******************************************************************************** + +GLCDTABLE2_H + movff SYSSTRINGA,SysWORDTempA + movff SYSSTRINGA_H,SysWORDTempA_H + movlw 1 + movwf SysWORDTempB,ACCESS + clrf SysWORDTempB_H,ACCESS + rcall SysCompLessThan16 + btfss SysByteTempX,0,ACCESS + retlw 0 + movf SysStringA, W,ACCESS + addlw low TableGLCDTABLE2_H + movwf TBLPTRL,ACCESS + movlw high TableGLCDTABLE2_H + btfsc STATUS, C,ACCESS + addlw 1 + addwf SysStringA_H, W,ACCESS + movwf TBLPTRH,ACCESS + tblrd* + movf TABLAT, W,ACCESS + return +TableGLCDTABLE2_H + db 2 + +;******************************************************************************** + +GLCDTABLE3 + movlw 4 + cpfslt SysStringA,ACCESS + retlw 0 + movf SysStringA, W,ACCESS + addlw low TableGLCDTABLE3 + movwf TBLPTRL,ACCESS + movlw high TableGLCDTABLE3 + btfsc STATUS, C,ACCESS + addlw 1 + movwf TBLPTRH,ACCESS + tblrd* + movf TABLAT, W,ACCESS + return +TableGLCDTABLE3 + db 3,1,0,255 + +;******************************************************************************** + +GLCDTABLE4 + movlw 4 + cpfslt SysStringA,ACCESS + retlw 0 + movf SysStringA, W,ACCESS + addlw low TableGLCDTABLE4 + movwf TBLPTRL,ACCESS + movlw high TableGLCDTABLE4 + btfsc STATUS, C,ACCESS + addlw 1 + movwf TBLPTRH,ACCESS + tblrd* + movf TABLAT, W,ACCESS + return +TableGLCDTABLE4 + db 3,1,0,255 + +;******************************************************************************** + +GLCDTABLE5 + movlw 4 + cpfslt SysStringA,ACCESS + retlw 0 + movf SysStringA, W,ACCESS + addlw low TableGLCDTABLE5 + movwf TBLPTRL,ACCESS + movlw high TableGLCDTABLE5 + btfsc STATUS, C,ACCESS + addlw 1 + movwf TBLPTRH,ACCESS + tblrd* + movf TABLAT, W,ACCESS + return +TableGLCDTABLE5 + db 3,1,0,255 + +;******************************************************************************** + +GLCDWRITEBYTE_KS0108 + bcf SYSBITVAR0,0,BANKED + btfsc PORTE,0,ACCESS + bsf SYSBITVAR0,0,BANKED + bcf SYSBITVAR0,1,BANKED + btfsc PORTC,1,ACCESS + bsf SYSBITVAR0,1,BANKED + btfsc PORTC,0,ACCESS + bcf LATC,1,ACCESS + bcf LATE,0,ACCESS +SysWaitLoop1 + rcall FN_GLCDREADBYTE_KS0108 + btfsc GLCDREADBYTE_KS0108,7,BANKED + bra SysWaitLoop1 + bcf LATE,0,ACCESS + btfsc SYSBITVAR0,0,BANKED + bsf LATE,0,ACCESS + bcf LATC,1,ACCESS + btfsc SYSBITVAR0,1,BANKED + bsf LATC,1,ACCESS + bcf LATE,1,ACCESS + bcf TRISD,0,ACCESS + bcf TRISD,1,ACCESS + bcf TRISD,2,ACCESS + bcf TRISD,3,ACCESS + bcf TRISD,4,ACCESS + bcf TRISD,5,ACCESS + bcf TRISD,6,ACCESS + bcf TRISD,7,ACCESS + bcf LATD,7,ACCESS + btfsc LCDBYTE,7,BANKED + bsf LATD,7,ACCESS + bcf LATD,6,ACCESS + btfsc LCDBYTE,6,BANKED + bsf LATD,6,ACCESS + bcf LATD,5,ACCESS + btfsc LCDBYTE,5,BANKED + bsf LATD,5,ACCESS + bcf LATD,4,ACCESS + btfsc LCDBYTE,4,BANKED + bsf LATD,4,ACCESS + bcf LATD,3,ACCESS + btfsc LCDBYTE,3,BANKED + bsf LATD,3,ACCESS + bcf LATD,2,ACCESS + btfsc LCDBYTE,2,BANKED + bsf LATD,2,ACCESS + bcf LATD,1,ACCESS + btfsc LCDBYTE,1,BANKED + bsf LATD,1,ACCESS + bcf LATD,0,ACCESS + btfsc LCDBYTE,0,BANKED + bsf LATD,0,ACCESS + movlw 1 + movwf DELAYTEMP,ACCESS +DelayUS1 + decfsz DELAYTEMP,F,ACCESS + bra DelayUS1 + nop + bsf LATE,2,ACCESS + movlw 1 + movwf DELAYTEMP,ACCESS +DelayUS2 + decfsz DELAYTEMP,F,ACCESS + bra DelayUS2 + nop + bcf LATE,2,ACCESS + movlw 1 + movwf DELAYTEMP,ACCESS +DelayUS3 + decfsz DELAYTEMP,F,ACCESS + bra DelayUS3 + nop + return + +;******************************************************************************** + +INITGLCD_KS0108 + bcf TRISE,0,ACCESS + bcf TRISE,1,ACCESS + bcf TRISE,2,ACCESS + bcf TRISC,0,ACCESS + bcf TRISC,1,ACCESS + bcf TRISC,2,ACCESS + bcf LATC,2,ACCESS + movlw 1 + movwf SysWaitTempMS,ACCESS + clrf SysWaitTempMS_H,ACCESS + call Delay_MS + bsf LATC,2,ACCESS + movlw 1 + movwf SysWaitTempMS,ACCESS + clrf SysWaitTempMS_H,ACCESS + call Delay_MS + bsf LATC,0,ACCESS + bsf LATC,1,ACCESS + bcf LATE,0,ACCESS + movlw 63 + movwf LCDBYTE,BANKED + rcall GLCDWRITEBYTE_KS0108 + + movlw 192 + movwf LCDBYTE,BANKED + rcall GLCDWRITEBYTE_KS0108 + + bcf LATC,0,ACCESS + bcf LATC,1,ACCESS + clrf GLCDBACKGROUND,BANKED + clrf GLCDBACKGROUND_H,BANKED + movlw 1 + movwf GLCDFOREGROUND,BANKED + clrf GLCDFOREGROUND_H,BANKED + movlw 6 + movwf GLCDFONTWIDTH,BANKED + clrf GLCDFNTDEFAULT,BANKED + movlw 1 + movwf GLCDFNTDEFAULTSIZE,BANKED + rcall GLCDCLS_KS0108 + + return + +;******************************************************************************** + +INITSYS + nop + clrf BSR,ACCESS + clrf TBLPTRU,ACCESS + bcf ADCON2,ADFM,ACCESS + bcf ADCON0,ADON,ACCESS + bsf ADCON1,PCFG3,ACCESS + bsf ADCON1,PCFG2,ACCESS + bsf ADCON1,PCFG1,ACCESS + bsf ADCON1,PCFG0,ACCESS + movlw 7 + movwf CMCON,ACCESS + clrf PORTA,ACCESS + clrf PORTB,ACCESS + clrf PORTC,ACCESS + clrf PORTD,ACCESS + clrf PORTE,ACCESS + return + +;******************************************************************************** + +PSET_KS0108 + btfsc GLCDX,6,BANKED + bra ENDIF26 + bsf LATC,1,ACCESS + bcf LATC,0,ACCESS +ENDIF26 + btfss GLCDX,6,BANKED + bra ENDIF27 + bsf LATC,0,ACCESS + movlw 64 + subwf GLCDX,F,BANKED + bcf LATC,1,ACCESS +ENDIF27 + movff GLCDY,SysBYTETempA + movlw 8 + movwf SysBYTETempB,ACCESS + rcall SysDivSub + movff SysBYTETempA,CURRPAGE + bcf LATE,0,ACCESS + movlw 184 + iorwf CURRPAGE,W,BANKED + movwf LCDBYTE,BANKED + rcall GLCDWRITEBYTE_KS0108 + + bcf LATE,0,ACCESS + movlw 64 + iorwf GLCDX,W,BANKED + movwf LCDBYTE,BANKED + rcall GLCDWRITEBYTE_KS0108 + + bsf LATE,0,ACCESS + rcall FN_GLCDREADBYTE_KS0108 + movff GLCDREADBYTE_KS0108,GLCDDATATEMP + bsf LATE,0,ACCESS + rcall FN_GLCDREADBYTE_KS0108 + movff GLCDREADBYTE_KS0108,GLCDDATATEMP + movlw 7 + andwf GLCDY,W,BANKED + movwf GLCDBITNO,BANKED + btfsc GLCDCOLOUR,0,BANKED + bra ELSE28_1 + movlw 254 + movwf GLCDCHANGE,BANKED + bsf STATUS,C,ACCESS + bra ENDIF28 +ELSE28_1 + movlw 1 + movwf GLCDCHANGE,BANKED + bcf STATUS,C,ACCESS +ENDIF28 + movff GLCDBITNO,SysRepeatTemp1 + movf SYSREPEATTEMP1,F,BANKED + btfsc STATUS, Z,ACCESS + bra SysRepeatLoopEnd1 +SysRepeatLoop1 + rlcf GLCDCHANGE,F,BANKED + decfsz SysRepeatTemp1,F,BANKED + bra SysRepeatLoop1 +SysRepeatLoopEnd1 + btfsc GLCDCOLOUR,0,BANKED + bra ELSE29_1 + movf GLCDDATATEMP,W,BANKED + andwf GLCDCHANGE,W,BANKED + movwf GLCDDATATEMP,BANKED + bra ENDIF29 +ELSE29_1 + movf GLCDDATATEMP,W,BANKED + iorwf GLCDCHANGE,W,BANKED + movwf GLCDDATATEMP,BANKED +ENDIF29 + bcf LATE,0,ACCESS + movlw 64 + iorwf GLCDX,W,BANKED + movwf LCDBYTE,BANKED + rcall GLCDWRITEBYTE_KS0108 + + bsf LATE,0,ACCESS + movff GLCDDATATEMP,LCDBYTE + rcall GLCDWRITEBYTE_KS0108 + + bcf LATC,0,ACCESS + bcf LATC,1,ACCESS + return + +;******************************************************************************** + +SYSCOMPEQUAL + setf SYSBYTETEMPX,ACCESS + movf SYSBYTETEMPB, W,ACCESS + cpfseq SYSBYTETEMPA,ACCESS + clrf SYSBYTETEMPX,ACCESS + return + +;******************************************************************************** + +SYSCOMPEQUAL16 + clrf SYSBYTETEMPX,ACCESS + movf SYSWORDTEMPB, W,ACCESS + cpfseq SYSWORDTEMPA,ACCESS + return + movf SYSWORDTEMPB_H, W,ACCESS + cpfseq SYSWORDTEMPA_H,ACCESS + return + setf SYSBYTETEMPX,ACCESS + return + +;******************************************************************************** + +SYSCOMPLESSTHAN + setf SYSBYTETEMPX,ACCESS + movf SYSBYTETEMPB, W,ACCESS + cpfslt SYSBYTETEMPA,ACCESS + clrf SYSBYTETEMPX,ACCESS + return + +;******************************************************************************** + +SYSCOMPLESSTHAN16 + clrf SYSBYTETEMPX,ACCESS + movf SYSWORDTEMPA_H,W,ACCESS + subwf SYSWORDTEMPB_H,W,ACCESS + btfss STATUS,C,ACCESS + return + movf SYSWORDTEMPB_H,W,ACCESS + subwf SYSWORDTEMPA_H,W,ACCESS + bnc SCLT16TRUE + movf SYSWORDTEMPB,W,ACCESS + subwf SYSWORDTEMPA,W,ACCESS + btfsc STATUS,C,ACCESS + return +SCLT16TRUE + comf SYSBYTETEMPX,F,ACCESS + return + +;******************************************************************************** + +SYSDIVSUB + movf SYSBYTETEMPB, F,ACCESS + btfsc STATUS, Z,ACCESS + return + clrf SYSBYTETEMPX,ACCESS + movlw 8 + movwf SYSDIVLOOP,ACCESS +SYSDIV8START + bcf STATUS, C,ACCESS + rlcf SYSBYTETEMPA, F,ACCESS + rlcf SYSBYTETEMPX, F,ACCESS + movf SYSBYTETEMPB, W,ACCESS + subwf SYSBYTETEMPX, F,ACCESS + bsf SYSBYTETEMPA, 0,ACCESS + btfsc STATUS, C,ACCESS + bra DIV8NOTNEG + bcf SYSBYTETEMPA, 0,ACCESS + movf SYSBYTETEMPB, W,ACCESS + addwf SYSBYTETEMPX, F,ACCESS +DIV8NOTNEG + decfsz SYSDIVLOOP, F,ACCESS + bra SYSDIV8START + return + +;******************************************************************************** + + + END diff --git a/resources/examples/Pic/ks0108_p18f4550/KS0108_18f4550.gcb b/resources/examples/Pic/ks0108_p18f4550/KS0108_18f4550.gcb new file mode 100644 index 0000000..cb68e11 --- /dev/null +++ b/resources/examples/Pic/ks0108_p18f4550/KS0108_18f4550.gcb @@ -0,0 +1,1431 @@ +'''A demonstration program for GCGB and GCB. +'''-------------------------------------------------------------------------------------------------------------------------------- +'''This program displays multiple BMPs on a GLCD. +'''This uses the BMPtoGCB converter to create the required GCB table. Any mono BMP can be converted. +'''Two tables has been imported to this program. Five can be supported. These tables were created using BMP2GCB.EXE then imported. +'''The main code is generic. This uses a table called 'TableData'. The 'TableData' table contains the required information to describe the original BMP. +'''To support thr generic approach the defines redirects to the table data. If you import a new BMP table simply change the define to the new table definition. +'''Replace the existing table data with your data BMP to a table. +'''You can define five BMP tables. +'''YOU MUST RETAIN THE 'GCLDTABLEn' NAMING CONVENTION!!! +'''So, you can easily remember the name of your BMP using the define statements. Then, call the display subroutine GLCDBMPLoad ( 0, 0, Anobium ). Where the parameters are XPos, YPos, TableName. +'''The GLCD hardware configuation is shown in the hardware section of this program. +''' +''' +'''@author EvanV plus works of HughC +'''@licence GPL +'''@version 1.0a +'''@date 31.01.2015 +'''******************************************************************************** + +; ----- Configuration + + #chip 18f4550, 20 + #option explicit + #include + +; ----- Constants + ' No Constants specified in this example. + ' See below. + +; ----- Define Hardware settings + #define GLCD_TYPE GLCD_TYPE_KS0108 + #define GLCD_WIDTH 128 + #define GLCD_HEIGHT 64 + + #define GLCD_CS1 PORTC.0 'D12 to actually since CS1, CS2 can be reversed on some devices + #define GLCD_CS2 PORTC.1 + #define GLCD_DB0 PORTD.0 'D0 to pin 7 on LCD + #define GLCD_DB1 PORTD.1 'D1 to pin 8 on LCD + #define GLCD_DB2 PORTD.2 'D2 to pin 9 on LCD + #define GLCD_DB3 PORTD.3 'D3 to pin 10 on LCD + #define GLCD_DB4 PORTD.4 'D4 to pin 11 on LCD + #define GLCD_DB5 PORTD.5 'D5 to pin 12 on LCD + #define GLCD_DB6 PORTD.6 'D6 to pin 13 on LCD + #define GLCD_DB7 PORTD.7 'D7 to pin 14 on LCD + + #define GLCD_RS PORTe.0 + #define GLCD_Enable PORTe.2 + #define GLCD_RW PORTe.1 + #define GLCD_RESET PORTC.2 + + +; ----- Variables + OptmiseGLCDDraw = 0 ; either 0 or 1. Needs to match the background pixel state. Makes drawing faster. + ' These must be WORDs as this is required to handle large tables. + Dim TableReadPosition, TableLen,SelectedTable as word + Dim OPTMISEGLCDDRAW, OBJWIDTH, OBJHEIGHT, OLDGLCDXPOS, WHOLEYBYTES, HCOUNT, GLCDY, WIDTHCOUNT, WBYTE, ONPAGEBOUNDARY, GLCDX, CURRPAGE, CURRPAGE, MAXHEIGHT, CURRCHARROW, WBYTE as Byte + Dim lastImg as byte + +; ----- Quick Command Reference: + 'You should then do the following. + 'Replace the existing table data with your data BMP to a table. + 'You can define five BMP as a table. + 'Pick any of the five tables. YOU MUST RETAIN THE GCLDTABLEn NAMING CONVENTION + 'Then, so, you can easily remember the name of you BMP use a define + 'Then, call the subroutine, an example GLCDBMPLoad ( 0, 0, Anobium ) + #define Anobium @GLCDTable1 + #define GCB @GLCDTable2 +' #define Another1 @GLCDTable3 +' #define Another2 @GLCDTable4 +' #define Another3 @GLCDTable5 +; ----- Main body of program commences here. + + lastImg = 2 + + do forever + + if PORTB.0 = 0 then + if lastImg <> 0 then + GLCDCLS + GLCDBMPLoad ( 34, 0, Anobium ) + wait 750 ms + end if + lastImg = 0 + end if + + if PORTB.0 = 1 then + if lastImg <> 1 then + GLCDCLS + GLCDBMPLoad ( 20, 0, GCB ) + wait 750 ms + end if + lastImg = 1 + end if + +' GLCDCLS +' GLCDBMPLoad ( 0, 0, Another1 ) +' wait 750 ms +' +' GLCDCLS +' GLCDBMPLoad ( 0, 0, Another2 ) +' wait 750 ms +' +' GLCDCLS +' GLCDBMPLoad ( 0, 0, Another3 ) +' wait 750 ms + + + loop + end + +; ----- Support methods. Subroutines and Functions + sub GLCDBMPLoad ( in GLCDXPos, in GLCDYPos, in SelectedTable as word ) + + ' Start of code + TableReadPosition = 1 + + 'Read selected table + Select Case SelectedTable + Case @GLCDTable1: ReadTable GLCDTable1, TableReadPosition, objwidth + TableReadPosition++ + ReadTable GLCDTable1, TableReadPosition, objHeight + Case @GLCDTable2: ReadTable GLCDTable2, TableReadPosition, objwidth + TableReadPosition++ + ReadTable GLCDTable2, TableReadPosition, objHeight + Case @GLCDTable3: ReadTable GLCDTable3, TableReadPosition, objwidth + TableReadPosition++ + ReadTable GLCDTable3, TableReadPosition, objHeight + Case @GLCDTable4: ReadTable GLCDTable4, TableReadPosition, objwidth + TableReadPosition++ + ReadTable GLCDTable4, TableReadPosition, objHeight + Case @GLCDTable5: ReadTable GLCDTable5, TableReadPosition, objwidth + TableReadPosition++ + ReadTable GLCDTable5, TableReadPosition, objHeight + End Select + + + oldGLCDXPos = GLCDXPos + TableReadPosition = 3 + + WholeYBytes = objHeight / 8 ; Number of whole bytes within Y Axis. This is integer maths! + + onPageBoundary = ( GLCDYPos % 8 ) = 0 ; If GLCDYPos as a memory page boundary. Used to fast write the byte + + if WholeYBytes <> 0 then + + for hCount = 0 to (WholeYBytes - 1) ; counter to number of whole bytes + + ' it is safe to use GLCDY and X here as PSET is not called when this is used as a variable + GLCDY = GLCDYPos+hCount + for widthCount = 0 to (objwidth - 1) ; increment thru bytes horizontally + 'Read selected table + Select Case SelectedTable + Case @GLCDTable1: ReadTable GLCDTable1, TableReadPosition, wByte + + Case @GLCDTable2: ReadTable GLCDTable2, TableReadPosition, wByte + + Case @GLCDTable3: ReadTable GLCDTable3, TableReadPosition, wByte + + Case @GLCDTable4: ReadTable GLCDTable4, TableReadPosition, wByte + + Case @GLCDTable5: ReadTable GLCDTable5, TableReadPosition, wByte + + End Select + TableReadPosition++ + + if wByte <> OptmiseGLCDDraw then ; if the incoming byte is the same as the background, dont draw + ' So, we have to draw this byte + ' If a a page boundary this is a faster draw routine + if onPageBoundary = true then + ' use fast draw byte - essentially just write the data out, no, reading whats there. + GLCDX = GLCDXPos+widthCount + If GLCDX.6 = Off Then + Set GLCD_CS2 On + Set GLCD_CS1 off + end if + If GLCDX.6 = On Then + Set GLCD_CS1 On + GLCDX -= 64 + Set GLCD_CS2 off + end if + + 'Select page + CurrPage = GLCDY / 8 + Set GLCD_RS Off + GLCDWriteByte b'10111000' Or CurrPage + + 'Select column + GLCDWriteByte 64 Or GLCDX + 'Write data back + Set GLCD_RS On + GLCDWriteByte wByte + + else + + ' slow draw using X Y position and interate throught the bits + For CurrCharRow = 0 to 7 + If wByte.0 = 0 Then + PSet GLCDXPos+widthCount, CurrCharRow + GLCDYPos, GLCDBackground + Else + PSet GLCDXPos+widthCount, CurrCharRow + GLCDYPos, GLCDForeground + End If + Rotate wByte Right + Next + end if + + end if + + next widthCount + + GLCDXPos = oldGLCDXPos + GLCDYPos = GLCDYPos + 8 + + next hCount + + end if + + maxHeight = objHeight % 8 ; calculate the remaining bits + + 'writes and remaining bits, if any + if maxHeight <> 0 then + + for widthCount = 0 to objwidth - 1 + 'Read selected table + Select Case SelectedTable + Case @GLCDTable1: ReadTable GLCDTable1, TableReadPosition, wByte + + Case @GLCDTable2: ReadTable GLCDTable2, TableReadPosition, wByte + + Case @GLCDTable3: ReadTable GLCDTable3, TableReadPosition, wByte + + Case @GLCDTable4: ReadTable GLCDTable4, TableReadPosition, wByte + + Case @GLCDTable5: ReadTable GLCDTable5, TableReadPosition, wByte + + End Select + TableReadPosition++ + + ' slow draw using X Y position and interate throught the bits + For CurrCharRow = 0 to maxHeight-1 + If wByte.0 = 0 Then + PSet GLCDXPos+widthCount, ( CurrCharRow + GLCDYPos ), GLCDBackground + Else + PSet GLCDXPos+widthCount, ( CurrCharRow + GLCDYPos ), GLCDForeground + End If + Rotate wByte Right + Next + next + end if + Set GLCD_CS1 Off + Set GLCD_CS2 Off + end sub + +Table GLCDTable1 +' Anobium.bmp as a Table +' start data +0x3C +0x40 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 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+0xFF +0xFF +0x07 +0x01 +0x07 +0x1F +0xFF +0xFF +0xF0 +0xC0 +0x80 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x14 +0x1F +0x1F +0x1F +0x10 +0x00 +0x00 +0x00 +0x00 +0xFF +0xFF +0xFF +0xC0 +0x80 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x0C +0x3F +0x7F +0x7F +0x78 +0x00 +0x00 +0x00 +0x03 +0x03 +0x07 +0x03 +0x03 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x01 +0x01 +0x01 +0x01 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 +0x00 + +End Table + +Table GLCDTable3 + 1, 0, 255 +End Table + +Table GLCDTable4 + 1, 0, 255 +End Table + +Table GLCDTable5 + 1, 0, 255 +End Table diff --git a/resources/examples/Pic/ks0108_p18f4550/KS0108_18f4550.html b/resources/examples/Pic/ks0108_p18f4550/KS0108_18f4550.html new file mode 100644 index 0000000..90ee56a --- /dev/null +++ b/resources/examples/Pic/ks0108_p18f4550/KS0108_18f4550.html @@ -0,0 +1,42 @@ + + + +Compilation Report + + +

Compilation Report

+

Compiler Version (DD/MM/YYYY): 0.96.<<>> 2016-12-14

+

Chip resource usage:

+

Chip Model: 18F4550

+

Program Memory: 1783/16384 words (10.88%)

+

RAM: 43/2048 bytes (2.1%)

+

RAM Allocation

+ +
+

Subroutines

+ + + + + + + + + + + + + + + + + + + + + + + +
NameCode Size (lines)Compiled Size (words)Outgoing calls
Main4366SYSCOMPLESSTHAN16(4), INITGLCD_KS0108(33), Delay_MS(2), GLCDBMPLOAD(2), GLCDCLS_KS0108(2), INITSYS(1)
GLCDBMPLOAD106622SYSCOMPEQUAL(1), SYSDIVSUB(4), SYSCOMPLESSTHAN(8), SYSCOMPEQUAL16(15), PSET_KS0108(4), GLCDWRITEBYTE_KS0108(3)
INITGLCD_KS01082544Delay_MS(2), GLCDCLS_KS0108(1), GLCDWRITEBYTE_KS0108(2)
GLCDCLS_KS01082146GLCDWRITEBYTE_KS0108(3)
PSET_KS01084891SYSDIVSUB(1), GLCDREADBYTE_KS0108(2), GLCDWRITEBYTE_KS0108(4)
GLCDWRITEBYTE_KS01084574GLCDREADBYTE_KS0108(1)
GLCDREADBYTE_KS01082146
INITSYS57917
SYSDIVSUB4822
SYSCOMPEQUAL205
SYSCOMPEQUAL16349
SYSCOMPLESSTHAN235
SYSCOMPLESSTHAN163814
Delay_MS018
GLCDTABLE10265
GLCDTABLE1_H023
GLCDTABLE20348
GLCDTABLE2_H023
GLCDTABLE3015
GLCDTABLE4015
GLCDTABLE5015
+ + diff --git a/resources/examples/Pic/ks0108_p18f4550/KS0108_18f4550.lst b/resources/examples/Pic/ks0108_p18f4550/KS0108_18f4550.lst new file mode 100644 index 0000000..2903dc4 --- /dev/null +++ b/resources/examples/Pic/ks0108_p18f4550/KS0108_18f4550.lst @@ -0,0 +1,2320 @@ +GCASM List File (GCBASIC 0.96.<<>> 2016-12-14) + +Symbols: +A EQU 0 +ABDEN EQU 0 +ABDOVF EQU 7 +ACCESS EQU 0 +ACKDT EQU 5 +ACKEN EQU 4 +ACKSTAT EQU 6 +ACQT0 EQU 3 +ACQT1 EQU 4 +ACQT2 EQU 5 +ACTVIE EQU 2 +ACTVIF EQU 2 +ADCON0 EQU 4034 +ADCON0_GO_DONE EQU 1 +ADCON1 EQU 4033 +ADCON2 EQU 4032 +ADCS0 EQU 0 +ADCS1 EQU 1 +ADCS2 EQU 2 +ADDEN EQU 3 +ADDR0 EQU 0 +ADDR1 EQU 1 +ADDR2 EQU 2 +ADDR3 EQU 3 +ADDR4 EQU 4 +ADDR5 EQU 5 +ADDR6 EQU 6 +ADEN EQU 3 +ADFM EQU 7 +ADIE EQU 6 +ADIF EQU 6 +ADIP EQU 6 +ADON EQU 0 +ADRES EQU 4035 +ADRESH EQU 4036 +ADRESL EQU 4035 +AN0 EQU 0 +AN1 EQU 1 +AN2 EQU 2 +AN3 EQU 3 +AN4 EQU 5 +B EQU 1 +BANKED EQU 1 +BASPROGRAMEND EQU 114 +BASPROGRAMSTART EQU 12 +BAUDCON EQU 4024 +BAUDCTL EQU 4024 +BAUDCTL_ABDEN EQU 0 +BAUDCTL_ABDOVF EQU 7 +BAUDCTL_BRG16 EQU 3 +BAUDCTL_RCIDL EQU 6 +BAUDCTL_RCMT EQU 6 +BAUDCTL_RXDTP EQU 5 +BAUDCTL_SCKP EQU 4 +BAUDCTL_TXCKP EQU 4 +BAUDCTL_WUE EQU 1 +BCLIE EQU 3 +BCLIF EQU 3 +BCLIP EQU 3 +BF EQU 0 +BGST EQU 5 +BOR EQU 0 +BRG16 EQU 3 +BRGH EQU 2 +BSR EQU 4064 +BTOEE EQU 4 +BTOEF EQU 4 +BTSEE EQU 7 +BTSEF EQU 7 +C EQU 0 +C1INV EQU 4 +C1OUT EQU 6 +C2INV EQU 5 +C2OUT EQU 7 +CCP1 EQU 2 +CCP1AS EQU 4022 +CCP1CON EQU 4029 +CCP1DEL EQU 4023 +CCP1IE EQU 2 +CCP1IF EQU 2 +CCP1IP EQU 2 +CCP1M0 EQU 0 +CCP1M1 EQU 1 +CCP1M2 EQU 2 +CCP1M3 EQU 3 +CCP2CON EQU 4026 +CCP2IE EQU 0 +CCP2IF EQU 0 +CCP2IP EQU 0 +CCP2M0 EQU 0 +CCP2M1 EQU 1 +CCP2M2 EQU 2 +CCP2M3 EQU 3 +CCPR1 EQU 4030 +CCPR1H EQU 4031 +CCPR1L EQU 4030 +CCPR2 EQU 4027 +CCPR2H EQU 4028 +CCPR2L EQU 4027 +CFGS EQU 6 +CHS0 EQU 2 +CHS1 EQU 3 +CHS2 EQU 4 +CHS3 EQU 5 +CIS EQU 3 +CK EQU 6 +CK1SPP EQU 0 +CK2SPP EQU 1 +CKE EQU 6 +CKP EQU 4 +CLK1EN EQU 4 +CLKCFG0 EQU 6 +CLKCFG1 EQU 7 +CM0 EQU 0 +CM1 EQU 1 +CM2 EQU 2 +CMCON EQU 4020 +CMIE EQU 6 +CMIF EQU 6 +CMIP EQU 6 +CRC16EE EQU 2 +CRC16EF EQU 2 +CRC5EE EQU 1 +CRC5EF EQU 1 +CREN EQU 4 +CSEN EQU 5 +CSRC EQU 7 +CURRCHARROW EQU 11 +CURRCOL EQU 12 +CURRPAGE EQU 13 +CVR0 EQU 0 +CVR1 EQU 1 +CVR2 EQU 2 +CVR3 EQU 3 +CVRCON EQU 4021 +CVREF EQU 4 +CVREN EQU 7 +CVROE EQU 6 +CVRR EQU 5 +CVRSS EQU 4 +D EQU 5 +DATA_ADDRESS EQU 5 +DC EQU 1 +DC1B0 EQU 4 +DC1B1 EQU 5 +DC2B0 EQU 4 +DC2B1 EQU 5 +DDRA EQU 3986 +DDRA_RA0 EQU 0 +DDRA_RA1 EQU 1 +DDRA_RA2 EQU 2 +DDRA_RA3 EQU 3 +DDRA_RA4 EQU 4 +DDRA_RA5 EQU 5 +DDRA_RA6 EQU 6 +DDRB EQU 3987 +DDRB_RB0 EQU 0 +DDRB_RB1 EQU 1 +DDRB_RB2 EQU 2 +DDRB_RB3 EQU 3 +DDRB_RB4 EQU 4 +DDRB_RB5 EQU 5 +DDRB_RB6 EQU 6 +DDRB_RB7 EQU 7 +DDRC EQU 3988 +DDRC_RC0 EQU 0 +DDRC_RC1 EQU 1 +DDRC_RC2 EQU 2 +DDRC_RC6 EQU 6 +DDRC_RC7 EQU 7 +DDRD EQU 3989 +DDRD_RD0 EQU 0 +DDRD_RD1 EQU 1 +DDRD_RD2 EQU 2 +DDRD_RD3 EQU 3 +DDRD_RD4 EQU 4 +DDRD_RD5 EQU 5 +DDRD_RD6 EQU 6 +DDRD_RD7 EQU 7 +DDRE EQU 3990 +DDRE_RE0 EQU 0 +DDRE_RE1 EQU 1 +DDRE_RE2 EQU 2 +DELAYTEMP EQU 0 +DELAYTEMP2 EQU 1 +DELAYUS1 EQU 2936 +DELAYUS2 EQU 2948 +DELAYUS3 EQU 2960 +DELAYUS4 EQU 1366 +DELAYUS5 EQU 1424 +DELAY_MS EQU 118 +DFN8EE EQU 3 +DFN8EF EQU 3 +DIR EQU 2 +DIV8NOTNEG EQU 3336 +DMS_INNER EQU 128 +DMS_OUTER EQU 124 +DMS_START EQU 120 +DONE EQU 1 +D_A EQU 5 +D_NOT_A EQU 5 +ECCP1AS EQU 4022 +ECCP1AS_ECCPAS0 EQU 4 +ECCP1AS_ECCPAS1 EQU 5 +ECCP1AS_ECCPAS2 EQU 6 +ECCP1AS_ECCPASE EQU 7 +ECCP1AS_PSSAC0 EQU 2 +ECCP1AS_PSSAC1 EQU 3 +ECCP1AS_PSSBD0 EQU 0 +ECCP1AS_PSSBD1 EQU 1 +ECCP1CON EQU 4029 +ECCP1CON_CCP1M0 EQU 0 +ECCP1CON_CCP1M1 EQU 1 +ECCP1CON_CCP1M2 EQU 2 +ECCP1CON_CCP1M3 EQU 3 +ECCP1CON_DC1B0 EQU 4 +ECCP1CON_DC1B1 EQU 5 +ECCP1CON_P1M0 EQU 6 +ECCP1CON_P1M1 EQU 7 +ECCP1DEL EQU 4023 +ECCP1DEL_PDC0 EQU 0 +ECCP1DEL_PDC1 EQU 1 +ECCP1DEL_PDC2 EQU 2 +ECCP1DEL_PDC3 EQU 3 +ECCP1DEL_PDC4 EQU 4 +ECCP1DEL_PDC5 EQU 5 +ECCP1DEL_PDC6 EQU 6 +ECCP1DEL_PRSEN EQU 7 +ECCPAS0 EQU 4 +ECCPAS1 EQU 5 +ECCPAS2 EQU 6 +ECCPASE EQU 7 +EEADR EQU 4009 +EECON1 EQU 4006 +EECON2 EQU 4007 +EEDATA EQU 4008 +EEIE EQU 4 +EEIF EQU 4 +EEIP EQU 4 +EEPGD EQU 7 +ELSE14_1 EQU 1196 +ELSE17_1 EQU 804 +ELSE20_1 EQU 838 +ELSE28_1 EQU 3172 +ELSE29_1 EQU 3206 +ENDIF1 EQU 68 +ENDIF14 EQU 1218 +ENDIF17 EQU 872 +ENDIF18 EQU 746 +ENDIF19 EQU 758 +ENDIF2 EQU 110 +ENDIF20 EQU 862 +ENDIF26 EQU 3092 +ENDIF27 EQU 3104 +ENDIF28 EQU 3178 +ENDIF29 EQU 3212 +ENDIF3 EQU 66 +ENDIF4 EQU 106 +ENDIF5 EQU 920 +ENDIF6 EQU 1256 +ENDIF9 EQU 872 +ENDP0 EQU 3 +ENDP1 EQU 4 +ENDP2 EQU 5 +ENDP3 EQU 6 +EPCONDIS EQU 3 +EPHSHK EQU 4 +EPINEN EQU 1 +EPOUTEN EQU 2 +EPSTALL EQU 0 +F EQU 1 +FERR EQU 2 +FLTS EQU 2 +FN_GLCDREADBYTE_KS0108 EQU 1342 +FREE EQU 4 +FRM0 EQU 0 +FRM1 EQU 1 +FRM10 EQU 2 +FRM2 EQU 2 +FRM3 EQU 3 +FRM4 EQU 4 +FRM5 EQU 5 +FRM6 EQU 6 +FRM7 EQU 7 +FRM8 EQU 0 +FRM9 EQU 1 +FSEN EQU 2 +FSR0H EQU 4074 +FSR0L EQU 4073 +FSR1H EQU 4066 +FSR1L EQU 4065 +FSR2H EQU 4058 +FSR2L EQU 4057 +GCEN EQU 7 +GIE EQU 7 +GIEH EQU 7 +GIEL EQU 6 +GIE_GIEH EQU 7 +GLCDBACKGROUND EQU 14 +GLCDBACKGROUND_H EQU 15 +GLCDBITNO EQU 16 +GLCDBMPLOAD EQU 146 +GLCDCHANGE EQU 17 +GLCDCLS_KS0108 EQU 1262 +GLCDCOLOUR EQU 18 +GLCDCOLOUR_H EQU 19 +GLCDDATATEMP EQU 20 +GLCDFNTDEFAULT EQU 21 +GLCDFNTDEFAULTSIZE EQU 22 +GLCDFONTWIDTH EQU 23 +GLCDFOREGROUND EQU 24 +GLCDFOREGROUND_H EQU 25 +GLCDREADBYTE_KS0108 EQU 26 +GLCDTABLE1 EQU 1430 +GLCDTABLE1_H EQU 1958 +GLCDTABLE2 EQU 2002 +GLCDTABLE2_H EQU 2696 +GLCDTABLE3 EQU 2740 +GLCDTABLE4 EQU 2770 +GLCDTABLE5 EQU 2800 +GLCDWRITEBYTE_KS0108 EQU 2830 +GLCDX EQU 27 +GLCDXPOS EQU 28 +GLCDY EQU 29 +GLCDYPOS EQU 30 +GLCD_COUNT EQU 31 +GLCD_YORDINATE EQU 32 +GLCD_YORDINATE_H EQU 33 +GO EQU 1 +GO_DONE EQU 1 +GO_NOT_DONE EQU 1 +HCOUNT EQU 34 +HLVDCON EQU 4050 +HLVDEN EQU 4 +HLVDIE EQU 2 +HLVDIF EQU 2 +HLVDIN EQU 5 +HLVDIP EQU 2 +HLVDL0 EQU 0 +HLVDL1 EQU 1 +HLVDL2 EQU 2 +HLVDL3 EQU 3 +I2C_DAT EQU 5 +I2C_READ EQU 2 +I2C_START EQU 3 +I2C_STOP EQU 4 +IDLEIE EQU 4 +IDLEIF EQU 4 +IDLEN EQU 7 +INDF0 EQU 4079 +INDF1 EQU 4071 +INDF2 EQU 4063 +INITGLCD_KS0108 EQU 2968 +INITSYS EQU 3050 +INT0 EQU 0 +INT0E EQU 4 +INT0F EQU 1 +INT0IE EQU 4 +INT0IF EQU 1 +INT1 EQU 1 +INT1E EQU 3 +INT1F EQU 0 +INT1IE EQU 3 +INT1IF EQU 0 +INT1IP EQU 6 +INT1P EQU 6 +INT2 EQU 2 +INT2E EQU 4 +INT2F EQU 1 +INT2IE EQU 4 +INT2IF EQU 1 +INT2IP EQU 7 +INT2P EQU 7 +INTCON EQU 4082 +INTCON2 EQU 4081 +INTCON3 EQU 4080 +INTEDG0 EQU 6 +INTEDG1 EQU 5 +INTEDG2 EQU 4 +INTSRC EQU 7 +IOFS EQU 2 +IPEN EQU 7 +IPR1 EQU 3999 +IPR2 EQU 4002 +IRCF0 EQU 4 +IRCF1 EQU 5 +IRCF2 EQU 6 +IRVST EQU 5 +IVRST EQU 5 +LASTIMG EQU 35 +LATA EQU 3977 +LATA0 EQU 0 +LATA1 EQU 1 +LATA2 EQU 2 +LATA3 EQU 3 +LATA4 EQU 4 +LATA5 EQU 5 +LATA6 EQU 6 +LATB EQU 3978 +LATB0 EQU 0 +LATB1 EQU 1 +LATB2 EQU 2 +LATB3 EQU 3 +LATB4 EQU 4 +LATB5 EQU 5 +LATB6 EQU 6 +LATB7 EQU 7 +LATC EQU 3979 +LATC0 EQU 0 +LATC1 EQU 1 +LATC2 EQU 2 +LATC6 EQU 6 +LATC7 EQU 7 +LATD EQU 3980 +LATD0 EQU 0 +LATD1 EQU 1 +LATD2 EQU 2 +LATD3 EQU 3 +LATD4 EQU 4 +LATD5 EQU 5 +LATD6 EQU 6 +LATD7 EQU 7 +LATE EQU 3981 +LATE0 EQU 0 +LATE1 EQU 1 +LATE2 EQU 2 +LCDBYTE EQU 36 +LVDCON EQU 4050 +LVDCON_BGST EQU 5 +LVDCON_HLVDEN EQU 4 +LVDCON_HLVDL0 EQU 0 +LVDCON_HLVDL1 EQU 1 +LVDCON_HLVDL2 EQU 2 +LVDCON_HLVDL3 EQU 3 +LVDCON_IRVST EQU 5 +LVDCON_IVRST EQU 5 +LVDCON_LVDEN EQU 4 +LVDCON_LVDL0 EQU 0 +LVDCON_LVDL1 EQU 1 +LVDCON_LVDL2 EQU 2 +LVDCON_LVDL3 EQU 3 +LVDCON_LVV0 EQU 0 +LVDCON_LVV1 EQU 1 +LVDCON_LVV2 EQU 2 +LVDCON_LVV3 EQU 3 +LVDCON_VDIRMAG EQU 7 +LVDEN EQU 4 +LVDIE EQU 2 +LVDIF EQU 2 +LVDIN EQU 5 +LVDIP EQU 2 +LVDL0 EQU 0 +LVDL1 EQU 1 +LVDL2 EQU 2 +LVDL3 EQU 3 +LVV0 EQU 0 +LVV1 EQU 1 +LVV2 EQU 2 +LVV3 EQU 3 +MAXHEIGHT EQU 37 +N EQU 4 +NOT_A EQU 5 +NOT_ADDRESS EQU 5 +NOT_BOR EQU 0 +NOT_DONE EQU 1 +NOT_IPEN EQU 7 +NOT_PD EQU 2 +NOT_POR EQU 1 +NOT_RBPU EQU 7 +NOT_RI EQU 4 +NOT_T1SYNC EQU 2 +NOT_T3SYNC EQU 2 +NOT_TO EQU 3 +NOT_W EQU 2 +NOT_WRITE EQU 2 +OBJHEIGHT EQU 38 +OBJWIDTH EQU 39 +OERR EQU 1 +OESPP EQU 2 +OLDGLCDXPOS EQU 40 +ONPAGEBOUNDARY EQU 41 +OPTMISEGLCDDRAW EQU 42 +OSC2 EQU 6 +OSCCON EQU 4051 +OSCFIE EQU 7 +OSCFIF EQU 7 +OSCFIP EQU 7 +OSCTUNE EQU 3995 +OSTS EQU 3 +OV EQU 3 +P EQU 4 +P1A EQU 2 +P1M0 EQU 6 +P1M1 EQU 7 +PC EQU 4089 +PCFG0 EQU 0 +PCFG1 EQU 1 +PCFG2 EQU 2 +PCFG3 EQU 3 +PCL EQU 4089 +PCLATH EQU 4090 +PCLATU EQU 4091 +PD EQU 2 +PDC0 EQU 0 +PDC1 EQU 1 +PDC2 EQU 2 +PDC3 EQU 3 +PDC4 EQU 4 +PDC5 EQU 5 +PDC6 EQU 6 +PEIE EQU 6 +PEIE_GIEL EQU 6 +PEN EQU 2 +PGC EQU 6 +PGD EQU 7 +PGM EQU 5 +PIDEE EQU 0 +PIDEF EQU 0 +PIE1 EQU 3997 +PIE2 EQU 4000 +PIR1 EQU 3998 +PIR2 EQU 4001 +PKTDIS EQU 4 +PLUSW0 EQU 4075 +PLUSW1 EQU 4067 +PLUSW2 EQU 4059 +POR EQU 1 +PORTA EQU 3968 +PORTB EQU 3969 +PORTC EQU 3970 +PORTD EQU 3971 +PORTE EQU 3972 +POSTDEC0 EQU 4077 +POSTDEC1 EQU 4069 +POSTDEC2 EQU 4061 +POSTINC0 EQU 4078 +POSTINC1 EQU 4070 +POSTINC2 EQU 4062 +PPB0 EQU 0 +PPB1 EQU 1 +PPBI EQU 1 +PPBRST EQU 6 +PR2 EQU 4043 +PREINC0 EQU 4076 +PREINC1 EQU 4068 +PREINC2 EQU 4060 +PROD EQU 4083 +PRODH EQU 4084 +PRODL EQU 4083 +PRSEN EQU 7 +PSA EQU 3 +PSET_KS0108 EQU 3084 +PSSAC0 EQU 2 +PSSAC1 EQU 3 +PSSBD0 EQU 0 +PSSBD1 EQU 1 +R EQU 2 +RA0 EQU 0 +RA1 EQU 1 +RA2 EQU 2 +RA3 EQU 3 +RA4 EQU 4 +RA5 EQU 5 +RA6 EQU 6 +RB0 EQU 0 +RB1 EQU 1 +RB2 EQU 2 +RB3 EQU 3 +RB4 EQU 4 +RB5 EQU 5 +RB6 EQU 6 +RB7 EQU 7 +RBIE EQU 3 +RBIF EQU 0 +RBIP EQU 0 +RBPU EQU 7 +RC0 EQU 0 +RC1 EQU 1 +RC2 EQU 2 +RC4 EQU 4 +RC5 EQU 5 +RC6 EQU 6 +RC7 EQU 7 +RCEN EQU 3 +RCIDL EQU 6 +RCIE EQU 5 +RCIF EQU 5 +RCIP EQU 5 +RCMT EQU 6 +RCON EQU 4048 +RCREG EQU 4014 +RCSTA EQU 4011 +RD EQU 0 +RD0 EQU 0 +RD1 EQU 1 +RD16 EQU 7 +RD2 EQU 2 +RD3 EQU 3 +RD4 EQU 4 +RD5 EQU 5 +RD6 EQU 6 +RD7 EQU 7 +RDPU EQU 7 +RDSPP EQU 7 +RE0 EQU 0 +RE1 EQU 1 +RE2 EQU 2 +RE3 EQU 3 +READ_WRITE EQU 2 +RESUME EQU 2 +RI EQU 4 +RSEN EQU 1 +RX EQU 7 +RX9 EQU 6 +RX9D EQU 0 +RXDTP EQU 5 +R_NOT_W EQU 2 +R_W EQU 2 +S EQU 3 +SBOREN EQU 6 +SCKP EQU 4 +SCLT16TRUE EQU 3298 +SCS0 EQU 0 +SCS1 EQU 1 +SE0 EQU 5 +SELECTEDTABLE EQU 43 +SELECTEDTABLE_H EQU 44 +SEN EQU 0 +SENDB EQU 3 +SMP EQU 7 +SOFIE EQU 6 +SOFIF EQU 6 +SPBRG EQU 4015 +SPBRGH EQU 4016 +SPEN EQU 7 +SPP0 EQU 0 +SPP1 EQU 1 +SPP2 EQU 2 +SPP3 EQU 3 +SPP4 EQU 4 +SPP5 EQU 5 +SPP6 EQU 6 +SPP7 EQU 7 +SPPBUSY EQU 4 +SPPCFG EQU 3939 +SPPCON EQU 3941 +SPPDATA EQU 3938 +SPPEN EQU 0 +SPPEPS EQU 3940 +SPPIE EQU 7 +SPPIF EQU 7 +SPPIP EQU 7 +SPPOWN EQU 1 +SREN EQU 5 +SSPADD EQU 4040 +SSPBUF EQU 4041 +SSPCON1 EQU 4038 +SSPCON2 EQU 4037 +SSPEN EQU 5 +SSPIE EQU 3 +SSPIF EQU 3 +SSPIP EQU 3 +SSPM0 EQU 0 +SSPM1 EQU 1 +SSPM2 EQU 2 +SSPM3 EQU 3 +SSPOV EQU 6 +SSPSTAT EQU 4039 +STALLIE EQU 5 +STALLIF EQU 5 +STATUS EQU 4056 +STKFUL EQU 7 +STKOVF EQU 7 +STKPTR EQU 4092 +STKPTR0 EQU 0 +STKPTR1 EQU 1 +STKPTR2 EQU 2 +STKPTR3 EQU 3 +STKPTR4 EQU 4 +STKUNF EQU 6 +SUSPND EQU 1 +SWDTE EQU 0 +SWDTEN EQU 0 +SYNC EQU 4 +SYSBITVAR0 EQU 45 +SYSBYTETEMPA EQU 5 +SYSBYTETEMPB EQU 9 +SYSBYTETEMPX EQU 0 +SYSCOMPEQUAL EQU 3236 +SYSCOMPEQUAL16 EQU 3246 +SYSCOMPLESSTHAN EQU 3264 +SYSCOMPLESSTHAN16 EQU 3274 +SYSDIV8START EQU 3314 +SYSDIVLOOP EQU 4 +SYSDIVSUB EQU 3302 +SYSDOLOOP_E1 EQU 112 +SYSDOLOOP_S1 EQU 28 +SYSFORLOOP1 EQU 500 +SYSFORLOOP2 EQU 528 +SYSFORLOOP3 EQU 806 +SYSFORLOOP4 EQU 962 +SYSFORLOOP5 EQU 1166 +SYSFORLOOP6 EQU 1272 +SYSFORLOOP7 EQU 1276 +SYSFORLOOP8 EQU 1290 +SYSFORLOOPEND1 EQU 920 +SYSFORLOOPEND2 EQU 892 +SYSFORLOOPEND3 EQU 872 +SYSFORLOOPEND4 EQU 1256 +SYSFORLOOPEND5 EQU 1238 +SYSFORLOOPEND6 EQU 1336 +SYSFORLOOPEND7 EQU 1324 +SYSFORLOOPEND8 EQU 1316 +SYSREPEATLOOP1 EQU 3188 +SYSREPEATLOOPEND1 EQU 3194 +SYSREPEATTEMP1 EQU 46 +SYSSELECT1CASE1 EQU 152 +SYSSELECT1CASE2 EQU 208 +SYSSELECT1CASE3 EQU 264 +SYSSELECT1CASE4 EQU 316 +SYSSELECT1CASE5 EQU 368 +SYSSELECT1CASE6 EQU 418 +SYSSELECT2CASE1 EQU 530 +SYSSELECT2CASE2 EQU 568 +SYSSELECT2CASE3 EQU 606 +SYSSELECT2CASE4 EQU 642 +SYSSELECT2CASE5 EQU 678 +SYSSELECT2CASE6 EQU 712 +SYSSELECT3CASE1 EQU 964 +SYSSELECT3CASE2 EQU 1002 +SYSSELECT3CASE3 EQU 1040 +SYSSELECT3CASE4 EQU 1074 +SYSSELECT3CASE5 EQU 1108 +SYSSELECT3CASE6 EQU 1140 +SYSSELECTEND1 EQU 418 +SYSSELECTEND2 EQU 712 +SYSSELECTEND3 EQU 1140 +SYSSTRINGA EQU 7 +SYSSTRINGA_H EQU 8 +SYSTEMP1 EQU 47 +SYSTEMP2 EQU 48 +SYSWAITLOOP1 EQU 2848 +SYSWAITTEMPMS EQU 2 +SYSWAITTEMPMS_H EQU 3 +SYSWAITTEMPUS EQU 5 +SYSWAITTEMPUS_H EQU 6 +SYSWORDTEMPA EQU 5 +SYSWORDTEMPA_H EQU 6 +SYSWORDTEMPB EQU 9 +SYSWORDTEMPB_H EQU 10 +T08BIT EQU 6 +T0CKI EQU 4 +T0CON EQU 4053 +T0CS EQU 5 +T0IE EQU 5 +T0IF EQU 2 +T0IP EQU 2 +T0PS0 EQU 0 +T0PS1 EQU 1 +T0PS2 EQU 2 +T0SE EQU 4 +T13CKI EQU 0 +T1CKPS0 EQU 4 +T1CKPS1 EQU 5 +T1CON EQU 4045 +T1CON_RD16 EQU 7 +T1OSCEN EQU 3 +T1OSI EQU 1 +T1OSO EQU 0 +T1RUN EQU 6 +T1SYNC EQU 2 +T2CKPS0 EQU 0 +T2CKPS1 EQU 1 +T2CON EQU 4042 +T2OUTPS0 EQU 3 +T2OUTPS1 EQU 4 +T2OUTPS2 EQU 5 +T2OUTPS3 EQU 6 +T3CCP1 EQU 3 +T3CCP2 EQU 6 +T3CKPS0 EQU 4 +T3CKPS1 EQU 5 +T3CON EQU 4017 +T3NSYNC EQU 2 +T3SYNC EQU 2 +TABLAT EQU 4085 +TABLEGLCDTABLE1 EQU 1474 +TABLEGLCDTABLE1_H EQU 2000 +TABLEGLCDTABLE2 EQU 2046 +TABLEGLCDTABLE2_H EQU 2738 +TABLEGLCDTABLE3 EQU 2766 +TABLEGLCDTABLE4 EQU 2796 +TABLEGLCDTABLE5 EQU 2826 +TABLEREADPOSITION EQU 49 +TABLEREADPOSITION_H EQU 50 +TBLPTR EQU 4086 +TBLPTRH EQU 4087 +TBLPTRL EQU 4086 +TBLPTRU EQU 4088 +TMR0 EQU 4054 +TMR0H EQU 4055 +TMR0IE EQU 5 +TMR0IF EQU 2 +TMR0IP EQU 2 +TMR0L EQU 4054 +TMR0ON EQU 7 +TMR1 EQU 4046 +TMR1CS EQU 1 +TMR1H EQU 4047 +TMR1IE EQU 0 +TMR1IF EQU 0 +TMR1IP EQU 0 +TMR1L EQU 4046 +TMR1ON EQU 0 +TMR2 EQU 4044 +TMR2IE EQU 1 +TMR2IF EQU 1 +TMR2IP EQU 1 +TMR2ON EQU 2 +TMR3 EQU 4018 +TMR3CS EQU 1 +TMR3H EQU 4019 +TMR3IE EQU 1 +TMR3IF EQU 1 +TMR3IP EQU 1 +TMR3L EQU 4018 +TMR3ON EQU 0 +TO EQU 3 +TOS EQU 4093 +TOSH EQU 4094 +TOSL EQU 4093 +TOSU EQU 4095 +TOUTPS0 EQU 3 +TOUTPS1 EQU 4 +TOUTPS2 EQU 5 +TOUTPS3 EQU 6 +TRISA EQU 3986 +TRISA0 EQU 0 +TRISA1 EQU 1 +TRISA2 EQU 2 +TRISA3 EQU 3 +TRISA4 EQU 4 +TRISA5 EQU 5 +TRISA6 EQU 6 +TRISA_RA0 EQU 0 +TRISA_RA1 EQU 1 +TRISA_RA2 EQU 2 +TRISA_RA3 EQU 3 +TRISA_RA4 EQU 4 +TRISA_RA5 EQU 5 +TRISA_RA6 EQU 6 +TRISA_TRISA0 EQU 0 +TRISA_TRISA1 EQU 1 +TRISA_TRISA2 EQU 2 +TRISA_TRISA3 EQU 3 +TRISA_TRISA4 EQU 4 +TRISA_TRISA5 EQU 5 +TRISA_TRISA6 EQU 6 +TRISB EQU 3987 +TRISB0 EQU 0 +TRISB1 EQU 1 +TRISB2 EQU 2 +TRISB3 EQU 3 +TRISB4 EQU 4 +TRISB5 EQU 5 +TRISB6 EQU 6 +TRISB7 EQU 7 +TRISB_RB0 EQU 0 +TRISB_RB1 EQU 1 +TRISB_RB2 EQU 2 +TRISB_RB3 EQU 3 +TRISB_RB4 EQU 4 +TRISB_RB5 EQU 5 +TRISB_RB6 EQU 6 +TRISB_RB7 EQU 7 +TRISB_TRISB0 EQU 0 +TRISB_TRISB1 EQU 1 +TRISB_TRISB2 EQU 2 +TRISB_TRISB3 EQU 3 +TRISB_TRISB4 EQU 4 +TRISB_TRISB5 EQU 5 +TRISB_TRISB6 EQU 6 +TRISB_TRISB7 EQU 7 +TRISC EQU 3988 +TRISC0 EQU 0 +TRISC1 EQU 1 +TRISC2 EQU 2 +TRISC6 EQU 6 +TRISC7 EQU 7 +TRISC_RC0 EQU 0 +TRISC_RC1 EQU 1 +TRISC_RC2 EQU 2 +TRISC_RC6 EQU 6 +TRISC_RC7 EQU 7 +TRISC_TRISC0 EQU 0 +TRISC_TRISC1 EQU 1 +TRISC_TRISC2 EQU 2 +TRISC_TRISC6 EQU 6 +TRISC_TRISC7 EQU 7 +TRISD EQU 3989 +TRISD0 EQU 0 +TRISD1 EQU 1 +TRISD2 EQU 2 +TRISD3 EQU 3 +TRISD4 EQU 4 +TRISD5 EQU 5 +TRISD6 EQU 6 +TRISD7 EQU 7 +TRISD_RD0 EQU 0 +TRISD_RD1 EQU 1 +TRISD_RD2 EQU 2 +TRISD_RD3 EQU 3 +TRISD_RD4 EQU 4 +TRISD_RD5 EQU 5 +TRISD_RD6 EQU 6 +TRISD_RD7 EQU 7 +TRISD_TRISD0 EQU 0 +TRISD_TRISD1 EQU 1 +TRISD_TRISD2 EQU 2 +TRISD_TRISD3 EQU 3 +TRISD_TRISD4 EQU 4 +TRISD_TRISD5 EQU 5 +TRISD_TRISD6 EQU 6 +TRISD_TRISD7 EQU 7 +TRISE EQU 3990 +TRISE0 EQU 0 +TRISE1 EQU 1 +TRISE2 EQU 2 +TRISE_RE0 EQU 0 +TRISE_RE1 EQU 1 +TRISE_RE2 EQU 2 +TRISE_TRISE0 EQU 0 +TRISE_TRISE1 EQU 1 +TRISE_TRISE2 EQU 2 +TRMT EQU 1 +TRNIE EQU 3 +TRNIF EQU 3 +TUN0 EQU 0 +TUN1 EQU 1 +TUN2 EQU 2 +TUN3 EQU 3 +TUN4 EQU 4 +TX EQU 6 +TX9 EQU 6 +TX9D EQU 0 +TXCKP EQU 4 +TXEN EQU 5 +TXIE EQU 4 +TXIF EQU 4 +TXIP EQU 4 +TXREG EQU 4013 +TXSTA EQU 4012 +UA EQU 1 +UADDR EQU 3950 +UADDR_ADDR0 EQU 0 +UADDR_ADDR1 EQU 1 +UADDR_ADDR2 EQU 2 +UADDR_ADDR3 EQU 3 +UCFG EQU 3951 +UCON EQU 3949 +UEIE EQU 3947 +UEIR EQU 3946 +UEP0 EQU 3952 +UEP1 EQU 3953 +UEP10 EQU 3962 +UEP10_EPCONDIS EQU 3 +UEP10_EPHSHK EQU 4 +UEP10_EPINEN EQU 1 +UEP10_EPOUTEN EQU 2 +UEP10_EPSTALL EQU 0 +UEP11 EQU 3963 +UEP11_EPCONDIS EQU 3 +UEP11_EPHSHK EQU 4 +UEP11_EPINEN EQU 1 +UEP11_EPOUTEN EQU 2 +UEP11_EPSTALL EQU 0 +UEP12 EQU 3964 +UEP12_EPCONDIS EQU 3 +UEP12_EPHSHK EQU 4 +UEP12_EPINEN EQU 1 +UEP12_EPOUTEN EQU 2 +UEP12_EPSTALL EQU 0 +UEP13 EQU 3965 +UEP13_EPCONDIS EQU 3 +UEP13_EPHSHK EQU 4 +UEP13_EPINEN EQU 1 +UEP13_EPOUTEN EQU 2 +UEP13_EPSTALL EQU 0 +UEP14 EQU 3966 +UEP14_EPCONDIS EQU 3 +UEP14_EPHSHK EQU 4 +UEP14_EPINEN EQU 1 +UEP14_EPOUTEN EQU 2 +UEP14_EPSTALL EQU 0 +UEP15 EQU 3967 +UEP15_EPCONDIS EQU 3 +UEP15_EPHSHK EQU 4 +UEP15_EPINEN EQU 1 +UEP15_EPOUTEN EQU 2 +UEP15_EPSTALL EQU 0 +UEP1_EPCONDIS EQU 3 +UEP1_EPHSHK EQU 4 +UEP1_EPINEN EQU 1 +UEP1_EPOUTEN EQU 2 +UEP1_EPSTALL EQU 0 +UEP2 EQU 3954 +UEP2_EPCONDIS EQU 3 +UEP2_EPHSHK EQU 4 +UEP2_EPINEN EQU 1 +UEP2_EPOUTEN EQU 2 +UEP2_EPSTALL EQU 0 +UEP3 EQU 3955 +UEP3_EPCONDIS EQU 3 +UEP3_EPHSHK EQU 4 +UEP3_EPINEN EQU 1 +UEP3_EPOUTEN EQU 2 +UEP3_EPSTALL EQU 0 +UEP4 EQU 3956 +UEP4_EPCONDIS EQU 3 +UEP4_EPHSHK EQU 4 +UEP4_EPINEN EQU 1 +UEP4_EPOUTEN EQU 2 +UEP4_EPSTALL EQU 0 +UEP5 EQU 3957 +UEP5_EPCONDIS EQU 3 +UEP5_EPHSHK EQU 4 +UEP5_EPINEN EQU 1 +UEP5_EPOUTEN EQU 2 +UEP5_EPSTALL EQU 0 +UEP6 EQU 3958 +UEP6_EPCONDIS EQU 3 +UEP6_EPHSHK EQU 4 +UEP6_EPINEN EQU 1 +UEP6_EPOUTEN EQU 2 +UEP6_EPSTALL EQU 0 +UEP7 EQU 3959 +UEP7_EPCONDIS EQU 3 +UEP7_EPHSHK EQU 4 +UEP7_EPINEN EQU 1 +UEP7_EPOUTEN EQU 2 +UEP7_EPSTALL EQU 0 +UEP8 EQU 3960 +UEP8_EPCONDIS EQU 3 +UEP8_EPHSHK EQU 4 +UEP8_EPINEN EQU 1 +UEP8_EPOUTEN EQU 2 +UEP8_EPSTALL EQU 0 +UEP9 EQU 3961 +UEP9_EPCONDIS EQU 3 +UEP9_EPHSHK EQU 4 +UEP9_EPINEN EQU 1 +UEP9_EPOUTEN EQU 2 +UEP9_EPSTALL EQU 0 +UERRIE EQU 1 +UERRIF EQU 1 +UFRM EQU 3942 +UFRMH EQU 3943 +UFRML EQU 3942 +UIE EQU 3945 +UIR EQU 3944 +UOEMON EQU 6 +UPUEN EQU 4 +URSTIE EQU 0 +URSTIF EQU 0 +USBEN EQU 3 +USBIE EQU 5 +USBIF EQU 5 +USBIP EQU 5 +USTAT EQU 3948 +UTEYE EQU 7 +UTRDIS EQU 3 +VCFG0 EQU 4 +VCFG1 EQU 5 +VDIRMAG EQU 7 +VREFM EQU 2 +VREFP EQU 3 +W EQU 0 +WBYTE EQU 51 +WCOL EQU 7 +WDTCON EQU 4049 +WHOLEYBYTES EQU 52 +WIDTHCOUNT EQU 53 +WR EQU 1 +WREG EQU 4072 +WREN EQU 2 +WRERR EQU 3 +WRSPP EQU 6 +WS0 EQU 0 +WS1 EQU 1 +WS2 EQU 2 +WS3 EQU 3 +WUE EQU 1 +Z EQU 2 + +Code: +Loc Obj Code Original Assembly + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +000000 EF06 F000 GOTO BASPROGRAMSTART + +000008 0010 RETFIE + + + + BASPROGRAMSTART +00000C ECF5 F005 CALL INITSYS +000010 ECCC F005 CALL INITGLCD_KS0108 +000014 8093 BSF TRISB,0,ACCESS + +000016 6B2A CLRF OPTMISEGLCDDRAW,BANKED +000018 0E02 MOVLW 2 +00001A 6F23 MOVWF LASTIMG,BANKED + SYSDOLOOP_S1 +00001C B081 BTFSC PORTB,0,ACCESS +00001E D012 BRA ENDIF1 +000020 5323 MOVF LASTIMG,F,BANKED +000022 B4D8 BTFSC STATUS, Z,ACCESS +000024 D00E BRA ENDIF3 +000026 DA63 RCALL GLCDCLS_KS0108 + +000028 0E22 MOVLW 34 +00002A 6F1C MOVWF GLCDXPOS,BANKED +00002C 6B1E CLRF GLCDYPOS,BANKED +00002E 0E96 MOVLW LOW(GLCDTABLE1) +000030 6F2B MOVWF SELECTEDTABLE,BANKED +000032 0E05 MOVLW HIGH(GLCDTABLE1) +000034 6F2C MOVWF SELECTEDTABLE_H,BANKED +000036 D82D RCALL GLCDBMPLOAD + +000038 0EEE MOVLW 238 +00003A 6E02 MOVWF SYSWAITTEMPMS,ACCESS +00003C 0E02 MOVLW 2 +00003E 6E03 MOVWF SYSWAITTEMPMS_H,ACCESS +000040 D81A RCALL DELAY_MS + ENDIF3 +000042 6B23 CLRF LASTIMG,BANKED + ENDIF1 +000044 A081 BTFSS PORTB,0,ACCESS +000046 D013 BRA ENDIF2 +000048 0523 DECF LASTIMG,W,BANKED +00004A B4D8 BTFSC STATUS, Z,ACCESS +00004C D00E BRA ENDIF4 +00004E DA4F RCALL GLCDCLS_KS0108 + +000050 0E14 MOVLW 20 +000052 6F1C MOVWF GLCDXPOS,BANKED +000054 6B1E CLRF GLCDYPOS,BANKED +000056 0ED2 MOVLW LOW(GLCDTABLE2) +000058 6F2B MOVWF SELECTEDTABLE,BANKED +00005A 0E07 MOVLW HIGH(GLCDTABLE2) +00005C 6F2C MOVWF SELECTEDTABLE_H,BANKED +00005E D819 RCALL GLCDBMPLOAD + +000060 0EEE MOVLW 238 +000062 6E02 MOVWF SYSWAITTEMPMS,ACCESS +000064 0E02 MOVLW 2 +000066 6E03 MOVWF SYSWAITTEMPMS_H,ACCESS +000068 D806 RCALL DELAY_MS + ENDIF4 +00006A 0E01 MOVLW 1 +00006C 6F23 MOVWF LASTIMG,BANKED + ENDIF2 +00006E D7D6 BRA SYSDOLOOP_S1 + SYSDOLOOP_E1 +000070 D000 BRA BASPROGRAMEND + BASPROGRAMEND +000072 0003 SLEEP +000074 D7FE BRA BASPROGRAMEND + + + DELAY_MS +000076 2A03 INCF SYSWAITTEMPMS_H, F,ACCESS + DMS_START +000078 0EE3 MOVLW 227 +00007A 6E01 MOVWF DELAYTEMP2,ACCESS + DMS_OUTER +00007C 0E06 MOVLW 6 +00007E 6E00 MOVWF DELAYTEMP,ACCESS + DMS_INNER +000080 2E00 DECFSZ DELAYTEMP, F,ACCESS +000082 D7FE BRA DMS_INNER +000084 2E01 DECFSZ DELAYTEMP2, F,ACCESS +000086 D7FA BRA DMS_OUTER +000088 2E02 DECFSZ SYSWAITTEMPMS, F,ACCESS +00008A D7F6 BRA DMS_START +00008C 2E03 DECFSZ SYSWAITTEMPMS_H, F,ACCESS +00008E D7F4 BRA DMS_START +000090 0012 RETURN + + + GLCDBMPLOAD +000092 0E01 MOVLW 1 +000094 6F31 MOVWF TABLEREADPOSITION,BANKED +000096 6B32 CLRF TABLEREADPOSITION_H,BANKED + SYSSELECT1CASE1 +000098 C02B F005 MOVFF SELECTEDTABLE,SYSWORDTEMPA +00009C C02C F006 MOVFF SELECTEDTABLE_H,SYSWORDTEMPA_H +0000A0 0E96 MOVLW LOW(GLCDTABLE1) +0000A2 6E09 MOVWF SYSWORDTEMPB,ACCESS +0000A4 0E05 MOVLW HIGH(GLCDTABLE1) +0000A6 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +0000A8 EC57 F006 CALL SYSCOMPEQUAL16 +0000AC A000 BTFSS SYSBYTETEMPX,0,ACCESS +0000AE D010 BRA SYSSELECT1CASE2 +0000B0 C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +0000B4 C032 F008 MOVFF TABLEREADPOSITION_H,SYSSTRINGA_H +0000B8 DA6E RCALL GLCDTABLE1 +0000BA 6F27 MOVWF OBJWIDTH,BANKED +0000BC 2B31 INCF TABLEREADPOSITION,F,BANKED +0000BE B4D8 BTFSC STATUS,Z,ACCESS +0000C0 2B32 INCF TABLEREADPOSITION_H,F,BANKED +0000C2 C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +0000C6 C032 F008 MOVFF TABLEREADPOSITION_H,SYSSTRINGA_H +0000CA DA65 RCALL GLCDTABLE1 +0000CC 6F26 MOVWF OBJHEIGHT,BANKED +0000CE D069 BRA SYSSELECTEND1 + SYSSELECT1CASE2 +0000D0 C02B F005 MOVFF SELECTEDTABLE,SYSWORDTEMPA +0000D4 C02C F006 MOVFF SELECTEDTABLE_H,SYSWORDTEMPA_H +0000D8 0ED2 MOVLW LOW(GLCDTABLE2) +0000DA 6E09 MOVWF SYSWORDTEMPB,ACCESS +0000DC 0E07 MOVLW HIGH(GLCDTABLE2) +0000DE 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +0000E0 EC57 F006 CALL SYSCOMPEQUAL16 +0000E4 A000 BTFSS SYSBYTETEMPX,0,ACCESS +0000E6 D010 BRA SYSSELECT1CASE3 +0000E8 C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +0000EC C032 F008 MOVFF TABLEREADPOSITION_H,SYSSTRINGA_H +0000F0 DB70 RCALL GLCDTABLE2 +0000F2 6F27 MOVWF OBJWIDTH,BANKED +0000F4 2B31 INCF TABLEREADPOSITION,F,BANKED +0000F6 B4D8 BTFSC STATUS,Z,ACCESS +0000F8 2B32 INCF TABLEREADPOSITION_H,F,BANKED +0000FA C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +0000FE C032 F008 MOVFF TABLEREADPOSITION_H,SYSSTRINGA_H +000102 DB67 RCALL GLCDTABLE2 +000104 6F26 MOVWF OBJHEIGHT,BANKED +000106 D04D BRA SYSSELECTEND1 + SYSSELECT1CASE3 +000108 C02B F005 MOVFF SELECTEDTABLE,SYSWORDTEMPA +00010C C02C F006 MOVFF SELECTEDTABLE_H,SYSWORDTEMPA_H +000110 0EB4 MOVLW LOW(GLCDTABLE3) +000112 6E09 MOVWF SYSWORDTEMPB,ACCESS +000114 0E0A MOVLW HIGH(GLCDTABLE3) +000116 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +000118 EC57 F006 CALL SYSCOMPEQUAL16 +00011C A000 BTFSS SYSBYTETEMPX,0,ACCESS +00011E D00E BRA SYSSELECT1CASE4 +000120 C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +000124 EC5A F005 CALL GLCDTABLE3 +000128 6F27 MOVWF OBJWIDTH,BANKED +00012A 2B31 INCF TABLEREADPOSITION,F,BANKED +00012C B4D8 BTFSC STATUS,Z,ACCESS +00012E 2B32 INCF TABLEREADPOSITION_H,F,BANKED +000130 C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +000134 EC5A F005 CALL GLCDTABLE3 +000138 6F26 MOVWF OBJHEIGHT,BANKED +00013A D033 BRA SYSSELECTEND1 + SYSSELECT1CASE4 +00013C C02B F005 MOVFF SELECTEDTABLE,SYSWORDTEMPA +000140 C02C F006 MOVFF SELECTEDTABLE_H,SYSWORDTEMPA_H +000144 0ED2 MOVLW LOW(GLCDTABLE4) +000146 6E09 MOVWF SYSWORDTEMPB,ACCESS +000148 0E0A MOVLW HIGH(GLCDTABLE4) +00014A 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +00014C EC57 F006 CALL SYSCOMPEQUAL16 +000150 A000 BTFSS SYSBYTETEMPX,0,ACCESS +000152 D00E BRA SYSSELECT1CASE5 +000154 C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +000158 EC69 F005 CALL GLCDTABLE4 +00015C 6F27 MOVWF OBJWIDTH,BANKED +00015E 2B31 INCF TABLEREADPOSITION,F,BANKED +000160 B4D8 BTFSC STATUS,Z,ACCESS +000162 2B32 INCF TABLEREADPOSITION_H,F,BANKED +000164 C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +000168 EC69 F005 CALL GLCDTABLE4 +00016C 6F26 MOVWF OBJHEIGHT,BANKED +00016E D019 BRA SYSSELECTEND1 + SYSSELECT1CASE5 +000170 C02B F005 MOVFF SELECTEDTABLE,SYSWORDTEMPA +000174 C02C F006 MOVFF SELECTEDTABLE_H,SYSWORDTEMPA_H +000178 0EF0 MOVLW LOW(GLCDTABLE5) +00017A 6E09 MOVWF SYSWORDTEMPB,ACCESS +00017C 0E0A MOVLW HIGH(GLCDTABLE5) +00017E 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +000180 EC57 F006 CALL SYSCOMPEQUAL16 +000184 A000 BTFSS SYSBYTETEMPX,0,ACCESS +000186 D00D BRA SYSSELECT1CASE6 +000188 C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +00018C EC78 F005 CALL GLCDTABLE5 +000190 6F27 MOVWF OBJWIDTH,BANKED +000192 2B31 INCF TABLEREADPOSITION,F,BANKED +000194 B4D8 BTFSC STATUS,Z,ACCESS +000196 2B32 INCF TABLEREADPOSITION_H,F,BANKED +000198 C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +00019C EC78 F005 CALL GLCDTABLE5 +0001A0 6F26 MOVWF OBJHEIGHT,BANKED + SYSSELECT1CASE6 + SYSSELECTEND1 +0001A2 C01C F028 MOVFF GLCDXPOS,OLDGLCDXPOS +0001A6 0E03 MOVLW 3 +0001A8 6F31 MOVWF TABLEREADPOSITION,BANKED +0001AA 6B32 CLRF TABLEREADPOSITION_H,BANKED +0001AC C026 F005 MOVFF OBJHEIGHT,SYSBYTETEMPA +0001B0 0E08 MOVLW 8 +0001B2 6E09 MOVWF SYSBYTETEMPB,ACCESS +0001B4 EC73 F006 CALL SYSDIVSUB +0001B8 C005 F034 MOVFF SYSBYTETEMPA,WHOLEYBYTES +0001BC C01E F005 MOVFF GLCDYPOS,SYSBYTETEMPA +0001C0 0E08 MOVLW 8 +0001C2 6E09 MOVWF SYSBYTETEMPB,ACCESS +0001C4 EC73 F006 CALL SYSDIVSUB +0001C8 C000 F02F MOVFF SYSBYTETEMPX,SYSTEMP1 +0001CC C02F F005 MOVFF SYSTEMP1,SYSBYTETEMPA +0001D0 6A09 CLRF SYSBYTETEMPB,ACCESS +0001D2 EC52 F006 CALL SYSCOMPEQUAL +0001D6 C000 F029 MOVFF SYSBYTETEMPX,ONPAGEBOUNDARY +0001DA 5334 MOVF WHOLEYBYTES,F,BANKED +0001DC B4D8 BTFSC STATUS, Z,ACCESS +0001DE D0DC BRA ENDIF5 +0001E0 6922 SETF HCOUNT,BANKED +0001E2 0534 DECF WHOLEYBYTES,W,BANKED +0001E4 6F2F MOVWF SYSTEMP1,BANKED +0001E6 6A09 CLRF SYSBYTETEMPB,ACCESS +0001E8 C02F F005 MOVFF SYSTEMP1,SYSBYTETEMPA +0001EC EC60 F006 CALL SYSCOMPLESSTHAN +0001F0 B000 BTFSC SYSBYTETEMPX,0,ACCESS +0001F2 D0D2 BRA SYSFORLOOPEND1 + SYSFORLOOP1 +0001F4 2B22 INCF HCOUNT,F,BANKED +0001F6 5122 MOVF HCOUNT,W,BANKED +0001F8 251E ADDWF GLCDYPOS,W,BANKED +0001FA 6F1D MOVWF GLCDY,BANKED +0001FC 6935 SETF WIDTHCOUNT,BANKED +0001FE 0527 DECF OBJWIDTH,W,BANKED +000200 6F2F MOVWF SYSTEMP1,BANKED +000202 6A09 CLRF SYSBYTETEMPB,ACCESS +000204 C02F F005 MOVFF SYSTEMP1,SYSBYTETEMPA +000208 EC60 F006 CALL SYSCOMPLESSTHAN +00020C B000 BTFSC SYSBYTETEMPX,0,ACCESS +00020E D0B6 BRA SYSFORLOOPEND2 + SYSFORLOOP2 +000210 2B35 INCF WIDTHCOUNT,F,BANKED + SYSSELECT2CASE1 +000212 C02B F005 MOVFF SELECTEDTABLE,SYSWORDTEMPA +000216 C02C F006 MOVFF SELECTEDTABLE_H,SYSWORDTEMPA_H +00021A 0E96 MOVLW LOW(GLCDTABLE1) +00021C 6E09 MOVWF SYSWORDTEMPB,ACCESS +00021E 0E05 MOVLW HIGH(GLCDTABLE1) +000220 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +000222 EC57 F006 CALL SYSCOMPEQUAL16 +000226 A000 BTFSS SYSBYTETEMPX,0,ACCESS +000228 D007 BRA SYSSELECT2CASE2 +00022A C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +00022E C032 F008 MOVFF TABLEREADPOSITION_H,SYSSTRINGA_H +000232 D9B1 RCALL GLCDTABLE1 +000234 6F33 MOVWF WBYTE,BANKED +000236 D048 BRA SYSSELECTEND2 + SYSSELECT2CASE2 +000238 C02B F005 MOVFF SELECTEDTABLE,SYSWORDTEMPA +00023C C02C F006 MOVFF SELECTEDTABLE_H,SYSWORDTEMPA_H +000240 0ED2 MOVLW LOW(GLCDTABLE2) +000242 6E09 MOVWF SYSWORDTEMPB,ACCESS +000244 0E07 MOVLW HIGH(GLCDTABLE2) +000246 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +000248 EC57 F006 CALL SYSCOMPEQUAL16 +00024C A000 BTFSS SYSBYTETEMPX,0,ACCESS +00024E D007 BRA SYSSELECT2CASE3 +000250 C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +000254 C032 F008 MOVFF TABLEREADPOSITION_H,SYSSTRINGA_H +000258 DABC RCALL GLCDTABLE2 +00025A 6F33 MOVWF WBYTE,BANKED +00025C D035 BRA SYSSELECTEND2 + SYSSELECT2CASE3 +00025E C02B F005 MOVFF SELECTEDTABLE,SYSWORDTEMPA +000262 C02C F006 MOVFF SELECTEDTABLE_H,SYSWORDTEMPA_H +000266 0EB4 MOVLW LOW(GLCDTABLE3) +000268 6E09 MOVWF SYSWORDTEMPB,ACCESS +00026A 0E0A MOVLW HIGH(GLCDTABLE3) +00026C 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +00026E EC57 F006 CALL SYSCOMPEQUAL16 +000272 A000 BTFSS SYSBYTETEMPX,0,ACCESS +000274 D006 BRA SYSSELECT2CASE4 +000276 C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +00027A EC5A F005 CALL GLCDTABLE3 +00027E 6F33 MOVWF WBYTE,BANKED +000280 D023 BRA SYSSELECTEND2 + SYSSELECT2CASE4 +000282 C02B F005 MOVFF SELECTEDTABLE,SYSWORDTEMPA +000286 C02C F006 MOVFF SELECTEDTABLE_H,SYSWORDTEMPA_H +00028A 0ED2 MOVLW LOW(GLCDTABLE4) +00028C 6E09 MOVWF SYSWORDTEMPB,ACCESS +00028E 0E0A MOVLW HIGH(GLCDTABLE4) +000290 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +000292 EC57 F006 CALL SYSCOMPEQUAL16 +000296 A000 BTFSS SYSBYTETEMPX,0,ACCESS +000298 D006 BRA SYSSELECT2CASE5 +00029A C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +00029E EC69 F005 CALL GLCDTABLE4 +0002A2 6F33 MOVWF WBYTE,BANKED +0002A4 D011 BRA SYSSELECTEND2 + SYSSELECT2CASE5 +0002A6 C02B F005 MOVFF SELECTEDTABLE,SYSWORDTEMPA +0002AA C02C F006 MOVFF SELECTEDTABLE_H,SYSWORDTEMPA_H +0002AE 0EF0 MOVLW LOW(GLCDTABLE5) +0002B0 6E09 MOVWF SYSWORDTEMPB,ACCESS +0002B2 0E0A MOVLW HIGH(GLCDTABLE5) +0002B4 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +0002B6 EC57 F006 CALL SYSCOMPEQUAL16 +0002BA A000 BTFSS SYSBYTETEMPX,0,ACCESS +0002BC D005 BRA SYSSELECT2CASE6 +0002BE C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +0002C2 EC78 F005 CALL GLCDTABLE5 +0002C6 6F33 MOVWF WBYTE,BANKED + SYSSELECT2CASE6 + SYSSELECTEND2 +0002C8 2B31 INCF TABLEREADPOSITION,F,BANKED +0002CA B4D8 BTFSC STATUS,Z,ACCESS +0002CC 2B32 INCF TABLEREADPOSITION_H,F,BANKED +0002CE 512A MOVF OPTMISEGLCDDRAW,W,BANKED +0002D0 5D33 SUBWF WBYTE,W,BANKED +0002D2 B4D8 BTFSC STATUS, Z,ACCESS +0002D4 D049 BRA ENDIF9 +0002D6 2929 INCF ONPAGEBOUNDARY,W,BANKED +0002D8 A4D8 BTFSS STATUS, Z,ACCESS +0002DA D024 BRA ELSE17_1 +0002DC 5135 MOVF WIDTHCOUNT,W,BANKED +0002DE 251C ADDWF GLCDXPOS,W,BANKED +0002E0 6F1B MOVWF GLCDX,BANKED +0002E2 BD1B BTFSC GLCDX,6,BANKED +0002E4 D002 BRA ENDIF18 +0002E6 828B BSF LATC,1,ACCESS +0002E8 908B BCF LATC,0,ACCESS + ENDIF18 +0002EA AD1B BTFSS GLCDX,6,BANKED +0002EC D004 BRA ENDIF19 +0002EE 808B BSF LATC,0,ACCESS +0002F0 0E40 MOVLW 64 +0002F2 5F1B SUBWF GLCDX,F,BANKED +0002F4 928B BCF LATC,1,ACCESS + ENDIF19 +0002F6 C01D F005 MOVFF GLCDY,SYSBYTETEMPA +0002FA 0E08 MOVLW 8 +0002FC 6E09 MOVWF SYSBYTETEMPB,ACCESS +0002FE EC73 F006 CALL SYSDIVSUB +000302 C005 F00D MOVFF SYSBYTETEMPA,CURRPAGE +000306 908D BCF LATE,0,ACCESS +000308 0EB8 MOVLW 184 +00030A 110D IORWF CURRPAGE,W,BANKED +00030C 6F24 MOVWF LCDBYTE,BANKED +00030E EC87 F005 CALL GLCDWRITEBYTE_KS0108 + +000312 0E40 MOVLW 64 +000314 111B IORWF GLCDX,W,BANKED +000316 6F24 MOVWF LCDBYTE,BANKED +000318 DBFA RCALL GLCDWRITEBYTE_KS0108 + +00031A 808D BSF LATE,0,ACCESS +00031C C033 F024 MOVFF WBYTE,LCDBYTE +000320 DBF6 RCALL GLCDWRITEBYTE_KS0108 + +000322 D022 BRA ENDIF17 + ELSE17_1 +000324 690B SETF CURRCHARROW,BANKED + SYSFORLOOP3 +000326 2B0B INCF CURRCHARROW,F,BANKED +000328 B133 BTFSC WBYTE,0,BANKED +00032A D00D BRA ELSE20_1 +00032C 5135 MOVF WIDTHCOUNT,W,BANKED +00032E 251C ADDWF GLCDXPOS,W,BANKED +000330 6F1B MOVWF GLCDX,BANKED +000332 511E MOVF GLCDYPOS,W,BANKED +000334 250B ADDWF CURRCHARROW,W,BANKED +000336 6F1D MOVWF GLCDY,BANKED +000338 C00E F012 MOVFF GLCDBACKGROUND,GLCDCOLOUR +00033C C00F F013 MOVFF GLCDBACKGROUND_H,GLCDCOLOUR_H +000340 EC06 F006 CALL PSET_KS0108 + +000344 D00C BRA ENDIF20 + ELSE20_1 +000346 5135 MOVF WIDTHCOUNT,W,BANKED +000348 251C ADDWF GLCDXPOS,W,BANKED +00034A 6F1B MOVWF GLCDX,BANKED +00034C 511E MOVF GLCDYPOS,W,BANKED +00034E 250B ADDWF CURRCHARROW,W,BANKED +000350 6F1D MOVWF GLCDY,BANKED +000352 C018 F012 MOVFF GLCDFOREGROUND,GLCDCOLOUR +000356 C019 F013 MOVFF GLCDFOREGROUND_H,GLCDCOLOUR_H +00035A EC06 F006 CALL PSET_KS0108 + + ENDIF20 +00035E 3333 RRCF WBYTE,F,BANKED +000360 0E07 MOVLW 7 +000362 5D0B SUBWF CURRCHARROW,W,BANKED +000364 A0D8 BTFSS STATUS, C,ACCESS +000366 D7DF BRA SYSFORLOOP3 + SYSFORLOOPEND3 + ENDIF17 + ENDIF9 +000368 0527 DECF OBJWIDTH,W,BANKED +00036A 6F2F MOVWF SYSTEMP1,BANKED +00036C C035 F005 MOVFF WIDTHCOUNT,SYSBYTETEMPA +000370 C02F F009 MOVFF SYSTEMP1,SYSBYTETEMPB +000374 EC60 F006 CALL SYSCOMPLESSTHAN +000378 B000 BTFSC SYSBYTETEMPX,0,ACCESS +00037A D74A BRA SYSFORLOOP2 + SYSFORLOOPEND2 +00037C C028 F01C MOVFF OLDGLCDXPOS,GLCDXPOS +000380 0E08 MOVLW 8 +000382 271E ADDWF GLCDYPOS,F,BANKED +000384 0534 DECF WHOLEYBYTES,W,BANKED +000386 6F2F MOVWF SYSTEMP1,BANKED +000388 C022 F005 MOVFF HCOUNT,SYSBYTETEMPA +00038C C02F F009 MOVFF SYSTEMP1,SYSBYTETEMPB +000390 EC60 F006 CALL SYSCOMPLESSTHAN +000394 B000 BTFSC SYSBYTETEMPX,0,ACCESS +000396 D72E BRA SYSFORLOOP1 + SYSFORLOOPEND1 + ENDIF5 +000398 C026 F005 MOVFF OBJHEIGHT,SYSBYTETEMPA +00039C 0E08 MOVLW 8 +00039E 6E09 MOVWF SYSBYTETEMPB,ACCESS +0003A0 EC73 F006 CALL SYSDIVSUB +0003A4 C000 F025 MOVFF SYSBYTETEMPX,MAXHEIGHT +0003A8 5325 MOVF MAXHEIGHT,F,BANKED +0003AA B4D8 BTFSC STATUS, Z,ACCESS +0003AC D09D BRA ENDIF6 +0003AE 6935 SETF WIDTHCOUNT,BANKED +0003B0 0527 DECF OBJWIDTH,W,BANKED +0003B2 6F2F MOVWF SYSTEMP1,BANKED +0003B4 6A09 CLRF SYSBYTETEMPB,ACCESS +0003B6 C02F F005 MOVFF SYSTEMP1,SYSBYTETEMPA +0003BA EC60 F006 CALL SYSCOMPLESSTHAN +0003BE B000 BTFSC SYSBYTETEMPX,0,ACCESS +0003C0 D093 BRA SYSFORLOOPEND4 + SYSFORLOOP4 +0003C2 2B35 INCF WIDTHCOUNT,F,BANKED + SYSSELECT3CASE1 +0003C4 C02B F005 MOVFF SELECTEDTABLE,SYSWORDTEMPA +0003C8 C02C F006 MOVFF SELECTEDTABLE_H,SYSWORDTEMPA_H +0003CC 0E96 MOVLW LOW(GLCDTABLE1) +0003CE 6E09 MOVWF SYSWORDTEMPB,ACCESS +0003D0 0E05 MOVLW HIGH(GLCDTABLE1) +0003D2 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +0003D4 EC57 F006 CALL SYSCOMPEQUAL16 +0003D8 A000 BTFSS SYSBYTETEMPX,0,ACCESS +0003DA D007 BRA SYSSELECT3CASE2 +0003DC C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +0003E0 C032 F008 MOVFF TABLEREADPOSITION_H,SYSSTRINGA_H +0003E4 D8D8 RCALL GLCDTABLE1 +0003E6 6F33 MOVWF WBYTE,BANKED +0003E8 D045 BRA SYSSELECTEND3 + SYSSELECT3CASE2 +0003EA C02B F005 MOVFF SELECTEDTABLE,SYSWORDTEMPA +0003EE C02C F006 MOVFF SELECTEDTABLE_H,SYSWORDTEMPA_H +0003F2 0ED2 MOVLW LOW(GLCDTABLE2) +0003F4 6E09 MOVWF SYSWORDTEMPB,ACCESS +0003F6 0E07 MOVLW HIGH(GLCDTABLE2) +0003F8 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +0003FA EC57 F006 CALL SYSCOMPEQUAL16 +0003FE A000 BTFSS SYSBYTETEMPX,0,ACCESS +000400 D007 BRA SYSSELECT3CASE3 +000402 C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +000406 C032 F008 MOVFF TABLEREADPOSITION_H,SYSSTRINGA_H +00040A D9E3 RCALL GLCDTABLE2 +00040C 6F33 MOVWF WBYTE,BANKED +00040E D032 BRA SYSSELECTEND3 + SYSSELECT3CASE3 +000410 C02B F005 MOVFF SELECTEDTABLE,SYSWORDTEMPA +000414 C02C F006 MOVFF SELECTEDTABLE_H,SYSWORDTEMPA_H +000418 0EB4 MOVLW LOW(GLCDTABLE3) +00041A 6E09 MOVWF SYSWORDTEMPB,ACCESS +00041C 0E0A MOVLW HIGH(GLCDTABLE3) +00041E 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +000420 EC57 F006 CALL SYSCOMPEQUAL16 +000424 A000 BTFSS SYSBYTETEMPX,0,ACCESS +000426 D005 BRA SYSSELECT3CASE4 +000428 C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +00042C DB43 RCALL GLCDTABLE3 +00042E 6F33 MOVWF WBYTE,BANKED +000430 D021 BRA SYSSELECTEND3 + SYSSELECT3CASE4 +000432 C02B F005 MOVFF SELECTEDTABLE,SYSWORDTEMPA +000436 C02C F006 MOVFF SELECTEDTABLE_H,SYSWORDTEMPA_H +00043A 0ED2 MOVLW LOW(GLCDTABLE4) +00043C 6E09 MOVWF SYSWORDTEMPB,ACCESS +00043E 0E0A MOVLW HIGH(GLCDTABLE4) +000440 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +000442 EC57 F006 CALL SYSCOMPEQUAL16 +000446 A000 BTFSS SYSBYTETEMPX,0,ACCESS +000448 D005 BRA SYSSELECT3CASE5 +00044A C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +00044E DB41 RCALL GLCDTABLE4 +000450 6F33 MOVWF WBYTE,BANKED +000452 D010 BRA SYSSELECTEND3 + SYSSELECT3CASE5 +000454 C02B F005 MOVFF SELECTEDTABLE,SYSWORDTEMPA +000458 C02C F006 MOVFF SELECTEDTABLE_H,SYSWORDTEMPA_H +00045C 0EF0 MOVLW LOW(GLCDTABLE5) +00045E 6E09 MOVWF SYSWORDTEMPB,ACCESS +000460 0E0A MOVLW HIGH(GLCDTABLE5) +000462 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +000464 EC57 F006 CALL SYSCOMPEQUAL16 +000468 A000 BTFSS SYSBYTETEMPX,0,ACCESS +00046A D004 BRA SYSSELECT3CASE6 +00046C C031 F007 MOVFF TABLEREADPOSITION,SYSSTRINGA +000470 DB3F RCALL GLCDTABLE5 +000472 6F33 MOVWF WBYTE,BANKED + SYSSELECT3CASE6 + SYSSELECTEND3 +000474 2B31 INCF TABLEREADPOSITION,F,BANKED +000476 B4D8 BTFSC STATUS,Z,ACCESS +000478 2B32 INCF TABLEREADPOSITION_H,F,BANKED +00047A 690B SETF CURRCHARROW,BANKED +00047C 0525 DECF MAXHEIGHT,W,BANKED +00047E 6F2F MOVWF SYSTEMP1,BANKED +000480 6A09 CLRF SYSBYTETEMPB,ACCESS +000482 C02F F005 MOVFF SYSTEMP1,SYSBYTETEMPA +000486 EC60 F006 CALL SYSCOMPLESSTHAN +00048A B000 BTFSC SYSBYTETEMPX,0,ACCESS +00048C D024 BRA SYSFORLOOPEND5 + SYSFORLOOP5 +00048E 2B0B INCF CURRCHARROW,F,BANKED +000490 B133 BTFSC WBYTE,0,BANKED +000492 D00C BRA ELSE14_1 +000494 5135 MOVF WIDTHCOUNT,W,BANKED +000496 251C ADDWF GLCDXPOS,W,BANKED +000498 6F1B MOVWF GLCDX,BANKED +00049A 511E MOVF GLCDYPOS,W,BANKED +00049C 250B ADDWF CURRCHARROW,W,BANKED +00049E 6F1D MOVWF GLCDY,BANKED +0004A0 C00E F012 MOVFF GLCDBACKGROUND,GLCDCOLOUR +0004A4 C00F F013 MOVFF GLCDBACKGROUND_H,GLCDCOLOUR_H +0004A8 DBB1 RCALL PSET_KS0108 + +0004AA D00B BRA ENDIF14 + ELSE14_1 +0004AC 5135 MOVF WIDTHCOUNT,W,BANKED +0004AE 251C ADDWF GLCDXPOS,W,BANKED +0004B0 6F1B MOVWF GLCDX,BANKED +0004B2 511E MOVF GLCDYPOS,W,BANKED +0004B4 250B ADDWF CURRCHARROW,W,BANKED +0004B6 6F1D MOVWF GLCDY,BANKED +0004B8 C018 F012 MOVFF GLCDFOREGROUND,GLCDCOLOUR +0004BC C019 F013 MOVFF GLCDFOREGROUND_H,GLCDCOLOUR_H +0004C0 DBA5 RCALL PSET_KS0108 + + ENDIF14 +0004C2 3333 RRCF WBYTE,F,BANKED +0004C4 0525 DECF MAXHEIGHT,W,BANKED +0004C6 6F2F MOVWF SYSTEMP1,BANKED +0004C8 C00B F005 MOVFF CURRCHARROW,SYSBYTETEMPA +0004CC C02F F009 MOVFF SYSTEMP1,SYSBYTETEMPB +0004D0 DBF7 RCALL SYSCOMPLESSTHAN +0004D2 B000 BTFSC SYSBYTETEMPX,0,ACCESS +0004D4 D7DC BRA SYSFORLOOP5 + SYSFORLOOPEND5 +0004D6 0527 DECF OBJWIDTH,W,BANKED +0004D8 6F2F MOVWF SYSTEMP1,BANKED +0004DA C035 F005 MOVFF WIDTHCOUNT,SYSBYTETEMPA +0004DE C02F F009 MOVFF SYSTEMP1,SYSBYTETEMPB +0004E2 DBEE RCALL SYSCOMPLESSTHAN +0004E4 B000 BTFSC SYSBYTETEMPX,0,ACCESS +0004E6 D76D BRA SYSFORLOOP4 + SYSFORLOOPEND4 + ENDIF6 +0004E8 908B BCF LATC,0,ACCESS +0004EA 928B BCF LATC,1,ACCESS +0004EC 0012 RETURN + + + GLCDCLS_KS0108 +0004EE 6B20 CLRF GLCD_YORDINATE,BANKED +0004F0 6B21 CLRF GLCD_YORDINATE_H,BANKED +0004F2 808B BSF LATC,0,ACCESS +0004F4 928B BCF LATC,1,ACCESS +0004F6 6B1F CLRF GLCD_COUNT,BANKED + SYSFORLOOP6 +0004F8 2B1F INCF GLCD_COUNT,F,BANKED +0004FA 690D SETF CURRPAGE,BANKED + SYSFORLOOP7 +0004FC 2B0D INCF CURRPAGE,F,BANKED +0004FE 908D BCF LATE,0,ACCESS +000500 0EB8 MOVLW 184 +000502 110D IORWF CURRPAGE,W,BANKED +000504 6F24 MOVWF LCDBYTE,BANKED +000506 DB03 RCALL GLCDWRITEBYTE_KS0108 + +000508 690C SETF CURRCOL,BANKED + SYSFORLOOP8 +00050A 2B0C INCF CURRCOL,F,BANKED +00050C 908D BCF LATE,0,ACCESS +00050E 0E40 MOVLW 64 +000510 110C IORWF CURRCOL,W,BANKED +000512 6F24 MOVWF LCDBYTE,BANKED +000514 DAFC RCALL GLCDWRITEBYTE_KS0108 + +000516 808D BSF LATE,0,ACCESS +000518 6B24 CLRF LCDBYTE,BANKED +00051A DAF9 RCALL GLCDWRITEBYTE_KS0108 + +00051C 0E3F MOVLW 63 +00051E 5D0C SUBWF CURRCOL,W,BANKED +000520 A0D8 BTFSS STATUS, C,ACCESS +000522 D7F3 BRA SYSFORLOOP8 + SYSFORLOOPEND8 +000524 0E07 MOVLW 7 +000526 5D0D SUBWF CURRPAGE,W,BANKED +000528 A0D8 BTFSS STATUS, C,ACCESS +00052A D7E8 BRA SYSFORLOOP7 + SYSFORLOOPEND7 +00052C 908B BCF LATC,0,ACCESS +00052E 828B BSF LATC,1,ACCESS +000530 0E02 MOVLW 2 +000532 5D1F SUBWF GLCD_COUNT,W,BANKED +000534 A0D8 BTFSS STATUS, C,ACCESS +000536 D7E0 BRA SYSFORLOOP6 + SYSFORLOOPEND6 +000538 908B BCF LATC,0,ACCESS +00053A 928B BCF LATC,1,ACCESS +00053C 0012 RETURN + + + FN_GLCDREADBYTE_KS0108 +00053E 8E95 BSF TRISD,7,ACCESS +000540 8C95 BSF TRISD,6,ACCESS +000542 8A95 BSF TRISD,5,ACCESS +000544 8895 BSF TRISD,4,ACCESS +000546 8695 BSF TRISD,3,ACCESS +000548 8495 BSF TRISD,2,ACCESS +00054A 8295 BSF TRISD,1,ACCESS +00054C 8095 BSF TRISD,0,ACCESS +00054E 828D BSF LATE,1,ACCESS +000550 848D BSF LATE,2,ACCESS +000552 0E0F MOVLW 15 +000554 6E00 MOVWF DELAYTEMP,ACCESS + DELAYUS4 +000556 2E00 DECFSZ DELAYTEMP,F,ACCESS +000558 D7FE BRA DELAYUS4 +00055A 9F1A BCF GLCDREADBYTE_KS0108,7,BANKED +00055C BE83 BTFSC PORTD,7,ACCESS +00055E 8F1A BSF GLCDREADBYTE_KS0108,7,BANKED +000560 9D1A BCF GLCDREADBYTE_KS0108,6,BANKED +000562 BC83 BTFSC PORTD,6,ACCESS +000564 8D1A BSF GLCDREADBYTE_KS0108,6,BANKED +000566 9B1A BCF GLCDREADBYTE_KS0108,5,BANKED +000568 BA83 BTFSC PORTD,5,ACCESS +00056A 8B1A BSF GLCDREADBYTE_KS0108,5,BANKED +00056C 991A BCF GLCDREADBYTE_KS0108,4,BANKED +00056E B883 BTFSC PORTD,4,ACCESS +000570 891A BSF GLCDREADBYTE_KS0108,4,BANKED +000572 971A BCF GLCDREADBYTE_KS0108,3,BANKED +000574 B683 BTFSC PORTD,3,ACCESS +000576 871A BSF GLCDREADBYTE_KS0108,3,BANKED +000578 951A BCF GLCDREADBYTE_KS0108,2,BANKED +00057A B483 BTFSC PORTD,2,ACCESS +00057C 851A BSF GLCDREADBYTE_KS0108,2,BANKED +00057E 931A BCF GLCDREADBYTE_KS0108,1,BANKED +000580 B283 BTFSC PORTD,1,ACCESS +000582 831A BSF GLCDREADBYTE_KS0108,1,BANKED +000584 911A BCF GLCDREADBYTE_KS0108,0,BANKED +000586 B083 BTFSC PORTD,0,ACCESS +000588 811A BSF GLCDREADBYTE_KS0108,0,BANKED +00058A 948D BCF LATE,2,ACCESS +00058C 0E0F MOVLW 15 +00058E 6E00 MOVWF DELAYTEMP,ACCESS + DELAYUS5 +000590 2E00 DECFSZ DELAYTEMP,F,ACCESS +000592 D7FE BRA DELAYUS5 +000594 0012 RETURN + + + GLCDTABLE1 +000596 C007 F005 MOVFF SYSSTRINGA,SYSWORDTEMPA +00059A C008 F006 MOVFF SYSSTRINGA_H,SYSWORDTEMPA_H +00059E 0EE3 MOVLW 227 +0005A0 6E09 MOVWF SYSWORDTEMPB,ACCESS +0005A2 0E01 MOVLW 1 +0005A4 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +0005A6 DB91 RCALL SYSCOMPLESSTHAN16 +0005A8 A000 BTFSS SYSBYTETEMPX,0,ACCESS +0005AA 0C00 RETLW 0 +0005AC 5007 MOVF SYSSTRINGA, W,ACCESS +0005AE 0FC2 ADDLW LOW TABLEGLCDTABLE1 +0005B0 6EF6 MOVWF TBLPTRL,ACCESS +0005B2 0E05 MOVLW HIGH TABLEGLCDTABLE1 +0005B4 B0D8 BTFSC STATUS, C,ACCESS +0005B6 0F01 ADDLW 1 +0005B8 2408 ADDWF SYSSTRINGA_H, W,ACCESS +0005BA 6EF7 MOVWF TBLPTRH,ACCESS +0005BC 0008 TBLRD* +0005BE 50F5 MOVF TABLAT, W,ACCESS +0005C0 0012 RETURN + TABLEGLCDTABLE1 +0005C2 3CE2 0040 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 RAW 3CE2,0040,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000 +0005E8 E080 C000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 4000 B0C0 C060 0080 RAW E080,C000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,4000,B0C0,C060,0080 +000608 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 C000 DE70 1C73 0107 0000 0000 RAW 0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,C000,DE70,1C73,0107,0000,0000 +00062C 0000 0000 0000 0000 0000 0000 0000 0000 0000 0100 0301 0D06 3E1B 18EC 1010 1810 0818 RAW 0000,0000,0000,0000,0000,0000,0000,0000,0000,0100,0301,0D06,3E1B,18EC,1010,1810,0818 +00064E 0C08 0C0C 0404 0604 0206 0202 0303 0101 0F03 701C 80E0 0000 0000 0000 0000 0000 0000 RAW 0C08,0C0C,0404,0604,0206,0202,0303,0101,0F03,701C,80E0,0000,0000,0000,0000,0000,0000 +000670 0000 0000 0000 0000 0000 0000 0000 0000 0000 00FF 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 RAW 0000,0000,0000,0000,0000,0000,0000,0000,0000,00FF,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000 +000698 0000 0000 0000 0100 0E07 7038 80C0 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 RAW 0000,0000,0000,0100,0E07,7038,80C0,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000 +0006BC 0000 00FF 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 8000 63C0 RAW 0000,00FF,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,8000,63C0 +0006E2 1C36 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0C07 1808 3010 2030 4060 RAW 1C36,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0C07,1808,3010,2030,4060 +000704 C0C0 8080 0000 0000 0000 0000 0000 0000 C080 3870 0E1C 0103 0000 0000 0000 0000 RAW C0C0,8080,0000,0000,0000,0000,0000,0000,C080,3870,0E1C,0103,0000,0000,0000,0000 +000724 0000 0000 0000 0000 0000 0000 0000 0000 20C0 00C0 0000 0000 0000 0000 0000 0100 0301 0203 0406 RAW 0000,0000,0000,0000,0000,0000,0000,0000,20C0,00C0,0000,0000,0000,0000,0000,0100,0301,0203,0406 +00074A EC0C 0C08 0306 0001 2000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 C000 RAW EC0C,0C08,0306,0001,2000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,C000 +00076E 1638 1011 1611 C038 FF00 0102 0101 00FE 7E00 8181 8181 007E FF00 RAW 1638,1011,1611,C038,FF00,0102,0101,00FE,7E00,8181,8181,007E,FF00 +000788 8142 8181 007E FF00 0000 807F 8080 FF40 0000 02FF 0101 FE01 0102 0101 RAW 8142,8181,007E,FF00,0000,807F,8080,FF40,0000,02FF,0101,FE01,0102,0101 +0007A4 00FE RAW 00FE + + + GLCDTABLE1_H +0007A6 C007 F005 MOVFF SYSSTRINGA,SYSWORDTEMPA +0007AA C008 F006 MOVFF SYSSTRINGA_H,SYSWORDTEMPA_H +0007AE 0E01 MOVLW 1 +0007B0 6E09 MOVWF SYSWORDTEMPB,ACCESS +0007B2 6A0A CLRF SYSWORDTEMPB_H,ACCESS +0007B4 DA8A RCALL SYSCOMPLESSTHAN16 +0007B6 A000 BTFSS SYSBYTETEMPX,0,ACCESS +0007B8 0C00 RETLW 0 +0007BA 5007 MOVF SYSSTRINGA, W,ACCESS +0007BC 0FD0 ADDLW LOW TABLEGLCDTABLE1_H +0007BE 6EF6 MOVWF TBLPTRL,ACCESS +0007C0 0E07 MOVLW HIGH TABLEGLCDTABLE1_H +0007C2 B0D8 BTFSC STATUS, C,ACCESS +0007C4 0F01 ADDLW 1 +0007C6 2408 ADDWF SYSSTRINGA_H, W,ACCESS +0007C8 6EF7 MOVWF TBLPTRH,ACCESS +0007CA 0008 TBLRD* +0007CC 50F5 MOVF TABLAT, W,ACCESS +0007CE 0012 RETURN + TABLEGLCDTABLE1_H +0007D0 0001 RAW 0001 + + + GLCDTABLE2 +0007D2 C007 F005 MOVFF SYSSTRINGA,SYSWORDTEMPA +0007D6 C008 F006 MOVFF SYSSTRINGA_H,SYSWORDTEMPA_H +0007DA 0E89 MOVLW 137 +0007DC 6E09 MOVWF SYSWORDTEMPB,ACCESS +0007DE 0E02 MOVLW 2 +0007E0 6E0A MOVWF SYSWORDTEMPB_H,ACCESS +0007E2 DA73 RCALL SYSCOMPLESSTHAN16 +0007E4 A000 BTFSS SYSBYTETEMPX,0,ACCESS +0007E6 0C00 RETLW 0 +0007E8 5007 MOVF SYSSTRINGA, W,ACCESS +0007EA 0FFE ADDLW LOW TABLEGLCDTABLE2 +0007EC 6EF6 MOVWF TBLPTRL,ACCESS +0007EE 0E07 MOVLW HIGH TABLEGLCDTABLE2 +0007F0 B0D8 BTFSC STATUS, C,ACCESS +0007F2 0F01 ADDLW 1 +0007F4 2408 ADDWF SYSSTRINGA_H, W,ACCESS +0007F6 6EF7 MOVWF TBLPTRH,ACCESS +0007F8 0008 TBLRD* +0007FA 50F5 MOVF TABLAT, W,ACCESS +0007FC 0012 RETURN + TABLEGLCDTABLE2 +0007FE 54A2 003F 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 RAW 54A2,003F,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000 +000824 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 6020 80C0 C080 RAW 0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,6020,80C0,C080 +000848 E0E0 F0E0 DEB8 80C0 0000 0000 0000 0000 0000 0000 8000 E0C0 F8F0 RAW E0E0,F0E0,DEB8,80C0,0000,0000,0000,0000,0000,0000,8000,E0C0,F8F0 +000862 F8F8 F8F8 F8F8 F0F0 F0F0 E0F0 E0E0 E0E0 E0E0 E0E0 RAW F8F8,F8F8,F8F8,F0F0,F0F0,E0F0,E0E0,E0E0,E0E0,E0E0 +000876 E0E0 E0E0 E0E0 E0E0 F0E0 F0F0 F0F0 F8F8 F8F8 FCFC RAW E0E0,E0E0,E0E0,E0E0,F0E0,F0F0,F0F0,F8F8,F8F8,FCFC +00088A FCFC FCFC FCFC FEFE FEFE FEFE FEFE FFFF FFFF FFFF RAW FCFC,FCFC,FCFC,FEFE,FEFE,FEFE,FEFE,FFFF,FFFF,FFFF +00089E FFFF FFFF F1FF 80C0 0000 0000 0000 0000 F800 FFFE FFFF FFFF RAW FFFF,FFFF,F1FF,80C0,0000,0000,0000,0000,F800,FFFE,FFFF,FFFF +0008B6 FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF RAW FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF +0008CA FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF RAW FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF +0008DE FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF RAW FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF +0008F2 FFFF 7FFF 3F3F 3F3F 0C1E 0000 0000 0000 FFE0 3F07 FFFF FFFF FFFF RAW FFFF,7FFF,3F3F,3F3F,0C1E,0000,0000,0000,FFE0,3F07,FFFF,FFFF,FFFF +00090C FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF RAW FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF +000920 FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF RAW FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF +000934 FFFF FFFF FFFF FFFF FFFF 3FFF 3F3F 0019 0000 0000 0000 0000 0000 0000 RAW FFFF,FFFF,FFFF,FFFF,FFFF,3FFF,3F3F,0019,0000,0000,0000,0000,0000,0000 +000950 0000 0000 FC80 FFFF 0000 0F01 FFFF FFFF FFFF FFFF FFFF FFFF RAW 0000,0000,FC80,FFFF,0000,0F01,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF +000968 FFFF FF7F FFFF FFFF FFFF FFFF FFFF FFFF FFFF FFFF RAW FFFF,FF7F,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF,FFFF +00097C 7F7F FF7F FFFF FFFF FFFF FFFF FFFF 7FFF 1F3F 070F 0103 RAW 7F7F,FF7F,FFFF,FFFF,FFFF,FFFF,FFFF,7FFF,1F3F,070F,0103 +000992 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 8000 FFFF 1FFF 0000 FCF0 FFFF RAW 0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,8000,FFFF,1FFF,0000,FCF0,FFFF +0009B2 FFFF FFFF 0FFF 0F1F 0F07 0001 0000 0100 0101 0101 0101 0101 0101 0001 0000 0000 FF00 RAW FFFF,FFFF,0FFF,0F1F,0F07,0001,0000,0100,0101,0101,0101,0101,0101,0001,0000,0000,FF00 +0009D4 3FFF 030F 2F00 FFFF 7FFF 0001 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 RAW 3FFF,030F,2F00,FFFF,7FFF,0001,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000 +0009F6 0000 0000 0000 0303 0001 0000 FF00 FFFF 0107 1F07 FFFF C0F0 0080 0000 0000 0000 RAW 0000,0000,0000,0303,0001,0000,FF00,FFFF,0107,1F07,FFFF,C0F0,0080,0000,0000,0000 +000A16 0000 0000 0000 0000 0000 0000 0000 1400 1F1F 101F 0000 0000 FFFF C0FF 0080 0000 RAW 0000,0000,0000,0000,0000,0000,0000,1400,1F1F,101F,0000,0000,FFFF,C0FF,0080,0000 +000A36 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 3F0C 7F7F RAW 0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,3F0C,7F7F +000A5A 0078 0000 0303 0307 0003 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 RAW 0078,0000,0303,0307,0003,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000,0000 +000A82 0100 0101 0001 RAW 0100,0101,0001 + + + GLCDTABLE2_H +000A88 C007 F005 MOVFF SYSSTRINGA,SYSWORDTEMPA +000A8C C008 F006 MOVFF SYSSTRINGA_H,SYSWORDTEMPA_H +000A90 0E01 MOVLW 1 +000A92 6E09 MOVWF SYSWORDTEMPB,ACCESS +000A94 6A0A CLRF SYSWORDTEMPB_H,ACCESS +000A96 D919 RCALL SYSCOMPLESSTHAN16 +000A98 A000 BTFSS SYSBYTETEMPX,0,ACCESS +000A9A 0C00 RETLW 0 +000A9C 5007 MOVF SYSSTRINGA, W,ACCESS +000A9E 0FB2 ADDLW LOW TABLEGLCDTABLE2_H +000AA0 6EF6 MOVWF TBLPTRL,ACCESS +000AA2 0E0A MOVLW HIGH TABLEGLCDTABLE2_H +000AA4 B0D8 BTFSC STATUS, C,ACCESS +000AA6 0F01 ADDLW 1 +000AA8 2408 ADDWF SYSSTRINGA_H, W,ACCESS +000AAA 6EF7 MOVWF TBLPTRH,ACCESS +000AAC 0008 TBLRD* +000AAE 50F5 MOVF TABLAT, W,ACCESS +000AB0 0012 RETURN + TABLEGLCDTABLE2_H +000AB2 0002 RAW 0002 + + + GLCDTABLE3 +000AB4 0E04 MOVLW 4 +000AB6 6007 CPFSLT SYSSTRINGA,ACCESS +000AB8 0C00 RETLW 0 +000ABA 5007 MOVF SYSSTRINGA, W,ACCESS +000ABC 0FCE ADDLW LOW TABLEGLCDTABLE3 +000ABE 6EF6 MOVWF TBLPTRL,ACCESS +000AC0 0E0A MOVLW HIGH TABLEGLCDTABLE3 +000AC2 B0D8 BTFSC STATUS, C,ACCESS +000AC4 0F01 ADDLW 1 +000AC6 6EF7 MOVWF TBLPTRH,ACCESS +000AC8 0008 TBLRD* +000ACA 50F5 MOVF TABLAT, W,ACCESS +000ACC 0012 RETURN + TABLEGLCDTABLE3 +000ACE 0103 FF00 RAW 0103,FF00 + + + GLCDTABLE4 +000AD2 0E04 MOVLW 4 +000AD4 6007 CPFSLT SYSSTRINGA,ACCESS +000AD6 0C00 RETLW 0 +000AD8 5007 MOVF SYSSTRINGA, W,ACCESS +000ADA 0FEC ADDLW LOW TABLEGLCDTABLE4 +000ADC 6EF6 MOVWF TBLPTRL,ACCESS +000ADE 0E0A MOVLW HIGH TABLEGLCDTABLE4 +000AE0 B0D8 BTFSC STATUS, C,ACCESS +000AE2 0F01 ADDLW 1 +000AE4 6EF7 MOVWF TBLPTRH,ACCESS +000AE6 0008 TBLRD* +000AE8 50F5 MOVF TABLAT, W,ACCESS +000AEA 0012 RETURN + TABLEGLCDTABLE4 +000AEC 0103 FF00 RAW 0103,FF00 + + + GLCDTABLE5 +000AF0 0E04 MOVLW 4 +000AF2 6007 CPFSLT SYSSTRINGA,ACCESS +000AF4 0C00 RETLW 0 +000AF6 5007 MOVF SYSSTRINGA, W,ACCESS +000AF8 0F0A ADDLW LOW TABLEGLCDTABLE5 +000AFA 6EF6 MOVWF TBLPTRL,ACCESS +000AFC 0E0B MOVLW HIGH TABLEGLCDTABLE5 +000AFE B0D8 BTFSC STATUS, C,ACCESS +000B00 0F01 ADDLW 1 +000B02 6EF7 MOVWF TBLPTRH,ACCESS +000B04 0008 TBLRD* +000B06 50F5 MOVF TABLAT, W,ACCESS +000B08 0012 RETURN + TABLEGLCDTABLE5 +000B0A 0103 FF00 RAW 0103,FF00 + + + GLCDWRITEBYTE_KS0108 +000B0E 912D BCF SYSBITVAR0,0,BANKED +000B10 B084 BTFSC PORTE,0,ACCESS +000B12 812D BSF SYSBITVAR0,0,BANKED +000B14 932D BCF SYSBITVAR0,1,BANKED +000B16 B282 BTFSC PORTC,1,ACCESS +000B18 832D BSF SYSBITVAR0,1,BANKED +000B1A B082 BTFSC PORTC,0,ACCESS +000B1C 928B BCF LATC,1,ACCESS +000B1E 908D BCF LATE,0,ACCESS + SYSWAITLOOP1 +000B20 DD0E RCALL FN_GLCDREADBYTE_KS0108 +000B22 BF1A BTFSC GLCDREADBYTE_KS0108,7,BANKED +000B24 D7FD BRA SYSWAITLOOP1 +000B26 908D BCF LATE,0,ACCESS +000B28 B12D BTFSC SYSBITVAR0,0,BANKED +000B2A 808D BSF LATE,0,ACCESS +000B2C 928B BCF LATC,1,ACCESS +000B2E B32D BTFSC SYSBITVAR0,1,BANKED +000B30 828B BSF LATC,1,ACCESS +000B32 928D BCF LATE,1,ACCESS +000B34 9095 BCF TRISD,0,ACCESS +000B36 9295 BCF TRISD,1,ACCESS +000B38 9495 BCF TRISD,2,ACCESS +000B3A 9695 BCF TRISD,3,ACCESS +000B3C 9895 BCF TRISD,4,ACCESS +000B3E 9A95 BCF TRISD,5,ACCESS +000B40 9C95 BCF TRISD,6,ACCESS +000B42 9E95 BCF TRISD,7,ACCESS +000B44 9E8C BCF LATD,7,ACCESS +000B46 BF24 BTFSC LCDBYTE,7,BANKED +000B48 8E8C BSF LATD,7,ACCESS +000B4A 9C8C BCF LATD,6,ACCESS +000B4C BD24 BTFSC LCDBYTE,6,BANKED +000B4E 8C8C BSF LATD,6,ACCESS +000B50 9A8C BCF LATD,5,ACCESS +000B52 BB24 BTFSC LCDBYTE,5,BANKED +000B54 8A8C BSF LATD,5,ACCESS +000B56 988C BCF LATD,4,ACCESS +000B58 B924 BTFSC LCDBYTE,4,BANKED +000B5A 888C BSF LATD,4,ACCESS +000B5C 968C BCF LATD,3,ACCESS +000B5E B724 BTFSC LCDBYTE,3,BANKED +000B60 868C BSF LATD,3,ACCESS +000B62 948C BCF LATD,2,ACCESS +000B64 B524 BTFSC LCDBYTE,2,BANKED +000B66 848C BSF LATD,2,ACCESS +000B68 928C BCF LATD,1,ACCESS +000B6A B324 BTFSC LCDBYTE,1,BANKED +000B6C 828C BSF LATD,1,ACCESS +000B6E 908C BCF LATD,0,ACCESS +000B70 B124 BTFSC LCDBYTE,0,BANKED +000B72 808C BSF LATD,0,ACCESS +000B74 0E01 MOVLW 1 +000B76 6E00 MOVWF DELAYTEMP,ACCESS + DELAYUS1 +000B78 2E00 DECFSZ DELAYTEMP,F,ACCESS +000B7A D7FE BRA DELAYUS1 +000B7C 0000 NOP +000B7E 848D BSF LATE,2,ACCESS +000B80 0E01 MOVLW 1 +000B82 6E00 MOVWF DELAYTEMP,ACCESS + DELAYUS2 +000B84 2E00 DECFSZ DELAYTEMP,F,ACCESS +000B86 D7FE BRA DELAYUS2 +000B88 0000 NOP +000B8A 948D BCF LATE,2,ACCESS +000B8C 0E01 MOVLW 1 +000B8E 6E00 MOVWF DELAYTEMP,ACCESS + DELAYUS3 +000B90 2E00 DECFSZ DELAYTEMP,F,ACCESS +000B92 D7FE BRA DELAYUS3 +000B94 0000 NOP +000B96 0012 RETURN + + + INITGLCD_KS0108 +000B98 9096 BCF TRISE,0,ACCESS +000B9A 9296 BCF TRISE,1,ACCESS +000B9C 9496 BCF TRISE,2,ACCESS +000B9E 9094 BCF TRISC,0,ACCESS +000BA0 9294 BCF TRISC,1,ACCESS +000BA2 9494 BCF TRISC,2,ACCESS +000BA4 948B BCF LATC,2,ACCESS +000BA6 0E01 MOVLW 1 +000BA8 6E02 MOVWF SYSWAITTEMPMS,ACCESS +000BAA 6A03 CLRF SYSWAITTEMPMS_H,ACCESS +000BAC EC3B F000 CALL DELAY_MS +000BB0 848B BSF LATC,2,ACCESS +000BB2 0E01 MOVLW 1 +000BB4 6E02 MOVWF SYSWAITTEMPMS,ACCESS +000BB6 6A03 CLRF SYSWAITTEMPMS_H,ACCESS +000BB8 EC3B F000 CALL DELAY_MS +000BBC 808B BSF LATC,0,ACCESS +000BBE 828B BSF LATC,1,ACCESS +000BC0 908D BCF LATE,0,ACCESS +000BC2 0E3F MOVLW 63 +000BC4 6F24 MOVWF LCDBYTE,BANKED +000BC6 DFA3 RCALL GLCDWRITEBYTE_KS0108 + +000BC8 0EC0 MOVLW 192 +000BCA 6F24 MOVWF LCDBYTE,BANKED +000BCC DFA0 RCALL GLCDWRITEBYTE_KS0108 + +000BCE 908B BCF LATC,0,ACCESS +000BD0 928B BCF LATC,1,ACCESS +000BD2 6B0E CLRF GLCDBACKGROUND,BANKED +000BD4 6B0F CLRF GLCDBACKGROUND_H,BANKED +000BD6 0E01 MOVLW 1 +000BD8 6F18 MOVWF GLCDFOREGROUND,BANKED +000BDA 6B19 CLRF GLCDFOREGROUND_H,BANKED +000BDC 0E06 MOVLW 6 +000BDE 6F17 MOVWF GLCDFONTWIDTH,BANKED +000BE0 6B15 CLRF GLCDFNTDEFAULT,BANKED +000BE2 0E01 MOVLW 1 +000BE4 6F16 MOVWF GLCDFNTDEFAULTSIZE,BANKED +000BE6 DC83 RCALL GLCDCLS_KS0108 + +000BE8 0012 RETURN + + + INITSYS +000BEA 0000 NOP +000BEC 6AE0 CLRF BSR,ACCESS +000BEE 6AF8 CLRF TBLPTRU,ACCESS +000BF0 9EC0 BCF ADCON2,ADFM,ACCESS +000BF2 90C2 BCF ADCON0,ADON,ACCESS +000BF4 86C1 BSF ADCON1,PCFG3,ACCESS +000BF6 84C1 BSF ADCON1,PCFG2,ACCESS +000BF8 82C1 BSF ADCON1,PCFG1,ACCESS +000BFA 80C1 BSF ADCON1,PCFG0,ACCESS +000BFC 0E07 MOVLW 7 +000BFE 6EB4 MOVWF CMCON,ACCESS +000C00 6A80 CLRF PORTA,ACCESS +000C02 6A81 CLRF PORTB,ACCESS +000C04 6A82 CLRF PORTC,ACCESS +000C06 6A83 CLRF PORTD,ACCESS +000C08 6A84 CLRF PORTE,ACCESS +000C0A 0012 RETURN + + + PSET_KS0108 +000C0C BD1B BTFSC GLCDX,6,BANKED +000C0E D002 BRA ENDIF26 +000C10 828B BSF LATC,1,ACCESS +000C12 908B BCF LATC,0,ACCESS + ENDIF26 +000C14 AD1B BTFSS GLCDX,6,BANKED +000C16 D004 BRA ENDIF27 +000C18 808B BSF LATC,0,ACCESS +000C1A 0E40 MOVLW 64 +000C1C 5F1B SUBWF GLCDX,F,BANKED +000C1E 928B BCF LATC,1,ACCESS + ENDIF27 +000C20 C01D F005 MOVFF GLCDY,SYSBYTETEMPA +000C24 0E08 MOVLW 8 +000C26 6E09 MOVWF SYSBYTETEMPB,ACCESS +000C28 D85E RCALL SYSDIVSUB +000C2A C005 F00D MOVFF SYSBYTETEMPA,CURRPAGE +000C2E 908D BCF LATE,0,ACCESS +000C30 0EB8 MOVLW 184 +000C32 110D IORWF CURRPAGE,W,BANKED +000C34 6F24 MOVWF LCDBYTE,BANKED +000C36 DF6B RCALL GLCDWRITEBYTE_KS0108 + +000C38 908D BCF LATE,0,ACCESS +000C3A 0E40 MOVLW 64 +000C3C 111B IORWF GLCDX,W,BANKED +000C3E 6F24 MOVWF LCDBYTE,BANKED +000C40 DF66 RCALL GLCDWRITEBYTE_KS0108 + +000C42 808D BSF LATE,0,ACCESS +000C44 DC7C RCALL FN_GLCDREADBYTE_KS0108 +000C46 C01A F014 MOVFF GLCDREADBYTE_KS0108,GLCDDATATEMP +000C4A 808D BSF LATE,0,ACCESS +000C4C DC78 RCALL FN_GLCDREADBYTE_KS0108 +000C4E C01A F014 MOVFF GLCDREADBYTE_KS0108,GLCDDATATEMP +000C52 0E07 MOVLW 7 +000C54 151D ANDWF GLCDY,W,BANKED +000C56 6F10 MOVWF GLCDBITNO,BANKED +000C58 B112 BTFSC GLCDCOLOUR,0,BANKED +000C5A D004 BRA ELSE28_1 +000C5C 0EFE MOVLW 254 +000C5E 6F11 MOVWF GLCDCHANGE,BANKED +000C60 80D8 BSF STATUS,C,ACCESS +000C62 D003 BRA ENDIF28 + ELSE28_1 +000C64 0E01 MOVLW 1 +000C66 6F11 MOVWF GLCDCHANGE,BANKED +000C68 90D8 BCF STATUS,C,ACCESS + ENDIF28 +000C6A C010 F02E MOVFF GLCDBITNO,SYSREPEATTEMP1 +000C6E 532E MOVF SYSREPEATTEMP1,F,BANKED +000C70 B4D8 BTFSC STATUS, Z,ACCESS +000C72 D003 BRA SYSREPEATLOOPEND1 + SYSREPEATLOOP1 +000C74 3711 RLCF GLCDCHANGE,F,BANKED +000C76 2F2E DECFSZ SYSREPEATTEMP1,F,BANKED +000C78 D7FD BRA SYSREPEATLOOP1 + SYSREPEATLOOPEND1 +000C7A B112 BTFSC GLCDCOLOUR,0,BANKED +000C7C D004 BRA ELSE29_1 +000C7E 5114 MOVF GLCDDATATEMP,W,BANKED +000C80 1511 ANDWF GLCDCHANGE,W,BANKED +000C82 6F14 MOVWF GLCDDATATEMP,BANKED +000C84 D003 BRA ENDIF29 + ELSE29_1 +000C86 5114 MOVF GLCDDATATEMP,W,BANKED +000C88 1111 IORWF GLCDCHANGE,W,BANKED +000C8A 6F14 MOVWF GLCDDATATEMP,BANKED + ENDIF29 +000C8C 908D BCF LATE,0,ACCESS +000C8E 0E40 MOVLW 64 +000C90 111B IORWF GLCDX,W,BANKED +000C92 6F24 MOVWF LCDBYTE,BANKED +000C94 DF3C RCALL GLCDWRITEBYTE_KS0108 + +000C96 808D BSF LATE,0,ACCESS +000C98 C014 F024 MOVFF GLCDDATATEMP,LCDBYTE +000C9C DF38 RCALL GLCDWRITEBYTE_KS0108 + +000C9E 908B BCF LATC,0,ACCESS +000CA0 928B BCF LATC,1,ACCESS +000CA2 0012 RETURN + + + SYSCOMPEQUAL +000CA4 6800 SETF SYSBYTETEMPX,ACCESS +000CA6 5009 MOVF SYSBYTETEMPB, W,ACCESS +000CA8 6205 CPFSEQ SYSBYTETEMPA,ACCESS +000CAA 6A00 CLRF SYSBYTETEMPX,ACCESS +000CAC 0012 RETURN + + + SYSCOMPEQUAL16 +000CAE 6A00 CLRF SYSBYTETEMPX,ACCESS +000CB0 5009 MOVF SYSWORDTEMPB, W,ACCESS +000CB2 6205 CPFSEQ SYSWORDTEMPA,ACCESS +000CB4 0012 RETURN +000CB6 500A MOVF SYSWORDTEMPB_H, W,ACCESS +000CB8 6206 CPFSEQ SYSWORDTEMPA_H,ACCESS +000CBA 0012 RETURN +000CBC 6800 SETF SYSBYTETEMPX,ACCESS +000CBE 0012 RETURN + + + SYSCOMPLESSTHAN +000CC0 6800 SETF SYSBYTETEMPX,ACCESS +000CC2 5009 MOVF SYSBYTETEMPB, W,ACCESS +000CC4 6005 CPFSLT SYSBYTETEMPA,ACCESS +000CC6 6A00 CLRF SYSBYTETEMPX,ACCESS +000CC8 0012 RETURN + + + SYSCOMPLESSTHAN16 +000CCA 6A00 CLRF SYSBYTETEMPX,ACCESS +000CCC 5006 MOVF SYSWORDTEMPA_H,W,ACCESS +000CCE 5C0A SUBWF SYSWORDTEMPB_H,W,ACCESS +000CD0 A0D8 BTFSS STATUS,C,ACCESS +000CD2 0012 RETURN +000CD4 500A MOVF SYSWORDTEMPB_H,W,ACCESS +000CD6 5C06 SUBWF SYSWORDTEMPA_H,W,ACCESS +000CD8 E304 BNC SCLT16TRUE +000CDA 5009 MOVF SYSWORDTEMPB,W,ACCESS +000CDC 5C05 SUBWF SYSWORDTEMPA,W,ACCESS +000CDE B0D8 BTFSC STATUS,C,ACCESS +000CE0 0012 RETURN + SCLT16TRUE +000CE2 1E00 COMF SYSBYTETEMPX,F,ACCESS +000CE4 0012 RETURN + + + SYSDIVSUB +000CE6 5209 MOVF SYSBYTETEMPB, F,ACCESS +000CE8 B4D8 BTFSC STATUS, Z,ACCESS +000CEA 0012 RETURN +000CEC 6A00 CLRF SYSBYTETEMPX,ACCESS +000CEE 0E08 MOVLW 8 +000CF0 6E04 MOVWF SYSDIVLOOP,ACCESS + SYSDIV8START +000CF2 90D8 BCF STATUS, C,ACCESS +000CF4 3605 RLCF SYSBYTETEMPA, F,ACCESS +000CF6 3600 RLCF SYSBYTETEMPX, F,ACCESS +000CF8 5009 MOVF SYSBYTETEMPB, W,ACCESS +000CFA 5E00 SUBWF SYSBYTETEMPX, F,ACCESS +000CFC 8005 BSF SYSBYTETEMPA, 0,ACCESS +000CFE B0D8 BTFSC STATUS, C,ACCESS +000D00 D003 BRA DIV8NOTNEG +000D02 9005 BCF SYSBYTETEMPA, 0,ACCESS +000D04 5009 MOVF SYSBYTETEMPB, W,ACCESS +000D06 2600 ADDWF SYSBYTETEMPX, F,ACCESS + DIV8NOTNEG +000D08 2E04 DECFSZ SYSDIVLOOP, F,ACCESS +000D0A D7F3 BRA SYSDIV8START +000D0C 0012 RETURN + + diff --git a/resources/examples/Pic/ks0108_p18f4550/ks0103_p18f4550.simu b/resources/examples/Pic/ks0108_p18f4550/ks0103_p18f4550.simu new file mode 100644 index 0000000..b7ba968 --- /dev/null +++ b/resources/examples/Pic/ks0108_p18f4550/ks0103_p18f4550.simu @@ -0,0 +1,57 @@ + + +Ks0108-4: + + +pic18f4550-3: + + +Fixed Volt.-2: + + +Connector-5: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +Connector-15: + + +Connector-17: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + + diff --git a/resources/examples/Pic/ks0108_p18f4550/ks0108_p18f4550.simu b/resources/examples/Pic/ks0108_p18f4550/ks0108_p18f4550.simu new file mode 100644 index 0000000..b7ba968 --- /dev/null +++ b/resources/examples/Pic/ks0108_p18f4550/ks0108_p18f4550.simu @@ -0,0 +1,57 @@ + + +Ks0108-4: + + +pic18f4550-3: + + +Fixed Volt.-2: + + +Connector-5: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +Connector-15: + + +Connector-17: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + + diff --git a/resources/examples/Pic/lcd_test-p16f690/lcd_test-p16f690.gcb b/resources/examples/Pic/lcd_test-p16f690/lcd_test-p16f690.gcb new file mode 100644 index 0000000..1b8f3e5 --- /dev/null +++ b/resources/examples/Pic/lcd_test-p16f690/lcd_test-p16f690.gcb @@ -0,0 +1,111 @@ +'''A demonstration program for GCGB and GCB. +'''-------------------------------------------------------------------------------------------------------------------------------- +'''This program demonstrates the capabilities of a LCD display. +'''The LCD is using an 4-bit bus for connectivity. +'''For the LCD connection - please refer to the program. +'''@author WilliamR +'''@licence GPL +'''@version 1.0a +'''@date 21.01.2015 +'''******************************************************************************** +;Set chip model required: + + #chip 16F690, 20 + + + ;Setup LCD Parameters + #define LCD_IO 4 + #define LCD_NO_RW + ;#define LCD_Speed fast + +; ----- Define Hardware settings + #define LCD_RS PORTB.7 + #define LCD_Enable PORTC.7 + #define LCD_DB4 PORTC.6 + #define LCD_DB5 PORTC.3 + #define LCD_DB6 PORTC.4 + #define LCD_DB7 PORTC.5 + + +; ----- Main body of program commences here. + Do Forever + CLS + WAIT 1 s + PRINT "START TEST" + locate 1,0 + PRINT "DISPLAY ON" + wait 3 s + + CLS + Locate 0,0 + Print "Cursor ON" + Locate 1,0 + LCDcursor CursorOn + wait 3 S + + CLS + LCDcursor CursorOFF + locate 0,0 + Print "Cursor OFF" + wait 3 s + + CLS + Locate 0,0 + Print "FLASH ON" + Locate 1,0 + LCDcursor CursorOn + LCDcursor FLASHON + wait 3 s + + CLS + locate 0,0 + Print "FLASH OFF" + Locate 1,0 + LCDCURSOR FLASHOFF + wait 3 sec + + Locate 0,0 + Print "CURSR & FLSH ON" + locate 1,0 + LCDCURSOR CURSORON + LCDCURSOR FLASHON + Wait 3 sec + + Locate 0,0 + Print "CURSR & FLSH OFF" + locate 1,0 + LCDCURSOR CursorOFF + LCDCURSOR FLASHOFF + Wait 3 sec + + CLS + Locate 0,4 + PRINT "Flashing" + Locate 1,4 + Print "Display" + wait 500 ms + + repeat 10 + LCDCURSOR LCDOFF + wait 500 ms + LCDCURSOR LCDON + wait 500 ms + end repeat + + CLS + Locate 0,0 + Print "DISPLAY OFF" + Locate 1,0 + Print "FOR 5 SEC" + Wait 2 SEC + LCDCURSOR LCDOFF + WAIT 5 s + + CLS + Locate 0,0 + LCDCURSOR LCDON + Print "END TEST" + wait 3 s + + loop + diff --git a/resources/examples/Pic/lcd_test-p16f690/lcd_test-p16f690.simu b/resources/examples/Pic/lcd_test-p16f690/lcd_test-p16f690.simu new file mode 100644 index 0000000..4647a89 --- /dev/null +++ b/resources/examples/Pic/lcd_test-p16f690/lcd_test-p16f690.simu @@ -0,0 +1,27 @@ + + +Hd44780-2: + + +pic16f690-1: + + +Connector-3: + + +Connector-5: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + + diff --git a/resources/examples/Pic/open_drain_p16f628/op_drain-p16f628.gcb b/resources/examples/Pic/open_drain_p16f628/op_drain-p16f628.gcb new file mode 100644 index 0000000..14ce1f0 --- /dev/null +++ b/resources/examples/Pic/open_drain_p16f628/op_drain-p16f628.gcb @@ -0,0 +1,14 @@ + +#chip 16F628, 4 'mhz + +Dir PORTA.4 out + +Do + + PORTA.4 = 1 + wait 500 ms + + PORTA.4 = 0 + wait 500 ms + +Loop \ No newline at end of file diff --git a/resources/examples/Pic/open_drain_p16f628/op_drain-p16f628.simu b/resources/examples/Pic/open_drain_p16f628/op_drain-p16f628.simu new file mode 100644 index 0000000..f353072 --- /dev/null +++ b/resources/examples/Pic/open_drain_p16f628/op_drain-p16f628.simu @@ -0,0 +1,42 @@ + + +pic16f628-6: + + +Sonda Voltaje.-5: + + +Led-4: + + +Node-3: + + +Reistencia-2: + + +Rail.-1: + + +Connector-7: + + +Connector-9: + + +Connector-10: + + +Connector-11: + + +Connector-13: + + +PlotterWidget-15: + + +SerialPortWidget-16: + + + diff --git a/resources/examples/Pic/oscilloscope_p18f2550/Author b/resources/examples/Pic/oscilloscope_p18f2550/Author new file mode 100644 index 0000000..6487738 --- /dev/null +++ b/resources/examples/Pic/oscilloscope_p18f2550/Author @@ -0,0 +1,3 @@ +Project page: + +http://www.semifluid.com/2006/08/21/pic18f2550-ks0108-graphical-lcd-oscilloscope/ \ No newline at end of file diff --git a/resources/examples/Pic/oscilloscope_p18f2550/oscilloscope_p18f2550.simu b/resources/examples/Pic/oscilloscope_p18f2550/oscilloscope_p18f2550.simu new file mode 100644 index 0000000..7742eaf --- /dev/null +++ b/resources/examples/Pic/oscilloscope_p18f2550/oscilloscope_p18f2550.simu @@ -0,0 +1,87 @@ + + +Node-7: + + +Capacitor-6: + + +Ground (0 V)-5: + + +Resistor-4: + + +Clock-3: + + +Ks0108-2: + + +pic18f2550-1: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-43: + + +PlotterWidget-44: + + +SerialPortWidget-45: + + + diff --git a/resources/examples/Pic/oscilloscope_p18f2550/oscilloscope_p18f2550_backup.simu b/resources/examples/Pic/oscilloscope_p18f2550/oscilloscope_p18f2550_backup.simu new file mode 100644 index 0000000..7742eaf --- /dev/null +++ b/resources/examples/Pic/oscilloscope_p18f2550/oscilloscope_p18f2550_backup.simu @@ -0,0 +1,87 @@ + + +Node-7: + + +Capacitor-6: + + +Ground (0 V)-5: + + +Resistor-4: + + +Clock-3: + + +Ks0108-2: + + +pic18f2550-1: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-43: + + +PlotterWidget-44: + + +SerialPortWidget-45: + + + diff --git a/resources/examples/Pic/pic_I2C-RAM/pic_i2c-hw.gcb b/resources/examples/Pic/pic_I2C-RAM/pic_i2c-hw.gcb new file mode 100644 index 0000000..aa48e61 --- /dev/null +++ b/resources/examples/Pic/pic_I2C-RAM/pic_i2c-hw.gcb @@ -0,0 +1,66 @@ + + #chip 16F876, 20 + #option explicit + + #include + + HI2CMode Master + + #define HI2C_BAUD_RATE 100 + #define HI2C_DATA PORTC.4 + #define HI2C_CLOCK PORTC.3 + + Dir HI2C_DATA in + Dir HI2C_CLOCK in + + + #define USART_BAUD_RATE 9600 + Dir PORTc.6 Out + Dir PORTc.7 In + #define USART_TX_BLOCKING + wait 500 ms + + #define eepDev 160 'Change this ADDRESS to suit + #define EEpromPageSize 16 + + Dim adr as Word + Dim xxx as Byte + Dim eepAddr as byte + Dim datarray( 10 ) + + 'Dim datarray( EEpromPageSize ) + 'Dim datastring as String * 16 + HSerPrintCRLF 2 + HSerPrint "HW I2C Mode" + HSerPrintCRLF 2 + HSerPrint " Write to EEPROM" + HSerPrintCRLF + + xxx = 0 + for adr=1 to 10 + xxx += 1 + eeprom_wr_byte( eepDev, adr , xxx ) + HSerPrint xxx + HSerPrint " " + next + HSerPrintCRLF 2 + + HSerPrint " Read from EEPROM" + HSerPrintCRLF + + xxx = 0 + for adr=1 to 10 + xxx += 1 + eeprom_rd_byte( eepDev, adr , datarray( xxx ) ) + HSerPrint datarray( xxx ) + HSerPrint " " + next + HSerPrintCRLF + + 'eeprom_wr_array( eepDev, EEpromPageSize, dat , dat, 10 ) + 'eeprom_rd_array( eepDev, eepAddr , datarray(), 10 ) + 'eeprom_wr_string( eepDev, EEpromPageSize, eepAddr , datastring(), datastring(0) ) + + do + wait 1000 ms + loop diff --git a/resources/examples/Pic/pic_I2C-RAM/pic_i2c-hw.simu b/resources/examples/Pic/pic_I2C-RAM/pic_i2c-hw.simu new file mode 100644 index 0000000..c16704f --- /dev/null +++ b/resources/examples/Pic/pic_I2C-RAM/pic_i2c-hw.simu @@ -0,0 +1,60 @@ + + +Node-8: + + +Resistor-7: + + +Rail-6: + + +I2CRam-5: + + +pic16f876-4: + + +Resistor-3: + + +Node-2: + + +Node-1: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +Connector-14: + + +Connector-15: + + +Connector-17: + + +Connector-18: + + +Connector-19: + + +Connector-20: + + +PlotterWidget-21: + + +SerialPortWidget-22: + + + diff --git a/resources/examples/Pic/pic_I2C-RAM/pic_i2c-hw_backup.simu b/resources/examples/Pic/pic_I2C-RAM/pic_i2c-hw_backup.simu new file mode 100644 index 0000000..908f5a2 --- /dev/null +++ b/resources/examples/Pic/pic_I2C-RAM/pic_i2c-hw_backup.simu @@ -0,0 +1,60 @@ + + +Node-8: + + +Node-7: + + +Resistor-6: + + +pic16f876-5: + + +I2CRam-4: + + +Rail-3: + + +Resistor-2: + + +Node-1: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +Connector-14: + + +Connector-15: + + +Connector-17: + + +Connector-18: + + +Connector-19: + + +Connector-20: + + +PlotterWidget-21: + + +SerialPortWidget-22: + + + diff --git a/resources/examples/Pic/pwm_p16f1825/pwm_p16f1825.gcb b/resources/examples/Pic/pwm_p16f1825/pwm_p16f1825.gcb new file mode 100644 index 0000000..b9e9fa2 --- /dev/null +++ b/resources/examples/Pic/pwm_p16f1825/pwm_p16f1825.gcb @@ -0,0 +1,26 @@ + + #chip 16f1825,8 + #config INTOSC , WDTE_OFF , PWRTE_OFF , MCLRE_OFF , CP_ON , CPD_OFF , BOREN_ON , CLKOUTEN_OFF , IESO_OFF + #config WRT_OFF , PLLEN_OFF , STVREN_OFF , LVP_OFF + +dir portc.5 out ; CCP1 +dir portc.3 out ; CCP2 +dir porta.2 out ; CCP3 +dir portc.1 out ; CCP4 + +dim PWM1 as byte + +do + PWM1 = ReadAD( AN0 ) + if PWM1 > 127 then PWM2 = PWM1-127 + if PWM1 < 127 then PWM2 = 255-(127-PWM1) + PWM3 = 255-PWM1 + PWM4 = 255-PWM2 + + HPWM 1, 40, PWM1 + HPWM 2, 40, PWM2 + HPWM 3, 40, PWM3 + HPWM 4, 40, PWM4 + + wait 5 ms +loop diff --git a/resources/examples/Pic/pwm_p16f1825/pwm_p16f1825.simu b/resources/examples/Pic/pwm_p16f1825/pwm_p16f1825.simu new file mode 100644 index 0000000..d55659e --- /dev/null +++ b/resources/examples/Pic/pwm_p16f1825/pwm_p16f1825.simu @@ -0,0 +1,90 @@ + + +pic16f1825-14: + + +Fuente Voltaje-13: + + +Led-12: + + +Reistencia-11: + + +Tierra-10: + + +Reistencia-9: + + +Led-8: + + +Tierra-7: + + +Reistencia-6: + + +Led-5: + + +Tierra-4: + + +Reistencia-3: + + +Led-2: + + +Tierra-1: + + +Connector-15: + + +Connector-17: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +Connector-39: + + +PlotterWidget-41: + + +SerialPortWidget-42: + + + diff --git a/resources/examples/Pic/serial_echo-16F886/serial_echo-16F886.gcb b/resources/examples/Pic/serial_echo-16F886/serial_echo-16F886.gcb new file mode 100644 index 0000000..dffdb11 --- /dev/null +++ b/resources/examples/Pic/serial_echo-16F886/serial_echo-16F886.gcb @@ -0,0 +1,28 @@ + +#chip 16F886, 16 + +#define USART_BAUD_RATE 9600 +#define USART_BLOCKING +#define SerInPort PORTc.7 +#define SerOutPort PORTc.6 + +Dir SerOutPort Out +Dir SerInPort In + +HSerPrint "Serial Echo Test" +HSerPrintCRLF + +wait 200 ms + +Do + + InChar = HSerReceive + + If InChar <> 255 Then + HSerSend InChar + End If + +Loop + + + diff --git a/resources/examples/Pic/serial_echo-16F886/serial_echo-16F886.simu b/resources/examples/Pic/serial_echo-16F886/serial_echo-16F886.simu new file mode 100644 index 0000000..ec8f4b6 --- /dev/null +++ b/resources/examples/Pic/serial_echo-16F886/serial_echo-16F886.simu @@ -0,0 +1,12 @@ + + +pic16f886-1: + + +PlotterWidget-5: + + +SerialPortWidget-6: + + + diff --git a/resources/examples/RLC/LC_filter.simu b/resources/examples/RLC/LC_filter.simu new file mode 100644 index 0000000..b73ea7c --- /dev/null +++ b/resources/examples/RLC/LC_filter.simu @@ -0,0 +1,42 @@ + + +Wave Gen.-6: + + +Oscope-5: + + +Inductor-4: + + +Capacitor-3: + + +Ground (0 V)-2: + + +Node-1: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-12: + + +Connector-13: + + +PlotterWidget-55: + + +SerialPortWidget-56: + + + diff --git a/resources/examples/RLC/RLC_Resonator-0.simu b/resources/examples/RLC/RLC_Resonator-0.simu new file mode 100644 index 0000000..c0cc8f0 --- /dev/null +++ b/resources/examples/RLC/RLC_Resonator-0.simu @@ -0,0 +1,60 @@ + + +Switch-9: + + +Fixed Volt.-8: + + +Resistor-7: + + +Capacitor-6: + + +Ground (0 V)-5: + + +Inductor-4: + + +Node-3: + + +Node-2: + + +Probe-1: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-19: + + +Connector-20: + + +Connector-21: + + +PlotterWidget-55: + + +SerialPortWidget-56: + + + diff --git a/resources/examples/RLC/RLC_Resonator.simu b/resources/examples/RLC/RLC_Resonator.simu new file mode 100644 index 0000000..9bc2b38 --- /dev/null +++ b/resources/examples/RLC/RLC_Resonator.simu @@ -0,0 +1,60 @@ + + +Rail-9: + + +Node-8: + + +Push-7: + + +Resistor-6: + + +Capacitor-5: + + +Ground (0 V)-4: + + +Inductor-3: + + +Node-2: + + +Probe-1: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-15: + + +Connector-16: + + +Connector-18: + + +Connector-19: + + +Connector-20: + + +PlotterWidget-22: + + +SerialPortWidget-23: + + + diff --git a/resources/examples/RLC/RL_Charge-Discharge.simu b/resources/examples/RLC/RL_Charge-Discharge.simu new file mode 100644 index 0000000..a6f2a8b --- /dev/null +++ b/resources/examples/RLC/RL_Charge-Discharge.simu @@ -0,0 +1,63 @@ + + +Probe-10: + + +Probe-9: + + +Ground (0 V)-8: + + +Resistor-7: + + +Capacitor-6: + + +Fixed Volt.-5: + + +Resistor-4: + + +Inductor-3: + + +Node-2: + + +Node-1: + + +Connector-11: + + +Connector-13: + + +Connector-15: + + +Connector-17: + + +Connector-18: + + +Connector-19: + + +Connector-21: + + +Connector-22: + + +PlotterWidget-55: + + +SerialPortWidget-56: + + + diff --git a/resources/examples/Relay/relay-8bit_ALU.simu b/resources/examples/Relay/relay-8bit_ALU.simu new file mode 100644 index 0000000..9a1261f --- /dev/null +++ b/resources/examples/Relay/relay-8bit_ALU.simu @@ -0,0 +1,5337 @@ + + +Node-612: + + +Node-611: + + +Node-610: + + +Node-609: + + +Node-608: + + +Node-607: + + +Node-606: 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b/resources/examples/Relay/relay-led.simu new file mode 100644 index 0000000..2d53a88 --- /dev/null +++ b/resources/examples/Relay/relay-led.simu @@ -0,0 +1,75 @@ + + +Relay SPST-10: + + +Fixed Volt.-9: + + +Node-8: + + +Ground (0 V)-7: + + +Led-6: + + +Resistor-5: + + +Node-4: + + +Diode-3: + + +Node-2: + + +Node-1: + + +Connector-11: + + +Connector-13: + + +Connector-14: + + +Connector-15: + + +Connector-17: + + +Connector-19: + + +Connector-20: + + +Connector-21: + + +Connector-22: + + +Connector-23: + + +Connector-24: + + +Connector-25: + + +PlotterWidget-1983: + + +SerialPortWidget-1984: + + + diff --git a/resources/examples/Relay/relay-register.simu b/resources/examples/Relay/relay-register.simu new file mode 100644 index 0000000..c1ab596 --- /dev/null +++ b/resources/examples/Relay/relay-register.simu @@ -0,0 +1,519 @@ + + +Node-65: + + +Node-64: + + +Fixed Volt.-63: + + +Relay (all)-62: + + +Relay (all)-61: + + +Ground (0 V)-60: + + +Relay (all)-59: + + +Relay (all)-58: + + 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a/resources/examples/Relay/relay-toggle.simu b/resources/examples/Relay/relay-toggle.simu new file mode 100644 index 0000000..12967ae --- /dev/null +++ b/resources/examples/Relay/relay-toggle.simu @@ -0,0 +1,150 @@ + + +Led-20: + + +Ground (0 V)-19: + + +Resistor-18: + + +Node-17: + + +Node-16: + + +Node-15: + + +Node-14: + + +Push-13: + + +Node-12: + + +Resistor-11: + + +Relay SPST-10: + + +Rail.-9: + + +Relay SPST-8: + + +Relay SPST-7: + + +Led-6: + + +Node-5: + + +Node-4: + + +Node-3: + + +Node-2: + + +Node-1: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-26: + + +Connector-27: + + +Connector-28: + + +Connector-30: + + +Connector-31: + + +Connector-32: + + +Connector-34: + + +Connector-35: + + +Connector-36: + + +Connector-37: + + +Connector-38: + + +Connector-40: + + +Connector-41: + + +Connector-42: + + +Connector-44: + + +Connector-46: + + +Connector-47: + + +Connector-48: + + +Connector-49: + + +Connector-50: + + +Connector-51: + + +Connector-52: + + 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Source-6: + + +Ground (0 V)-5: + + +Amperimeter-4: + + +Volt. Source-3: + + +Mosfet-2: + + +Probe-1: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +PlotterWidget-57: + + +SerialPortWidget-58: + + + diff --git a/resources/examples/Transistor/npn-amplifier.simu b/resources/examples/Transistor/npn-amplifier.simu new file mode 100644 index 0000000..5b8c043 --- /dev/null +++ b/resources/examples/Transistor/npn-amplifier.simu @@ -0,0 +1,48 @@ + + +Probe-8: + + +Probe-7: + + +Resistor-6: + + +WaveGen-5: + + +Ground-4: + + +Resistor-3: + + +Rail-2: + + +BJT-1: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +Connector-15: + + +Connector-17: + + +PlotterWidget-19: + + +SerialPortWidget-20: + + + diff --git a/resources/examples/Transistor/npn-sine_wave.simu b/resources/examples/Transistor/npn-sine_wave.simu new file mode 100644 index 0000000..75b0e76 --- /dev/null +++ b/resources/examples/Transistor/npn-sine_wave.simu @@ -0,0 +1,180 @@ + + +Node-26: + + +Oscope-25: + + +Node-24: + + +Node-23: + + +Node-22: + + +Node-21: + + +Node-20: + + +Node-19: + + +Resistor-18: + + +Resistor-17: + + +Resistor-16: + + +Resistor-15: + + +Resistor-14: + + +Ground (0 V)-13: + + +Capacitor-12: + + +Capacitor-11: + + +BJT-10: + + +Capacitor-9: + + +Node-8: + + +Resistor-7: + + +Node-6: + + +Capacitor-5: + + +Node-4: + + +Node-3: + + +Rail.-2: + + +Node-1: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-36: + + +Connector-37: + + +Connector-38: + + +Connector-39: + + +Connector-40: + + +Connector-41: + + +Connector-43: + + +Connector-44: + + +Connector-45: + + +Connector-46: + + +Connector-47: + + +Connector-49: + + +Connector-50: + + +Connector-51: + + +Connector-52: + + +Connector-53: + + +Connector-54: + + +Connector-55: + + +Connector-56: + + +Connector-57: + + +Connector-58: + + +Connector-59: + + +Connector-60: + + +Connector-62: + + +Connector-63: + + +Connector-64: + + +PlotterWidget-19: + + +SerialPortWidget-20: + + + diff --git a/resources/examples/Transistor/npn_vco-led.simu b/resources/examples/Transistor/npn_vco-led.simu new file mode 100644 index 0000000..cc38ff9 --- /dev/null +++ b/resources/examples/Transistor/npn_vco-led.simu @@ -0,0 +1,141 @@ + + +Node-22: + + +Rail-21: + + +Node-20: + + +Ground-19: + + +Node-18: + + +Node-17: + + +Node-16: + + +Node-15: + + +Resistor-14: + + +Resistor-13: + + +Led-12: + + +Led-11: + + +Capacitor-10: + + +Capacitor-9: + + +BJT-8: + + +BJT-7: + + +Resistor-4: + + +Node-3: + + +Resistor-2: + + +Node-1: + + +Connector-23: + + +Connector-25: + + +Connector-26: + + +Connector-27: + + +Connector-29: + + +Connector-30: + + +Connector-31: + + +Connector-33: + + +Connector-34: + + +Connector-35: + + +Connector-37: + + +Connector-38: + + +Connector-39: + + +Connector-41: + + +Connector-42: + + +Connector-43: + + +Connector-45: + + +Connector-46: + + +Connector-47: + + +Connector-48: + + +Connector-50: + + +Connector-51: + + +Connector-52: + + +Connector-53: + + +PlotterWidget-55: + + +SerialPortWidget-56: + + + diff --git a/resources/examples/Transistor/npn_vco.simu b/resources/examples/Transistor/npn_vco.simu new file mode 100644 index 0000000..ce1fd53 --- /dev/null +++ b/resources/examples/Transistor/npn_vco.simu @@ -0,0 +1,135 @@ + + +Node-51: + + +Node-20: + + +Node-19: + + +Probe-18: + + +Ground-17: + + +Node-16: + + +Capacitor-15: + + +Node-14: + + +Resistor-13: + + +BJT-12: + + +Rail-11: + + +Resistor-10: + + +Probe-9: + + +Resistor-7: + + +Node-6: + + +BJT-5: + + +Resistor-4: + + +Node-3: + + +Capacitor-2: + + +Node-1: + + +Connector-21: + + +Connector-23: + + +Connector-24: + + +Connector-27: + + +Connector-29: + + +Connector-30: + + +Connector-31: + + +Connector-32: + + +Connector-33: + + +Connector-34: + + +Connector-35: + + +Connector-37: + + +Connector-38: + + +Connector-39: + + +Connector-41: + + +Connector-43: + + +Connector-44: + + +Connector-46: + + +Connector-47: + + +Connector-48: + + +Connector-52: + + +Connector-53: + + +PlotterWidget-49: + + +SerialPortWidget-50: + + + diff --git a/resources/examples/Transistor/pnp-test.simu b/resources/examples/Transistor/pnp-test.simu new file mode 100644 index 0000000..fd94888 --- /dev/null +++ b/resources/examples/Transistor/pnp-test.simu @@ -0,0 +1,57 @@ + + +Probe-9: + + +Resistor-8: + + +Volt. Source-7: + + +Amperimeter-6: + + +BJT-5: + + +Rail.-4: + + +Resistor-3: + + +Ground (0 V)-2: + + +Amperimeter-1: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +PlotterWidget-19: + + +SerialPortWidget-20: + + + diff --git a/resources/examples/logic/4bit_adder_subst.simu b/resources/examples/logic/4bit_adder_subst.simu new file mode 100644 index 0000000..03697de --- /dev/null +++ b/resources/examples/logic/4bit_adder_subst.simu @@ -0,0 +1,294 @@ + + +Node-38: + + +Node-37: + + +Node-36: + + +Node-35: + + +Node-34: + + +Node-33: + + +Node-32: + + +Node-31: + + +7 Seg BCD-30: + + +7 Seg BCD-29: + + +Text-28: + + +Full Adder-27: + + +Full Adder-26: + + +Full Adder-25: + + +Full Adder-24: + + +Latch-23: + + +Xor Gate-22: + + +Xor Gate-21: + + +Xor Gate-20: + + +Xor Gate-19: + + +Fixed Volt.-18: + + +Node-17: + + +Node-16: + + +Node-15: + + +Xor Gate-14: + + +Fixed Volt.-13: + + +Node-12: + + +7-11: + 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b/resources/examples/logic/7490_clock-2.simu @@ -0,0 +1,348 @@ + + +Node-41: + + +Node-40: + + +Node-39: + + +Node-38: + + +Node-37: + + +Node-36: + + +Node-35: + + +Node-34: + + +7-33: + + +7-32: + + +Node-31: + + +74XX90-30: + + +Node-29: + + +74XX90-28: + + +Node-27: + + +7-26: + + +7-25: + + +74XX90-24: + + +74XX90-23: + + +Node-22: + + +7-21: + + +74XX90-20: + + +Clock-19: + + +74XX90-18: + + +7-17: + + +Node-16: + + +Node-15: + + +Node-14: + + +Node-13: + + +Node-12: + + +Resistor-11: + + +Resistor-10: + + +Push-9: + + +Push-8: + + +Rail.-7: + + +Node-6: + + +Node-5: + + +Node-4: + + +Node-3: + + +Node-2: + + +Text-1: + + +Connector-42: + + +Connector-44: + + +Connector-46: + + +Connector-48: + + +Connector-50: + + +Connector-51: + + +Connector-52: + + +Connector-53: + + +Connector-55: + + +Connector-56: + + +Connector-58: + + +Connector-60: + + +Connector-62: + + +Connector-63: + + +Connector-64: + + +Connector-65: + + +Connector-67: + + +Connector-69: + + +Connector-71: + + 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a/resources/examples/logic/74_series/74190_TEST.simu b/resources/examples/logic/74_series/74190_TEST.simu new file mode 100644 index 0000000..e6d2b1a --- /dev/null +++ b/resources/examples/logic/74_series/74190_TEST.simu @@ -0,0 +1,171 @@ + + +Probe-18: + + +Probe-17: + + +Node-16: + + +Ground (0 V)-15: + + +Node-14: + + +Node-13: + + +Fixed Volt.-12: + + +74HC190-11: + + +Ground (0 V)-10: + + +ResistorDip-9: + + +7 Segment-8: + + +74HC4511-7: + + +Ground (0 V)-6: + + +Rail.-5: + + +Node-4: + + +Fixed Volt.-3: + + +Fixed Volt.-2: + + +Fixed Volt.-1: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +Connector-39: + + +Connector-41: + + +Connector-43: + + +Connector-45: + + +Connector-47: + + +Connector-49: + + +Connector-51: + + +Connector-52: + + +Connector-53: + + +Connector-55: + + +Connector-57: + + +Connector-59: + + +Connector-61: + + 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0000000..5820d60 --- /dev/null +++ b/resources/examples/logic/74_series/7492_subcircuit.simu @@ -0,0 +1,222 @@ + + +Text-30: + + +Node-29: + + +Node-28: + + +Node-27: + + +Node-26: + + +Node-25: + + +Fixed Volt.-24: + + +Fixed Volt.-23: + + +Node-22: + + +Probe-21: + + +Probe-20: + + +Probe-19: + + +Probe-18: + + +Node-17: + + +Fixed Volt.-16: + + +Node-15: + + +Node-14: + + +Node-13: + + +Node-12: + + +Node-11: + + +Rail.-10: + + +Fixed Volt.-9: + + +Node-8: + + +Node-7: + + +Node-6: + + +And Gate-5: + + +FlipFlop JK-4: + + +FlipFlop JK-3: + + +FlipFlop JK-2: + + +FlipFlop JK-1: + + +Connector-31: + + +Connector-33: + + +Connector-34: + + +Connector-35: + + +Connector-36: + + +Connector-37: + + +Connector-38: + + +Connector-39: + + +Connector-41: + + +Connector-43: + + +Connector-44: + + +Connector-45: + + +Connector-46: + + +Connector-47: + + +Connector-48: + + +Connector-49: + + +Connector-50: + + +Connector-51: + + +Connector-52: + + +Connector-53: + + +Connector-55: + + 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+ + +Fixed Volt.-9: + + +Node-8: + + +Rail.-7: + + +Node-6: + + +Ground (0 V)-5: + + +Fixed Volt.-4: + + +Fixed Volt.-3: + + +7 Seg BCD-2: + + +74HC193-1: + + +Connector-13: + + +Connector-15: + + +Connector-17: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-28: + + +Connector-29: + + +Connector-31: + + +Connector-32: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +Connector-39: + + +PlotterWidget-41: + + +SerialPortWidget-42: + + + diff --git a/resources/examples/logic/74_series/74HC390_test.simu b/resources/examples/logic/74_series/74HC390_test.simu new file mode 100644 index 0000000..6a9cf6b --- /dev/null +++ b/resources/examples/logic/74_series/74HC390_test.simu @@ -0,0 +1,225 @@ + + +74HC4511-20: + + +Rail.-19: + + +ResistorDip-18: + + +7 Segment-17: + + +Node-15: + + +ResistorDip-14: + + +7 Segment-13: + + +74HC4511-12: + + +Ground (0 V)-11: + + +Fixed Volt.-9: + + +Clock-8: + + +74HC390-7: + + +Node-6: + + +Node-5: + + +Node-4: + + +Node-3: + + +Node-2: + + +Node-1: + + +Connector-22: + + +Connector-24: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +Connector-39: + + +Connector-41: + + +Connector-43: + + +Connector-45: + + +Connector-47: + + +Connector-49: + + +Connector-51: + + +Connector-53: + + +Connector-55: + + +Connector-57: + + +Connector-59: + + +Connector-61: + + +Connector-63: + + +Connector-64: + + +Connector-65: + + +Connector-67: + + +Connector-71: + + +Connector-73: + + +Connector-75: + + +Connector-77: + + +Connector-79: + + +Connector-81: + + +Connector-83: + + +Connector-85: + + +Connector-87: + + +Connector-89: + + +Connector-91: + + +Connector-93: + + +Connector-95: + + +Connector-97: + + +Connector-101: + + +Connector-103: + + +Connector-105: + + +Connector-107: + + +Connector-108: + + +Connector-109: + + +Connector-111: + + +Connector-112: + + +Connector-113: + + +Connector-114: + + +Connector-115: + + +Connector-116: + + +Connector-118: + + +Connector-119: + + +Connector-120: + + +Connector-121: + + +Connector-30: + + +Connector-26: + + +Connector-28: + + +PlotterWidget-122: + + +SerialPortWidget-123: + + + diff --git a/resources/examples/logic/74_series/74HC393_test.simu b/resources/examples/logic/74_series/74HC393_test.simu new file mode 100644 index 0000000..789548f --- /dev/null +++ b/resources/examples/logic/74_series/74HC393_test.simu @@ -0,0 +1,54 @@ + + +7 Seg BCD-7: + + +7 Seg BCD-5: + + +Clock-4: + + +Fixed Volt.-2: + + +74HC393-1: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-8: + + +Connector-21: + + +PlotterWidget-32: + + +SerialPortWidget-33: + + + diff --git a/resources/examples/logic/74_series/74HC4017_TEST1.simu b/resources/examples/logic/74_series/74HC4017_TEST1.simu new file mode 100644 index 0000000..472ee3c --- /dev/null +++ b/resources/examples/logic/74_series/74HC4017_TEST1.simu @@ -0,0 +1,363 @@ + + +Node-45: + + +Node-44: + + +Node-43: + + +Node-42: + + +Node-41: + + +Node-40: + + +Node-39: + + +Node-38: + + +Node-37: + + +Node-36: + + +Tierra-35: + + +Fixed Volt.-34: + + +Clock-33: + + +Ground (0 V)-32: + + +Led-31: + + +Node-30: + + +Node-29: + + +Node-28: + + +Node-27: + + +Node-26: + + +Node-25: + + +Node-24: + + +Node-23: + + +Node-22: + + +ResistorDip-21: + + +Led-20: + + +Led-19: + + +Led-18: + + +Led-17: + + +Led-16: + + +Led-15: + + +Led-14: + + +Led-13: + + +Led-12: + + +Led-11: + + +Or Gate-10: + + +Or Gate-9: + + +Or Gate-8: + + +Or Gate-7: + + +Or Gate-6: + + +Or Gate-5: + + +Or Gate-4: + + +Or Gate-3: + + +Or Gate-2: + + +74HC4017-1: + + +Connector-46: + + +Connector-48: + + +Connector-50: + + +Connector-52: + + +Connector-54: + + +Connector-56: + + +Connector-58: + + +Connector-60: + + +Connector-62: + + +Connector-64: + + +Connector-66: + + +Connector-68: + + +Connector-70: + + +Connector-72: + + +Connector-74: + + +Connector-76: + + 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b/resources/examples/logic/74_series/74HC4518_TEST.simu @@ -0,0 +1,243 @@ + + +Node-21: + + +Node-20: + + +74HC4518-19: + + +Ground (0 V)-18: + + +ResistorDip-17: + + +7 Segment-16: + + +74HC4511-15: + + +Ground (0 V)-14: + + +Node-13: + + +Node-12: + + +Clock-11: + + +Rail.-10: + + +ResistorDip-9: + + +Node-8: + + +Ground (0 V)-7: + + +7 Segment-6: + + +74HC4511-5: + + +Ground (0 V)-4: + + +Fixed Volt.-3: + + +Node-2: + + +Node-1: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-44: + + +Connector-46: + + +Connector-48: + + +Connector-50: + + +Connector-52: + + +Connector-54: + + +Connector-55: + + +Connector-57: + + +Connector-59: + + +Connector-61: + + +Connector-62: + + +Connector-63: + + +Connector-65: + + +Connector-67: + + +Connector-69: + + +Connector-71: + + +Connector-73: + + +Connector-74: + + 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+Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-27: + + +Connector-28: + + +Connector-30: + + +Connector-31: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-37: + + +PlotterWidget-38: + + +SerialPortWidget-39: + + + diff --git a/resources/examples/logic/74_series/74HC573-test.simu b/resources/examples/logic/74_series/74HC573-test.simu new file mode 100644 index 0000000..89574ba --- /dev/null +++ b/resources/examples/logic/74_series/74HC573-test.simu @@ -0,0 +1,120 @@ + + +Probe-19: + + +Probe-18: + + +Probe-17: + + +Probe-16: + + +Probe-15: + + +Probe-14: + + +Probe-13: + + +Probe-12: + + +74HC573-11: + + +Fixed Volt.-10: + + +Fixed Volt.-9: + + +Fixed Volt.-8: + + +Fixed Volt.-7: + + +Fixed Volt.-6: + + +Fixed Volt.-5: + + +Fixed Volt.-4: + + +Fixed Volt.-3: + + +Fixed Volt.-2: + + +Fixed Volt.-1: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-44: + + +Connector-46: + + +Connector-48: + + +Connector-50: + + +Connector-52: + + +Connector-54: + + +PlotterWidget-32: + + +SerialPortWidget-33: + + + diff --git a/resources/examples/logic/74_series/74hc4020_test.simu b/resources/examples/logic/74_series/74hc4020_test.simu new file mode 100644 index 0000000..7fa611c --- /dev/null +++ b/resources/examples/logic/74_series/74hc4020_test.simu @@ -0,0 +1,45 @@ + + +7 Seg BCD-5: + + +Probe-4: + + +Fixed Volt.-3: + + +Clock-2: + + +74HC4020-1: + + +Connector-6: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +PlotterWidget-20: + + +SerialPortWidget-21: + + + diff --git a/resources/examples/logic/74_series/74hc4024_Test.simu b/resources/examples/logic/74_series/74hc4024_Test.simu new file mode 100644 index 0000000..fb82569 --- /dev/null +++ b/resources/examples/logic/74_series/74hc4024_Test.simu @@ -0,0 +1,57 @@ + + +Ground (0 V)-6: + + +7 Seg BCD-5: + + +7 Seg BCD-4: + + +Fixed Volt.-3: + + +Clock-2: + + +74HC4024-1: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +Connector-15: + + +Connector-17: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +PlotterWidget-27: + + +SerialPortWidget-28: + + + diff --git a/resources/examples/logic/74_series/74hc4040_test.simu b/resources/examples/logic/74_series/74hc4040_test.simu new file mode 100644 index 0000000..63805e2 --- /dev/null +++ b/resources/examples/logic/74_series/74hc4040_test.simu @@ -0,0 +1,48 @@ + + +Probe-7: + + +Probe-6: + + +Probe-5: + + +Probe-4: + + +Fixed Volt.-3: + + +Clock-2: + + +74HC4040-1: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +PlotterWidget-20: + + +SerialPortWidget-21: + + + diff --git a/resources/examples/logic/74_series/74hc4511+74hc147 test.simu b/resources/examples/logic/74_series/74hc4511+74hc147 test.simu new file mode 100644 index 0000000..3423b83 --- /dev/null +++ b/resources/examples/logic/74_series/74hc4511+74hc147 test.simu @@ -0,0 +1,456 @@ + + +Node-58: + + +Node-57: + + +Ground (0 V)-56: + + +Node-55: + + +74HC4511-54: + + +74HC147-53: + + +74HC04-52: + + +7 Segment-51: + + +ResistorDip-50: + + +Ground (0 V)-49: + + +Push-48: + + +Push-47: + + +Push-46: + + +Push-45: + + +Push-44: + + +Push-43: + + +Push-42: + + +Push-41: + + +Push-40: + + +Push-39: + + +Node-38: + + +Node-37: + + +Node-36: + + +Node-35: + + +Node-34: + + +Node-33: + + +Node-32: + + +ResistorDip-31: + + +Node-30: + + +Node-29: + + +Node-28: + + +Node-27: + + +Node-26: + + +Text-25: + + +Text-24: + + +Text-23: + + +Text-22: + + +Text-21: + + +Text-20: + + +Text-19: + + +Text-18: + + +Text-17: + + +Text-16: + + +Node-15: + + +Node-14: + + +Node-13: + + +Node-12: + + +Node-11: + + +Node-10: + + +Node-9: + + +Node-8: + + +Node-7: + + +Node-6: + + +Node-5: + + +Rail.-4: + + +Node-3: + + +Ground (0 V)-2: + + +Node-1: + + +Connector-59: + + +Connector-61: + + +Connector-63: + + +Connector-65: + + +Connector-67: + + +Connector-69: + + +Connector-71: + + +Connector-73: + + +Connector-75: + + +Connector-77: + + +Connector-79: + + +Connector-81: + + +Connector-83: + + +Connector-85: + + +Connector-87: + + +Connector-89: + + +Connector-91: + + +Connector-93: + + +Connector-95: + + +Connector-97: + + +Connector-99: + + +Connector-101: + + +Connector-102: + + +Connector-103: + + +Connector-104: + + +Connector-105: + + +Connector-106: + + +Connector-107: + + +Connector-108: + + +Connector-109: + + +Connector-110: + + +Connector-111: + + +Connector-112: + + +Connector-113: + + +Connector-114: + + +Connector-116: + + +Connector-117: + + +Connector-118: + + +Connector-119: + + +Connector-120: + + +Connector-121: + + +Connector-122: + + +Connector-123: + + +Connector-124: + + +Connector-125: + + +Connector-127: + + +Connector-128: + + +Connector-129: + + +Connector-130: + + +Connector-132: + + +Connector-133: + + +Connector-134: + + +Connector-135: + + +Connector-136: + + +Connector-137: + + +Connector-139: + + +Connector-140: + + +Connector-141: + + +Connector-143: + + +Connector-144: + + +Connector-145: + + +Connector-147: + + +Connector-149: + + +Connector-151: + + +Connector-153: + + +Connector-155: + + +Connector-156: + + +Connector-157: + + +Connector-158: + + +Connector-159: + + +Connector-160: + + +Connector-161: + + +Connector-162: + + +Connector-163: + + +Connector-164: + + +Connector-165: + + +Connector-166: + + +Connector-167: + + +Connector-168: + + +Connector-169: + + +Connector-170: + + +Connector-171: + + +Connector-172: + + +Connector-174: + + +Connector-176: + + +Connector-178: + + +Connector-180: + + +Connector-181: + + +Connector-182: + + +Connector-183: + + +Connector-184: + + +PlotterWidget-185: + + +SerialPortWidget-186: + + + diff --git a/resources/examples/logic/74_series/Help_74HC00.simu b/resources/examples/logic/74_series/Help_74HC00.simu new file mode 100644 index 0000000..db024f3 --- /dev/null +++ b/resources/examples/logic/74_series/Help_74HC00.simu @@ -0,0 +1,30 @@ + + +Probe-5: + + +74HC00-4: + + +Fixed Voltage-3: + + +Fixed Voltage-2: + + +TextComponent-1: + + +Connector-6: + + +Connector-8: + + +Connector-10: + + +PlotterWidget-12: + + + diff --git a/resources/examples/logic/74_series/Help_74HC02.simu b/resources/examples/logic/74_series/Help_74HC02.simu new file mode 100644 index 0000000..59652c6 --- /dev/null +++ b/resources/examples/logic/74_series/Help_74HC02.simu @@ -0,0 +1,30 @@ + + +Probe-5: + + +Fixed Voltage-4: + + +Fixed Voltage-3: + + +74HC02-2: + + +TextComponent-1: + + +Connector-6: + + +Connector-8: + + +Connector-10: + + +PlotterWidget-12: + + + diff --git a/resources/examples/logic/74_series/Help_74HC04.simu b/resources/examples/logic/74_series/Help_74HC04.simu new file mode 100644 index 0000000..dc16434 --- /dev/null +++ b/resources/examples/logic/74_series/Help_74HC04.simu @@ -0,0 +1,24 @@ + + +74HC04-13: + + +Probe-5: + + +Fixed Voltage-4: + + +TextComponent-1: + + +Connector-14: + + +Connector-15: + + +PlotterWidget-12: + + + diff --git a/resources/examples/logic/74_series/Help_74HC08.simu b/resources/examples/logic/74_series/Help_74HC08.simu new file mode 100644 index 0000000..9b1f7af --- /dev/null +++ b/resources/examples/logic/74_series/Help_74HC08.simu @@ -0,0 +1,30 @@ + + +74HC08-13: + + +Probe-5: + + +Fixed Voltage-4: + + +Fixed Voltage-3: + + +TextComponent-1: + + +Connector-14: + + +Connector-15: + + +Connector-17: + + +PlotterWidget-12: + + + diff --git a/resources/examples/logic/74_series/Help_74HC32.simu b/resources/examples/logic/74_series/Help_74HC32.simu new file mode 100644 index 0000000..718fa31 --- /dev/null +++ b/resources/examples/logic/74_series/Help_74HC32.simu @@ -0,0 +1,30 @@ + + +74HC32-18: + + +Probe-5: + + +Fixed Voltage-4: + + +Fixed Voltage-3: + + +TextComponent-1: + + +Connector-19: + + +Connector-20: + + +Connector-21: + + +PlotterWidget-12: + + + diff --git a/resources/examples/logic/74_series/Help_74HC42.simu b/resources/examples/logic/74_series/Help_74HC42.simu new file mode 100644 index 0000000..00cf52d --- /dev/null +++ b/resources/examples/logic/74_series/Help_74HC42.simu @@ -0,0 +1,96 @@ + + +TextComponent-16: + + +Fixed Voltage-15: + + +Fixed Voltage-14: + + +Probe-13: + + +74HC42-12: + + +Fixed Voltage-11: + + +Fixed Voltage-10: + + +Probe-9: + + +Probe-8: + + +Probe-7: + + +Probe-6: + + +Probe-5: + + +Probe-4: + + +Probe-3: + + +Probe-2: + + +Probe-1: + + +Connector-17: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +Connector-39: + + +Connector-42: + + +Connector-43: + + +PlotterWidget-41: + + + diff --git a/resources/examples/logic/74_series/Help_74HC73.simu b/resources/examples/logic/74_series/Help_74HC73.simu new file mode 100644 index 0000000..c978ddc --- /dev/null +++ b/resources/examples/logic/74_series/Help_74HC73.simu @@ -0,0 +1,48 @@ + + +Fixed Voltage-130: + + +Clock-128: + + +74HC73-125: + + +Fixed Voltage-69: + + +Probe-36: + + +TextComponent-5: + + +Fixed Voltage-3: + + +Probe-1: + + +Connector-126: + + +Connector-127: + + +Connector-129: + + +Connector-131: + + +Connector-132: + + +Connector-133: + + +PlotterWidget-12: + + + diff --git a/resources/examples/logic/74_series/Help_74HC74.simu b/resources/examples/logic/74_series/Help_74HC74.simu new file mode 100644 index 0000000..9645d16 --- /dev/null +++ b/resources/examples/logic/74_series/Help_74HC74.simu @@ -0,0 +1,102 @@ + + +Node-247: + + +TextComponent-233: + + +Node-230: + + +Node-227: + + +Node-224: + + +Node-222: + + +Node-219: + + +SwitchDip-199: + + +Node-175: + + +7-Seg BCD-167: + + +74XX90-142: + + +Clock-128: + + +Connector-149: + + +Connector-168: + + +Connector-176: + + +Connector-218: + + +Connector-220: + + +Connector-221: + + +Connector-177: + + +Connector-180: + + +Connector-215: + + +Connector-178: + + +Connector-179: + + +Connector-225: + + +Connector-226: + + +Connector-228: + + +Connector-229: + + +Connector-231: + + +Connector-232: + + +Connector-190: + + +Connector-248: + + +Connector-223: + + +PlotterWidget-12: + + + diff --git a/resources/examples/logic/74_series/Help_74HC75.simu b/resources/examples/logic/74_series/Help_74HC75.simu new file mode 100644 index 0000000..45baaf4 --- /dev/null +++ b/resources/examples/logic/74_series/Help_74HC75.simu @@ -0,0 +1,36 @@ + + +Probe-40: + + +Probe-38: + + +74HC75-32: + + +Fixed Voltage-9: + + +Fixed Voltage-8: + + +TextComponent-7: + + +Connector-37: + + +Connector-39: + + +Connector-41: + + +Connector-42: + + +PlotterWidget-21: + + + diff --git a/resources/examples/logic/74_series/Help_74HC77.simu b/resources/examples/logic/74_series/Help_74HC77.simu new file mode 100644 index 0000000..2240861 --- /dev/null +++ b/resources/examples/logic/74_series/Help_74HC77.simu @@ -0,0 +1,30 @@ + + +74HC77-17: + + +TextComponent-5: + + +Fixed Voltage-4: + + +Fixed Voltage-3: + + +Probe-1: + + +Connector-21: + + +Connector-33: + + +Connector-34: + + +PlotterWidget-12: + + + diff --git a/resources/examples/logic/74_series/Help_74HC85.simu b/resources/examples/logic/74_series/Help_74HC85.simu new file mode 100644 index 0000000..9d58ae7 --- /dev/null +++ b/resources/examples/logic/74_series/Help_74HC85.simu @@ -0,0 +1,84 @@ + + +Rail-37: + + +Probe-13: + + +Fixed Voltage-12: + + +TextComponent-11: + + +74HC85-10: + + +Probe-9: + + +Probe-8: + + +Fixed Voltage-7: + + +Fixed Voltage-6: + + +Fixed Voltage-5: + + +Fixed Voltage-4: + + +Fixed Voltage-3: + + +Fixed Voltage-2: + + +Fixed Voltage-1: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-38: + + +PlotterWidget-36: + + + diff --git a/resources/examples/logic/74_series/Help_74HC86.simu b/resources/examples/logic/74_series/Help_74HC86.simu new file mode 100644 index 0000000..bb82880 --- /dev/null +++ b/resources/examples/logic/74_series/Help_74HC86.simu @@ -0,0 +1,30 @@ + + +74HC86-13: + + +TextComponent-5: + + +Fixed Voltage-4: + + +Fixed Voltage-3: + + +Probe-1: + + +Connector-14: + + +Connector-15: + + +Connector-16: + + +PlotterWidget-12: + + + diff --git a/resources/examples/logic/74_series/Help_74XX90.simu b/resources/examples/logic/74_series/Help_74XX90.simu new file mode 100644 index 0000000..7c22307 --- /dev/null +++ b/resources/examples/logic/74_series/Help_74XX90.simu @@ -0,0 +1,39 @@ + + +Node-11: + + +Clock-8: + + +7-Seg BCD-2: + + +74XX90-1: + + +Connector-4: + + +Connector-5: + + +Connector-6: + + +Connector-7: + + +Connector-9: + + +Connector-10: + + +Connector-12: + + +PlotterWidget-83: + + + diff --git a/resources/examples/logic/74_series/Help_74XX91.simu b/resources/examples/logic/74_series/Help_74XX91.simu new file mode 100644 index 0000000..1cc8a22 --- /dev/null +++ b/resources/examples/logic/74_series/Help_74XX91.simu @@ -0,0 +1,42 @@ + + +TextComponent-23: + + +Fixed Voltage-20: + + +Fixed Voltage-19: + + +Probe-17: + + +Probe-15: + + +74XX91-13: + + +Clock-8: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-21: + + +Connector-22: + + +PlotterWidget-83: + + + diff --git a/resources/examples/logic/74_series/Help_74XX92.simu b/resources/examples/logic/74_series/Help_74XX92.simu new file mode 100644 index 0000000..32ec66f --- /dev/null +++ b/resources/examples/logic/74_series/Help_74XX92.simu @@ -0,0 +1,54 @@ + + +Node-69: + + +7-Seg BCD-40: + + +74XX92-24: + + +TextComponent-23: + + +Fixed Voltage-20: + + +Fixed Voltage-19: + + +Clock-8: + + +Connector-25: + + +Connector-35: + + +Connector-36: + + +Connector-46: + + +Connector-44: + + +Connector-26: + + +Connector-45: + + +Connector-68: + + +Connector-70: + + +PlotterWidget-83: + + + diff --git a/resources/examples/logic/74_series/Help_74XX93.simu b/resources/examples/logic/74_series/Help_74XX93.simu new file mode 100644 index 0000000..6548127 --- /dev/null +++ b/resources/examples/logic/74_series/Help_74XX93.simu @@ -0,0 +1,54 @@ + + +Node-79: + + +74XX93-71: + + +7-Seg BCD-40: + + +TextComponent-23: + + +Fixed Voltage-20: + + +Fixed Voltage-19: + + +Clock-8: + + +Connector-72: + + +Connector-73: + + +Connector-74: + + +Connector-75: + + +Connector-76: + + +Connector-77: + + +Connector-78: + + +Connector-80: + + +Connector-81: + + +PlotterWidget-83: + + + diff --git a/resources/examples/logic/74_series/Help_74XX96.simu b/resources/examples/logic/74_series/Help_74XX96.simu new file mode 100644 index 0000000..2dddebf --- /dev/null +++ b/resources/examples/logic/74_series/Help_74XX96.simu @@ -0,0 +1,75 @@ + + +Fixed Voltage-22: + + +Clock-10: + + +Fixed Voltage-9: + + +Fixed Voltage-8: + + +TextComponent-7: + + +7-6: + + +Fixed Voltage-5: + + +Fixed Voltage-4: + + +Fixed Voltage-3: + + +74XX96-2: + + +Probe-1: + + +Connector-11: + + +Connector-13: + + +Connector-15: + + +Connector-17: + + +Connector-19: + + +Connector-23: + + +Connector-24: + + +Connector-25: + + +Connector-26: + + +Connector-27: + + +Connector-28: + + +Connector-29: + + +PlotterWidget-21: + + + diff --git a/resources/examples/logic/74_series/Test_74HC04.simu b/resources/examples/logic/74_series/Test_74HC04.simu new file mode 100644 index 0000000..ec19786 --- /dev/null +++ b/resources/examples/logic/74_series/Test_74HC04.simu @@ -0,0 +1,87 @@ + + +Probe-14: + + +Probe-13: + + +Fixed Volt.-12: + + +Fixed Volt.-11: + + +Probe-10: + + +Fixed Volt.-9: + + +Probe-8: + + +Fixed Volt.-7: + + +Probe-6: + + +Fixed Volt.-5: + + +Probe-4: + + +Fixed Volt.-3: + + +Text-2: + + +74HC04-1: + + +Connector-15: + + +Connector-17: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +PlotterWidget-39: + + +SerialPortWidget-40: + + + diff --git a/resources/examples/logic/74_series/Test_74HC08.simu b/resources/examples/logic/74_series/Test_74HC08.simu new file mode 100644 index 0000000..965ddf3 --- /dev/null +++ b/resources/examples/logic/74_series/Test_74HC08.simu @@ -0,0 +1,87 @@ + + +Text-14: + + +Fixed Volt.-13: + + +Fixed Volt.-12: + + +Fixed Volt.-11: + + +Fixed Volt.-10: + + +Probe-9: + + +Probe-8: + + +Fixed Volt.-7: + + +Fixed Volt.-6: + + +Probe-5: + + +Probe-4: + + +Fixed Volt.-3: + + +Fixed Volt.-2: + + +74HC08-1: + + +Connector-15: + + +Connector-17: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +PlotterWidget-39: + + +SerialPortWidget-40: + + + diff --git a/resources/examples/logic/74_series/Test_74HC138.simu b/resources/examples/logic/74_series/Test_74HC138.simu new file mode 100644 index 0000000..4133ddc --- /dev/null +++ b/resources/examples/logic/74_series/Test_74HC138.simu @@ -0,0 +1,207 @@ + + +ResistorDip-22: + + +LedBar-21: + + +Text-20: + + +74HC138-19: + + +Ground (0 V)-18: + + +Node-17: + + +Node-16: + + +Node-15: + + +Node-14: + + +Node-13: + + +Node-12: + + +Node-11: + + +Ground (0 V)-10: + + +Node-9: + + +Switch-8: + + +Switch-7: + + +Switch-6: + + +Node-5: + + +Text-4: + + +Node-3: + + +Rail.-2: + + +Node-1: + + +Connector-23: + + +Connector-25: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-44: + + +Connector-45: + + +Connector-46: + + +Connector-47: + + +Connector-48: + + +Connector-49: + + +Connector-50: + + +Connector-51: + + +Connector-52: + + +Connector-53: + + +Connector-54: + + +Connector-55: + + +Connector-56: + + +Connector-57: + + +Connector-58: + + +Connector-60: + + +Connector-62: + + +Connector-64: + + +Connector-66: + + +Connector-68: + + +Connector-70: + + +Connector-72: + + +Connector-74: + + +Connector-76: + + +Connector-78: + + +Connector-80: + + +Connector-82: + + +Connector-83: + + +Connector-84: + + +Connector-85: + + +Connector-86: + + +Connector-87: + + +Connector-88: + + +PlotterWidget-116: + + +SerialPortWidget-117: + + + diff --git a/resources/examples/logic/74_series/Test_74HC161.simu b/resources/examples/logic/74_series/Test_74HC161.simu new file mode 100644 index 0000000..25620cd --- /dev/null +++ b/resources/examples/logic/74_series/Test_74HC161.simu @@ -0,0 +1,99 @@ + + +Probe-14: + + +Probe-13: + + +Probe-12: + + +Probe-11: + + +Ground (0 V)-10: + + +Node-9: + + +Fixed Volt.-8: + + +Fixed Volt.-7: + + +Fixed Volt.-6: + + +Node-5: + + +Fixed Volt.-4: + + +Fixed Volt.-3: + + +74HC161-2: + + +Node-1: + + +Connector-15: + + +Connector-17: + + +Connector-19: + + +Connector-20: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-26: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +Connector-39: + + +Connector-40: + + +PlotterWidget-41: + + +SerialPortWidget-42: + + + diff --git a/resources/examples/logic/74_series/Test_74HC190.simu b/resources/examples/logic/74_series/Test_74HC190.simu new file mode 100644 index 0000000..e6d2b1a --- /dev/null +++ b/resources/examples/logic/74_series/Test_74HC190.simu @@ -0,0 +1,171 @@ + + +Probe-18: + + +Probe-17: + + +Node-16: + + +Ground (0 V)-15: + + +Node-14: + + +Node-13: + + +Fixed Volt.-12: + + +74HC190-11: + + +Ground (0 V)-10: + + +ResistorDip-9: + + +7 Segment-8: + + +74HC4511-7: + + +Ground (0 V)-6: + + +Rail.-5: + + +Node-4: + + +Fixed Volt.-3: + + +Fixed Volt.-2: + + +Fixed Volt.-1: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +Connector-39: + + +Connector-41: + + +Connector-43: + + +Connector-45: + + +Connector-47: + + +Connector-49: + + +Connector-51: + + +Connector-52: + + +Connector-53: + + +Connector-55: + + +Connector-57: + + +Connector-59: + + +Connector-61: + + +Connector-63: + + +Connector-65: + + +Connector-67: + + +Connector-69: + + +Connector-71: + + +Connector-72: + + +Connector-73: + + +Connector-74: + + +Connector-75: + + +Connector-77: + + +Connector-78: + + +Connector-79: + + +Connector-81: + + +PlotterWidget-83: + + +SerialPortWidget-84: + + + diff --git a/resources/examples/logic/74_series/Test_74HC191.simu b/resources/examples/logic/74_series/Test_74HC191.simu new file mode 100644 index 0000000..eae25b9 --- /dev/null +++ b/resources/examples/logic/74_series/Test_74HC191.simu @@ -0,0 +1,252 @@ + + +Node-41: + + +Text-40: + + +Text-39: + + +Text-38: + + +Text-37: + + +Text-36: + + +Text-35: + + +Text-34: + + +Node-33: + + +Switch-32: + + +Node-31: + + +Node-30: + + +Switch-29: + + +74HC191-28: + + +Clock-27: + + +ResistorDip-26: + + +LedBar-25: + + +Ground (0 V)-24: + + +Ground (0 V)-23: + + +Resistor-22: + + +Ground (0 V)-21: + + +Resistor-20: + + +Resistor-19: + + +Ground (0 V)-18: + + +Fixed Volt.-17: + + +Fixed Volt.-16: + + +Fixed Volt.-15: + + +Fixed Volt.-14: + + +Rail.-13: + + +Push-12: + + +Node-11: + + +Node-10: + + +Node-9: + + +Node-8: + + +Text-7: + + +Text-6: + + +Text-5: + + +Text-4: + + +Capacitor-3: + + +Ground (0 V)-2: + + +Node-1: + + +Connector-42: + + +Connector-44: + + +Connector-46: + + +Connector-48: + + +Connector-50: + + +Connector-51: + + +Connector-52: + + +Connector-54: + + +Connector-56: + + +Connector-57: + + +Connector-58: + + +Connector-59: + + +Connector-61: + + +Connector-63: + + +Connector-64: + + +Connector-65: + + +Connector-66: + + +Connector-68: + + +Connector-70: + + +Connector-71: + + +Connector-72: + + +Connector-74: + + +Connector-76: + + +Connector-78: + + +Connector-79: + + +Connector-80: + + +Connector-81: + + +Connector-82: + + +Connector-83: + + +Connector-84: + + +Connector-85: + + +Connector-86: + + +Connector-88: + + +Connector-90: + + +Connector-92: + + +Connector-94: + + +Connector-96: + + +Connector-98: + + +Connector-100: + + +Connector-102: + + +PlotterWidget-104: + + +SerialPortWidget-105: + + + diff --git a/resources/examples/logic/74_series/Test_74HC191_cascade.simu b/resources/examples/logic/74_series/Test_74HC191_cascade.simu new file mode 100644 index 0000000..b09ae6e --- /dev/null +++ b/resources/examples/logic/74_series/Test_74HC191_cascade.simu @@ -0,0 +1,372 @@ + + +Node-54: + + +Ground-53: + + +Ground (0 V)-52: + + +Node-51: + + +Capacitor-50: + + +Node-49: + + +Node-48: + + +Node-47: + + +Node-46: + + +Node-45: + + +Fixed Volt.-44: + + +Fixed Volt.-43: + + +Fixed Volt.-42: + + +Fixed Volt.-41: + + +74HC191-40: + + +Text-39: + + +Text-38: + + +Text-37: + + +Text-36: + + +Text-35: + + +Text-34: + + +Text-33: + + +Node-32: + + +Switch-31: + + +Node-30: + + +Node-29: + + +Switch-28: + + +74HC191-27: + + +Clock-26: + + +ResistorDip-25: + + +LedBar-24: + + +Ground (0 V)-23: + + +Resistor-22: + + +Ground (0 V)-21: + + +Resistor-20: + + +Resistor-19: + + +Ground (0 V)-18: + + +Fixed Volt.-17: + + +Fixed Volt.-16: + + +Fixed Volt.-15: + + +Fixed Volt.-14: + + +Rail.-13: + + +Push-12: + + +Node-11: + + +Node-10: + + +Node-9: + + +Text-8: + + +Text-7: + + +Text-6: + + +Text-5: + + +Node-4: + + +Text-3: + + +Node-2: + + +Node-1: + + +Connector-55: + + +Connector-57: + + +Connector-59: + + +Connector-61: + + +Connector-63: + + +Connector-65: + + +Connector-67: + + +Connector-69: + + +Connector-71: + + +Connector-73: + + +Connector-75: + + +Connector-77: + + +Connector-79: + + +Connector-80: + + +Connector-81: + + +Connector-83: + + +Connector-85: + + +Connector-87: + + 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+SerialPortWidget-158: + + + diff --git a/resources/examples/logic/74_series/Test_74HC192.simu b/resources/examples/logic/74_series/Test_74HC192.simu new file mode 100644 index 0000000..df28c3c --- /dev/null +++ b/resources/examples/logic/74_series/Test_74HC192.simu @@ -0,0 +1,318 @@ + + +74HC192-31: + + +Ground (0 V)-30: + + +ResistorDip-29: + + +7 Segment-28: + + +74HC4511-27: + + +Ground (0 V)-26: + + +ResistorDip-25: + + +7 Segment-24: + + +74HC4511-23: + + +Ground (0 V)-22: + + +74HC192-21: + + +Ground (0 V)-20: + + +Fixed Volt.-19: + + +Fixed Volt.-18: + + +Fixed Volt.-17: + + +Node-16: + + +Fixed Volt.-15: + + +Rail.-14: + + +Node-13: + + +Rail.-12: + + +Node-11: + + +Node-10: + + +Ground (0 V)-9: + + +Node-8: + + +Fixed Volt.-7: + + +Node-6: + + +Node-5: + + +Node-4: + + +Node-3: + + +Node-2: + + +Node-1: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-44: + + +Connector-46: + + +Connector-48: + + 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+ +Connector-35: + + +Connector-37: + + +Connector-39: + + +PlotterWidget-41: + + +SerialPortWidget-42: + + + diff --git a/resources/examples/logic/74_series/Test_74HC273.simu b/resources/examples/logic/74_series/Test_74HC273.simu new file mode 100644 index 0000000..f7a0770 --- /dev/null +++ b/resources/examples/logic/74_series/Test_74HC273.simu @@ -0,0 +1,171 @@ + + +Ground (0 V)-29: + + +Node-28: + + +Capacitor-27: + + +Node-26: + + +Switch-25: + + +Rail.-24: + + +Ground (0 V)-23: + + +Resistor-22: + + +74HC273-21: + + +Fixed Volt.-20: + + +Probe-19: + + +Fixed Volt.-18: + + +Probe-17: + + +Fixed Volt.-16: + + +Probe-15: + + +Fixed Volt.-14: + + +Probe-13: + + +Fixed Volt.-12: + + +Fixed Volt.-11: + + +Fixed Volt.-10: + + +Fixed Volt.-9: + + +Fixed Volt.-8: + + +Probe-7: + + +Probe-6: + + +Probe-5: + + +Probe-4: + + +Text-3: + + +Text-2: + + +Text-1: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-42: + 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+ + +Connector-57: + + +Connector-59: + + +Connector-61: + + +Connector-63: + + +Connector-64: + + +Connector-65: + + +Connector-67: + + +Connector-71: + + +Connector-73: + + +Connector-75: + + +Connector-77: + + +Connector-79: + + +Connector-81: + + +Connector-83: + + +Connector-85: + + +Connector-87: + + +Connector-89: + + +Connector-91: + + +Connector-93: + + +Connector-95: + + +Connector-97: + + +Connector-101: + + +Connector-103: + + +Connector-105: + + +Connector-107: + + +Connector-108: + + +Connector-109: + + +Connector-111: + + +Connector-112: + + +Connector-113: + + +Connector-114: + + +Connector-115: + + +Connector-116: + + +Connector-118: + + +Connector-119: + + +Connector-120: + + +Connector-121: + + +Connector-30: + + +Connector-26: + + +Connector-28: + + +PlotterWidget-122: + + +SerialPortWidget-123: + + + diff --git a/resources/examples/logic/74_series/Test_74HC393.simu b/resources/examples/logic/74_series/Test_74HC393.simu new file mode 100644 index 0000000..789548f --- /dev/null +++ b/resources/examples/logic/74_series/Test_74HC393.simu @@ -0,0 +1,54 @@ + + +7 Seg BCD-7: + + +7 Seg BCD-5: + + +Clock-4: + + +Fixed Volt.-2: + + +74HC393-1: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-8: + + +Connector-21: + + +PlotterWidget-32: + + +SerialPortWidget-33: + + + diff --git a/resources/examples/logic/74_series/Test_74HC4017.simu b/resources/examples/logic/74_series/Test_74HC4017.simu new file mode 100644 index 0000000..472ee3c --- /dev/null +++ b/resources/examples/logic/74_series/Test_74HC4017.simu @@ -0,0 +1,363 @@ + + +Node-45: + + +Node-44: + + +Node-43: + + +Node-42: + + +Node-41: + + +Node-40: + + +Node-39: + + +Node-38: + + +Node-37: + + +Node-36: + + +Tierra-35: + + +Fixed Volt.-34: + + +Clock-33: + + +Ground (0 V)-32: + + +Led-31: + + +Node-30: + + +Node-29: + + +Node-28: + + +Node-27: + + +Node-26: + + +Node-25: + + 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--- /dev/null +++ b/resources/examples/logic/74_series/Test_74HC4020.simu @@ -0,0 +1,45 @@ + + +7 Seg BCD-5: + + +Probe-4: + + +Fixed Volt.-3: + + +Clock-2: + + +74HC4020-1: + + +Connector-6: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +PlotterWidget-20: + + +SerialPortWidget-21: + + + diff --git a/resources/examples/logic/74_series/Test_74HC4022.simu b/resources/examples/logic/74_series/Test_74HC4022.simu new file mode 100644 index 0000000..919e159 --- /dev/null +++ b/resources/examples/logic/74_series/Test_74HC4022.simu @@ -0,0 +1,63 @@ + + +LedBar-6: + + +74HC4022-5: + + +Rail.-4: + + +Ground (0 V)-3: + + +Clock-2: + + +Probe-1: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +Connector-15: + + +Connector-17: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-29: + + +PlotterWidget-31: + + +SerialPortWidget-32: + + + diff --git a/resources/examples/logic/74_series/Test_74HC4024.simu b/resources/examples/logic/74_series/Test_74HC4024.simu new file mode 100644 index 0000000..fb82569 --- /dev/null +++ b/resources/examples/logic/74_series/Test_74HC4024.simu @@ -0,0 +1,57 @@ + + +Ground (0 V)-6: + + +7 Seg BCD-5: + + +7 Seg BCD-4: + + +Fixed Volt.-3: + + +Clock-2: + + +74HC4024-1: + + +Connector-7: + + +Connector-9: + + +Connector-11: + + +Connector-13: + + +Connector-15: + + +Connector-17: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +PlotterWidget-27: + + +SerialPortWidget-28: + + + diff --git a/resources/examples/logic/74_series/Test_74HC4511+74HC147.simu b/resources/examples/logic/74_series/Test_74HC4511+74HC147.simu new file mode 100644 index 0000000..3423b83 --- /dev/null +++ b/resources/examples/logic/74_series/Test_74HC4511+74HC147.simu @@ -0,0 +1,456 @@ + + +Node-58: + + +Node-57: + + +Ground (0 V)-56: + + +Node-55: + + +74HC4511-54: + + +74HC147-53: + + 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+ +Ground (0 V)-14: + + +Node-13: + + +Node-12: + + +Clock-11: + + +Rail.-10: + + +ResistorDip-9: + + +Node-8: + + +Ground (0 V)-7: + + +7 Segment-6: + + +74HC4511-5: + + +Ground (0 V)-4: + + +Fixed Volt.-3: + + +Node-2: + + +Node-1: + + +Connector-22: + + +Connector-24: + + +Connector-26: + + +Connector-28: + + +Connector-30: + + +Connector-32: + + +Connector-34: + + +Connector-36: + + +Connector-38: + + +Connector-40: + + +Connector-42: + + +Connector-44: + + +Connector-46: + + +Connector-48: + + +Connector-50: + + +Connector-52: + + +Connector-54: + + +Connector-55: + + +Connector-57: + + +Connector-59: + + +Connector-61: + + +Connector-62: + + +Connector-63: + + +Connector-65: + + +Connector-67: + + +Connector-69: + + +Connector-71: + + +Connector-73: + + +Connector-74: + + +Connector-76: + + +Connector-78: + + +Connector-80: + + +Connector-82: + + +Connector-84: + + +Connector-86: + + +Connector-88: + + +Connector-90: + + +Connector-91: + + +Connector-93: + + +Connector-95: + + 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Volt.-8: + + +Probe-7: + + +Fixed Volt.-6: + + +Fixed Volt.-5: + + +Probe-4: + + +Fixed Volt.-3: + + +Fixed Volt.-2: + + +74HC86-1: + + +Connector-19: + + +Connector-21: + + +Connector-23: + + +Connector-25: + + +Connector-27: + + +Connector-29: + + +Connector-31: + + +Connector-33: + + +Connector-35: + + +Connector-37: + + +Connector-39: + + +Connector-41: + + +PlotterWidget-116: + + +SerialPortWidget-117: + + + diff --git a/resources/examples/logic/74_series/Test_74XX90.simu b/resources/examples/logic/74_series/Test_74XX90.simu new file mode 100644 index 0000000..aeaa141 --- /dev/null +++ b/resources/examples/logic/74_series/Test_74XX90.simu @@ -0,0 +1,276 @@ + + +Text-38: + + +Node-37: + + +Node-36: + + +FlipFlop JK-35: + + +And Gate-34: + + +FlipFlop JK-33: + + +FlipFlop JK-32: + + +FlipFlop JK-31: + + +Node-30: + + +Fixed Volt.-29: + + +Fixed Volt.-28: + + +Node-27: + + +And Gate-26: + + +Node-25: + + +And Gate-24: + + +Node-23: + + +Probe-22: + + +Node-21: + + +Probe-20: + + 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b/resources/examples/logic/74_series/Test_74hC4040.simu new file mode 100644 index 0000000..63805e2 --- /dev/null +++ b/resources/examples/logic/74_series/Test_74hC4040.simu @@ -0,0 +1,48 @@ + + +Probe-7: + + +Probe-6: + + +Probe-5: + + +Probe-4: + + +Fixed Volt.-3: + + +Clock-2: + + +74HC4040-1: + + +Connector-8: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +PlotterWidget-20: + + +SerialPortWidget-21: + + + diff --git a/resources/examples/logic/74_series/Test_75HC595.simu b/resources/examples/logic/74_series/Test_75HC595.simu new file mode 100644 index 0000000..d3cf84a --- /dev/null +++ b/resources/examples/logic/74_series/Test_75HC595.simu @@ -0,0 +1,213 @@ + + +Probe-31: + + +Fixed Volt.-30: + + +Fixed Volt.-29: + + +Fixed Volt.-28: + + +Fixed Volt.-27: + + +Fixed Volt.-26: + + +74HC595-25: + + +Led-24: + + +Led-23: + + +Led-22: + + +Led-21: + + +Led-20: + + +Led-19: + + +Led-18: + + +Led-17: + + +Resistor-16: + + +Resistor-15: + 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a/resources/examples/logic/74_series/Text_74XX92.simu b/resources/examples/logic/74_series/Text_74XX92.simu new file mode 100644 index 0000000..4e1db67 --- /dev/null +++ b/resources/examples/logic/74_series/Text_74XX92.simu @@ -0,0 +1,60 @@ + + +Probe-9: + + +Probe-8: + + +Probe-7: + + +Probe-6: + + +Fixed Volt.-5: + + +Fixed Volt.-4: + + +74XX92-3: + + +Fixed Volt.-2: + + +Fixed Volt.-1: + + +Connector-10: + + +Connector-12: + + +Connector-14: + + +Connector-16: + + +Connector-18: + + +Connector-20: + + +Connector-22: + + +Connector-24: + + +PlotterWidget-38: + + +SerialPortWidget-39: + + + diff --git a/resources/examples/logic/74_series/shift595-test.simu b/resources/examples/logic/74_series/shift595-test.simu new file mode 100644 index 0000000..d3cf84a --- /dev/null +++ b/resources/examples/logic/74_series/shift595-test.simu @@ -0,0 +1,213 @@ + + +Probe-31: + + +Fixed Volt.-30: + + +Fixed Volt.-29: + + +Fixed Volt.-28: + + +Fixed Volt.-27: + + +Fixed Volt.-26: + + +74HC595-25: + + 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a/resources/examples/logic/Simple Calculator Display - 8 digit display with buttons 0-9, backspace and clear.simu b/resources/examples/logic/Simple Calculator Display - 8 digit display with buttons 0-9, backspace and clear.simu new file mode 100644 index 0000000..ce03071 --- /dev/null +++ b/resources/examples/logic/Simple Calculator Display - 8 digit display with buttons 0-9, backspace and clear.simu @@ -0,0 +1,1656 @@ + + +Out Bus-191: + + +In Bus-190: + + +In Bus-189: + + +Out Bus-188: + + +Node-187: + + +Out Bus-186: + + +Node-185: + + +Out Bus-184: + + +In Bus-183: + + +In Bus-182: + + +In Bus-181: + + +In Bus-180: + + +Node-179: + + +Out Bus-178: + + +Out Bus-177: + + +In Bus-176: + + +In Bus-175: + + +Node-174: + + +Out Bus-173: + + +Out Bus-172: + + +In Bus-171: + + +Out Bus-170: + + +Node-169: + + +Out Bus-168: + + +In Bus-167: + + +Node-166: + + +In Bus-165: + + +Node-164: + + +In Bus-163: + + +Node-162: + + +In Bus-161: + + +Node-160: + + +In Bus-159: + + +Node-158: + + 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zmt=|lh7thcFR2wMZM*^VdWGJUIF~ZdwQArjF$|EAb82zqda_lfp_u6Kzu`$xNMwJp zuYblk0^v#h%3e|PPV(mMMtws6d;7csEM{AtT&5)|!}GeFe6&l%;OHPTa*>cZihDSw zh5=ZBu}*oeFNvgjY>#H5ufBen;}aD0&y)9TX!s3e2tRtIZcLU%$B?d4TKuYRJjtOC zwB2txxHSIO!gbapAjSMysq;E5#hj3CCWsj1gyjBFMyn&{9rF}dVmV&0EUs>;lX_a% zgOM!jENNwl*N=>ng~(r5=lV|+72DtNs_e{b?_vONpii%FTx-YF-&c-oxB$*bvCmo| zxt3@sw>)khw5XdgO8$v>SH4r4S9X%?5W>hWCu%kiBpxhODHBjcIZIQY zcBh&K_G*^tXa+ON0b@XdnK_pkf|=(PrbE$jehzkuW(+h`C^0%(vgJesWQhRqbH?Ju zDwP68!iENwKe83+Gy*rzPO&=?`cy|y|29N z4>MzAf+ik^yUt)yOL=@BSJ;(*s0fD&mk%2BO_6Je4ptVY42J@)0SyMDY?b^ku`|Chi_6k_ms zDMBJ2QIk2bIC(ZP_I~9!(3x`~N^Q1HRcV$l3<*!bwAwW*XQv~dwG8?ZMVbol_DO_c z2}(b<5g{yg7A|7LQwd@V(tUa>%nOu3T0We>Jkh6+5iFPEQ%7cuJ|5r#eHUc;1wM6v zBLojfX`zVY-G#7wXDr*bAS@#yW8$t7l20vXlQsyx`%jSWCW_D=@q&OqSxH5SYH_2W F{{ZiJVoU%4 literal 0 HcmV?d00001 diff --git a/resources/readme b/resources/readme new file mode 100644 index 0000000..93ad5db --- /dev/null +++ b/resources/readme @@ -0,0 +1,6 @@ + +Edit SimulIDE.desktop in this folder. + +Set the proper path to SimulIDE_0.3.10 folder. + +Then you can copy it to your desktop or any other place to lauch SimulIDE. diff --git a/resources/simulide.desktop b/resources/simulide.desktop new file mode 100644 index 0000000..56ac90e --- /dev/null +++ b/resources/simulide.desktop @@ -0,0 +1,10 @@ + [Desktop Entry] +Version=0.3.10 +Name=SimulIDE +GenericName=SimulIDE +Comment=Electronic Circuit Simulator Software +Exec=/home/user/SimulIDE_0.3.10/bin/simulide +Icon=/home/user/SimulIDE_0.3.10/share/icons/hicolor/256x256/simulide.png +Terminal=false +Type=Application +Categories=Electronics;EDA; diff --git a/resources/translations/simulide.ts b/resources/translations/simulide.ts new file mode 100644 index 0000000..a8cff51 --- /dev/null +++ b/resources/translations/simulide.ts @@ -0,0 +1,2514 @@ + + + + + ADC + + ADC + + + + Logic/Other Logic + + + + + AVRComponent + + AVR + AVR + + + Micro + + + + Error + + + + Only 1 Mcu allowed + to be in the Circuit. + + + + + AVRComponentPin + + Register descriptor file for this AVR processor %1 is corrupted - cannot attach pin + + + + Register descriptor file for this AVR processor %1 is corrupted - cannot attach pin + + + + + Pin is not initialized properly: + + + + + Amperimeter + + Amperimeter + + + + Meters + + + + + AndGate + + And Gate + + + + Logic/Gates + + + + + App::Property + + Speed + + + + ReactStep + + + + NoLinStep + + + + NoLinAcc + + + + Draw Grid + + + + Show ScrollBars + + + + id + + + + Show id + + + + Unit + + + + Color + + + + H size + + + + V size + + + + Border + + + + Opacity + + + + Z Value + + + + Vref + + + + Impedance + + + + Max Value + + + + Gain + + + + PNP + + + + Capacitance + + + + Show_Cap + + + + Freq + + + + Current + + + + Show Amp + + + + Threshold + + + + Zener Volt + + + + Cols + + + + Rows + + + + Control Code + + + + Size bytes + + + + Inductance + + + + Show Ind + + + + Key Labels + + + + CS Active Low + + + + MaxCurrent + + + + Grounded + + + + Input High V + + + + Input Low V + + + + Input Imped + + + + Out High V + + + + Out Low V + + + + Out Imped + + + + Inverted + + + + Tristate + + + + Clock Inverted + + + + Reset Inverted + + + + Invert Inputs + + + + S R Inverted + + + + Num Inputs + + + + Num Bits + + + + Channels + + + + Voltage + + + + Show Volt + + + + Program + + + + RDSon + + + + P Channel + + + + Depletion + + + + Power Pins + + + + Filter + + + + Value Ohm + + + + PlotterCh + + + + Rcoil + + + + Itrig + + + + Poles + + + + DT + + + + Norm Close + + + + Resistance + + + + Show res + + + + NumDisplays + + + + CommonCathode + + + + Steps + + + + Text + + + + Font Size + + + + Fixed Width + + + + Margin + + + + Volts + + + + Volt Base + + + + Duty Square + + + + Quality + + + + Wave Type + + + + Avra Inc Path + + + + Drive Circuit + + + + Compiler Path + + + + Tab Size + + + + Spaces Tabs + + + + Show Spaces + + + + Board + + + + Custom Board + + + + Num Outputs + + + + Functions + + + + Width + + + + Height + + + + + Arduino + + Arduino + + + + Micro + + + + Error + + + + Only 1 Mcu allowed + to be in the Circuit. + + + + + AudioOut + + Audio Out + + + + Outputs + + + + + AvrProcessor + + File Not Found + + + + The file "%1" was not found. + + + + Error: + + + + Unable to load IHEX file %1 + + + + + Failed to load firmware: + + + + %1 should be .hex or .elf + + + + + Warning on load firmware: + + + + Incompatible firmware: compiled for %1 and your processor is %2 + + + + + The processor model is not specified. + + + + + Could not Create AVR Processor: "%1" + + + + Wrong firmware!! + + + + Unkown Error: + + + + File %1 is not in valid ELF format + + + + + + B16AsmDebugger + + Cannot write file %1: +%2. + + + + + BJT + + BJT + + + + Active + + + + + BaseDebugger + + Debugger already running + + + + Stop active session + + + + Uploading: + + + + FirmWare Uploaded to + + + + Select Compiler toolchain directory + + + + Using Compiler Path: + + + + : ToolChain not found + + + + Right-Click on Document Tab to set Path + + + + Error: No Mcu in Simulator... + + + + + BcdTo7S + + Bcd To 7S. + + + + Logic/Converters + + + + + BcdToDec + + Bcd To Dec. + + + + Logic/Converters + + + + + BinCounter + + Counter + + + + Logic/Arithmetic + + + + + Buffer + + Buffer + + + + Logic/Gates + + + + + Bus + + Bus + + + + Logic/Other Logic + + + + + Capacitor + + Capacitor + + + + Passive + + + + + Chip + + Cannot read file: +%1: +%2. + + + + Cannot set file: +%1 +to DomDocument + + + + Error reading Chip file: +%1 +No valid Chip + + + + + Circuit + + Load Circuit + + + + Circuits (*.simu);;All files (*.*) + + + + Cannot read file %1: +%2. + + + + Cannot set file %1 +to DomDocument + + + + Cannot write file %1: +%2. + + + + Bill Of Materials + + + + Create Subcircuit + + + + 2 Package Pins connected together + + + + + CircuitView + + Paste + + + + Undo + + + + Redo + + + + Import Circuit + + + + Save Circuit as Image + + + + Create SubCircuit + + + + Bill of Materials + + + + Save as Image + + + + Circuit Name + + + + Generated by SimulIDE + + + + Time: + + + + + CircuitWidget + + New C&ircuit Ctrl+N + + + + Create a new Circuit + + + + &Open Circuit Ctrl+O + + + + Open an existing Circuit + + + + &Save Circuit Ctrl+S + + + + Save the Circuit to disk + + + + Save Circuit &As... Ctrl+Shift+S + + + + Save the Circuit under a new name + + + + Power Circuit + + + + Power the Circuit + + + + Online Help + + + + +Circuit has been modified. +Do you want to save your changes? + + + + + New Circuit + + + + Load Circuit + + + + Circuits (*.simu);;All files (*.*) + + + + Save Circuit + + + + Circuit ERROR!!! + + + + About SimulIDE + + + + About Qt + + + + Real Speed: Debugger + + + + Real Speed: + + + + Info + + + + + Clock + + Clock + + + + Sources + + + + + CodeEditor + + File: + + + + File recognized as: + + + + File type not supported + + + + SUCCESS!!! Compilation Ok + + + + ERROR!!! Compilation Faliled + + + + Uploading: + + + + +Error: Mcu Deleted while Debugging!! + + + + + Starting Debbuger... + + + + Error: No Mcu in Simulator... + + + + Error: No Debugger Suited for this File... + + + + Error: No File... + + + + Error Compiling... + + + + Error Loading Firmware... + + + + Debbuger Started + + + + Debbuger Stopped + + + + + CodeEditorWidget + + Ready + + + + + ColorCombo + + Custom + + + + + Component + + Copy + + + + Remove + + + + Properties + + + + Rotate CW + + + + Rotate CCW + + + + Rotate 180 + + + + Horizontal Flip + + + + Vertical Flip + + + + + ComponentPlugins + + Manage Components + + + + + ComponentSelector + + Loading Component sets at: + + + + Cannot read file %1: +%2. + + + + Cannot set file %1 +to DomDocument + + + + Loaded Component set: + + + + Manage Components + + + + + ConnectorLine + + Remove + + + + + CurrSource + + Current Source + + + + Sources + + + + + DAC + + DAC + + + + Logic/Other Logic + + + + + DecToBcd + + Dec. To Bcd + + + + Logic/Converters + + + + + Demux + + Demux + + + + Logic/Converters + + + + + Diode + + Diode + + + + Active + + + + + EditDialog + + Pin Name: + + + + Pin Id: + + + + Invert Pin + + + + Unused Pin + + + + Edit Pin + + + + + EditorWindow + + Load File + + + + Save Document As + + + + Cannot write file %1: +%2. + + + + +The Document has been modified. +Do you want to save your changes? + + + + + set Compiler Path + + + + &New Ctrl+N + + + + Create a new file + + + + &Open... Ctrl+O + + + + Open an existing file + + + + &Save Ctrl+S + + + + Save the document to disk + + + + Save &As... Ctrl+Shift+S + + + + Save the document under a new name + + + + E&xit + + + + Exit the application + + + + Cu&t Ctrl+X + + + + Cut the current selection's contents to the clipboard + + + + &Copy Ctrl+C + + + + Copy the current selection's contents to the clipboard + + + + &Paste Ctrl+V + + + + Paste the clipboard's contents into the current selection + + + + Undo Ctrl+Z + + + + Undo the last action + + + + Redo Ctrl+Shift+Z + + + + Redo the last action + + + + Run To Breakpoint + + + + Run to next breakpoint + + + + Step + + + + Step debugger + + + + StepOver + + + + Step Over + + + + Pause + + + + Pause debugger + + + + Reset + + + + Reset debugger + + + + Stop Debugger + + + + Stop debugger + + + + Compile + + + + Compile Source + + + + UpLoad + + + + Load Firmware + + + + Find Replace + + + + Debug + + + + Start Debugger + + + + All files (*);;Arduino (*.ino);;Asm (*.asm);;GcBasic (*.gcb) + + + + All files + + + + + Ellipse + + Ellipse + + + + Other + + + + + FileBrowser + + Add Bookmark + + + + Open in editor + + + + Show Hidden + + + + + FileWidget + + cd Up + + + + Remove Bookmark + + + + + FindReplaceDialog + + Find/Replace + + + + + FindReplaceForm + + no match found + + + + Replaced %1 occurrence(s) + + + + Find/Replace + + + + &Find: + + + + R&eplace with: + + + + Error + + + + D&irection + + + + &Down + + + + &Up + + + + &Options + + + + &Case sensitive + + + + &Whole words only + + + + R&egular Expression + + + + &Find + + + + &Close + + + + &Replace + + + + Replace &All + + + + + FlipFlopD + + FlipFlop D + + + + Logic/Memory + + + + + FlipFlopJK + + FlipFlop JK + + + + Logic/Memory + + + + + Frequencimeter + + Frequencimeter + + + + Meters + + + + + FullAdder + + Full Adder + + + + Logic/Arithmetic + + + + + Function + + Function + + + + Logic/Arithmetic + + + + Set Function + + + + Function: + + + + + Ground + + Ground (0 V) + + + + Sources + + + + + Hd44780 + + Hd44780 + + + + Outputs + + + + + I2CRam + + I2C Ram + + + + Logic/Memory + + + + Load data + + + + Save data + + + + + I2CToParallel + + I2C to Parallel + + + + Logic/Converters + + + + + Inductor + + Inductor + + + + Passive + + + + + InoDebugger + + Cannot write file %1: +%2. + + + + + ItemLibrary + + Gates + + + + Logic + + + + Arithmetic + + + + Memory + + + + Converters + + + + Other Logic + + + + Sensors + + + + Micro + + + + + KeyPad + + KeyPad + + + + Switches + + + + + Ks0108 + + Ks0108 + + + + Outputs + + + + + LatchD + + Latch + + + + Logic/Memory + + + + + Led + + Led + + + + Outputs + + + + + LedBar + + LedBar + + + + Outputs + + + + + LedMatrix + + LedMatrix + + + + Outputs + + + + + Line + + Line + + + + Other + + + + + LineNumberArea + + Add BreakPoint + + + + Remove BreakPoint + + + + + Lm555 + + lm555 + + + + Logic/Other Logic + + + + + LogicInput + + Fixed Volt. + + + + Sources + + + + + MainWindow + + Components + + + + RamTable + + + + Properties + + + + File explorer + + + + Qt5SerialPort is not installed in your system + + Mcu SerialPort will not work + Just Install libQt5SerialPort package + To have Mcu Serial Port Working + + + + Plugin Error: + + + + + McuComponent + + Cannot read file %1: +%2. + + + + Cannot set file %1 +to DomDocument + + + + Load firmware + + + + Reload firmware + + + + Open Serial Monitor. + + + + Close Serial Monitor + + + + Open Serial Port. + + + + Close Serial Port + + + + Load Firmware + + + + No File: + + + + No File to reload + + + + Load EEPROM data + + + + Save EEPROM data + + + + Hex Files (*.hex);;ELF Files (*.elf);;All files (*.*) + + + + + MemData + + Load Data + + + + All files (*.*) + + + + Save Data + + + + Cannot write file %1: +%2. + + + + + Memory + + Ram/Rom + + + + Logic/Memory + + + + Load data + + + + Save data + + + + + Mosfet + + Mosfet + + + + Active + + + + + Mux + + Mux + + + + Logic/Converters + + + + + MuxAnalog + + Analog Mux + + + + Active + + + + + OpAmp + + OpAmp + + + + Active + + + + + OrGate + + Or Gate + + + + Logic/Gates + + + + + Oscope + + Oscope + + + + Meters + + + + + PICComponent + + Micro + + + + Error + + + + Only 1 Mcu allowed + to be in the Circuit. + + + + + Pcd8544 + + Pcd8544 + + + + Outputs + + + + + PicProcessor + + File Not Found + + + + The file "%1" was not found. + + + + Unkown Error: + + + + Could not Create Pic Processor: "%1" + + + + Could not Load: "%1" + + + + + PlotterWidget + + Max + + + + Min + + + + Scale: + + + + Tracks: + + + + + Potentiometer + + Potentiometer + + + + Passive + + + + + Probe + + Probe + + + + Meters + + + + Remove from Plotter + + + + Plotter Channel + + + + Channel 1 + + + + Channel 2 + + + + Channel 3 + + + + Channel 4 + + + + + PropertiesWidget + + Here will be some help .............................................. + + + + + + Push + + Push + + + + Switches + + + + + QPropertyModel + + Name + + + + Value + + + + + Rail + + Rail. + + + + Sources + + + + + RamTable + + Reg. + + + + Dec + + + + Load VarSet + + + + Save VarSet + + + + VarSets (*.vst);;All files (*.*) + + + + Cannot write file %1: +%2. + + + + Clear Selected + + + + Clear Table + + + + Load Variables + + + + Type + + + + Value + + + + + Rectangle + + Rectangle + + + + Other + + + + + RelaySPST + + Relay (all) + + + + Switches + + + + + Resistor + + Resistor + + + + Passive + + + + + ResistorDip + + ResistorDip + + + + Passive + + + + + SR04 + + HC-SR04 + + + + Sensors + + + + + SerialPortWidget + + N/A + + + + Description: %1 + + + + Manufacturer: %1 + + + + Serial number: %1 + + + + Connected to %1 : %2, %3, %4, %5, %6 + + + + Error + + + + Custom + + + + None + + + + Even + + + + Odd + + + + Mark + + + + Space + + + + Settings + + + + Manufacturer: + + + + Serial number: + + + + Description: + + + + Open + + + + Close + + + + Parity: + + + + Flow control: + + + + Stop bits: + + + + BaudRate: + + + + Data bits: + + + + + Servo + + Servo + + + + Outputs + + + + + SevenSegment + + 7 Segment + + + + Outputs + + + + + SevenSegmentBCD + + 7 Seg BCD + + + + Logic/Other Logic + + + + + ShiftReg + + Shift Reg. + + + + Logic/Arithmetic + + + + + Stepper + + Stepper + + + + Outputs + + + + + SubCircuit + + Subcircuit + + + + Cannot read file %1: +%2. + + + + Cannot set file %1 +to DomDocument + + + + Error reading Subcircuit file: %1 + + + + + There are no data files for + + + + + SubPackage + + Package + + + + +Package has been modified. +Do you want to save your changes? + + + + + Move Pin + + + + Delete Pin + + + + Load Package + + + + Save Package + + + + Load Package File + + + + Packages (*.package);;All files (*.*) + + + + Cannot write file %1: +%2. + + + + Other + + + + Edit Pin + + + + + Switch + + Switches + + + + Switch (all) + + + + + SwitchDip + + Switches + + + + Switch Dip + + + + + TerminalWidget + + Send Text: + + + + Send Value: + + + + Print: + + + + Value + + + + Received From Micro: + + + + Sent to Micro: + + + + CR + + + + Clear + + + + + TextComponent + + Text + + + + Other + + + + + VoltReg + + Volt. Regulator + + + + Active + + + + + VoltSource + + Volt. Source + + + + Sources + + + + + Voltimeter + + Voltimeter + + + + Meters + + + + + WaveGen + + Wave Gen. + + + + Sources + + + + + XorGate + + Xor Gate + + + + Logic/Gates + + + + + elCapacitor + + Electrolytic Capacitor + + + + Passive + + + + + xmlfile + + Logic + + + + diff --git a/resources/translations/simulide_en.ts b/resources/translations/simulide_en.ts new file mode 100644 index 0000000..b31f94d --- /dev/null +++ b/resources/translations/simulide_en.ts @@ -0,0 +1,2522 @@ + + + + + ADC + + ADC + + + + Logic/Other Logic + + + + + AVRComponent + + AVR + AVR + + + Micro + + + + Error + + + + Only 1 Mcu allowed + to be in the Circuit. + + + + + AVRComponentPin + + Register descriptor file for this AVR processor %1 is corrupted - cannot attach pin + + + + Register descriptor file for this AVR processor %1 is corrupted - cannot attach pin + + + + + Pin is not initialized properly: + + + + + Amperimeter + + Amperimeter + + + + Meters + + + + + AndGate + + And Gate + + + + Logic/Gates + + + + + App::Property + + Speed + + + + ReactStep + + + + NoLinStep + + + + NoLinAcc + + + + Draw Grid + + + + Show ScrollBars + + + + id + + + + Show id + + + + Unit + + + + Color + + + + H size + + + + V size + + + + Border + + + + Opacity + + + + Z Value + + + + Vref + + + + Impedance + + + + Max Value + + + + Gain + + + + PNP + + + + Capacitance + + + + Show_Cap + + + + Freq + + + + Current + + + + Show Amp + + + + Threshold + + + + Zener Volt + + + + Cols + + + + Rows + + + + Control Code + + + + Size bytes + + + + Inductance + + + + Show Ind + + + + Key Labels + + + + CS Active Low + + + + MaxCurrent + + + + Grounded + + + + Input High V + + + + Input Low V + + + + Input Imped + + + + Out High V + + + + Out Low V + + + + Out Imped + + + + Inverted + + + + Tristate + + + + Clock Inverted + + + + Reset Inverted + + + + Invert Inputs + + + + S R Inverted + + + + Num Inputs + + + + Num Bits + + + + Channels + + + + Voltage + + + + Show Volt + + + + Program + + + + RDSon + + + + P Channel + + + + Depletion + + + + Power Pins + + + + Filter + + + + Value Ohm + + + + PlotterCh + + + + Rcoil + + + + Itrig + + + + Poles + + + + DT + + + + Norm Close + + + + Resistance + + + + Show res + + + + NumDisplays + + + + CommonCathode + + + + Steps + + + + Text + + + + Font Size + + + + Fixed Width + + + + Margin + + + + Volts + + + + Volt Base + + + + Duty Square + + + + Quality + + + + Wave Type + + + + Avra Inc Path + + + + Drive Circuit + + + + Compiler Path + + + + Tab Size + + + + Spaces Tabs + + + + Show Spaces + + + + Board + + + + Custom Board + + + + Num Outputs + + + + Functions + + + + Width + + + + Height + + + + + Arduino + + Arduino + + + + Micro + + + + Error + + + + Only 1 Mcu allowed + to be in the Circuit. + + + + + AudioOut + + Audio Out + + + + Outputs + + + + + AvrProcessor + + File Not Found + + + + The file "%1" was not found. + + + + Error: + + + + Unable to load IHEX file %1 + + + + + Failed to load firmware: + + + + %1 should be .hex or .elf + + + + + Warning on load firmware: + + + + Incompatible firmware: compiled for %1 and your processor is %2 + + + + + The processor model is not specified. + + + + + Could not Create AVR Processor: "%1" + + + + Wrong firmware!! + + + + Unkown Error: + + + + File %1 is not in valid ELF format + + + + + + B16AsmDebugger + + Cannot write file %1: +%2. + + + + + BJT + + BJT + + + + Active + + + + + BaseDebugger + + Debugger already running + + + + Stop active session + + + + Uploading: + + + + FirmWare Uploaded to + + + + Select Compiler toolchain directory + + + + Using Compiler Path: + + + + : ToolChain not found + + + + Right-Click on Document Tab to set Path + + + + Error: No Mcu in Simulator... + + + + + BcdTo7S + + Bcd To 7S. + + + + Logic/Converters + + + + + BcdToDec + + Bcd To Dec. + + + + Logic/Converters + + + + + BinCounter + + Counter + + + + Logic/Arithmetic + + + + + Buffer + + Buffer + + + + Logic/Gates + + + + + Bus + + Bus + + + + Logic/Other Logic + + + + + Capacitor + + Capacitor + + + + Passive + + + + + Chip + + Cannot read file: +%1: +%2. + + + + Cannot set file: +%1 +to DomDocument + + + + Error reading Chip file: +%1 +No valid Chip + + + + + Circuit + + Load Circuit + + + + Circuits (*.simu);;All files (*.*) + + + + Cannot read file %1: +%2. + + + + Cannot set file %1 +to DomDocument + + + + Cannot write file %1: +%2. + + + + Bill Of Materials + + + + Create Subcircuit + + + + 2 Package Pins connected together + + + + + CircuitView + + Paste + + + + Undo + + + + Redo + + + + Import Circuit + + + + Save Circuit as Image + + + + Create SubCircuit + + + + Bill of Materials + + + + Save as Image + + + + Circuit Name + + + + Generated by SimulIDE + + + + Time: + + + + + CircuitWidget + + New C&ircuit Ctrl+N + + + + Create a new Circuit + + + + &Open Circuit Ctrl+O + + + + Open an existing Circuit + + + + &Save Circuit Ctrl+S + + + + Save the Circuit to disk + + + + Save Circuit &As... Ctrl+Shift+S + + + + Save the Circuit under a new name + + + + Power Circuit + + + + Power the Circuit + + + + Online Help + + + + +Circuit has been modified. +Do you want to save your changes? + + + + + New Circuit + + + + Load Circuit + + + + Circuits (*.simu);;All files (*.*) + + + + Save Circuit + + + + Circuit ERROR!!! + + + + About SimulIDE + + + + About Qt + + + + Real Speed: Debugger + + + + Real Speed: + + + + Info + + + + + Clock + + Clock + + + + Sources + + + + + CodeEditor + + File: + + + + File recognized as: + + + + File type not supported + + + + SUCCESS!!! Compilation Ok + + + + ERROR!!! Compilation Faliled + + + + Uploading: + + + + +Error: Mcu Deleted while Debugging!! + + + + + Starting Debbuger... + + + + Error: No Mcu in Simulator... + + + + Error: No Debugger Suited for this File... + + + + Error: No File... + + + + Error Compiling... + + + + Error Loading Firmware... + + + + Debbuger Started + + + + Debbuger Stopped + + + + + CodeEditorWidget + + Ready + + + + + ColorCombo + + Custom + + + + + Component + + Copy + + + + Remove + + + + Properties + + + + Rotate CW + + + + Rotate CCW + + + + Rotate 180 + + + + Horizontal Flip + + + + Vertical Flip + + + + + ComponentPlugins + + Manage Components + + + + + ComponentSelector + + Loading Component sets at: + + + + Cannot read file %1: +%2. + + + + Cannot set file %1 +to DomDocument + + + + Loaded Component set: + + + + Manage Components + + + + + ConnectorLine + + Remove + + + + + CurrSource + + Current Source + + + + Sources + + + + + DAC + + DAC + + + + Logic/Other Logic + + + + + DecToBcd + + Dec. To Bcd + + + + Logic/Converters + + + + + Demux + + Demux + + + + Logic/Converters + + + + + Diode + + Diode + + + + Active + + + + + EditDialog + + Pin Name: + + + + Pin Id: + + + + Invert Pin + + + + Unused Pin + + + + Edit Pin + + + + + EditorWindow + + Load File + + + + Save Document As + + + + Cannot write file %1: +%2. + + + + +The Document has been modified. +Do you want to save your changes? + + + + + set Compiler Path + + + + &New Ctrl+N + + + + Create a new file + + + + &Open... Ctrl+O + + + + Open an existing file + + + + &Save Ctrl+S + + + + Save the document to disk + + + + Save &As... Ctrl+Shift+S + + + + Save the document under a new name + + + + E&xit + + + + Exit the application + + + + Cu&t Ctrl+X + + + + Cut the current selection's contents to the clipboard + + + + &Copy Ctrl+C + + + + Copy the current selection's contents to the clipboard + + + + &Paste Ctrl+V + + + + Paste the clipboard's contents into the current selection + + + + Undo Ctrl+Z + + + + Undo the last action + + + + Redo Ctrl+Shift+Z + + + + Redo the last action + + + + Run To Breakpoint + + + + Run to next breakpoint + + + + Step + + + + Step debugger + + + + StepOver + + + + Step Over + + + + Pause + + + + Pause debugger + + + + Reset + + + + Reset debugger + + + + Stop Debugger + + + + Stop debugger + + + + Compile + + + + Compile Source + + + + UpLoad + + + + Load Firmware + + + + Find Replace + + + + Debug + + + + Start Debugger + + + + All files (*);;Arduino (*.ino);;Asm (*.asm);;GcBasic (*.gcb) + + + + All files + + + + + Ellipse + + Ellipse + + + + Other + + + + + FileBrowser + + Add Bookmark + + + + Open in editor + + + + Show Hidden + + + + + FileWidget + + cd Up + + + + Remove Bookmark + + + + + FindReplaceDialog + + Find/Replace + + + + + FindReplaceForm + + no match found + + + + Replaced %1 occurrence(s) + + + + Find/Replace + + + + &Find: + + + + R&eplace with: + + + + Error + + + + D&irection + + + + &Down + + + + &Up + + + + &Options + + + + &Case sensitive + + + + &Whole words only + + + + R&egular Expression + + + + &Find + + + + &Close + + + + &Replace + + + + Replace &All + + + + + FlipFlopD + + FlipFlop D + + + + Logic/Memory + + + + + FlipFlopJK + + FlipFlop JK + + + + Logic/Memory + + + + + Frequencimeter + + Frequencimeter + + + + Meters + + + + + FullAdder + + Full Adder + + + + Logic/Arithmetic + + + + + Function + + Function + + + + Logic/Arithmetic + + + + Set Function + + + + Function: + + + + + Ground + + Ground (0 V) + + + + Sources + + + + + Hd44780 + + Hd44780 + + + + Outputs + + + + + I2CRam + + I2C Ram + + + + Logic/Memory + + + + Load data + + + + Save data + + + + + I2CToParallel + + I2C to Parallel + + + + Logic/Converters + + + + + Inductor + + Inductor + + + + Passive + + + + + InoDebugger + + Cannot write file %1: +%2. + + + + + ItemLibrary + + Gates + + + + Logic + Logic + + + Arithmetic + + + + Memory + + + + Converters + + + + Other Logic + + + + Sensors + + + + Micro + + + + + KeyPad + + KeyPad + + + + Switches + + + + + Ks0108 + + Ks0108 + + + + Outputs + + + + + LatchD + + Latch + + + + Logic/Memory + + + + + Led + + Led + + + + Outputs + + + + + LedBar + + LedBar + + + + Outputs + + + + + LedMatrix + + LedMatrix + + + + Outputs + + + + + Line + + Line + + + + Other + + + + + LineNumberArea + + Add BreakPoint + + + + Remove BreakPoint + + + + + Lm555 + + lm555 + + + + Logic/Other Logic + + + + + LogicInput + + Fixed Volt. + + + + Sources + + + + + MainWindow + + Components + + + + RamTable + + + + Properties + + + + File explorer + + + + Qt5SerialPort is not installed in your system + + Mcu SerialPort will not work + Just Install libQt5SerialPort package + To have Mcu Serial Port Working + + + + Plugin Error: + + + + + McuComponent + + Cannot read file %1: +%2. + + + + Cannot set file %1 +to DomDocument + + + + Load firmware + + + + Reload firmware + + + + Open Serial Monitor. + + + + Close Serial Monitor + + + + Open Serial Port. + + + + Close Serial Port + + + + Load Firmware + + + + No File: + + + + No File to reload + + + + Load EEPROM data + + + + Save EEPROM data + + + + Hex Files (*.hex);;ELF Files (*.elf);;All files (*.*) + + + + + MemData + + Load Data + + + + All files (*.*) + + + + Save Data + + + + Cannot write file %1: +%2. + + + + + Memory + + Ram/Rom + + + + Logic/Memory + + + + Load data + + + + Save data + + + + + Mosfet + + Mosfet + + + + Active + + + + + Mux + + Mux + + + + Logic/Converters + + + + + MuxAnalog + + Analog Mux + + + + Active + + + + + OpAmp + + OpAmp + + + + Active + + + + + OrGate + + Or Gate + + + + Logic/Gates + + + + + Oscope + + Oscope + + + + Meters + + + + + PICComponent + + Micro + + + + Error + + + + Only 1 Mcu allowed + to be in the Circuit. + + + + + Pcd8544 + + Pcd8544 + + + + Outputs + + + + + PicProcessor + + File Not Found + + + + The file "%1" was not found. + + + + Unkown Error: + + + + Could not Create Pic Processor: "%1" + + + + Could not Load: "%1" + + + + + PlotterWidget + + Max + + + + Min + + + + Scale: + + + + Tracks: + + + + + Potentiometer + + Potentiometer + + + + Passive + + + + + Probe + + Probe + + + + Meters + + + + Remove from Plotter + + + + Plotter Channel + + + + Channel 1 + + + + Channel 2 + + + + Channel 3 + + + + Channel 4 + + + + + PropertiesWidget + + Here will be some help .............................................. + + + + + + Push + + Push + + + + Switches + + + + + QPropertyModel + + Name + + + + Value + + + + + Rail + + Rail. + + + + Sources + + + + + RamTable + + Reg. + + + + Dec + + + + Load VarSet + + + + Save VarSet + + + + VarSets (*.vst);;All files (*.*) + + + + Cannot write file %1: +%2. + + + + Clear Selected + + + + Clear Table + + + + Load Variables + + + + Type + + + + Value + + + + + Rectangle + + Rectangle + + + + Other + + + + + RelaySPST + + Relay (all) + + + + Switches + + + + + Resistor + + Resistor + + + + Passive + + + + + ResistorDip + + ResistorDip + + + + Passive + + + + + SR04 + + HC-SR04 + + + + Sensors + + + + + SerialPortWidget + + N/A + + + + Description: %1 + + + + Manufacturer: %1 + + + + Serial number: %1 + + + + Connected to %1 : %2, %3, %4, %5, %6 + + + + Error + + + + Custom + + + + None + + + + Even + + + + Odd + + + + Mark + + + + Space + + + + Settings + + + + Manufacturer: + + + + Serial number: + + + + Description: + + + + Open + + + + Close + + + + Parity: + + + + Flow control: + + + + Stop bits: + + + + BaudRate: + + + + Data bits: + + + + + Servo + + Servo + + + + Outputs + + + + + SevenSegment + + 7 Segment + + + + Outputs + + + + + SevenSegmentBCD + + 7 Seg BCD + + + + Logic + Logic + + + Logic/Other Logic + + + + + ShiftReg + + Shift Reg. + + + + Logic/Arithmetic + + + + + Stepper + + Stepper + + + + Outputs + + + + + SubCircuit + + Subcircuit + + + + Cannot read file %1: +%2. + + + + Cannot set file %1 +to DomDocument + + + + Error reading Subcircuit file: %1 + + + + + There are no data files for + + + + + SubPackage + + Package + + + + Logic + Logic + + + +Package has been modified. +Do you want to save your changes? + + + + + Move Pin + + + + Delete Pin + + + + Load Package + + + + Save Package + + + + Load Package File + + + + Packages (*.package);;All files (*.*) + + + + Cannot write file %1: +%2. + + + + Other + + + + Edit Pin + + + + + Switch + + Switches + + + + Switch (all) + + + + + SwitchDip + + Switches + + + + Switch Dip + + + + + TerminalWidget + + Send Text: + + + + Send Value: + + + + Print: + + + + Value + + + + Received From Micro: + + + + Sent to Micro: + + + + CR + + + + Clear + + + + + TextComponent + + Text + + + + Other + + + + + VoltReg + + Volt. Regulator + + + + Active + + + + + VoltSource + + Volt. Source + + + + Sources + + + + + Voltimeter + + Voltimeter + + + + Meters + + + + + WaveGen + + Wave Gen. + + + + Sources + + + + + XorGate + + Xor Gate + + + + Logic/Gates + + + + + elCapacitor + + Electrolytic Capacitor + + + + Passive + + + + + xmlfile + + Logic + Logic + + + diff --git a/resources/translations/simulide_es.ts b/resources/translations/simulide_es.ts new file mode 100644 index 0000000..0e49d5b --- /dev/null +++ b/resources/translations/simulide_es.ts @@ -0,0 +1,2669 @@ + + + + + ADC + + ADC + + + + Logic/Other Logic + Logica/Otros (Logica) + + + + AVRComponent + + Only 1 Mcu allowed + to be in the Circuit. + Solo puede haber +1 Microcontrolador en el Circuito. + + + AVR + AVR + + + Micro + + + + Error + + + + + AVRComponentPin + + Register descriptor file for this AVR processor %1 is corrupted - cannot attach pin + Archivo de registros del procesador %1 no valido - No se puede configurar pin + + + Register descriptor file for this AVR processor %1 is corrupted - cannot attach pin + + Archivo de registros del procesador %1 no valido - No se puede configurar pin + + + Pin is not initialized properly: + Inicializacion incorrecta del Pin: + + + + Amperimeter + + Amperimeter + Amperimetro + + + Meters + Medida + + + + AndGate + + And Gate + Puerta And + + + Logic/Gates + Logica/Puertas + + + + App::Property + + id + id + + + Show id + Mostrar id + + + Unit + Unidades + + + Color + Color + + + Speed + Velocidad + + + ReactStep + Paso React. + + + NoLinStep + Paso No Lin. + + + NoLinAcc + Precision No Lin. + + + Draw Grid + Mostrar Rejilla + + + Show ScrollBars + Mostrar ScrollBars + + + H size + Tamaño Horiz. + + + V size + Tamaño Vert. + + + Border + Borde + + + Opacity + Opacidad + + + Z Value + Valor Z + + + Vref + Vref + + + Num Bits + Mun Bits + + + Impedance + Impedancia + + + Max Value + Valor Max. + + + Gain + Ganancia + + + PNP + PNP + + + Capacitance + Capacidad + + + Show_Cap + Mostrar Cap. + + + Freq + Freq. + + + Current + Corriente + + + Show Amp + Mostrar Amp. + + + Threshold + Umbral + + + Zener Volt + Volt. Zener + + + Cols + Columnas + + + Rows + Filas + + + Control Code + Codigo Control + + + Size bytes + Tamaño Bytes + + + Inductance + Inductancia + + + Show Ind + Mostrar Inductancia + + + Key Labels + Texto en Teclas + + + CS Active Low + DS Activo Bajo + + + MaxCurrent + Corriente Max. + + + Grounded + A Tierra + + + Input High V + Volt. Alto Entrada + + + Input Low V + Volt. Bajo Entrada + + + Input Imped + Impedancia Entrada + + + Out High V + Volt. Alto Salida + + + Out Low V + Volt. Bajo Salida + + + Out Imped + Impedancia Salida + + + Inverted + Invertido + + + Tristate + Tri-Estado + + + Clock Inverted + Reloj Invertido + + + Reset Inverted + Reset Invertido + + + Invert Inputs + Invertir Entradas + + + S R Inverted + R S Invertidos + + + Num Inputs + Num. Entradas + + + Channels + Canales + + + Voltage + Voltaje + + + Show Volt + Mostrar Voltaje + + + RDSon + RDSon + + + P Channel + Canal P + + + Depletion + Deplexion + + + Power Pins + Pines de Alimentacion + + + Filter + Filtro + + + Value Ohm + Valor Ohmios + + + PlotterCh + Canal Plotter + + + Rcoil + Res. Bobina + + + Itrig + Int. Disparo + + + Poles + Polos + + + DT + DT + + + Norm Close + Norm. Cerrado + + + Resistance + Resistencia + + + Show res + Mostrar Resistencia + + + NumDisplays + Num. Pantallas + + + CommonCathode + Catodo comun + + + Steps + Pasos + + + Text + Texto + + + Fixed Width + Ancho Fijo + + + Margin + Margen + + + Volts + Voltaje + + + Volt Base + Volt. Base + + + Duty Square + Ancho de Pulso Onda Cuadrada + + + Quality + Calidad + + + Wave Type + Tipo de Onda + + + Avra Inc Path + Ruta Avra Includes + + + Drive Circuit + Controlar Circuito + + + Compiler Path + Ruta Compilador + + + Font Size + Tamaño Texto + + + Tab Size + Tamaño Tab + + + Spaces Tabs + Tabs de Espacios + + + Show Spaces + Mostar Espacios + + + Board + Placa + + + Custom Board + Placa "Custom" + + + Program + Programa + + + Num Outputs + Num Salidas + + + Functions + Funciones + + + Width + Ancho + + + Height + Alto + + + + Arduino + + Only 1 Mcu allowed + to be in the Circuit. + Solo puede haber +1 Microcontrolador en el Circuito. + + + Arduino + Arduino + + + Micro + + + + Error + + + + + AudioOut + + Audio Out + Salida Audio + + + Outputs + Salidas + + + + AvrProcessor + + File Not Found + Archivo No Encontrado + + + The file "%1" was not found. + No se encontro el archivo: "%1" + + + Unable to load IHEX file %1 + + Imposible cargar el archivo IHEX %1 + + + + Failed to load firmware: + No se pudo cargar el fimware: + + + File %1 is not in valid ELF format + + El archivo %1 ino esta en formato ELF valido + + + + Unkown Error: + Error no Especificado: + + + Could not Create AVR Processor: "%1" + No se pudo crear AVR Processor para: "%1" + + + Wrong firmware!! + Firmware No Valido!! + + + %1 should be .hex or .elf + + %1 deberia ser .hex o .elf + + + + Warning on load firmware: + Aviso Cragando Firmware: + + + Incompatible firmware: compiled for %1 and your processor is %2 + + Firmware Incompatible: compilado para%1 y su procesador es %2 + + + + The processor model is not specified. + + Modelo de procesador no especificado. + + + + Error: + + + + + B16AsmDebugger + + Cannot write file %1: +%2. + No se pudo escribir el archivo %1: +%2. + + + + BJT + + Active + Activos + + + BJT + + + + + BaseDebugger + + Debugger already running + Depurador iniciado + + + Stop active session + Detenga la sesion primero + + + Uploading: + Cargando: + + + FirmWare Uploaded to + FirmWare Cargado en + + + Select Compiler toolchain directory + Seleccione directorio del Compilador + + + Using Compiler Path: + Usando Ruta de Compilador: + + + : ToolChain not found + : Compilador no encontrado + + + Right-Click on Document Tab to set Path + Click-Derecho en pestaña de Documento para elegir Ruta + + + Error: No Mcu in Simulator... + Error: No hay Mcu en el simulador... + + + + BcdTo7S + + Bcd To 7S. + Bcd a 7S + + + Logic/Converters + Logica/Conversores + + + + BcdToDec + + Bcd To Dec. + Bcd a Dec. + + + Logic/Converters + Logica/Conversores + + + + BinCounter + + Counter + Contador + + + Logic/Arithmetic + Logica/Aritmetica + + + + Buffer + + Buffer + + + + Logic/Gates + Logica/Puertas + + + + Bus + + Bus + + + + Logic/Other Logic + Logica/Otros (Logica) + + + + Capacitor + + Capacitor + Condensador + + + Passive + Pasivos + + + + Chip + + Cannot read file: +%1: +%2. + No se pudo leer el archivo: +%1: +%2. + + + Cannot set file: +%1 +to DomDocument + No se pudo convertir el archivo: +%1 +a DomDocument + + + Error reading Chip file: +%1 +No valid Chip + Error leyendo Archivo: +%1 +Chip no Valido + + + + Circuit + + Load Circuit + Abrir Circuito + + + Circuits (*.simu);;All files (*.*) + Circuitos (*.simu);;Todos (*.*) + + + Cannot read file %1: +%2. + No se pudo leer el archivo %1: +%2. + + + Cannot set file %1 +to DomDocument + No se pudo convertir el archivo %1 +a DomDocument + + + Bill Of Materials + Lista de Materiales + + + Cannot write file %1: +%2. + No se pudo escribir el archivo %1: +%2. + + + Create Subcircuit + Crear Subcircuito + + + 2 Package Pins connected together + + + + + CircuitView + + Paste + Pegar + + + Undo + Deshacer + + + Redo + Rehacer + + + Open Circuit + Abrir Circuito + + + New Circuit + Nuevo Circuito + + + Save Circuit + Guardar circuito + + + Save Circuit As... + Guardar Circuito Como... + + + Import Circuit + Importar Circuito + + + Save Circuit as Image + Grabar Circuito como Imagen + + + Create SubCircuit + Crear Subcircuito + + + Bill of Materials + Lista de Materiales + + + Save as Image + Grabar Como Imagen + + + Circuit Name + Nombre del Circuito + + + Generated by SimulIDE + Generado por SimulIDE + + + Time: + Tiempo: + + + + CircuitWidget + + New C&ircuit Ctrl+N + Nuevo Circuito Ctrl+N + + + Create a new Circuit + Crear Nuevo Circuito + + + &Open Circuit Ctrl+O + Abrir Circuito Ctrl+O + + + Open an existing Circuit + Abrir un Circuito existente + + + &Save Circuit Ctrl+S + Guardar Circuito Ctrl+S + + + Save the Circuit to disk + Grabar el Circuito a Disco + + + Save Circuit &As... Ctrl+Shift+S + Guardar Circuito Como... Ctrl+Shift+S + + + Save the Circuit under a new name + rabar el Circuito con un nuevo nombre + + + Power Circuit + Encender Circuito + + + Power the Circuit + Encerder el Circuito + + + Online Help + Ayuda en Linea + + + +Circuit has been modified. +Do you want to save your changes? + + +El Circuito ha sido modificado. +Quiere guardar los cambios? + + + New Circuit + Nuevo Circuito + + + Load Circuit + Abrir Circuito + + + Circuits (*.simu);;All files (*.*) + Circuitos (*.simu);;Todos (*.*) + + + Save Circuit + Guardar circuito + + + Real Speed: Debugger + Velocidad Real: Depurador + + + Circuit ERROR!!! + ERROR de Circuito!!! + + + Real Speed: + Velocidad Real: + + + About SimulIDE + Sobre SimilIDE + + + About Qt + Sobre Qt + + + Real Speed: Debugger + Velocidad Real: Depurador + + + Real Speed: + Velocidad Real: + + + Info + + + + + Clock + + Clock + Reloj + + + Sources + Fuentes + + + + CodeEditor + + File: + Archivo: + + + File recognized as: + Archivo reconocido como: + + + File type not supported + Tipo de archivo no soportado + + + SUCCESS!!! Compilation Ok + SUCCESS!!! Compilacion Correcta + + + ERROR!!! Compilation Faliled + ERROR!!! Compilacion Fallida + + + Uploading: + Cargando: + + + +Error: Mcu Deleted while Debugging!! + + +Error: Mcu Borrado mientras se Depuraba!! + + + + Starting Debbuger... + Iniciando Depurador... + + + Error: No Mcu in Simulator... + Error: No hay Mcu en el simulador... + + + Error: No Debugger Suited for this File... + Error: No hay deprador para este tipo de archivo... + + + Error: No File... + Error: No hay Archivo... + + + Error Compiling... + Error Compilando... + + + Error Loading Firmware... + Error Cargando Firmware... + + + Debbuger Started + Depurador Iniciado + + + Debbuger Stopped + Depurador Detenido + + + + CodeEditorWidget + + Ready + Listo + + + + ColorCombo + + Custom + Personalizado + + + + Component + + Copy + Copiar + + + Remove + Eliminar + + + Properties + Propiedades + + + Rotate CW + Rotar Derecha + + + Rotate CCW + Rotar Izquierda + + + Rotate 180 + Rotar 180 + + + Horizontal Flip + Espejo Horizontal + + + Vertical Flip + Espejo Vertical + + + + ComponentPlugins + + Manage Components + Configurar Componentes + + + + ComponentSelector + + Loading Component sets at: + Cargando grupo de componentes desde: + + + Cannot read file %1: +%2. + No se pudo leer el archivo %1: +%2. + + + Cannot set file %1 +to DomDocument + No se pudo convertir el archivo %1 +a DomDocument + + + Loaded Component set: + Grupo de Componentes Cargado: + + + Manage Components + Configurar Componentes + + + + ConnectorLine + + Remove + Eliminar + + + + CurrSource + + Current Source + Fuente de Corriente + + + Sources + Fuentes + + + + DAC + + DAC + + + + Logic/Other Logic + Logica/Otros (Logica) + + + + DecToBcd + + Dec. To Bcd + Dec a Bcd + + + Logic/Converters + Logica/Conversores + + + + Demux + + Demux + Demultiplexor + + + Logic/Converters + Logica/Conversores + + + + Diode + + Diode + Diodo + + + Active + Activos + + + + EditDialog + + Pin Name: + + + + Pin Id: + + + + Invert Pin + + + + Unused Pin + + + + Edit Pin + + + + + EditorWindow + + Load File + Abrir Archivo + + + All files (*) + Todos (*) + + + Save Document As + Guardar Documento Como + + + Cannot write file %1: +%2. + No se pudo escribir el archivo %1: +%2. + + + +The Document has been modified. +Do you want to save your changes? + + +El Documento ha sido modificado. +Quiere guardar los cambios? + + + set Compiler Path + Seleccionar Ruta del Compilador + + + &New Ctrl+N + &Nuevo Ctrl+N + + + Create a new file + Crear nuevo documento + + + &Open... Ctrl+O + Abrir... Ctrl+O + + + Open an existing file + Abrir un Archivo existente + + + &Save Ctrl+S + Guardar Ctrl+S + + + Save the document to disk + Guardar el Documento a disco + + + Save &As... Ctrl+Shift+S + Guardar Como... Ctrl+Shift+S + + + Save the document under a new name + Guardar el documento con otro nombre + + + E&xit + Salir + + + Exit the application + Salir de la aplicacion + + + Cu&t Ctrl+X + Cortar Ctrl+X + + + Cut the current selection's contents to the clipboard + Cortar la seleccion actual al portapapeles + + + &Copy Ctrl+C + Copiar Ctrl+C + + + Copy the current selection's contents to the clipboard + Copiarr la seleccion actual al portapapeles + + + &Paste Ctrl+V + Pegar Ctrl+V + + + Paste the clipboard's contents into the current selection + Pegar el contenido del portapapeles sobre la seleccion actual + + + Undo Ctrl+Z + Deshacer Ctrl+Z + + + Undo the last action + Deshacer la ultima accion + + + Redo Ctrl+Shift+Z + Rehacer Ctrl+Shift+Z + + + Redo the last action + Rehacer la ultima accion + + + Run To Breakpoint + Ir hasta Breakpoint + + + Run to next breakpoint + Ejecutar hasta siguiente punto de corte + + + Step + Paso + + + Step debugger + Avanzar un paso + + + StepOver + Saltar + + + Step Over + Saltar + + + Pause + Pausar + + + Pause debugger + Pausar depurador + + + Reset debugger + Resetear depurador + + + Stop Debugger + Detener Depurador + + + Stop debugger + Terminar sesion de depuracion + + + Compile + Compilar + + + Compile Source + Compilar el archivo actual + + + UpLoad + Cargar firmware al Mcu + + + Load Firmware + Cargar firmware al Mcu + + + Find Replace + Buscar Reemplazar + + + Debug + Depurar + + + Start Debugger + Iniciar depurador + + + Reset + + + + All files (*);;Arduino (*.ino);;Asm (*.asm);;GcBasic (*.gcb) + Todos (*);;Arduino (*.ino);;Asm (*.asm);;GcBasic (*.gcb) + + + All files + + + + + Ellipse + + Ellipse + Elipse + + + Other + Otros + + + + FileBrowser + + Add Bookmark + Añadir Marcador + + + Open in editor + Abrir en Editor + + + Show Hidden + Mostrar Ocultos + + + + FileWidget + + cd Up + Subir + + + Remove Bookmark + Eliminar Marcador + + + + FindReplaceDialog + + Find/Replace + Encontrar/Reemplazar + + + + FindReplaceForm + + no match found + No encontrado + + + Replaced %1 occurrence(s) + Reeplazadas %1 coincidencia(s) + + + &Find: + Encontar: + + + R&eplace with: + Remplazar con: + + + Find/Replace + Encontrar/Reemplazar + + + D&irection + Direccion + + + &Down + Abajo + + + &Up + Arriba + + + &Options + Opciones + + + &Case sensitive + Mayusculas/minusculas + + + &Whole words only + Solo Palabras enteras + + + R&egular Expression + Expresion Regular + + + &Find + Encontar + + + &Close + Cerrar + + + &Replace + Remplazar + + + Replace &All + Reemplazar todos + + + Error + + + + + FlipFlopD + + FlipFlop D + + + + Logic/Memory + Logica/Memoria + + + + FlipFlopJK + + FlipFlop JK + + + + Logic/Memory + Logica/Memoria + + + + Frequencimeter + + Frequencimeter + Frecuencimetro + + + Meters + Medida + + + + FullAdder + + Full Adder + Sumador Completo + + + Logic/Arithmetic + Logica/Aritmetica + + + + Function + + Function + Funcion + + + Logic/Arithmetic + Logica/Aritmetica + + + Set Function + Establecer Funcion + + + Function: + Funcion: + + + + Ground + + Ground (0 V) + Tierra + + + Sources + Fuentes + + + + Hd44780 + + Outputs + Salidas + + + Hd44780 + + + + + I2CRam + + I2C Ram + Ram I2C + + + Logic/Memory + Logica/Memoria + + + Load data + + + + Save data + + + + + I2CToParallel + + I2C to Parallel + I2C a Paralelo + + + Logic/Converters + Logica/Conversores + + + + InBus + + In Bus + Bus Entrada + + + Logic/Other Logic + Logica/Otros (Logica) + + + + Inductor + + Passive + Pasivos + + + Inductor + + + + + InoDebugger + + Cannot write file %1: +%2. + No se pudo escribir el archivo %1: +%2. + + + + ItemLibrary + + Gates + Puertas + + + Logic + Logica + + + Arithmetic + Aritmetica + + + Memory + Memoria + + + Converters + Conversores + + + Other Logic + Otros (Logica) + + + Sensors + Sensores + + + Micro + + + + + KeyPad + + KeyPad + Teclado + + + Switches + Interruptores + + + + Ks0108 + + Outputs + Salidas + + + Ks0108 + + + + + LatchD + + Latch + + + + Logic/Memory + Logica/Memoria + + + + Led + + Outputs + Salidas + + + Led + + + + + LedBar + + LedBar + Led (Barra) + + + Outputs + Salidas + + + + LedMatrix + + LedMatrix + Matriz Led + + + Outputs + Salidas + + + + Line + + Line + Linea + + + Other + Otros + + + + LineNumberArea + + Add BreakPoint + Añadir Punto Ruptura + + + Remove BreakPoint + Eliminar Punto Ruptura + + + + Lm555 + + lm555 + + + + Logic/Other Logic + Logica/Otros (Logica) + + + + LogicInput + + Fixed Volt. + Voltaje Fijo. + + + Sources + Fuentes + + + + MainWindow + + Components + Componentes + + + Properties + Propiedades + + + File explorer + Explorador de Archivos + + + Qt5SerialPort is not installed in your system + + Mcu SerialPort will not work + Just Install libQt5SerialPort package + To have Mcu Serial Port Working + Qt5SerialPort no esta instalado en su sistema + + Mcu SerialPort no funcionara + Instale elpaquete libQt5SerialPort + Para tener Mcu Serial Port funcionando + + + Plugin Error: + Error en Plugin: + + + RamTable + + + + + McuComponent + + Cannot read file %1: +%2. + No se pudo leer el archivo %1: +%2. + + + Cannot set file %1 +to DomDocument + No se pudo convertir el archivo %1 +a DomDocument + + + Load firmware + Cargar firmware + + + Reload firmware + Recargar firmware + + + Open Serial Monitor. + Abrir Monitor.Serial + + + Close Serial Monitor + Cerrar Monitor.Serial + + + Open Serial Port. + Abrir Puerto Serie. + + + Close Serial Port + Cerrar Puerto Serie. + + + Load Firmware + Cargar firmware + + + Hex Files (*.hex);;ELF Files (*.elf);;all files (*.*) + Hex (*.hex);;ELF (*.elf);;Todos (*.*) + + + No File: + No hay Archivo + + + No File to reload + No hay Archivo que recargar + + + Load EEPROM data + + + + Save EEPROM data + + + + Hex Files (*.hex);;ELF Files (*.elf);;All files (*.*) + + + + + MemData + + Load Data + + + + All files (*.*) + + + + Save Data + + + + Cannot write file %1: +%2. + No se pudo escribir el archivo %1: +%2. + + + + Memory + + Ram/Rom + + + + Logic/Memory + Logica/Memoria + + + Load data + + + + Save data + + + + + Mosfet + + Active + Activos + + + Mosfet + + + + + Mux + + Mux + Multiplexor + + + Logic/Converters + Logica/Conversores + + + + MuxAnalog + + Analog Mux + Multiplexor Analogico + + + Outputs + Salidas + + + Active + Activos + + + + OpAmp + + OpAmp + Amplificador Operacional + + + Active + Activos + + + + OrGate + + Or Gate + Puerta Or + + + Logic/Gates + Logica/Puertas + + + + Oscope + + Oscope + Osciloscopio + + + Meters + Medida + + + + OutBus + + Out Bus + Bus Salida + + + Logic/Other Logic + Logica/Otros (Logica) + + + + PICComponent + + Only 1 Mcu allowed + to be in the Circuit. + Solo puede haber +1 Microcontrolador en el Circuito. + + + Micro + + + + Error + + + + + Pcd8544 + + Outputs + Salidas + + + Pcd8544 + + + + + PicProcessor + + File Not Found + Archivo No Encontrado + + + The file "%1" was not found. + No se encontro el archivo: "%1" + + + Unkown Error: + Error no Especificado: + + + Could not Create Pic Processor: "%1" + No se pudo crear Pic Processor: "%1" + + + Could not Load: "%1" + No se pudo cargar: "%1" + + + + PlotterWidget + + Max + + + + Min + + + + Scale: + Escala: + + + Tracks: + Pistas: + + + + Potentiometer + + Potentiometer + Potenciometro + + + Passive + Pasivos + + + + Probe + + Probe + Sonda Voltaje. + + + Meters + Medida + + + Add to Plotter + Añadir al Plotter + + + Remove from Plotter + Quitar del Plotter + + + Plotter Channel + Canal Plotter + + + Channel 1 + Canal 1 + + + Channel 2 + Canal 2 + + + Channel 3 + Canal 3 + + + Channel 4 + Canal 4 + + + + PropertiesWidget + + Here will be some help .............................................. + + + + + + Push + + Push + Pulsador + + + Switches + Interruptores + + + + QPropertyModel + + Name + Nombre + + + Value + Valor + + + + Rail + + Sources + Fuentes + + + Rail. + + + + + Ram8bit + + 8bit Ram + Ram 8 Bit + + + Logic/Memory + Logica/Memoria + + + + RamTable + + Binary + Binario + + + Load VarSet + Cargar Grupo de Variables + + + VarSets (*.vst);;All files (*.*) + VarSets (*.vst);;Todos (*.*) + + + Save VarSet + Grabar Grupo de Variables + + + Cannot write file %1: +%2. + No se pudo escribir el archivo %1: +%2. + + + Reg. + + + + Dec + + + + Clear Selected + Borrar Seleccionados + + + Clear Table + Borrar Tabla + + + Load Variables + Cargar Variables + + + Type + + + + Value + Valor + + + + Rectangle + + Rectangle + Rectangulo + + + Other + Otros + + + + RelaySPST + + Relay (all) + Rele (todos) + + + Switches + Interruptores + + + + Resistor + + Resistor + Reistencia + + + Passive + Pasivos + + + + ResistorDip + + ResistorDip + Resistencia (Dip) + + + Passive + Pasivos + + + + SR04 + + Outputs + Salidas + + + HC-SR04 + + + + Sensors + Sensores + + + + SerialPortWidget + + Description: %1 + Descripcion: %1 + + + Manufacturer: %1 + Fabricante: %1 + + + Serial number: %1 + Numero de Serie: %1 + + + Connected to %1 : %2, %3, %4, %5, %6 + Connectado a %1 : %2, %3, %4, %5, %6 + + + Custom + Personalizado + + + None + Ninguno + + + Even + Par + + + Odd + Impar + + + Mark + Marcar + + + Space + Espacio + + + Settings + Configuracion + + + Manufacturer: + Fabricante: + + + Serial number: + Numero de Serie: + + + Description: + Descripcion: + + + Open + Abrir + + + Close + Cerrar + + + Parity: + Paridad: + + + Flow control: + Control de Flujo + + + Stop bits: + Bits de Parada: + + + Data bits: + Bits de Datos + + + N/A + + + + Error + + + + BaudRate: + + + + + Servo + + Outputs + Salidas + + + Servo + + + + + SevenSegment + + 7 Segment + 7 Segmentos + + + Outputs + Salidas + + + + SevenSegmentBCD + + Logic + Logica + + + 7 Seg BCD + + + + Logic/Other Logic + Logica/Otros (Logica) + + + + ShiftReg + + Shift Reg. + Registro Desplazamiento + + + Logic/Arithmetic + Logica/Aritmetica + + + + Stepper + + Stepper + Motor de Pasos + + + Outputs + Salidas + + + + SubCircuit + + Subcircuit + Subcircuito + + + Cannot read file %1: +%2. + No se pudo leer el archivo %1: +%2. + + + Cannot set file %1 +to DomDocument + No se pudo convertir el archivo %1 +a DomDocument + + + Error reading Subcircuit file: %1 + + Error leyendo archivo de Subcircuito: %1 + + + + There are no data files for + No hay archivo de datos para + + + + SubPackage + + Package + + + + Logic + Logica + + + Pin Label + Nombre de Pin + + + Set Pin Name: + Cambiar Nombre de Pin + + + name + nombre + + + +Package has been modified. +Do you want to save your changes? + + +Package ha sido modificado. +Quiere guardar los cambios? + + + Move Pin + Mover Pin + + + Rename Pin + Renombrar Pin + + + Invert Pin + Invertir Pin + + + Unused Pin + Deshabilitar Pin + + + Delete Pin + Eliminar Pin + + + Load Package + Cargar Package + + + Save Package + Guardar PAckage + + + Load Package File + + + + Packages (*.package);;All files (*.*) + + + + Cannot write file %1: +%2. + No se pudo escribir el archivo %1: +%2. + + + Other + Otros + + + Edit Pin + + + + + Switch + + Switches + Interruptores + + + Switch (all) + Interuptor (todos) + + + + SwitchDip + + Switch Dip + InterruptorDip + + + Switches + Interruptores + + + + TerminalWidget + + Send Text: + Enviar Texto: + + + Send Value: + Enviar Valor: + + + Print: + Imprimir: + + + Value + Valor + + + Received From Micro: + Recibido Desde Micro: + + + Sent to Micro: + Enviado a Micro: + + + CR + + + + Clear + + + + + TextComponent + + Text + Texto + + + Other + Otros + + + + VoltReg + + Volt. Regulator + Regulador Voltaje + + + Active + Activos + + + + VoltSource + + Volt. Source + Fuente Voltaje + + + Sources + Fuentes + + + + Voltimeter + + Voltimeter + Voltimetro + + + Meters + Medida + + + + WaveGen + + Wave Gen. + Generador Onda + + + Sources + Fuentes + + + + XorGate + + Xor Gate + Puerta Xor + + + Logic/Gates + Logica/Puertas + + + + elCapacitor + + Electrolytic Capacitor + Condensador Electrolitico + + + Passive + Pasivos + + + + xmlfile + + Logic + Logica + + + diff --git a/resources/translations/simulide_ru.ts b/resources/translations/simulide_ru.ts new file mode 100644 index 0000000..7331d4e --- /dev/null +++ b/resources/translations/simulide_ru.ts @@ -0,0 +1,2638 @@ + + + + + ADC + + ADC + АЦП + + + Logic/Other Logic + Логика/Другое (Логика) + + + + AVRComponent + + AVR + AVR + + + Micro + Микроконтроллеры + + + Error + Ошибка + + + Only 1 Mcu allowed + to be in the Circuit. + Может быть использован +только 1 микроконтроллер. + + + + AVRComponentPin + + Register descriptor file for this AVR processor %1 is corrupted - cannot attach pin + Регистр файла дескриптора для этого AVR микроконтроллера %1 повреждён - не могу назначить вывод + + + Register descriptor file for this AVR processor %1 is corrupted - cannot attach pin + + Регистр файла дескриптора для этого AVR микроконтроллера %1 повреждён - не могу назначить вывод + + + + Pin is not initialized properly: + Вывод не инициализирован: + + + + Amperimeter + + Amperimeter + Амперметр + + + Meters + Измерение + + + + AndGate + + And Gate + И + + + Logic/Gates + Логика/ворота + + + + App::Property + + id + Идентификатор + + + Show id + Показать идентификатор + + + Unit + Единица измерения + + + Color + Цвет + + + Speed + Скорость + + + ReactStep + Шаг отклика + + + NoLinStep + Шаг NoLin + + + NoLinAcc + Накопление NoLin + + + Draw Grid + Отобразить сетку + + + Show ScrollBars + Показать полосы прокрутки + + + H size + Размер по горизонтали + + + V size + Размер по вертикали + + + Border + Кайма + + + Opacity + Непрозрачность + + + Z Value + Значение Z + + + Vref + Опорное напряжение + + + Num Bits + Номер бита + + + Impedance + Импеданс + + + Max Value + Максимальное значение + + + Gain + Усиление + + + PNP + PNP + + + Capacitance + Ёмкость + + + Show_Cap + Показать конденсатор + + + Freq + Частота + + + Current + Ток + + + Show Amp + Показать усилитель + + + Threshold + Порог + + + Zener Volt + Напряжение стабилизации + + + Cols + Столбцы + + + Rows + Строки + + + Control Code + Контрольный код + + + Size bytes + Размер байтов + + + Inductance + Индуктивность + + + Show Ind + Показать индуктивность + + + Key Labels + Ключевые метки + + + CS Active Low + CS активный низкий + + + MaxCurrent + Максимальный ток + + + Grounded + Заземленный + + + Input High V + Высокое входящее напряжение + + + Input Low V + Низкое входящее напряжение + + + Input Imped + Входящий импеданс + + + Out High V + Высокое выходящее напряжение + + + Out Low V + Низкое выходящее напряжение + + + Out Imped + Выходящий импеданс + + + Inverted + Инвертированный + + + Tristate + Третье состояние + + + Clock Inverted + Инвертировать такты + + + Reset Inverted + Инвертировать сброс + + + Invert Inputs + Инвертировать входы + + + S R Inverted + Инвертировать SR + + + Num Inputs + Количество входов + + + Channels + Каналы + + + Voltage + Напряжение + + + Show Volt + Показать в вольтах + + + RDSon + RD потомок + + + P Channel + Канал P + + + Depletion + Истощение + + + Power Pins + Силовые контакты + + + Filter + Фильтр + + + Value Ohm + Значение Ом + + + PlotterCh + Графопостроитель Канал + + + Rcoil + Сопротивление обмотки + + + Itrig + Триггер + + + Poles + Полюса + + + DT + ДатаВремя + + + Norm Close + Закрыть нормально + + + Resistance + Сопротивление + + + Show res + Показать сопротивление + + + NumDisplays + Количество отображений + + + CommonCathode + Общий катод + + + Steps + Шаги + + + Text + Текст + + + Fixed Width + Фиксированная ширина + + + Margin + Допустимый предел + + + Volts + Вольты + + + Volt Base + Базовое напряжение + + + Duty Square + Обязательное поле + + + Quality + Качество + + + Wave Type + Тип волны + + + Drive Circuit + Управляющая схема + + + Compiler Path + Путь к компилятору + + + Font Size + Размер шрифта + + + Tab Size + Шаг табуляции + + + Spaces Tabs + Интервалы вкладок + + + Show Spaces + Показать интервалы + + + Board + Плата + + + Custom Board + Заказать плату + + + Program + Программа + + + Avra Inc Path + Путь к Avra + + + Num Outputs + Количество Выходы + + + Functions + методы + + + Width + ширина + + + Height + высота + + + + Arduino + + Arduino + Arduino + + + Micro + Микроконтроллеры + + + Error + Ошибка + + + Only 1 Mcu allowed + to be in the Circuit. + Может быть использован +только 1 микроконтроллер. + + + + AudioOut + + Audio Out + Звуковой выход + + + Outputs + Выходы + + + + AvrProcessor + + File Not Found + Файл не найден + + + The file "%1" was not found. + Файл "%1" не был найден. + + + Error: + Ошибка: + + + Unable to load IHEX file %1 + + Невозможно загрузить IHEX файл %1 + + + + Failed to load firmware: + Не удалось загрузить прошивку: + + + File %1 is not in valid ELF format + + У файла %1 не действительный ELF формат + + + + %1 should be .hex or .elf + + %1 должен быть .hex или .elf + + + + Warning on load firmware: + Предупреждение о загрузке прошивки: + + + Incompatible firmware: compiled for %1 and your processor is %2 + + Несовместимая прошивка: скомпилировано для %1 и микроконтроллера %2 + + + + The processor model is not specified. + + Не указана модель микроконтроллера. + + + + Unkown Error: + Неизвестная ошибка: + + + Could not Create AVR Processor: "%1" + Не удалось создать AVR микроконтроллер: "%1" + + + Wrong firmware!! + Неправильная прошивка! + + + + B16AsmDebugger + + Cannot write file %1: +%2. + Не удаётся записать файл %1: +%2. + + + + BJT + + BJT + Биполярный транзистор + + + Active + Активные элементы + + + + BaseDebugger + + Debugger already running + Отладчик уже работает + + + Stop active session + Остановка активной сессии + + + Uploading: + Загрузка: + + + FirmWare Uploaded to + Прошивка загружена в + + + Select Compiler toolchain directory + Выберите каталог с инструментами компилятора + + + Using Compiler Path: + Используется путь компилятора: + + + : ToolChain not found + : Инструменты не найдены + + + Right-Click on Document Tab to set Path + Правый клик на вкладке документа, чтобы задать путь + + + Error: No Mcu in Simulator... + Ошибка: нет микроконтроллера в симуляторе... + + + + BcdTo7S + + Bcd To 7S. + 7-сегментный Шифратор + + + Logic/Converters + Логика/конвертер + + + + BcdToDec + + Bcd To Dec. + Дешифратор. + + + Logic/Converters + Логика/конвертер + + + + BinCounter + + Counter + Счётчик + + + Logic/Arithmetic + Логика/арифметика + + + + Buffer + + Buffer + Буфер + + + Logic/Gates + Логика/ворота + + + + Bus + + Bus + + + + Logic/Other Logic + Логика/Другое (Логика) + + + + Capacitor + + Capacitor + Конденсатор + + + Passive + Пассивные элементы + + + + Chip + + Cannot read file: +%1: +%2. + Не удаётся прочитать файл: +%1: +%2. + + + Cannot set file: +%1 +to DomDocument + Не удаётся загрузить файл: +%1 +в DOMDocument + + + Error reading Chip file: +%1 +No valid Chip + Ошибка чтения файла чип: +%1 +чип не действительный + + + + Circuit + + Load Circuit + Загрузить схему + + + Circuits (*.simu);;All files (*.*) + Схемы (*.simu);;Все файлы (*.*) + + + Cannot read file %1: +%2. + Не удаётся прочитать файл %1: +%2. + + + Cannot set file %1 +to DomDocument + Не удаётся загрузить файл %1 +в DOMDocument + + + Cannot write file %1: +%2. + Не удаётся записать файл %1: +%2. + + + Bill Of Materials + Спецификация материалов + + + Create Subcircuit + Создать подсхему + + + 2 Package Pins connected together + + + + + CircuitView + + Paste + Вставить + + + Undo + Отмена действия + + + Redo + Выполнить повторно + + + Open Circuit + Открыть схему + + + New Circuit + Новая схема + + + Save Circuit + Сохранить схему + + + Save Circuit As... + Сохранить схему как... + + + Import Circuit + Импортировать схему + + + Save Circuit as Image + Сохранить схему как изображение + + + Create SubCircuit + Создать подсхему + + + Bill of Materials + Спецификация материалов + + + Save as Image + Сохранить как изображение + + + Circuit Name + Название схемы + + + Generated by SimulIDE + Сгенерировано с помощью SimulIDE + + + Time: + Bремя: + + + + CircuitWidget + + New C&ircuit Ctrl+N + Новая с&хема Ctrl+N + + + Create a new Circuit + Создать новую схему + + + &Open Circuit Ctrl+O + &Открыть схему Ctrl+O + + + Open an existing Circuit + Открыть существующую схему + + + &Save Circuit Ctrl+S + &Сохранить схему Ctrl+S + + + Save the Circuit to disk + Сохранить схему на диск + + + Save Circuit &As... Ctrl+Shift+S + Сохранить схему &как... Ctrl+Shift+S + + + Save the Circuit under a new name + Сохранить схему под новым именем + + + Power Circuit + Силовая схема + + + Power the Circuit + Схема питания + + + Online Help + Online помощь + + + +Circuit has been modified. +Do you want to save your changes? + + +Схема была изменена. +Хотите сохранить изменения? + + + + New Circuit + Новая схема + + + Load Circuit + Загрузить схему + + + Circuits (*.simu);;All files (*.*) + Схемы (*.simu);;Все файлы (*.*) + + + Save Circuit + Сохранить схему + + + Real Speed: Debugger + Реальная скорость: Отладчик + + + Circuit ERROR!!! + Ошибка в схеме!!! + + + Real Speed: + Реальная скорость: + + + About SimulIDE + О SimulIDE + + + About Qt + О Qt + + + Real Speed: Debugger + Реальная скорость: Отладчик + + + Real Speed: + Реальная скорость: + + + Info + + + + + Clock + + Clock + Часы + + + Sources + Источники + + + + CodeEditor + + File: + Файл: + + + File recognized as: + Файл распознан как: + + + File type not supported + Тип файла не поддерживается + + + SUCCESS!!! Compilation Ok + УСПЕШНО!!! Компиляция завершена + + + ERROR!!! Compilation Faliled + ОШИБКА!!! Компиляция не выполнена + + + Uploading: + Загрузка: + + + +Error: Mcu Deleted while Debugging!! + + +Ошибка: микроконтроллер удалён при отладке!!! + + + + Starting Debbuger... + Запуск отладчика... + + + Error: No Mcu in Simulator... + Ошибка: нет микроконтроллера в симуляторе... + + + Error: No Debugger Suited for this File... + Ошибка: нет подходящего отладчика для этого файла... + + + Error: No File... + Ошибка: нет файла... + + + Error Compiling... + Ошибка компиляции... + + + Error Loading Firmware... + Ошибка загрузки прошивки... + + + Debbuger Started + Отладчик запущен + + + Debbuger Stopped + Отладчик остановлен + + + + CodeEditorWidget + + Ready + Готов + + + + ColorCombo + + Custom + Настройка + + + + Component + + Copy + Копировать + + + Remove + Удалить + + + Properties + Свойства + + + Rotate CW + Повернуть на 90 градусов вправо + + + Rotate CCW + Повернуть на 90 градусов влево + + + Rotate 180 + Повернуть на 180 градусов + + + Horizontal Flip + Отразить по горизонтали + + + Vertical Flip + Отразить по вертикали + + + + ComponentPlugins + + Manage Components + Управление компонентами + + + + ComponentSelector + + Loading Component sets at: + Загрузка набора компонентов в: + + + Cannot read file %1: +%2. + Не удаётся прочитать файл %1: +%2. + + + Cannot set file %1 +to DomDocument + Не удаётся загрузить файл %1 +в DOMDocument + + + Loaded Component set: + Загружен набор компонентов: + + + Manage Components + Управление компонентами + + + + ConnectorLine + + Remove + Удалить + + + + CurrSource + + Current Source + Источник тока + + + Sources + Источники + + + + DAC + + DAC + ЦАП + + + Logic/Other Logic + Логика/Другое (Логика) + + + + DecToBcd + + Dec. To Bcd + Шифратор + + + Logic/Converters + Логика/конвертер + + + + Demux + + Demux + Демультиплексор + + + Logic/Converters + Логика/конвертер + + + + Diode + + Diode + Диод + + + Active + Активные элементы + + + + EditDialog + + Pin Name: + + + + Pin Id: + + + + Invert Pin + + + + Unused Pin + + + + Edit Pin + + + + + EditorWindow + + Load File + Загрузить файл + + + All files (*) + Все файлы (*) + + + Save Document As + Сохранить документ как + + + Cannot write file %1: +%2. + Не удаётся записать файл %1: +%2. + + + +The Document has been modified. +Do you want to save your changes? + + +Документ был изменен. +Хотите сохранить изменения? + + + + set Compiler Path + Задать путь компилятора + + + &New Ctrl+N + &Новый Ctrl+N + + + Create a new file + Создать новый файл + + + &Open... Ctrl+O + &Открыть... Ctrl+O + + + Open an existing file + Открыть существующий файл + + + &Save Ctrl+S + &Сохранить Ctrl+S + + + Save the document to disk + Сохранить документ на диск + + + Save &As... Ctrl+Shift+S + Сохранить &как... Ctrl+Shift+S + + + Save the document under a new name + Сохранить документ под новым именем + + + E&xit + В&ыход + + + Exit the application + Выйти из приложения + + + Cu&t Ctrl+X + Вы&резать Ctrl+X + + + Cut the current selection's contents to the clipboard + Вырезать содержимое текущего выделения в буфер обмена + + + &Copy Ctrl+C + &Копировать Ctrl+C + + + Copy the current selection's contents to the clipboard + Копировать содержимое текущего выделения в буфер обмена + + + &Paste Ctrl+V + &Вставить Ctrl+V + + + Paste the clipboard's contents into the current selection + Вставить содержимое буфера обмена в текущее выделение + + + Undo Ctrl+Z + Отменить Ctrl+Z + + + Undo the last action + Отменить последнее действие + + + Redo Ctrl+Shift+Z + Повторить Ctrl+Shift+Z + + + Redo the last action + Повторить последнее действие + + + Run To Breakpoint + Перейти к точке останова + + + Run to next breakpoint + Перейти к следующей точке останова + + + Step + Шаг + + + Step debugger + Шаг отладчика + + + StepOver + Перешагнуть + + + Step Over + Шаг с обходом + + + Pause + Пауза + + + Pause debugger + Приостановить отладчик + + + Reset + Сброс + + + Reset debugger + Сбросить отладчик + + + Stop Debugger + Остановить отладчик + + + Stop debugger + Остановить отладчик + + + Compile + Компилировать + + + Compile Source + Компиляция исходного кода + + + UpLoad + Загрузить + + + Load Firmware + Загрузить прошивку + + + Find Replace + Найти и заменить + + + Debug + Отладка + + + Start Debugger + Запустить отладчик + + + All files (*);;Arduino (*.ino);;Asm (*.asm);;GcBasic (*.gcb) + Все файлы (*);;Arduino (*.ino);;Asm (*.asm);;GcBasic (*.gcb) + + + All files + + + + + Ellipse + + Ellipse + Эллипс + + + Other + Другое + + + + FileBrowser + + Add Bookmark + Добавить закладку + + + Open in editor + Открыть в редакторе + + + Show Hidden + Показать скрытые файлы + + + + FileWidget + + cd Up + Шаг вверх + + + Remove Bookmark + Удалить закладку + + + + FindReplaceDialog + + Find/Replace + Найти/Заменить + + + + FindReplaceForm + + no match found + Совпадений не найдено + + + Replaced %1 occurrence(s) + Заменено %1 местонахождение(я) + + + Find/Replace + Найти/Заменить + + + &Find: + &Найти: + + + R&eplace with: + З&аменить на: + + + Error + Ошибка + + + D&irection + У&казание + + + &Down + &Вниз + + + &Up + Вв&ерх + + + &Options + &Опции + + + &Case sensitive + &С учетом регистра + + + &Whole words only + &Только целые слова + + + R&egular Expression + &Регулярное выражение + + + &Find + &Найти + + + &Close + &Закрыть + + + &Replace + З&аменить + + + Replace &All + Заменить в&сё + + + + FlipFlopD + + FlipFlop D + D-триггер + + + Logic/Memory + Логика/память + + + + FlipFlopJK + + FlipFlop JK + JK-триггер + + + Logic/Memory + Логика/память + + + + Frequencimeter + + Frequencimeter + Частотомер + + + Meters + Измерение + + + + FullAdder + + Full Adder + Сумматор + + + Logic/Arithmetic + Логика/арифметика + + + + Function + + Function + методика + + + Logic/Arithmetic + Логика/арифметика + + + Set Function + Hастроить функцию + + + Function: + методика: + + + + Ground + + Ground (0 V) + Земля (0 вольт) + + + Sources + Источники + + + + Hd44780 + + Hd44780 + HD44780 + + + Outputs + Выходы + + + + I2CRam + + I2C Ram + Память I2C + + + Logic/Memory + Логика/память + + + Load data + + + + Save data + + + + + I2CToParallel + + I2C to Parallel + Конвертор I2C в Параллель + + + Logic/Converters + Логика/конвертер + + + + InBus + + In Bus + Входная шина + + + Logic/Other Logic + Логика/Другое (Логика) + + + + Inductor + + Inductor + Индуктивность + + + Passive + Пассивные элементы + + + + InoDebugger + + Cannot write file %1: +%2. + Не удаётся записать файл %1: +%2. + + + + ItemLibrary + + Gates + ворота + + + Logic + Логика + + + Arithmetic + арифметика + + + Memory + память + + + Converters + конвертер + + + Other Logic + Другое (Логика) + + + Sensors + датчиков + + + Micro + Микроконтроллеры + + + + KeyPad + + KeyPad + Цифровая клавиатура + + + Switches + Переключатели + + + + Ks0108 + + Ks0108 + KS0108 + + + Outputs + Выходы + + + + LatchD + + Latch + Триггер + + + Logic/Memory + Логика/память + + + + Led + + Led + Светодиод + + + Outputs + Светодиоды + + + + LedBar + + LedBar + Светодиодная сборка + + + Outputs + Светодиоды + + + + LedMatrix + + LedMatrix + Светодиодная матрица + + + Outputs + Светодиоды + + + + Line + + Line + Линия + + + Other + Другое + + + + LineNumberArea + + Add BreakPoint + Добавить точку останова + + + Remove BreakPoint + Удалить точку останова + + + + Lm555 + + lm555 + LM555 + + + Logic/Other Logic + Логика/Другое (Логика) + + + + LogicInput + + Fixed Volt. + Фиксированное напряжение. + + + Sources + Источники + + + + MainWindow + + Components + Компоненты + + + RamTable + Таблица RAM + + + Properties + Свойства + + + File explorer + Файловый проводник + + + Qt5SerialPort is not installed in your system + + Mcu SerialPort will not work + Just Install libQt5SerialPort package + To have Mcu Serial Port Working + Qt5SerialPort не установлен в этой системе + + Микроконтроллерный SerialPort не будет работать + Просто установите пакет библиотек Qt5SerialPort + чтобы SerialPort микроконтроллера заработал + + + Plugin Error: + Ошибка плагина: + + + + McuComponent + + Cannot read file %1: +%2. + Не удаётся прочитать файл %1: +%2. + + + Cannot set file %1 +to DomDocument + Не удаётся загрузить файл %1 +в DOMDocument + + + Load firmware + Загрузить прошивку + + + Reload firmware + Перезагрузить прошивку + + + Open Serial Monitor. + Открыть Serial Monitor. + + + Close Serial Monitor + Закрыть Serial Monitor + + + Open Serial Port. + Открыть Serial Port. + + + Close Serial Port + Закрыть Serial Port + + + Load Firmware + Загрузить прошивку + + + Hex Files (*.hex);;ELF Files (*.elf);;all files (*.*) + Файлы HEX (*.hex);;Файлы ELF (*.elf);;Все файлы (*.*) + + + No File: + Нет файла: + + + No File to reload + Нет файла для перезагрузки + + + Load EEPROM data + + + + Save EEPROM data + + + + Hex Files (*.hex);;ELF Files (*.elf);;All files (*.*) + + + + + MemData + + Load Data + + + + All files (*.*) + + + + Save Data + + + + Cannot write file %1: +%2. + Не удаётся записать файл %1: +%2. + + + + Memory + + Ram/Rom + + + + Logic/Memory + Логика/память + + + Load data + + + + Save data + + + + + Mosfet + + Mosfet + МОП-транзистор + + + Active + Активные элементы + + + + Mux + + Mux + Мультиплексор + + + Logic/Converters + Логика/конвертер + + + + MuxAnalog + + Analog Mux + Аналоговый Мультиплексор + + + Active + Активные элементы + + + + OpAmp + + OpAmp + Операционный усилитель + + + Active + Активные элементы + + + + OrGate + + Or Gate + ИЛИ + + + Logic/Gates + Логика/ворота + + + + Oscope + + Oscope + Осциллограф + + + Meters + Измерение + + + + OutBus + + Out Bus + Выходная шина + + + Logic/Other Logic + Логика/Другое (Логика) + + + + PICComponent + + Micro + Микроконтроллеры + + + Error + Ошибка + + + Only 1 Mcu allowed + to be in the Circuit. + Может быть использован +только 1 микроконтроллер. + + + + Pcd8544 + + Pcd8544 + PCD8544 + + + Outputs + Выходы + + + + PicProcessor + + File Not Found + Файл не найден + + + The file "%1" was not found. + Файл "%1" не найден. + + + Unkown Error: + Неизвестная ошибка: + + + Could not Create Pic Processor: "%1" + Не удалось создать PIC микроконтроллер: "%1" + + + Could not Load: "%1" + Не удалось загрузить: "%1" + + + + PlotterWidget + + Max + Макс + + + Min + Мини + + + Scale: + Масштаб: + + + Tracks: + Дорожки: + + + + Potentiometer + + Potentiometer + Потенциометр + + + Passive + Пассивные элементы + + + + Probe + + Probe + Измерительный щуп + + + Meters + Измерение + + + Add to Plotter + Добавить в графопостроитель + + + Remove from Plotter + Удалить из графопостроителя + + + Plotter Channel + Канал графопостроитель + + + Channel 1 + Канал 1 + + + Channel 2 + Канал 2 + + + Channel 3 + Канал 3 + + + Channel 4 + Канал 4 + + + + PropertiesWidget + + Here will be some help .............................................. + + + + + + Push + + Push + Кнопка + + + Switches + Переключатели + + + + QPropertyModel + + Name + Имя + + + Value + Значение + + + + Rail + + Rail. + Линия питания. + + + Sources + Источники + + + + Ram8bit + + 8bit Ram + Память 8-бит + + + Logic/Memory + Логика/память + + + + RamTable + + Reg. + Reg. + + + Dec + Десятичный + + + Binary + Бинарный + + + Load VarSet + Загрузить VarSet + + + Save VarSet + Сохранить VarSet + + + VarSets (*.vst);;All files (*.*) + VarSets (*.vst);;Все файлы (*.*) + + + Cannot write file %1: +%2. + Не удаётся записать файл %1: +%2. + + + Clear Selected + Очистить выбранное + + + Clear Table + Очистить Таблица + + + Load Variables + Загрузить переменные + + + Type + + + + Value + Значение + + + + Rectangle + + Rectangle + Прямоугольник + + + Other + Другое + + + + RelaySPST + + Relay (all) + Реле (все) + + + Switches + Переключатели + + + + Resistor + + Resistor + Резистор + + + Passive + Пассивные элементы + + + + ResistorDip + + ResistorDip + Резисторная сборка + + + Passive + Пассивные элементы + + + + SR04 + + HC-SR04 + + + + Sensors + датчиков + + + + SerialPortWidget + + N/A + Нет данных + + + Description: %1 + Описание: %1 + + + Manufacturer: %1 + Изготовитель: %1 + + + Serial number: %1 + Серийный номер: %1 + + + Connected to %1 : %2, %3, %4, %5, %6 + Подключен к %1 : %2, %3, %4, %5, %6 + + + Error + Ошибка + + + Custom + Настройка + + + None + Нет + + + Even + Чётный + + + Odd + Нечётный + + + Mark + Маркер + + + Space + Пробел + + + Settings + Настройки + + + Manufacturer: + Изготовитель: + + + Serial number: + Серийный номер: + + + Description: + Описание: + + + Open + Открыть + + + Close + Закрыть + + + Parity: + Чётность: + + + Flow control: + Управление потоком: + + + Stop bits: + Стоповые биты: + + + BaudRate: + Бит в секунду: + + + Data bits: + Биты данных: + + + + Servo + + Servo + Сервопривод + + + Outputs + Выходы + + + + SevenSegment + + 7 Segment + 7-сегментный светодиод + + + Outputs + Выходы + + + + SevenSegmentBCD + + 7 Seg BCD + 7-сегментный декодер + + + Logic + Логика + + + Logic/Other Logic + Логика/Другое (Логика) + + + + ShiftReg + + Shift Reg. + Сдвиговый регистр. + + + Logic/Arithmetic + Логика/арифметика + + + + Stepper + + Stepper + Шаговый двигатель + + + Outputs + Выходы + + + + SubCircuit + + Subcircuit + Подсхема + + + Cannot read file %1: +%2. + Не удаётся прочитать файл %1: +%2. + + + Cannot set file %1 +to DomDocument + Не удаётся загрузить файл %1 +в DOMDocument + + + Error reading Subcircuit file: %1 + + Ошибка чтения файла подсхемы: %1 + + + + There are no data files for + + + + + SubPackage + + Package + + + + Logic + Логика + + + +Package has been modified. +Do you want to save your changes? + + + + + Move Pin + + + + Delete Pin + + + + Load Package + + + + Save Package + + + + Load Package File + + + + Packages (*.package);;All files (*.*) + + + + Cannot write file %1: +%2. + Не удаётся записать файл %1: +%2. + + + Other + Другое + + + Edit Pin + + + + + Switch + + Switches + Переключатели + + + Switch (all) + Переключатели (все) + + + + SwitchDip + + Switches + Переключатели + + + Switch Dip + Переключатели Dip + + + + TerminalWidget + + Send Text: + Текст: + + + Send Value: + Значение: + + + Print: + печатать: + + + Value + Значение + + + Received From Micro: + Полученные от Микроконтроллеры: + + + Sent to Micro: + Отправлено в Микроконтроллеры: + + + CR + + + + Clear + + + + + TextComponent + + Text + Текст + + + Other + Другое + + + + VoltReg + + Volt. Regulator + Регулятор напряжения + + + Active + Активные элементы + + + + VoltSource + + Volt. Source + Источник напряжения + + + Sources + Источники + + + + Voltimeter + + Voltimeter + Вольтметер + + + Meters + Измерение + + + + WaveGen + + Wave Gen. + Генератор. + + + Sources + Источники + + + + XorGate + + Xor Gate + Исключающее ИЛИ + + + Logic/Gates + Логика/ворота + + + + elCapacitor + + Electrolytic Capacitor + Электролитический конденсатор + + + Passive + Пассивные элементы + + + + xmlfile + + Logic + Логика + + + diff --git a/src/appiface.h b/src/appiface.h new file mode 100644 index 0000000..a2b3487 --- /dev/null +++ b/src/appiface.h @@ -0,0 +1,39 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef APPIFACE_H +#define APPIFACE_H + +#include + +class AppIface +{ + public: + virtual ~AppIface() {} + virtual void initialize() = 0; + virtual void terminate() = 0; +}; + + +QT_BEGIN_NAMESPACE +Q_DECLARE_INTERFACE(AppIface, "com.SimulIDE.Plugin.AppIface/1.0"); +QT_END_NAMESPACE + +#endif + diff --git a/src/application.qrc b/src/application.qrc new file mode 100644 index 0000000..bc0752f --- /dev/null +++ b/src/application.qrc @@ -0,0 +1,147 @@ + + + ../src/icons/components/null.png + + ../src/icons/simulide.png + ../src/icons/components/null-0.png + ../src/icons/mainwindow/new.png + ../src/icons/mainwindow/open.png + ../src/icons/mainwindow/save.png + ../src/icons/mainwindow/saveas.png + ../src/icons/mainwindow/help.png + ../src/icons/mainwindow/about.png + + ../src/icons/mainwindow/new.png + ../src/icons/mainwindow/open.png + ../src/icons/mainwindow/save.png + ../src/icons/mainwindow/saveas.png + + ../src/icons/mainwindow/cut.png + ../src/icons/mainwindow/copy.png + ../src/icons/mainwindow/paste.png + + ../src/icons/mainwindow/cdup.png + ../src/icons/mainwindow/rotateCCW.png + ../src/icons/mainwindow/rotateCW.png + ../src/icons/mainwindow/find.png + + ../src/icons/mainwindow/verify.png + ../src/icons/mainwindow/verify.png + + ../src/icons/mainwindow/finish.png + ../src/icons/mainwindow/step.png + ../src/icons/mainwindow/stepover.png + ../src/icons/mainwindow/play.png + ../src/icons/mainwindow/runtobk.png + ../src/icons/mainwindow/pause.png + ../src/icons/mainwindow/reset.png + ../src/icons/mainwindow/stop.png + + ../src/icons/mainwindow/poweroff.png + ../src/icons/mainwindow/poweron.png + ../src/icons/mainwindow/powerdeb.png + + ../src/icons/mainwindow/remove.png + ../src/icons/mainwindow/properties.png + ../src/icons/mainwindow/rotateCW.png + ../src/icons/mainwindow/rotateCCW.png + ../src/icons/mainwindow/rotate180.png + ../src/icons/mainwindow/hflip.png + ../src/icons/mainwindow/vflip.png + ../src/icons/mainwindow/load.png + ../src/icons/mainwindow/reload.png + ../src/icons/mainwindow/terminal.png + ../src/icons/mainwindow/closeterminal.png + ../src/icons/mainwindow/saveimage.png + + ../src/icons/mainwindow/rename.png + ../src/icons/mainwindow/invert.png + ../src/icons/mainwindow/unuse.png + + ../src/icons/mainwindow/breakpoint.png + ../src/icons/mainwindow/nobreakpoint.png + + ../src/icons/components/led.png + ../src/icons/components/diode.png + ../src/icons/components/probe.png + ../src/icons/components/resistor.png + ../src/icons/components/voltage.png + ../src/icons/components/ic2.png + ../src/icons/components/subc.png + ../src/icons/components/subc2.png + ../src/icons/components/ground.png + ../src/icons/components/voltsource.png + ../src/icons/components/capacitor.png + ../src/icons/components/elcapacitor.png + ../src/icons/components/seven_segment.png + ../src/icons/components/7segbcd.png + ../src/icons/components/switch.png + ../src/icons/components/switchdip.png + ../src/icons/components/inductor.png + ../src/icons/components/buffer.png + ../src/icons/components/andgate.png + ../src/icons/components/orgate.png + ../src/icons/components/xorgate.png + ../src/icons/components/flipflopd.png + ../src/icons/components/flipflopjk.png + ../src/icons/components/potentiometer.png + ../src/icons/components/push.png + ../src/icons/components/opamp.png + ../src/icons/components/pcd8544.png + ../src/icons/components/ks0108.png + ../src/icons/components/hd44780.png + ../src/icons/components/mosfet.png + ../src/icons/components/steeper.png + ../src/icons/components/clock.png + ../src/icons/components/resistordip.png + ../src/icons/components/ledbar.png + ../src/icons/components/ledmatrix.png + ../src/icons/components/text.png + ../src/icons/components/voltimeter.png + ../src/icons/components/amperimeter.png + ../src/icons/components/frequencimeter.png + ../src/icons/components/servo.png + ../src/icons/components/relay-spst.png + ../src/icons/components/voltreg.png + ../src/icons/components/bjt.png + ../src/icons/components/wavegen.png + ../src/icons/components/oscope.png + ../src/icons/components/toggleswitch.png + ../src/icons/components/audio_out.png + ../src/icons/components/keypad.png + ../src/icons/components/ellipse.png + ../src/icons/components/line.png + ../src/icons/components/rectangle.png + + ../src/icons/components/inbus.png + ../src/icons/components/outbus.png + ../src/icons/components/1to2.png + ../src/icons/components/1to3.png + ../src/icons/components/1to3-c.png + ../src/icons/components/2to1.png + ../src/icons/components/2to2.png + ../src/icons/components/2to3.png + ../src/icons/components/2to3g.png + ../src/icons/components/3to1.png + ../src/icons/components/3to2.png + ../src/icons/components/3to2g.png + ../src/icons/components/mux.png + ../src/icons/components/demux.png + ../src/icons/components/gates.png + + ../src/icons/mainwindow/switchbut.png + + ../src/icons/components/arduinoUnoIcon.png + ../src/icons/components/arduinoUno.png + ../src/icons/components/arduinoNano.png + ../src/icons/components/duemilanove.png + ../src/icons/components/leonardo.png + ../src/icons/components/mega.png + ../src/icons/components/sr04.png + + ../src/icons/components/blanc.png + ../src/icons/font/font2.png + + + + diff --git a/src/gpsim/12bit-hexdecode.cc b/src/gpsim/12bit-hexdecode.cc new file mode 100644 index 0000000..d4716fd --- /dev/null +++ b/src/gpsim/12bit-hexdecode.cc @@ -0,0 +1,153 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +// T. Scott Dattalo 12bit core routines + +/* pic12.c - pic 12bit core routines */ +/* version 0.1 */ +/* (c) I.King 1994 */ + +#include + +#include "config.h" +#include "12bit-processors.h" +#include "12bit-instructions.h" + +instruction * disasm12 (pic_processor *cpu, uint address, uint inst) +{ + + unsigned char topnibble; + unsigned char midnibble; + unsigned char lownibble; + unsigned char bbyte; + unsigned char bits6and7; + + topnibble = (inst & 0x0f00) >> 8; + midnibble = (inst & 0x00f0) >> 4; + lownibble = (inst & 0x000f); + bbyte = (inst & 0x00ff); + bits6and7 = (unsigned char)((int) (bbyte & 0xc0) >> 6); + + switch(topnibble) + { + case 0x00: + if (midnibble == 0) + switch(lownibble) + { + case 0x00: + return(new NOP(cpu,inst,address)); + case 0x02: + return(new OPTION(cpu,inst,address)); + case 0x03: + return(new SLEEP(cpu,inst,address)); + case 0x04: + return(new CLRWDT(cpu,inst,address)); + default: + return(new TRIS(cpu,inst,address)); + } + else + switch(bits6and7) + { + case 0x00: + return(new MOVWF(cpu,inst,address)); + case 0x01: + if(midnibble & 0x02) + return(new CLRF(cpu,inst,address)); + else + return(new CLRW(cpu,inst,address)); + case 0x02: + return(new SUBWF(cpu,inst,address)); + case 0x03: + return(new DECF(cpu,inst,address)); + + } + + break; + + case 0x01: switch(bits6and7) + { + case 0x00: + return(new IORWF(cpu,inst,address)); + case 0x01: + return(new ANDWF(cpu,inst,address)); + case 0x02: + return(new XORWF(cpu,inst,address)); + case 0x03: + return(new ADDWF(cpu,inst,address)); + } + break; + + case 0x02: switch(bits6and7) + { + case 0x00: + return(new MOVF(cpu,inst,address)); + case 0x01: + return(new COMF(cpu,inst,address)); + case 0x02: + return(new INCF(cpu,inst,address)); + case 0x03: + return(new DECFSZ(cpu,inst,address)); + } + break; + + case 0x03: switch(bits6and7) + { + case 0x00: + return(new RRF(cpu,inst,address)); + case 0x01: + return(new RLF(cpu,inst,address)); + case 0x02: + return(new SWAPF(cpu,inst,address)); + case 0x03: + return(new INCFSZ(cpu,inst,address)); + } + + break; + + case 0x04: + return(new BCF(cpu,inst,address)); + case 0x05: + return(new BSF(cpu,inst,address)); + case 0x06: + return(new BTFSC(cpu,inst,address)); + case 0x07: + return(new BTFSS(cpu,inst,address)); + + case 0x08: + return(new RETLW(cpu,inst,address)); + case 0x09: + return(new CALL(cpu,inst,address)); + case 0x0a: + case 0x0b: + return(new GOTO(cpu,inst,address)); + case 0x0c: + return(new MOVLW(cpu,inst,address)); + case 0x0d: + return(new IORLW(cpu,inst,address)); + case 0x0e: + return(new ANDLW(cpu,inst,address)); + case 0x0f: + return(new XORLW(cpu,inst,address)); + } + // shouldn't get here + return 0; +} + +/* ... The End ... */ diff --git a/src/gpsim/12bit-instructions.h b/src/gpsim/12bit-instructions.h new file mode 100644 index 0000000..5d917de --- /dev/null +++ b/src/gpsim/12bit-instructions.h @@ -0,0 +1,451 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#ifndef __12BIT_INSTRUCTIONS_H__ +#define __12BIT_INSTRUCTIONS_H__ + +#include "pic-instructions.h" + +//--------------------------------------------------------- +class ADDWF : public Register_op +{ +public: + + ADDWF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new ADDWF(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- + +class ANDLW : public Literal_op +{ + +public: + ANDLW(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new ANDLW(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class ANDWF : public Register_op +{ +public: + + ANDWF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new ANDWF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class BCF : public Bit_op +{ +public: + + BCF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode,uint address) + {return new BCF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class BSF : public Bit_op +{ +public: + + BSF(Processor *new_cpu, uint new_opcode,uint address); + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode,uint address) + {return new BSF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class BTFSC : public Bit_op +{ +public: + + BTFSC(Processor *new_cpu, uint new_opcode,uint address); + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode,uint address) + {return new BTFSC(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class BTFSS : public Bit_op +{ +public: + + BTFSS(Processor *new_cpu, uint new_opcode,uint address); + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode,uint address) + {return new BTFSS(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class CALL : public instruction +{ +public: + uint destination; + + CALL(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *str,int len); + virtual bool isBase() { return true;} + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new CALL(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class CLRF : public Register_op +{ +public: + + CLRF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *str,int len); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new CLRF(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class CLRW : public instruction +{ +public: + + CLRW(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new CLRW(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class CLRWDT : public instruction +{ +public: + + CLRWDT(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new CLRWDT(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class COMF : public Register_op +{ +public: + + COMF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new COMF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class DECF : public Register_op +{ +public: + + DECF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new DECF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class DECFSZ : public Register_op +{ +public: + + DECFSZ(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new DECFSZ(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class GOTO : public instruction +{ +public: + uint destination; + + GOTO(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual bool isBase() { return true;} + virtual char *name(char *str,int len); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new GOTO(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class INCF : public Register_op +{ +public: + + INCF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new INCF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class INCFSZ : public Register_op +{ +public: + + INCFSZ(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new INCFSZ(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- + +class IORLW : public Literal_op +{ + +public: + IORLW(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new IORLW(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class IORWF : public Register_op +{ +public: + + IORWF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new IORWF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class MOVF : public Register_op +{ +public: + + MOVF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual void debug(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- + +class MOVLW : public Literal_op +{ +public: + MOVLW(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVLW(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class MOVWF : public Register_op +{ +public: + + MOVWF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *str,int len); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVWF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class NOP : public instruction +{ +public: + + NOP(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new NOP(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class OPTION : public instruction +{ +public: + + OPTION(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new OPTION(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- + +class RETLW : public Literal_op +{ +public: + + RETLW(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new RETLW(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class RLF : public Register_op +{ +public: + + RLF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new RLF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class RRF : public Register_op +{ +public: + + RRF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new RRF(new_cpu,new_opcode,address);} + +}; + + +//--------------------------------------------------------- +class SLEEP : public instruction +{ +public: + + SLEEP(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new SLEEP(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class SUBWF : public Register_op +{ +public: + + SUBWF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new SUBWF(new_cpu,new_opcode,address);} + +}; + + +//--------------------------------------------------------- +class SWAPF : public Register_op +{ +public: + + SWAPF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new SWAPF(new_cpu,new_opcode,address);} + +}; + + +//--------------------------------------------------------- +class TRIS : public Register_op +{ +public: + Register *reg; + + TRIS(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *str,int len); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new TRIS(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- + +class XORLW : public Literal_op +{ + +public: + + XORLW(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new XORLW(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class XORWF : public Register_op +{ +public: + + XORWF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new XORWF(new_cpu,new_opcode,address);} + +}; + + +#endif /* __12BIT_INSTRUCTIONS_H__ */ diff --git a/src/gpsim/12bit-processors.cc b/src/gpsim/12bit-processors.cc new file mode 100644 index 0000000..488fd94 --- /dev/null +++ b/src/gpsim/12bit-processors.cc @@ -0,0 +1,141 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include +#include +#include + +#include "config.h" +#include "12bit-processors.h" + +#include +#include "stimuli.h" + +extern uint config_word; + +//------------------------------------------------------------------- +_12bit_processor::_12bit_processor(const char *_name, const char *desc) + : pic_processor(_name, desc) +{ + pc = new Program_Counter("pc", "Program Counter", this); + option_reg = new OPTION_REG(this, "option_reg"); + stack = new Stack(this); +} + +_12bit_processor::~_12bit_processor() +{ + delete pc; + + delete_sfr_register(fsr); + delete_sfr_register(option_reg); +} + +void _12bit_processor::reset(RESET_TYPE r) +{ + option_reg->reset(r); + pic_processor::reset(r); +} + +void _12bit_processor::save_state() +{ + pic_processor::save_state(); +} + +bool _12bit_processor::set_config_word(uint address,uint cfg_word) +{ + + // Clear all of the configuration bits in config_modes and then + // reset each of them based on the config bits in cfg_word: + //config_modes &= ~(CM_WDTE); + //config_modes |= ( (cfg_word & WDTE) ? CM_WDTE : 0); + //cout << " setting cfg_word and cfg_modes " << hex << config_word << " " << config_modes << '\n'; + + if((address == config_word_address()) && config_modes) { + config_word = cfg_word; + + if (m_configMemory && m_configMemory->getConfigWord(0)) + m_configMemory->getConfigWord(0)->set((int)cfg_word); + + /* + config_modes->config_mode = (config_modes->config_mode & ~7) | (cfg_word & 7); + + config_word = cfg_word; + + if((bool)verbose && config_modes) + config_modes->print(); + */ + return true; + } + return false; +} + +void _12bit_processor::create() +{ + pa_bits = 0; // Assume only one code page (page select bits in status) + + pic_processor::create(); + + fsr = new FSR_12(this,"fsr",fsr_register_page_bits(), fsr_valid_bits()); + + // Sigh. Hack, hack,... manually assign indf bits + indf->fsr_mask = 0x1f; + indf->base_address_mask1 = 0x0; + indf->base_address_mask2 = 0x1f; + + stack->stack_mask = 1; // The 12bit core only has 2 stack positions + + //1 tmr0.set_cpu(this); + //1 tmr0.start(0); +} + +void _12bit_processor::create_config_memory() +{ + m_configMemory = new ConfigMemory(this,1); + m_configMemory->addConfigWord(0,new ConfigWord("CONFIG", 0xfff,"Configuration Word",this,0xfff)); +} + +void _12bit_processor::option_new_bits_6_7(uint bits) +{ + cout << "12bit, option bits 6 and/or 7 changed\n"; +} + +void _12bit_processor::put_option_reg(uint val) +{ + option_reg->put(val); +} + +void _12bit_processor::dump_registers () +{ +} + +void _12bit_processor::enter_sleep() +{ + tmr0.sleep(); + pic_processor::enter_sleep(); +} + +void _12bit_processor::exit_sleep() +{ + if (m_ActivityState == ePASleeping) + { + tmr0.wake(); + pic_processor::exit_sleep(); + } +} diff --git a/src/gpsim/12bit-processors.h b/src/gpsim/12bit-processors.h new file mode 100644 index 0000000..d1d2a08 --- /dev/null +++ b/src/gpsim/12bit-processors.h @@ -0,0 +1,115 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include "pic-processor.h" + +#ifndef __12_BIT_PROCESSORS_H__ +#define __12_BIT_PROCESSORS_H__ + +class _12bit_processor; +class IOPIN; +class OptionTraceType; + +extern instruction *disasm12 (pic_processor *cpu,uint address,uint inst); + +class _12bit_processor : public pic_processor +{ + public: + + #define WDTE 4 + + enum _12BIT_DEFINITIONS + { + PA0 = 1<<5, /* Program page preselect bits (in status) */ + PA1 = 1<<6, + PA2 = 1<<7, + + RP0 = 1<<5, /* Register page select bits (in fsr) */ + RP1 = 1<<6 + + }; + + uint pa_bits; /* a CPU dependent bit-mask defining which of the program + * page bits in the status register are significant. */ + OPTION_REG *option_reg; + + + virtual void reset(RESET_TYPE r); + virtual void save_state(); + + #define FILE_REGISTERS 0x100 + virtual uint register_memory_size () const { return FILE_REGISTERS;} + virtual void dump_registers(); + virtual void tris_instruction(uint tris_register){return;} + virtual void create(); + virtual void create_config_memory(); + virtual PROCESSOR_TYPE isa(){return _12BIT_PROCESSOR_;} + virtual PROCESSOR_TYPE base_isa(){return _12BIT_PROCESSOR_;} + virtual instruction * disasm (uint address, uint inst) + { + return disasm12(this, address, inst); + } + void interrupt() { return; } + + // Declare a set of functions that will allow the base class to + // get information about the derived classes. NOTE, the values returned here + // will cause errors if they are used -- the derived classes must define their + // parameters appropriately. + virtual uint program_memory_size(){ return 3; }; // A bogus value that will cause errors if used + // The size of a program memory bank is 2^11 bytes for the 12-bit core + virtual void create_sfr_map() { return;}; + + // Return the portion of pclath that is used during branching instructions + // Actually, the 12bit core has no pclath. However, the program counter class doesn't need + // to know that. Thus this virtual function really just returns the code page for the + // 12bit cores. + + virtual uint get_pclath_branching_jump() + { + return ((status->value.get() & pa_bits) << 4); + } + + // The modify pcl type instructions execute exactly like call instructions + virtual uint get_pclath_branching_modpcl() + { return ((status->value.get() & pa_bits) << 4);} + + // The valid bits in the FSR register vary across the various 12-bit devices + virtual uint fsr_valid_bits() { return 0x1f; } // Assume only 32 register addresses + + virtual uint fsr_register_page_bits() { return 0; }// Assume only one register page. + + virtual void put_option_reg(uint); + virtual void option_new_bits_6_7(uint); + + virtual uint config_word_address() const {return 0xfff;}; + virtual bool set_config_word(uint address, uint cfg_word); + virtual void enter_sleep(); + virtual void exit_sleep(); + + _12bit_processor(const char *_name=0, const char *desc=0); + virtual ~_12bit_processor(); + + protected: + OptionTraceType *mOptionTT; +}; + +#define cpu12 ( (_12bit_processor *)cpu) + +#endif diff --git a/src/gpsim/14bit-hexdecode.cc b/src/gpsim/14bit-hexdecode.cc new file mode 100644 index 0000000..dbeaf30 --- /dev/null +++ b/src/gpsim/14bit-hexdecode.cc @@ -0,0 +1,151 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + Copyright (C) 2013 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +// T. Scott Dattalo 14bit core routines + +// Portions of this file are from: +// +/* pic14.c - pic 14bit core routines */ +/* version 0.1 */ +/* (c) I.King 1994 */ + +#include + +#include "config.h" +#include "14bit-processors.h" +#include "14bit-instructions.h" + +struct instruction_constructor op_16ext[] = { + { 0x3f80, 0x3100, ADDFSR::construct }, + { 0x3f00, 0x3d00, ADDWFC::construct }, + { 0x3f00, 0x3700, ASRF::construct }, + { 0x3e00, 0x3200, BRA::construct }, + { 0x3fff, 0x000b, BRW::construct }, + { 0x3fff, 0x000a, CALLW::construct }, + { 0x3ff8, 0x0010, MOVIW::construct }, + { 0x3f80, 0x3f00, MOVIW::construct }, + { 0x3fe0, 0x0020, MOVLB::construct }, + { 0x3f80, 0x3180, MOVLP::construct }, + { 0x3ff8, 0x0018, MOVWI::construct }, + { 0x3f80, 0x3f80, MOVWI::construct }, + { 0x3f00, 0x3500, LSLF::construct }, + { 0x3f00, 0x3600, LSRF::construct }, + { 0x3fff, 0x0001, RESET::construct }, + { 0x3f00, 0x3b00, SUBWFB::construct }, + +}; +struct instruction_constructor op_16cxx[] = { + + { 0x3f00, 0x3e00, ADDLW::construct }, + { 0x3f00, 0x3f00, ADDLW::construct }, // Accomdate don't care bit + { 0x3f00, 0x0700, ADDWF::construct }, + { 0x3f00, 0x3900, ANDLW::construct }, + { 0x3f00, 0x0500, ANDWF::construct }, + { 0x3c00, 0x1000, BCF::construct }, + { 0x3c00, 0x1400, BSF::construct }, + { 0x3c00, 0x1800, BTFSC::construct }, + { 0x3c00, 0x1c00, BTFSS::construct }, + { 0x3800, 0x2000, CALL::construct }, + { 0x3f80, 0x0180, CLRF::construct }, + { 0x3fff, 0x0103, CLRW::construct }, + { 0x3fff, 0x0064, CLRWDT::construct }, + { 0x3f00, 0x0900, COMF::construct }, + { 0x3f00, 0x0300, DECF::construct }, + { 0x3f00, 0x0b00, DECFSZ::construct }, + { 0x3800, 0x2800, GOTO::construct }, + { 0x3f00, 0x0a00, INCF::construct }, + { 0x3f00, 0x0f00, INCFSZ::construct }, + { 0x3f00, 0x3800, IORLW::construct }, + { 0x3f00, 0x0400, IORWF::construct }, + { 0x3f00, 0x0800, MOVF::construct }, + { 0x3f00, 0x3000, MOVLW::construct }, + { 0x3f00, 0x3100, MOVLW::construct }, + { 0x3f00, 0x3200, MOVLW::construct }, + { 0x3f00, 0x3300, MOVLW::construct }, + { 0x3f80, 0x0080, MOVWF::construct }, + { 0x3fff, 0x0000, NOP::construct }, + { 0x3fff, 0x0020, NOP::construct }, + { 0x3fff, 0x0040, NOP::construct }, + { 0x3fff, 0x0060, NOP::construct }, + { 0x3fff, 0x0062, OPTION::construct }, + { 0x3fff, 0x0009, RETFIE::construct }, + { 0x3f00, 0x3400, RETLW::construct }, + { 0x3f00, 0x3500, RETLW::construct }, + { 0x3f00, 0x3600, RETLW::construct }, + { 0x3f00, 0x3700, RETLW::construct }, + { 0x3fff, 0x0008, RETURN::construct }, + { 0x3f00, 0x0d00, RLF::construct }, + { 0x3f00, 0x0c00, RRF::construct }, + { 0x3fff, 0x0063, SLEEP::construct }, + { 0x3f00, 0x3c00, SUBLW::construct }, + { 0x3f00, 0x3d00, SUBLW::construct }, + { 0x3f00, 0x0200, SUBWF::construct }, + { 0x3fff, 0x0065, TRIS::construct }, + { 0x3fff, 0x0066, TRIS::construct }, + { 0x3fff, 0x0067, TRIS::construct }, + { 0x3f00, 0x0e00, SWAPF::construct }, + { 0x3f00, 0x3a00, XORLW::construct }, + { 0x3f00, 0x0600, XORWF::construct }, + +}; + + +const int NUM_OP_16CXX = sizeof(op_16cxx) / sizeof(op_16cxx[0]); +const int NUM_OP_16EXT = sizeof(op_16ext) / sizeof(op_16ext[0]); + + +instruction * disasm14 (_14bit_processor *cpu, uint addr, uint inst) +{ + instruction *pi; + + pi = 0; + + for(int i =0; i. +*/ + +#include +#include +#include + +#include "config.h" +#include "14bit-processors.h" +#include "14bit-instructions.h" + + +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("0x%06X %s() ",cycles.get(),__FUNCTION__); printf arg; } +#else +#define Dprintf(arg) {} +#endif +//--------------------------------------------------------- +ADDFSR::ADDFSR(Processor *new_cpu, uint new_opcode, const char *pName, uint address) + : instruction(new_cpu, new_opcode,address) +{ + m_fsr = (opcode>>6)&1; + m_lit = opcode & 0x3f; + if (m_lit & 0x20) m_lit -= 0x40; + + switch(m_fsr) { + case 0: + ia = &cpu14e->ind0; + break; + + case 1: + ia = &cpu14e->ind1; + break; + + } + + new_name(pName); + +} + +char *ADDFSR::name(char *return_str,int len) +{ + + snprintf(return_str,len,"%s\t%u,0x%x", + gpsimObject::name().c_str(), + m_fsr, + m_lit); + + return(return_str); +} + + +void ADDFSR::execute() +{ + ia->put_fsr(ia->fsr_value + m_lit); //ADDFSR + cpu_pic->pc->increment(); +} +//-------------------------------------------------- + +ADDLW::ADDLW (Processor *new_cpu, uint new_opcode, uint address) + : Literal_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("addlw"); +} + +void ADDLW::execute(void) +{ + uint old_value,new_value; + + new_value = (old_value = cpu14->Wget()) + L; + + cpu14->Wput(new_value & 0xff); + cpu14->status->put_Z_C_DC(new_value, old_value, L); + + cpu14->pc->increment(); + +} + + +//--------------------------------------------------------- +MOVIW::MOVIW(Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode,address) +{ + if (opcode & 0x3f00) // Index indirect + { + m_fsr = (opcode>>6)&1; + m_lit = opcode & 0x3f; + if (m_lit & 0x20) m_lit -= 0x40; + m_op = DELTA; + Dprintf((" shift op %x fsr %u data %d raw %u\n", opcode >> 6, m_fsr, m_lit, opcode & 0x3f)); + + } + else + { + m_fsr = (opcode>>2)&1; + m_op = opcode & 0x3; + } + + switch(m_fsr) { + case 0: + ia = &cpu14e->ind0; + break; + + case 1: + ia = &cpu14e->ind1; + break; + } + + new_name("moviw"); + +} + +char *MOVIW::name(char *return_str,int len) +{ + + switch(m_op) + { + case PREINC: + snprintf(return_str,len,"%s\t++FSR%u", + gpsimObject::name().c_str(), + m_fsr); + break; + + case PREDEC: + snprintf(return_str,len,"%s\t--FSR%u", + gpsimObject::name().c_str(), + m_fsr); + break; + + case POSTINC: + snprintf(return_str,len,"%s\tFSR%u++", + gpsimObject::name().c_str(), + m_fsr); + break; + + case POSTDEC: + snprintf(return_str,len,"%s\tFSR%u--", + gpsimObject::name().c_str(), + m_fsr); + break; + + case DELTA: + snprintf(return_str,len,"%s\t%d[FSR%u]", + gpsimObject::name().c_str(), m_lit, + m_fsr); + break; + } + + return(return_str); +} + + +void MOVIW::execute() +{ + uint new_value = 0; + + if (m_op == PREINC) + { + ia->put_fsr(ia->fsr_value + 1); + new_value = ia->indf.get(); + cpu14->Wput(new_value); + } + else if (m_op == PREDEC) + { + ia->put_fsr(ia->fsr_value - 1); + new_value = ia->indf.get(); + cpu14->Wput(new_value); + } + else if (m_op == POSTINC) + { + new_value = ia->indf.get(); + cpu14->Wput(new_value); + ia->put_fsr(ia->fsr_value + 1); + } + else if (m_op == POSTDEC) + { + new_value = ia->indf.get(); + cpu14->Wput(new_value); + ia->put_fsr(ia->fsr_value - 1); + } + else if (m_op == DELTA) + { + ia->fsr_delta = m_lit; + new_value = ia->indf.get(); + cpu14->Wput(new_value); + } + cpu14->status->put_Z(new_value==0); + cpu_pic->pc->increment(); +} +//--------------------------------------------------------- +MOVWI::MOVWI(Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode,address) +{ + if (opcode & 0x3f00) // Index indirect + { + m_fsr = (opcode>>6)&1; + m_lit = opcode & 0x3f; + if (m_lit & 0x20) m_lit -= 0x40; + m_op = DELTA; + Dprintf((" shift op %x fsr %u data %d\n", opcode>>6, m_fsr, m_lit)); + + } + else + { + m_fsr = (opcode>>2)&1; + m_op = opcode & 0x3; + } + + switch(m_fsr) { + case 0: + ia = &cpu14e->ind0; + break; + + case 1: + ia = &cpu14e->ind1; + break; + } + + new_name("movwi"); + +} + +char *MOVWI::name(char *return_str,int len) +{ + + switch(m_op) + { + case PREINC: + snprintf(return_str,len,"%s\t++FSR%u", + gpsimObject::name().c_str(), + m_fsr); + break; + + case PREDEC: + snprintf(return_str,len,"%s\t--FSR%u", + gpsimObject::name().c_str(), + m_fsr); + break; + + case POSTINC: + snprintf(return_str,len,"%s\tFSR%u++", + gpsimObject::name().c_str(), + m_fsr); + break; + + case POSTDEC: + snprintf(return_str,len,"%s\tFSR%u--", + gpsimObject::name().c_str(), + m_fsr); + break; + + case DELTA: + snprintf(return_str,len,"%s\t%d[FSR%u]", + gpsimObject::name().c_str(), m_lit, + m_fsr); + break; + } + + return(return_str); +} + + +void MOVWI::execute() +{ + if (m_op == PREINC) + { + ia->put_fsr(ia->fsr_value + 1); + ia->indf.put(cpu14->Wget()); + } + else if (m_op == PREDEC) + { + ia->put_fsr(ia->fsr_value - 1); + ia->indf.put(cpu14->Wget()); + } + else if (m_op == POSTINC) + { + ia->indf.put(cpu14->Wget()); + ia->put_fsr(ia->fsr_value + 1); + } + else if (m_op == POSTDEC) + { + ia->indf.put(cpu14->Wget()); + ia->put_fsr(ia->fsr_value - 1); + } + else if (m_op == DELTA) + { + Dprintf((" DELTA fsr %u delta %d\n", m_fsr, m_lit)); + ia->fsr_delta = m_lit; + ia->indf.put(cpu14->Wget()); + } + cpu_pic->pc->increment(); +} +//-------------------------------------------------- + +MOVLB::MOVLB (Processor *new_cpu, uint new_opcode, uint address) + : Literal_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("movlb"); +} + +void MOVLB::execute() +{ + cpu_pic->registers[cpu14e->bsr.address]->put(L); + + cpu_pic->pc->increment(); + +} + +char *MOVLB::name(char *return_str,int len) +{ + snprintf(return_str,len,"%s\t0x%02x", + gpsimObject::name().c_str(),L&0x1f); + + return(return_str); + +} + +//-------------------------------------------------- + +RETFIE::RETFIE (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu,new_opcode,address) +{ + decode(new_cpu, new_opcode); + new_name("retfie"); +} + +void RETFIE::execute(void) +{ + cpu14->pc->new_address(cpu14->stack->pop()); + cpu14->intcon->in_interrupt = false; + // test for pending intterrupts + cpu14->intcon->put_value(cpu14->intcon->value.get()); + if(cpu_pic->base_isa() == _14BIT_E_PROCESSOR_) + { + cpu14e->status->put(cpu14e->status_shad.get()); + cpu14e->Wput(cpu14e->wreg_shad.get()); + cpu14e->bsr.put(cpu14e->bsr_shad.get()); + cpu14e->pclath->put(cpu14e->pclath_shad.get()); + cpu14e->ind0.fsrl.put(cpu14e->fsr0l_shad.get()); + cpu14e->ind0.fsrh.put(cpu14e->fsr0h_shad.get()); + cpu14e->ind1.fsrl.put(cpu14e->fsr1l_shad.get()); + cpu14e->ind1.fsrh.put(cpu14e->fsr1h_shad.get()); + } +} + +//-------------------------------------------------- + +RETURN::RETURN (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu,new_opcode,address) +{ + decode(new_cpu, new_opcode); + new_name("return"); +} + +void RETURN::execute(void) +{ + cpu14->pc->new_address(cpu14->stack->pop()); +} + +//-------------------------------------------------- + +SUBLW::SUBLW (Processor *new_cpu, uint new_opcode, uint address) + : Literal_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("sublw"); +} + +void SUBLW::execute(void) +{ + uint old_value,new_value; + + new_value = L - (old_value = cpu14->Wget()); + + cpu14->Wput(new_value & 0xff); + + cpu14->status->put_Z_C_DC_for_sub(new_value, old_value, L); + + cpu14->pc->increment(); + +} + diff --git a/src/gpsim/14bit-instructions.h b/src/gpsim/14bit-instructions.h new file mode 100644 index 0000000..363f2c6 --- /dev/null +++ b/src/gpsim/14bit-instructions.h @@ -0,0 +1,304 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + 2013 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +class instruction; // forward declaration for the include files that follow + +#ifndef __14BIT_INSTRUCTIONS_H__ +#define __14BIT_INSTRUCTIONS_H__ + +#define REG_IN_INSTRUCTION_MASK 0x7f +#define DESTINATION_MASK 0x80 + +#include "pic-instructions.h" +#include "12bit-instructions.h" +#include "14bit-registers.h" + + +//--------------------------------------------------------- +class ADDFSR : public instruction +{ + +public: + ADDFSR(Processor *new_cpu, uint new_opcode,const char *, uint address); + virtual bool isBase() { return true;} + virtual void execute(); + virtual char *name(char *,int); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + { + return new ADDFSR(new_cpu,new_opcode,"addfsr", address); + } +protected: + uint m_fsr; + int m_lit; + Indirect_Addressing14 *ia; +}; + +//--------------------------------------------------------- + +class ADDLW : public Literal_op +{ + +public: + ADDLW(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(void); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new ADDLW(new_cpu,new_opcode, address);} + +}; + +//--------------------------------------------------------- +class ADDWFC : public Register_op +{ +public: + + ADDWFC(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new ADDWFC(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class BRA : public instruction +{ +public: + int destination_index; + uint absolute_destination_index; + + BRA(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *,int); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BRA(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class BRW : public instruction +{ +public: + int destination_index; + uint current_address; + + BRW(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *,int); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BRW(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class ASRF : public Register_op +{ +public: + + ASRF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new ASRF(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class CALLW : public instruction +{ +public: + CALLW(Processor *new_cpu, uint new_opcode, uint address); + virtual bool isBase() { return true;} + virtual void execute(); + virtual char *name(char *,int); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + { + return new CALLW(new_cpu,new_opcode,address); + } +}; + +//--------------------------------------------------------- +class LSLF : public Register_op +{ +public: + + LSLF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new LSLF(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class LSRF : public Register_op +{ +public: + + LSRF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new LSRF(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class MOVIW : public instruction +{ +public: + + MOVIW(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVIW(new_cpu,new_opcode,address);} + virtual char *name(char *,int); + + enum { + PREINC, + PREDEC, + POSTINC, + POSTDEC, + DELTA + }; +protected: + uint m_fsr; + int m_lit; + uint m_op; + Indirect_Addressing14 *ia; +}; + + +//--------------------------------------------------------- +class MOVWI : public instruction +{ +public: + + MOVWI(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVWI(new_cpu,new_opcode,address);} + virtual char *name(char *,int); + + enum { + PREINC, + PREDEC, + POSTINC, + POSTDEC, + DELTA + }; +protected: + uint m_fsr; + int m_lit; + uint m_op; + Indirect_Addressing14 *ia; +}; + + + +//--------------------------------------------------------- + +class MOVLB : public Literal_op +{ +public: + MOVLB(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *return_str,int len); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVLB(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- + +class MOVLP : public Literal_op +{ +public: + MOVLP(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *return_str,int len); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVLP(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class RESET : public instruction +{ +public: + + RESET(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new RESET(new_cpu,new_opcode,address);} + +}; + + +//--------------------------------------------------------- +class RETFIE : public instruction +{ +public: + + RETFIE(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(void); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new RETFIE(new_cpu,new_opcode,address);} + +}; + + +//--------------------------------------------------------- +class RETURN : public instruction +{ +public: + + RETURN(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(void); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new RETURN(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- + +class SUBLW : public Literal_op +{ + +public: + + SUBLW(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(void); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new SUBLW(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class SUBWFB : public Register_op +{ +public: + + SUBWFB(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new SUBWFB(new_cpu,new_opcode,address);} +}; + + + +#endif // __14BIT_INSTRUCTIONS_H__ diff --git a/src/gpsim/14bit-processors.cc b/src/gpsim/14bit-processors.cc new file mode 100644 index 0000000..3d6f415 --- /dev/null +++ b/src/gpsim/14bit-processors.cc @@ -0,0 +1,628 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + Copyright (C) 2009,2013 Roy R. Rankin + + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include +#include +#include + +#include "config.h" +#include "14bit-processors.h" +#include "pic-ioports.h" +#include "pic-registers.h" +#include +#include "stimuli.h" +#include "packages.h" + +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("0x%06X %s() ",cycles.get(),__FUNCTION__); printf arg; } +#else +#define Dprintf(arg) {} +#endif +//======================================================================== +// Generic Configuration word for the midrange family. + +class Generic14bitConfigWord : public ConfigWord +{ +public: + Generic14bitConfigWord(_14bit_processor *pCpu) + : ConfigWord("CONFIG", 0x3fff, "Configuration Word", pCpu, 0x2007) + { + assert(pCpu); + pCpu->wdt.initialize(true); + } + + enum { + FOSC0 = 1<<0, + FOSC1 = 1<<1, + WDTEN = 1<<2, + PWRTEN = 1<<3 + }; + + virtual void set(int64_t v) + { + int64_t oldV = getVal(); + + Integer::set(v); + if (m_pCpu) { + + int64_t diff = oldV ^ v; + + if (diff & WDTEN) + m_pCpu->wdt.initialize((v & WDTEN) == WDTEN); + + m_pCpu->config_modes->set_fosc01(v & (FOSC0 | FOSC1)); + m_pCpu->config_modes->set_wdte((v&WDTEN)==WDTEN); + m_pCpu->config_modes->set_pwrte((v&PWRTEN)==PWRTEN); + + } + + } + + virtual string toString() + { + int64_t i64; + get(i64); + int i = i64 &0xfff; + + char buff[256]; + + snprintf(buff,sizeof(buff), + "$%3x\n" + " FOSC=%d - Clk source = %s\n" + " WDTEN=%d - WDT is %s\n" + " PWRTEN=%d - Power up timer is %s\n", + i, + i & (FOSC0 | FOSC1), + ((i & FOSC0) ? ((i & FOSC1) ? "EXTRC":"XT") :((i & FOSC1) ? "INTRC":"LP")), + ((i & WDTEN) ? 1 : 0), ((i & WDTEN) ? "enabled" : "disabled"), + ((i & PWRTEN) ? 1 : 0), ((i & PWRTEN) ? "disabled" : "enabled")); + + return string(buff); + } + +}; + + +//------------------------------------------------------------------- +_14bit_processor::_14bit_processor(const char *_name, const char *_desc) + : pic_processor(_name,_desc), intcon(0), + two_speed_clock(false), config_clock_mode(0), + m_cpu_temp(0), + has_SSP(false) + +{ + pc = new Program_Counter("pc", "Program Counter", this); + option_reg = new OPTION_REG(this,"option_reg"); + stack = new Stack(this); +} + +_14bit_processor::~_14bit_processor() +{ + unassignMCLRPin(); + delete_sfr_register(fsr); + delete_sfr_register(option_reg); + delete pc; pc=0; +} + +//------------------------------------------------------------------- +// +// +// create +// +// The purpose of this member function is to 'create' those things +// that are unique to the 14-bit core processors. + +void _14bit_processor :: create () +{ + pic_processor::create(); + fsr = new FSR(this, "fsr", "File Select Register for indirect addressing"); +} + +//------------------------------------------------------------------- +void _14bit_processor::interrupt () +{ + //bp.clear_interrupt(); + + intcon->in_interrupt = true; + bp.clear_interrupt(); + stack->push(pc->value); + + pc->interrupt(INTERRUPT_VECTOR); +} + +//------------------------------------------------------------------- +void _14bit_processor::save_state() +{ + pic_processor::save_state(); +} + +//------------------------------------------------------------------- +void _14bit_processor::option_new_bits_6_7(uint bits) +{ + cout << "14bit, option bits 6 and/or 7 changed\n"; +} +//------------------------------------------------------------------- +void _14bit_processor::put_option_reg(uint val) +{ + option_reg->put(val); +} + + +//------------------------------------------------------------------ +// Fetch the rom contents at a particular address. +uint _14bit_processor::get_program_memory_at_address(uint address) +{ + uint uIndex = map_pm_address2index(address); + + + if (uIndex < program_memory_size()) + return program_memory[uIndex] ? program_memory[uIndex]->get_opcode() : 0xffffffff; + + if (address >= 0x2000 && address < 0x2006) + { + return get_user_ids(address - 0x2000); + } + + if (uIndex == 0x2006) + return get_device_id(); + + return get_config_word(address); +} + +//------------------------------------------------------------------- +void _14bit_processor::create_config_memory() +{ + m_configMemory = new ConfigMemory(this,1); + m_configMemory->addConfigWord(0,new Generic14bitConfigWord(this)); +} + +//------------------------------------------------------------------- + +bool _14bit_processor::set_config_word(uint address,uint cfg_word) +{ + + if((address == config_word_address()) && config_modes) { + + config_word = cfg_word; + oscillator_select(cfg_word, false); + + if (m_configMemory && m_configMemory->getConfigWord(0)) + m_configMemory->getConfigWord(0)->set((int)cfg_word); + + return true; + } + + return false; + +} + +// The working version of oscillator_select should be called at a higher level +// where the IO pins are defined +// +void _14bit_processor::oscillator_select(uint mode, bool not_clkout) +{ +// printf("Error _14bit_processor::oscillator_select called\n"); +} +//------------------------------------------------------------------- +void _14bit_processor::enter_sleep() +{ + tmr0.sleep(); + pic_processor::enter_sleep(); +} + + //------------------------------------------------------------------- +void _14bit_processor::exit_sleep() +{ + if (m_ActivityState == ePASleeping) + { + tmr0.wake(); + pic_processor::exit_sleep(); + } + +} + +//------------------------------------------------------------------- +Pic14Bit::Pic14Bit(const char *_name, const char *_desc) + : _14bit_processor(_name,_desc), + intcon_reg(this,"intcon","Interrupt Control") +{ + m_porta = new PicPortRegister(this,"porta","", 8,0x1f); + m_trisa = new PicTrisRegister(this,"trisa","", m_porta, false); + + tmr0.set_cpu(this, m_porta, 4, option_reg); + tmr0.start(0); + + m_portb = new PicPortBRegister(this,"portb","",&intcon_reg,8,0xff); + m_trisb = new PicTrisRegister(this,"trisb","", m_portb, false); +} + +//------------------------------------------------------------------- +Pic14Bit::~Pic14Bit() +{ + unassignMCLRPin(); + remove_sfr_register(&tmr0); + remove_sfr_register(&intcon_reg); + + delete_sfr_register(m_portb); + delete_sfr_register(m_trisb); + + delete_sfr_register(m_porta); + delete_sfr_register(m_trisa); +} + +void Pic14Bit::create_sfr_map() +{ + add_sfr_register(indf, 0x00); + alias_file_registers(0x00,0x00,0x80); + + add_sfr_register(&tmr0, 0x01); + add_sfr_register(option_reg, 0x81, RegisterValue(0xff,0)); + + add_sfr_register(pcl, 0x02, RegisterValue(0,0)); + add_sfr_register(status, 0x03, RegisterValue(0x18,0)); + add_sfr_register(fsr, 0x04); + alias_file_registers(0x02,0x04,0x80); + + add_sfr_register(m_porta, 0x05); + add_sfr_register(m_trisa, 0x85, RegisterValue(0x3f,0)); + + add_sfr_register(m_portb, 0x06); + add_sfr_register(m_trisb, 0x86, RegisterValue(0xff,0)); + + add_sfr_register(pclath, 0x0a, RegisterValue(0,0)); + //add_sfr_register(pclath, 0x8a, RegisterValue(0,0)); + + add_sfr_register(&intcon_reg, 0x0b, RegisterValue(0,0)); + //add_sfr_register(&intcon_reg, 0x8b, RegisterValue(0,0)); + alias_file_registers(0x0a,0x0b,0x80); + + intcon = &intcon_reg; + + +} +//------------------------------------------------------------------- +void Pic14Bit::option_new_bits_6_7(uint bits) +{ + //1 ((PORTB *)portb)->rbpu_intedg_update(bits); + m_portb->setRBPU( (bits & (1<<7)) == (1<<7)); + m_portb->setIntEdge((bits & (1<<6)) == (1<<6)); +} + + +_14bit_e_processor::_14bit_e_processor(const char *_name, const char *_desc) + : _14bit_processor(_name,_desc), + mclr_pin(4), + intcon_reg(this,"intcon","Interrupt Control"), + option_reg(this,"option_reg","Option Register"), + bsr(this, "bsr", "Bank Select Register"), + pcon(this, "pcon", "Power Control Register", 0xcf), + wdtcon(this, "wdtcon", "WDT Control", 0x3f), + ind0(this,string("0")), + ind1(this,string("1")), + status_shad(this, "status_shad", "Status shadow register"), + wreg_shad(this, "wreg_shad", "wreg shadow register"), + bsr_shad(this, "bsr_shad", "bsr shadow register"), + pclath_shad(this, "pclath_shad", "pclath shadow register"), + fsr0l_shad(this, "fsr0l_shad", "fsr0l shadow register"), + fsr0h_shad(this, "fsr0h_shad", "fsr0h shadow register"), + fsr1l_shad(this, "fsr1l_shad", "fsr1l shadow register"), + fsr1h_shad(this, "fsr1h_shad", "fsr1h shadow register") +{ + delete stack; + stack = new Stack14E(this); + stack->stack_mask = 0xf; // ehanced has stack 16 high + intcon = &intcon_reg; + +}; + +_14bit_e_processor::~_14bit_e_processor() +{ + + remove_sfr_register(&ind0.indf); + remove_sfr_register(&ind1.indf); + + remove_sfr_register(&ind0.fsrl); + remove_sfr_register(&ind0.fsrh); + remove_sfr_register(&ind1.fsrl); + remove_sfr_register(&ind1.fsrh); + remove_sfr_register(&bsr); + remove_sfr_register(&intcon_reg); + + remove_sfr_register(&pcon); + remove_sfr_register(&wdtcon); + + + // These are copies taken at an interrupt + remove_sfr_register(&status_shad); + remove_sfr_register(&wreg_shad); + remove_sfr_register(&bsr_shad); + remove_sfr_register(&pclath_shad); + remove_sfr_register(&fsr0l_shad); + remove_sfr_register(&fsr0h_shad); + remove_sfr_register(&fsr1l_shad); + remove_sfr_register(&fsr1h_shad); + + Stack14E *stack14E = static_cast(stack); + remove_sfr_register(&stack14E->stkptr); + remove_sfr_register(&stack14E->tosl); + remove_sfr_register(&stack14E->tosh); +} + +void _14bit_e_processor::create_sfr_map() +{ + int bank; + + add_sfr_register(&ind0.indf, 0x00, RegisterValue(0,0), "indf0"); + add_sfr_register(&ind1.indf, 0x01, RegisterValue(0,0), "indf1"); + + add_sfr_register(pcl, 0x02, RegisterValue(0,0)); + add_sfr_register(status, 0x03, RegisterValue(0x18,0)); + add_sfr_register(&ind0.fsrl, 0x04, RegisterValue(0,0), "fsr0l"); + add_sfr_registerR(&ind0.fsrh, 0x05, RegisterValue(0,0), "fsr0h"); + add_sfr_register(&ind1.fsrl, 0x06, RegisterValue(0,0), "fsr1l"); + add_sfr_registerR(&ind1.fsrh, 0x07, RegisterValue(0,0), "fsr1h"); + add_sfr_register(&bsr, 0x08); + add_sfr_register(Wreg, 0x09); + add_sfr_register(pclath, 0x0a, RegisterValue(0,0)); + add_sfr_registerR(&intcon_reg, 0x0b, RegisterValue(0,0)); + + add_sfr_register(&pcon, 0x96, RegisterValue(0x0c,0),"pcon"); + wdt.set_postscale(0); + wdt.set_timeout(1./32000.); + add_sfr_registerR(&wdtcon, 0x97, RegisterValue(0x16,0),"wdtcon"); + + + // These are copies taken at an interrupt + add_sfr_register(&status_shad, 0xfe4); + add_sfr_register(&wreg_shad, 0xfe5); + add_sfr_register(&bsr_shad, 0xfe6); + add_sfr_register(&pclath_shad, 0xfe7); + add_sfr_register(&fsr0l_shad, 0xfe8); + add_sfr_register(&fsr0h_shad, 0xfe9); + add_sfr_register(&fsr1l_shad, 0xfea); + add_sfr_register(&fsr1h_shad, 0xfeb); + + Stack14E *stack14E = static_cast(stack); + add_sfr_register(&stack14E->stkptr, 0xfed,RegisterValue(0,0),"stkptr"); + add_sfr_register(&stack14E->tosl, 0xfee,RegisterValue(0,0),"tosl"); + add_sfr_register(&stack14E->tosh, 0xfef,RegisterValue(0,0),"tosh"); + + for (bank = 1; bank < 32; bank++) + { + alias_file_registers(0x00,0x0b,bank*0x80); // Duplicate core registers + alias_file_registers(0x70,0x7f,bank*0x80); // Duplicate shadow ram + } + stack->stack_mask = 15; // enhanced has stack 16 high + +} +//------------------------------------------------------------------- +// Similar to pic_processoer version except sets PCON flags +// +void _14bit_e_processor::reset (RESET_TYPE r) +{ + + + switch(r) + { + case POR_RESET: + pcon.put(0x0d); + break; + + case SOFT_RESET: + pcon.put(pcon.get() & ~PCON::RI); + break; + + case MCLR_RESET: + cout << "Reset due to MCLR\n"; + pcon.put(pcon.get() & ~PCON::RMCLR); + break; + + case STKOVF_RESET: + pcon.put(pcon.get() | PCON::STKOVF); + break; + + case STKUNF_RESET: + pcon.put(pcon.get() | PCON::STKUNF); + break; + + default: + break; + }; + pic_processor::reset(r); + return; +} + +//------------------------------------------------------------------- +// The enhanced processors save a number of registers into +// their shadow registers on interrupt +// +void _14bit_e_processor::interrupt () +{ + + bp.clear_interrupt(); + + if (bp.have_sleep()) { + bp.clear_sleep(); + stack->push(pc->value+1); + } else { + stack->push(pc->value); + } + status_shad.value = status->value; + wreg_shad.value = Wreg->value; + bsr_shad.value = bsr.value; + pclath_shad.value = pclath->value; + fsr0l_shad.value = ind0.fsrl.value; + fsr0h_shad.value = ind0.fsrh.value; + fsr1l_shad.value = ind1.fsrl.value; + fsr1h_shad.value = ind1.fsrh.value; + + intcon->in_interrupt = true; + pc->interrupt(INTERRUPT_VECTOR); + +} + +//------------------------------------------------------------------- +void _14bit_e_processor::enter_sleep() +{ + tmr0.sleep(); + if (wdt_flag == 2) // WDT is suspended during sleep + wdt.initialize(false); + pic_processor::enter_sleep(); +} + + //------------------------------------------------------------------- +bool _14bit_e_processor::exit_wdt_sleep() +{ + return true; +} + //------------------------------------------------------------------- +void _14bit_e_processor::exit_sleep() +{ + if (m_ActivityState == ePASleeping) + { + tmr0.wake(); + if (wdt_flag == 2) + wdt.initialize(true); + pic_processor::exit_sleep(); + } + +} + +//======================================================================== +// +// Configuration Memory word 1for the enhanced 14 bit processors + +class Config_E : public ConfigWord +{ +public: + Config_E(_14bit_e_processor *pCpu, const char *name, uint address, bool EEw=false) + : ConfigWord(name, 0x3fff, "Configuration Word", pCpu, address, EEw) + { + if (m_pCpu) + { + m_pCpu->set_config_word(address, 0x3fff); + } + } +}; +void _14bit_e_processor::create_config_memory() +{ + m_configMemory = new ConfigMemory(this,9); + m_configMemory->addConfigWord(0,new Config_E(this, "UserID1", 0x8000, true)); + m_configMemory->addConfigWord(1,new Config_E(this, "UserID2", 0x8001, true)); + m_configMemory->addConfigWord(2,new Config_E(this, "UserID3", 0x8002, true)); + m_configMemory->addConfigWord(3,new Config_E(this, "UserID4", 0x8003, true)); + m_configMemory->addConfigWord(6,new Config_E(this, "DeviceID", 0x8006)); + m_configMemory->addConfigWord(7,new Config_E(this, "ConfigW1", 0x8007)); + m_configMemory->addConfigWord(8,new Config_E(this, "ConfigW2", 0x8008)); + +}; + +bool _14bit_e_processor::set_config_word(uint address,uint cfg_word) +{ + enum { + FOSC0 = 1<<0, + FOSC1 = 1<<1, + FOSC2 = 1<<2, + WDTEN0 = 1<<3, + WDTEN1 = 1<<4, + PWRTEN = 1<<5, + MCLRE = 1<<6, + CP = 1<<7, + CPD = 1<<8, + BOREN0 = 1<<9, + BOREN1 = 1<<10, + NOT_CLKOUTEN = 1<<11, +// IESO = 1<<12, + // Config word 2 + WRT0 = 1<<0, + WRT1 = 1<<1, + PLLEN = 1<<8, + STVREN = 1<<9, + + + }; + + Dprintf((" add %x word %x\n", address, cfg_word)); + + if(address == 0x8007) // Config Word 1 + { + wdt_flag = (cfg_word & (WDTEN0|WDTEN1)) >> 3; + Dprintf((" cfg_word %x MCLRE %x\n", cfg_word, cfg_word & MCLRE)); + if ((cfg_word & MCLRE) == MCLRE) + assignMCLRPin(mclr_pin); + else + unassignMCLRPin(); + + wdt.initialize(wdt_flag & 2); + oscillator_select(cfg_word, (cfg_word & NOT_CLKOUTEN) != NOT_CLKOUTEN); + } + else if (address == 0x8008) + { + // stack over/under reset flag + stack->STVREN = ((cfg_word & STVREN) == STVREN); + Dprintf((" STVREN %x flag %d\n", cfg_word&STVREN, stack->STVREN)); + // Program memory write protect (eeprom) + program_memory_wp(cfg_word & (WRT1|WRT0)); + set_pplx4_osc(cfg_word & PLLEN); + + } + return(pic_processor::set_config_word(address, cfg_word)); +} + + +// The working version of oscillator_select should be called at a higher level +// where the IO pins are defined +// +void _14bit_e_processor::oscillator_select(uint mode, bool not_clkout) +{ + printf("Error _14bit_e_processor::oscillator_select called\n"); +} + +// The working version of program_memory_wp should be called at a higher level +// where the eeprom is defined +// +void _14bit_e_processor::program_memory_wp(uint mode) +{ + printf("Error _14bit_e_processor::program_memory_wp called\n"); +} + +// This function routes Wreg put requests through registers (if possible) +// for breaking and logging +void _14bit_e_processor::Wput(uint value) +{ + if(Wreg->address) + registers[Wreg->address]->put(value); + else + Wreg->put(value); +} + +// This function routes Wreg get requests through registers (if possible) +// for breaking and logging +uint _14bit_e_processor::Wget() +{ + if(Wreg->address) + return registers[Wreg->address]->get(); + else + return Wreg->get(); +} + diff --git a/src/gpsim/14bit-processors.h b/src/gpsim/14bit-processors.h new file mode 100644 index 0000000..b9b2483 --- /dev/null +++ b/src/gpsim/14bit-processors.h @@ -0,0 +1,254 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + Copyright (C) 2009,2013 Roy R. Rankin + + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include "pic-processor.h" +#include "intcon.h" +#include "uart.h" +#include "ssp.h" + +#ifndef __14_BIT_PROCESSORS_H__ +#define __14_BIT_PROCESSORS_H__ + + // forward references +class _14bit_processor; +class _14bit_e_processor; +class PicPortRegister; +class PicTrisRegister; + +class PicPortBRegister; +class PicTrisRegister; +class PortBSink; +class IOPIN; +class IO_open_collector; +class PinMonitor; + +extern instruction *disasm14 (_14bit_processor *cpu,uint inst, uint address); +extern instruction *disasm14E (_14bit_e_processor *cpu,uint inst, uint address); + +class CPU_Temp : public Float +{ +public: + CPU_Temp(const char *_name, double temp, const char *desc) : Float(_name, temp, desc) {} +}; + + + +class _14bit_processor : public pic_processor +{ + +public: + +#define EEPROM_SIZE 0x40 +#define INTERRUPT_VECTOR 4 +#define WDTE 4 + + uint eeprom_size; + + INTCON *intcon; + + virtual void interrupt(); + virtual void save_state(); + virtual void create(); + virtual PROCESSOR_TYPE isa(){return _14BIT_PROCESSOR_;}; + virtual PROCESSOR_TYPE base_isa(){return _14BIT_PROCESSOR_;}; + virtual instruction * disasm (uint address, uint inst) + { + return disasm14(this, address, inst); + } + + // Declare a set of functions that will allow the base class to + // get information about the derived classes. NOTE, the values returned here + // will cause errors if they are used -- the derived classes must define their + // parameters appropriately. + virtual void create_sfr_map()=0; + virtual void option_new_bits_6_7(uint)=0; + virtual void put_option_reg(uint); + + virtual bool set_config_word(uint address, uint cfg_word); + virtual void create_config_memory(); + virtual void oscillator_select(uint mode, bool clkout); + + // Return the portion of pclath that is used during branching instructions + virtual uint get_pclath_branching_jump() + { + return ((pclath->value.get() & 0x18)<<8); + } + + // Return the portion of pclath that is used during modify PCL instructions + virtual uint get_pclath_branching_modpcl() + { + return((pclath->value.get() & 0x1f)<<8); + } + + virtual uint map_fsr_indf ( void ) + { + return ( this->fsr->value.get() ); + } + + + virtual uint eeprom_get_size() {return 0;}; + virtual uint eeprom_get_value(uint address) {return 0;}; + virtual void eeprom_put_value(uint value, + uint address) + {return;} + + virtual uint program_memory_size() const = 0; + virtual uint get_program_memory_at_address(uint address); + virtual void enter_sleep(); + virtual void exit_sleep(); + virtual bool hasSSP() {return has_SSP;} + virtual void set_hasSSP() { has_SSP = true;} + virtual uint get_device_id() { return 0xffffffff;} + virtual uint get_user_ids(uint index) { return 0xffffffff;} + + + _14bit_processor(const char *_name=0, const char *desc=0); + virtual ~_14bit_processor(); + bool two_speed_clock; + uint config_clock_mode; + CPU_Temp *m_cpu_temp; + + +protected: + bool has_SSP; + OPTION_REG *option_reg; + uint ram_top; + uint wdt_flag; +}; + +#define cpu14 ( (_14bit_processor *)cpu) + + +/*************************************************************************** + * + * Include file for: P16C84, P16F84, P16F83, P16CR83, P16CR84 + * + * The x84 processors have a 14-bit core, eeprom, and are in an 18-pin + * package. The class taxonomy is: + * + * pic_processor + * |-> 14bit_processor + * | + * |----------\ + * | + * |- P16C8x + * |->P16C84 + * |->P16F84 + * |->P16C83 + * |->P16CR83 + * |->P16CR84 + * + ***************************************************************************/ +class PortBSink; +class Pic14Bit : public _14bit_processor +{ +public: + + Pic14Bit(const char *_name=0, const char *desc=0); + virtual ~Pic14Bit(); + + + INTCON_14_PIR intcon_reg; + + PicPortRegister *m_porta; + PicTrisRegister *m_trisa; + + PicPortBRegister *m_portb; + PicTrisRegister *m_trisb; + + virtual PROCESSOR_TYPE isa(){return _14BIT_PROCESSOR_;}; + + virtual void create_sfr_map(); + virtual void option_new_bits_6_7(uint bits); +}; + + +// 14 bit processors with extended instructions +// +class _14bit_e_processor : public _14bit_processor +{ +public: + uint mclr_pin; + + INTCON_14_PIR intcon_reg; + OPTION_REG_2 option_reg; + BSR bsr; + PCON pcon; + WDTCON wdtcon; + Indirect_Addressing14 ind0; + Indirect_Addressing14 ind1; + sfr_register status_shad; + sfr_register wreg_shad; + sfr_register bsr_shad; + sfr_register pclath_shad; + sfr_register fsr0l_shad; + sfr_register fsr0h_shad; + sfr_register fsr1l_shad; + sfr_register fsr1h_shad; + + void set_mclr_pin(uint pin) { mclr_pin = pin;} + virtual PROCESSOR_TYPE isa(){return _14BIT_PROCESSOR_;} + virtual PROCESSOR_TYPE base_isa(){return _14BIT_E_PROCESSOR_;} + virtual instruction * disasm (uint address, uint inst) + { + return disasm14E(this, address, inst); + } + + _14bit_e_processor(const char *_name=0, const char *desc=0); + virtual ~_14bit_e_processor(); + + virtual void create_sfr_map(); + virtual void interrupt(); + virtual bool exit_wdt_sleep(); + virtual bool swdten_active() {return(wdt_flag == 1);} // WDTCON can enable WDT + + virtual void enter_sleep(); + virtual void exit_sleep(); + virtual void reset(RESET_TYPE r); + virtual void create_config_memory(); + virtual bool set_config_word(uint address,uint cfg_word); + virtual void oscillator_select(uint mode, bool clkout); + virtual void program_memory_wp(uint mode); + + // Return the portion of pclath that is used during branching instructions + virtual uint get_pclath_branching_jump() + { + return ((pclath->value.get() & 0x18)<<8); + } + + // Return the portion of pclath that is used during modify PCL instructions + virtual uint get_pclath_branching_modpcl() + { + return((pclath->value.get() & 0x1f)<<8); + } + + virtual void Wput(uint); + virtual uint Wget(); + +protected: + uint wdt_flag; +}; + +#define cpu14e ( (_14bit_e_processor *)cpu) + +#endif diff --git a/src/gpsim/16bit-hexdecode.cc b/src/gpsim/16bit-hexdecode.cc new file mode 100644 index 0000000..ec597fc --- /dev/null +++ b/src/gpsim/16bit-hexdecode.cc @@ -0,0 +1,200 @@ +/* + Copyright (C) 1998,1999 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +// T. Scott Dattalo 16bit core routines + +#include +#include +#include +#include + +#include "config.h" +#include "16bit-processors.h" +#include "pic-instructions.h" +#include "12bit-instructions.h" +#include "16bit-instructions.h" + +#include "pic-processor.h" +#include "stimuli.h" + +/* PIC 16-bit instruction set */ + +struct instruction_constructor op_18cxx[] = { + // Extended Instructions + { 0xfe00, 0xe800, ADDFSR16::construct }, // ADDFSR & SUBFSR, ADDULNK, SUBULNK + { 0xffff, 0x0014, CALLW16::construct }, + { 0xff00, 0xeb00, MOVSF::construct }, // MOVSF & MOVSS + { 0xff00, 0xea00, PUSHL::construct }, + + // Normal instructions + { 0xff00, 0x0f00, ADDLW16::construct }, + { 0xfc00, 0x2400, ADDWF16::construct }, + { 0xfc00, 0x2000, ADDWFC16::construct }, + { 0xff00, 0x0b00, ANDLW16::construct }, + { 0xfc00, 0x1400, ANDWF16::construct }, + { 0xff00, 0xe200, BC::construct }, + { 0xf000, 0x9000, BCF16::construct }, + { 0xff00, 0xe600, BN::construct }, + { 0xff00, 0xe300, BNC::construct }, + { 0xff00, 0xe700, BNN::construct }, + { 0xff00, 0xe500, BNOV::construct }, + { 0xff00, 0xe100, BNZ::construct }, + { 0xff00, 0xe400, BOV::construct }, + { 0xf800, 0xd000, BRA16::construct }, + { 0xf000, 0x8000, BSF16::construct }, + { 0xf000, 0xb000, BTFSC16::construct }, + { 0xf000, 0xa000, BTFSS16::construct }, + { 0xf000, 0x7000, BTG::construct }, + { 0xff00, 0xe000, BZ::construct }, + { 0xfe00, 0xec00, CALL16::construct }, + { 0xfe00, 0x6a00, CLRF16::construct }, + { 0xffff, 0x0004, CLRWDT::construct }, + { 0xfc00, 0x1c00, COMF16::construct }, + { 0xfe00, 0x6200, CPFSEQ::construct }, + { 0xfe00, 0x6400, CPFSGT::construct }, + { 0xfe00, 0x6000, CPFSLT::construct }, + { 0xffff, 0x0007, DAW::construct }, + { 0xfc00, 0x0400, DECF16::construct }, + { 0xfc00, 0x2c00, DECFSZ16::construct }, + { 0xfc00, 0x4c00, DCFSNZ::construct }, + { 0xff00, 0xef00, GOTO16::construct }, + { 0xfc00, 0x2800, INCF16::construct }, + { 0xfc00, 0x3c00, INCFSZ16::construct }, + { 0xfc00, 0x4800, INFSNZ::construct }, + { 0xff00, 0x0900, IORLW16::construct }, + { 0xfc00, 0x1000, IORWF16::construct }, + { 0xffc0, 0xee00, LFSR::construct }, + { 0xfc00, 0x5000, MOVF16::construct }, + { 0xf000, 0xc000, MOVFF::construct }, + { 0xff00, 0x0100, MOVLB16::construct }, + { 0xff00, 0x0e00, MOVLW::construct }, + { 0xfe00, 0x6e00, MOVWF16::construct }, + //RRR { 0xff00, 0x6f00, MOVWF16::construct }, + //RRR { 0xff00, 0x6e00, MOVWF16a::construct }, + { 0xff00, 0x0d00, MULLW::construct }, + { 0xfe00, 0x0200, MULWF::construct }, + { 0xfe00, 0x6c00, NEGF::construct }, + { 0xffff, 0x0000, NOP::construct }, + { 0xf000, 0xf000, NOP::construct }, + { 0xffff, 0x0006, POP::construct }, + { 0xffff, 0x0005, PUSH::construct }, + { 0xf800, 0xd800, RCALL::construct }, + { 0xffff, 0x00ff, RESET::construct }, + { 0xfffe, 0x0010, RETFIE16::construct }, + { 0xff00, 0x0c00, RETLW::construct }, + { 0xfffe, 0x0012, RETURN16::construct }, + { 0xfc00, 0x3400, RLCF::construct }, + { 0xfc00, 0x4400, RLNCF::construct }, + { 0xfc00, 0x3000, RRCF::construct }, + { 0xfc00, 0x4000, RRNCF::construct }, + { 0xfe00, 0x6800, SETF::construct }, + { 0xffff, 0x0003, SLEEP16::construct }, + { 0xfc00, 0x5400, SUBFWB::construct }, + { 0xff00, 0x0800, SUBLW16::construct }, + { 0xfc00, 0x5c00, SUBWF16::construct }, + { 0xfc00, 0x5800, SUBWFB16::construct }, + { 0xfc00, 0x3800, SWAPF16::construct }, + { 0xfffc, 0x0008, TBLRD::construct }, + { 0xfffc, 0x000c, TBLWT::construct }, + { 0xfe00, 0x6600, TSTFSZ::construct }, + { 0xff00, 0x0a00, XORLW16::construct }, + { 0xfc00, 0x1800, XORWF16::construct }, +}; + +struct instruction_constructor op_17cxx[] = { + { 0xff00, 0xb100, ADDLW16::construct }, + { 0xfe00, 0x0e00, ADDWF16::construct }, + { 0xfe00, 0x1000, ADDWFC::construct }, + { 0xff00, 0xb500, ANDLW16::construct }, + { 0xfe00, 0x0a00, ANDWF16::construct }, + { 0xf800, 0x8800, BCF::construct }, + { 0xf800, 0x8000, BSF::construct }, + { 0xf800, 0x9800, BTFSC::construct }, + { 0xf800, 0x9000, BTFSS::construct }, + { 0xf800, 0x3800, BTG::construct }, + { 0xe000, 0xe000, CALL16::construct }, + { 0xfe00, 0x2800, CLRF::construct }, + { 0xffff, 0x0004, CLRWDT::construct }, + { 0xfe00, 0x1200, COMF16::construct }, + { 0xff00, 0x3100, CPFSEQ::construct }, + { 0xff00, 0x3200, CPFSGT::construct }, + { 0xff00, 0x3000, CPFSLT::construct }, + { 0xfe00, 0x2e00, DAW::construct }, + { 0xfe00, 0x0600, DECF16::construct }, + { 0xfe00, 0x1600, DECFSZ16::construct }, + { 0xfe00, 0x2600, DCFSNZ::construct }, + { 0xe000, 0xc000, GOTO16::construct }, + { 0xfe00, 0x1400, INCF16::construct }, + { 0xfe00, 0x1e00, INCFSZ16::construct }, + { 0xfe00, 0x2400, INFSNZ::construct }, + { 0xff00, 0xb300, IORLW16::construct }, + { 0xfe00, 0x0800, IORWF16::construct }, + { 0xff00, 0xb700, LCALL16::construct }, + { 0xe000, 0x6000, MOVFP::construct }, + { 0xe000, 0x4000, MOVPF::construct }, + { 0xff00, 0xb800, MOVLB::construct }, + { 0xfe00, 0xba00, MOVLR::construct }, + { 0xff00, 0xb000, MOVLW::construct }, + { 0xff00, 0x0100, MOVWF16::construct }, + { 0xff00, 0xbc00, MULLW::construct }, + { 0xff00, 0x3400, MULWF::construct }, + { 0xfe00, 0x2c00, NEGW::construct }, + { 0xffff, 0x0000, NOP::construct }, + { 0xffff, 0x0005, RETFIE16::construct }, + { 0xff00, 0xb600, RETLW::construct }, + { 0xffff, 0x0002, RETURN16::construct }, + { 0xfe00, 0x1a00, RLCF::construct }, + { 0xfe00, 0x2200, RLNCF::construct }, + { 0xfe00, 0x1800, RRCF::construct }, + { 0xfe00, 0x2000, RRNCF::construct }, + { 0xfe00, 0x2a00, SETF::construct }, + { 0xffff, 0x0003, SLEEP16::construct }, + { 0xff00, 0xb200, SUBLW16::construct }, + { 0xfe00, 0x0400, SUBWF16::construct }, + { 0xfe00, 0x0200, SUBWFB::construct }, + { 0xfe00, 0x1c00, SWAPF::construct }, + { 0xfc00, 0xa800, TBLRD::construct }, + { 0xfc00, 0xac00, TBLWT::construct }, + { 0xfc00, 0xa000, TLRD::construct }, + { 0xfc00, 0xa400, TLWT::construct }, + { 0xff00, 0x3300, TSTFSZ::construct }, + { 0xff00, 0xb400, XORLW16::construct }, + { 0xfe00, 0x0c00, XORWF16::construct } +}; + +const int NUM_OP_18CXX = sizeof(op_18cxx) / sizeof(op_18cxx[0]); +const int NUM_OP_17CXX = sizeof(op_17cxx) / sizeof(op_17cxx[0]); + +instruction * disasm16 (pic_processor *cpu, uint address, uint inst) +{ + instruction *pi; + + cpu16->setCurrentDisasmAddress(address); + + pi = 0; + for(int i =0; i. +*/ + +#include +#include +#include +#include +#include + +#include "config.h" +#include "pic-processor.h" +#include "14bit-registers.h" + +#include "pic-instructions.h" +#include "12bit-instructions.h" +#include "16bit-instructions.h" +#include "16bit-processors.h" +#include "16bit-registers.h" + +//-------------------------------------------------- +Branching::Branching(Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode,address), + destination_index(0), + absolute_destination_index(0) + +{ +} +void Branching::decode(Processor *new_cpu, uint new_opcode) +{ + opcode = new_opcode; + + cpu = new_cpu; + + switch(cpu16->base_isa()) { + case _PIC18_PROCESSOR_: + destination_index = (new_opcode & 0xff)+1; + absolute_destination_index = (cpu16->getCurrentDisasmIndex() + destination_index) & 0xfffff; + + if(new_opcode & 0x80) + { + absolute_destination_index -= 0x100; + destination_index = 0x100 - destination_index; + } + break; + + case _PIC17_PROCESSOR_: + cout << "Which instructions go here?\n"; + break; + + default: + cout << "ERROR: (Branching) the processor is not defined\n"; + break; + } +} + +char *Branching::name(char *return_str, int len) +{ + + snprintf(return_str, len,"%s\t$%c0x%x\t;(0x%x)", + gpsimObject::name().c_str(), + (opcode & 0x80) ? '-' : '+', + (destination_index & 0x7f)<<1, + absolute_destination_index<<1); + + + return(return_str); +} + +//-------------------------------------------------- +multi_word_instruction::multi_word_instruction(Processor *new_cpu, + uint new_opcode, uint address) + : instruction(new_cpu, new_opcode,address), + word2_opcode(0), + PMaddress(0), + PMindex(0), + initialized(false) +{ +} +multi_word_branch::multi_word_branch(Processor *new_cpu, uint new_opcode, uint address) + : multi_word_instruction(new_cpu, new_opcode, address), + destination_index(0) +{ +} +void multi_word_branch::runtime_initialize() +{ + if(cpu16->program_memory[PMindex+1] != &cpu16->bad_instruction) + { + word2_opcode = cpu16->program_memory[PMindex+1]->get_opcode(); + + if((word2_opcode & 0xf000) != 0xf000) + { + cout << "16bit-instructions.cc multiword instruction error\n"; + return; + } + // extract the destination address from the two-word opcode + destination_index = ((word2_opcode & 0xfff)<<8) | (opcode & 0xff); + initialized = true; + } +} + +char * multi_word_branch::name(char *return_str,int len) +{ + if(!initialized) + runtime_initialize(); + + snprintf(return_str,len,"%s\t0x%05x", + gpsimObject::name().c_str(), + destination_index<<1); + + return(return_str); +} + +//--------------------------------------------------------- +ADDULNK::ADDULNK(Processor *new_cpu, uint new_opcode, const char *pName, uint address) + : instruction(new_cpu, new_opcode,address) +{ + m_lit = opcode & 0x3f; + new_name(pName); + +} +char *ADDULNK::name(char *return_str,int len) +{ + + snprintf(return_str,len,"%s\t0x%x", + gpsimObject::name().c_str(), + m_lit); + + return(return_str); +} +void ADDULNK::execute() +{ + if (cpu16->extended_instruction()) + { + if (opcode & 0x100) + cpu16->ind2.put_fsr(cpu16->ind2.get_fsr_value() - m_lit); // SUBULNK + else + cpu16->ind2.put_fsr(cpu16->ind2.get_fsr_value() + m_lit); // ADDULNK + } + else + { + printf("Error %s extended instruction not supported, check XINST\n", + (opcode&0x100)?"SUBULNK":"ADDULNK"); + bp.halt(); + } + + cpu16->pc->new_address(cpu16->stack->pop()); +} + +//--------------------------------------------------------- +ADDFSR16::ADDFSR16(Processor *new_cpu, uint new_opcode, const char *pName, uint address) + : instruction(new_cpu, new_opcode,address) +{ + m_fsr = (opcode>>6)&3; + m_lit = opcode & 0x3f; + switch(m_fsr) { + case 0: + ia = &cpu16->ind0; + break; + + case 1: + ia = &cpu16->ind1; + break; + + case 2: + ia = &cpu16->ind2; + break; + + case 3: + ia = &cpu16->ind2; + } + + new_name(pName); + +} + +char *ADDFSR16::name(char *return_str,int len) +{ + + snprintf(return_str,len,"%s\t%u,0x%x", + gpsimObject::name().c_str(), + m_fsr, + m_lit); + + return(return_str); +} + + +void ADDFSR16::execute() +{ + if (cpu16->extended_instruction()) + { + // Apply pending update. + ia->fsr_value += ia->fsr_delta; + ia->fsr_delta = 0; + + if (opcode & 0x100) + ia->put_fsr(ia->get_fsr_value() - m_lit); //SUBFSR + else + ia->put_fsr(ia->get_fsr_value() + m_lit); //ADDFSR + } + else + { + printf("Error %s extended instruction not supported, check XINST\n", + (opcode&0x100)?"SUBFSR":"ADDFSR"); + bp.halt(); + } + + cpu16->pc->increment(); +} + +//-------------------------------------------------- +void CALLW16::execute() +{ + if (cpu16->extended_instruction()) + { + if(cpu16->stack->push(cpu16->pc->get_next())) + { + cpu16->pcl->put(cpu16->Wget()); + cpu16->pc->increment(); + } + else // stack overflow reset + { + cpu16->pc->jump(0); + } + } + else + { + printf("Error %s extended instruction not supported, check XINST\n", + "CALLW"); + bp.halt(); + } +} + +//-------------------------------------------------- +PUSHL::PUSHL(Processor *new_cpu, uint new_opcode, uint address) + :instruction (new_cpu, new_opcode, address), + m_lit(new_opcode & 0xff) +{ + new_name("pushl"); +} +char *PUSHL::name(char *return_str,int len) +{ + + snprintf(return_str,len,"%s\t0x%x", + gpsimObject::name().c_str(),m_lit); + return(return_str); +} +void PUSHL::execute() +{ +// cpu16->ind2.put(m_lit); +// cpu16->ind2.put_fsr(cpu16->ind2.get_fsr_value() -1); + if (cpu16->extended_instruction()) + { + cpu16->ind2.postdec.put(m_lit); + } + else + { + printf("Error %s extended instruction not supported, check XINST\n", + "PUSHL"); + bp.halt(); + } + cpu16->pc->increment(); +} + +//-------------------------------------------------- + +MOVSF::MOVSF (Processor *new_cpu, uint new_opcode, uint address) + : multi_word_instruction(new_cpu, new_opcode,address) +{ + opcode = new_opcode; + cpu = new_cpu; + PMaddress = cpu16->getCurrentDisasmAddress(); + PMindex = cpu16->getCurrentDisasmIndex(); + initialized = false; + destination = 0; + source = opcode & 0x7f; + + if (opcode & 0x80) new_name("movss"); + else new_name("movsf"); +} + +void MOVSF::runtime_initialize() +{ + if(cpu_pic->program_memory[PMindex+1]) + { + word2_opcode = cpu_pic->program_memory[PMindex+1]->get_opcode(); + + if((word2_opcode & 0xf000) != 0xf000) + { + cout << "16bit-instructions.cc MOVSF error\n"; + return; + } + destination = word2_opcode & ((opcode & 0x80) ? 0x7f : 0xfff); + initialized = true; + } +} + +char *MOVSF::name(char *return_str,int len) +{ + + if(!initialized) + runtime_initialize(); + + if (opcode & 0x80) + snprintf(return_str,len,"%s\t[0x%x],[0x%x]", + gpsimObject::name().c_str(), + source, destination); + else + snprintf(return_str,len,"%s\t[0x%x],%s", + gpsimObject::name().c_str(), + source, + cpu_pic->registers[destination]->name().c_str()); + + + return(return_str); +} + + +void MOVSF::execute() +{ + if (cpu16->extended_instruction()) + { + if(!initialized) + runtime_initialize(); + + uint source_addr = cpu16->ind2.plusk_fsr_value(source); + + uint r = cpu_pic->registers[source_addr]->get(); + cpu16->pc->skip(); + + uint destination_addr = + (opcode & 0x80) ? + cpu16->ind2.plusk_fsr_value(destination) + : + destination; + cpu_pic->registers[destination_addr]->put(r); + } + else + { + printf("Error %s extended instruction not supported, check XINST\n", + (opcode & 0x80)?"MOVSS":"MOVSF"); + bp.halt(); + } + + //cpu16->pc->increment(); + +} + +//-------------------------------------------------- +void ADDLW16::execute() +{ + uint old_value,new_value; + + new_value = (old_value = cpu16->Wget()) + L; + + cpu16->Wput(new_value & 0xff); + cpu16->status->put_Z_C_DC_OV_N(new_value, old_value, L); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- +void ADDWF16::execute() +{ + uint new_value,src_value,w_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + new_value = (src_value = source->get_value()) + (w_value = cpu16->Wget()); + + + // Store the result + + if(destination) + { + source->put(new_value & 0xff); // Result goes to source + cpu16->status->put_Z_C_DC_OV_N(new_value, src_value, w_value); + } + else + { + cpu16->Wput(new_value & 0xff); + cpu16->status->put_Z_C_DC_OV_N(new_value, w_value, src_value); + } + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +void ADDWFC16::execute() +{ + uint new_value,src_value,w_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + new_value = (src_value = source->get()) + + (w_value = cpu16->Wget()) + + ((cpu16->status->value.get() & STATUS_C) ? 1 : 0); + + // Store the result + + if(destination) + source->put(new_value & 0xff); // Result goes to source + else + cpu16->Wput(new_value & 0xff); + + cpu16->status->put_Z_C_DC_OV_N(new_value, src_value, w_value); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +void ANDLW16::execute() +{ + uint new_value; + + new_value = cpu16->Wget() & L; + + cpu16->Wput(new_value); + cpu16->status->put_N_Z(new_value); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +void ANDWF16::execute() +{ + uint new_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + new_value = source->get() & cpu16->Wget(); + + if(destination) + source->put(new_value); // Result goes to source + else + cpu16->Wput(new_value); + + cpu16->status->put_N_Z(new_value); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +BC::BC (Processor *new_cpu, uint new_opcode, uint address) + : Branching(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("bc"); +} + +void BC::execute() +{ + if(cpu16->status->value.get() & STATUS_C) + cpu16->pc->jump(absolute_destination_index); + else + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +BN::BN (Processor *new_cpu, uint new_opcode, uint address) + : Branching(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("bn"); +} + +void BN::execute() +{ + if(cpu16->status->value.get() & STATUS_N) + cpu16->pc->jump(absolute_destination_index); + else + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +BNC::BNC (Processor *new_cpu, uint new_opcode, uint address) + : Branching(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("bnc"); +} + +void BNC::execute() +{ + if(cpu16->status->value.get() & STATUS_C) + cpu16->pc->increment(); + else + cpu16->pc->jump(absolute_destination_index); + +} + +//-------------------------------------------------- + +BNN::BNN (Processor *new_cpu, uint new_opcode, uint address) + : Branching(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("bnn"); +} + +void BNN::execute() +{ + if(cpu16->status->value.get() & STATUS_N) + cpu16->pc->increment(); + else + cpu16->pc->jump(absolute_destination_index); + +} + +//-------------------------------------------------- + +BNOV::BNOV (Processor *new_cpu, uint new_opcode, uint address) + : Branching(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("bnov"); +} + +void BNOV::execute() +{ + if(cpu16->status->value.get() & STATUS_OV) + cpu16->pc->increment(); + else + cpu16->pc->jump(absolute_destination_index); + +} + +//-------------------------------------------------- + +BNZ::BNZ (Processor *new_cpu, uint new_opcode, uint address) + : Branching(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("bnz"); +} + +void BNZ::execute() +{ + if(cpu16->status->value.get() & STATUS_Z) + cpu16->pc->increment(); + else + cpu16->pc->jump(absolute_destination_index); + +} + +//-------------------------------------------------- + +BOV::BOV (Processor *new_cpu, uint new_opcode, uint address) + : Branching(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("bov"); +} + +void BOV::execute() +{ + if(cpu16->status->value.get() & STATUS_OV) + cpu16->pc->jump(absolute_destination_index); + else + cpu16->pc->increment(); + +} + +//-------------------------------------------------- +BRA16::BRA16 (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + destination_index = (new_opcode & 0x7ff)+1; + absolute_destination_index = (cpu16->getCurrentDisasmIndex() + destination_index) & 0xfffff; + + if(new_opcode & 0x400) + { + absolute_destination_index -= 0x800; + destination_index = 0x800 - destination_index; + } + + new_name("bra"); +} + +void BRA16::execute() +{ + cpu16->pc->jump(absolute_destination_index); + +} + +char * BRA16::name(char *return_str, int len) +{ + snprintf(return_str, len, "%s\t$%c0x%x\t;(0x%05x)", + gpsimObject::name().c_str(), + (opcode & 0x400) ? '-' : '+', + (destination_index & 0x7ff)<<1, + absolute_destination_index<<1); + + return return_str; +} + +//-------------------------------------------------- +void BSF16::execute() +{ + + + if (access) + reg = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + reg = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + reg = cpu_pic->registers[register_address]; + + reg->put(reg->get_value() | mask); // Must not use reg->value.get() as it breaks indirects + + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- +void BCF16::execute() +{ + + + if (access) + reg = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + reg = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + reg = cpu_pic->registers[register_address]; + + reg->put(reg->get_value() & mask); // Must not use reg->value.get() as it breaks indirects + + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- +void BTFSC16::execute() +{ + + + if (access) + reg = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + reg = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + reg = cpu_pic->registers[register_address]; + + + uint result = mask & reg->get(); + + if(!result) + cpu_pic->pc->skip(); // Skip next instruction + else + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- +void BTFSS16::execute() +{ + + + if (access) + reg = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + reg = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + reg = cpu_pic->registers[register_address]; + + + uint result = mask & reg->get(); + + if(result) + cpu_pic->pc->skip(); // Skip next instruction + else + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +BTG::BTG (Processor *new_cpu, uint new_opcode, uint address) + : Bit_op(new_cpu, new_opcode,address) +{ + decode(new_cpu, new_opcode); + new_name("btg"); +} + +void BTG::execute() +{ + if (access) + reg = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + reg = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + reg = cpu_pic->registers[register_address]; + + reg->put(reg->get() ^ mask); + + cpu16->pc->increment(); + +} +//-------------------------------------------------- + +BZ::BZ (Processor *new_cpu, uint new_opcode, uint address) + : Branching(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("bz"); +} + +void BZ::execute() +{ + if(cpu16->status->value.get() & STATUS_Z) + cpu16->pc->jump(absolute_destination_index); + else + cpu16->pc->increment(); + +} + +//-------------------------------------------------- +CALL16::CALL16 (Processor *new_cpu, uint new_opcode, uint address) + : multi_word_branch(new_cpu, new_opcode, address) +{ + + fast = (new_opcode & 0x100) ? true : false; + cpu = new_cpu; + PMaddress = cpu16->getCurrentDisasmAddress(); + PMindex = cpu16->getCurrentDisasmIndex(); + initialized = false; + + new_name("call"); + +} + +void CALL16::execute() +{ + if(!initialized) + runtime_initialize(); + + if (cpu16->stack->push(cpu16->pc->get_next())) + { + if(fast) + cpu16->fast_stack.push(); + + cpu16->pc->jump(destination_index); + } + else // stack overflow reset + cpu16->pc->jump(0); + +} + +char *CALL16::name(char *return_str,int len) +{ + + if(!initialized) + runtime_initialize(); + + snprintf(return_str,len,"call\t0x%05x%s", + destination_index<<1, + ((fast) ? ",f" : " ")); + + return(return_str); +} + +//-------------------------------------------------- +void COMF16::execute() +{ + uint new_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + new_value = source->get() ^ 0xff; + + // Store the result + + if(destination) + source->put(new_value); // Result goes to source + else + cpu16->Wput(new_value); + + cpu16->status->put_N_Z(new_value); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +CPFSEQ::CPFSEQ (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("cpfseq"); +} + +void CPFSEQ::execute() +{ + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + if(source->get() == cpu16->Wget()) + cpu16->pc->skip(); // Skip next instruction + else + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +CPFSGT::CPFSGT (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("cpfsgt"); +} + +void CPFSGT::execute() +{ + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + if(source->get() > cpu16->Wget()) + cpu16->pc->skip(); // Skip next instruction + else + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +CPFSLT::CPFSLT (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("cpfslt"); +} + +void CPFSLT::execute() +{ + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + if(source->get() < cpu16->Wget()) + cpu16->pc->skip(); // Skip next instruction + else + cpu16->pc->increment(); + +} + +void CLRF16::execute() +{ + + if (access) + cpu_pic->register_bank[register_address]->put(0); + else if (cpu16->extended_instruction() && register_address < 0x60) + cpu_pic->registers[register_address + cpu16->ind2.fsr_value]->put(0); + else + cpu_pic->registers[register_address]->put(0); + + cpu16->status->put_Z(1); + + cpu16->pc->increment(); + +} +//-------------------------------------------------- + +DAW::DAW (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("daw"); +} + +void DAW::execute() +{ + uint new_value; + + new_value = cpu16->Wget(); + if(((new_value & 0x0f) > 0x9) || (cpu16->status->value.get() & STATUS_DC)) + new_value += 0x6; + + if(((new_value & 0xf0) > 0x90) || (cpu16->status->value.get() & STATUS_C)) + new_value += 0x60; + + cpu16->Wput(new_value & 0xff); + if ( new_value>0xff ) + cpu16->status->put_C(1); + else if ( cpu16->bugs() & BUG_DAW ) + cpu16->status->put_C(0); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +void DECF16::execute() +{ + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + uint src_value = source->get(); + uint new_value = src_value - 1; + + if(destination) + source->put(new_value & 0xff); // Result goes to source + else + cpu16->Wput(new_value & 0xff); + + // cpu16->status->put_N_Z(new_value); + cpu16->status->put_Z_C_DC_OV_N_for_sub(new_value,src_value,1); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +void DECFSZ16::execute() +{ + uint new_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + new_value = (source->get() - 1)&0xff; + + if(destination) + source->put(new_value); // Result goes to source + else + cpu16->Wput(new_value); + + if(0==new_value) + cpu16->pc->skip(); // Skip next instruction + else + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +DCFSNZ::DCFSNZ (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("dcfsnz"); +} + +void DCFSNZ::execute() +{ + uint new_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + new_value = (source->get() - 1)&0xff; + + if(destination) + source->put(new_value); // Result goes to source + else + cpu16->Wput(new_value); + + if(0!=new_value) + cpu16->pc->skip(); // Skip next instruction + else + cpu16->pc->increment(); + +} + + +//-------------------------------------------------- +GOTO16::GOTO16 (Processor *new_cpu, uint new_opcode, uint address) + : multi_word_branch(new_cpu, new_opcode, address) +{ + PMaddress = cpu16->getCurrentDisasmAddress(); + PMindex = cpu16->getCurrentDisasmIndex(); + initialized = false; + + new_name("goto"); +} + +void GOTO16::execute() +{ + if(!initialized) + runtime_initialize(); + + cpu16->pc->jump(destination_index); + +} +//-------------------------------------------------- + +void INCF16::execute() +{ + uint new_value, src_value; + + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + src_value = source->get(); + new_value = (src_value + 1); + + if(destination) + { + source->put(new_value & 0xff); // Result goes to source + cpu16->status->put_Z_C_DC_OV_N(new_value, src_value, 1); + } + else + { + cpu16->Wput(new_value & 0xff); + cpu16->status->put_Z_C_DC_OV_N(new_value, 1, src_value); + } + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +void INCFSZ16::execute() +{ + uint new_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + new_value = (source->get() + 1)&0xff; + + if(destination) + source->put(new_value); // Result goes to source + else + cpu16->Wput(new_value); + + if(0==new_value) + cpu16->pc->skip(); // Skip next instruction + else + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +INFSNZ::INFSNZ (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("infsnz"); +} + +void INFSNZ::execute() +{ + uint new_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + new_value = (source->get() + 1)&0xff; + + if(destination) + source->put(new_value); // Result goes to source + else + cpu16->Wput(new_value); + + if(0!=new_value) + cpu16->pc->skip(); // Skip next instruction + else + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +void IORLW16::execute() +{ + uint new_value; + + new_value = cpu16->Wget() | L; + + cpu16->Wput(new_value); + cpu16->status->put_N_Z(new_value); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +void IORWF16::execute() +{ + uint new_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + new_value = source->get() | cpu16->Wget(); + + if(destination) + source->put(new_value); // Result goes to source + else + cpu16->Wput(new_value); + + cpu16->status->put_N_Z(new_value); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- +LCALL16::LCALL16 (Processor *new_cpu, uint new_opcode, uint address) + : multi_word_branch(new_cpu, new_opcode, address) +{ +// opcode = new_opcode; +// fast = new_opcode & 0x100; +// cpu = new_cpu; +// address = cpu16->current_disasm_address; +// initialized = 0; + + new_name("lcall"); + +} + +void LCALL16::execute() +{ + +// if(!initialized) +// runtime_initialize(); + +// cpu16->stack->push(cpu16->pc->get_next()); +// if(fast) +// cpu16->fast_stack.push(); + +// cpu16->pc->jump(destination); + +} + +char *LCALL16::name(char *return_str,int len) +{ + +// if(!initialized) +// runtime_initialize(); + + snprintf(return_str,len,"lcall\t0x%05x%s", + destination_index<<1, + ((fast) ? ",f" : " ")); + + return(return_str); +} + +//-------------------------------------------------- + +LFSR::LFSR (Processor *new_cpu, uint new_opcode, uint address) + : multi_word_instruction(new_cpu, new_opcode, address) +{ + + PMaddress = cpu16->getCurrentDisasmAddress(); + PMindex = cpu16->getCurrentDisasmIndex(); + initialized = false; + + fsr = (opcode & 0x30)>>4; + switch(fsr) + { + case 0: + ia = &cpu16->ind0; + break; + + case 1: + ia = &cpu16->ind1; + break; + + case 2: + ia = &cpu16->ind2; + break; + + case 3: + cout << "LFSR decode error, fsr is 3 and should only be 0,1, or 2\n"; + ia = &cpu16->ind0; + } + + new_name("lfsr"); +} + +void LFSR::runtime_initialize() +{ + if(cpu_pic->program_memory[PMindex+1]) + { + word2_opcode = cpu_pic->program_memory[PMindex+1]->get_opcode(); + + if((word2_opcode & 0xff00) != 0xf000) + { + cout << "16bit-instructions.cc LFSR error\n"; + return; + } + k = ( (opcode & 0xf)<<8) | (word2_opcode & 0xff); + initialized = true; + } +} + +char *LFSR::name(char *return_str,int len) +{ + if(!initialized) runtime_initialize(); + + snprintf(return_str,len,"%s\t%u,0x%x", + gpsimObject::name().c_str(), + fsr, k); + + return(return_str); +} + +void LFSR::execute() +{ + if(!initialized) runtime_initialize(); + + ia->put_fsr(k); + + cpu16->pc->skip(); + //cpu16->pc->increment(); +} +//-------------------------------------------------- + +void MOVF16::execute() +{ + uint source_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + source_value = source->get(); + + // Store the result + + if(destination) + source->put(source_value); + else + cpu16->Wput(source_value); + + + cpu16->status->put_N_Z(source_value); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +MOVFF::MOVFF (Processor *new_cpu, uint new_opcode, uint address) + : multi_word_instruction(new_cpu, new_opcode, address) +{ + PMaddress = cpu16->getCurrentDisasmAddress(); + PMindex = cpu16->getCurrentDisasmIndex(); + initialized = false; + destination = 0; + source = opcode & 0xfff; + + new_name("movff"); +} + +void MOVFF::runtime_initialize() +{ + if(cpu_pic->program_memory[PMindex+1]) + { + word2_opcode = cpu_pic->program_memory[PMindex+1]->get_opcode(); + + if((word2_opcode & 0xf000) != 0xf000) + { + cout << "16bit-instructions.cc MOVFF error\n"; + return; + } + destination = word2_opcode & 0xfff; + initialized = true; + } + +} + +char *MOVFF::name(char *return_str,int len) +{ + + if(!initialized) + runtime_initialize(); + + snprintf(return_str,len,"%s\t%s,%s", + gpsimObject::name().c_str(), + cpu_pic->registers[source]->name().c_str(), + cpu_pic->registers[destination]->name().c_str()); + + + return(return_str); +} + + +void MOVFF::execute() +{ + if(!initialized) + runtime_initialize(); + + uint r = cpu_pic->registers[source]->get(); + + cpu_pic->registers[destination]->put(r); + + cpu16->pc->skip(); + //cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +MOVFP::MOVFP (Processor *new_cpu, uint new_opcode, uint address) + : multi_word_instruction(new_cpu, new_opcode, address) +{ + new_name("movfp"); +} + +void MOVFP::runtime_initialize() +{ +// if(cpu_pic->program_memory[address+1]) +// { +// word2_opcode = cpu_pic->program_memory[address+1]->get_opcode(); + +// if((word2_opcode & 0xf000) != 0xf000) +// { +// cout << "16bit-instructions.cc MOVFP error\n"; +// return; +// } + +// cpu_pic->program_memory[address+1]->update_line_number( file_id, src_line, lst_line); +// destination = word2_opcode & 0xfff; +// initialized = 1; +// } + +} + +char *MOVFP::name(char *return_str, int len) +{ +// if(!initialized) +// runtime_initialize(); + + snprintf(return_str,len,"%s\t%s,%s", + gpsimObject::name().c_str(), + cpu_pic->registers[source]->name().c_str(), + cpu_pic->registers[destination]->name().c_str()); + return(return_str); +} + +void MOVFP::execute() +{ +// if(!initialized) +// runtime_initialize(); +// uint r = cpu_pic->registers[source]->get(); +// cpu_pic->pc->skip(); +// cpu_pic->registers[destination]->put(r); +// cpu_pic->pc->increment(); +} + + +//-------------------------------------------------- + +MOVLB16::MOVLB16 (Processor *new_cpu, uint new_opcode, uint address) + : Literal_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("movlb"); +} + +void MOVLB16::execute() +{ + cpu16->registers[cpu16->bsr.address]->put(L); + cpu16->pc->increment(); +} + +//-------------------------------------------------- + +MOVLR::MOVLR (Processor *new_cpu, uint new_opcode, uint address) + : Literal_op(new_cpu, new_opcode, address) +{ +// decode(new_cpu, new_opcode); + new_name("movlr"); +} + +void MOVLR::execute() +{ +// uint source_value; +// cpu16->bsr.put(L); +// cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +MOVPF::MOVPF (Processor *new_cpu, uint new_opcode,uint address) + : multi_word_instruction(new_cpu, new_opcode,address) +{ +// opcode = new_opcode; +// cpu = new_cpu; +// address = cpu16->current_disasm_address; +// initialized = 0; +// destination = 0; +// source = opcode & 0xfff; + + new_name("movpf"); +} + +void MOVPF::runtime_initialize() +{ +// if(cpu_pic->program_memory[address+1]) +// { +// word2_opcode = cpu_pic->program_memory[address+1]->get_opcode(); +// if((word2_opcode & 0xf000) != 0xf000) +// { +// cout << "16bit-instructions.cc MOVFP error\n"; +// return; +// } +// cpu_pic->program_memory[address+1]->update_line_number( file_id, src_line, lst_line); +// destination = word2_opcode & 0xfff; +// initialized = 1; +// } +} + +char *MOVPF::name(char *return_str,int len) +{ +// if(!initialized) +// runtime_initialize(); + + snprintf(return_str,len,"%s\t%s,%s", + gpsimObject::name().c_str(), + cpu_pic->registers[source]->name().c_str(), + cpu_pic->registers[destination]->name().c_str()); + + return(return_str); +} + +void MOVPF::execute() +{ +// if(!initialized) +// runtime_initialize(); +// uint r = cpu_pic->registers[source]->get(); +// cpu_pic->pc->skip(); +// cpu_pic->registers[destination]->put(r); +// cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +MOVWF16::MOVWF16(Processor *new_cpu, uint new_opcode, uint address) + : MOVWF(new_cpu,new_opcode, address) +{ +} + +void MOVWF16::execute() +{ + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + source->put(cpu16->Wget()); + + cpu16->pc->increment(); +} + +#ifdef RRR +//-------------------------------------------------- +MOVWF16a::MOVWF16a(Processor *new_cpu, uint new_opcode, uint address) + : MOVWF(new_cpu,new_opcode, address) +{ +// pic_processor * cpu = (pic_processor*) new_cpu; + register_address = (new_opcode & 0xff); + if ( register_address >= (cpu_pic->access_gprs()) ) // some 18f devices split at 0x60 + register_address |= 0xf00; +} + +void MOVWF16a::execute() +{ + source = cpu_pic->registers[register_address]; + source->put(cpu16->Wget()); + + cpu16->pc->increment(); +} +#endif //RRR + +//-------------------------------------------------- + +MULLW::MULLW (Processor *new_cpu, uint new_opcode, uint address) + : Literal_op(new_cpu, new_opcode,address) +{ + + decode(new_cpu, new_opcode); + + new_name("mullw"); + +} + +void MULLW::execute() +{ + uint value; + + value = (0xff & cpu16->Wget()) * L; + + cpu16->prodl.put(value &0xff); + cpu16->prodh.put((value>>8) &0xff); + + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +MULWF::MULWF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("mulwf"); +} + +void MULWF::execute() +{ + uint value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + //It's not necessary to '&' the get()'s with 0xff, but it doesn't + //hurt either. + value = (0xff & cpu16->Wget()) * (0xff & source->get()); + + cpu16->prodl.put(value &0xff); + cpu16->prodh.put((value>>8) &0xff); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +NEGF::NEGF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("negf"); +} + +void NEGF::execute() +{ + uint new_value,src_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + src_value = source->get(); + new_value = 1 + ~src_value; // two's complement + + source->put(new_value&0xff); + + cpu16->status->put_Z_C_DC_OV_N_for_sub(new_value,0,src_value); + + cpu16->pc->increment(); + +} + + +//-------------------------------------------------- + +NEGW::NEGW (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode,address) +{ + +// decode(new_cpu, new_opcode); + + new_name("negw"); + +} + +void NEGW::execute() +{ + cout << "negw is not implemented???"; + +} + +//-------------------------------------------------- + +POP::POP (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("pop"); +} + +void POP::execute() +{ + + cpu16->stack->pop(); // discard TOS + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +PUSH::PUSH (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("push"); +} + +void PUSH::execute() +{ + + if (cpu16->stack->push(cpu16->pc->get_next())) + cpu16->pc->increment(); + else // stack overflow reset + cpu16->pc->jump(0); + +} + +//-------------------------------------------------- +RCALL::RCALL (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + + destination_index = (new_opcode & 0x7ff)+1; + if(new_opcode & 0x400) + destination_index -= 0x800; + + absolute_destination_index = (cpu16->getCurrentDisasmIndex() + destination_index) & 0xfffff; + + new_name("rcall"); +} + +void RCALL::execute() +{ + if(cpu16->stack->push(cpu16->pc->get_next())) + cpu16->pc->jump(absolute_destination_index); + else // stack overflow reset + cpu16->pc->jump(0); + +} + +char * RCALL::name(char *return_str,int len) +{ + + + snprintf(return_str,len,"%s\t$%c0x%x\t;(0x%05x)", + gpsimObject::name().c_str(), + (destination_index < 0) ? '-' : '+', + (destination_index & 0x7ff)<<1, + absolute_destination_index<<1); + + return(return_str); +} + + + +//-------------------------------------------------- +void RETFIE16::execute() +{ + cpu16->pc->new_address(cpu16->stack->pop()); + if(fast) + cpu16->fast_stack.pop(); + //cout << "retfie: need to enable interrupts\n"; + + cpu16->intcon.in_interrupt = false; + cpu16->intcon.put_value(cpu16->intcon.value.get()); //test for new interrupts + +} + +char *RETFIE16::name(char *return_str,int len) +{ + if(fast) + snprintf(return_str,len,"retfie\tfast"); + else + snprintf(return_str,len,"retfie"); + + return(return_str); +} + +//-------------------------------------------------- +void RETURN16::execute() +{ + + cpu16->pc->new_address(cpu16->stack->pop()); + if(fast) + cpu16->fast_stack.pop(); +} + +char *RETURN16::name(char *return_str,int len) +{ + if(fast) + snprintf(return_str,len,"return\tfast"); + else + snprintf(return_str,len,"return"); + + return(return_str); +} + +//-------------------------------------------------- + +RLCF::RLCF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("rlcf"); +} + +void RLCF::execute() +{ + uint new_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + new_value = (source->get() << 1) | cpu16->status->get_C(); + + + if(destination) + source->put(new_value&0xff); // Result goes to source + else + cpu16->Wput(new_value&0xff); + + cpu16->status->put_Z_C_N(new_value); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +RLNCF::RLNCF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("rlncf"); +} + +void RLNCF::execute() +{ + uint new_value,src_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + src_value = source->get(); + new_value = (src_value << 1) | ( (src_value & 0x80) ? 1 : 0); + + + if(destination) + source->put(new_value&0xff); // Result goes to source + else + cpu16->Wput(new_value&0xff); + + cpu16->status->put_N_Z(new_value); + + cpu16->pc->increment(); + +} + + +//-------------------------------------------------- + +RRCF::RRCF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("rrcf"); +} + +void RRCF::execute() +{ + uint new_value,src_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + src_value = source->get() & 0xff; + new_value = (src_value >> 1) | (cpu16->status->get_C() ? 0x80 : 0); + + + if(destination) + source->put(new_value&0xff); // Result goes to source + else + cpu16->Wput(new_value&0xff); + + cpu16->status->put_Z_C_N(new_value | ((src_value & 1) ? 0x100 : 0) ); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +RRNCF::RRNCF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("rrncf"); +} + +void RRNCF::execute() +{ + uint new_value,src_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + src_value = source->get() & 0xff; + new_value = (src_value >> 1) | ( (src_value & 1) ? 0x80 : 0); + + + if(destination) + source->put(new_value&0xff); // Result goes to source + else + cpu16->Wput(new_value&0xff); + + cpu16->status->put_N_Z(new_value | ((src_value & 1) ? 0x100 : 0) ); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +SETF::SETF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("setf"); +} + +void SETF::execute() +{ + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + + source->put(0xff); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +void SLEEP16::execute() +{ + cpu_pic->enter_sleep(); +} + +//-------------------------------------------------- + +void SUBLW16::execute() +{ + uint new_value,old_value; + + new_value = L - (old_value = cpu16->Wget()); + + cpu16->Wput(new_value & 0xff); + + cpu16->status->put_Z_C_DC_OV_N_for_sub(new_value, L, old_value); + + cpu16->pc->increment(); + +} + + +//-------------------------------------------------- + +SUBFWB::SUBFWB (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("subfwb"); +} + +void SUBFWB::execute() +{ + uint new_value,src_value,w_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + new_value = (w_value = cpu16->Wget()) - (src_value = source->get()) - + (1 - cpu16->status->get_C()); + + if(destination) + source->put(new_value & 0xff); + else + cpu16->Wput(new_value & 0xff); + + cpu16->status->put_Z_C_DC_OV_N_for_sub(new_value, w_value, src_value); + + cpu16->pc->increment(); + +} + + +//-------------------------------------------------- + +void SUBWF16::execute() +{ + uint new_value,src_value,w_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + new_value = (src_value = source->get()) - (w_value = cpu16->Wget()); + + if(destination) + source->put(new_value & 0xff); + else + cpu16->Wput(new_value & 0xff); + + cpu16->status->put_Z_C_DC_OV_N_for_sub(new_value, src_value, w_value); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +void SUBWFB16::execute() +{ + uint new_value,src_value,w_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + new_value = (src_value = source->get()) - (w_value = cpu16->Wget()) - + (1 - cpu16->status->get_C()); + + if(destination) + source->put(new_value & 0xff); + else + cpu16->Wput(new_value & 0xff); + + cpu16->status->put_Z_C_DC_OV_N_for_sub(new_value, src_value, w_value); + + cpu16->pc->increment(); + +} + + +//-------------------------------------------------- + +void SWAPF16::execute() +{ + uint src_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + src_value = source->get(); + + if(destination) + source->put( ((src_value >> 4) & 0x0f) | ( (src_value << 4) & 0xf0) ); + else + cpu_pic->Wput( ((src_value >> 4) & 0x0f) | ( (src_value << 4) & 0xf0) ); + + + + cpu16->pc->increment(); + +} + + +//-------------------------------------------------- + +TBLRD::TBLRD (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("tblrd"); +} + +char *TBLRD::name(char *return_str,int len) +{ + const char *index_modes[4] = {"*","*+","*-","+*"}; + + snprintf(return_str,len,"%s\t%s", + gpsimObject::name().c_str(), + index_modes[opcode&0x3]); + + + return(return_str); +} + +void TBLRD::execute() +{ + if((opcode & 3)==3) + cpu16->tbl.increment(); + + cpu16->tbl.read(); + + if((opcode & 3)==1) + cpu16->tbl.increment(); + else if((opcode & 3)==2) + cpu16->tbl.decrement(); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +TBLWT::TBLWT (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("tblwt"); +} + +char *TBLWT::name(char *return_str,int len) +{ + const char *index_modes[4] = {"*","*+","*-","+*"}; + + snprintf(return_str,len,"%s\t%s", + gpsimObject::name().c_str(), + index_modes[opcode&0x3]); + + + return(return_str); +} + +void TBLWT::execute() +{ + if((opcode & 3)==3) + cpu16->tbl.increment(); + + cpu16->tbl.write(); + + if((opcode & 3)==1) + cpu16->tbl.increment(); + else if((opcode & 3)==2) + cpu16->tbl.decrement(); + + cpu16->pc->increment(); + +} + + +//-------------------------------------------------- + +TLRD::TLRD (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + +// decode(new_cpu, new_opcode); + + new_name("tlrd"); + +} + +char *TLRD::name(char *return_str,int len) +{ + const char *index_modes[4] = {"*","*+","*-","+*"}; + + snprintf(return_str,len,"%s\t%s", + gpsimObject::name().c_str(), + index_modes[opcode&0x3]); + + + return(return_str); +} + +void TLRD::execute() +{ +// uint pm_opcode; + +// if((opcode & 3)==3) +// cpu16->tbl.increment(); + +// cpu16->tbl.read(); + +// if((opcode & 3)==1) +// cpu16->tbl.increment(); +// else if((opcode & 3)==2) +// cpu16->tbl.decrement(); + +// cpu_pic->pc->increment(); + +} + +//-------------------------------------------------- + +TLWT::TLWT (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("tlwt"); +} + +char *TLWT::name(char *return_str,int len) +{ + const char *index_modes[4] = {"*","*+","*-","+*"}; + + snprintf(return_str,len,"%s\t%s", + gpsimObject::name().c_str(), + index_modes[opcode&0x3]); + + + return(return_str); +} + +void TLWT::execute() +{ +// uint pm_opcode; + +// if((opcode & 3)==3) +// cpu16->tbl.increment(); + +// cpu16->tbl.write(); + +// if((opcode & 3)==1) +// cpu16->tbl.increment(); +// else if((opcode & 3)==2) +// cpu16->tbl.decrement(); + +// cpu_pic->pc->increment(); + +} + +//-------------------------------------------------- + +TSTFSZ::TSTFSZ (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + + decode(new_cpu, new_opcode); + + new_name("tstfsz"); + +} + +void TSTFSZ::execute() +{ + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + if( 0 == (source->get() & 0xff) ) + cpu16->pc->skip(); // Skip next instruction + else + cpu16->pc->increment(); + +} +//-------------------------------------------------- + +void XORLW16::execute() +{ + uint new_value; + + new_value = cpu16->Wget() ^ L; + + cpu16->Wput(new_value); + cpu16->status->put_N_Z(new_value); + + cpu16->pc->increment(); + +} + +//-------------------------------------------------- + +void XORWF16::execute() +{ + uint new_value; + + if (access) + source = cpu_pic->register_bank[register_address]; + else if (cpu16->extended_instruction() && register_address < 0x60) + source = cpu_pic->registers[register_address + cpu16->ind2.fsr_value]; + else + source = cpu_pic->registers[register_address]; + + new_value = source->get() ^ cpu16->Wget(); + + if(destination) + source->put(new_value); // Result goes to source + else + cpu16->Wput(new_value); + + cpu16->status->put_N_Z(new_value); + + cpu16->pc->increment(); + +} + + diff --git a/src/gpsim/16bit-instructions.h b/src/gpsim/16bit-instructions.h new file mode 100644 index 0000000..2a5b661 --- /dev/null +++ b/src/gpsim/16bit-instructions.h @@ -0,0 +1,1150 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#ifndef __16BIT_INSTRUCTIONS_H__ +#define __16BIT_INSTRUCTIONS_H__ + +#include "14bit-instructions.h" +#include "16bit-registers.h" + +/*--------------------------------------------------------- + * 16bit-instructions.h + * + * This .h file contains the definitions for the 16-bit core + * instructions (the 16bit core of the 18cxxx processors that + * is). Most of the instructions are derived from the corresponding + * 12 and 14 bit core instructions. However, the virtual function + * 'execute' is replaced. This is because the memory addressing and + * the status register are different for the 16bit core. The alternative is + * is to patch the existing instructions with the 16bit stuff. + * I feel that this is an unwarranted performance hit. So gpsim + * is slightly bigger, but it's also slightly faster... + */ + +//--------------------------------------------------------- +class Branching : public instruction +{ +public: + int destination_index; + uint absolute_destination_index; + + Branching(Processor *new_cpu, uint new_opcode, uint address); + + virtual void execute(){ }; + virtual void debug(){ }; + virtual char *name(char *,int); + virtual bool isBase() { return true;} + + void decode(Processor *new_cpu, uint new_opcode); + +}; + +//--------------------------------------------------------- +class multi_word_instruction : public instruction +{ + public: + uint word2_opcode; + uint PMaddress; + uint PMindex; + bool initialized; + + multi_word_instruction(Processor *new_cpu, uint new_opcode, uint address); + + virtual int instruction_size() { return 2;} + virtual enum INSTRUCTION_TYPES isa() {return MULTIWORD_INSTRUCTION;}; + virtual bool isBase() { return true;} + + virtual void initialize(bool init_state) { initialized = init_state; } +}; + +//--------------------------------------------------------- +class multi_word_branch : public multi_word_instruction +{ + public: + uint destination_index; + + multi_word_branch(Processor *new_cpu, uint new_opcode, uint address); + + void runtime_initialize(); + virtual void execute(){}; + virtual char *name(char *,int); + +}; + +//--------------------------------------------------------- +class ADDULNK : public instruction +{ + +public: + ADDULNK(Processor *new_cpu, uint new_opcode,const char *, uint address); + virtual bool isBase() { return true;} + virtual void execute(); + virtual char *name(char *,int); +protected: + uint m_lit; +}; + +//--------------------------------------------------------- +class ADDFSR16 : public instruction +{ + +public: + ADDFSR16(Processor *new_cpu, uint new_opcode,const char *, uint address); + virtual bool isBase() { return true;} + virtual void execute(); + virtual char *name(char *,int); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + { + if (((new_opcode>>6)&3) == 3) + { + if (new_opcode & 0x100) + return new ADDULNK(new_cpu,new_opcode,"subulnk", address); + else + return new ADDULNK(new_cpu,new_opcode,"addulnk", address); + } + if (new_opcode & 0x100) + return new ADDFSR16(new_cpu,new_opcode,"subfsr", address); + return new ADDFSR16(new_cpu,new_opcode,"addfsr", address); + } +protected: + uint m_fsr; + uint m_lit; + Indirect_Addressing *ia; +}; + +//--------------------------------------------------------- +class CALLW16 : public CALLW +{ +public: + CALLW16(Processor *new_cpu, uint new_opcode, uint address) : + CALLW(new_cpu, new_opcode, address){}; + virtual bool isBase() { return true;} + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + { + return new CALLW16(new_cpu,new_opcode,address); + } +}; +//--------------------------------------------------------- +class MOVSF : public multi_word_instruction +{ +public: + + MOVSF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *,int); + void runtime_initialize(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVSF(new_cpu,new_opcode,address);} +protected: + uint source,destination; + +}; + +//--------------------------------------------------------- +class PUSHL : public instruction +{ +public: + PUSHL(Processor *new_cpu, uint new_opcode, uint address); + virtual bool isBase() { return true;} + virtual void execute(); + virtual char *name(char *,int); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + { + return new PUSHL(new_cpu,new_opcode,address); + } +protected: + uint m_lit; +}; + + +//--------------------------------------------------------- +class ADDLW16 : public ADDLW +{ + +public: + ADDLW16(Processor *new_cpu, uint new_opcode, uint address) : + ADDLW(new_cpu, new_opcode,address) + {}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new ADDLW16(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class ADDWF16 : public ADDWF +{ +public: + int i = 0; + + ADDWF16(Processor *new_cpu, uint new_opcode, uint address) + : ADDWF(new_cpu,new_opcode,address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new ADDWF16(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class ADDWFC16 : public ADDWFC +{ +public: + + ADDWFC16(Processor *new_cpu, uint new_opcode, uint address) + : ADDWFC(new_cpu,new_opcode,address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new ADDWFC16(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class ANDLW16 : public ANDLW +{ + +public: + ANDLW16(Processor *new_cpu, uint new_opcode, uint address) : + ANDLW(new_cpu, new_opcode,address) + {}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new ANDLW16(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class ANDWF16 : public ANDWF +{ +public: + + ANDWF16(Processor *new_cpu, uint new_opcode, uint address) + : ANDWF(new_cpu,new_opcode,address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new ANDWF16(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class BC : public Branching +{ +public: + + BC(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BC(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class BN : public Branching +{ +public: + + BN(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BN(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class BNC : public Branching +{ +public: + + BNC(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BNC(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class BNN : public Branching +{ +public: + + BNN(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BNN(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class BNOV : public Branching +{ +public: + + BNOV(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BNOV(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class BNZ : public Branching +{ +public: + + BNZ(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BNZ(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class BOV : public Branching +{ +public: + + BOV(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BOV(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class BRA16 : public instruction +{ +public: + int destination_index; + uint absolute_destination_index; + + BRA16(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *,int); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BRA16(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class BSF16 : public BSF +{ +public: + int i = 0; + + BSF16(Processor *new_cpu, uint new_opcode, uint address) + : BSF(new_cpu,new_opcode,address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BSF16(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class BCF16 : public BCF +{ +public: + int i = 0; + + BCF16(Processor *new_cpu, uint new_opcode, uint address) + : BCF(new_cpu,new_opcode,address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BCF16(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class BTFSC16 : public BTFSC +{ +public: + int i = 0; + + BTFSC16(Processor *new_cpu, uint new_opcode, uint address) + : BTFSC(new_cpu,new_opcode,address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BTFSC16(new_cpu,new_opcode,address);} +}; + +//----------------------------------------------------------- +class BTFSS16 : public BTFSS +{ +public: + int i = 0; + + BTFSS16(Processor *new_cpu, uint new_opcode, uint address) + : BTFSS(new_cpu,new_opcode,address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BTFSS16(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class BTG : public Bit_op +{ +public: + + BTG(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BTG(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class BZ : public Branching +{ +public: + + BZ(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new BZ(new_cpu,new_opcode,address);} + +}; + + +//--------------------------------------------------------- +class CALL16 : public multi_word_branch +{ +public: + bool fast; + + CALL16(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new CALL16(new_cpu,new_opcode,address);} + virtual char *name(char *,int); + +}; + + +//----------------------------------------------------------- +class CLRF16 : public CLRF +{ +public: + + CLRF16(Processor *new_cpu, uint new_opcode, uint address) + : CLRF(new_cpu,new_opcode,address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new CLRF16(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class COMF16 : public COMF +{ +public: + + COMF16(Processor *new_cpu, uint new_opcode, uint address) + : COMF(new_cpu,new_opcode,address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new COMF16(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class CPFSEQ : public Register_op +{ +public: + + CPFSEQ(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new CPFSEQ(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class CPFSGT : public Register_op +{ +public: + + CPFSGT(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new CPFSGT(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class CPFSLT : public Register_op +{ +public: + + CPFSLT(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new CPFSLT(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class DAW : public instruction +{ +public: + + DAW(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new DAW(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class DECF16 : public DECF +{ +public: + + DECF16(Processor *new_cpu, uint new_opcode, uint address) + : DECF(new_cpu,new_opcode,address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new DECF16(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class DECFSZ16 : public DECFSZ +{ +public: + + DECFSZ16(Processor *new_cpu, uint new_opcode, uint address) + : DECFSZ(new_cpu,new_opcode,address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new DECFSZ16(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class DCFSNZ : public Register_op +{ +public: + + DCFSNZ(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new DCFSNZ(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class GOTO16 : public multi_word_branch +{ +public: + + GOTO16(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new GOTO16(new_cpu,new_opcode,address);} +}; + + +//--------------------------------------------------------- +class INCF16 : public INCF +{ +public: + + INCF16(Processor *new_cpu, uint new_opcode, uint address) + : INCF(new_cpu,new_opcode,address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new INCF16(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class INCFSZ16 : public INCFSZ +{ +public: + + INCFSZ16(Processor *new_cpu, uint new_opcode, uint address) + : INCFSZ(new_cpu,new_opcode,address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new INCFSZ16(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class INFSNZ : public Register_op +{ +public: + + INFSNZ(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new INFSNZ(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- + +class IORLW16 : public IORLW +{ + +public: + IORLW16(Processor *new_cpu, uint new_opcode, uint address) : + IORLW(new_cpu, new_opcode,address) + {}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new IORLW16(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class IORWF16 : public IORWF +{ +public: + + IORWF16(Processor *new_cpu, uint new_opcode, uint address) + : IORWF(new_cpu,new_opcode,address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new IORWF16(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class LCALL16 : public multi_word_branch +{ +public: + bool fast; + + LCALL16(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new LCALL16(new_cpu,new_opcode,address);} + virtual char *name(char *,int); + +}; + +//--------------------------------------------------------- +class LFSR : public multi_word_instruction +{ +public: + uint fsr,k; + Indirect_Addressing *ia; + + LFSR(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *,int); + void runtime_initialize(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new LFSR(new_cpu,new_opcode,address);} +}; + + +//--------------------------------------------------------- +class MOVF16 : public MOVF +{ +public: + + MOVF16(Processor *new_cpu, uint new_opcode, uint address) + : MOVF(new_cpu,new_opcode,address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVF16(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class MOVFF : public multi_word_instruction +{ +public: + uint source,destination; + + MOVFF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *,int); + void runtime_initialize(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVFF(new_cpu,new_opcode,address);} +}; + + +//--------------------------------------------------------- +class MOVFP : public multi_word_instruction +{ +public: + uint source,destination; + + MOVFP(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *,int); + void runtime_initialize(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVFP(new_cpu,new_opcode,address);} +}; + + +//--------------------------------------------------------- + +class MOVLB16 : public Literal_op +{ +public: + MOVLB16(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVLB16(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- + +class MOVLR : public Literal_op +{ +public: + MOVLR(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVLR(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class MOVPF : public multi_word_instruction +{ +public: + uint source,destination; + + MOVPF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *,int); + void runtime_initialize(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVPF(new_cpu,new_opcode,address);} +}; + + +//--------------------------------------------------------- +class MOVWF16 : public MOVWF +{ +public: + + MOVWF16(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVWF16(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- + +#ifdef RRR +class MOVWF16a : public MOVWF +{ +public: + + MOVWF16a(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MOVWF16a(new_cpu,new_opcode,address);} + +}; + +#endif //RRR +//--------------------------------------------------------- + +class MULLW : public Literal_op +{ +public: + MULLW(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MULLW(new_cpu,new_opcode,address);} + +}; + + +//--------------------------------------------------------- +class MULWF : public Register_op +{ +public: + + MULWF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new MULWF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class NEGF : public Register_op +{ +public: + + NEGF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new NEGF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class NEGW : public Register_op +{ +public: + + NEGW(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new NEGW(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class POP : public instruction +{ +public: + + POP(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new POP(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class PUSH : public instruction +{ +public: + + PUSH(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new PUSH(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class RCALL : public instruction +{ +public: + int destination_index; + uint absolute_destination_index; + + RCALL(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *,int); + virtual bool isBase() { return true;} + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new RCALL(new_cpu,new_opcode,address);} +}; + + + +//--------------------------------------------------------- +class RETFIE16 : public RETFIE +{ +public: + bool fast; + + RETFIE16(Processor *new_cpu, uint new_opcode, uint address) : + RETFIE(new_cpu,new_opcode,address) + { + fast = (new_opcode & 1); + }; + virtual void execute(); + virtual char *name(char *,int); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new RETFIE16(new_cpu,new_opcode,address);} + +}; + + +//--------------------------------------------------------- +class RETURN16 : public RETURN +{ +public: + bool fast; + + RETURN16(Processor *new_cpu, uint new_opcode, uint address) : + RETURN(new_cpu,new_opcode,address) + { + fast = (new_opcode & 1); + }; + virtual void execute(); + virtual char *name(char *,int); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new RETURN16(new_cpu,new_opcode,address);} + +}; + + +//--------------------------------------------------------- +class RLCF : public Register_op +{ +public: + + RLCF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new RLCF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class RLNCF : public Register_op +{ +public: + + RLNCF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new RLNCF(new_cpu,new_opcode,address);} + +}; + + +//--------------------------------------------------------- +class RRCF : public Register_op +{ +public: + + RRCF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new RRCF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class RRNCF : public Register_op +{ +public: + + RRNCF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new RRNCF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class SETF : public Register_op +{ +public: + + SETF(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new SETF(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class SLEEP16 : public SLEEP +{ +public: + + SLEEP16(Processor *new_cpu, uint new_opcode, uint address) : + SLEEP(new_cpu,new_opcode,address) { }; + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new SLEEP16(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class SUBFWB : public Register_op +{ +public: + + SUBFWB(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new SUBFWB(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- + +class SUBLW16 : public SUBLW +{ + +public: + + SUBLW16(Processor *new_cpu, uint new_opcode, uint address) : + SUBLW(new_cpu,new_opcode,address) { }; + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new SUBLW16(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- + +class SUBWF16 : public SUBWF +{ + +public: + + SUBWF16(Processor *new_cpu, uint new_opcode, uint address) : + SUBWF(new_cpu,new_opcode,address) { }; + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new SUBWF16(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class SUBWFB16 : public SUBWFB +{ +public: + + SUBWFB16(Processor *new_cpu, uint new_opcode, uint address) : + SUBWFB(new_cpu,new_opcode,address) { }; + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new SUBWFB16(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class SWAPF16 : public SWAPF +{ +public: + + SWAPF16(Processor *new_cpu, uint new_opcode, uint address) : + SWAPF(new_cpu,new_opcode,address) { }; + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new SWAPF16(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class TBLRD : public instruction +{ +public: + + TBLRD(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *,int); + virtual bool isBase() { return true;} + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new TBLRD(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class TBLWT : public instruction +{ +public: + + TBLWT(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *,int); + virtual bool isBase() { return true;} + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new TBLWT(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class TLRD : public instruction +{ +public: + + TLRD(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *,int); + virtual bool isBase() { return true;} + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new TLRD(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class TLWT : public instruction +{ +public: + + TLWT(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + virtual char *name(char *,int); + virtual bool isBase() { return true;} + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new TLWT(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class TSTFSZ : public Register_op +{ +public: + + TSTFSZ(Processor *new_cpu, uint new_opcode, uint address); + virtual void execute(); + + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new TSTFSZ(new_cpu,new_opcode,address);} + +}; + +//--------------------------------------------------------- +class XORLW16 : public XORLW +{ + +public: + XORLW16(Processor *new_cpu, uint new_opcode, uint address) : + XORLW(new_cpu, new_opcode, address) + {}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new XORLW16(new_cpu,new_opcode,address);} +}; + +//--------------------------------------------------------- +class XORWF16 : public XORWF +{ +public: + + XORWF16(Processor *new_cpu, uint new_opcode, uint address) + : XORWF(new_cpu,new_opcode, address){}; + virtual void execute(); + static instruction *construct(Processor *new_cpu, uint new_opcode, uint address) + {return new XORWF16(new_cpu,new_opcode,address);} +}; + + +#endif /* __12BIT_INSTRUCTIONS_H__ */ diff --git a/src/gpsim/16bit-processors.cc b/src/gpsim/16bit-processors.cc new file mode 100644 index 0000000..9e2bb93 --- /dev/null +++ b/src/gpsim/16bit-processors.cc @@ -0,0 +1,1034 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include +#include +#include +#include + +#include "config.h" +#include "packages.h" +#include "16bit-processors.h" +#include "stimuli.h" +#include "eeprom.h" + + +//------------------------------------------------------------------------ +// Configuration bits +// +// The 16bit-core PIC devices contain configuration memory starting at +// address 0x300000. +// +string Config1H::toString() +{ + int64_t i64; + get(i64); + int i = i64 &0xfff; + + char buff[256]; + + const char *OSCdesc[8] = { + "LP oscillator", + "XT oscillator", + "HS oscillator", + "RC oscillator", + "EC oscillator w/ OSC2 configured as divide-by-4 clock output", + "EC oscillator w/ OSC2 configured as RA6", + "HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)", + "RC oscillator w/ OSC2 configured as RA6" + }; + snprintf(buff,sizeof(buff), + "$%04x\n" + " FOSC=%d - Clk source = %s\n" + " OSCEN=%d - Oscillator switching is %s\n", + i, + i & (FOSC0 | FOSC1 | FOSC2), OSCdesc[i & (FOSC0 | FOSC1 | FOSC2)], + ((i & OSCEN) ? 1 : 0), ((i & OSCEN) ? "disabled" : "enabled")); + + return string(buff); +} + +string Config1H_4bits::toString() +{ + int64_t i64; + get(i64); + int i = i64 &0xfff; + + char buff[256]; + + const char *OSCdesc[] = { + "LP oscillator", + "XT oscillator", + "HS oscillator", + "RC oscillator", + "EC oscillator w/ OSC2 configured as divide-by-4 clock output", + "EC oscillator w/ OSC2 configured as RA6", + "HS oscillator with PLL enabled/Clock frequency = (4 x FOSC)", + "RC oscillator w/ OSC2 configured as RA6", + "Internal oscillator block, port function on RA6 and RA7", + "Internal oscillator block, CLKO function on RA6, port function on RA7", + "External RC oscillator, CLKO function on RA6", + "External RC oscillator, CLKO function on RA6", + "External RC oscillator, CLKO function on RA6", + "External RC oscillator, CLKO function on RA6", + "External RC oscillator, CLKO function on RA6", + "External RC oscillator, CLKO function on RA6" + }; + snprintf(buff,sizeof(buff), + "$%04x\n" + " FOSC=%d - Clk source = %s\n" + " OSCEN=%d - Oscillator switching is %s\n", + i, + i & (FOSC0 | FOSC1 | FOSC2 | FOSC3), OSCdesc[i & (FOSC0 | FOSC1 | FOSC2 | FOSC3)], + ((i & OSCEN) ? 1 : 0), ((i & OSCEN) ? "disabled" : "enabled")); + + return string(buff); +} + +//------------------------------------------------------------------------ +// Config2H - default +// The default Config2H register controls the 18F series WDT. +class Config2H : public ConfigWord +{ + #define WDTEN (1<<0) + #define WDTPS0 (1<<1) + #define WDTPS1 (1<<2) + #define WDTPS2 (1<<3) + + #define CONFIG2H_default (WDTEN | WDTPS0 | WDTPS1 | WDTPS2) + public: + Config2H(_16bit_processor *pCpu, uint addr) + : ConfigWord("CONFIG2H", CONFIG2H_default, "WatchDog configuration", pCpu, addr) + { + set(CONFIG2H_default); + } + virtual void set(int64_t v) + { + Integer::set(v); + if (m_pCpu) + { + m_pCpu->wdt.set_postscale((v & (WDTPS0|WDTPS1|WDTPS2)) >> 1); + m_pCpu->wdt.initialize((v & WDTEN) == WDTEN); + } + } + + virtual string toString() + { + int64_t i64; + get(i64); + int i = i64 &0xfff; + + char buff[256]; + + snprintf(buff,sizeof(buff), + "$%04x\n" + " WDTEN=%d - WDT is %s, prescale=1:%d\n", + i, + ((i & WDTEN) ? 1 : 0), ((i & WDTEN) ? "enabled" : "disabled"), + 1 << (i & (WDTPS0 | WDTPS1 | WDTPS2)>>1)); + + return string(buff); + } +}; + +//------------------------------------------------------------------------ +// Config4L - default +// The default Config4L register controls the 18F series WDT. +class Config4L : public ConfigWord +{ + #define STKVREN (1<<0) + #define LVP (1<<2) + #define BBSIZ0 (1<<4) + #define BBSIZ1 (1<<5) + #define XINST (1<<6) + #define _DEBUG (1<<7) + + #define CONFIG4L_default (STKVREN | LVP | _DEBUG) + public: + Config4L(_16bit_processor *pCpu, uint addr) + : ConfigWord("CONFIG4L", CONFIG4L_default, "Config word 4L", pCpu, addr) + { + set(CONFIG4L_default); + } + #define Cpu16 ((_16bit_processor *)m_pCpu) + virtual void set(int64_t v) + { + Integer::set(v); + if (m_pCpu) + { + Cpu16->set_extended_instruction((v & XINST) == XINST); + if(m_pCpu->stack) + m_pCpu->stack->STVREN = ((v & STKVREN) == STKVREN); + } + + } + + virtual string toString() + { + int64_t i64; + get(i64); + int i = i64 &0xfff; + + char buff[256]; + + snprintf(buff,sizeof(buff), + "$%04x\n" + " STVREN=%d - BBSIZE=%x XINST=%d\n", + i, + ((i & STKVREN) ? 1 : 0), (i & (BBSIZ1 | BBSIZ0)) >> 4, + ((i & XINST) ? 1 : 0)); + + return string(buff); + } +}; + + +#define PWRTEN 1<<0 +#define BOREN 1<<1 +#define BORV0 1<<2 +#define BORV1 1<<2 + +#define CCP2MX 1<<0 + +//------------------------------------------------------------------- +_16bit_processor::_16bit_processor(const char *_name, const char *desc) + : pic_processor(_name,desc), +/* + adcon0(this, "adcon0", "A2D control register"), + adcon1(this, "adcon1", "A2D control register"), +*/ + adresl(this, "adresl", "A2D result low"), + adresh(this, "adresh", "A2D result high"), + intcon(this, "intcon", "Interrupt control"), + intcon2(this, "intcon2", "Interrupt control"), + intcon3(this, "intcon3", "Interrupt control"), + bsr(this, "bsr", "Bank Select Register"), + tmr0l(this, "tmr0l", "TMR0 Low"), + tmr0h(this, "tmr0h", "TMR0 High"), + t0con(this, "t0con", "TMR0 Control"), + rcon(this, "rcon", "Reset Control"), + pir1(this,"pir1","Peripheral Interrupt Register",0,0), + ipr1(this, "ipr1", "Interrupt Priorities"), + ipr2(this, "ipr2", "Interrupt Priorities"), + pie1(this, "pie1", "Peripheral Interrupt Enable"), + pie2(this, "pie2", "Peripheral Interrupt Enable"), + t2con(this, "t2con", "TMR2 Control"), + pr2(this, "pr2", "TMR2 Period Register"), + tmr2(this, "tmr2", "TMR2 Register"), + tmr1l(this, "tmr1l", "TMR1 Low"), + tmr1h(this, "tmr1h", "TMR1 High"), + ccp1con(this, "ccp1con", "Capture Compare Control"), + ccpr1l(this, "ccpr1l", "Capture Compare 1 Low"), + ccpr1h(this, "ccpr1h", "Capture Compare 1 High"), + ccp2con(this, "ccp2con", "Capture Compare Control"), + ccpr2l(this, "ccpr2l", "Capture Compare 2 Low"), + ccpr2h(this, "ccpr2h", "Capture Compare 2 High"), + tmr3l(this, "tmr3l", "TMR3 Low"), + tmr3h(this, "tmr3h", "TMR3 High"), + + osccon(0), + lvdcon(this, "lvdcon", "LVD Control"), + wdtcon(this, "wdtcon", "WDT Control", 1), + prodh(this, "prodh", "Product High"), + prodl(this, "prodl", "Product Low"), + pclatu(this, "pclatu", "Program Counter Latch upper byte"), + + ind0(this,string("0")), + ind1(this,string("1")), + ind2(this,string("2")), + usart(this), + + tbl(this), + ssp(this) +{ + + set_osc_pin_Number(0, 253, NULL); + set_osc_pin_Number(1, 253, NULL); + package = 0; + pll_factor = 0; + + pc = new Program_Counter16(this); + + m_porta = new PicPortRegister(this,"porta","",8,0xff); + m_porta->setEnableMask(0x7f); + m_trisa = new PicTrisRegister(this,"trisa","", m_porta, false); + m_trisa->setEnableMask(0x7f); + m_lata = new PicLatchRegister(this,"lata","", m_porta); + m_lata->setEnableMask(0x7f); + + m_portb = new PicPortBRegister(this,"portb","", &intcon, 8,0xff, + &intcon2, &intcon3); + m_portb->assignRBPUSink(7,&intcon2); + m_trisb = new PicTrisRegister(this,"trisb","", m_portb, false); + m_latb = new PicLatchRegister(this,"latb","", m_portb); + + m_portc = new PicPortRegister(this,"portc","",8,0xff); + m_trisc = new PicTrisRegister(this,"trisc","", m_portc, false); + m_latc = new PicLatchRegister(this,"latc","", m_portc); + pir2 = new PIR2v2(this,"pir2","Peripheral Interrupt Register",0,0); + + t1con = new T1CON(this, "t1con", "TMR1 Control"); + t3con = new T3CON(this, "t3con", "TMR3 Control"); + //tmr0l.set_cpu(this, m_porta, 4, option_reg); + //tmr0l.start(0); + m_porta->addSink(&tmr0l,4); + + stack = new Stack16(this); + internal_osc = false; +} + +//------------------------------------------------------------------- +_16bit_processor::~_16bit_processor() +{ + delete_sfr_map(); +} + +//------------------------------------------------------------------- +pic_processor *_16bit_processor::construct() +{ + cout << "creating 16bit processor construct\n"; + + _16bit_processor *p = new _16bit_processor; + + p->create(); + p->create_invalid_registers(); + p->name_str = "generic 16bit processor"; + + return p; +} + +void _16bit_processor :: delete_sfr_map() +{ + unassignMCLRPin(); + delete_file_registers(0x0, last_register); + remove_sfr_register(&pie1); + remove_sfr_register(&pir1); + remove_sfr_register(&ipr1); + remove_sfr_register(&pie2); + delete_sfr_register(pir2); + remove_sfr_register(&ipr2); + remove_sfr_register(&usart.rcsta); + remove_sfr_register(&usart.txsta); + remove_sfr_register(&usart.spbrg); + delete_sfr_register(usart.txreg); + delete_sfr_register(usart.rcreg); + delete_sfr_register(t3con); + remove_sfr_register(&tmr3l); + remove_sfr_register(&tmr3h); + + if ( HasCCP2() ) + { + remove_sfr_register(&ccp2con); + remove_sfr_register(&ccpr2l); + remove_sfr_register(&ccpr2h); + } + remove_sfr_register(&ccp1con); + remove_sfr_register(&ccpr1l); + remove_sfr_register(&ccpr1h); + + remove_sfr_register(&adresl); + remove_sfr_register(&adresh); + + remove_sfr_register(&ssp.sspcon2); + remove_sfr_register(&ssp.sspcon); + remove_sfr_register(&ssp.sspstat); + remove_sfr_register(&ssp.sspadd); + remove_sfr_register(&ssp.sspbuf); + + if (!MovedReg()) + { + remove_sfr_register(&t2con); + remove_sfr_register(&pr2); + remove_sfr_register(&tmr2); + } + + delete_sfr_register(t1con); + delete_sfr_register(osccon); + remove_sfr_register(&tmr1l); + remove_sfr_register(&tmr1h); + + remove_sfr_register(&rcon); + remove_sfr_register(&wdtcon); + remove_sfr_register(&lvdcon); + remove_sfr_register(&t0con); + remove_sfr_register(&tmr0l); + remove_sfr_register(&tmr0h); + remove_sfr_register(&ind2.fsrl); + remove_sfr_register(&ind2.fsrh); + remove_sfr_register(&ind2.plusw); + remove_sfr_register(&ind2.preinc); + remove_sfr_register(&ind2.postdec); + remove_sfr_register(&ind2.postinc); + remove_sfr_register(&ind2.postinc); + remove_sfr_register(&ind2.indf); + + remove_sfr_register(&bsr); + + remove_sfr_register(&ind1.fsrl); + remove_sfr_register(&ind1.fsrh); + remove_sfr_register(&ind1.plusw); + remove_sfr_register(&ind1.preinc); + remove_sfr_register(&ind1.postdec); + remove_sfr_register(&ind1.postinc); + remove_sfr_register(&ind1.indf); + + + remove_sfr_register(&ind0.fsrl); + remove_sfr_register(&ind0.fsrh); + remove_sfr_register(&ind0.plusw); + remove_sfr_register(&ind0.preinc); + remove_sfr_register(&ind0.postdec); + remove_sfr_register(&ind0.postinc); + remove_sfr_register(&ind0.indf); + + remove_sfr_register(&intcon3); + remove_sfr_register(&intcon2); + remove_sfr_register(&intcon); + + remove_sfr_register(&prodl); + remove_sfr_register(&prodh); + + remove_sfr_register(&tbl.tablat); + remove_sfr_register(&tbl.tblptrl); + remove_sfr_register(&tbl.tblptrh); + remove_sfr_register(&tbl.tblptru); + remove_sfr_register(&pclatu); + + Stack16 *stack16 = static_cast(stack); + remove_sfr_register(&stack16->stkptr); + remove_sfr_register(&stack16->tosl); + remove_sfr_register(&stack16->tosh); + remove_sfr_register(&stack16->tosu); + + EEPROM *e = get_eeprom(); + + if (e) { + remove_sfr_register(e->get_reg_eedata()); + remove_sfr_register(e->get_reg_eeadr()); + if ( e->get_reg_eeadrh() ) + remove_sfr_register(e->get_reg_eeadrh()); + remove_sfr_register(e->get_reg_eecon1()); + remove_sfr_register(e->get_reg_eecon2()); + } + delete_sfr_register(m_porta); + delete_sfr_register(m_lata); + delete_sfr_register(m_trisa); + delete_sfr_register(m_portb); + delete_sfr_register(m_latb); + delete_sfr_register(m_trisb); + if ( HasPortC() ) + { + delete_sfr_register(m_portc); + delete_sfr_register(m_latc); + delete_sfr_register(m_trisc); + } + delete pc; +} + +//------------------------------------------------------------------- +void _16bit_processor :: create_sfr_map() +{ + last_register = last_actual_register(); + add_file_registers(0x0, last_register, 0); + + RegisterValue porv(0,0); + RegisterValue porv2(0,0); + + add_sfr_register(m_porta, 0xf80,porv); + add_sfr_register(m_portb, 0xf81,porv); + if ( HasPortC() ) + add_sfr_register(m_portc, 0xf82,porv); + + add_sfr_register(m_lata, 0xf89,porv); + add_sfr_register(m_latb, 0xf8a,porv); + if ( HasPortC() ) + add_sfr_register(m_latc, 0xf8b,porv); + + add_sfr_register(m_trisa, 0xf92,RegisterValue(0x7f,0)); + add_sfr_register(m_trisb, 0xf93,RegisterValue(0xff,0)); + if ( HasPortC() ) + add_sfr_register(m_trisc, 0xf94,RegisterValue(0xff,0)); + + add_sfr_register(&pie1, 0xf9d,porv,"pie1"); + add_sfr_register(&pir1, 0xf9e,porv,"pir1"); + add_sfr_register(&ipr1, 0xf9f,porv,"ipr1"); + + add_sfr_register(&pie2, 0xfa0,porv,"pie2"); + add_sfr_register(&ipr2, 0xfa2,porv,"ipr2"); + + + if ( HasPortC() ) + usart.initialize(&pir1,&(*m_portc)[6], &(*m_portc)[7], + new _TXREG(this,"txreg", "USART Transmit Register", &usart), + new _RCREG(this,"rcreg", "USART Receiver Register", &usart)); + else + usart.initialize(&pir1,0, 0, + new _TXREG(this,"txreg", "USART Transmit Register", &usart), + new _RCREG(this,"rcreg", "USART Receiver Register", &usart)); + + add_sfr_register(&usart.rcsta, 0xfab,porv,"rcsta"); + add_sfr_register(&usart.txsta, 0xfac,RegisterValue(0x02,0),"txsta"); + add_sfr_register(usart.txreg, 0xfad,porv,"txreg"); + add_sfr_register(usart.rcreg, 0xfae,porv,"rcreg"); + add_sfr_register(&usart.spbrg, 0xfaf,porv,"spbrg"); + + add_sfr_register(t3con, 0xfb1,porv); + add_sfr_register(&tmr3l, 0xfb2,porv,"tmr3l"); + add_sfr_register(&tmr3h, 0xfb3,porv,"tmr3h"); + + if ( HasCCP2() ) + { + add_sfr_register(&ccp2con, 0xfba,porv,"ccp2con"); + add_sfr_register(&ccpr2l, 0xfbb,porv,"ccpr2l"); + add_sfr_register(&ccpr2h, 0xfbc,porv,"ccpr2h"); + } + add_sfr_register(&ccp1con, 0xfbd,porv,"ccp1con"); + add_sfr_register(&ccpr1l, 0xfbe,porv,"ccpr1l"); + add_sfr_register(&ccpr1h, 0xfbf,porv,"ccpr1h"); + + add_sfr_register(&adresl, 0xfc3,porv,"adresl"); + add_sfr_register(&adresh, 0xfc4,porv,"adresh"); + + add_sfr_register(&ssp.sspcon2, 0xfc5,porv,"sspcon2"); + add_sfr_register(&ssp.sspcon, 0xfc6,porv,"sspcon1"); + add_sfr_register(&ssp.sspstat, 0xfc7,porv,"sspstat"); + add_sfr_register(&ssp.sspadd, 0xfc8,porv,"sspadd"); + add_sfr_register(&ssp.sspbuf, 0xfc9,porv,"sspbuf"); + if (!MovedReg()) + { + add_sfr_register(&t2con, 0xfca,porv,"t2con"); + add_sfr_register(&pr2, 0xfcb,RegisterValue(0xff,0),"pr2"); + add_sfr_register(&tmr2, 0xfcc,porv,"tmr2"); + } + + add_sfr_register(t1con, 0xfcd,porv,"t1con"); + add_sfr_register(&tmr1l, 0xfce,porv,"tmr1l"); + add_sfr_register(&tmr1h, 0xfcf,porv,"tmr1h"); + + add_sfr_register(&rcon, 0xfd0,RegisterValue(0x1c,0),"rcon"); + add_sfr_register(&wdtcon, 0xfd1,porv,"wdtcon"); + add_sfr_register(&lvdcon, 0xfd2,porv,"lvdcon"); + + add_sfr_register( osccon, 0xfd3,RegisterValue(0x40,0),"osccon"); + + add_sfr_register(&t0con, 0xfd5,RegisterValue(0xff,0),"t0con"); + add_sfr_register(&tmr0l, 0xfd6,porv,"tmr0l"); + add_sfr_register(&tmr0h, 0xfd7,porv,"tmr0h"); + t0con.put(0xff); /**FIXME - need a way to set this to 0xff at reset*/ + + add_sfr_register(status, 0xfd8); + status->set_rcon(&rcon); + + add_sfr_register(&ind2.fsrl, 0xfd9,porv,"fsr2l"); + add_sfr_register(&ind2.fsrh, 0xfda,porv,"fsr2h"); + add_sfr_register(&ind2.plusw, 0xfdb,porv,"plusw2"); + add_sfr_register(&ind2.preinc, 0xfdc,porv,"preinc2"); + add_sfr_register(&ind2.postdec, 0xfdd,porv,"postdec2"); + add_sfr_register(&ind2.postinc, 0xfde,porv,"postinc2"); + add_sfr_register(&ind2.indf, 0xfdf,porv,"indf2"); + + add_sfr_register(&bsr, 0xfe0,porv, "bsr"); + + add_sfr_register(&ind1.fsrl, 0xfe1,porv,"fsr1l"); + add_sfr_register(&ind1.fsrh, 0xfe2,porv,"fsr1h"); + add_sfr_register(&ind1.plusw, 0xfe3,porv,"plusw1"); + add_sfr_register(&ind1.preinc, 0xfe4,porv,"preinc1"); + add_sfr_register(&ind1.postdec, 0xfe5,porv,"postdec1"); + add_sfr_register(&ind1.postinc, 0xfe6,porv,"postinc1"); + add_sfr_register(&ind1.indf, 0xfe7,porv,"indf1"); + + add_sfr_register(Wreg, 0xfe8); + + add_sfr_register(&ind0.fsrl, 0xfe9,porv,"fsr0l"); + add_sfr_register(&ind0.fsrh, 0xfea,porv,"fsr0h"); + add_sfr_register(&ind0.plusw, 0xfeb,porv,"plusw0"); + add_sfr_register(&ind0.preinc, 0xfec,porv,"preinc0"); + add_sfr_register(&ind0.postdec, 0xfed,porv,"postdec0"); + add_sfr_register(&ind0.postinc, 0xfee,porv,"postinc0"); + add_sfr_register(&ind0.indf, 0xfef,porv,"indf0"); + + add_sfr_register(&intcon3, 0xff0, porv,"intcon3"); + porv2.data = 0xF5; + add_sfr_register(&intcon2, 0xff1, porv2,"intcon2"); + add_sfr_register(&intcon, 0xff2, porv,"intcon"); + + add_sfr_register(&prodl, 0xff3, porv,"prodl"); + add_sfr_register(&prodh, 0xff4, porv,"prodh"); + + add_sfr_register(&tbl.tablat, 0xff5, porv,"tablat"); + add_sfr_register(&tbl.tblptrl, 0xff6, porv,"tblptrl"); + add_sfr_register(&tbl.tblptrh, 0xff7, porv,"tblptrh"); + add_sfr_register(&tbl.tblptru, 0xff8, porv,"tblptru"); + + if(pcl) + delete pcl; + pcl = new PCL16(this,"pcl", "Program Counter Low byte"); + + add_sfr_register(pcl, 0xff9); + add_sfr_register(pclath, 0xffa); + add_sfr_register(&pclatu, 0xffb, porv, "pclatu"); + pclath->mValidBits = 0xFF; // Data sheet implies does not depend on memory size + + Stack16 *stack16 = static_cast(stack); + add_sfr_register(&stack16->stkptr, 0xffc,porv,"stkptr"); + add_sfr_register(&stack16->tosl, 0xffd,porv,"tosl"); + add_sfr_register(&stack16->tosh, 0xffe,porv,"tosh"); + add_sfr_register(&stack16->tosu, 0xfff,porv,"tosu"); + stack16->stack_mask = 31; + + + EEPROM *e = get_eeprom(); + + if (e) { + add_sfr_register(e->get_reg_eedata(), 0xfa8); + add_sfr_register(e->get_reg_eeadr(), 0xfa9); + if ( e->get_reg_eeadrh() ) + add_sfr_register(e->get_reg_eeadrh(), 0xfaa); + add_sfr_register(e->get_reg_eecon1(), 0xfa6, RegisterValue(0,0)); + add_sfr_register(e->get_reg_eecon2(), 0xfa7); + } + + // Initialize all of the register cross linkages + pir_set_def.set_pir1(&pir1); + + tmr2.ssp_module[0] = &ssp; + + tmr1l.tmrh = &tmr1h; + tmr1l.t1con = t1con; + tmr1l.setInterruptSource(new InterruptSource(&pir1, PIR1v1::TMR1IF)); +// tmr1l.ccpcon = &ccp1con; + + tmr1h.tmrl = &tmr1l; + + t1con->tmrl = &tmr1l; + + t2con.tmr2 = &tmr2; + tmr2.pir_set = &pir_set_def; //get_pir_set(); + tmr2.pr2 = &pr2; + tmr2.t2con = &t2con; + tmr2.add_ccp ( &ccp1con ); + tmr2.add_ccp ( &ccp2con ); + pr2.tmr2 = &tmr2; + + + tmr3l.tmrh = &tmr3h; + tmr3l.t1con = t3con; +// tmr3l.ccpcon = &ccp1con; + + tmr3h.tmrl = &tmr3l; + + t3con->tmrl = &tmr3l; + if (T3HasCCP()) + { + t3con->tmr1l = &tmr1l; + t3con->ccpr1l = &ccpr1l; + t3con->ccpr2l = &ccpr2l; + t3con->t1con = t1con; + } + + ccp1con.setCrosslinks(&ccpr1l, &pir1, PIR1v2::CCP1IF, &tmr2); + ccp1con.setIOpin(&((*m_portc)[2])); + ccpr1l.ccprh = &ccpr1h; + ccpr1l.tmrl = &tmr1l; + ccpr1h.ccprl = &ccpr1l; + + pir1.set_intcon(&intcon); + pir1.set_pie(&pie1); + pir1.set_ipr(&ipr1); + pie1.setPir(&pir1); + + // All of the status bits on the 16bit core are writable + status->write_mask = 0xff; + + // AN5,AN6 and AN7 exist only on devices with a PORTE. +} + +void _16bit_processor::init_pir2(PIR *pir2, uint bitMask) +{ + RegisterValue porv(0,0); + + tmr3l.setInterruptSource(new InterruptSource(pir2, bitMask)); + pir_set_def.set_pir2(pir2); + pir2->set_intcon(&intcon); + pir2->set_pie(&pie2); + pir2->set_ipr(&ipr2); + pie2.setPir(pir2); + add_sfr_register(pir2, 0xfa1,porv,"pir2"); +} + +//------------------------------------------------------------------- +// +// create +// +// The purpose of this member function is to 'create' those things +// that are unique to the 16-bit core processors. + +void _16bit_processor :: create () +{ + fast_stack.init(this); + /* + ind0.init(this); + ind1.init(this); + ind2.init(this); + */ + pic_processor::create(); + osccon = getOSCCON(); + create_sfr_map(); + + tmr0l.initialize(); + + intcon.set_rcon(&rcon); + intcon.set_intcon2(&intcon2); + intcon.set_pir_set(&pir_set_def); + + //tbl.initialize(this); + tmr0l.start(0); + + if(pma) { + + pma->SpecialRegisters.push_back(&bsr); + rma.SpecialRegisters.push_back(&bsr); + } +} + +//------------------------------------------------------------------- +// void _16bit_processor::interrupt () +// +// When the virtual function cpu->interrupt() is called during +// pic_processor::run() AND the cpu gpsim is simulating is an 18cxxx +// device then we end up here. For an interrupt to have occured, +// the interrupt processing logic must have just ran. One of the +// responsibilities of that logic is to determine at what address +// the interrupt should begin executing. That address is placed +// in 'interrupt_vector'. +// +//------------------------------------------------------------------- +void _16bit_processor::interrupt () +{ + bp.clear_interrupt(); + + stack->push(pc->value); + + // Save W,status, and BSR if this is a high priority interrupt. + fast_stack.push(); + + intcon.in_interrupt = true; // Mask interrupts + pc->interrupt(intcon.get_interrupt_vector()); +} + +//------------------------------------------------------------------- +void _16bit_processor::option_new_bits_6_7(uint bits) +{ + //portb.rbpu_intedg_update(bits); + //cout << "16bit, option bits 6 and/or 7 changed\n"; +} + +//------------------------------------------------------------------- +void _16bit_processor::enter_sleep() +{ + tmr0l.sleep(); + pic_processor::enter_sleep(); +} + +//------------------------------------------------------------------- +void _16bit_processor::exit_sleep() +{ + if (m_ActivityState == ePASleeping) + { + tmr0l.wake(); + pic_processor::exit_sleep(); + } +} + +//------------------------------------------------------------------ +// It is assummed that this will only be set to true for processors +// that support extended instructions +// +void _16bit_processor::set_extended_instruction(bool v) +{ + extended_instruction_flag = v; +} + +//------------------------------------------------------------------- +// Fetch the rom contents at a particular address. +uint _16bit_processor::get_program_memory_at_address(uint address) +{ + uint uIndex = map_pm_address2index(address); + + if (uIndex < program_memory_size()) + return program_memory[uIndex] ? program_memory[uIndex]->get_opcode() : 0xffffffff; + + if (address >= CONFIG1L && address <= 0x30000D) + return get_config_word(address); + + uIndex = (address - 0x200000) >> 1; // Look to see if it's an ID location + + if( uIndex < IdentMemorySize() ) return idloc[uIndex]; + +// static const uint DEVID1 = 0x3ffffe; + // static const uint DEVID2 = 0x3fffff; +#define DEVID1 0x3ffffe + if ((address & DEVID1) == DEVID1) + { + return get_device_id(); + } + + return 0xffffffff; +} + +uint _16bit_processor::get_config_word(uint address) +{ + if (!(address >= CONFIG1L && address <= 0x30000D)) + return 0xffffffff; + + address -= CONFIG1L; + + if (m_configMemory) { + address &= 0xfffe; // Clear LSB + uint ret = 0xffff; + + if (m_configMemory->getConfigWord(address)) + ret = (ret & 0xff00) | (((uint )(m_configMemory->getConfigWord(address)->getVal())) & 0x00ff); + + address++; + + if (m_configMemory->getConfigWord(address)) + ret = (ret & 0x00ff) | ((((uint )(m_configMemory->getConfigWord(address)->getVal()))<<8) & 0xff00); + + return ret; + } + return 0xffffffff; +} + +bool _16bit_processor::set_config_word(uint address, uint cfg_word) +{ + if (address >= CONFIG1L && address <= 0x30000D) + { + address -= CONFIG1L; + + if (m_configMemory) + { + address &= 0xfffe; + + if (m_configMemory->getConfigWord(address)) + m_configMemory->getConfigWord(address)->set((int)(cfg_word&0xff)); + + address++; + + if (m_configMemory->getConfigWord(address)) + m_configMemory->getConfigWord(address)->set((int)((cfg_word>>8)&0xff)); + + return true; + } + else cout << "Setting config word no m_configMemory\n"; + } + return false; +} + +void _16bit_processor::create_config_memory() +{ + m_configMemory = new ConfigMemory(this,configMemorySize()); + m_configMemory->addConfigWord(CONFIG1H-CONFIG1L,new Config1H(this, CONFIG1H)); + m_configMemory->addConfigWord(CONFIG2H-CONFIG1L,new Config2H(this, CONFIG2H)); + m_configMemory->addConfigWord(CONFIG4L-CONFIG1L,new Config4L(this, CONFIG4L)); +} + +void _16bit_processor::set_out_of_range_pm(uint address, uint value) +{ + // This method is only called by Processor::init_program_memory which writes words + if ( get_eeprom() + && (address>= 0xf00000) + && (address < 0xf00000 + get_eeprom()->get_rom_size())) + { + get_eeprom()->change_rom(1 + address - 0xf00000, value >> 8); + get_eeprom()->change_rom(address - 0xf00000, value & 0xff); + } + else if( (address>= 0x200000) && (address < 0x200008) ) { + idloc[(address - 0x200000) >> 1] = value; + } +} + +void _16bit_processor::osc_mode(uint value) +{ + IOPIN *m_pin; + uint pin_Number = get_osc_pin_Number(0); + + if (pin_Number < 253) + { + m_pin = package->get_pin(pin_Number); + } + if ( (pin_Number = get_osc_pin_Number(1)) < 253 && + (m_pin = package->get_pin(pin_Number))) + { + pll_factor = 0; + if (value < 5) + { + set_clk_pin(pin_Number, m_osc_Monitor[1], "OSC2", true, + m_porta, m_trisa, m_lata); + } + else if(value == 6 ) + { + pll_factor = 2; + set_clk_pin(pin_Number, m_osc_Monitor[1], "CLKO", false, + m_porta, m_trisa, m_lata); + } + else + { + clr_clk_pin(pin_Number, m_osc_Monitor[1], + m_porta, m_trisa, m_lata); + } + } +} + +void _16bit_processor::create_iopin_map() +{ + cout << "_16bit_processor::create_iopin_map WARNING --- not creating package \n"; +} + +void _16bit_compat_adc::create() +{ + adcon0 = new ADCON0(this, "adcon0", "A2D control register"), + adcon1 = new ADCON1(this, "adcon1", "A2D control register"), + + _16bit_processor::create(); + + a2d_compat(); +} + +void _16bit_compat_adc::create_sfr_map() +{ + _16bit_processor::create_sfr_map(); +} + +void _16bit_compat_adc :: a2d_compat() +{ + RegisterValue porv(0,0); + + add_sfr_register(adcon1, 0xfc1,porv,"adcon1"); + add_sfr_register(adcon0, 0xfc2,porv,"adcon0"); + + adcon0->setAdresLow(&adresl); + adcon0->setAdres(&adresh); + adcon0->setAdcon1(adcon1); + adcon0->setIntcon(&intcon); + adcon0->setPir(&pir1); + adcon0->setChannel_Mask(7); // Greater than 4 channels + adcon0->setA2DBits(10); + + adcon1->setValidCfgBits(ADCON1::PCFG0 | ADCON1::PCFG1 | + ADCON1::PCFG2 | ADCON1::PCFG3,0); + + adcon1->setChannelConfiguration(0, 0xff); + adcon1->setChannelConfiguration(1, 0xff); + adcon1->setChannelConfiguration(2, 0x1f); + adcon1->setChannelConfiguration(3, 0x1f); + adcon1->setChannelConfiguration(4, 0x0b); + adcon1->setChannelConfiguration(5, 0x0b); + adcon1->setChannelConfiguration(6, 0x00); + adcon1->setChannelConfiguration(7, 0x00); + adcon1->setChannelConfiguration(8, 0xff); + adcon1->setChannelConfiguration(9, 0x3f); + adcon1->setChannelConfiguration(10, 0x3f); + adcon1->setChannelConfiguration(11, 0x3f); + adcon1->setChannelConfiguration(12, 0x1f); + adcon1->setChannelConfiguration(13, 0x0f); + adcon1->setChannelConfiguration(14, 0x01); + adcon1->setChannelConfiguration(15, 0x0d); + + adcon1->setVrefHiConfiguration(1, 3); + adcon1->setVrefHiConfiguration(3, 3); + adcon1->setVrefHiConfiguration(5, 3); + adcon1->setVrefHiConfiguration(8, 3); + adcon1->setVrefHiConfiguration(10, 3); + adcon1->setVrefHiConfiguration(11, 3); + adcon1->setVrefHiConfiguration(12, 3); + adcon1->setVrefHiConfiguration(13, 3); + adcon1->setVrefHiConfiguration(15, 3); + + adcon1->setVrefLoConfiguration(8, 2); + adcon1->setVrefLoConfiguration(11, 2); + adcon1->setVrefLoConfiguration(12, 2); + adcon1->setVrefLoConfiguration(13, 2); + adcon1->setVrefLoConfiguration(15, 2); + + adcon1->setNumberOfChannels(5); + adcon1->setIOPin(0, &(*m_porta)[0]); + adcon1->setIOPin(1, &(*m_porta)[1]); + adcon1->setIOPin(2, &(*m_porta)[2]); + adcon1->setIOPin(3, &(*m_porta)[3]); + adcon1->setIOPin(4, &(*m_porta)[5]); + +} +_16bit_compat_adc::_16bit_compat_adc(const char *_name, const char *desc) + : _16bit_processor(_name, desc), adcon0(0), adcon1(0) +{ +} +_16bit_compat_adc::~_16bit_compat_adc() +{ + if(adcon0) delete_sfr_register(adcon0); + if(adcon1) delete_sfr_register(adcon1); +} +void _16bit_v2_adc::create(int nChannels) +{ + adcon0 = new ADCON0_V2(this, "adcon0", "A2D control register"); + adcon1 = new ADCON1_V2(this, "adcon1", "A2D control register"); + adcon2 = new ADCON2_V2(this, "adcon2", "A2D control register"); + + RegisterValue porv(0,0); + + add_sfr_register(adcon2, 0xfc0,porv,"adcon2"); + add_sfr_register(adcon1, 0xfc1,porv,"adcon1"); + add_sfr_register(adcon0, 0xfc2,porv,"adcon0"); + + adcon0->setAdresLow(&adresl); + adcon0->setAdres(&adresh); + adcon0->setAdcon1(adcon1); + adcon0->setAdcon2(adcon2); + adcon0->setIntcon(&intcon); + adcon0->setPir(&pir1); + adcon0->setChannel_Mask(0xf); // upto 16 channels + adcon0->setA2DBits(10); + + adcon1->setValidCfgBits(ADCON1::PCFG0 | ADCON1::PCFG1 | + ADCON1::PCFG2 | ADCON1::PCFG3,0); + + adcon1->setNumberOfChannels(nChannels); + adcon1->setChanTable(0x1fff, 0x1fff, 0x1fff, 0x0fff, + 0x07ff, 0x03ff, 0x01ff, 0x00ff, 0x007f, 0x003f, + 0x001f, 0x000f, 0x0007, 0x0003, 0x0001, 0x0000); + adcon1->setVrefHiChannel(3); + adcon1->setVrefLoChannel(2); + + adcon1->setIOPin(0, &(*m_porta)[0]); + adcon1->setIOPin(1, &(*m_porta)[1]); + adcon1->setIOPin(2, &(*m_porta)[2]); + adcon1->setIOPin(3, &(*m_porta)[3]); +} + +_16bit_v2_adc::_16bit_v2_adc(const char *_name, const char *desc) + : _16bit_processor(_name, desc), adcon0(0), adcon1(0), adcon2(0) +{ +} +_16bit_v2_adc::~_16bit_v2_adc() +{ + if(adcon0) delete_sfr_register(adcon0); + if(adcon1) delete_sfr_register(adcon1); + if(adcon2) delete_sfr_register(adcon2); +} diff --git a/src/gpsim/16bit-processors.h b/src/gpsim/16bit-processors.h new file mode 100644 index 0000000..df2eebf --- /dev/null +++ b/src/gpsim/16bit-processors.h @@ -0,0 +1,333 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + + +#ifndef __16_BIT_PROCESSORS_H__ +#define __16_BIT_PROCESSORS_H__ + +#include "pic-processor.h" +#include "pic-ioports.h" +#include "intcon.h" +#include "16bit-registers.h" +#include "16bit-tmrs.h" +#include "pir.h" +#include "uart.h" +#include "a2dconverter.h" +#include "a2d_v2.h" +//#include "value.h" + +// forward references + +extern instruction *disasm16 (pic_processor *cpu, uint address, uint inst); + +class ConfigMemory; + + +//------------------------------------------------------------------------ +// +// pic_processor +// | +// \__ _16bit_processor +// +// Base class for the 16bit PIC processors +// +class _16bit_processor : public pic_processor +{ + +public: + + static const uint CONFIG1L = 0x300000; + static const uint CONFIG1H = 0x300001; + static const uint CONFIG2L = 0x300002; + static const uint CONFIG2H = 0x300003; + static const uint CONFIG3L = 0x300004; + static const uint CONFIG3H = 0x300005; + static const uint CONFIG4L = 0x300006; + static const uint CONFIG4H = 0x300007; + static const uint CONFIG5L = 0x300008; + static const uint CONFIG5H = 0x300009; + static const uint CONFIG6L = 0x30000A; + static const uint CONFIG6H = 0x30000B; + static const uint CONFIG7L = 0x30000C; + static const uint CONFIG7H = 0x30000D; + + // The early 18xxx parts all contain ports A,B,C + PicPortRegister *m_porta; + PicTrisRegister *m_trisa; + PicLatchRegister *m_lata; + + PicPortBRegister *m_portb; + PicTrisRegister *m_trisb; + PicLatchRegister *m_latb; + + PicPortRegister *m_portc; + PicTrisRegister *m_trisc; + PicLatchRegister *m_latc; + + + sfr_register adresl; + sfr_register adresh; + INTCON_16 intcon; + INTCON2 intcon2; + INTCON3 intcon3; + BSR bsr; + TMR0_16 tmr0l; + TMR0H tmr0h; + T0CON t0con; + RCON rcon; + PIR1v2 pir1; + sfr_register ipr1; + sfr_register ipr2; + T1CON *t1con; + PIE pie1; + PIR2v2 *pir2; + PIE pie2; + T2CON t2con; + PR2 pr2; + TMR2 tmr2; + TMRL tmr1l; + TMRH tmr1h; + CCPCON ccp1con; + CCPRL ccpr1l; + CCPRH ccpr1h; + CCPCON ccp2con; + CCPRL ccpr2l; + CCPRH ccpr2h; + TMRL tmr3l; + TMRH tmr3h; + T3CON *t3con; + PIR_SET_2 pir_set_def; + + OSCCON *osccon; + LVDCON lvdcon; + WDTCON wdtcon; + + sfr_register prodh,prodl; + + sfr_register pclatu; + + Fast_Stack fast_stack; + Indirect_Addressing ind0; + Indirect_Addressing ind1; + Indirect_Addressing ind2; + USART_MODULE usart; + + TBL_MODULE tbl; + TMR2_MODULE tmr2_module; + TMR3_MODULE tmr3_module; + SSP_MODULE ssp; + + // Some configuration stuff for stripping down where needed + virtual bool HasPortC(void) { return true; }; + virtual bool HasCCP2(void) { return true; }; + virtual bool MovedReg() { return false;} + virtual bool T3HasCCP() { return true;} + + virtual OSCCON * getOSCCON(void) { return new OSCCON(this, "osccon", "OSC Control"); } + + void interrupt(); + virtual void create();// {return;}; + virtual PROCESSOR_TYPE isa(){return _PIC17_PROCESSOR_;}; + virtual PROCESSOR_TYPE base_isa(){return _PIC17_PROCESSOR_;}; + virtual uint access_gprs() { return 0x80; }; + virtual instruction * disasm (uint address, uint inst) + { + return disasm16(this, address, inst); + } + virtual void create_sfr_map(); + virtual void delete_sfr_map(); + virtual void create_config_memory(); + + // Return the portion of pclath that is used during branching instructions + virtual uint get_pclath_branching_jump() + { + return ((pclatu.value.get()<<16) | ((pclath->value.get() & 0xf8)<<8)); + } + + // Return the portion of pclath that is used during modify PCL instructions + virtual uint get_pclath_branching_modpcl() + { + return ((pclatu.value.get()<<16) | ((pclath->value.get() & 0xff)<<8)); + } + + virtual void option_new_bits_6_7(uint); + + // Declare a set of functions that will allow the base class to + // get information about the derived classes. NOTE, the values returned here + // will cause errors if they are used (in some cases) + // -- the derived classes must define their parameters appropriately. + + virtual uint register_memory_size () const { return 0x1000;}; + virtual uint last_actual_register () const { return 0x0F7F;}; + virtual void set_out_of_range_pm(uint address, uint value); + + virtual void create_iopin_map(); + + virtual int map_pm_address2index(int address) const {return address/2;}; + virtual int map_pm_index2address(int index) const {return index*2;}; + virtual uint get_program_memory_at_address(uint address); + virtual uint get_config_word(uint address); + virtual uint get_device_id() { return 0;} + virtual bool set_config_word(uint address, uint cfg_word); + virtual uint configMemorySize() { return CONFIG7H-CONFIG1L+1; } + virtual uint IdentMemorySize() const { return 4; } // four words default (18F) + virtual void enter_sleep(); + virtual void exit_sleep(); + virtual void osc_mode(uint ); + virtual void set_extended_instruction(bool); + virtual bool extended_instruction() {return extended_instruction_flag;} + + static pic_processor *construct(); + _16bit_processor(const char *_name=0, const char *desc=0); + virtual ~_16bit_processor(); + + uint getCurrentDisasmAddress() { return m_current_disasm_address;} + uint getCurrentDisasmIndex() { return m_current_disasm_address/2;} + void setCurrentDisasmAddress(uint a) { m_current_disasm_address =a; } + virtual void init_pir2(PIR *pir2, uint bitMask); + +protected: + uint m_current_disasm_address; // Used only when .hex/.cod files are loaded + + uint idloc[4]; ///< ID locations - not all 16-bit CPUs have 8 bytes + bool extended_instruction_flag; // Instruction set extension and Indexed Addressing + + uint last_register; +}; + +class _16bit_compat_adc : public _16bit_processor +{ + public: + + ADCON0 *adcon0; + ADCON1 *adcon1; + + _16bit_compat_adc(const char *_name=0, const char *desc=0); + ~_16bit_compat_adc(); + + virtual void create(); + virtual void create_sfr_map(); + virtual void a2d_compat(); +}; + +class _16bit_v2_adc : public _16bit_processor +{ + public: + + ADCON0_V2 *adcon0; + ADCON1_V2 *adcon1; + ADCON2_V2 *adcon2; + + _16bit_v2_adc(const char *_name=0, const char *desc=0); + ~_16bit_v2_adc(); + virtual void create(int nChannels); +}; + +#define cpu16 ( (_16bit_processor *)cpu) + +#define FOSC0 (1<<0) +#define FOSC1 (1<<1) +#define FOSC2 (1<<2) +// FOSC3 may not be used +#define FOSC3 (1<<3) +#define PLLCFG (1<<4) +#define OSCEN (1<<5) +//RRR#define IESO (1<<7) + +//------------------------------------------------------------------------ +// Config1H - default 3 bits FOSC + +class Config1H : public ConfigWord +{ + #define CONFIG1H_default (OSCEN | FOSC2 | FOSC1 | FOSC0) + public: + Config1H(_16bit_processor *pCpu, uint addr) + : ConfigWord("CONFIG1H", CONFIG1H_default, "Oscillator configuration", pCpu, addr) + { + set(CONFIG1H_default); + } + + virtual void set(int64_t v) + { + Integer::set(v); + + if (m_pCpu) + { + //RRRm_pCpu->osc_mode(v & ( FOSC2 | FOSC1 | FOSC0)); + m_pCpu->osc_mode(v); + } + } + + virtual string toString(); +}; + +//------------------------------------------------------------------------ +// Config1H - 4 bits FOSC + +class Config1H_4bits : public ConfigWord +{ + public: + Config1H_4bits(_16bit_processor *pCpu, uint addr, uint def_val) + : ConfigWord("CONFIG1H", def_val, "Oscillator configuration", pCpu, addr) + { + set(def_val); + } + + virtual void set(int64_t v) + { + Integer::set(v); + + if (m_pCpu) + { + //m_pCpu->osc_mode(v & ( FOSC3 | FOSC2 | FOSC1 | FOSC0)); + m_pCpu->osc_mode(v); + } + } + + virtual string toString(); +}; + +class Config3H : public ConfigWord +{ + public: + Config3H(_16bit_processor *pCpu, uint addr, uint def_val) + : ConfigWord("CONFIG3H", def_val, "Configuration Register 3 High", pCpu, addr) + { + set(def_val); + } + + virtual void set(int64_t v) + { + Integer::set(v); + if (m_pCpu) m_pCpu->set_config3h(v); + } + + virtual string toString() + { + int64_t i64; + get(i64); + + if (m_pCpu) return(m_pCpu->string_config3h(i64)); + else return string ("m_PCpu not defined"); + } +}; + +#endif diff --git a/src/gpsim/breakpoints.cc b/src/gpsim/breakpoints.cc new file mode 100644 index 0000000..740bc2d --- /dev/null +++ b/src/gpsim/breakpoints.cc @@ -0,0 +1,343 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include +#include + +#include "config.h" +#include "pic-processor.h" +#include "breakpoints.h" +#include "14bit-processors.h" + +/*extern "C"{ +#include "lxt_write.h" +}*/ + +#define PCPU ((Processor *)cpu) + +// Global declaration of THE breakpoint object +Breakpoints &(*dummy_bp)() = get_bp; +Breakpoints bp; + +//------------------------------------------------------------------------ +// find_free - search the array that holds the break points for a free slot +// +int Breakpoints::find_free() +{ + + for(int i=0; i m_iMaxAllocated) m_iMaxAllocated = i + 1; + return i; + } + } + cout << "*** out of breakpoints\n"; + return(MAX_BREAKPOINTS); +} + +//------------------------------------------------------------------------ +// set_breakpoint - Set a breakpoint of a specific type. +// +int Breakpoints::set_breakpoint(BREAKPOINT_TYPES break_type, + Processor *cpu, + uint arg1, + unsigned arg2, + TriggerObject *f1) +{ + breakpoint_number = find_free(); + + if(breakpoint_number >= MAX_BREAKPOINTS) return breakpoint_number; + + BreakStatus &bs = break_status[breakpoint_number]; + bs.type = break_type; + bs.cpu = cpu; + bs.arg1 = arg1; + bs.arg2 = arg2; + bs.bpo = f1; + switch (break_type) + { + + case BREAK_ON_INVALID_FR: + return(breakpoint_number); + break; + + case BREAK_ON_CYCLE: + { + uint64_t cyc = arg2; + cyc = (cyc<<32) | arg1; + + // The cycle counter does its own break points. + if(get_cycles().set_break(cyc, f1, breakpoint_number)) + { + return(breakpoint_number); + } + else bs.type = BREAK_CLEAR; + } + break; + + case BREAK_ON_STK_OVERFLOW: + if ((cpu->GetCapabilities() & Processor::eBREAKONSTACKOVER) + == Processor::eBREAKONSTACKOVER) { + // pic_processor should not be referenced here + // Should have a GetStack() virtual function in Processor class. + // Of course then the Stack class needs to be a virtual class. + if(((pic_processor *)(cpu))->stack->set_break_on_overflow(1)) + return (breakpoint_number); + } + else { + // Need to add console object + printf("Stack breaks not available on a %s processor\n", cpu->name().c_str()); + } + bs.type = BREAK_CLEAR; + break; + + case BREAK_ON_STK_UNDERFLOW: + if ((cpu->GetCapabilities() & Processor::eBREAKONSTACKUNDER) + == Processor::eBREAKONSTACKUNDER) { + // pic_processor should not be referenced here + // Should have a GetStack() virtual function in Processor class. + // Of course then the Stack class needs to be a virtual class. + if(((pic_processor *)(cpu))->stack->set_break_on_underflow(1)) + return (breakpoint_number); + } + else { + // Need to add console object + printf("Stack breaks not available on a %s processor\n", cpu->name().c_str()); + } + bs.type = BREAK_CLEAR; + break; + + case BREAK_ON_WDT_TIMEOUT: + if ((cpu->GetCapabilities() & Processor::eBREAKONWATCHDOGTIMER) + == Processor::eBREAKONWATCHDOGTIMER) { + // pic_processor should not be referenced here + // Should have a GetStack() virtual function in Processor class. + // Of course then the Stack class needs to be a virtual class. + ((_14bit_processor *)cpu)->wdt.set_breakpoint(BREAK_ON_WDT_TIMEOUT | breakpoint_number); + return(breakpoint_number); + } + else { + // Need to add console object + printf("Watch dog timer breaks not available on a %s processor\n", cpu->name().c_str()); + } + default: // Not a valid type + bs.type = BREAK_CLEAR; + break; + } + return(MAX_BREAKPOINTS); +} + +int Breakpoints::set_cycle_break(Processor *cpu, uint64_t future_cycle, TriggerObject *f1) +{ + return(set_breakpoint (Breakpoints::BREAK_ON_CYCLE, cpu, + (uint)(future_cycle & 0xffffffff), + (uint)(future_cycle>>32), + f1)); +} + +int Breakpoints::set_stk_overflow_break(Processor *cpu) +{ + return(set_breakpoint (Breakpoints::BREAK_ON_STK_OVERFLOW, cpu, 0, 0)); +} + +int Breakpoints::set_stk_underflow_break(Processor *cpu) +{ + return(set_breakpoint (Breakpoints::BREAK_ON_STK_UNDERFLOW, cpu, 0, 0)); +} + +int Breakpoints::set_wdt_break(Processor *cpu) +{ + if ((cpu->GetCapabilities() & Processor::eBREAKONWATCHDOGTIMER) + == Processor::eBREAKONWATCHDOGTIMER) + { + // Set a wdt break only if one is not already set. + if(!cpu14->wdt.hasBreak()) + return(set_breakpoint (Breakpoints::BREAK_ON_WDT_TIMEOUT, cpu, 0, 0)); + } + else + { + // Need to add console object + printf("Watch dog timer breaks not available on a %s processor\n", cpu->name().c_str()); + } + return MAX_BREAKPOINTS; +} + +int Breakpoints::check_cycle_break(uint bpn) +{ + cout << "cycle break: 0x" << hex << get_cycles().get() + << dec << " = " << get_cycles().get() << endl; + + halt(); + if( bpn < MAX_BREAKPOINTS) + { + if (break_status[bpn].bpo) + break_status[bpn].bpo->callback(); + + clear(bpn); + } + return(1); +} + +bool Breakpoints::dump(TriggerObject *pTO) +{ + if (!pTO) return false; + + pTO->print(); + return true; +} +bool Breakpoints::dump1(uint bp_num, int dump_type) +{ + return true; +} + +void Breakpoints::dump(int dump_type) +{ + bool have_breakpoints = 0; + if(dump_type != BREAK_ON_CYCLE) + { + for(int i = 0; iclear(); + bs.type = BREAK_CLEAR; + delete bs.bpo; + bs.bpo = 0; + return; + } + switch (bs.type) + { + case BREAK_ON_CYCLE: + bs.type = BREAK_CLEAR; + //cout << "Cleared cycle breakpoint number " << b << '\n'; + break; + + case BREAK_ON_STK_OVERFLOW: + bs.type = BREAK_CLEAR; + if ((bs.cpu->GetCapabilities() & Processor::eSTACK) + == Processor::eSTACK) { + if(((pic_processor *)(bs.cpu))->stack->set_break_on_overflow(0)) + cout << "Cleared stack overflow break point.\n"; + else + cout << "Stack overflow break point is already cleared.\n"; + } + break; + + case BREAK_ON_STK_UNDERFLOW: + bs.type = BREAK_CLEAR; + if ((bs.cpu->GetCapabilities() & Processor::eSTACK) + == Processor::eSTACK) { + if(((pic_processor *)(bs.cpu))->stack->set_break_on_underflow(0)) + cout << "Cleared stack underflow break point.\n"; + else + cout << "Stack underflow break point is already cleared.\n"; + } + break; + + case BREAK_ON_WDT_TIMEOUT: + bs.type = BREAK_CLEAR; + if ((bs.cpu->GetCapabilities() & Processor::eBREAKONWATCHDOGTIMER) + == Processor::eBREAKONWATCHDOGTIMER) { + cout << "Cleared wdt timeout breakpoint number " << b << '\n'; + ((_14bit_processor *)bs.cpu)->wdt.set_breakpoint(0); + } + break; + + default: + bs.type = BREAK_CLEAR; + break; + } +} + +bool Breakpoints::bIsValid(uint b) +{ + return b < MAX_BREAKPOINTS; +} + +bool Breakpoints::bIsClear(uint b) +{ + return bIsValid(b) && break_status[b].type == BREAK_CLEAR; +} + +void Breakpoints::set_message(uint b,string &m) +{ + if (bIsValid(b) && break_status[b].type != BREAK_CLEAR && break_status[b].bpo) + break_status[b].bpo->new_message(m); +} + +// Clear all break points that are set for a specific processor +// This only be called when a processor is being removed and not when a user +// wants to clear the break points. Otherwise, internal break points like +// invalid register accesses will get cleared. + +void Breakpoints::clear_all(Processor *c) +{ + for(int i=0; i. +*/ + + +#ifndef __BREAKPOINTS_H__ +#define __BREAKPOINTS_H__ + +#include +#include + +#include "trigger.h" +#include "pic-instructions.h" +#include "registers.h" +#include "gpsim_object.h" // defines ObjectBreakTypes + +using namespace std; + +extern Integer *verbosity; // in ../src/init.cc +class InvalidRegister; + +class TriggerGroup : public TriggerAction +{ + public: + + protected: + list triggerList; + + virtual ~TriggerGroup(){} +}; + +#define MAX_BREAKPOINTS 0x400 +#define BREAKPOINT_MASK (MAX_BREAKPOINTS-1) + +class Breakpoints; + +#if defined(IN_MODULE) && defined(_WIN32) +// we are in a module: don't access the Breakpoints object directly! +LIBGPSIM_EXPORT Breakpoints & get_bp(); +#else +// we are in gpsim: use of get_bp() is recommended, +// even if the bp object can be accessed directly. +extern Breakpoints bp; + +inline Breakpoints &get_bp() +{ + return bp; +} +#endif + +class Breakpoints +{ + public: + enum BREAKPOINT_TYPES + { + BREAK_DUMP_ALL = 0, + BREAK_CLEAR = 0, + BREAK_ON_EXECUTION = 1<<24, + BREAK_ON_REG_READ = 2<<24, + BREAK_ON_REG_WRITE = 3<<24, + BREAK_ON_REG_READ_VALUE = 4<<24, + BREAK_ON_REG_WRITE_VALUE = 5<<24, + BREAK_ON_INVALID_FR = 6<<24, + BREAK_ON_CYCLE = 7<<24, + BREAK_ON_WDT_TIMEOUT = 8<<24, + BREAK_ON_STK_OVERFLOW = 9<<24, + BREAK_ON_STK_UNDERFLOW = 10<<24, + NOTIFY_ON_EXECUTION = 11<<24, + PROFILE_START_NOTIFY_ON_EXECUTION = 12<<24, + PROFILE_STOP_NOTIFY_ON_EXECUTION = 13<<24, + NOTIFY_ON_REG_READ = 14<<24, + NOTIFY_ON_REG_WRITE = 15<<24, + NOTIFY_ON_REG_READ_VALUE = 16<<24, + NOTIFY_ON_REG_WRITE_VALUE = 17<<24, + BREAK_ON_ASSERTION = 18<<24, + BREAK_MASK = 0xff<<24 + }; + + #define GLOBAL_CLEAR 0 + #define GLOBAL_STOP_RUNNING (1<<0) + #define GLOBAL_INTERRUPT (1<<1) + #define GLOBAL_SLEEP (1<<2) + #define GLOBAL_PM_WRITE (1<<3) + #define GLOBAL_SOCKET (1<<4) + #define GLOBAL_LOG (1<<5) + + struct BreakStatus + { + BREAKPOINT_TYPES type; + Processor *cpu; + uint arg1; + uint arg2; + TriggerObject *bpo; + } break_status[MAX_BREAKPOINTS]; + + int m_iMaxAllocated; + + class iterator + { + public: + explicit iterator(int index) : iIndex(index) { } + int iIndex; + iterator & operator++(int) + { + iIndex++; + return *this; + } + BreakStatus * operator*() { return &get_bp().break_status[iIndex]; } + bool operator!=(iterator &it) { return iIndex != it.iIndex; } + }; + + iterator begin() { return iterator(0); } + iterator end() { return iterator(m_iMaxAllocated); } + + BreakStatus *get(int index) + { + return (index>=0 && index. +*/ + + +#include "clock_phase.h" + +#include "processor.h" +#include "gpsim_time.h" + +//======================================================================== +ClockPhase::ClockPhase() + : m_pNextPhase(this) +{ +} + +ClockPhase::~ClockPhase() +{ +} +//======================================================================== +ProcessorPhase::ProcessorPhase(Processor *pcpu) + : ClockPhase(), + m_pcpu(pcpu) +{ +} +ProcessorPhase::~ProcessorPhase() +{ +} +//======================================================================== +phaseExecute1Cycle::phaseExecute1Cycle(Processor *pcpu) + : ProcessorPhase(pcpu) +{ +} +phaseExecute1Cycle::~phaseExecute1Cycle() +{ +} +/* + phaseExecute1Cycle::advance() - advances a processor's time one clock cycle. +*/ +ClockPhase *phaseExecute1Cycle::advance() +{ + setNextPhase( this ); + m_pcpu->step_one(false); + + if (bp.global_break & GLOBAL_LOG) bp.global_break &= ~GLOBAL_LOG; + + if (!bp.global_break) get_cycles().increment(); + + return m_pNextPhase; +} + +//======================================================================== + +phaseIdle::phaseIdle(Processor *pcpu) + : ProcessorPhase(pcpu) +{ +} +phaseIdle::~phaseIdle() +{ +} + +/* + phaseIdle::advance() - advances a processor's time one clock cycle, + but does not execute code. + */ + +ClockPhase *phaseIdle::advance() +{ + setNextPhase(this); + get_cycles().increment(); + return m_pNextPhase; +} +#if 0 +const char* phaseDesc(ClockPhase *pPhase) +{ + if (pPhase == mIdle) + return ("mIdle"); + if (pPhase == mExecute1Cycle) + return ("mExecute1Cycle"); + if (pPhase == mExecute2ndHalf) + return ("mExecute2ndHalf"); + if (pPhase == mCaptureInterrupt) + return ("mCaptureInterrupt"); + return "unknown phase"; +} +#endif + + +phaseCaptureInterrupt::phaseCaptureInterrupt(Processor *pcpu) + : ProcessorPhase(pcpu), m_pCurrentPhase(0),m_pNextNextPhase(0) +{ +} +phaseCaptureInterrupt::~phaseCaptureInterrupt() +{} +#define Rprintf(arg) {printf("0x%06X %s() ",cycles.get(),__FUNCTION__); printf arg; } +ClockPhase *phaseCaptureInterrupt::advance() +{ + //Rprintf (("phaseCaptureInterrupt\n")); + if (m_pNextPhase == m_pcpu->mExecute2ndHalf) + m_pNextPhase->advance(); + + if (m_pCurrentPhase == m_pcpu->mIdle) { // Interrupted sleep + + // complete sleeping phase + m_pNextPhase = m_pNextNextPhase->advance(); + + if (m_pNextPhase == m_pcpu->mIdle) + { + m_pNextPhase = m_pcpu->mExecute1Cycle; + do + { + m_pNextPhase = m_pcpu->mExecute1Cycle->advance(); + }while (m_pNextPhase != m_pcpu->mExecute1Cycle); + } + m_pcpu->mCurrentPhase = this; + + if (bp.global_break) m_pNextNextPhase = m_pNextPhase; + else m_pCurrentPhase = NULL; + + m_pcpu->exit_sleep(); + return this; + } + m_pcpu->interrupt(); + + return m_pNextPhase; +} + +void phaseCaptureInterrupt::firstHalf() +{ + m_pCurrentPhase = m_pcpu->mCurrentPhase; + + m_pNextPhase = this; + m_pNextNextPhase = m_pcpu->mCurrentPhase->getNextPhase(); + m_pcpu->mCurrentPhase->setNextPhase(this); + m_pcpu->mCurrentPhase = this; +} + + + diff --git a/src/gpsim/clock_phase.h b/src/gpsim/clock_phase.h new file mode 100644 index 0000000..e8e9e75 --- /dev/null +++ b/src/gpsim/clock_phase.h @@ -0,0 +1,116 @@ +/* + Copyright (C) 2006 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#if !defined(__CLOCK_PHASE_H__) +#define __CLOCK_PHASE_H__ + + + +/* + Clock Phase + + The Clock Phase base class takes an external clock source as its + input and uses this to control a module's simulation state. For + example, the clock input on a microcontroller drives all of the + digital state machines. On every edge of the clock, there is digital + logic that can potentially change states. The Clock Phase base class + can be thought of the "logic" that responds to the clock input and + redirects control to the state machines inside of a processor. +*/ + +class Processor; +//RRRclass pic_processor; +class ClockPhase +{ +public: + ClockPhase(); + virtual ~ClockPhase(); + virtual ClockPhase *advance()=0; + void setNextPhase(ClockPhase *pNextPhase) { m_pNextPhase = pNextPhase; } + ClockPhase *getNextPhase() { return m_pNextPhase; } +protected: + ClockPhase *m_pNextPhase; +}; + + +/* + The Processor Phase base class is a Clock Phase class that contains a + pointer to a Processor object. It's the base class from which all of + the processor's various Phase objects are derived. +*/ +class ProcessorPhase : public ClockPhase +{ +public: + explicit ProcessorPhase(Processor *pcpu); + virtual ~ProcessorPhase(); +protected: + Processor *m_pcpu; +}; + +/* + The Execute 1 Cycle class is a Processor Phase class designed to + execute a single instruction. + +*/ +class phaseExecute1Cycle : public ProcessorPhase +{ +public: + explicit phaseExecute1Cycle(Processor *pcpu); + virtual ~phaseExecute1Cycle(); + virtual ClockPhase *advance(); +}; + +class phaseExecute2ndHalf : public ProcessorPhase +{ +public: + explicit phaseExecute2ndHalf(Processor *pcpu); + virtual ~phaseExecute2ndHalf(); + virtual ClockPhase *advance(); + ClockPhase *firstHalf(unsigned int uiPC); +protected: + unsigned int m_uiPC; +}; + +class phaseCaptureInterrupt : public ProcessorPhase +{ +public: + explicit phaseCaptureInterrupt(Processor *pcpu); + ~phaseCaptureInterrupt(); + virtual ClockPhase *advance(); + void firstHalf(); +protected: + ClockPhase *m_pCurrentPhase; + ClockPhase *m_pNextNextPhase; +}; + +// phaseIdle - when a processor is idle, the current +// clock source can be handled by this class. + +class phaseIdle : public ProcessorPhase +{ +public: + explicit phaseIdle(Processor *pcpu); + virtual ~phaseIdle(); + virtual ClockPhase *advance(); +protected: +}; + + +#endif //if !defined(__CLOCK_PHASE_H__) diff --git a/src/gpsim/config.h b/src/gpsim/config.h new file mode 100644 index 0000000..da24daa --- /dev/null +++ b/src/gpsim/config.h @@ -0,0 +1,16 @@ + +#ifndef CONFIG_H +#define CONFIG_H + +#define PACKAGE_VERSION "0" + +#define PRINTF_INT64_MODIFIER "ll" + +#define FALSE false +#define TRUE true + +#define INVALID_VALUE 0xffffffff + +#define MAX_PROGRAM_MEMORY 0xffff + +#endif diff --git a/src/gpsim/devices/p12f6xx.cc b/src/gpsim/devices/p12f6xx.cc new file mode 100755 index 0000000..e254a34 --- /dev/null +++ b/src/gpsim/devices/p12f6xx.cc @@ -0,0 +1,1003 @@ +/* + Copyright (C) 2009 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +// +// p12f6xx +// +// This file supports: +// PIC12F629 +// PIC12F675 +// PIC12F683 +// +//Note: unlike most other 12F processors these have 14bit instructions + +#include +#include +#include + +#include "config.h" +#include "stimuli.h" +#include "eeprom.h" +#include "p12f6xx.h" +#include "pic-ioports.h" +#include "packages.h" + + +//#define DEBUG +#if defined(DEBUG) +#include "config.h" +#define Dprintf(arg) {printf("%s:%d ",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +//======================================================================== +// +// Configuration Memory for the 12F6XX devices. + +class Config12F6 : public ConfigWord +{ +public: + Config12F6(pic_processor *pCpu) + : ConfigWord("CONFIG12F6", 0x3fff, "Configuration Word", pCpu, 0x2007) + { + Dprintf(("Config12F6::Config12F6 %p\n", m_pCpu)); + if (m_pCpu) + { + m_pCpu->set_config_word(0x2007, 0x3fff); + } + } + +}; + +// Does not match any of 3 versions in pir.h, pir.cc +// If required by any other porcessors should be moved there +// +class PIR1v12f : public PIR +{ +public: + + enum { + TMR1IF = 1 << 0, + TMR2IF = 1 << 1, //For 12F683 + CMIF = 1 << 3, + CLC1IF = 1 << 3, // For 10F32x + NCO1IF = 1 << 4, // For 10F32x + ADIF = 1 << 6, + EEIF = 1 << 7 + }; + +//------------------------------------------------------------------------ + +PIR1v12f(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) +{ + valid_bits = TMR1IF | CMIF | ADIF | EEIF; + writable_bits = TMR1IF | CMIF | ADIF | EEIF; +} + + virtual void set_tmr1if() + { + put(get() | TMR1IF); + } + virtual void set_tmr2if() + { + put(get() | TMR2IF); + } + + virtual void set_cmif() + { + value.put(value.get() | CMIF); + if( value.get() & pie->value.get() ) + setPeripheralInterrupt(); + } + + virtual void set_clc1if() + { + value.put(value.get() | CLC1IF); + if( value.get() & pie->value.get() ) + setPeripheralInterrupt(); + } + + virtual void set_nco1if() + { + uint pievalue = value.get(); + if (!(pievalue & NCO1IF)) + { + value.put(pievalue | NCO1IF); + } + if( value.get() & pie->value.get() ) + setPeripheralInterrupt(); + } + + virtual void set_c1if() + { + set_cmif(); + } + + virtual void set_eeif() + { + value.put(value.get() | EEIF); + if( value.get() & pie->value.get() ) + setPeripheralInterrupt(); + } + + virtual void set_adif() + { + value.put(value.get() | ADIF); + if( value.get() & pie->value.get() ) + setPeripheralInterrupt(); + } +}; + +//======================================================================== + +void P12F629::create_config_memory() +{ + m_configMemory = new ConfigMemory(this,1); + m_configMemory->addConfigWord(0,new Config12F6(this)); + +}; + +class MCLRPinMonitor; + +bool P12F629::set_config_word(uint address,uint cfg_word) +{ + enum { + FOSC0 = 1<<0, + FOSC1 = 1<<1, + FOSC2 = 1<<2, + WDTEN = 1<<3, + PWRTEN = 1<<4, + MCLRE = 1<<5, + BOREN = 1<<6, + CP = 1<<7, + CPD = 1<<8, + + BG0 = 1<<12, + BG1 = 1<<13 + }; + + + if(address == config_word_address()) + { + if ((cfg_word & MCLRE) == MCLRE) + assignMCLRPin(4); // package pin 4 + else + unassignMCLRPin(); + + wdt.initialize((cfg_word & WDTEN) == WDTEN); + if ((cfg_word & (FOSC2 | FOSC1 )) == 0x04) // internal RC OSC + osccal.set_freq(4e6); + + + return(_14bit_processor::set_config_word(address, cfg_word)); + + } + return false; +} + +P12F629::P12F629(const char *_name, const char *desc) + : _14bit_processor(_name,desc), + intcon_reg(this,"intcon","Interrupt Control"), + comparator(this), + pie1(this,"PIE1", "Peripheral Interrupt Enable"), + t1con(this, "t1con", "TMR1 Control"), + tmr1l(this, "tmr1l", "TMR1 Low"), + tmr1h(this, "tmr1h", "TMR1 High"), + pcon(this, "pcon", "pcon"), + osccal(this, "osccal", "Oscillator Calibration Register", 0xfc) + +{ + m_ioc = new IOC(this, "ioc", "Interrupt-On-Change GPIO Register"); + m_gpio = new PicPortGRegister(this,"gpio","", &intcon_reg, m_ioc,8,0x3f); + m_trisio = new PicTrisRegister(this,"trisio","", m_gpio, false); + + m_wpu = new WPU(this, "wpu", "Weak Pull-up Register", m_gpio, 0x37); + + pir1 = new PIR1v12f(this,"pir1","Peripheral Interrupt Register",&intcon_reg, &pie1); + + + tmr0.set_cpu(this, m_gpio, 4, option_reg); + tmr0.start(0); + + if(config_modes) + config_modes->valid_bits = ConfigMode::CM_FOSC0 | ConfigMode::CM_FOSC1 | + ConfigMode::CM_FOSC1x | ConfigMode::CM_WDTE | ConfigMode::CM_PWRTE; + +} + +P12F629::~P12F629() +{ + + delete_file_registers(0x20, ram_top); + remove_sfr_register(&tmr0); + remove_sfr_register(&tmr1l); + remove_sfr_register(&tmr1h); + remove_sfr_register(&pcon); + remove_sfr_register(&t1con); + remove_sfr_register(&intcon_reg); + remove_sfr_register(&pie1); + remove_sfr_register(&comparator.cmcon); + remove_sfr_register(&comparator.vrcon); + remove_sfr_register(get_eeprom()->get_reg_eedata()); + remove_sfr_register(get_eeprom()->get_reg_eeadr()); + remove_sfr_register(get_eeprom()->get_reg_eecon1()); + remove_sfr_register(get_eeprom()->get_reg_eecon2()); + remove_sfr_register(&osccal); + + delete_sfr_register(m_gpio); + delete_sfr_register(m_trisio); + delete_sfr_register(m_wpu); + delete_sfr_register(m_ioc); + delete_sfr_register(pir1); + delete e; +} +Processor * P12F629::construct(const char *name) +{ + + P12F629 *p = new P12F629(name); + + p->create(0x5f, 128); + p->create_invalid_registers (); + + return p; + +} + +void P12F629::create_sfr_map() +{ + pir_set_def.set_pir1(pir1); + + add_sfr_register(indf, 0x00); + alias_file_registers(0x00,0x00,0x80); + + add_sfr_register(&tmr0, 0x01, RegisterValue(0xff,0)); + add_sfr_register(option_reg, 0x81, RegisterValue(0xff,0)); + + add_sfr_register(pcl, 0x02, RegisterValue(0,0)); + add_sfr_register(status, 0x03, RegisterValue(0x18,0)); + add_sfr_register(fsr, 0x04); + alias_file_registers(0x02,0x04,0x80); + + add_sfr_register(&tmr1l, 0x0e, RegisterValue(0,0),"tmr1l"); + add_sfr_register(&tmr1h, 0x0f, RegisterValue(0,0),"tmr1h"); + + add_sfr_register(&pcon, 0x8e, RegisterValue(0,0),"pcon"); + + add_sfr_register(&t1con, 0x10, RegisterValue(0,0)); + + add_sfr_register(m_gpio, 0x05); + add_sfr_register(m_trisio, 0x85, RegisterValue(0x3f,0)); + + + add_sfr_register(pclath, 0x0a, RegisterValue(0,0)); + + add_sfr_register(&intcon_reg, 0x0b, RegisterValue(0,0)); + alias_file_registers(0x0a,0x0b,0x80); + + intcon = &intcon_reg; + intcon_reg.set_pir_set(get_pir_set()); + + add_sfr_register(pir1, 0x0c, RegisterValue(0,0),"pir1"); + + tmr1l.tmrh = &tmr1h; + tmr1l.t1con = &t1con; + tmr1l.setInterruptSource(new InterruptSource(pir1, PIR1v1::TMR1IF)); + + tmr1h.tmrl = &tmr1l; + t1con.tmrl = &tmr1l; + + tmr1l.setIOpin(&(*m_gpio)[5]); + tmr1l.setGatepin(&(*m_gpio)[4]); + + add_sfr_register(&pie1, 0x8c, RegisterValue(0,0)); + if (pir1) { + pir1->set_intcon(&intcon_reg); + pir1->set_pie(&pie1); + } + pie1.setPir(pir1); + + // Link the comparator and voltage ref to porta + comparator.initialize(get_pir_set(), NULL, + &(*m_gpio)[0], &(*m_gpio)[1], + NULL, NULL, + &(*m_gpio)[2], NULL); + + comparator.cmcon.set_configuration(1, 0, AN0, AN1, AN0, AN1, ZERO); + comparator.cmcon.set_configuration(1, 1, AN0, AN1, AN0, AN1, OUT0); + comparator.cmcon.set_configuration(1, 2, AN0, AN1, AN0, AN1, NO_OUT); + comparator.cmcon.set_configuration(1, 3, AN1, VREF, AN1, VREF, OUT0); + comparator.cmcon.set_configuration(1, 4, AN1, VREF, AN1, VREF, NO_OUT); + comparator.cmcon.set_configuration(1, 5, AN1, VREF, AN0, VREF, OUT0); + comparator.cmcon.set_configuration(1, 6, AN1, VREF, AN0, VREF, NO_OUT); + comparator.cmcon.set_configuration(1, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 0, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 1, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 2, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 3, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 4, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 5, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 6, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + + add_sfr_register(&comparator.cmcon, 0x19, RegisterValue(0,0),"cmcon"); + add_sfr_register(&comparator.vrcon, 0x99, RegisterValue(0,0),"cvrcon"); + + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x9a); + add_sfr_register(get_eeprom()->get_reg_eeadr(), 0x9b); + add_sfr_register(get_eeprom()->get_reg_eecon1(), 0x9c, RegisterValue(0,0)); + add_sfr_register(get_eeprom()->get_reg_eecon2(), 0x9d); + add_sfr_register(m_wpu, 0x95, RegisterValue(0x37,0),"wpu"); + add_sfr_register(m_ioc, 0x96, RegisterValue(0,0),"ioc"); + add_sfr_register(&osccal, 0x90, RegisterValue(0x80,0)); + + +} + +//------------------------------------------------------------------- +void P12F629::set_out_of_range_pm(uint address, uint value) +{ + + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + get_eeprom()->change_rom(address - 0x2100, value); +} + +void P12F629::create_iopin_map() +{ + package = new Package(8); + if(!package) return; + + // Now Create the package and place the I/O pins + + package->assign_pin( 7, m_gpio->addPin(new IO_bi_directional_pu("gpio0"),0)); + package->assign_pin( 6, m_gpio->addPin(new IO_bi_directional_pu("gpio1"),1)); + package->assign_pin( 5, m_gpio->addPin(new IO_bi_directional_pu("gpio2"),2)); + package->assign_pin( 4, m_gpio->addPin(new IOPIN("gpio3"),3)); + package->assign_pin( 3, m_gpio->addPin(new IO_bi_directional_pu("gpio4"),4)); + package->assign_pin( 2, m_gpio->addPin(new IO_bi_directional_pu("gpio5"),5)); + + package->assign_pin( 1, 0); + package->assign_pin( 8, 0); +} + +void P12F629::create(int _ram_top, int eeprom_size) +{ + ram_top = _ram_top; + create_iopin_map(); + + _14bit_processor::create(); + + e = new EEPROM_PIR(this, pir1); + e->initialize(eeprom_size); + e->set_intcon(&intcon_reg); + set_eeprom(e); + + add_file_registers(0x20, ram_top, 0x80); + P12F629::create_sfr_map(); +} + +//------------------------------------------------------------------- +void P12F629::enter_sleep() +{ + tmr1l.sleep(); + _14bit_processor::enter_sleep(); +} + +//------------------------------------------------------------------- +void P12F629::exit_sleep() +{ + tmr1l.wake(); + _14bit_processor::exit_sleep(); +} + +//------------------------------------------------------------------- +void P12F629::option_new_bits_6_7(uint bits) +{ + Dprintf(("P12F629::option_new_bits_6_7 bits=%x\n", bits)); + m_gpio->setIntEdge ( (bits & OPTION_REG::BIT6) == OPTION_REG::BIT6); + m_wpu->set_wpu_pu ( (bits & OPTION_REG::BIT7) != OPTION_REG::BIT7); +} +//======================================================================== +// +// Pic 16F675 +// + +Processor * P12F675::construct(const char *name) +{ + P12F675 *p = new P12F675(name); + + p->create(0x5f, 128); + p->create_invalid_registers (); + + return p; +} + +P12F675::P12F675(const char *_name, const char *desc) + : P12F629(_name,desc), + ansel(this,"ansel", "Analog Select"), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adresh(this,"adresh", "A2D Result High"), + adresl(this,"adresl", "A2D Result Low") +{ +} + +P12F675::~P12F675() +{ + remove_sfr_register(&adresl); + remove_sfr_register(&adresh); + remove_sfr_register(&adcon0); + remove_sfr_register(&ansel); +} +void P12F675::create(int ram_top, int eeprom_size) +{ + P12F629::create(ram_top, eeprom_size); + create_sfr_map(); +} + + +void P12F675::create_sfr_map() +{ + // + // adcon1 is not a register on the 12f675, but it is used internally + // to perform the ADC conversions + // + add_sfr_register(&adresl, 0x9e, RegisterValue(0,0)); + add_sfr_register(&adresh, 0x1e, RegisterValue(0,0)); + + add_sfr_register(&adcon0, 0x1f, RegisterValue(0,0)); + add_sfr_register(&ansel, 0x9f, RegisterValue(0x0f,0)); + + + ansel.setAdcon1(&adcon1); + ansel.setAdcon0(&adcon0); + adcon0.setAdresLow(&adresl); + adcon0.setAdres(&adresh); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(&intcon_reg); + adcon0.setA2DBits(10); + adcon0.setPir(pir1); + adcon0.setChannel_Mask(3); + adcon0.setChannel_shift(2); + + adcon1.setNumberOfChannels(4); + + adcon1.setIOPin(0, &(*m_gpio)[0]); + adcon1.setIOPin(1, &(*m_gpio)[1]); + adcon1.setIOPin(2, &(*m_gpio)[2]); + adcon1.setIOPin(3, &(*m_gpio)[4]); + + adcon1.setVrefHiConfiguration(2, 1); + +/* Channel Configuration done dynamiclly based on ansel */ + + adcon1.setValidCfgBits(ADCON1::VCFG0 | ADCON1::VCFG1 , 4); + + +} +//======================================================================== +// +// Pic 16F683 +// + +Processor * P12F683::construct(const char *name) +{ + P12F683 *p = new P12F683(name); + + p->create(0x7f, 256); + p->create_invalid_registers (); + + return p; +} + +P12F683::P12F683(const char *_name, const char *desc) + : P12F675(_name,desc), + t2con(this, "t2con", "TMR2 Control"), + pr2(this, "pr2", "TMR2 Period Register"), + tmr2(this, "tmr2", "TMR2 Register"), + ccp1con(this, "ccp1con", "Capture Compare Control"), + ccpr1l(this, "ccpr1l", "Capture Compare 1 Low"), + ccpr1h(this, "ccpr1h", "Capture Compare 1 High"), + wdtcon(this, "wdtcon", "WDT Control", 0x1f), + osccon(0), + osctune(this, "osctune", "OSC Tune") + +{ + internal_osc = false; + pir1->valid_bits |= PIR1v12f::TMR2IF; + pir1->writable_bits |= PIR1v12f::TMR2IF; +} + +P12F683::~P12F683() +{ + delete_file_registers(0x20, 0x7f); + delete_file_registers(0xa0, 0xbf); + remove_sfr_register(&tmr2); + remove_sfr_register(&t2con); + remove_sfr_register(&pr2); + + remove_sfr_register(&ccpr1l); + remove_sfr_register(&ccpr1h); + remove_sfr_register(&ccp1con); + remove_sfr_register(&wdtcon); + remove_sfr_register(osccon); + remove_sfr_register(&osctune); + remove_sfr_register(&comparator.cmcon1); +} + +void P12F683::create(int _ram_top, int eeprom_size) +{ + + P12F629::create(0, eeprom_size); + osccon = new OSCCON(this, "osccon", "OSC Control"); + add_file_registers(0x20, 0x6f, 0); + add_file_registers(0xa0, 0xbf, 0); + add_file_registers(0x70, 0x7f, 0x80); + + create_sfr_map(); +} + + +void P12F683::create_sfr_map() +{ + P12F675::create_sfr_map(); + + add_sfr_register(&tmr2, 0x11, RegisterValue(0,0)); + add_sfr_register(&t2con, 0x12, RegisterValue(0,0)); + add_sfr_register(&pr2, 0x92, RegisterValue(0xff,0)); + + add_sfr_register(&ccpr1l, 0x13, RegisterValue(0,0)); + add_sfr_register(&ccpr1h, 0x14, RegisterValue(0,0)); + add_sfr_register(&ccp1con, 0x15, RegisterValue(0,0)); + add_sfr_register(&wdtcon, 0x18, RegisterValue(0x08,0),"wdtcon"); + add_sfr_register(osccon, 0x8f, RegisterValue(0,0),"osccon"); + remove_sfr_register(&osccal); + add_sfr_register(&osctune, 0x90, RegisterValue(0,0),"osctune"); + + osccon->set_osctune(&osctune); + osctune.set_osccon(osccon); + + + t2con.tmr2 = &tmr2; + tmr2.pir_set = get_pir_set(); + tmr2.pr2 = &pr2; + tmr2.t2con = &t2con; + tmr2.add_ccp ( &ccp1con ); + pr2.tmr2 = &tmr2; + + + ccp1con.setCrosslinks(&ccpr1l, pir1, PIR1v1::CCP1IF, &tmr2); + ccp1con.setIOpin(&((*m_gpio)[2])); + ccpr1l.ccprh = &ccpr1h; + ccpr1l.tmrl = &tmr1l; + ccpr1h.ccprl = &ccpr1l; + + comparator.cmcon.new_name("cmcon0"); + comparator.cmcon.set_tmrl(&tmr1l); + comparator.cmcon1.set_tmrl(&tmr1l); + add_sfr_register(&comparator.cmcon1, 0x1a, RegisterValue(2,0),"cmcon1"); + wdt.set_timeout(1./31000.); + +} +P10F32X::P10F32X(const char *_name, const char *desc) + : _14bit_processor(_name,desc), + intcon_reg(this,"intcon","Interrupt Control"), + pie1(this,"PIE1", "Peripheral Interrupt Enable"), + t2con(this, "t2con", "TMR2 Control"), + tmr2(this, "tmr2", "TMR2 Register"), + pr2(this, "pr2", "Timer2 Period Register"), + pcon(this, "pcon", "pcon"), + ansela(this,"ansela", "Analog Select"), + fvrcon(this, "fvrcon", "Voltage reference control register", 0xf3, 0x00), + borcon(this, "borcon", "Brown-out reset control register"), + wdtcon(this, "wdtcon", "WDT Control", 0x3f), + adcon0(this,"adcon", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), // virtual register + adres(this,"adres", "A2D Result Low"), + pwm1con(this, "pwm1con", "PWM CONTROL REGISTER 1", 1), + pwm1dcl(this, "pwm1dcl", "PWM DUTY CYCLE LOW BITS"), + pwm1dch(this, "pwm1dch", "PWM DUTY CYCLE HIGH BITS"), + pwm2con(this, "pwm2con", "PWM CONTROL REGISTER 2", 2), + pwm2dcl(this, "pwm2dcl", "PWM DUTY CYCLE LOW BITS"), + pwm2dch(this, "pwm2dch", "PWM DUTY CYCLE HIGH BITS"), + pm_rw(this), cwg(this), nco(this), clcdata(this), + clc1(this, 0, &clcdata), + vregcon(this, "vregcon", "Voltage Regulator Control Register") + +{ + m_iocaf = new IOCxF(this, "iocaf", "Interrupt-On-Change flag Register", 0x0f); + m_iocap = new IOC(this, "iocap", "Interrupt-On-Change positive edge", 0x0f); + m_iocan = new IOC(this, "iocan", "Interrupt-On-Change negative edge", 0x0f); + m_porta = new PicPortIOCRegister(this,"porta","", &intcon_reg, m_iocap, m_iocan, m_iocaf, 8,0x0f); + + m_trisa = new PicTrisRegister(this,"trisa","", m_porta, false, 0x07); + m_lata = new PicLatchRegister(this,"lata","",m_porta, 0x07); + m_wpu = new WPU(this, "wpua", "Weak Pull-up Register", m_porta, 0x0f); + + pir1 = new PIR1v12f(this,"pir1","Peripheral Interrupt Register",&intcon_reg, &pie1); + pir1->valid_bits |= PIR1v12f::TMR2IF|PIR1v12f::NCO1IF; + pir1->valid_bits &= ~(PIR1v12f::EEIF|PIR1v12f::TMR1IF); + pir1->writable_bits = pir1->valid_bits; + m_cpu_temp = new CPU_Temp("cpu_temperature", 30., "CPU die temperature"); + osccon = new OSCCON_HS2(this, "osccon", "Oscillator Control Register"); + tmr0.set_cpu(this, m_porta, 3, option_reg); + tmr0.start(0); +} + +P10F32X::~P10F32X() +{ + + delete_file_registers(0x40, ram_top); + remove_sfr_register(&tmr2); + remove_sfr_register(&t2con); + remove_sfr_register(&pr2); + remove_sfr_register(&pcon); + remove_sfr_register(&intcon_reg); + remove_sfr_register(&pie1); + remove_sfr_register(&ansela); + remove_sfr_register(&fvrcon); + remove_sfr_register(&tmr0); + remove_sfr_register(&borcon); + remove_sfr_register(&wdtcon); + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&adres); + remove_sfr_register(&pwm1dcl); + remove_sfr_register(&pwm1dch); + remove_sfr_register(&pwm1con); + remove_sfr_register(&pwm2dcl); + remove_sfr_register(&pwm2dch); + remove_sfr_register(&pwm2con); + remove_sfr_register(pm_rw.get_reg_pmadr()); + remove_sfr_register(pm_rw.get_reg_pmadrh()); + remove_sfr_register(pm_rw.get_reg_pmdata()); + remove_sfr_register(pm_rw.get_reg_pmdath()); + remove_sfr_register(pm_rw.get_reg_pmcon1_rw()); + remove_sfr_register(pm_rw.get_reg_pmcon2()); + remove_sfr_register(&nco.nco1accl); + remove_sfr_register(&nco.nco1acch); + remove_sfr_register(&nco.nco1accu); + remove_sfr_register(&nco.nco1incl); + remove_sfr_register(&nco.nco1inch); + remove_sfr_register(&nco.nco1con); + remove_sfr_register(&nco.nco1clk); + remove_sfr_register(&clc1.clcxcon); + remove_sfr_register(&clc1.clcxpol); + remove_sfr_register(&clc1.clcxsel0); + remove_sfr_register(&clc1.clcxsel1); + remove_sfr_register(&clc1.clcxgls0); + remove_sfr_register(&clc1.clcxgls1); + remove_sfr_register(&clc1.clcxgls2); + remove_sfr_register(&clc1.clcxgls3); + remove_sfr_register(&cwg.cwg1con0); + remove_sfr_register(&cwg.cwg1con1); + remove_sfr_register(&cwg.cwg1con2); + remove_sfr_register(&cwg.cwg1dbr); + remove_sfr_register(&cwg.cwg1dbf); + remove_sfr_register(&vregcon); + + + + delete_sfr_register(m_porta); + delete_sfr_register(m_trisa); + delete_sfr_register(m_lata); + delete_sfr_register(m_wpu); + delete_sfr_register(m_iocaf); + delete_sfr_register(m_iocap); + delete_sfr_register(m_iocan); + delete_sfr_register(pir1); + delete_sfr_register(osccon); + delete m_cpu_temp; +} + +void P10F32X::create() +{ + + ram_top = 0x7f; + P10F32X::create_iopin_map(); + + _14bit_processor::create(); + + status->write_mask &= ~0xe0; // IRP RP0 RP1 read only + add_file_registers(0x40, ram_top, 0x00); + P10F32X::create_sfr_map(); +} + +void P10F32X::option_new_bits_6_7(uint bits) +{ + Dprintf(("P10F32X::option_new_bits_6_7 bits=%x\n", bits)); + m_porta->setIntEdge ( (bits & OPTION_REG::BIT6)); + m_wpu->set_wpu_pu ( !(bits & OPTION_REG::BIT7)); +} + +void P10F32X::create_sfr_map() +{ + pir_set_def.set_pir1(pir1); + + add_sfr_register(indf, 0x00); + + add_sfr_register(&tmr0, 0x01, RegisterValue(0xff,0)); + add_sfr_register(option_reg, 0x0e, RegisterValue(0xff,0)); + + add_sfr_register(pcl, 0x02, RegisterValue(0,0)); + add_sfr_register(status, 0x03, RegisterValue(0x18,0)); + add_sfr_register(fsr, 0x04); + add_sfr_register(m_porta, 0x05, RegisterValue(0x0,0)); + add_sfr_register(m_trisa, 0x06, RegisterValue(0x0f,0)); + add_sfr_register(m_lata, 0x07, RegisterValue(0x00,0)); + add_sfr_registerR(&ansela, 0x08, RegisterValue(0x07,0)); + add_sfr_registerR(m_wpu, 0x09, RegisterValue(0x0f,0),"wpu"); + + add_sfr_registerR(pclath, 0x0a, RegisterValue(0,0)); + + add_sfr_registerR(&intcon_reg, 0x0b, RegisterValue(0,0)); + + intcon = &intcon_reg; + intcon_reg.set_pir_set(get_pir_set()); + + add_sfr_register(pir1, 0x0c, RegisterValue(0,0),"pir1"); + + add_sfr_registerR(&pie1, 0x0d, RegisterValue(0,0)); + add_sfr_register(&pcon, 0x0f, RegisterValue(0,0),"pcon"); + add_sfr_registerR(osccon, 0x10, RegisterValue(0x60,0)); + add_sfr_registerR(&tmr2, 0x11, RegisterValue(0,0)); + add_sfr_registerR(&pr2, 0x12, RegisterValue(0xff,0)); + add_sfr_registerR(&t2con, 0x13, RegisterValue(0,0)); + add_sfr_register(&pwm1dcl, 0x14, RegisterValue(0,0)); + add_sfr_register(&pwm1dch, 0x15, RegisterValue(0,0)); + add_sfr_registerR(&pwm1con, 0x16, RegisterValue(0,0)); + add_sfr_register(&pwm2dcl, 0x17, RegisterValue(0,0)); + add_sfr_register(&pwm2dch, 0x18, RegisterValue(0,0)); + add_sfr_registerR(&pwm2con, 0x19, RegisterValue(0,0)); + add_sfr_registerR(m_iocap, 0x1a, RegisterValue(0,0)); + add_sfr_registerR(m_iocan, 0x1b, RegisterValue(0,0)); + add_sfr_registerR(m_iocaf, 0x1c, RegisterValue(0,0)); + add_sfr_registerR(&fvrcon, 0x1d, RegisterValue(0,0)); + add_sfr_register(&adres, 0x1e, RegisterValue(0,0)); + add_sfr_registerR(&adcon0, 0x1f, RegisterValue(0,0)); + add_sfr_registerR(pm_rw.get_reg_pmadr(), 0x20 ); + add_sfr_registerR(pm_rw.get_reg_pmadrh(), 0x21 ); + add_sfr_register(pm_rw.get_reg_pmdata(), 0x22 ); + add_sfr_register(pm_rw.get_reg_pmdath(), 0x23 ); + add_sfr_registerR(pm_rw.get_reg_pmcon1_rw(), 0x24 ); + add_sfr_registerR(pm_rw.get_reg_pmcon2(), 0x25 ); + add_sfr_registerR(&nco.nco1accl, 0x27, RegisterValue(0,0)); + add_sfr_registerR(&nco.nco1acch, 0x28, RegisterValue(0,0)); + add_sfr_registerR(&nco.nco1accu, 0x29, RegisterValue(0,0)); + add_sfr_registerR(&nco.nco1incl, 0x2a, RegisterValue(1,0)); + add_sfr_registerR(&nco.nco1inch, 0x2b, RegisterValue(0,0)); + add_sfr_registerR(&nco.nco1con, 0x2d, RegisterValue(0,0)); + add_sfr_registerR(&nco.nco1clk, 0x2e, RegisterValue(0,0)); + + add_sfr_registerR(&wdtcon, 0x30, RegisterValue(0x16,0)); + add_sfr_registerR(&clc1.clcxcon, 0x31, RegisterValue(0,0), "clc1con"); + add_sfr_register(&clc1.clcxpol, 0x32, RegisterValue(0,0), "clc1pol"); + add_sfr_register(&clc1.clcxsel0, 0x33, RegisterValue(0,0), "clc1sel0"); + add_sfr_register(&clc1.clcxsel1, 0x34, RegisterValue(0,0), "clc1sel1"); + add_sfr_register(&clc1.clcxgls0, 0x35, RegisterValue(0,0), "clc1gls0"); + add_sfr_register(&clc1.clcxgls1, 0x36, RegisterValue(0,0), "clc1gls1"); + add_sfr_register(&clc1.clcxgls2, 0x37, RegisterValue(0,0), "clc1gls2"); + add_sfr_register(&clc1.clcxgls3, 0x38, RegisterValue(0,0), "clc1gls3"); + add_sfr_registerR(&cwg.cwg1con0, 0x39, RegisterValue(0,0)); + add_sfr_register(&cwg.cwg1con1, 0x3a); + add_sfr_register(&cwg.cwg1con2, 0x3b); + add_sfr_register(&cwg.cwg1dbr, 0x3c); + add_sfr_register(&cwg.cwg1dbf, 0x3d); + add_sfr_registerR(&vregcon, 0x3f, RegisterValue(1,0)); + add_sfr_register(&borcon, 0x3f, RegisterValue(0x80,0)); + if (pir1) { + pir1->set_intcon(&intcon_reg); + pir1->set_pie(&pie1); + } + pie1.setPir(pir1); + ansela.setValidBits(0x07); + ansela.setAdcon1(&adcon1); + ansela.config(7, 0); + adcon1.setNumberOfChannels(8); + adcon0.setAdres(&adres); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(&intcon_reg); + adcon0.setA2DBits(8); + adcon0.setPir(pir1); + adcon0.setChannel_Mask(7); + adcon0.setChannel_shift(2); + + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + + fvrcon.set_adcon1(&adcon1); + fvrcon.set_VTemp_AD_chan(6); + fvrcon.set_FVRAD_AD_chan(7); + t2con.tmr2 = &tmr2; + tmr2.pir_set = get_pir_set(); + tmr2.pr2 = &pr2; + tmr2.t2con = &t2con; + tmr2.add_ccp ( &pwm1con ); + tmr2.add_ccp ( &pwm2con ); + pr2.tmr2 = &tmr2; + + pwm1con.set_pwmdc(&pwm1dcl, &pwm1dch); + pwm1con.setIOPin1(&(*m_porta)[0]); + pwm1con.set_tmr2(&tmr2); + pwm1con.set_cwg(&cwg); + pwm1con.set_clc(&clc1, 0); + pwm2con.set_pwmdc(&pwm2dcl, &pwm2dch); + pwm2con.setIOPin1(&(*m_porta)[1]); + pwm2con.set_tmr2(&tmr2); + pwm2con.set_cwg(&cwg); + pwm2con.set_clc(&clc1, 0); + + cwg.set_IOpins(&(*m_porta)[0], &(*m_porta)[1], &(*m_porta)[2]); + + clc1.p_nco = &nco; + clc1.set_clcPins(&(*m_porta)[0], &(*m_porta)[2], &(*m_porta)[1]); + tmr0.set_clc(&clc1, 0); + clc1.setInterruptSource(new InterruptSource(pir1, (1<<3))); + nco.setIOpins(&(*m_porta)[1], &(*m_porta)[2]); + nco.pir = pir1; + +} +void P10F32X::create_iopin_map() +{ + + package = new Package(8); + if(!package) + return; + + // Now Create the package and place the I/O pins + + package->assign_pin( 5, m_porta->addPin(new IO_bi_directional_pu("ra0"),0)); + package->assign_pin( 4, m_porta->addPin(new IO_bi_directional_pu("ra1"),1)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional_pu("ra2"),2)); + package->assign_pin( 8, m_porta->addPin(new IO_bi_directional_pu("ra3"),3)); + + package->assign_pin( 1, 0); + package->assign_pin( 2, 0); + package->assign_pin( 6, 0); + package->assign_pin( 7, 0); + + +} +void P10F32X::create_config_memory() +{ + m_configMemory = new ConfigMemory(this,1); + m_configMemory->addConfigWord(0,new Config12F6(this)); + +}; + +class MCLRPinMonitor; + +bool P10F32X::set_config_word(uint address,uint cfg_word) +{ + enum { + FOSC = 1<<0, + BOREN = 1<<1, + BOREN1 = 1<<2, + WDTEN0 = 1<<3, + WDTEN1 = 1<<4, + MCLRE = 1<<6, + CP = 1<<7, + LVP = 1<<8, + + }; + + + Dprintf(("P10F32X::set_config_word address 0x%x cfg=0x%x\n", address, cfg_word)); + if(address == config_word_address()) + { + if ((cfg_word & MCLRE)) assignMCLRPin(8); // package pin 8 + else unassignMCLRPin(); + + wdt_flag = (cfg_word & (WDTEN0|WDTEN1)) >> 3; + wdt.set_timeout(1./31000.); + wdt.initialize(wdt_flag & 2, false); + + if (cfg_word & FOSC) // EC on CLKIN + { + set_int_osc(false); + } + else // INTRC + { + set_int_osc(true); + osccon->set_rc_frequency(); + } + return(_14bit_processor::set_config_word(address, cfg_word)); + } + return false; +} + +void P10F32X::enter_sleep() +{ + tmr0.sleep(); + if (wdt_flag == 2) // WDT is suspended during sleep + wdt.initialize(false); + pic_processor::enter_sleep(); +} + +void P10F32X::exit_sleep() +{ + if (m_ActivityState == ePASleeping) + { + tmr0.wake(); + if (wdt_flag == 2) + wdt.initialize(true); + pic_processor::exit_sleep(); + } +} + + + +P10F320::P10F320(const char *_name, const char *desc) + : P10F32X(_name,desc) +{ +} +P10F320::~P10F320() +{ +} +Processor * P10F320::construct(const char *name) +{ + P10F320 *p = new P10F320(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +Processor * P10LF320::construct(const char *name) +{ + P10LF320 *p = new P10LF320(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} +P10F322::P10F322(const char *_name, const char *desc) + : P10F32X(_name,desc) +{ +} + +P10F322::~P10F322() +{ +} + +Processor * P10F322::construct(const char *name) +{ + P10F322 *p = new P10F322(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +Processor * P10LF322::construct(const char *name) +{ + P10LF322 *p = new P10LF322(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} diff --git a/src/gpsim/devices/p12f6xx.h b/src/gpsim/devices/p12f6xx.h new file mode 100755 index 0000000..b25a00d --- /dev/null +++ b/src/gpsim/devices/p12f6xx.h @@ -0,0 +1,238 @@ +/* + Copyright (C) 2009 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __P12F629_H__ +#define __P12F629_H__ + +#include "14bit-processors.h" +#include "14bit-tmrs.h" +#include "intcon.h" +#include "pir.h" +#include "pie.h" +#include "eeprom.h" +#include "comparator.h" +#include "a2dconverter.h" +#include "pm_rd.h" +#include "cwg.h" +#include "nco.h" +#include "clc.h" + +class WPU; +class IOC; +class PicPortGRegister; + +class P12F629 : public _14bit_processor +{ +public: + INTCON_14_PIR intcon_reg; + ComparatorModule comparator; + PIR_SET_1 pir_set_def; + PIE pie1; + PIR *pir1; + T1CON t1con; + TMRL tmr1l; + TMRH tmr1h; + PCON pcon; + OSCCAL osccal; + EEPROM_PIR *e; + + PicPortGRegister *m_gpio; + PicTrisRegister *m_trisio; + WPU *m_wpu; + IOC *m_ioc; + + virtual PIR *get_pir2() { return (NULL); } + virtual PIR *get_pir1() { return (pir1); } + virtual PIR_SET *get_pir_set() { return (&pir_set_def); } + + + virtual PROCESSOR_TYPE isa(){return _P12F629_;}; + P12F629(const char *_name=0, const char *desc=0); + ~P12F629(); + static Processor *construct(const char *name); + virtual void create_sfr_map(); + + virtual void set_out_of_range_pm(uint address, uint value); + virtual void create_iopin_map(); + virtual void create(int ram_top, int eeprom_size); + virtual uint register_memory_size () const { return 0x100; } + virtual void option_new_bits_6_7(uint bits); + virtual uint program_memory_size() const { return 0x400; } + virtual void create_config_memory(); + virtual bool set_config_word(uint address,uint cfg_word); + virtual void enter_sleep(); + virtual void exit_sleep(); + +}; + + +class P12F675 : public P12F629 +{ +public: + + ANSEL_12F ansel; + ADCON0_12F adcon0; + ADCON1 adcon1; + sfr_register adresh; + sfr_register adresl; + + + virtual PROCESSOR_TYPE isa(){return _P12F675_;}; + + virtual void create(int ram_top, int eeprom_size); + virtual uint program_memory_size() const { return 0x400; }; + + P12F675(const char *_name=0, const char *desc=0); + ~P12F675(); + static Processor *construct(const char *name); + virtual void create_sfr_map(); +}; + +class P12F683 : public P12F675 +{ +public: + T2CON t2con; + PR2 pr2; + TMR2 tmr2; + CCPCON ccp1con; + CCPRL ccpr1l; + CCPRH ccpr1h; + WDTCON wdtcon; + OSCCON *osccon; + OSCTUNE osctune; + + + virtual PROCESSOR_TYPE isa(){return _P12F683_;}; + + virtual void create(int ram_top, int eeprom_size); + virtual uint program_memory_size() const { return 0x800; }; + + P12F683(const char *_name=0, const char *desc=0); + ~P12F683(); + static Processor *construct(const char *name); + virtual void create_sfr_map(); +}; + +class P10F32X : public _14bit_processor +{ +public: + INTCON_14_PIR intcon_reg; + PIR_SET_1 pir_set_def; + PIE pie1; + PIR *pir1; + T2CON t2con; + TMR2 tmr2; + PR2 pr2; + PCON pcon; + ANSEL_P ansela; + FVRCON fvrcon; + BORCON borcon; + WDTCON wdtcon; + OSCCON *osccon; + ADCON0_32X adcon0; + ADCON1 adcon1; + sfr_register adres; + PWMxCON pwm1con; + sfr_register pwm1dcl; + sfr_register pwm1dch; + PWMxCON pwm2con; + sfr_register pwm2dcl; + sfr_register pwm2dch; + PM_RW pm_rw; + CWG cwg; + NCO2 nco; + CLCDATA clcdata; + CLC1 clc1; + sfr_register vregcon; + + PicPortIOCRegister *m_porta; + PicTrisRegister *m_trisa; + PicLatchRegister *m_lata; + WPU *m_wpu; + IOC *m_iocap; + IOC *m_iocan; + IOCxF *m_iocaf; + + virtual PIR *get_pir2() { return (NULL); } + virtual PIR *get_pir1() { return (pir1); } + virtual PIR_SET *get_pir_set() { return (&pir_set_def); } + + + P10F32X(const char *_name=0, const char *desc=0); + ~P10F32X(); + virtual void option_new_bits_6_7(uint bits); + + virtual void create_sfr_map(); + virtual void create_iopin_map(); + virtual void create(); + virtual void create_config_memory(); + virtual bool set_config_word(uint address,uint cfg_word); + virtual bool swdten_active() {return(wdt_flag == 1);} // WDTCON can enable WDT + virtual void enter_sleep(); + virtual void exit_sleep(); +/* + virtual void set_out_of_range_pm(uint address, uint value); +*/ + +}; + +class P10F320 : public P10F32X +{ +public: + P10F320(const char *_name=0, const char *desc=0); + ~P10F320(); + virtual PROCESSOR_TYPE isa(){return _P10F320_;}; + static Processor *construct(const char *name); + virtual uint register_memory_size () const { return 0x80; } + virtual uint program_memory_size() const { return 0x100; } + //RRRvirtual void create(); + virtual uint get_device_id() { return(0x29 << 8)|(0x5 <<5);} +}; +class P10LF320 : public P10F320 +{ +public: + P10LF320(const char *_name=0, const char *desc=0) : P10F320(_name,desc){;} + ~P10LF320(){;} + virtual PROCESSOR_TYPE isa(){return _P10LF320_;}; + static Processor *construct(const char *name); + virtual uint get_device_id() { return(0x29 << 8)|(0x7 <<5);} +}; +class P10F322 : public P10F32X +{ +public: + P10F322(const char *_name=0, const char *desc=0); + ~P10F322(); + virtual PROCESSOR_TYPE isa(){return _P10F322_;}; + static Processor *construct(const char *name); + virtual uint register_memory_size () const { return 0x80; } + virtual uint program_memory_size() const { return 0x200; } + //RRRvirtual void create(); + virtual uint get_device_id() { return(0x29 << 8)|(0x4 <<5);} +}; +class P10LF322 : public P10F322 +{ +public: + P10LF322(const char *_name=0, const char *desc=0) : P10F322(_name,desc){;} + ~P10LF322(){;} + virtual PROCESSOR_TYPE isa(){return _P10LF322_;}; + static Processor *construct(const char *name); + virtual uint get_device_id() { return(0x29 << 8)|(0x6 <<5);} +}; +#endif diff --git a/src/gpsim/devices/p12x.cc b/src/gpsim/devices/p12x.cc new file mode 100644 index 0000000..1b6d67a --- /dev/null +++ b/src/gpsim/devices/p12x.cc @@ -0,0 +1,1465 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +// +// p12x +// +// This file supports: +// PIC12C508 PIC12C509 +// PIC12CE518 PIC12CE519 +// PIC10F200 PIC10F202 PIC10F204 +// PIC10F220 PIC10F222 +// + +#include +#include +#include + +#include "config.h" +#include "packages.h" +#include "stimuli.h" +#include "i2c-ee.h" +#include "p12x.h" + +//======================================================================== +// Generic Configuration word for the midrange family. + +class Generic12bitConfigWord : public ConfigWord +{ + public: + Generic12bitConfigWord(P12bitBase *pCpu) + : ConfigWord("CONFIG", 0xfff, "Configuration Word", pCpu, 0xfff), + m_pCpu(pCpu) + { + assert(pCpu); + pCpu->wdt.initialize(true); + } + + enum { + FOSC0 = 1<<0, + FOSC1 = 1<<1, + WDTEN = 1<<2, + CP = 1<<3, + MCLRE = 1<<4 + }; + + virtual void set(int64_t v) + { + int64_t oldV = getVal(); + + Integer::set(v); + if (m_pCpu) + { + int64_t diff = oldV ^ v; + m_pCpu->setConfigWord(v & 0x3ff, diff & 0x3ff); + } + } + virtual string toString() + { + int64_t i64; + get(i64); + int i = i64 &0xfff; + + char buff[256]; + + snprintf(buff,sizeof(buff), + "$%3x\n" + " FOSC=%d - Clk source = %s\n" + " WDTEN=%d - WDT is %s\n" + " CP=%d - Code protect is %s\n" + " MCLRE=%d - /MCLR is %s", + i, + i & (FOSC0 | FOSC1), + ((i & FOSC0) ? ((i & FOSC1) ? "EXTRC" : "XT") : ((i & FOSC1) ? "INTRC" : "LP")), + ((i & WDTEN) ? 1 : 0), ((i & WDTEN) ? "enabled" : "disabled"), + ((i & CP) ? 1 : 0), ((i & CP) ? "enabled" : "disabled"), + ((i & MCLRE) ? 1 : 0), ((i & MCLRE) ? "enabled" : "disabled")); + return string(buff); + } + + private: + P12bitBase *m_pCpu; +}; + +void P12_OSCCON::put(uint new_value) +{ + uint old = value.get(); + + value.put(new_value); + if((new_value ^ old) & FOSC4 && m_CPU) m_CPU->updateGP2Source(); + if ((new_value ^ old) & 0xfe && m_CPU) m_CPU->freqCalibration(); +} + +//======================================================================== +// The P12 devices with an EEPROM contain two die. One is the 12C core and +// the other is an I2C EEPROM (Actually, it is not know if there are two +// physical die. However, it is known that there are two functional layouts +// in the same package.) These two devices are connected internally. +class P12_I2C_EE : public I2C_EE +{ + public: + P12_I2C_EE(pic_processor *, uint _rom_size); + ~P12_I2C_EE(); +}; + + +P12_I2C_EE::P12_I2C_EE(pic_processor *pcpu, uint _rom_size) + : I2C_EE(pcpu,_rom_size) +{ + if(pcpu) pcpu->ema.set_Registers(rom, rom_size); +} + +P12_I2C_EE::~P12_I2C_EE() +{ +} + +//------------------------------------------------------------------- + +P12bitBase::P12bitBase(const char *_name, const char *desc) + : _12bit_processor(_name,desc), + m_gpio(0), + m_tris(0), + osccal(this,"osccal","Oscillator Calibration") +{ + + configWord = 0; + set_frequency(4e6); + if(config_modes) + config_modes->valid_bits = config_modes->CM_FOSC0 | config_modes->CM_FOSC1 | + config_modes->CM_FOSC1x | config_modes->CM_WDTE | config_modes->CM_MCLRE; +} + +P12bitBase::~P12bitBase() +{ + // printf("P12bitBase::~P12bitBase\n"); + if (m_gpio) { + (&(*m_gpio)[3])->setControl(0); + (&(*m_gpio)[2])->setControl(0); + } + delete m_IN_SignalControl; + delete_sfr_register(m_gpio); + delete_sfr_register(m_tris); + remove_sfr_register(&tmr0); + remove_sfr_register(&osccal); +} + +void P12bitBase::create_config_memory() +{ + m_configMemory = new ConfigMemory(this,1); + m_configMemory->addConfigWord(0,new Generic12bitConfigWord(this)); +} + +//======================================================================== +void P12bitBase::create_iopin_map() +{ + package = new Package(8); + if(!package) return; + + package->assign_pin(7, m_gpio->addPin(new IO_bi_directional_pu("gpio0"),0)); + package->assign_pin(6, m_gpio->addPin(new IO_bi_directional_pu("gpio1"),1)); + package->assign_pin(5, m_gpio->addPin(new IO_bi_directional("gpio2"),2)); + package->assign_pin(4, m_gpio->addPin(new IO_bi_directional_pu("gpio3"),3)); + package->assign_pin(3, m_gpio->addPin(new IO_bi_directional("gpio4"),4)); + package->assign_pin(2, m_gpio->addPin(new IO_bi_directional("gpio5"),5)); + package->assign_pin(1, 0); + package->assign_pin(8, 0); + + // gpio3 is input only, but we want pullup, so use IO_bi_directional_pu + // but force as input pin disableing TRIS control + m_IN_SignalControl = new IN_SignalControl; + (&(*m_gpio)[3])->setControl(m_IN_SignalControl); +} + +//-------------------------------------------------------- +void P12bitBase::reset(RESET_TYPE r) +{ + m_tris->reset(r); + + switch (r) + { + case IO_RESET: + // Set GPWUF flag + status->put(status->value.get() | 0x80); + + // fall through... + default: + _12bit_processor::reset(r); + } +} + +//------------------------------------------------------------------------ +#define STATUS_GPWUF 0x80 + +void P12bitBase::enter_sleep() +{ + pic_processor::enter_sleep(); + + status->put( status->value.get() & ~STATUS_GPWUF); + cout << "enter sleep status="<get()<value.get() & OPTION_REG::T0CS) + { + printf("OPTION_REG::T0CS forcing GPIO2 as input, TRIS disabled\n"); + pmGP2->setControl(m_IN_SignalControl); + } + else + { + cout << "TRIS now controlling gpio2\n"; + pmGP2->setControl(0); + } +} +// freqCalibrate modifies the internal RC frequency +// the base varsion is for the 12C508 and 12C509 Processors +// the spec sheet does not indicate the range or step size of corrections +// so this is based on +/- 12.5 % as per 16f88 +void P12bitBase::freqCalibration() +{ + // If internal RC oscilator + if((configWord & (FOSC0 | FOSC1)) == FOSC1) + { + int osccal_val = (osccal.get() >> 4) - 0x07; + double freq = get_frequency(); + freq *= 1. + 0.125 * osccal_val / 0x08; + set_frequency(freq); + } +} +// option_new_bits_6_7 is called from class OPTION_REG when +// bits 5, 6, or 7 of OPTION_REG change state +// +void P12bitBase::option_new_bits_6_7(uint bits) +{ + // Weak pullup if NOT_GPPU == 0 + m_gpio->setPullUp ( (bits & OPTION_REG::BIT6) != OPTION_REG::BIT6 , (configWord & MCLRE)); + updateGP2Source(); +} + +void P12bitBase::create_sfr_map() +{ + RegisterValue porVal(0,0); + + add_sfr_register(indf, 0, porVal); + add_sfr_register(&tmr0, 1, porVal); + add_sfr_register(pcl, 2, RegisterValue(0xff,0)); + add_sfr_register(status, 3, porVal); + add_sfr_register(fsr, 4, porVal); + add_sfr_register(&osccal,5, RegisterValue(0x70,0)); + add_sfr_register(m_gpio, 6, porVal); + add_sfr_register(m_tris, 0xffffffff, RegisterValue(0x3f,0)); + add_sfr_register(Wreg, 0xffffffff, porVal); + option_reg->set_cpu(this); + + osccal.set_cpu(this); +} + +void P12bitBase::dump_registers () +{ + _12bit_processor::dump_registers(); + + cout << "tris = 0x" << hex << m_tris->value.get() << '\n'; + cout << "osccal = 0x" << osccal.value.get() << '\n'; +} + +void P12bitBase::setConfigWord(uint val, uint diff) +{ + PinModule *pmGP3 = &(*m_gpio)[3]; + + configWord = val; + if (diff & WDTEN) wdt.initialize((val & WDTEN) == WDTEN); + + if ((val & MCLRE) == MCLRE) pmGP3->getPin().update_pullup('1', true); +} + +void P12bitBase::tris_instruction(uint tris_register) +{ + m_tris->put(Wget()); +} + +void P12C508::create() +{ + create_iopin_map(); + + _12bit_processor::create(); + + add_file_registers(0x07, 0x1f, 0); + P12bitBase::create_sfr_map(); + create_invalid_registers (); + + tmr0.set_cpu(this,m_gpio,2,option_reg); + tmr0.start(0); + + pc->reset(); +} + + +Processor * P12C508::construct(const char *name) +{ + P12C508 *p = new P12C508(name); + + p->pc->set_reset_address(0x1ff); + p->create(); + + return p; +} + +P12C508::P12C508(const char *_name, const char *desc) + : P12bitBase(_name,desc) +{ + m_gpio = new GPIO(this,"gpio","I/O port",8,0x3f); + m_tris = new PicTrisRegister(this,"tris","Port Direction Control", m_gpio, false); + m_tris->wdtr_value=RegisterValue(0x3f,0); +} + +P12C508::~P12C508() +{ + delete_file_registers(0x07, 0x1f); +} + +P12F508::P12F508(const char *_name, const char *desc) + : P12C508(_name,desc) +{ +} +P12F508::~P12F508() +{ +} + +Processor * P12F508::construct(const char *name) +{ + P12F508 *p = new P12F508(name); + p->pc->set_reset_address(0x1ff); + p->create(); + + return p; +} +//-------------------------------------------------------- + +void P12C509::create_sfr_map() +{ +} + +Processor * P12C509::construct(const char *name) +{ + P12C509 *p = new P12C509(name); + + p->pc->set_reset_address(0x3ff); + p->create(); + + return p; +} + +void P12C509::create() +{ + P12C508::create(); + + alias_file_registers(0x00,0x0f,0x20); + add_file_registers(0x30, 0x3f, 0); + + pa_bits = PA0; // the 509 has two code pages (i.e. PAO in status is used) + indf->base_address_mask2 = 0x3F; // RP - need this or INDF won't work right +} + +P12C509::P12C509(const char *_name, const char *desc) + : P12C508(_name,desc) +{ +} + +P12C509::~P12C509() +{ + delete_file_registers(0x30, 0x3f); +} + + +P12F509::P12F509(const char *_name, const char *desc) + : P12C509(_name,desc) +{ +} +P12F509::~P12F509() +{ +} +Processor * P12F509::construct(const char *name) +{ + P12F509 *p = new P12F509(name); + p->pc->set_reset_address(0x3ff); + p->create(); + + return p; +} + +// +P12F510::P12F510(const char *_name, const char *desc) + : P12F509(_name,desc) +{ +} +P12F510::~P12F510() +{ +} + +Processor * P12F510::construct(const char *name) +{ + P12F510 *p = new P12F510(name); + p->pc->set_reset_address(0x3ff); + p->create(); + + return p; +} + +//-------------------------------------------------------- + +// construct function is identical to 12C508 version ?? +Processor * P12CE518::construct(const char *name) +{ + P12CE518 *p = new P12CE518(name); + + p->pc->set_reset_address(0x1ff); + p->create(); + + return p; +} + + +void P12CE518::create_iopin_map() +{ + P12C508::create_iopin_map(); + + // Define the valid I/O pins. + //gpio.valid_iopins = 0xff; +} + +void P12CE518::create() +{ + P12C508::create(); + + m_eeprom = new P12_I2C_EE(this, 0x10); + m_eeprom->debug(); + + // GPIO bits 6 and 7 are not bonded to physical pins, but are tied + // to the internal I2C device. + m_gpio->setEnableMask(0xc0 | m_gpio->getEnableMask()); + RegisterValue por_value(0xc0,0x00); + m_gpio->value = por_value; + m_gpio->por_value = por_value; + m_gpio->wdtr_value = por_value; + m_gpio->put(0xc0); + + osccal.por_value = RegisterValue(0x80,0); + + // Kludge to force top two bits to be outputs + m_tris->put(0x3f); + + { + scl = new Stimulus_Node ( "EE_SCL" ); + io_scl = new IO_bi_directional_pu("gpio7"); + io_scl->update_pullup('1',true); + io_scl->setDrivingState(true); + io_scl->setDriving(true); + scl->attach_stimulus( m_gpio->addPin(io_scl,7)); + scl->update(); + } + { + sda = new Stimulus_Node ( "EE_SDA" ); + + io_sda = new IO_open_collector("gpio6"); + // enable the pullup resistor. + io_sda->update_pullup('1',true); + io_sda->setDrivingState(true); + io_sda->setDriving(true); + m_gpio->addPin(io_sda,6); + sda->attach_stimulus (io_sda); + sda->update(); + } + + m_eeprom->attach ( scl, sda ); + /* + ema.set_cpu(this); + ema.set_Registers(m_eeprom->rom, m_eeprom->rom_size); + */ +} + +P12CE518::P12CE518(const char *_name, const char *desc) + : P12C508(_name,desc) +{ + if(config_modes) + config_modes->valid_bits = config_modes->CM_FOSC0 | config_modes->CM_FOSC1 | + config_modes->CM_FOSC1x | config_modes->CM_WDTE | config_modes->CM_MCLRE; +} + +P12CE518::~P12CE518() +{ + delete m_eeprom; + delete io_scl; + delete io_sda; + delete scl; + delete sda; +} + +void P12CE518::tris_instruction(uint tris_register) +{ + uint w_val = Wget(); + m_tris->put ( w_val & 0x3F ); // top two bits always output +} + + +// freqCalibrate modifies the internal RC frequency +// this version is for the 12CE518 and 12CE519 Processors but would also +// be correct for 12C508A/C509A/CR509A +// the spec sheet does not indicate the range or step size of corrections +// so this is based on +/- 12.5 % as per 16f88 +void P12CE518::freqCalibration() +{ + // If internal RC oscilator + if((configWord & (FOSC0 | FOSC1)) == FOSC1) + { + int osccal_val = (osccal.get() >> 2) - 0x20; + double freq = 4e6; + freq *= 1. + 0.125 * osccal_val / 0x20; + set_frequency(freq); + } +} +//-------------------------------------------------------- + +void P12CE519::create_sfr_map() +{ +} + +Processor * P12CE519::construct(const char *name) +{ + P12CE519 *p = new P12CE519(name); + + cout << " 12ce519 construct\n"; + + p->pc->set_reset_address(0x3ff); + p->create(); + + return p; +} + + +void P12CE519::create() +{ + P12CE518::create(); + + alias_file_registers(0x00,0x0f,0x20); + add_file_registers(0x30, 0x3f, 0); + + pa_bits = PA0; // the 519 has two code pages (i.e. PAO in status is used) + indf->base_address_mask2 = 0x3F; // RP - need this or INDF won't work right +} + + +P12CE519::P12CE519(const char *_name, const char *desc) + : P12CE518(_name,desc) +{ +} + +P12CE519::~P12CE519() +{ + delete_file_registers(0x30, 0x3f); +} + + +//-------------------------------------------------------- +// +// GPIO Port + +GPIO::GPIO(P12bitBase *pCpu, const char *pName, const char *pDesc, + uint numIopins, + uint enableMask, + uint resetMask, + uint wakeupMask, + uint configMaskMCLRE) + : PicPortRegister (pCpu,pName,pDesc, numIopins, enableMask), m_CPU(pCpu) + , m_resetMask(resetMask) + , m_wakeupMask(wakeupMask) + , m_configMaskMCLRE(configMaskMCLRE) +{ +} + +void GPIO::setbit(uint bit_number, char new_value) +{ + uint lastDrivenValue = rvDrivenValue.data; + + PortRegister::setbit(bit_number, new_value); + + // If gpio bit 0,1 or 3 changed states AND + // ~GPWU is low (wake up on change is enabled) AND + // the processor is sleeping. + // Then wake + + uint diff = lastDrivenValue ^ rvDrivenValue.data; + //if ((diff & (1<<3)) && cpu_pic->config_modes->get_mclre()) { // GP3 is the reset pin + if ((diff & m_resetMask) && (m_CPU->configWord & m_configMaskMCLRE)) + { + cpu->reset( (rvDrivenValue.data & m_resetMask) ? EXIT_RESET : MCLR_RESET); + return; + } + + if (diff & m_wakeupMask) + { + // If /GPWU is 0 (i.e. enabled) and the processor is currently sleeping + // then wake up the processor by resetting it. + if( ((cpu12->option_reg->value.get() & 0x80) == 0) && + cpu12->getActivityState() == pic_processor::ePASleeping) + { + cpu->reset(IO_RESET); + } + } +} + +// if bNewPU == true set weak pullups otherwise clear weak pullups +void GPIO::setPullUp ( bool bNewPU , bool mclr) +{ + m_bPU = bNewPU; + + // In the following do not change pullup state of internal pins + uint mask = getEnableMask() & 0x3f; + + // If mclr active do not change pullup on gpio3 + if (mclr) mask &= 0x37; + + for (uint i=0, m = 1; mask; i++, m <<= 1) + { + if (mask & m) + { + mask ^= m; + getPin(i)->update_pullup ( m_bPU ? '1' : '0', true ); + } + } +} + + +//------------------------------------------------------------------------ +void P10F200::create_iopin_map() +{ + package = new Package(6); + if(!package) return; + + package->assign_pin(1, m_gpio->addPin(new IO_bi_directional_pu("gpio0"),0)); + package->assign_pin(3, m_gpio->addPin(new IO_bi_directional_pu("gpio1"),1)); + package->assign_pin(4, m_gpio->addPin(new IO_bi_directional("gpio2"),2)); + package->assign_pin(6, m_gpio->addPin(new IO_bi_directional_pu("gpio3"),3)); + package->assign_pin(2, 0); + package->assign_pin(5, 0); + + // gpio3 is input only, but we want pullup, so use IO_bi_directional_pu + // but force as input pin disableing TRIS control + m_IN_SignalControl = new IN_SignalControl; + m_OUT_SignalControl = new OUT_SignalControl; + m_OUT_DriveControl = new OUT_DriveControl; + (&(*m_gpio)[3])->setControl(m_IN_SignalControl); +} + +void P10F200::create() +{ + create_iopin_map(); + + _12bit_processor::create(); + + add_file_registers(0x10, 0x1f, 0); // 10F200 only has 16 bytes RAM + P12bitBase::create_sfr_map(); + create_invalid_registers (); + + tmr0.set_cpu(this,m_gpio,2,option_reg); + tmr0.start(0); + osccal.set_cpu(this); + osccal.por_value = RegisterValue(0xfe,0); + + pc->reset(); +} + +Processor * P10F200::construct(const char *name) +{ + P10F200 *p = new P10F200(name); + + p->pc->set_reset_address(0x0ff); + p->create(); + + return p; +} + +P10F200::P10F200(const char *_name, const char *desc) + : P12bitBase(_name,desc) +{ + m_gpio = new GPIO(this,"gpio","I/O port",8,0x0f); + m_tris = new PicTrisRegister(this, "tris", "Port Direction Control",m_gpio, false); + m_tris->wdtr_value=RegisterValue(0x3f,0); + + if(config_modes) + config_modes->valid_bits = config_modes->CM_WDTE | config_modes->CM_MCLRE; +} + +P10F200::~P10F200() +{ + (&(*m_gpio)[3])->setControl(0); + (&(*m_gpio)[2])->setControl(0); + + delete m_OUT_SignalControl; + delete m_OUT_DriveControl; + delete_file_registers(0x10, 0x1f); +} + +void P10F200::updateGP2Source() +{ + PinModule *pmGP2 = &(*m_gpio)[2]; + + if (osccal.value.get() & P12_OSCCON::FOSC4 ) + { + pmGP2->setSource(m_OUT_DriveControl); + printf("OSCCON::FOSC4 forcing GPIO2 high on output, TODO FOSC4 toggle output\n"); + } + else if(option_reg->value.get() & OPTION_REG::T0CS) + { + printf("OPTION_REG::T0CS forcing GPIO2 as input, TRIS disabled\n"); + pmGP2->setControl(m_IN_SignalControl); + pmGP2->setSource(0); + } + else + { + // revert to default control, i.e. let TRIS control the output + pmGP2->setControl(0); + pmGP2->setSource(0); + cout << "TRIS now controlling gpio2\n"; + } + pmGP2->updatePinModule(); +} + +// freqCalibrate modifies the internal RC frequency +// this version is for the 10F2xx Processors +// the spec sheet does not indicate the range or step size of corrections +// so this is based on +/- 12.5 % as per 16f88 +void P10F200::freqCalibration() +{ + // If internal RC oscilator + char osccal_val = (osccal.value.get() & 0xfe); + double freq = (configWord & 1)? 8e6 : 4e6; + + freq *= 1. + (0.125 * osccal_val) / 0x80; + set_frequency(freq); +} + +//------------------------------------------------------------------------ + +void P10F202::create() +{ + create_iopin_map(); + + _12bit_processor::create(); + + add_file_registers(0x08, 0x1f, 0); // 10F202 has 24 bytes RAM + P12bitBase::create_sfr_map(); + create_invalid_registers (); + + tmr0.set_cpu(this,m_gpio,2,option_reg); + tmr0.start(0); + + pc->reset(); +} + +Processor * P10F202::construct(const char *name) +{ + P10F202 *p = new P10F202(name); + + p->pc->set_reset_address(0x1ff); + p->create(); + + return p; +} + +P10F202::P10F202(const char *_name, const char *desc) + : P10F200(_name,desc) +{ +} + +P10F202::~P10F202() +{ + delete_file_registers(0x08, 0x0f); // Rest is deleted by P10F200 +} + +//======================================================================== +// Comparator module for the 10c204 and 10c206 +// +class Comparator10C20x +{ + public: + Comparator10C20x(); + ~Comparator10C20x(); +}; + +class COUT_SignalSource; + +//======================================================================== +// COUT_SignalControl -- controls GPIO2's direction when the comparator is +// enabled. When the comparator is enabled, GPIO2 is an output. + +class COUT_SignalControl : public SignalControl +{ + public: + COUT_SignalControl(){} + ~COUT_SignalControl(){ } + virtual char getState() { return '0'; } + virtual void release() { delete this; } +}; + + +class CIN_SignalSink; +class CMCON0 : public sfr_register +{ + public: + enum { + CWU = 1<<0, + CPREF = 1<<1, + CNREF = 1<<2, + CMPON = 1<<3, + CMPTOCS = 1<<4, + POL = 1<<5, + COUTEN = 1<<6, + CMPOUT = 1<<7 + }; + + CMCON0(P10F204 *pCpu, const char *pName, const char *pDesc, + PinModule *CInP, PinModule *CInM, PinModule *COut); + + ~CMCON0(); + + virtual void put(uint new_value); + virtual void put_value(uint new_value); + bool isEnabled() { return ((value.get() & COUTEN) == 0); } + + char getState() + { + char ret='Z'; + if ( (value.get() & (COUTEN | CMPON)) == CMPON) + ret = (((value.get() & CMPOUT)==CMPOUT) ^ ((value.get() & POL)==POL)) ? '0' : '1'; + + return ret; + } + + void refresh(); + + SignalControl *getSource() { return (SignalControl *)m_source; } + SignalControl *getGPDirectionControl() { return m_control; } + + void setInputState(char newState, bool bInput); + + private: + P10F204 *p_F204; + COUT_SignalControl *m_control; + COUT_SignalSource *m_source; + bool active_control; + bool active_source; + CIN_SignalSink *m_PosInput; + CIN_SignalSink *m_NegInput; + + PinModule *m_CInP; + PinModule *m_CInM; + PinModule *m_COut; + + double m_pV, m_nV; +}; + + +//======================================================================== +// COUT_SignalSource +// +// The comparator output is driven on to the GPIO pin if the COUTEN bit in +// CMCON0 is cleared ( and if the FOSC/4 logic is not driving). +// This is implemented via COUT_SignalSource. When COUTEN bit is asserted, +// then COUT_SignalSource overides the default output driver control for +// the GPIO pin. + +class COUT_SignalSource : public SignalControl +{ + public: + COUT_SignalSource(CMCON0 *pcmcon0) + : m_cmcon0(pcmcon0) + { } + ~COUT_SignalSource() { } + + virtual char getState() { return m_cmcon0->getState(); } + virtual void release() { } + + private: + CMCON0 *m_cmcon0; +}; + +class CIN_SignalSink : public SignalSink +{ + public: + CIN_SignalSink(CMCON0 *pcmcon0, bool binput) + : m_cmcon0(pcmcon0), + m_binput(binput) // true==+input + {} + virtual void setSinkState(char new3State) + { + m_cmcon0->setInputState(new3State, m_binput); + } + virtual void release() {delete this; } + + private: + CMCON0 *m_cmcon0; + bool m_binput; +}; + +//----------------------------------------------------------- +CMCON0::CMCON0(P10F204 *pCpu, const char *pName, const char *pDesc, + PinModule *CInP, PinModule *CInM, PinModule *COut) + : sfr_register(pCpu, pName, pDesc), + p_F204(pCpu), + m_CInP(CInP), + m_CInM(CInM), + m_COut(COut) +{ + // assign the I/O pin associated with the + // the comparator output. + + m_source = new COUT_SignalSource(this); + m_control = new COUT_SignalControl(); + m_PosInput = new CIN_SignalSink(this,true); + m_NegInput = new CIN_SignalSink(this,false); + + active_source = false; + active_control = false; + + CInP->addSink(m_PosInput); + CInM->addSink(m_NegInput); + //COut->setSource(m_source); + + m_pV = m_nV = 0.0; +} + +CMCON0::~CMCON0() +{ + if (!isEnabled()) + { + delete m_source; + delete m_control; + } +} +void CMCON0::put(uint new_value) +{ + uint old_value = value.get(); + + value.put((new_value & 0x7f ) | (old_value & CMPOUT) ); + + // If any of the control bits that afffect CMPOUT have changed, + // then refresh CMPOUT + if ((old_value ^ new_value) & (CPREF | CNREF | CMPON | CMPTOCS | POL)) + refresh(); + + // If the output enable changed states. + if ((old_value ^ new_value) & COUTEN) p_F204->updateGP2Source(); + + // If the comparator output state has changed or the polarity changed: + if ((old_value ^ value.get()) & (CMPOUT | POL)) m_COut->updatePinModule(); +} + +void CMCON0::refresh() +{ + if (value.get() & CMPON) + { + if (value.get() & CPREF) m_pV = m_CInP->getPin().get_nodeVoltage(); + else m_pV = m_CInM->getPin().get_nodeVoltage(); + + if (value.get() & CNREF) m_nV = m_CInM->getPin().get_nodeVoltage(); + else m_nV = 0.6; + + value.put( (value.get() & 0x7f) | ((m_pV>m_nV)? CMPOUT : 0)); + } +} + +void CMCON0::put_value(uint new_value) +{ +} + +void CMCON0::setInputState(char newState, bool bInput) +{ + if (bInput) + { + if (value.get() & CPREF) m_pV = m_CInP->getPin().get_nodeVoltage(); + } + else + { + if ((value.get() & CPREF) == 0) m_pV = m_CInM->getPin().get_nodeVoltage(); + if (value.get() & CNREF) m_nV = m_CInM->getPin().get_nodeVoltage(); + else m_nV = 0.6; + } + uint old_value = value.get(); + + value.put( (old_value&0x7f) | ((m_pV>m_nV) ? CMPOUT : 0)); + + m_COut->updatePinModule(); +} + +//======================================================================== +P10F204::P10F204(const char *_name, const char *desc) + : P10F200(_name,desc) +{ +} + +P10F204::~P10F204() +{ + delete_sfr_register(m_cmcon0); +} + +void P10F204::create() +{ + P10F200::create(); + + m_cmcon0 = new CMCON0(this, "cmcon0", "Comparator Control", + &(*m_gpio)[0], &(*m_gpio)[1], &(*m_gpio)[2]); + + RegisterValue porVal = RegisterValue(0xff,0); + add_sfr_register(m_cmcon0, 7, porVal); +} + +void P10F204::updateGP2Source() +{ + // m_gpio->getIOpins(2)->setSource(m_cmcon0->getSource()); + PinModule *pmGP2 = &(*m_gpio)[2]; + + if (osccal.get() & P12_OSCCON::FOSC4 ) + { + + pmGP2->setSource(m_OUT_DriveControl); + printf("OSCCON::FOSC4 forcing GPIO2 high on output, TODO FOSC4 toggle output\n"); + } + else if (m_cmcon0->isEnabled()) + { + pmGP2->setControl(m_cmcon0->getGPDirectionControl()); + pmGP2->setSource(m_cmcon0->getSource()); + cout << "comparator is controlling the output of GPIO2\n"; + } + else if(option_reg->get() & OPTION_REG::T0CS) + { + printf("OPTION_REG::T0CS forcing GPIO2 as input, TRIS disabled\n"); + pmGP2->setControl(m_IN_SignalControl); + pmGP2->setSource(0); + } + else + { + pmGP2->setControl(0); + pmGP2->setSource(0); + } + pmGP2->updatePinModule(); +} + +//======================================================================== +Processor * P10F204::construct(const char *name) +{ + P10F204 *p = new P10F204(name); + + p->pc->set_reset_address(0x1ff); + p->create(); + + return p; +} +//======================================================================== +P10F220::P10F220(const char *_name, const char *desc) + : P10F200(_name,desc), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adres(this,"adres", "A2D Result") +{ +} + +P10F220::~P10F220() +{ + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&adres); +} + +void P10F220::create() +{ + P10F200::create(); + add_sfr_register(&adcon0, 0x07, RegisterValue(0xcc,0)); + add_sfr_register(&adres, 0x08, RegisterValue(0,0)); + + adcon1.setValidCfgBits(ADCON1::PCFG0 | ADCON1::PCFG1,0); + adcon1.setNumberOfChannels(4); + adcon1.setIOPin(0, &(*m_gpio)[0]); + adcon1.setIOPin(1, &(*m_gpio)[1]); + adcon1.setVoltRef(2, 0.6); + adcon1.setVoltRef(3, 0.6); + adcon1.setChannelConfiguration(0, 0x03); + adcon1.setChannelConfiguration(1, 0x03); + adcon1.setChannelConfiguration(2, 0x00); + adcon1.setChannelConfiguration(3, 0x00); + + adcon0.setChannel_Mask(3); + adcon0.setChannel_shift(2); + adcon0.setAdres(&adres); + adcon0.setAdresLow(0); + adcon0.setAdcon1(&adcon1); + adcon0.setA2DBits(8); +} + +//======================================================================== +Processor * P10F220::construct(const char *name) +{ + P10F220 *p = new P10F220(name); + + p->pc->set_reset_address(0xff); + p->create(); + + return p; +} +void P10F220::enter_sleep() +{ + uint val; + + _12bit_processor::enter_sleep(); + + status->put( status->get() & ~STATUS_GPWUF); + val = (adcon0.get() & ~(ADCON0_10::ADON|ADCON0_10::GO)) + | ADCON0_10::CHS1 | ADCON0_10::CHS0; + adcon0.put(val); +} + +void P10F220::exit_sleep() +{ + _12bit_processor::exit_sleep(); + + adcon0.put(adcon0.get() | ADCON0_10::ANS1 | ADCON0_10::ANS0); +} + +void P10F220::setConfigWord(uint val, uint diff) +{ + PinModule *pmGP3 = &(*m_gpio)[3]; + + configWord = val; + if (diff & WDTEN) wdt.initialize((val & WDTEN) == WDTEN); + + if ((val & MCLRE)) + { + if (!(val & NOT_MCPU)) pmGP3->getPin().update_pullup('1', true); + } + if ((val & IOSCFS)) set_frequency(8e6); +} +//======================================================================== +P10F222::P10F222(const char *_name, const char *desc) + : P10F220(_name,desc) +{ +} +P10F222::~P10F222() +{ + delete_file_registers(0x09, 0x0f); +} + +void P10F222::create() +{ + P10F220::create(); + add_file_registers(0x09, 0x0f, 0); // 10F222 has 23 bytes RAM +} + + +//======================================================================== +Processor * P10F222::construct(const char *name) +{ + P10F222 *p = new P10F222(name); + + p->pc->set_reset_address(0x1ff); + p->create(); + + return p; +} + +//======================================================================== +// P16F505 Config Word + +class P16F505ConfigWord : public ConfigWord +{ + public: + enum { + FOSC0 = 1<<0, + FOSC1 = 1<<1, + FOSC2 = 1<<2, + WDTEN = 1<<3, + CP = 1<<4, + MCLRE = 1<<5 + }; + + P16F505ConfigWord(P12bitBase *pCpu) + : ConfigWord("CONFIG", 0xfff, "Configuration Word", pCpu, 0xfff), + m_pCpu(pCpu) + { + assert(pCpu); + pCpu->wdt.initialize(true); + } + + virtual void set(int64_t v) + { + int64_t oldV = getVal(); + + Integer::set(v); + if (m_pCpu) { + int64_t diff = oldV ^ v; + m_pCpu->setConfigWord(v & 0x3ff, diff & 0x3ff); + } + } + + virtual string toString() + { + int64_t i64; + get(i64); + int i = i64 &0xfff; + + char buff[256]; + const char *src; + + switch(i&(FOSC0|FOSC1|FOSC2)) { + case 0: + src = "LP"; + break; + case 1: + src = "XT"; + break; + case 2: + src = "HS"; + break; + case 3: + src = "EC"; + break; + case 4: + src = "INTRCRB4"; + break; + case 5: + src = "INTRCCLK"; + break; + case 6: + src = "EXTRCRB4"; + break; + case 7: + src = "EXTRCCLK"; + break; + } + + snprintf(buff, sizeof(buff), + "$%3x\n" + " FOSC=%d - Clk source = %s\n" + " WDTEN=%d - WDT is %s\n" + " CP=%d - Code protect is %s\n" + " MCLRE=%d - /MCLR is %s", + i, + i & (FOSC0 | FOSC1), src, + ((i & WDTEN) ? 1 : 0), ((i & WDTEN) ? "enabled" : "disabled"), + ((i & CP) ? 1 : 0), ((i & CP) ? "enabled" : "disabled"), + ((i & MCLRE) ? 1 : 0), ((i & MCLRE) ? "enabled" : "disabled")); + return string(buff); + } + + private: + P12bitBase *m_pCpu; +}; + + +//======================================================================== +// P16F505 Implementation +P16F505::P16F505(const char *_name, const char *desc) + : P12bitBase(_name,desc) +{ + m_portb = new GPIO(this,"portb","I/O port",8,0x3f, 1<<3, 0x1B, 1<<5); + m_portc = new GPIO(this,"portc","I/O port",8,0x3f, 0, 0); + m_trisb = new PicTrisRegister(this,"trisb","Port Direction Control", m_portb, false); + m_trisc = new PicTrisRegister(this,"trisc","Port Direction Control", m_portc, false); + m_trisb->wdtr_value=RegisterValue(0x3f,0); + m_trisc->wdtr_value=RegisterValue(0x3f,0); + if (config_modes) + config_modes->valid_bits = config_modes->CM_FOSC0 | config_modes->CM_FOSC1 | + config_modes->CM_FOSC1x | config_modes->CM_WDTE | config_modes->CM_MCLRE; + +} + +P16F505::~P16F505() +{ + delete_sfr_register(m_portb); + delete_sfr_register(m_portc); + delete_sfr_register(m_trisb); + delete_sfr_register(m_trisc); + delete_file_registers(0x08, 0x1f); + delete_file_registers(0x30, 0x3f); + delete_file_registers(0x50, 0x5f); + delete_file_registers(0x70, 0x7f); +} + +Processor * P16F505::construct(const char *name) +{ + P16F505 *p = new P16F505(name); + + p->pc->set_reset_address(0x3ff); + p->create(); + + return p; +} + +void P16F505::create() +{ + create_iopin_map(); + + _12bit_processor::create(); + + add_file_registers(0x08, 0x1f, 0); + create_sfr_map(); + create_invalid_registers (); + + alias_file_registers(0x00,0x0f,0x20); + add_file_registers(0x30, 0x3f, 0); + + alias_file_registers(0x00,0x0f,0x40); + add_file_registers(0x50, 0x5f, 0); + + alias_file_registers(0x00,0x0f,0x60); + add_file_registers(0x70, 0x7f, 0); + + pa_bits = PA0; + indf->base_address_mask2 = 0x7F; + + tmr0.set_cpu(this,m_portc,5,option_reg); // T0CKI pin + tmr0.start(0); + + pc->reset(); +} + +void P16F505::create_iopin_map() +{ + package = new Package(14); + if(!package) return; + + package->assign_pin(1, 0); + package->assign_pin(2, m_portb->addPin(new IO_bi_directional("portb5"),5)); + package->assign_pin(3, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(4, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(5, m_portc->addPin(new IO_bi_directional("portc5"),5)); + package->assign_pin(6, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin(7, m_portc->addPin(new IO_bi_directional("portc3"),3)); + package->assign_pin(8, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin(9, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(10, m_portc->addPin(new IO_bi_directional("portc0"),0)); + package->assign_pin(11, m_portb->addPin(new IO_bi_directional("portb2"),2)); + package->assign_pin(12, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin(13, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin(14, 0); + + // portb3 is input only, but we want pullup, so use IO_bi_directional_pu + // but force as input pin disableing TRIS control + m_IN_SignalControl = new IN_SignalControl; + (&(*m_portb)[3])->setControl(m_IN_SignalControl); +} + +void P16F505::create_sfr_map() +{ + RegisterValue porVal(0,0); + + add_sfr_register(indf, 0, porVal); + add_sfr_register(&tmr0, 1, porVal); + add_sfr_register(pcl, 2, RegisterValue(0xff,0)); + add_sfr_register(status, 3, porVal); + add_sfr_register(fsr, 4, porVal); + add_sfr_register(&osccal,5, RegisterValue(0x70,0)); + add_sfr_register(m_portb,6, porVal); + add_sfr_register(m_portc,7, porVal); + add_sfr_register(m_trisb, 0xffffffff, RegisterValue(0x3f,0)); + add_sfr_register(m_trisc, 0xffffffff, RegisterValue(0x3f,0)); + add_sfr_register(Wreg, 0xffffffff, porVal); + option_reg->set_cpu(this); + + osccal.set_cpu(this); +} + +void P16F505::create_config_memory() +{ + m_configMemory = new ConfigMemory(this,1); + m_configMemory->addConfigWord(0,new P16F505ConfigWord(this)); +} + +void P16F505::tris_instruction(uint tris_register) +{ + if ( tris_register == 6 ) m_trisb->put(Wget()); + else if ( tris_register == 7 ) m_trisc->put(Wget()); +} + +void P16F505::setConfigWord(uint val, uint diff) +{ + PinModule *pmRB3 = &(*m_portb)[3]; + + configWord = val; + + if( diff & WDTEN ) wdt.initialize((val & WDTEN) == WDTEN); + + if( (val & MCLRE) == MCLRE ) pmRB3->getPin().update_pullup('1', true); +} + +void P16F505::updateGP2Source() +{ + PinModule *pmPC5 = &(*m_portc)[5]; + + if(option_reg->value.get() & OPTION_REG::T0CS) + { + printf("OPTION_REG::T0CS forcing PORTC5 as input, TRIS disabled\n"); + pmPC5->setControl(m_IN_SignalControl); + } + else + { + cout << "TRIS now controlling PORTC5\n"; + pmPC5->setControl(0); + } +} + +// option_new_bits_6_7 is called from class OPTION_REG when +// bits 5, 6, or 7 of OPTION_REG change state +// +void P16F505::option_new_bits_6_7(uint bits) +{ + bool bit6 = (bits & OPTION_REG::BIT6) != OPTION_REG::BIT6; + + // Weak pullup if NOT_GPPU == 0 + m_portb->setPullUp (bit6 , (configWord & MCLRE)); + updateGP2Source(); +} + +void P16F505::reset(RESET_TYPE r) +{ + m_trisb->reset(r); + m_trisc->reset(r); + + switch (r) + { + case IO_RESET: + // Set GPWUF/RBWUF flag + status->put(status->value.get() | 0x80); + + default: + _12bit_processor::reset(r); + } +} + +void P16F505::dump_registers () +{ + _12bit_processor::dump_registers(); + + cout << "trisb = 0x" << hex << m_trisb->value.get() << '\n'; + cout << "trisc = 0x" << hex << m_trisc->value.get() << '\n'; + cout << "osccal = 0x" << osccal.value.get() << '\n'; +} diff --git a/src/gpsim/devices/p12x.h b/src/gpsim/devices/p12x.h new file mode 100644 index 0000000..eec194c --- /dev/null +++ b/src/gpsim/devices/p12x.h @@ -0,0 +1,439 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __P12X_H__ +#define __P12X_H__ + +#include "12bit-processors.h" +#include "pic-ioports.h" +#include "a2dconverter.h" + + +class P12_I2C_EE; +class P12bitBase; + +class P12_OSCCON : public sfr_register +{ +public: + enum { + FOSC4 = 1 << 0 + }; + + P12_OSCCON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc), m_CPU(0) + { + } + + void put(uint new_value); + void set_cpu(P12bitBase *pCPU) { m_CPU = pCPU;} +private: + P12bitBase *m_CPU; +}; + + +class GPIO : public PicPortRegister +{ +public: + GPIO(P12bitBase *pCpu, const char *pName, const char *pDesc, + uint numIopins, + uint enableMask, + uint resetMask = (1 << 3), + uint wakeupMask = 0x0b, + uint configMaskMCLRE = (1<<4)); + void setbit(uint bit_number, char new_value); + void setPullUp ( bool bNewPU , bool mclr); + +private: + P12bitBase *m_CPU; + bool m_bPU; + uint m_resetMask; + uint m_wakeupMask; + uint m_configMaskMCLRE; +}; + +//-------------------------------------------------------- +/* + * IN_SignalControl is used to set a pin as input + * regardless of the setting to the TRIS register + */ +class IN_SignalControl : public SignalControl +{ +public: + IN_SignalControl(){ } + ~IN_SignalControl(){} + char getState() { return '1'; } + void release() { } +}; + +//-------------------------------------------------------- +/* + * OUT_SignalControl is used to set a pin as input + * regardless of the setting to the TRIS register + */ +class OUT_SignalControl : public SignalControl +{ +public: + OUT_SignalControl(){} + ~OUT_SignalControl(){} + char getState() { return '0'; } + void release() { } +}; + +//-------------------------------------------------------- +/* + * OUT_DriveControl is used to override output + * regardless of the setting to the GPIO register + */ +class OUT_DriveControl : public SignalControl +{ +public: + OUT_DriveControl(){} + ~OUT_DriveControl(){} + char getState() { return '1'; } + void release() { } +}; + +class P12bitBase : public _12bit_processor +{ +public: + GPIO *m_gpio; + PicTrisRegister *m_tris; + P12_OSCCON osccal; + + + virtual PROCESSOR_TYPE isa(){return _P12C508_;}; + + + virtual void enter_sleep(); + virtual void create_sfr_map(); + virtual void dump_registers(); + virtual void tris_instruction(uint tris_register); + virtual void reset(RESET_TYPE r); + + P12bitBase(const char *_name=0, const char *desc=0); + virtual ~P12bitBase(); + static Processor *construct(const char *name); + virtual void create_iopin_map(); + virtual void create_config_memory(); + + virtual uint fsr_valid_bits() + { + return 0x1f; // Assume only 32 register addresses + } + + virtual uint fsr_register_page_bits() + { + return 0; // Assume only one register page. + } + + + virtual void option_new_bits_6_7(uint); + + IN_SignalControl *m_IN_SignalControl; + OUT_SignalControl *m_OUT_SignalControl; + OUT_DriveControl *m_OUT_DriveControl; + + virtual void updateGP2Source(); + virtual void freqCalibration(); + virtual void setConfigWord(uint val, uint diff); + + + uint configWord; + +// bits of Configuration word + enum { + FOSC0 = 1<<0, + FOSC1 = 1<<1, + WDTEN = 1<<2, + CP = 1<<3, + MCLRE = 1<<4 + }; + + +}; + +class P12C508 : public P12bitBase +{ +public: + + P12C508(const char *_name=0, const char *desc=0); + virtual ~P12C508(); + static Processor *construct(const char *name); + virtual void create(); + virtual uint program_memory_size() const { return 0x200; } + +}; + +class P12F508 : public P12C508 +{ +public: + + P12F508(const char *_name=0, const char *desc=0); + virtual ~P12F508(); + static Processor *construct(const char *name); + virtual PROCESSOR_TYPE isa(){return _P12F508_;}; +}; + +// A 12c509 is like a 12c508 +class P12C509 : public P12C508 +{ + public: + + virtual PROCESSOR_TYPE isa(){return _P12C509_;}; + + virtual uint program_memory_size() const { return 0x400; }; + + virtual void create_sfr_map(); + + virtual uint fsr_valid_bits() + { + return 0x3f; // 64 registers in all (some are actually aliased) + } + + virtual uint fsr_register_page_bits() + { + return 0x20; // 509 has 2 register banks + } + + P12C509(const char *_name=0, const char *desc=0); + ~P12C509(); + static Processor *construct(const char *name); + virtual void create(); + + +}; + +class P12F509 : public P12C509 +{ +public: + P12F509(const char *_name=0, const char *desc=0); + virtual ~P12F509(); + static Processor *construct(const char *name); + virtual PROCESSOR_TYPE isa(){return _P12F509_;} +}; + +// 12F510 - like a '509, but has an A2D and a comparator. +class P12F510 : public P12F509 +{ +public: + P12F510(const char *_name=0, const char *desc=0); + virtual ~P12F510(); + static Processor *construct(const char *name); + virtual PROCESSOR_TYPE isa(){return _P12F510_;} +}; + +// A 12CE518 is like a 12c508 +class P12CE518 : public P12C508 +{ + public: + + virtual PROCESSOR_TYPE isa(){return _P12CE518_;}; + virtual void tris_instruction(uint tris_register); + + P12CE518(const char *_name=0, const char *desc=0); + ~P12CE518(); + static Processor *construct(const char *name); + virtual void create(); + virtual void create_iopin_map(); + virtual void freqCalibration(); + + private: + P12_I2C_EE *m_eeprom; + Stimulus_Node *scl; + Stimulus_Node *sda; + IO_bi_directional_pu *io_scl; + IO_open_collector *io_sda; + +}; + + +// A 12ce519 is like a 12ce518 +class P12CE519 : public P12CE518 +{ + public: + + virtual PROCESSOR_TYPE isa(){return _P12CE519_;}; + + virtual uint program_memory_size() const { return 0x400; }; + + virtual void create_sfr_map(); + + virtual uint fsr_valid_bits() + { + return 0x3f; // 64 registers in all (some are actually aliased) + } + + virtual uint fsr_register_page_bits() + { + return 0x20; // 519 has 2 register banks + } + + P12CE519(const char *_name=0, const char *desc=0); + ~P12CE519(); + static Processor *construct(const char *name); + virtual void create(); + + +}; + + + +// 10F200 +class P10F200 : public P12bitBase +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P10F200_;}; + virtual uint program_memory_size() const { return 0x100; }; + + P10F200(const char *_name=0, const char *desc=0); + virtual ~P10F200(); + + static Processor *construct(const char *name); + virtual void create(); + virtual void create_iopin_map(); + // GP2 can be driven by either FOSC/4, TMR 0, or the GP I/O driver + virtual void updateGP2Source(); + virtual void freqCalibration(); + // WDT causes reset on sleep + virtual bool exit_wdt_sleep() { return false; } + +}; + + +// A 10F202 is like a 10f200 +class P10F202 : public P10F200 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P10F202_;}; + virtual uint program_memory_size() const { return 0x200; }; + + P10F202(const char *_name=0, const char *desc=0); + ~P10F202(); + static Processor *construct(const char *name); + virtual void create(); + +}; + +class CMCON0; +// A 10F204 is like a 10f200 +class P10F204 : public P10F200 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P10F204_;}; + + P10F204(const char *_name=0, const char *desc=0); + ~P10F204(); + + static Processor *construct(const char *name); + virtual void create(); + // GP2 can be driven by either FOSC/4, COUT, TMR 0, or the GP I/O driver + virtual void updateGP2Source(); +protected: + CMCON0 *m_cmcon0; +}; + +// A 10F220 is based on 10f200 +class P10F220 : public P10F200 +{ +public: + + ADCON0_10 adcon0; + ADCON1 adcon1; + sfr_register adres; + + virtual PROCESSOR_TYPE isa(){return _P10F220_;}; + + P10F220(const char *_name=0, const char *desc=0); + ~P10F220(); + static Processor *construct(const char *name); + virtual void create(); + virtual void enter_sleep(); + virtual void exit_sleep(); + virtual void setConfigWord(uint val, uint diff); + +// Bits of configuration word + enum { + IOSCFS = 1<<0, + NOT_MCPU = 1<<1, + }; +protected: +}; + +// A 10F220 is like a 10f220 +class P10F222 : public P10F220 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P10F222_;}; + + P10F222(const char *_name=0, const char *desc=0); + ~P10F222(); + virtual uint program_memory_size() const { return 0x200; }; + static Processor *construct(const char *name); + virtual void create(); + // GP2 can be driven by either FOSC/4, TMR 0, or the GP I/O driver + //virtual void updateGP2Source(); +protected: +}; + +class P16F505 : public P12bitBase +{ +public: + enum { + FOSC0 = 1<<0, + FOSC1 = 1<<1, + FOSC2 = 1<<2, + WDTEN = 1<<3, + CP = 1<<4, + MCLRE = 1<<5 + }; + + P16F505(const char *_name=0, const char *desc=0); + virtual ~P16F505(); + + static Processor *construct(const char *name); + virtual PROCESSOR_TYPE isa() { return _P16F505_; }; + + virtual void create(); + + virtual void create_iopin_map(); + virtual void create_sfr_map(); + virtual void create_config_memory(); + virtual void tris_instruction(uint tris_register); + virtual void setConfigWord(uint val, uint diff); + virtual void updateGP2Source(); + virtual void option_new_bits_6_7(uint bits); + virtual void reset(RESET_TYPE r); + virtual void dump_registers(); + + virtual uint program_memory_size() const { return 0x400; } + virtual uint fsr_valid_bits() { return 0x7f; } + virtual uint fsr_register_page_bits() { return 0x60; } + + GPIO *m_portb; + GPIO *m_portc; + PicTrisRegister *m_trisb; + PicTrisRegister *m_trisc; +}; + +#endif // __P12X_H__ diff --git a/src/gpsim/devices/p16f1503.cc b/src/gpsim/devices/p16f1503.cc new file mode 100644 index 0000000..f4a4374 --- /dev/null +++ b/src/gpsim/devices/p16f1503.cc @@ -0,0 +1,763 @@ +/* + Copyright (C) 2013,2014,2017 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + + +// this processors have extended 14bit instructions + +#include +#include +#include + +#include "config.h" + +#include "stimuli.h" +#include "eeprom.h" +#include "p16f1503.h" +#include "pic-ioports.h" +#include "packages.h" +#include "apfcon.h" +#include "pir.h" + +//#define DEBUG +#if defined(DEBUG) +#include "config.h" +#define Dprintf(arg) {printf("%s:%d ",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + + +P16F1503::P16F1503(const char *_name, const char *desc) + : _14bit_e_processor(_name,desc), + comparator(this), + pie1(this,"pie1", "Peripheral Interrupt Enable"), + pie2(this,"pie2", "Peripheral Interrupt Enable"), + pie3(this,"pie3", "Peripheral Interrupt Enable"), + t2con(this, "t2con", "TMR2 Control"), + pr2(this, "pr2", "TMR2 Period Register"), + tmr2(this, "tmr2", "TMR2 Register"), + t1con_g(this, "t1con", "TMR1 Control Register"), + tmr1l(this, "tmr1l", "TMR1 Low"), + tmr1h(this, "tmr1h", "TMR1 High"), + fvrcon(this, "fvrcon", "Voltage reference control register", 0xbf, 0x40), + borcon(this, "borcon", "Brown-out reset control register"), + ansela(this, "ansela", "Analog Select port a"), + anselc(this, "anselc", "Analog Select port c"), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adcon2(this,"adcon2", "A2D Control 2"), + adresh(this,"adresh", "A2D Result High"), + adresl(this,"adresl", "A2D Result Low"), + osccon(0), + osctune(this, "osctune", "Oscillator Tunning Register"), + oscstat(this, "oscstat", "Oscillator Status Register"), + wdtcon(this, "wdtcon", "Watch dog timer control", 0x3f), + ssp(this), + apfcon1(this, "apfcon", "Alternate Pin Function Control Register", 0x3b), + pwm1con(this, "pwm1con", "PWM 1 Control Register", 0), + pwm1dcl(this, "pwm1dcl", "PWM 1 DUTY CYCLE LOW BITS"), + pwm1dch(this, "pwm1dch", "PWM 1 DUTY CYCLE HIGH BITS"), + pwm2con(this, "pwm2con", "PWM 2 Control Register", 1), + pwm2dcl(this, "pwm2dcl", "PWM 2 DUTY CYCLE LOW BITS"), + pwm2dch(this, "pwm2dch", "PWM 2 DUTY CYCLE HIGH BITS"), + pwm3con(this, "pwm3con", "PWM 3 Control Register", 2), + pwm3dcl(this, "pwm3dcl", "PWM 3 DUTY CYCLE LOW BITS"), + pwm3dch(this, "pwm3dch", "PWM 3 DUTY CYCLE HIGH BITS"), + pwm4con(this, "pwm4con", "PWM 4 Control Register", 3), + pwm4dcl(this, "pwm4dcl", "PWM 4 DUTY CYCLE LOW BITS"), + pwm4dch(this, "pwm4dch", "PWM 4 DUTY CYCLE HIGH BITS"), + cwg(this), nco(this), + clcdata(this, "clcdata", "CLC Data Output"), + clc1(this, 0, &clcdata), clc2(this, 1, &clcdata), + frc(600000., CLC::FRC_IN), + lfintosc(32000., CLC::LFINTOSC), // 32kHz is within tolerance or 31kHz + hfintosc(16e6, CLC::HFINTOSC), + vregcon(this, "vregcon", "Voltage Regulator Control Register") +{ + m_portc= new PicPortBRegister(this,"portc","", intcon, 8,0x3f); + m_trisc = new PicTrisRegister(this,"trisc","", m_portc, false, 0x3f); + m_latc = new PicLatchRegister(this,"latc","",m_portc, 0x3f); + + + m_iocaf = new IOCxF(this, "iocaf", "Interrupt-On-Change flag Register", 0x3f); + m_iocap = new IOC(this, "iocap", "Interrupt-On-Change positive edge", 0x3f); + m_iocan = new IOC(this, "iocan", "Interrupt-On-Change negative edge", 0x3f); + m_porta= new PicPortIOCRegister(this,"porta","", intcon, m_iocap, m_iocan, m_iocaf, 8,0x3f); + m_trisa = new PicTrisRegister(this,"trisa","", m_porta, false, 0x37); + m_lata = new PicLatchRegister(this,"lata","",m_porta, 0x37); + m_wpua = new WPU(this, "wpua", "Weak Pull-up Register", m_porta, 0x3f); + m_daccon0 = new DACCON0(this, "daccon0", "DAC1 8bit Voltage reference register 0", 0xb4, 32); + m_daccon1 = new DACCON1(this, "daccon1", "DAC1 8bit Voltage reference register 1", 0xff, m_daccon0); + m_cpu_temp = new CPU_Temp("cpu_temperature", 30., "CPU die temperature"); + + + tmr0.set_cpu(this, m_porta, 4, &option_reg); + tmr0.start(0); + tmr0.set_t1gcon(&t1con_g.t1gcon); + set_mclr_pin(4); + + ((INTCON_14_PIR *)intcon)->write_mask = 0xfe; + + + pir1 = new PIR1v1822(this,"pir1","Peripheral Interrupt Register",intcon, &pie1); + pir2 = new PIR2v1822(this,"pir2","Peripheral Interrupt Register",intcon, &pie2); + pir3 = new PIR3v178x(this,"pir3","Peripheral Interrupt Register",intcon, &pie3); + + pir1->valid_bits = pir1->writable_bits = 0xcb; + pir2->valid_bits = pir2->writable_bits = 0x6c; + pir3->valid_bits = pir3->writable_bits = 0x03; + + comparator.cmxcon0[0] = new CMxCON0(this, "cm1con0", " Comparator C1 Control Register 0", 0, &comparator); + comparator.cmxcon1[0] = new CMxCON1(this, "cm1con1", " Comparator C1 Control Register 1", 0, &comparator); + comparator.cmout = new CMOUT(this, "cmout", "Comparator Output Register"); + comparator.cmxcon0[1] = new CMxCON0(this, "cm2con0", " Comparator C2 Control Register 0", 1, &comparator); + comparator.cmxcon1[1] = new CMxCON1(this, "cm2con1", " Comparator C2 Control Register 1", 1, &comparator); +} + +P16F1503::~P16F1503() +{ + unassignMCLRPin(); + delete_file_registers(0x20, 0x7f); + delete_file_registers(0xa0, 0xbf); + + delete_sfr_register(m_iocap); + delete_sfr_register(m_iocan); + delete_sfr_register(m_iocaf); + delete_sfr_register(m_daccon0); + delete_sfr_register(m_daccon1); + + delete_sfr_register(m_trisa); + delete_sfr_register(m_porta); + delete_sfr_register(m_lata); + delete_sfr_register(m_wpua); + delete_sfr_register(m_portc); + delete_sfr_register(m_trisc); + delete_sfr_register(m_latc); + + remove_sfr_register(&clcdata); + remove_sfr_register(&clc1.clcxcon); + remove_sfr_register(&clc1.clcxpol); + remove_sfr_register(&clc1.clcxsel0); + remove_sfr_register(&clc1.clcxsel1); + remove_sfr_register(&clc1.clcxgls0); + remove_sfr_register(&clc1.clcxgls1); + remove_sfr_register(&clc1.clcxgls2); + remove_sfr_register(&clc1.clcxgls3); + remove_sfr_register(&clc2.clcxcon); + remove_sfr_register(&clc2.clcxpol); + remove_sfr_register(&clc2.clcxsel0); + remove_sfr_register(&clc2.clcxsel1); + remove_sfr_register(&clc2.clcxgls0); + remove_sfr_register(&clc2.clcxgls1); + remove_sfr_register(&clc2.clcxgls2); + remove_sfr_register(&clc2.clcxgls3); + remove_sfr_register(&tmr0); + + remove_sfr_register(&tmr1l); + remove_sfr_register(&tmr1h); + remove_sfr_register(&t1con_g); + remove_sfr_register(&t1con_g.t1gcon); + + remove_sfr_register(&tmr2); + remove_sfr_register(&pr2); + remove_sfr_register(&t2con); + remove_sfr_register(&ssp.sspbuf); + remove_sfr_register(&ssp.sspadd); + remove_sfr_register(ssp.sspmsk); + remove_sfr_register(&ssp.sspstat); + remove_sfr_register(&ssp.sspcon); + remove_sfr_register(&ssp.sspcon2); + remove_sfr_register(&ssp.ssp1con3); + remove_sfr_register(&pwm1con); + remove_sfr_register(&pwm1dcl); + remove_sfr_register(&pwm1dch); + remove_sfr_register(&pwm2con); + remove_sfr_register(&pwm2dcl); + remove_sfr_register(&pwm2dch); + remove_sfr_register(&pwm3con); + remove_sfr_register(&pwm3dcl); + remove_sfr_register(&pwm3dch); + remove_sfr_register(&pwm4con); + remove_sfr_register(&pwm4dcl); + remove_sfr_register(&pwm4dch); +// RRR remove_sfr_register(&pstr1con); + remove_sfr_register(&pie1); + remove_sfr_register(&pie2); + remove_sfr_register(&pie3); + remove_sfr_register(&adresl); + remove_sfr_register(&adresh); + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&adcon2); + remove_sfr_register(&borcon); + remove_sfr_register(&fvrcon); + remove_sfr_register(&apfcon1); + remove_sfr_register(&ansela); + remove_sfr_register(&anselc); + remove_sfr_register(&vregcon); + remove_sfr_register(&ssp.sspbuf); + remove_sfr_register(&ssp.sspadd); + remove_sfr_register(ssp.sspmsk); + remove_sfr_register(&ssp.sspstat); + remove_sfr_register(&ssp.sspcon); + remove_sfr_register(&ssp.sspcon2); + remove_sfr_register(&ssp.ssp1con3); + remove_sfr_register(&nco.nco1accl); + remove_sfr_register(&nco.nco1acch); + remove_sfr_register(&nco.nco1accu); + remove_sfr_register(&nco.nco1incl); + remove_sfr_register(&nco.nco1inch); + remove_sfr_register(&nco.nco1con); + remove_sfr_register(&nco.nco1clk); + remove_sfr_register(&cwg.cwg1con0); + remove_sfr_register(&cwg.cwg1con1); + remove_sfr_register(&cwg.cwg1con2); + remove_sfr_register(&cwg.cwg1dbr); + remove_sfr_register(&cwg.cwg1dbf); + + +//RRR remove_sfr_register(&pstr1con); + remove_sfr_register(&option_reg); + remove_sfr_register(osccon); + remove_sfr_register(&oscstat); + + remove_sfr_register(comparator.cmxcon0[0]); + remove_sfr_register(comparator.cmxcon1[0]); + remove_sfr_register(comparator.cmout); + remove_sfr_register(comparator.cmxcon0[1]); + remove_sfr_register(comparator.cmxcon1[1]); + delete_sfr_register(pir1); + delete_sfr_register(pir2); + delete_sfr_register(pir3); + delete e; + delete m_cpu_temp; +} + +void P16F1503::create_iopin_map() +{ + package = new Package(14); + if(!package) + return; + + //createMCLRPin(1); + // Now Create the package and place the I/O pins + package->assign_pin(1, 0); //Vdd + package->assign_pin(2, m_porta->addPin(new IO_bi_directional_pu("porta5"),5)); + package->assign_pin(3, m_porta->addPin(new IO_bi_directional_pu("porta4"),4)); + package->assign_pin(4, m_porta->addPin(new IO_bi_directional_pu("porta3"),3)); + package->assign_pin(5, m_portc->addPin(new IO_bi_directional_pu("portc5"),5)); + package->assign_pin(6, m_portc->addPin(new IO_bi_directional_pu("portc4"),4)); + package->assign_pin(7, m_portc->addPin(new IO_bi_directional_pu("portc3"),3)); + + package->assign_pin(8, m_portc->addPin(new IO_bi_directional_pu("portc2"),2)); + package->assign_pin(9, m_portc->addPin(new IO_bi_directional_pu("portc1"),1)); + package->assign_pin(10, m_portc->addPin(new IO_bi_directional_pu("portc0"),0)); + + package->assign_pin(11, m_porta->addPin(new IO_bi_directional_pu("porta2"),2)); + package->assign_pin(12, m_porta->addPin(new IO_bi_directional_pu("porta1"),1)); + package->assign_pin(13, m_porta->addPin(new IO_bi_directional_pu("porta0"),0)); + package->assign_pin(14, 0); // Vss +} + +void P16F1503::create_sfr_map() +{ + pir_set_2_def.set_pir1(pir1); + pir_set_2_def.set_pir2(pir2); + pir_set_2_def.set_pir3(pir3); + + + add_file_registers(0x20, 0x7f, 0x00); + add_file_registers(0xa0, 0xbf, 0x00); + + add_sfr_register(m_porta, 0x0c); + add_sfr_register(m_portc, 0x0e); + add_sfr_registerR(pir1, 0x11, RegisterValue(0,0),"pir1"); + add_sfr_registerR(pir2, 0x12, RegisterValue(0,0),"pir2"); + add_sfr_registerR(pir3, 0x13, RegisterValue(0,0),"pir3"); + add_sfr_register(&tmr0, 0x15); + + add_sfr_register(&tmr1l, 0x16, RegisterValue(0,0),"tmr1l"); + add_sfr_register(&tmr1h, 0x17, RegisterValue(0,0),"tmr1h"); + add_sfr_register(&t1con_g, 0x18, RegisterValue(0,0)); + add_sfr_register(&t1con_g.t1gcon, 0x19, RegisterValue(0,0)); + + add_sfr_registerR(&tmr2, 0x1a, RegisterValue(0,0)); + add_sfr_registerR(&pr2, 0x1b, RegisterValue(0,0)); + add_sfr_registerR(&t2con, 0x1c, RegisterValue(0,0)); + + + add_sfr_register(m_trisa, 0x8c, RegisterValue(0x3f,0)); + add_sfr_register(m_trisc, 0x8e, RegisterValue(0x3f,0)); + + pcon.valid_bits = 0xcf; + add_sfr_register(&option_reg, 0x95, RegisterValue(0xff,0)); + add_sfr_registerR(osccon, 0x99, RegisterValue(0x38,0)); + add_sfr_register(&oscstat, 0x9a, RegisterValue(0,0)); + + intcon_reg.set_pir_set(get_pir_set()); + + + tmr1l.tmrh = &tmr1h; + tmr1l.t1con = &t1con_g; + tmr1l.setInterruptSource(new InterruptSource(pir1, PIR1v1::TMR1IF)); + + tmr1h.tmrl = &tmr1l; + t1con_g.tmrl = &tmr1l; + t1con_g.t1gcon.set_tmrl(&tmr1l); + t1con_g.t1gcon.setInterruptSource(new InterruptSource(pir1, PIR1v1822::TMR1IF)); + + tmr1l.setIOpin(&(*m_porta)[5]); + t1con_g.t1gcon.setGatepin(&(*m_porta)[3]); + + add_sfr_registerR(&pie1, 0x91, RegisterValue(0,0)); + add_sfr_registerR(&pie2, 0x92, RegisterValue(0,0)); + add_sfr_registerR(&pie3, 0x93, RegisterValue(0,0)); + add_sfr_register(&adresl, 0x9b); + add_sfr_register(&adresh, 0x9c); + add_sfr_registerR(&adcon0, 0x9d, RegisterValue(0x00,0)); + add_sfr_registerR(&adcon1, 0x9e, RegisterValue(0x00,0)); + add_sfr_registerR(&adcon2, 0x9f, RegisterValue(0x00,0)); + + add_sfr_register(m_lata, 0x10c); + add_sfr_register(m_latc, 0x10e); + add_sfr_registerR(comparator.cmxcon0[0], 0x111, RegisterValue(0x04,0)); + add_sfr_registerR(comparator.cmxcon1[0], 0x112, RegisterValue(0x00,0)); + add_sfr_registerR(comparator.cmxcon0[1], 0x113, RegisterValue(0x04,0)); + add_sfr_registerR(comparator.cmxcon1[1], 0x114, RegisterValue(0x00,0)); + add_sfr_registerR(comparator.cmout, 0x115, RegisterValue(0x00,0)); + add_sfr_register(&borcon, 0x116, RegisterValue(0x80,0)); + add_sfr_register(&fvrcon, 0x117, RegisterValue(0x00,0)); + add_sfr_registerR(m_daccon0, 0x118, RegisterValue(0x00,0)); + add_sfr_registerR(m_daccon1, 0x119, RegisterValue(0x00,0)); + add_sfr_registerR(&apfcon1 , 0x11d, RegisterValue(0x00,0)); + add_sfr_registerR(&ansela, 0x18c, RegisterValue(0x17,0)); + add_sfr_registerR(&anselc, 0x18e, RegisterValue(0x0f,0)); + get_eeprom()->get_reg_eedata()->new_name("pmdatl"); + get_eeprom()->get_reg_eedatah()->new_name("pmdath"); + add_sfr_registerR(get_eeprom()->get_reg_eeadr(), 0x191, RegisterValue(0,0), "pmadrl"); + add_sfr_registerR(get_eeprom()->get_reg_eeadrh(), 0x192, RegisterValue(0,0), "pmadrh"); + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x193); + add_sfr_register(get_eeprom()->get_reg_eedatah(), 0x194); + get_eeprom()->get_reg_eecon1()->set_always_on(1<<7); + add_sfr_registerR(get_eeprom()->get_reg_eecon1(), 0x195, RegisterValue(0x80,0), "pmcon1"); + add_sfr_registerR(get_eeprom()->get_reg_eecon2(), 0x196, RegisterValue(0,0), "pmcon2"); + add_sfr_registerR(&vregcon, 0x197, RegisterValue(1,0)); + + add_sfr_register(m_wpua, 0x20c, RegisterValue(0xff,0),"wpua"); + + add_sfr_registerR(&ssp.sspbuf, 0x211, RegisterValue(0,0),"ssp1buf"); + add_sfr_registerR(&ssp.sspadd, 0x212, RegisterValue(0,0),"ssp1add"); + add_sfr_registerR(ssp.sspmsk, 0x213, RegisterValue(0xff,0),"ssp1msk"); + add_sfr_registerR(&ssp.sspstat, 0x214, RegisterValue(0,0),"ssp1stat"); + add_sfr_registerR(&ssp.sspcon, 0x215, RegisterValue(0,0),"ssp1con"); + add_sfr_registerR(&ssp.sspcon2, 0x216, RegisterValue(0,0),"ssp1con2"); + add_sfr_registerR(&ssp.ssp1con3, 0x217, RegisterValue(0,0),"ssp1con3"); + +// add_sfr_register(&pstr1con, 0x296, RegisterValue(1,0)); + + add_sfr_registerR(m_iocap, 0x391, RegisterValue(0,0),"iocap"); + add_sfr_registerR(m_iocan, 0x392, RegisterValue(0,0),"iocan"); + add_sfr_registerR(m_iocaf, 0x393, RegisterValue(0,0),"iocaf"); + m_iocaf->set_intcon(intcon); + + add_sfr_registerR(&nco.nco1accl, 0x498, RegisterValue(0,0)); + add_sfr_registerR(&nco.nco1acch, 0x499, RegisterValue(0,0)); + add_sfr_registerR(&nco.nco1accu, 0x49a, RegisterValue(0,0)); + add_sfr_registerR(&nco.nco1incl, 0x49b, RegisterValue(1,0)); + add_sfr_registerR(&nco.nco1inch, 0x49c, RegisterValue(0,0)); + add_sfr_registerR(&nco.nco1con, 0x49e, RegisterValue(0,0)); + add_sfr_registerR(&nco.nco1clk, 0x49f, RegisterValue(0,0)); + + nco.setIOpins(&(*m_porta)[5], &(*m_portc)[1]); + nco.m_NCOif = new InterruptSource(pir2, 4); + nco.set_clc(&clc1, 0); + nco.set_clc(&clc2, 1); + nco.set_cwg(&cwg); + + + add_sfr_registerR(&pwm1dcl, 0x611, RegisterValue(0,0)); + add_sfr_register(&pwm1dch, 0x612, RegisterValue(0,0)); + add_sfr_registerR(&pwm1con, 0x613, RegisterValue(0,0)); + add_sfr_registerR(&pwm2dcl, 0x614, RegisterValue(0,0)); + add_sfr_register(&pwm2dch, 0x615, RegisterValue(0,0)); + add_sfr_registerR(&pwm2con, 0x616, RegisterValue(0,0)); + add_sfr_registerR(&pwm3dcl, 0x617, RegisterValue(0,0)); + add_sfr_register(&pwm3dch, 0x618, RegisterValue(0,0)); + add_sfr_registerR(&pwm3con, 0x619, RegisterValue(0,0)); + add_sfr_registerR(&pwm4dcl, 0x61a, RegisterValue(0,0)); + add_sfr_register(&pwm4dch, 0x61b, RegisterValue(0,0)); + add_sfr_registerR(&pwm4con, 0x61c, RegisterValue(0,0)); + + add_sfr_registerR(&cwg.cwg1dbr, 0x691); + add_sfr_register(&cwg.cwg1dbf, 0x692); + add_sfr_registerR(&cwg.cwg1con0, 0x693, RegisterValue(0,0)); + add_sfr_registerR(&cwg.cwg1con1, 0x694); + add_sfr_registerR(&cwg.cwg1con2, 0x695); + + add_sfr_registerR(&clcdata, 0xf0f, RegisterValue(0,0)); + add_sfr_registerR(&clc1.clcxcon, 0xf10, RegisterValue(0,0), "clc1con"); + add_sfr_register(&clc1.clcxpol, 0xf11, RegisterValue(0,0), "clc1pol"); + add_sfr_register(&clc1.clcxsel0, 0xf12, RegisterValue(0,0), "clc1sel0"); + add_sfr_register(&clc1.clcxsel1, 0xf13, RegisterValue(0,0), "clc1sel1"); + add_sfr_register(&clc1.clcxgls0, 0xf14, RegisterValue(0,0), "clc1gls0"); + add_sfr_register(&clc1.clcxgls1, 0xf15, RegisterValue(0,0), "clc1gls1"); + add_sfr_register(&clc1.clcxgls2, 0xf16, RegisterValue(0,0), "clc1gls2"); + add_sfr_register(&clc1.clcxgls3, 0xf17, RegisterValue(0,0), "clc1gls3"); + add_sfr_registerR(&clc2.clcxcon, 0xf18, RegisterValue(0,0), "clc2con"); + add_sfr_register(&clc2.clcxpol, 0xf19, RegisterValue(0,0), "clc2pol"); + add_sfr_register(&clc2.clcxsel0, 0xf1a, RegisterValue(0,0), "clc2sel0"); + add_sfr_register(&clc2.clcxsel1, 0xf1b, RegisterValue(0,0), "clc2sel1"); + add_sfr_register(&clc2.clcxgls0, 0xf1c, RegisterValue(0,0), "clc2gls0"); + add_sfr_register(&clc2.clcxgls1, 0xf1d, RegisterValue(0,0), "clc2gls1"); + add_sfr_register(&clc2.clcxgls2, 0xf1e, RegisterValue(0,0), "clc2gls2"); + add_sfr_register(&clc2.clcxgls3, 0xf1f, RegisterValue(0,0), "clc2gls3"); + + clc1.frc = &frc; + clc2.frc = &frc; + clc1.lfintosc = &lfintosc; + clc2.lfintosc = &lfintosc; + clc1.hfintosc = &hfintosc; + clc2.hfintosc = &hfintosc; + clc1.p_nco = &nco; + clcdata.set_clc(&clc1, &clc2); + frc.set_clc(&clc1, &clc2); + lfintosc.set_clc(&clc1, &clc2); + hfintosc.set_clc(&clc1, &clc2); + tmr0.set_clc(&clc1, 0); + tmr0.set_clc(&clc2, 1); + t1con_g.tmrl->m_clc[0] = tmr2.m_clc[0] = &clc1; + t1con_g.tmrl->m_clc[1] = tmr2.m_clc[1] = &clc2; + comparator.m_clc[0] = &clc1; + comparator.m_clc[1] = &clc2; + + clc1.set_clcPins(&(*m_porta)[3], &(*m_portc)[4], &(*m_porta)[2]); + clc2.set_clcPins(&(*m_portc)[3], &(*m_porta)[5], &(*m_portc)[0]); + clc1.setInterruptSource(new InterruptSource(pir3, 1)); + clc2.setInterruptSource(new InterruptSource(pir3, 2)); + + tmr2.ssp_module[0] = &ssp; + + ssp.initialize( + get_pir_set(), // PIR + &(*m_portc)[0], // SCK + &(*m_portc)[3], // SS + &(*m_portc)[2], // SDO + &(*m_portc)[1], // SDI + m_trisc, // i2c tris port + SSP_TYPE_MSSP1 + ); + apfcon1.set_ValidBits(0x3b); + apfcon1.set_pins(0, &nco, NCO::NCOout_PIN, &(*m_portc)[1], &(*m_porta)[4]); //NCO + apfcon1.set_pins(1, &clc1, CLC::CLCout_PIN, &(*m_porta)[2], &(*m_portc)[5]); //CLC + apfcon1.set_pins(3, &t1con_g.t1gcon, 0, &(*m_porta)[4], &(*m_porta)[3]); //tmr1 gate + apfcon1.set_pins(4, &ssp, SSP1_MODULE::SS_PIN, &(*m_portc)[3], &(*m_porta)[3]); //SSP SS + apfcon1.set_pins(5, &ssp, SSP1_MODULE::SDO_PIN, &(*m_portc)[2], &(*m_porta)[4]); //SSP SDO + + if (pir1) + { + pir1->set_intcon(intcon); + pir1->set_pie(&pie1); + } + pie1.setPir(pir1); + pie2.setPir(pir2); + pie3.setPir(pir3); + t2con.tmr2 = &tmr2; + tmr2.pir_set = get_pir_set(); + tmr2.pr2 = &pr2; + tmr2.t2con = &t2con; + tmr2.add_ccp ( &pwm1con ); + tmr2.add_ccp ( &pwm2con ); + tmr2.add_ccp ( &pwm3con ); + tmr2.add_ccp ( &pwm4con ); + + pr2.tmr2 = &tmr2; + + pwm1con.set_pwmdc(&pwm1dcl, &pwm1dch); + pwm1con.setIOPin1(&(*m_portc)[5]); + pwm1con.set_tmr2(&tmr2); + pwm1con.set_cwg(&cwg); + pwm1con.set_clc(&clc1, 0); + pwm1con.set_clc(&clc2, 1); + pwm2con.set_pwmdc(&pwm2dcl, &pwm2dch); + pwm2con.setIOPin1(&(*m_portc)[3]); + pwm2con.set_tmr2(&tmr2); + pwm2con.set_cwg(&cwg); + pwm2con.set_clc(&clc1, 0); + pwm2con.set_clc(&clc2, 1); + pwm3con.set_pwmdc(&pwm3dcl, &pwm3dch); + pwm3con.setIOPin1(&(*m_porta)[2]); + pwm3con.set_tmr2(&tmr2); + pwm3con.set_cwg(&cwg); + pwm3con.set_clc(&clc1, 0); + pwm3con.set_clc(&clc2, 1); + pwm4con.set_pwmdc(&pwm4dcl, &pwm4dch); + pwm4con.setIOPin1(&(*m_portc)[1]); + pwm4con.set_tmr2(&tmr2); + pwm4con.set_cwg(&cwg); + pwm4con.set_clc(&clc1, 0); + pwm4con.set_clc(&clc2, 1); + + cwg.set_IOpins(&(*m_portc)[5], &(*m_portc)[4], &(*m_porta)[2]); + + ansela.config(0x17, 0); + ansela.setValidBits(0x17); + ansela.setAdcon1(&adcon1); + + anselc.config(0x0f, 4); + anselc.setValidBits(0x0f); + anselc.setAdcon1(&adcon1); + ansela.setAnsel(&anselc); + anselc.setAnsel(&ansela); + + adcon0.setAdresLow(&adresl); + adcon0.setAdres(&adresh); + adcon0.setAdcon1(&adcon1); + // adcon0.setAdcon2(&adcon2); + adcon0.setIntcon(intcon); + adcon0.setA2DBits(10); + adcon0.setPir(pir1); + adcon0.setChannel_Mask(0x1f); + adcon0.setChannel_shift(2); + adcon0.setGo(1); + adcon2.setAdcon0(&adcon0); + + tmr0.set_adcon2(&adcon2); + + adcon1.setAdcon0(&adcon0); + adcon1.setNumberOfChannels(32); // not all channels are used + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[4]); + adcon1.setIOPin(4, &(*m_portc)[0]); + adcon1.setIOPin(5, &(*m_portc)[1]); + adcon1.setIOPin(6, &(*m_portc)[2]); + adcon1.setIOPin(7, &(*m_portc)[3]); + adcon1.setValidBits(0xf7); + adcon1.setVrefHiConfiguration(0, 0); + //RRR adcon1.setVrefLoConfiguration(0, 2); + adcon1.set_FVR_chan(0x1f); + + comparator.cmxcon1[0]->set_INpinNeg(&(*m_porta)[0], &(*m_portc)[1], &(*m_portc)[2], &(*m_portc)[3]); + comparator.cmxcon1[1]->set_INpinNeg(&(*m_porta)[0], &(*m_portc)[1], &(*m_portc)[2], &(*m_portc)[3]); + comparator.cmxcon1[0]->set_INpinPos(&(*m_porta)[0]); + comparator.cmxcon1[1]->set_INpinPos(&(*m_portc)[0]); + + comparator.cmxcon1[0]->set_OUTpin(&(*m_porta)[2]); + comparator.cmxcon1[1]->set_OUTpin(&(*m_portc)[4]); + comparator.cmxcon0[0]->setBitMask(0xbf); + comparator.cmxcon0[0]->setIntSrc(new InterruptSource(pir2, (1<<5))); + comparator.cmxcon0[1]->setBitMask(0xbf); + comparator.cmxcon0[1]->setIntSrc(new InterruptSource(pir2, (1<<6))); + comparator.cmxcon1[0]->setBitMask(0xff); + comparator.cmxcon1[1]->setBitMask(0xff); + + comparator.assign_pir_set(get_pir_set()); + comparator.assign_t1gcon(&t1con_g.t1gcon); + fvrcon.set_adcon1(&adcon1); + fvrcon.set_daccon0(m_daccon0); + fvrcon.set_cmModule(&comparator); + fvrcon.set_VTemp_AD_chan(0x1d); + fvrcon.set_FVRAD_AD_chan(0x1f); + + m_daccon0->set_adcon1(&adcon1); + m_daccon0->set_cmModule(&comparator); + m_daccon0->set_FVRCDA_AD_chan(0x1e); + m_daccon0->setDACOUT(&(*m_porta)[0], &(*m_porta)[2]); + + + + osccon->set_osctune(&osctune); + osccon->set_oscstat(&oscstat); + osctune.set_osccon((OSCCON *)osccon); + osccon->write_mask = 0xfb; +} + +void P16F1503::set_out_of_range_pm(uint address, uint value) +{ + + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + get_eeprom()->change_rom(address - 0x2100, value); +} + +void P16F1503::create(int ram_top, int dev_id) +{ + + create_iopin_map(); + + osccon = new OSCCON_2(this, "osccon", "Oscillator Control Register"); + + e = new EEPROM_EXTND(this, pir2); + set_eeprom(e); + e->initialize(0, 16, 16, 0x8000, true); + e->set_intcon(intcon); + e->get_reg_eecon1()->set_valid_bits(0x7f); + + + pic_processor::create(); + + P16F1503::create_sfr_map(); + _14bit_e_processor::create_sfr_map(); + // Set DeviceID + if (m_configMemory && m_configMemory->getConfigWord(6)) + m_configMemory->getConfigWord(6)->set(dev_id); +} + +void P16F1503::enter_sleep() +{ + if (wdt_flag == 2) // WDT is suspended during sleep + wdt.initialize(false); + else if (get_pir_set()->interrupt_status() ) + { + pc->increment(); + return; + } + + tmr1l.sleep(); + osccon->sleep(); + tmr0.sleep(); + nco.sleep(true); + pic_processor::enter_sleep(); +} + +void P16F1503::exit_sleep() +{ + if (m_ActivityState == ePASleeping) + { + tmr1l.wake(); + osccon->wake(); + nco.sleep(false); + _14bit_e_processor::exit_sleep(); + } +} + +void P16F1503::option_new_bits_6_7(uint bits) +{ + Dprintf(("P16F1503::option_new_bits_6_7 bits=%x\n", bits)); + m_porta->setIntEdge ( (bits & OPTION_REG::BIT6) == OPTION_REG::BIT6); + m_wpua->set_wpu_pu ( (bits & OPTION_REG::BIT7) != OPTION_REG::BIT7); +} + +void P16F1503::oscillator_select(uint cfg_word1, bool clkout) +{ + uint mask = 0x1f; + + uint fosc = cfg_word1 & (FOSC0|FOSC1|FOSC2); + + osccon->set_config_irc(fosc == 4); + osccon->set_config_xosc(fosc < 3); + osccon->set_config_ieso(cfg_word1 & IESO); + set_int_osc(false); + switch(fosc) + { + case 0: //LP oscillator: low power crystal + case 1: //XT oscillator: Crystal/resonator + case 2: //HS oscillator: High-speed crystal/resonator + mask = 0x0f; + break; + + case 3: //EXTRC oscillator External RC circuit connected to CLKIN pin + mask = 0x1f; + if(clkout) mask = 0x0f; + break; + + case 4: //INTOSC oscillator: I/O function on CLKIN pin + set_int_osc(true); + mask = 0x3f; + if(clkout) mask = 0x2f; + + break; + + case 5: //ECL: External Clock, Low-Power mode (0-0.5 MHz): on CLKIN pin + mask = 0x1f; + if(clkout) mask = 0x0f; + break; + + case 6: //ECM: External Clock, Medium-Power mode (0.5-4 MHz): on CLKIN pin + mask = 0x1f; + if(clkout) mask = 0x0f; + break; + + case 7: //ECH: External Clock, High-Power mode (4-32 MHz): on CLKIN pin + mask = 0x1f; + if(clkout) mask = 0x0f; + break; + }; + ansela.setValidBits(0x17 & mask); + m_porta->setEnableMask(mask); +} + +void P16F1503::program_memory_wp(uint mode) +{ + switch(mode) + { + case 3: // no write protect + get_eeprom()->set_prog_wp(0x0); + break; + + case 2: // write protect 0000-01ff + get_eeprom()->set_prog_wp(0x0200); + break; + + case 1: // write protect 0000-03ff + get_eeprom()->set_prog_wp(0x0400); + break; + + case 0: // write protect 0000-07ff + get_eeprom()->set_prog_wp(0x0800); + break; + + default: + printf("%s unexpected mode %u\n", __FUNCTION__, mode); + break; + } +} + +Processor * P16F1503::construct(const char *name) +{ + P16F1503 *p = new P16F1503(name); + + p->create(2048, 0x2ce0); + p->create_invalid_registers (); + + return p; +} + +//======================================================================== + +P16LF1503::P16LF1503(const char *_name, const char *desc) + : P16F1503(_name,desc) +{ +} + +Processor * P16LF1503::construct(const char *name) +{ + P16LF1503 *p = new P16LF1503(name); + + p->create(2048, 0x2da0); + p->create_invalid_registers (); + + return p; +} diff --git a/src/gpsim/devices/p16f1503.h b/src/gpsim/devices/p16f1503.h new file mode 100644 index 0000000..9e7b6e8 --- /dev/null +++ b/src/gpsim/devices/p16f1503.h @@ -0,0 +1,156 @@ +/* + Copyright (C) 2013,2014,2017 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +#ifndef __P16F1503_H__ +#define __P16F1503_H__ + +#include "14bit-processors.h" +#include "14bit-tmrs.h" +#include "intcon.h" +#include "pir.h" +#include "pie.h" +#include "eeprom.h" +#include "comparator.h" +#include "a2dconverter.h" +#include "pic-ioports.h" +#include "dsm_module.h" +#include "cwg.h" +#include "nco.h" +#include "clc.h" +#include "apfcon.h" + +#define FOSC0 (1<<0) +#define FOSC1 (1<<1) +#define FOSC2 (1<<2) +#define IESO (1<<12) + + +class P16F1503 : public _14bit_e_processor +{ + public: + ComparatorModule2 comparator; + PIR_SET_2 pir_set_2_def; + PIE pie1; + PIR *pir1; + PIE pie2; + PIR *pir2; + PIE pie3; + PIR *pir3; + T2CON_64 t2con; + PR2 pr2; + TMR2 tmr2; + T1CON_G t1con_g; + TMRL tmr1l; + TMRH tmr1h; + FVRCON fvrcon; + BORCON borcon; + ANSEL_P ansela; + ANSEL_P anselc; + ADCON0 adcon0; + ADCON1_16F adcon1; + ADCON2_TRIG adcon2; + sfr_register adresh; + sfr_register adresl; + OSCCON_2 *osccon; + OSCTUNE osctune; + OSCSTAT oscstat; + WDTCON wdtcon; + SSP1_MODULE ssp; + APFCON apfcon1; + PWMxCON pwm1con; + sfr_register pwm1dcl; + sfr_register pwm1dch; + PWMxCON pwm2con; + sfr_register pwm2dcl; + sfr_register pwm2dch; + PWMxCON pwm3con; + sfr_register pwm3dcl; + sfr_register pwm3dch; + PWMxCON pwm4con; + sfr_register pwm4dcl; + sfr_register pwm4dch; + CWG4 cwg; + NCO nco; + CLCDATA clcdata; + CLC clc1; + CLC clc2; + OSC_SIM frc; + OSC_SIM lfintosc; + OSC_SIM hfintosc; + /* RRR + ECCPAS ccp1as; + PSTRCON pstr1con; + */ + + EEPROM_EXTND *e; + sfr_register vregcon; + WPU *m_wpua; + IOC *m_iocap; + IOC *m_iocan; + IOCxF *m_iocaf; + PicPortIOCRegister *m_porta; + PicTrisRegister *m_trisa; + PicLatchRegister *m_lata; + DACCON0 *m_daccon0; + DACCON1 *m_daccon1; + + PicPortBRegister *m_portc; + PicTrisRegister *m_trisc; + PicLatchRegister *m_latc; + + virtual PIR *get_pir2() { return (NULL); } + virtual PIR *get_pir1() { return (pir1); } + virtual PIR_SET *get_pir_set() { return (&pir_set_2_def); } + virtual EEPROM_EXTND *get_eeprom() { return ((EEPROM_EXTND *)eeprom); } + virtual uint program_memory_size() const { return 2048; } + virtual uint register_memory_size () const { return 0x1000; } + + P16F1503(const char *_name=0, const char *desc=0); + ~P16F1503(); + + virtual void create_iopin_map(); + virtual void create_sfr_map(); + + virtual void set_out_of_range_pm(uint address, uint value); + virtual void create(int ram_top, int dev_id); + virtual void option_new_bits_6_7(uint bits); + virtual void enter_sleep(); + virtual void exit_sleep(); + virtual void oscillator_select(uint mode, bool clkout); + virtual void program_memory_wp(uint mode); + static Processor *construct(const char *name); + + uint ram_size; +}; + +class P16LF1503 : public P16F1503 +{ + public: + static Processor *construct(const char *name); + + P16LF1503(const char *_name=0, const char *desc=0); + ~P16LF1503(){;} +}; +#endif diff --git a/src/gpsim/devices/p16f178x.cc b/src/gpsim/devices/p16f178x.cc new file mode 100644 index 0000000..8a75a08 --- /dev/null +++ b/src/gpsim/devices/p16f178x.cc @@ -0,0 +1,867 @@ +/* + Copyright (C) 2013,2014,2017 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +// +// p16f178x +// +// This file supports: +// PIC16[L]F1788 +// +//Note: All these processors have extended 14bit instructions + +#include +#include +#include + +#include "config.h" +#include "stimuli.h" +#include "eeprom.h" +#include "p16f178x.h" +#include "pic-ioports.h" +#include "packages.h" +#include "apfcon.h" +#include "pir.h" + +//#define DEBUG +#if defined(DEBUG) +#include "config.h" +#define Dprintf(arg) {printf("%s:%d ",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + + +P16F178x::P16F178x(const char *_name, const char *desc) + : _14bit_e_processor(_name,desc), + comparator(this), + pie1(this,"pie1", "Peripheral Interrupt Enable"), + pie2(this,"pie2", "Peripheral Interrupt Enable"), + pie3(this,"pie3", "Peripheral Interrupt Enable"), + pie4(this,"pie4", "Peripheral Interrupt Enable"), + t2con(this, "t2con", "TMR2 Control"), + pr2(this, "pr2", "TMR2 Period Register"), + tmr2(this, "tmr2", "TMR2 Register"), + t1con_g(this, "t1con", "TMR1 Control Register"), + tmr1l(this, "tmr1l", "TMR1 Low"), + tmr1h(this, "tmr1h", "TMR1 High"), + ccp1con(this, "ccp1con", "Capture Compare Control"), + ccpr1l(this, "ccpr1l", "Capture Compare 1 Low"), + ccpr1h(this, "ccpr1h", "Capture Compare 1 High"), + fvrcon(this, "fvrcon", "Voltage reference control register", 0xbf, 0x40), + borcon(this, "borcon", "Brown-out reset control register"), + ansela(this, "ansela", "Analog Select port a"), + anselb(this, "anselb", "Analog Select port b"), + anselc(this, "anselc", "Analog Select port c"), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adcon2(this,"adcon2", "A2D Control 2"), + adresh(this,"adresh", "A2D Result High"), + adresl(this,"adresl", "A2D Result Low"), + osccon(0), + osctune(this, "osctune", "Oscillator Tunning Register"), + oscstat(this, "oscstat", "Oscillator Status Register"), + wdtcon(this, "wdtcon", "Watch dog timer control", 0x3f), + usart(this), + ssp(this), + apfcon1(this, "apfcon1", "Alternate Pin Function Control Register 1", 0xff), + apfcon2(this, "apfcon2", "Alternate Pin Function Control Register 2", 0x07), + pwm1con(this, "pwm1con", "Enhanced PWM Control Register"), + ccp1as(this, "ccp1as", "CCP1 Auto-Shutdown Control Register"), + pstr1con(this, "pstr1con", "Pulse Sterring Control Register"), + vregcon(this, "vregcon", "Voltage Regulator Control Register") +{ + m_iocbf = new IOCxF(this, "iocbf", "Interrupt-On-Change flag Register"); + m_iocbp = new IOC(this, "iocbp", "Interrupt-On-Change positive edge"); + m_iocbn = new IOC(this, "iocbn", "Interrupt-On-Change negative edge"); + m_portb= new PicPortIOCRegister(this,"portb","", intcon, m_iocbp, m_iocbn, m_iocbf, 8,0xff); + m_trisb = new PicTrisRegister(this,"trisb","", m_portb, false, 0xff); + m_latb = new PicLatchRegister(this,"latb","",m_portb, 0xff); + m_wpub = new WPU(this, "wpub", "Weak Pull-up Register", m_portb, 0xff); + + m_ioccf = new IOCxF(this, "ioccf", "Interrupt-On-Change flag Register"); + m_ioccp = new IOC(this, "ioccp", "Interrupt-On-Change positive edge"); + m_ioccn = new IOC(this, "ioccn", "Interrupt-On-Change negative edge"); + m_portc= new PicPortIOCRegister(this,"portc","", intcon, m_ioccp, m_ioccn, m_ioccf, 8,0xff); + m_trisc = new PicTrisRegister(this,"trisc","", m_portc, false, 0xff); + m_latc = new PicLatchRegister(this,"latc","",m_portc, 0xff); + m_wpuc = new WPU(this, "wpuc", "Weak Pull-up Register", m_portc, 0xff); + + m_iocaf = new IOCxF(this, "iocaf", "Interrupt-On-Change flag Register"); + m_iocap = new IOC(this, "iocap", "Interrupt-On-Change positive edge"); + m_iocan = new IOC(this, "iocan", "Interrupt-On-Change negative edge"); + m_porta= new PicPortIOCRegister(this,"porta","", intcon, m_iocap, m_iocan, m_iocaf, 8,0xff); + m_trisa = new PicTrisRegister(this,"trisa","", m_porta, false, 0xff); + m_lata = new PicLatchRegister(this,"lata","",m_porta, 0xff); + m_iocef = new IOCxF(this, "iocef", "Interrupt-On-Change flag Register", 0x08); + m_iocep = new IOC(this, "iocep", "Interrupt-On-Change positive edge", 0x08); + m_iocen = new IOC(this, "iocen", "Interrupt-On-Change negative edge", 0x08); + m_porte= new PicPortIOCRegister(this,"porte","", intcon, m_iocep, m_iocen, m_iocef, 8,0x08); + m_trise = new PicTrisRegister(this,"trise","", m_porte, false, 0x00); + m_daccon0 = new DACCON0(this, "dac1con0", "DAC1 8bit Voltage reference register 0", 0xbd, 256); + m_daccon1 = new DACCON1(this, "dac1con1", "DAC1 8bit Voltage reference register 1", 0xff, m_daccon0); + m_dac2con0 = new DACCON0(this, "dac2con0", "DAC2 5bit Voltage reference register 0", 0xb4, 32); + m_dac2con1 = new DACCON1(this, "dac2con1", "DAC2 5bit Voltage reference register 1", 0x1f, m_dac2con0); + m_dac3con0 = new DACCON0(this, "dac3con0", "DAC3 5bit Voltage reference register 0", 0xb4, 32); + m_dac3con1 = new DACCON1(this, "dac3con1", "DAC3 5bit Voltage reference register 1", 0x1f, m_dac3con0); + m_dac4con0 = new DACCON0(this, "dac4con0", "DAC4 5bit Voltage reference register 0", 0xb4, 32); + m_dac4con1 = new DACCON1(this, "dac4con1", "DAC4 5bit Voltage reference register 1", 0x1f, m_dac4con0); + m_cpu_temp = new CPU_Temp("cpu_temperature", 30., "CPU die temperature"); + + + tmr0.set_cpu(this, m_porta, 4, &option_reg); + tmr0.start(0); + tmr0.set_t1gcon(&t1con_g.t1gcon); + set_mclr_pin(1); + + ((INTCON_14_PIR *)intcon)->write_mask = 0xfe; + + m_wpua = new WPU(this, "wpua", "Weak Pull-up Register", m_porta, 0xff); + m_wpue = new WPU(this, "wpue", "Weak Pull-up Register", m_porte, 0x08); + + pir1 = new PIR1v1822(this,"pir1","Peripheral Interrupt Register",intcon, &pie1); + pir2 = new PIR2v1822(this,"pir2","Peripheral Interrupt Register",intcon, &pie2); + pir3 = new PIR3v178x(this,"pir3","Peripheral Interrupt Register",intcon, &pie3); + pir4 = new PIR3v178x(this,"pir4","Peripheral Interrupt Register",intcon, &pie3); + pir2->valid_bits |= PIR2v1822::C2IF | PIR2v1822::CCP2IF | PIR2v1822::C3IF | PIR2v1822::C4IF; + pir2->writable_bits |= PIR2v1822::C2IF | PIR2v1822::CCP2IF | PIR2v1822::C3IF | PIR2v1822::C4IF; + pir4->valid_bits = pir4->writable_bits = 0xff; + + comparator.cmxcon0[0] = new CMxCON0(this, "cm1con0", " Comparator C1 Control Register 0", 0, &comparator); + comparator.cmxcon1[0] = new CMxCON1(this, "cm1con1", " Comparator C1 Control Register 1", 0, &comparator); + comparator.cmout = new CMOUT(this, "cmout", "Comparator Output Register"); + comparator.cmxcon0[1] = new CMxCON0(this, "cm2con0", " Comparator C2 Control Register 0", 1, &comparator); + comparator.cmxcon1[1] = new CMxCON1(this, "cm2con1", " Comparator C2 Control Register 1", 1, &comparator); + comparator.cmxcon0[2] = new CMxCON0(this, "cm3con0", " Comparator C3 Control Register 0", 2, &comparator); + comparator.cmxcon1[2] = new CMxCON1(this, "cm3con1", " Comparator C3 Control Register 1", 2, &comparator); +} + +P16F178x::~P16F178x() +{ + unassignMCLRPin(); + delete_file_registers(0x20, 0x7f); + uint ram = ram_size - 96; // first 96 bytes already added + uint add; + for(add = 0x80; ram >= 80; add += 0x80) + { + ram -= 80; + delete_file_registers(add + 0x20, add + 0x6f); + } + if (ram > 0) + delete_file_registers(add + 0x20 , add + 0x20 + ram -1); + + delete_sfr_register(m_iocap); + delete_sfr_register(m_iocan); + delete_sfr_register(m_iocaf); + delete_sfr_register(m_iocbp); + delete_sfr_register(m_iocbn); + delete_sfr_register(m_iocbf); + delete_sfr_register(m_ioccp); + delete_sfr_register(m_ioccn); + delete_sfr_register(m_ioccf); + delete_sfr_register(m_iocep); + delete_sfr_register(m_iocen); + delete_sfr_register(m_iocef); + delete_sfr_register(m_daccon0); + delete_sfr_register(m_daccon1); + delete_sfr_register(m_dac2con0); + delete_sfr_register(m_dac2con1); + delete_sfr_register(m_dac3con0); + delete_sfr_register(m_dac3con1); + delete_sfr_register(m_dac4con0); + delete_sfr_register(m_dac4con1); + + delete_sfr_register(m_trisa); + delete_sfr_register(m_porta); + delete_sfr_register(m_lata); + delete_sfr_register(m_wpua); + delete_sfr_register(m_portb); + delete_sfr_register(m_trisb); + delete_sfr_register(m_latb); + delete_sfr_register(m_portc); + delete_sfr_register(m_trisc); + delete_sfr_register(m_latc); + delete_sfr_register(m_wpub); + delete_sfr_register(m_wpuc); + delete_sfr_register(m_trise); + delete_sfr_register(m_porte); + delete_sfr_register(m_wpue); + + remove_sfr_register(&tmr0); + + remove_sfr_register(&tmr1l); + remove_sfr_register(&tmr1h); + remove_sfr_register(&t1con_g); + remove_sfr_register(&t1con_g.t1gcon); + + remove_sfr_register(&tmr2); + remove_sfr_register(&pr2); + remove_sfr_register(&t2con); + remove_sfr_register(&ssp.sspbuf); + remove_sfr_register(&ssp.sspadd); + remove_sfr_register(ssp.sspmsk); + remove_sfr_register(&ssp.sspstat); + remove_sfr_register(&ssp.sspcon); + remove_sfr_register(&ssp.sspcon2); + remove_sfr_register(&ssp.ssp1con3); + remove_sfr_register(&ccpr1l); + remove_sfr_register(&ccpr1h); + remove_sfr_register(&ccp1con); + remove_sfr_register(&pwm1con); + remove_sfr_register(&ccp1as); + remove_sfr_register(&pstr1con); + remove_sfr_register(&pie1); + remove_sfr_register(&pie2); + remove_sfr_register(&pie3); + remove_sfr_register(&pie4); + remove_sfr_register(&adresl); + remove_sfr_register(&adresh); + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&adcon2); + remove_sfr_register(&borcon); + remove_sfr_register(&fvrcon); + remove_sfr_register(&apfcon1); + remove_sfr_register(&apfcon2); + remove_sfr_register(&ansela); + remove_sfr_register(&anselb); + remove_sfr_register(&anselc); + remove_sfr_register(get_eeprom()->get_reg_eeadr()); + remove_sfr_register(get_eeprom()->get_reg_eeadrh()); + remove_sfr_register(get_eeprom()->get_reg_eedata()); + remove_sfr_register(get_eeprom()->get_reg_eedatah()); + remove_sfr_register(get_eeprom()->get_reg_eecon1()); + remove_sfr_register(get_eeprom()->get_reg_eecon2()); + remove_sfr_register(&usart.spbrg); + remove_sfr_register(&usart.spbrgh); + remove_sfr_register(&usart.rcsta); + remove_sfr_register(&usart.txsta); + remove_sfr_register(&usart.baudcon); + remove_sfr_register(&ssp.sspbuf); + remove_sfr_register(&ssp.sspadd); + remove_sfr_register(ssp.sspmsk); + remove_sfr_register(&ssp.sspstat); + remove_sfr_register(&ssp.sspcon); + remove_sfr_register(&ssp.sspcon2); + remove_sfr_register(&ssp.ssp1con3); + remove_sfr_register(&ccpr1l); + remove_sfr_register(&ccpr1h); + remove_sfr_register(&ccp1con); + remove_sfr_register(&pwm1con); + remove_sfr_register(&ccp1as); + remove_sfr_register(&pstr1con); + remove_sfr_register(&osctune); + remove_sfr_register(&option_reg); + remove_sfr_register(osccon); + remove_sfr_register(&oscstat); + remove_sfr_register(&vregcon); + + remove_sfr_register(comparator.cmxcon0[0]); + remove_sfr_register(comparator.cmxcon1[0]); + remove_sfr_register(comparator.cmout); + remove_sfr_register(comparator.cmxcon0[1]); + remove_sfr_register(comparator.cmxcon1[1]); + remove_sfr_register(comparator.cmxcon0[2]); + remove_sfr_register(comparator.cmxcon1[2]); + delete_sfr_register(usart.rcreg); + delete_sfr_register(usart.txreg); + delete_sfr_register(pir1); + delete_sfr_register(pir2); + delete_sfr_register(pir3); + delete_sfr_register(pir4); + delete e; + delete m_cpu_temp; +} + +void P16F178x::create_sfr_map() +{ + pir_set_2_def.set_pir1(pir1); + pir_set_2_def.set_pir2(pir2); + pir_set_2_def.set_pir3(pir3); + pir_set_2_def.set_pir4(pir4); + + add_file_registers(0x20, 0x7f, 0x00); + uint ram = ram_size - 96; // first 96 bytes already added + uint add; + for(add = 0x80; ram >= 80; add += 0x80) + { + ram -= 80; + add_file_registers(add + 0x20, add + 0x6f, 0x00); + } + if (ram > 0) add_file_registers(add + 0x20 , add + 0x20 + ram -1, 0x00); + + add_sfr_register(m_porta, 0x0c); + add_sfr_register(m_portb, 0x0d); + add_sfr_register(m_portc, 0x0e); + add_sfr_register(m_porte, 0x10); + add_sfr_registerR(pir1, 0x11, RegisterValue(0,0),"pir1"); + add_sfr_registerR(pir2, 0x12, RegisterValue(0,0),"pir2"); + add_sfr_registerR(pir3, 0x13, RegisterValue(0,0),"pir3"); + add_sfr_registerR(pir4, 0x14, RegisterValue(0,0),"pir4"); + add_sfr_register(&tmr0, 0x15); + + add_sfr_register(&tmr1l, 0x16, RegisterValue(0,0),"tmr1l"); + add_sfr_register(&tmr1h, 0x17, RegisterValue(0,0),"tmr1h"); + add_sfr_register(&t1con_g, 0x18, RegisterValue(0,0)); + add_sfr_register(&t1con_g.t1gcon, 0x19, RegisterValue(0,0)); + + add_sfr_register(&tmr2, 0x1a, RegisterValue(0,0)); + add_sfr_register(&pr2, 0x1b, RegisterValue(0,0)); + add_sfr_registerR(&t2con, 0x1c, RegisterValue(0,0)); + + + add_sfr_register(m_trisa, 0x8c, RegisterValue(0xff,0)); + add_sfr_register(m_trisb, 0x8d, RegisterValue(0xff,0)); + add_sfr_register(m_trisc, 0x8e, RegisterValue(0xff,0)); + add_sfr_register(m_trise, 0x90, RegisterValue(0x08,0)); + + pcon.valid_bits = 0xcf; + add_sfr_register(&option_reg, 0x95, RegisterValue(0xff,0)); + add_sfr_register(&osctune, 0x98, RegisterValue(0,0)); + add_sfr_register(osccon, 0x99, RegisterValue(0x38,0)); + add_sfr_register(&oscstat, 0x9a, RegisterValue(0,0)); + + intcon_reg.set_pir_set(get_pir_set()); + + + tmr1l.tmrh = &tmr1h; + tmr1l.t1con = &t1con_g; + tmr1l.setInterruptSource(new InterruptSource(pir1, PIR1v1::TMR1IF)); + + tmr1h.tmrl = &tmr1l; + t1con_g.tmrl = &tmr1l; + t1con_g.t1gcon.set_tmrl(&tmr1l); + t1con_g.t1gcon.setInterruptSource(new InterruptSource(pir1, PIR1v1822::TMR1IF)); + + tmr1l.setIOpin(&(*m_porta)[5]); + t1con_g.t1gcon.setGatepin(&(*m_porta)[3]); + + add_sfr_registerR(&pie1, 0x91, RegisterValue(0,0)); + add_sfr_registerR(&pie2, 0x92, RegisterValue(0,0)); + add_sfr_registerR(&pie3, 0x93, RegisterValue(0,0)); + add_sfr_registerR(&pie4, 0x94, RegisterValue(0,0)); + add_sfr_register(&adresl, 0x9b); + add_sfr_register(&adresh, 0x9c); + add_sfr_registerR(&adcon0, 0x9d, RegisterValue(0x00,0)); + add_sfr_registerR(&adcon1, 0x9e, RegisterValue(0x00,0)); + add_sfr_registerR(&adcon2, 0x9f, RegisterValue(0x00,0)); + + + usart.initialize(pir1, + &(*m_porta)[0], // TX pin + &(*m_porta)[1], // RX pin + new _TXREG(this,"txreg", "USART Transmit Register", &usart), + new _RCREG(this,"rcreg", "USART Receiver Register", &usart)); + + usart.set_eusart(true); + + add_sfr_register(m_lata, 0x10c); + add_sfr_register(m_latb, 0x10d); + add_sfr_register(m_latc, 0x10e); + add_sfr_registerR(comparator.cmxcon0[0], 0x111, RegisterValue(0x04,0)); + add_sfr_registerR(comparator.cmxcon1[0], 0x112, RegisterValue(0x00,0)); + add_sfr_registerR(comparator.cmxcon0[1], 0x113, RegisterValue(0x04,0)); + add_sfr_registerR(comparator.cmxcon1[1], 0x114, RegisterValue(0x00,0)); + add_sfr_registerR(comparator.cmout, 0x115, RegisterValue(0x00,0)); + add_sfr_registerR(&borcon, 0x116, RegisterValue(0x80,0)); + add_sfr_registerR(&fvrcon, 0x117, RegisterValue(0x00,0)); + add_sfr_registerR(m_daccon0, 0x118, RegisterValue(0x00,0)); + add_sfr_registerR(m_daccon1, 0x119, RegisterValue(0x00,0)); + add_sfr_registerR(&apfcon2 , 0x11c, RegisterValue(0x00,0)); + add_sfr_registerR(&apfcon1 , 0x11d, RegisterValue(0x00,0)); + add_sfr_registerR(comparator.cmxcon0[2], 0x11e, RegisterValue(0x04,0)); + add_sfr_registerR(comparator.cmxcon1[2], 0x11f, RegisterValue(0x00,0)); + add_sfr_registerR(&ansela, 0x18c, RegisterValue(0x17,0)); + add_sfr_registerR(&anselb, 0x18d, RegisterValue(0x7f,0)); + add_sfr_registerR(&anselc, 0x18e, RegisterValue(0xff,0)); + get_eeprom()->get_reg_eedata()->new_name("eedatl"); + get_eeprom()->get_reg_eedatah()->new_name("eedath"); + add_sfr_registerR(get_eeprom()->get_reg_eeadr(), 0x191); + add_sfr_registerR(get_eeprom()->get_reg_eeadrh(), 0x192); + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x193); + add_sfr_register(get_eeprom()->get_reg_eedatah(), 0x194); + add_sfr_registerR(get_eeprom()->get_reg_eecon1(), 0x195, RegisterValue(0,0)); + add_sfr_registerR(get_eeprom()->get_reg_eecon2(), 0x196); + add_sfr_registerR(&vregcon, 0x197, RegisterValue(1,0)); + add_sfr_registerR(usart.rcreg, 0x199, RegisterValue(0,0),"rcreg"); + add_sfr_registerR(usart.txreg, 0x19a, RegisterValue(0,0),"txreg"); + add_sfr_registerR(&usart.spbrg, 0x19b, RegisterValue(0,0),"spbrgl"); + add_sfr_registerR(&usart.spbrgh, 0x19c, RegisterValue(0,0),"spbrgh"); + add_sfr_registerR(&usart.rcsta, 0x19d, RegisterValue(0,0),"rcsta"); + add_sfr_registerR(&usart.txsta, 0x19e, RegisterValue(2,0),"txsta"); + add_sfr_registerR(&usart.baudcon, 0x19f,RegisterValue(0x40,0),"baudcon"); + + add_sfr_registerR(m_wpua, 0x20c, RegisterValue(0xff,0),"wpua"); + add_sfr_registerR(m_wpub, 0x20d, RegisterValue(0xff,0),"wpub"); + add_sfr_registerR(m_wpuc, 0x20e, RegisterValue(0xff,0),"wpuc"); + add_sfr_registerR(m_wpue, 0x210, RegisterValue(0x04,0),"wpue"); + + add_sfr_register(&ssp.sspbuf, 0x211, RegisterValue(0,0),"ssp1buf"); + add_sfr_registerR(&ssp.sspadd, 0x212, RegisterValue(0,0),"ssp1add"); + add_sfr_registerR(ssp.sspmsk, 0x213, RegisterValue(0xff,0),"ssp1msk"); + add_sfr_registerR(&ssp.sspstat, 0x214, RegisterValue(0,0),"ssp1stat"); + add_sfr_registerR(&ssp.sspcon, 0x215, RegisterValue(0,0),"ssp1con"); + add_sfr_registerR(&ssp.sspcon2, 0x216, RegisterValue(0,0),"ssp1con2"); + add_sfr_registerR(&ssp.ssp1con3, 0x217, RegisterValue(0,0),"ssp1con3"); + add_sfr_register(&ccpr1l, 0x291, RegisterValue(0,0)); + add_sfr_register(&ccpr1h, 0x292, RegisterValue(0,0)); + add_sfr_registerR(&ccp1con, 0x293, RegisterValue(0,0)); + add_sfr_register(&pwm1con, 0x294, RegisterValue(0,0)); + add_sfr_register(&ccp1as, 0x295, RegisterValue(0,0)); + add_sfr_register(&pstr1con, 0x296, RegisterValue(1,0)); + + add_sfr_registerR(m_iocap, 0x391, RegisterValue(0,0),"iocap"); + add_sfr_registerR(m_iocan, 0x392, RegisterValue(0,0),"iocan"); + add_sfr_registerR(m_iocaf, 0x393, RegisterValue(0,0),"iocaf"); + m_iocaf->set_intcon(intcon); + add_sfr_registerR(m_iocbp, 0x394, RegisterValue(0,0),"iocbp"); + add_sfr_registerR(m_iocbn, 0x395, RegisterValue(0,0),"iocbn"); + add_sfr_registerR(m_iocbf, 0x396, RegisterValue(0,0),"iocbf"); + m_iocbf->set_intcon(intcon); + add_sfr_registerR(m_ioccp, 0x397, RegisterValue(0,0),"ioccp"); + add_sfr_registerR(m_ioccn, 0x398, RegisterValue(0,0),"ioccn"); + add_sfr_registerR(m_ioccf, 0x399, RegisterValue(0,0),"ioccf"); + m_ioccf->set_intcon(intcon); + add_sfr_registerR(m_iocep, 0x39d, RegisterValue(0,0),"iocep"); + add_sfr_registerR(m_iocen, 0x39e, RegisterValue(0,0),"iocen"); + add_sfr_registerR(m_iocef, 0x39f, RegisterValue(0,0),"iocef"); + m_iocef->set_intcon(intcon); + + add_sfr_registerR(m_dac2con0, 0x591, RegisterValue(0x00,0)); + add_sfr_registerR(m_dac2con1, 0x592, RegisterValue(0x00,0)); + add_sfr_registerR(m_dac3con0, 0x593, RegisterValue(0x00,0)); + add_sfr_registerR(m_dac3con1, 0x594, RegisterValue(0x00,0)); + add_sfr_registerR(m_dac4con0, 0x595, RegisterValue(0x00,0)); + add_sfr_registerR(m_dac4con1, 0x596, RegisterValue(0x00,0)); + + tmr2.ssp_module[0] = &ssp; + + ssp.initialize( + get_pir_set(), // PIR + &(*m_porta)[1], // SCK + &(*m_porta)[3], // SS + &(*m_porta)[0], // SDO + &(*m_porta)[2], // SDI + m_trisa, // i2c tris port + SSP_TYPE_MSSP1 + ); + apfcon1.set_pins(0, &ccp1con, CCPCON::CCP_PIN, &(*m_porta)[2], &(*m_porta)[5]); //CCP1/P1A + apfcon1.set_pins(1, &ccp1con, CCPCON::PxB_PIN, &(*m_porta)[0], &(*m_porta)[4]); //P1B + apfcon1.set_pins(2, &usart, USART_MODULE::TX_PIN, &(*m_porta)[0], &(*m_porta)[4]); //USART TX Pin + apfcon1.set_pins(3, &t1con_g.t1gcon, 0, &(*m_porta)[4], &(*m_porta)[3]); //tmr1 gate + apfcon1.set_pins(5, &ssp, SSP1_MODULE::SS_PIN, &(*m_porta)[3], &(*m_porta)[0]); //SSP SS + apfcon1.set_pins(6, &ssp, SSP1_MODULE::SDO_PIN, &(*m_porta)[0], &(*m_porta)[4]); //SSP SDO + apfcon1.set_pins(7, &usart, USART_MODULE::RX_PIN, &(*m_porta)[1], &(*m_porta)[5]); //USART RX Pin + + if (pir1) + { + pir1->set_intcon(intcon); + pir1->set_pie(&pie1); + } + pie1.setPir(pir1); + pie2.setPir(pir2); + pie3.setPir(pir3); + pie4.setPir(pir4); + t2con.tmr2 = &tmr2; + tmr2.pir_set = get_pir_set(); + tmr2.pr2 = &pr2; + tmr2.t2con = &t2con; + tmr2.add_ccp ( &ccp1con ); +// tmr2.add_ccp ( &ccp2con ); + pr2.tmr2 = &tmr2; + + ccp1as.setIOpin(0, 0, &(*m_porta)[2]); + ccp1as.link_registers(&pwm1con, &ccp1con); + + ccp1con.setIOpin(&(*m_porta)[2], &(*m_porta)[0]); + ccp1con.pstrcon = &pstr1con; + ccp1con.pwm1con = &pwm1con; + ccp1con.setCrosslinks(&ccpr1l, pir1, PIR1v1822::CCP1IF, &tmr2, &ccp1as); + ccpr1l.ccprh = &ccpr1h; + ccpr1l.tmrl = &tmr1l; + ccpr1h.ccprl = &ccpr1l; + + + ansela.config(0x17, 0); + ansela.setValidBits(0x17); + ansela.setAdcon1(&adcon1); + + anselb.config(0x3f, 8); + anselb.setValidBits(0x7f); + anselb.setAdcon1(&adcon1); + anselb.setAnsel(&ansela); + ansela.setAnsel(&anselb); + anselc.setValidBits(0xff); + + adcon0.setAdresLow(&adresl); + adcon0.setAdres(&adresh); + adcon0.setAdcon1(&adcon1); + adcon0.setAdcon2(&adcon2); + adcon0.setIntcon(intcon); + adcon0.setA2DBits(12); + adcon0.setPir(pir1); + adcon0.setChannel_Mask(0x1f); + adcon0.setChannel_shift(2); + adcon0.setGo(1); + + adcon1.setAdcon0(&adcon0); + adcon1.setNumberOfChannels(32); // not all channels are used + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[4]); + adcon1.setValidBits(0xf7); + adcon1.setVrefHiConfiguration(0, 3); + adcon1.setVrefLoConfiguration(0, 2); + adcon1.set_FVR_chan(0x1f); + + comparator.cmxcon1[0]->set_INpinNeg(&(*m_porta)[0], &(*m_porta)[1], &(*m_portb)[3], &(*m_portb)[1]); + comparator.cmxcon1[1]->set_INpinNeg(&(*m_porta)[0], &(*m_porta)[1], &(*m_portb)[3], &(*m_portb)[1]); + comparator.cmxcon1[2]->set_INpinNeg(&(*m_porta)[0], &(*m_porta)[1], &(*m_portb)[3], &(*m_portb)[1]); + comparator.cmxcon1[0]->set_INpinPos(&(*m_porta)[2], &(*m_porta)[3]); + comparator.cmxcon1[1]->set_INpinPos(&(*m_porta)[2], &(*m_portb)[0]); + comparator.cmxcon1[2]->set_INpinPos(&(*m_porta)[2], &(*m_portb)[4]); + + comparator.cmxcon1[0]->set_OUTpin(&(*m_porta)[4]); + comparator.cmxcon1[1]->set_OUTpin(&(*m_porta)[5]); + comparator.cmxcon1[2]->set_OUTpin(&(*m_portb)[5]); + comparator.cmxcon0[0]->setBitMask(0xbf); + comparator.cmxcon0[0]->setIntSrc(new InterruptSource(pir2, (1<<5))); + comparator.cmxcon0[1]->setBitMask(0xbf); + comparator.cmxcon0[1]->setIntSrc(new InterruptSource(pir2, (1<<6))); + comparator.cmxcon0[2]->setBitMask(0xbf); + comparator.cmxcon0[2]->setIntSrc(new InterruptSource(pir2, (1<<1))); + comparator.cmxcon1[0]->setBitMask(0xff); + comparator.cmxcon1[1]->setBitMask(0xff); + comparator.cmxcon1[2]->setBitMask(0xff); + + comparator.assign_pir_set(get_pir_set()); + comparator.assign_t1gcon(&t1con_g.t1gcon); + fvrcon.set_adcon1(&adcon1); + fvrcon.set_daccon0(m_daccon0); + fvrcon.set_cmModule(&comparator); + fvrcon.set_VTemp_AD_chan(0x1d); + fvrcon.set_FVRAD_AD_chan(0x1f); + + m_daccon0->set_adcon1(&adcon1); + m_daccon0->set_cmModule(&comparator); + m_daccon0->set_FVRCDA_AD_chan(0x1e); + m_daccon0->setDACOUT(&(*m_porta)[2], &(*m_portb)[7]); + + m_dac2con0->set_adcon1(&adcon1); + m_dac2con0->set_cmModule(&comparator); + m_dac2con0->set_FVRCDA_AD_chan(0x1c); + m_dac2con0->setDACOUT(&(*m_porta)[5], &(*m_portb)[7]); + + m_dac3con0->set_adcon1(&adcon1); + m_dac3con0->set_cmModule(&comparator); + m_dac3con0->set_FVRCDA_AD_chan(0x19); + m_dac3con0->setDACOUT(&(*m_portb)[2], &(*m_portb)[7]); + + m_dac4con0->set_adcon1(&adcon1); + m_dac4con0->set_cmModule(&comparator); + m_dac4con0->set_FVRCDA_AD_chan(0x18); + m_dac4con0->setDACOUT(&(*m_porta)[4], &(*m_portb)[7]); + + + osccon->set_osctune(&osctune); + osccon->set_oscstat(&oscstat); + osctune.set_osccon((OSCCON *)osccon); + osccon->write_mask = 0xfb; +} + +void P16F178x::set_out_of_range_pm(uint address, uint value) +{ + + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + get_eeprom()->change_rom(address - 0x2100, value); +} + +void P16F178x::create(int ram_top, int eeprom_size) +{ + e = new EEPROM_EXTND(this, pir2); + set_eeprom(e); + + osccon = new OSCCON_2(this, "osccon", "Oscillator Control Register"); + + pic_processor::create(); + + e->initialize(eeprom_size, 16, 16, 0x8000); + e->set_intcon(intcon); + e->get_reg_eecon1()->set_valid_bits(0xff); + + P16F178x::create_sfr_map(); + _14bit_e_processor::create_sfr_map(); +} + +void P16F178x::enter_sleep() +{ + tmr1l.sleep(); + osccon->sleep(); + _14bit_e_processor::enter_sleep(); +} + +void P16F178x::exit_sleep() +{ + if (m_ActivityState == ePASleeping) + { + tmr1l.wake(); + osccon->wake(); + _14bit_e_processor::exit_sleep(); + } +} + +void P16F178x::option_new_bits_6_7(uint bits) +{ + Dprintf(("P16F178x::option_new_bits_6_7 bits=%x\n", bits)); + m_porta->setIntEdge ( (bits & OPTION_REG::BIT6) == OPTION_REG::BIT6); + m_wpua->set_wpu_pu ( (bits & OPTION_REG::BIT7) != OPTION_REG::BIT7); +} + +void P16F178x::oscillator_select(uint cfg_word1, bool clkout) +{ + uint mask = m_porta->getEnableMask(); + uint fosc = cfg_word1 & (FOSC0|FOSC1|FOSC2); + + osccon->set_config_irc(fosc == 4); + osccon->set_config_xosc(fosc < 3); + osccon->set_config_ieso(cfg_word1 & IESO); + set_int_osc(false); + switch(fosc) + { + case 0: //LP oscillator: low power crystal + case 1: //XT oscillator: Crystal/resonator + case 2: //HS oscillator: High-speed crystal/resonator + mask &= 0x3f; + break; + + case 3: //EXTRC oscillator External RC circuit connected to CLKIN pin + mask &= 0x7f; + if(clkout) mask &= 0xbf; + else mask |= 0x40; + + break; + + case 4: //INTOSC oscillator: I/O function on CLKIN pin + set_int_osc(true); + + if(clkout) mask &= 0xbf; + else mask |= 0x40; + + mask |= 0x80; + + break; + + case 5: //ECL: External Clock, Low-Power mode (0-0.5 MHz): on CLKIN pin + if(clkout) mask &= 0xbf; + else mask |= 0x40; + + mask &= 0x7f; + break; + + case 6: //ECM: External Clock, Medium-Power mode (0.5-4 MHz): on CLKIN pin + if(clkout) mask &= 0xbf; + else mask |= 0x40; + + mask &= 0x7f; + break; + + case 7: //ECH: External Clock, High-Power mode (4-32 MHz): on CLKIN pin + if(clkout) mask &= 0xbf; + else mask |= 0x40; + + mask &= 0x7f; + break; + }; + ansela.setValidBits(0x17 & mask); + m_porta->setEnableMask(mask); +} + +void P16F178x::program_memory_wp(uint mode) +{ + switch(mode) + { + case 3: // no write protect + get_eeprom()->set_prog_wp(0x0); + break; + + case 2: // write protect 0000-01ff + get_eeprom()->set_prog_wp(0x0200); + break; + + case 1: // write protect 0000-03ff + get_eeprom()->set_prog_wp(0x0400); + break; + + case 0: // write protect 0000-07ff + get_eeprom()->set_prog_wp(0x0800); + break; + + default: + printf("%s unexpected mode %u\n", __FUNCTION__, mode); + break; + } + +} + +P16F1788::P16F1788(const char *_name, const char *desc) + : P16F178x(_name,desc) +{ + comparator.cmxcon0[3] = new CMxCON0(this, "cm4con0", " Comparator C4 Control Register 0", 3, &comparator); + comparator.cmxcon1[3] = new CMxCON1(this, "cm4con1", " Comparator C4 Control Register 1", 3, &comparator); + +} +P16F1788::~P16F1788() +{ + remove_sfr_register(comparator.cmxcon0[3]); + remove_sfr_register(comparator.cmxcon1[3]); +} +void P16F1788::create_iopin_map() +{ + + package = new Package(28); + if(!package) + return; + + //createMCLRPin(1); + // Now Create the package and place the I/O pins + package->assign_pin(1, m_porte->addPin(new IO_bi_directional_pu("porte3"),3)); + package->assign_pin(2, m_porta->addPin(new IO_bi_directional_pu("porta0"),0)); + package->assign_pin(3, m_porta->addPin(new IO_bi_directional_pu("porta1"),1)); + package->assign_pin(4, m_porta->addPin(new IO_bi_directional_pu("porta2"),2)); + package->assign_pin(5, m_porta->addPin(new IO_bi_directional_pu("porta3"),3)); + package->assign_pin(6, m_porta->addPin(new IO_bi_directional_pu("porta4"),4)); + package->assign_pin(7, m_porta->addPin(new IO_bi_directional_pu("porta5"),5)); + package->assign_pin(10, m_porta->addPin(new IO_bi_directional_pu("porta6"),6)); + package->assign_pin(9, m_porta->addPin(new IO_bi_directional_pu("porta7"),7)); + + package->assign_pin(11, m_portc->addPin(new IO_bi_directional_pu("portc0"),0)); + package->assign_pin(12, m_portc->addPin(new IO_bi_directional_pu("portc1"),1)); + package->assign_pin(13, m_portc->addPin(new IO_bi_directional_pu("portc2"),2)); + package->assign_pin(14, m_portc->addPin(new IO_bi_directional_pu("portc3"),3)); + package->assign_pin(15, m_portc->addPin(new IO_bi_directional_pu("portc4"),4)); + package->assign_pin(16, m_portc->addPin(new IO_bi_directional_pu("portc5"),5)); + package->assign_pin(17, m_portc->addPin(new IO_bi_directional_pu("portc6"),6)); + package->assign_pin(18, m_portc->addPin(new IO_bi_directional_pu("portc7"),7)); + + package->assign_pin(21, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin(22, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin(23, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin(24, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(25, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(26, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(27, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(28, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + + package->assign_pin( 20, 0); // Vdd + package->assign_pin( 19, 0); // Vss + package->assign_pin( 8, 0); // Vss +} + +Processor* P16F1788::construct(const char *name) +{ + P16F1788 *p = new P16F1788(name); + + p->create(2048, 256, 0x302b); + p->create_invalid_registers (); + + return p; +} + +void P16F1788::create(int ram_top, int eeprom_size, int dev_id) +{ + ram_size = ram_top; + create_iopin_map(); + P16F178x::create(ram_top, eeprom_size); + create_sfr_map(); + // Set DeviceID + if (m_configMemory && m_configMemory->getConfigWord(6)) + m_configMemory->getConfigWord(6)->set(dev_id); + +} + +void P16F1788::create_sfr_map() +{ + add_sfr_register(comparator.cmxcon0[3], 0x11a, RegisterValue(0x04,0)); + add_sfr_register(comparator.cmxcon1[3], 0x11b, RegisterValue(0x00,0)); + + adcon1.setIOPin(12, &(*m_portb)[0]); + adcon1.setIOPin(10, &(*m_portb)[1]); + adcon1.setIOPin(8, &(*m_portb)[2]); + adcon1.setIOPin(9, &(*m_portb)[3]); + adcon1.setIOPin(11, &(*m_portb)[4]); + adcon1.setIOPin(13, &(*m_portb)[5]); + + ssp.set_sckPin(&(*m_portc)[0]); + ssp.set_sdiPin(&(*m_portc)[1]); + ssp.set_sdoPin(&(*m_portc)[2]); + ssp.set_ssPin(&(*m_portc)[3]); + ssp.set_tris(m_trisc); + + // Pin values for default APFCON + usart.set_TXpin(&(*m_portc)[4]); // TX pin + usart.set_RXpin(&(*m_portc)[5]); // RX pin + + ccp1con.setIOpin(&(*m_portc)[5], &(*m_portc)[4], &(*m_portc)[3], &(*m_portc)[2]); + apfcon1.set_ValidBits(0xff); + apfcon2.set_ValidBits(0x07); + // pins 0,1 not used for p16f1788 + apfcon1.set_pins(2, &usart, USART_MODULE::TX_PIN, &(*m_portc)[4], &(*m_porta)[0]); //USART TX Pin + // pin 3 defined in p12f1822 + apfcon1.set_pins(5, &ssp, SSP1_MODULE::SS_PIN, &(*m_portc)[3], &(*m_porta)[3]); //SSP SS + apfcon1.set_pins(6, &ssp, SSP1_MODULE::SDO_PIN, &(*m_portc)[2], &(*m_porta)[4]); //SSP SDO + apfcon1.set_pins(7, &usart, USART_MODULE::RX_PIN, &(*m_portc)[5], &(*m_porta)[1]); //USART RX Pin + + comparator.cmxcon1[3]->set_INpinNeg(&(*m_porta)[0], &(*m_porta)[1], &(*m_portb)[5], &(*m_portb)[1]); + comparator.cmxcon1[3]->set_INpinPos(&(*m_porta)[2], &(*m_portb)[6]); + comparator.cmxcon1[3]->set_OUTpin(&(*m_portc)[7]); + comparator.cmxcon0[3]->setBitMask(0xbf); + comparator.cmxcon0[3]->setIntSrc(new InterruptSource(pir2, (1<<2))); + comparator.cmxcon1[3]->setBitMask(0xff); + +} +P16LF1788::P16LF1788(const char *_name, const char *desc) + : P16F1788(_name,desc) +{ +} + +P16LF1788::~P16LF1788() +{ +} + +Processor * P16LF1788::construct(const char *name) +{ + P16LF1788 *p = new P16LF1788(name); + + p->create(2048, 256, 0x302d); + p->create_invalid_registers (); + + return p; +} + +void P16LF1788::create(int ram_top, int eeprom_size, int dev_id) +{ + P16F1788::create(ram_top, eeprom_size, dev_id); +} + diff --git a/src/gpsim/devices/p16f178x.h b/src/gpsim/devices/p16f178x.h new file mode 100644 index 0000000..f46cf4e --- /dev/null +++ b/src/gpsim/devices/p16f178x.h @@ -0,0 +1,182 @@ +/* + Copyright (C) 2013,2014,2017 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + + +#ifndef __P16F178x_H__ +#define __P16F178x_H__ + +#include "14bit-processors.h" +#include "14bit-tmrs.h" +#include "intcon.h" +#include "pir.h" +#include "pie.h" +#include "eeprom.h" +#include "comparator.h" +#include "a2dconverter.h" +#include "pic-ioports.h" +#include "dsm_module.h" +#include "apfcon.h" +#include "cwg.h" +#include "nco.h" +#include "clc.h" + +#define FOSC0 (1<<0) +#define FOSC1 (1<<1) +#define FOSC2 (1<<2) +#define IESO (1<<12) + + +class P16F178x : public _14bit_e_processor +{ + public: + ComparatorModule2 comparator; + PIR_SET_2 pir_set_2_def; + PIE pie1; + PIR *pir1; + PIE pie2; + PIR *pir2; + PIE pie3; + PIR *pir3; + PIE pie4; + PIR *pir4; + T2CON_64 t2con; + PR2 pr2; + TMR2 tmr2; + T1CON_G t1con_g; + TMRL tmr1l; + TMRH tmr1h; + CCPCON ccp1con; + CCPRL ccpr1l; + CCPRH ccpr1h; + FVRCON fvrcon; + BORCON borcon; + ANSEL_P ansela; + ANSEL_P anselb; + ANSEL_P anselc; + ADCON0_DIF adcon0; + ADCON1_16F adcon1; + ADCON2_DIF adcon2; + sfr_register adresh; + sfr_register adresl; + OSCCON_2 *osccon; + OSCTUNE osctune; + OSCSTAT oscstat; + //OSCCAL osccal; + WDTCON wdtcon; + USART_MODULE usart; + SSP1_MODULE ssp; + APFCON apfcon1; + APFCON apfcon2; + PWM1CON pwm1con; + ECCPAS ccp1as; + PSTRCON pstr1con; + EEPROM_EXTND *e; + sfr_register vregcon; + + WPU *m_wpua; + IOC *m_iocap; + IOC *m_iocan; + IOCxF *m_iocaf; + PicPortIOCRegister *m_porta; + PicTrisRegister *m_trisa; + PicLatchRegister *m_lata; + IOC *m_iocep; + IOC *m_iocen; + IOCxF *m_iocef; + PicPortIOCRegister *m_porte; + PicTrisRegister *m_trise; + WPU *m_wpue; + DACCON0 *m_daccon0; + DACCON1 *m_daccon1; + DACCON0 *m_dac2con0; + DACCON1 *m_dac2con1; + DACCON0 *m_dac3con0; + DACCON1 *m_dac3con1; + DACCON0 *m_dac4con0; + DACCON1 *m_dac4con1; + IOC *m_iocbp; + IOC *m_iocbn; + IOCxF *m_iocbf; + PicPortBRegister *m_portb; + PicTrisRegister *m_trisb; + PicLatchRegister *m_latb; + WPU *m_wpub; + + IOC *m_ioccp; + IOC *m_ioccn; + IOCxF *m_ioccf; + PicPortBRegister *m_portc; + PicTrisRegister *m_trisc; + PicLatchRegister *m_latc; + WPU *m_wpuc; + + virtual PIR *get_pir2() { return (NULL); } + virtual PIR *get_pir1() { return (pir1); } + virtual PIR_SET *get_pir_set() { return (&pir_set_2_def); } + + virtual EEPROM_EXTND *get_eeprom() { return ((EEPROM_EXTND *)eeprom); } + + P16F178x(const char *_name=0, const char *desc=0); + ~P16F178x(); + virtual void create_sfr_map(); + + virtual void set_out_of_range_pm(uint address, uint value); + virtual void create(int ram_top, int eeprom_size); + virtual void option_new_bits_6_7(uint bits); + virtual void enter_sleep(); + virtual void exit_sleep(); + virtual void oscillator_select(uint mode, bool clkout); + virtual void program_memory_wp(uint mode); + + uint ram_size; +}; + +class P16F1788 : public P16F178x +{ + public: + virtual PROCESSOR_TYPE isa(){return _P16F1788_;}; + + P16F1788(const char *_name=0, const char *desc=0); + ~P16F1788(); + static Processor *construct(const char *name); + virtual void create_sfr_map(); + virtual void create_iopin_map(); + virtual void create(int ram_top, int eeprom_size, int dev_id); + virtual uint program_memory_size() const { return 16384; } + virtual uint register_memory_size () const { return 0x1000; } +}; + +class P16LF1788 : public P16F1788 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P16LF1788_;}; + + P16LF1788(const char *_name=0, const char *desc=0); + ~P16LF1788(); + static Processor *construct(const char *name); + virtual void create(int ram_top, int eeprom_size, int dev_id); +}; + +#endif //__P1xF1xxx_H__ diff --git a/src/gpsim/devices/p16f62x.cc b/src/gpsim/devices/p16f62x.cc new file mode 100644 index 0000000..d324567 --- /dev/null +++ b/src/gpsim/devices/p16f62x.cc @@ -0,0 +1,337 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +// +// p16f62x +// +// This file supports: +// PIC16F627 +// PIC16F628 +// PIC16F648 +// + +#include +#include +#include + +//#include "config.h" + +#include "stimuli.h" +#include "p16f62x.h" +#include "pic-ioports.h" +#include "packages.h" + +P16F62x::P16F62x(const char *_name, const char *desc) + : P16X6X_processor(_name,desc), + usart(this), + comparator(this) +{ +} + +P16F62x::~P16F62x() +{ + delete_file_registers(0xc0, 0xef); + delete_file_registers(0x120,0x14f); + + remove_sfr_register(&usart.rcsta); + remove_sfr_register(&usart.txsta); + remove_sfr_register(&usart.spbrg); + remove_sfr_register(&comparator.cmcon); + remove_sfr_register(&comparator.vrcon); + delete_sfr_register(usart.txreg); + delete_sfr_register(usart.rcreg); + + delete eeprom; + eeprom = 0; +} + +void P16F62x::create_iopin_map() +{ + package = new Package(18); + if(!package) return; + + // Now Create the package and place the I/O pins + + package->assign_pin(17, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin(18, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 1, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 3, m_porta->addPin(new IO_open_collector("porta4"),4)); + package->assign_pin( 4, m_porta->addPin(new IO_bi_directional("porta5"),5)); + package->assign_pin(15, m_porta->addPin(new IO_bi_directional("porta6"),6)); + package->assign_pin(16, m_porta->addPin(new IO_bi_directional("porta7"),7)); + + package->assign_pin(5, 0); // Vss + package->assign_pin( 6, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin( 7, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin( 8, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin( 9, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(10, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(11, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(12, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(13, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + package->assign_pin(14, 0); // Vdd +} + +void P16F62x::create_sfr_map() +{ + add_file_registers(0xc0, 0xef, 0); // 0xa0 - 0xbf are created in the P16X6X_processor class + add_file_registers(0x120,0x14f,0); + alias_file_registers(0x70,0x7f,0x80); + alias_file_registers(0x70,0x7f,0x100); + alias_file_registers(0x70,0x7f,0x180); + alias_file_registers(0x0,0x0,0x100); // INDF exists in all four pages, 16x6x did the first two + alias_file_registers(0x0,0x0,0x180); + alias_file_registers(0x01,0x04,0x100); + alias_file_registers(0x81,0x84,0x100); + remove_sfr_register(m_trisa); + add_sfr_register(m_trisa, 0x85, RegisterValue(0xff,0)); + + alias_file_registers(0x06,0x06,0x100); + alias_file_registers(0x86,0x86,0x100); + + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x9a); + add_sfr_register(get_eeprom()->get_reg_eeadr(), 0x9b); + add_sfr_register(get_eeprom()->get_reg_eecon1(), 0x9c, RegisterValue(0,0)); + add_sfr_register(get_eeprom()->get_reg_eecon2(), 0x9d); + + // PCLATH + alias_file_registers(0x0a,0x0a,0x100); + alias_file_registers(0x0a,0x0a,0x180); + + alias_file_registers(0x0b,0x0b,0x100); + alias_file_registers(0x0b,0x0b,0x180); + + usart.initialize(pir1,&(*m_portb)[2], &(*m_portb)[1], + new _TXREG(this,"txreg", "USART Transmit Register", &usart), + new _RCREG(this,"rcreg", "USART Receiver Register", &usart)); + + add_sfr_register(&usart.rcsta, 0x18, RegisterValue(0,0),"rcsta"); + add_sfr_register(&usart.txsta, 0x98, RegisterValue(2,0),"txsta"); + add_sfr_register(&usart.spbrg, 0x99, RegisterValue(0,0),"spbrg"); + add_sfr_register(usart.txreg, 0x19, RegisterValue(0,0),"txreg"); + add_sfr_register(usart.rcreg, 0x1a, RegisterValue(0,0),"rcreg"); + + intcon = &intcon_reg; + intcon_reg.set_pir_set(get_pir_set()); + + // Link the comparator and voltage ref to porta + comparator.initialize(get_pir_set(), &(*m_porta)[2], &(*m_porta)[0], + &(*m_porta)[1], &(*m_porta)[2], &(*m_porta)[3], &(*m_porta)[3], + &(*m_porta)[4]); + + comparator.cmcon.set_configuration(1, 0, AN0, AN3, AN0, AN3, ZERO); + comparator.cmcon.set_configuration(2, 0, AN1, AN2, AN1, AN2, ZERO); + comparator.cmcon.set_configuration(1, 1, AN0, AN2, AN3, AN2, NO_OUT); + comparator.cmcon.set_configuration(2, 1, AN1, AN2, AN1, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 2, AN0, VREF, AN3, VREF, NO_OUT); + comparator.cmcon.set_configuration(2, 2, AN1, VREF, AN2, VREF, NO_OUT); + comparator.cmcon.set_configuration(1, 3, AN0, AN2, AN0, AN2, NO_OUT); + comparator.cmcon.set_configuration(2, 3, AN1, AN2, AN1, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 4, AN0, AN3, AN0, AN3, NO_OUT); + comparator.cmcon.set_configuration(2, 4, AN1, AN2, AN1, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 5, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 5, AN1, AN2, AN1, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 6, AN0, AN2, AN0, AN2, OUT0); + comparator.cmcon.set_configuration(2, 6, AN1, AN2, AN1, AN2, OUT1); + comparator.cmcon.set_configuration(1, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + + add_sfr_register(&comparator.cmcon, 0x1f, RegisterValue(0,0),"cmcon"); + add_sfr_register(&comparator.vrcon, 0x9f, RegisterValue(0,0),"vrcon"); + + comparator.cmcon.put(0); + + // Link ccp1 onto portb + ccp1con.setIOpin(&((*m_portb)[3])); +} + +void P16F62x::set_out_of_range_pm(uint address, uint value) +{ + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + { + get_eeprom()->change_rom(address - 0x2100, value); + } +} + +//======================================================================== +bool P16F62x::set_config_word(uint address, uint cfg_word) +{ + enum { + CFG_FOSC0 = 1<<0, + CFG_FOSC1 = 1<<1, + CFG_FOSC2 = 1<<4, + CFG_MCLRE = 1<<5 + }; + // Let the base class do most of the work: + + if (pic_processor::set_config_word(address, cfg_word)) + { + uint valid_pins = m_porta->getEnableMask(); + + set_int_osc(false); + // Careful these bits not adjacent + switch(cfg_word & (CFG_FOSC0 | CFG_FOSC1 | CFG_FOSC2)) + { + case 0: // LP oscillator: low power crystal is on RA6 and RA7 + case 1: // XT oscillator: crystal/resonator is on RA6 and RA7 + case 2: // HS oscillator: crystal/resonator is on RA6 and RA7 + break; + + case 0x13: // ER oscillator: RA6 is CLKOUT, resistor (?) on RA7 + break; + + case 3: // EC: RA6 is an I/O, RA7 is a CLKIN + case 0x12: // ER oscillator: RA6 is an I/O, RA7 is a CLKIN + valid_pins = (valid_pins & 0x7f)|0x40; + break; + + case 0x10: // INTRC: Internal Oscillator, RA6 and RA7 are I/O's + set_int_osc(true); + valid_pins |= 0xc0; + break; + + case 0x11: // INTRC: Internal Oscillator, RA7 is an I/O, RA6 is CLKOUT + set_int_osc(true); + + valid_pins = (valid_pins & 0xbf)|0x80; + break; + } + + // If the /MCLRE bit is set then RA5 is the MCLR pin, otherwise it's + // a general purpose I/O pin. + + if (! (cfg_word & CFG_MCLRE)) + { + unassignMCLRPin(); + valid_pins |= ( 1<< 5); // porta5 IO port + } + else assignMCLRPin(4); // pin 4 + + //cout << " porta valid_iopins " << porta->valid_iopins << + // " tris valid io " << trisa.valid_iopins << '\n'; + + if (valid_pins != m_porta->getEnableMask()) // enable new pins for IO + { + m_porta->setEnableMask(valid_pins); + m_porta->setTris(m_trisa); + } + return true; + } + return false; +} + +//======================================================================== +void P16F62x::create(int ram_top, uint eeprom_size) +{ + EEPROM_PIR *e; + + create_iopin_map(); + + _14bit_processor::create(); + + e = new EEPROM_PIR(this,pir1); + e->initialize(eeprom_size); + //e->set_pir_set(get_pir_set()); + e->set_intcon(&intcon_reg); + + // assign this eeprom to the processor + set_eeprom_pir(e); + + P16X6X_processor::create_sfr_map(); + + status->rp_mask = 0x60; // rp0 and rp1 are valid. + indf->base_address_mask1 = 0x80; // used for indirect accesses above 0x100 + indf->base_address_mask2 = 0x1ff; // used for indirect accesses above 0x100 + + P16F62x::create_sfr_map(); + + // Build the links between the I/O Pins and the internal peripherals + //1ccp1con.iopin = portb->pins[3]; +} + +//======================================================================== +// +// Pic 16F627 +// + +Processor * P16F627::construct(const char *name) +{ + P16F627 *p = new P16F627(name); + + p->P16F62x::create(0x2f, 128); + p->create_invalid_registers (); + + return p; +} + +P16F627::P16F627(const char *_name, const char *desc) + : P16F62x(_name,desc) +{ +} + +//======================================================================== +// +Processor * P16F628::construct(const char *name) +{ + P16F628 *p = new P16F628(name); + + p->P16F62x::create(0x2f, 128); + p->create_invalid_registers (); + + return p; +} + +P16F628::P16F628(const char *_name, const char *desc) + : P16F627(_name,desc) +{ +} + +P16F628::~P16F628() +{ +} + +//======================================================================== +// +Processor * P16F648::construct(const char *name) +{ + P16F648 *p = new P16F648(name); + + p->P16F62x::create(0x2f, 256); + p->create_sfr_map(); + p->create_invalid_registers (); + + return p; +} + +P16F648::P16F648(const char *_name, const char *desc) + : P16F628(_name,desc) +{ +} + +P16F648::~P16F648() +{ + delete_file_registers(0x150,0x16f); +} + +void P16F648::create_sfr_map() +{ + add_file_registers(0x150,0x16f,0); +} diff --git a/src/gpsim/devices/p16f62x.h b/src/gpsim/devices/p16f62x.h new file mode 100644 index 0000000..0e64bf1 --- /dev/null +++ b/src/gpsim/devices/p16f62x.h @@ -0,0 +1,114 @@ +/* + Copyright (C) 1998-2002 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __P16F62X_H__ +#define __P16F62X_H__ + +#include "p16x6x.h" + +#include "eeprom.h" +#include "comparator.h" + +/*************************************************************************** + * + * Include file for: P16F627, P16F628, P16F648 + * + * + * The F62x devices are quite a bit different from the other PICs. The class + * heirarchy is similar to the 16F84. + * + * + ***************************************************************************/ + +class P16F62x : public P16X6X_processor +{ +public: + P16F62x(const char *_name=0, const char *desc=0); + ~P16F62x(); + + USART_MODULE usart; + ComparatorModule comparator; + + virtual void set_out_of_range_pm(uint address, uint value); + + virtual PROCESSOR_TYPE isa(){return _P16F627_;}; + + virtual uint register_memory_size () const { return 0x200;}; + + virtual uint program_memory_size() { return 0; }; + + virtual void create_sfr_map(); + + // The f628 (at least) I/O pins depend on the Fosc Configuration bits. + virtual bool set_config_word(uint address, uint cfg_word); + + virtual void create(int ram_top, uint eeprom_size); + virtual void create_iopin_map(); + + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as P16F62x expects to have a PIR capable EEPROM + assert(0); + } + virtual void set_eeprom_pir(EEPROM_PIR *ep) { + eeprom = ep; + } + virtual EEPROM_PIR *get_eeprom() { return ((EEPROM_PIR *)eeprom); } +}; + +class P16F627 : public P16F62x +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F627_;}; + + virtual uint program_memory_size() const { return 0x400; }; + + P16F627(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); +}; + +class P16F628 : public P16F627 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F628_;}; + + virtual uint program_memory_size() const { return 0x800; }; + + P16F628(const char *_name=0, const char *desc=0); + ~P16F628(); + static Processor *construct(const char *name); +}; + +class P16F648 : public P16F628 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F648_;}; + + virtual uint program_memory_size() const { return 0x1000; }; + virtual void create_sfr_map(); + + P16F648(const char *_name=0, const char *desc=0); + ~P16F648(); + static Processor *construct(const char *name); +}; + +#endif diff --git a/src/gpsim/devices/p16f87x.cc b/src/gpsim/devices/p16f87x.cc new file mode 100644 index 0000000..35b301c --- /dev/null +++ b/src/gpsim/devices/p16f87x.cc @@ -0,0 +1,905 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +// p16f87x +// +// This file supports: +// P16F874 P16F877 +// P16F871 P16F873 +// P16F876 P16F873A +// P14F874A P16F876A +// P16F877A + +#include +#include +#include + +#include "config.h" +#include "p16f87x.h" +#include "pic-ioports.h" +#include "stimuli.h" + +//------------------------------------------------------------------- + +void P16F871::set_out_of_range_pm(uint address, uint value) +{ + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + { + get_eeprom()->change_rom(address - 0x2100, value); + } +} + +void P16F871::create_sfr_map() +{ + add_sfr_register(pir2, 0x0d, RegisterValue(0,0),"pir2"); + add_sfr_register(&pie2, 0x8d, RegisterValue(0,0)); + + // Parent classes just set PIR1 + pir_set_2_def.set_pir2(pir2_2_reg); + + usart.initialize(pir1,&(*m_portc)[6], &(*m_portc)[7], + new _TXREG(this,"txreg", "USART Transmit Register", &usart), + new _RCREG(this,"rcreg", "USART Receiver Register", &usart)); + + add_sfr_register(&usart.rcsta, 0x18, RegisterValue(0,0),"rcsta"); + add_sfr_register(&usart.txsta, 0x98, RegisterValue(2,0),"txsta"); + add_sfr_register(&usart.spbrg, 0x99, RegisterValue(0,0),"spbrg"); + add_sfr_register(usart.txreg, 0x19, RegisterValue(0,0),"txreg"); + add_sfr_register(usart.rcreg, 0x1a, RegisterValue(0,0),"rcreg"); + + intcon = &intcon_reg; + + if (pir2) { + pir2->set_intcon(&intcon_reg); + pir2->set_pie(&pie2); + } + pie2.setPir(get_pir2()); + + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x10c); + add_sfr_register(get_eeprom()->get_reg_eecon1(), 0x18c, RegisterValue(0,0)); + + // Enable program memory reads and writes. + get_eeprom()->get_reg_eecon1()->set_bits(EECON1::EEPGD); + + add_sfr_register(get_eeprom()->get_reg_eeadr(), 0x10d); + add_sfr_register(get_eeprom()->get_reg_eecon2(), 0x18d); + + get_eeprom()->get_reg_eedatah()->new_name("eedath"); + add_sfr_register(get_eeprom()->get_reg_eedatah(), 0x10e); + add_sfr_register(get_eeprom()->get_reg_eeadrh(), 0x10f); + + alias_file_registers(0x70,0x7f,0x80); + alias_file_registers(0x70,0x7f,0x100); + alias_file_registers(0x70,0x7f,0x180); + + alias_file_registers(0x00,0x04,0x100); + alias_file_registers(0x80,0x84,0x100); + + alias_file_registers(0x06,0x06,0x100); + alias_file_registers(0x86,0x86,0x100); + + //alias_file_registers(0x0a,0x0b,0x080); //already called + alias_file_registers(0x0a,0x0b,0x100); + alias_file_registers(0x0a,0x0b,0x180); + + //alias_file_registers(0x20,0x7f,0x100); // already called + alias_file_registers(0xa0,0xbf,0x100); + + add_sfr_register(&adcon0, 0x1f, RegisterValue(0,0)); + add_sfr_register(&adcon1, 0x9f, RegisterValue(0,0)); + add_sfr_register(&adres, 0x1e, RegisterValue(0,0)); + add_sfr_register(&adresl, 0x9e, RegisterValue(0,0)); + + //1adcon0.analog_port = porta; + //1adcon0.analog_port2 = porte; + + adcon0.setAdres(&adres); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(&intcon_reg); + adcon0.setPir(pir1); + adcon0.setChannel_Mask(7); + adcon0.setAdresLow(&adresl); + adcon0.setA2DBits(10); + + adcon1.setValidCfgBits(ADCON1::PCFG0 | ADCON1::PCFG1 | + ADCON1::PCFG2 | ADCON1::PCFG3, 0); + adcon1.setNumberOfChannels(8); + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[3]); + adcon1.setIOPin(4, &(*m_porta)[5]); + adcon1.setIOPin(5, &(*m_porte)[0]); + adcon1.setIOPin(6, &(*m_porte)[1]); + adcon1.setIOPin(7, &(*m_porte)[2]); + + adcon1.setChannelConfiguration(0, 0xff); + adcon1.setChannelConfiguration(1, 0xff); + adcon1.setChannelConfiguration(2, 0x1f); + adcon1.setChannelConfiguration(3, 0x1f); + adcon1.setChannelConfiguration(4, 0x0b); + adcon1.setChannelConfiguration(5, 0x0b); + adcon1.setChannelConfiguration(6, 0x00); + adcon1.setChannelConfiguration(7, 0x00); + adcon1.setChannelConfiguration(8, 0xff); + adcon1.setChannelConfiguration(9, 0x3f); + adcon1.setChannelConfiguration(10, 0x3f); + adcon1.setChannelConfiguration(11, 0x3f); + adcon1.setChannelConfiguration(12, 0x1f); + adcon1.setChannelConfiguration(13, 0x0f); + adcon1.setChannelConfiguration(14, 0x01); + adcon1.setChannelConfiguration(15, 0x0d); + + adcon1.setVrefHiConfiguration(1, 3); + adcon1.setVrefHiConfiguration(3, 3); + adcon1.setVrefHiConfiguration(5, 3); + adcon1.setVrefHiConfiguration(8, 3); + adcon1.setVrefHiConfiguration(10, 3); + adcon1.setVrefHiConfiguration(11, 3); + adcon1.setVrefHiConfiguration(12, 3); + adcon1.setVrefHiConfiguration(13, 3); + adcon1.setVrefHiConfiguration(15, 3); + + adcon1.setVrefLoConfiguration(8, 2); + adcon1.setVrefLoConfiguration(11, 2); + adcon1.setVrefLoConfiguration(12, 2); + adcon1.setVrefLoConfiguration(13, 2); + adcon1.setVrefLoConfiguration(15, 2); +} + +void P16F871::create() +{ + P16C64::create(); + + EEPROM_WIDE *e; + e = new EEPROM_WIDE(this,pir2); + e->initialize(eeprom_memory_size()); + e->set_intcon(&intcon_reg); + set_eeprom_wide(e); + + status->rp_mask = 0x60; // rp0 and rp1 are valid. + indf->base_address_mask1 = 0x80; // used for indirect accesses above 0x100 + indf->base_address_mask2 = 0x1ff; // used for indirect accesses above 0x100 + + P16F871::create_sfr_map(); +} + +Processor * P16F871::construct(const char *name) +{ + P16F871 *p = new P16F871(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +//======================================================================== +P16F871::P16F871(const char *_name, const char *desc) + : P16C64(_name,desc) , + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adres(this,"adres", "A2D Result"), + adresl(this,"adresl", "A2D Result Low"), + usart(this) +{ + //pir2 = &pir2_2_reg; + pir2_2_reg = new PIR2v2(this,"pir2","Peripheral Interrupt Register",&intcon_reg,&pie2); + delete pir2; + pir2 = pir2_2_reg; +} + +P16F871::~P16F871() +{ + remove_sfr_register(&pie2); + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&adres); + remove_sfr_register(&adresl); + remove_sfr_register(&usart.rcsta); + remove_sfr_register(&usart.txsta); + remove_sfr_register(&usart.spbrg); + delete_sfr_register(usart.txreg); + delete_sfr_register(usart.rcreg); + remove_sfr_register(get_eeprom()->get_reg_eedata()); + remove_sfr_register(get_eeprom()->get_reg_eecon1()); + remove_sfr_register(get_eeprom()->get_reg_eeadr()); + remove_sfr_register(get_eeprom()->get_reg_eecon2()); + remove_sfr_register(get_eeprom()->get_reg_eedatah()); + remove_sfr_register(get_eeprom()->get_reg_eeadrh()); + delete get_eeprom(); +} + +//------------------------------------------------------- +void P16F873::set_out_of_range_pm(uint address, uint value) +{ + + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + { + get_eeprom()->change_rom(address - 0x2100, value); + } +} + +void P16F873::create_sfr_map() +{ + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x10c); + add_sfr_register(get_eeprom()->get_reg_eecon1(), 0x18c, RegisterValue(0,0)); + + // Enable program memory reads and writes. + get_eeprom()->get_reg_eecon1()->set_bits(EECON1::EEPGD); + + add_sfr_register(get_eeprom()->get_reg_eeadr(), 0x10d); + add_sfr_register(get_eeprom()->get_reg_eecon2(), 0x18d); + + get_eeprom()->get_reg_eedatah()->new_name("eedath"); + add_sfr_register(get_eeprom()->get_reg_eedatah(), 0x10e); + add_sfr_register(get_eeprom()->get_reg_eeadrh(), 0x10f); + + alias_file_registers(0x80,0x80,0x80); + alias_file_registers(0x01,0x01,0x100); + alias_file_registers(0x82,0x84,0x80); + alias_file_registers(0x06,0x06,0x100); + alias_file_registers(0x8a,0x8b,0x80); + alias_file_registers(0x100,0x100,0x80); + alias_file_registers(0x81,0x81,0x100); + alias_file_registers(0x102,0x104,0x80); + alias_file_registers(0x86,0x86,0x100); + alias_file_registers(0x10a,0x10b,0x80); + + alias_file_registers(0x20,0x7f,0x100); + alias_file_registers(0xa0,0xff,0x100); + + // The rest of the A/D definition in 16C73 + add_sfr_register(&adresl, 0x9e, RegisterValue(0,0)); + adcon0.setAdresLow(&adresl); + adcon0.setA2DBits(10); + adcon1.setValidCfgBits(ADCON1::PCFG0 | ADCON1::PCFG1 | + ADCON1::PCFG2 | ADCON1::PCFG3 , 0); + + adcon1.setChannelConfiguration(0, 0x1f); + adcon1.setChannelConfiguration(1, 0x1f); + adcon1.setChannelConfiguration(2, 0x1f); + adcon1.setChannelConfiguration(3, 0x1f); + adcon1.setChannelConfiguration(4, 0x0b); + adcon1.setChannelConfiguration(5, 0x0b); + adcon1.setChannelConfiguration(6, 0x00); + adcon1.setChannelConfiguration(7, 0x00); + adcon1.setChannelConfiguration(8, 0x1f); + adcon1.setChannelConfiguration(9, 0x1f); + adcon1.setChannelConfiguration(10, 0x1f); + adcon1.setChannelConfiguration(11, 0x1f); + adcon1.setChannelConfiguration(12, 0x1f); + adcon1.setChannelConfiguration(13, 0x1f); + adcon1.setChannelConfiguration(14, 0x01); + adcon1.setChannelConfiguration(15, 0x0d); + + adcon1.setVrefHiConfiguration(1, 3); + adcon1.setVrefHiConfiguration(3, 3); + adcon1.setVrefHiConfiguration(5, 3); + adcon1.setVrefHiConfiguration(8, 3); + adcon1.setVrefHiConfiguration(10, 3); + adcon1.setVrefHiConfiguration(11, 3); + adcon1.setVrefHiConfiguration(12, 3); + adcon1.setVrefHiConfiguration(13, 3); + adcon1.setVrefHiConfiguration(15, 3); + + adcon1.setVrefLoConfiguration(8, 2); + adcon1.setVrefLoConfiguration(11, 2); + adcon1.setVrefLoConfiguration(12, 2); + adcon1.setVrefLoConfiguration(13, 2); + adcon1.setVrefLoConfiguration(15, 2); + add_sfr_register(&ssp.sspcon2, 0x91, RegisterValue(0,0) ,"sspcon2"); + + ssp.initialize( + get_pir_set(), // PIR + &(*m_portc)[3], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[5], // SDO + &(*m_portc)[4], // SDI + m_trisc, // i2c tris port + SSP_TYPE_MSSP + ); +} + +void P16F873::create() +{ + P16C73::create(); + + EEPROM_WIDE *e; + e = new EEPROM_WIDE(this,pir2); + e->initialize(eeprom_memory_size()); + e->set_intcon(&intcon_reg); + set_eeprom_wide(e); + + status->rp_mask = 0x60; // rp0 and rp1 are valid. + indf->base_address_mask1 = 0x80; // used for indirect accesses above 0x100 + indf->base_address_mask2 = 0x1ff; // used for indirect accesses above 0x100 + + P16F873::create_sfr_map(); +} + +//======================================================================== +Processor * P16F873::construct(const char *name) +{ + P16F873 *p = new P16F873(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +P16F873::P16F873(const char *_name, const char *desc) + : P16C73(_name,desc), + adresl(this,"adresl", "A2D Result Low") +{ + set_hasSSP(); +} + +P16F873::~P16F873() +{ + remove_sfr_register(&ssp.sspcon2); + remove_sfr_register(&adresl); + remove_sfr_register(get_eeprom()->get_reg_eedata()); + remove_sfr_register(get_eeprom()->get_reg_eecon1()); + remove_sfr_register(get_eeprom()->get_reg_eeadr()); + remove_sfr_register(get_eeprom()->get_reg_eecon2()); + remove_sfr_register(get_eeprom()->get_reg_eedatah()); + remove_sfr_register(get_eeprom()->get_reg_eeadrh()); + delete get_eeprom(); +} + +void P16F873A::create() +{ + P16F873::create(); + P16F873A::create_sfr_map(); +} + +void P16F873A::create_sfr_map() +{ + // Link the comparator and voltage ref to porta + comparator.initialize(get_pir_set(), + &(*m_porta)[2], &(*m_porta)[0], + &(*m_porta)[1], &(*m_porta)[2], + &(*m_porta)[3], &(*m_porta)[4], &(*m_porta)[5]); + + comparator.cmcon.set_configuration(1, 0, AN0, AN3, AN0, AN3, ZERO); + comparator.cmcon.set_configuration(2, 0, AN1, AN2, AN1, AN2, ZERO); + comparator.cmcon.set_configuration(1, 1, AN0, AN3, AN0, AN3, OUT0); + comparator.cmcon.set_configuration(2, 1, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(1, 2, AN0, AN3, AN0, AN3, NO_OUT); + comparator.cmcon.set_configuration(2, 2, AN1, AN2, AN1, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 3, AN0, AN3, AN0, AN3, OUT0); + comparator.cmcon.set_configuration(2, 3, AN1, AN2, AN1, AN2, OUT1); + comparator.cmcon.set_configuration(1, 4, AN0, AN3, AN0, AN3, NO_OUT); + comparator.cmcon.set_configuration(2, 4, AN1, AN3, AN1, AN3, NO_OUT); + comparator.cmcon.set_configuration(1, 5, AN0, AN3, AN0, AN3, OUT0); + comparator.cmcon.set_configuration(2, 5, AN1, AN3, AN1, AN3, OUT1); + comparator.cmcon.set_configuration(1, 6, AN0, VREF, AN3, VREF, NO_OUT); + comparator.cmcon.set_configuration(2, 6, AN1, VREF, AN2, VREF, NO_OUT); + comparator.cmcon.set_configuration(1, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + + + add_sfr_register(&comparator.cmcon, 0x9c, RegisterValue(7,0),"cmcon"); + add_sfr_register(&comparator.vrcon, 0x9d, RegisterValue(0,0),"vrcon"); + +} +Processor * P16F873A::construct(const char *name) +{ + P16F873A *p = new P16F873A(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +P16F873A::P16F873A(const char *_name, const char *desc) + : P16F873(_name,desc), + comparator(this) +{ +} + +P16F873A::~P16F873A() +{ + remove_sfr_register(&comparator.cmcon); + remove_sfr_register(&comparator.vrcon); +} + + +Processor * P16F876::construct(const char *name) +{ + P16F876 *p = new P16F876(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +void P16F876::set_out_of_range_pm(uint address, uint value) +{ + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + { + get_eeprom()->change_rom(address - 0x2100, value); + } +} + +void P16F876::create_sfr_map() +{ + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x10c); + add_sfr_register(get_eeprom()->get_reg_eecon1(), 0x18c, RegisterValue(0,0)); + + // Enable program memory reads and writes. + get_eeprom()->get_reg_eecon1()->set_bits(EECON1::EEPGD); + + add_sfr_register(get_eeprom()->get_reg_eeadr(), 0x10d); + add_sfr_register(get_eeprom()->get_reg_eecon2(), 0x18d); + + get_eeprom()->get_reg_eedatah()->new_name("eedath"); + add_sfr_register(get_eeprom()->get_reg_eedatah(), 0x10e); + add_sfr_register(get_eeprom()->get_reg_eeadrh(), 0x10f); + + alias_file_registers(0x80,0x80,0x80); + alias_file_registers(0x01,0x01,0x100); + alias_file_registers(0x82,0x84,0x80); + alias_file_registers(0x06,0x06,0x100); + alias_file_registers(0x8a,0x8b,0x80); + alias_file_registers(0x100,0x100,0x80); + alias_file_registers(0x81,0x81,0x100); + alias_file_registers(0x102,0x104,0x80); + alias_file_registers(0x86,0x86,0x100); + alias_file_registers(0x10a,0x10b,0x80); + + + add_file_registers(0x110, 0x16f, 0); + add_file_registers(0x190, 0x1ef, 0); + alias_file_registers(0x70,0x7f,0x80); + alias_file_registers(0x70,0x7f,0x100); + alias_file_registers(0x70,0x7f,0x180); + + // The rest of the A/D definition in 16C73 + add_sfr_register(&adresl, 0x9e, RegisterValue(0,0)); + adcon0.setAdresLow(&adresl); + adcon0.setA2DBits(10); + adcon1.setValidCfgBits(ADCON1::PCFG0 | ADCON1::PCFG1 | + ADCON1::PCFG2 | ADCON1::PCFG3 , 0); + + adcon1.setChannelConfiguration(0, 0x1f); + adcon1.setChannelConfiguration(1, 0x1f); + adcon1.setChannelConfiguration(2, 0x1f); + adcon1.setChannelConfiguration(3, 0x1f); + adcon1.setChannelConfiguration(4, 0x0b); + adcon1.setChannelConfiguration(5, 0x0b); + adcon1.setChannelConfiguration(6, 0x00); + adcon1.setChannelConfiguration(7, 0x00); + adcon1.setChannelConfiguration(8, 0x1f); + adcon1.setChannelConfiguration(9, 0x1f); + adcon1.setChannelConfiguration(10, 0x1f); + adcon1.setChannelConfiguration(11, 0x1f); + adcon1.setChannelConfiguration(12, 0x1f); + adcon1.setChannelConfiguration(13, 0x1f); + adcon1.setChannelConfiguration(14, 0x01); + adcon1.setChannelConfiguration(15, 0x0d); + + adcon1.setVrefHiConfiguration(1, 3); + adcon1.setVrefHiConfiguration(3, 3); + adcon1.setVrefHiConfiguration(5, 3); + adcon1.setVrefHiConfiguration(8, 3); + adcon1.setVrefHiConfiguration(10, 3); + adcon1.setVrefHiConfiguration(11, 3); + adcon1.setVrefHiConfiguration(12, 3); + adcon1.setVrefHiConfiguration(13, 3); + adcon1.setVrefHiConfiguration(15, 3); + + adcon1.setVrefLoConfiguration(8, 2); + adcon1.setVrefLoConfiguration(11, 2); + adcon1.setVrefLoConfiguration(12, 2); + adcon1.setVrefLoConfiguration(13, 2); + adcon1.setVrefLoConfiguration(15, 2); + add_sfr_register(&ssp.sspcon2, 0x91, RegisterValue(0,0) ,"sspcon2"); + + ssp.initialize( + get_pir_set(), // PIR + &(*m_portc)[3], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[5], // SDO + &(*m_portc)[4], // SDI + m_trisc, // i2c tris port + SSP_TYPE_MSSP + ); +} + +void P16F876::create() +{ + P16C73::create(); + + EEPROM_WIDE *e; + e = new EEPROM_WIDE(this,pir2); + e->initialize(eeprom_memory_size()); + e->set_intcon(&intcon_reg); + set_eeprom_wide(e); + + status->rp_mask = 0x60; // rp0 and rp1 are valid. + indf->base_address_mask1 = 0x80; // used for indirect accesses above 0x100 + indf->base_address_mask2 = 0x1ff; // used for indirect accesses above 0x100 + + P16F876::create_sfr_map(); +} + +P16F876::P16F876(const char *_name, const char *desc) + : P16C73(_name,desc), + adresl(this,"adresl", "A2D Result Low") +{ +} + +P16F876::~P16F876() +{ + remove_sfr_register(get_eeprom()->get_reg_eedata()); + remove_sfr_register(get_eeprom()->get_reg_eecon1()); + remove_sfr_register(get_eeprom()->get_reg_eeadr()); + remove_sfr_register(get_eeprom()->get_reg_eecon2()); + remove_sfr_register(get_eeprom()->get_reg_eedatah()); + remove_sfr_register(get_eeprom()->get_reg_eeadrh()); + delete get_eeprom(); + remove_sfr_register(&ssp.sspcon2); + remove_sfr_register(&adresl); + + delete_file_registers(0x110, 0x16f); + delete_file_registers(0x190, 0x1ef); +} + +Processor * P16F876A::construct(const char *name) +{ + P16F876A *p = new P16F876A(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +void P16F876A::create_sfr_map() +{ +} + +void P16F876A::create() +{ + P16F873A::create(); + + // get rid of aliases + delete_file_registers(0x20,0x7f); // get rid of aliases + delete_file_registers(0xa0,0xff); // "" + add_file_registers(0x20,0x7f, 0); + add_file_registers(0xa0, 0xef,0); + add_file_registers(0x110, 0x16f, 0); + add_file_registers(0x190, 0x1ef, 0); + alias_file_registers(0x70,0x7f,0x80); + alias_file_registers(0x70,0x7f,0x100); + alias_file_registers(0x70,0x7f,0x180); + + P16F876A::create_sfr_map(); +} + +P16F876A::P16F876A(const char *_name, const char *desc) + : P16F873A(_name,desc), + comparator(this) +{ +} + +P16F876A::~P16F876A() +{ + delete_file_registers(0x110, 0x16f); + delete_file_registers(0x190, 0x1ef); +} + +//------------------------------------------------------- + +void P16F874::set_out_of_range_pm(uint address, uint value) +{ + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + { + get_eeprom()->change_rom(address - 0x2100, value); + } +} + +void P16F874::create_sfr_map() +{ + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x10c); + add_sfr_register(get_eeprom()->get_reg_eecon1(), 0x18c, RegisterValue(0,0)); + + // Enable program memory reads and writes. + get_eeprom()->get_reg_eecon1()->set_bits(EECON1::EEPGD); + + add_sfr_register(get_eeprom()->get_reg_eeadr(), 0x10d); + add_sfr_register(get_eeprom()->get_reg_eecon2(), 0x18d); + + get_eeprom()->get_reg_eedatah()->new_name("eedath"); + add_sfr_register(get_eeprom()->get_reg_eedatah(), 0x10e); + add_sfr_register(get_eeprom()->get_reg_eeadrh(), 0x10f); + + + alias_file_registers(0x80,0x80,0x80); + alias_file_registers(0x01,0x01,0x100); + alias_file_registers(0x82,0x84,0x80); + alias_file_registers(0x06,0x06,0x100); + alias_file_registers(0x8a,0x8b,0x80); + alias_file_registers(0x100,0x100,0x80); + alias_file_registers(0x81,0x81,0x100); + alias_file_registers(0x102,0x104,0x80); + alias_file_registers(0x86,0x86,0x100); + alias_file_registers(0x10a,0x10b,0x80); + + alias_file_registers(0x20,0x7f,0x100); + alias_file_registers(0xa0,0xff,0x100); + + // The rest of the A/D definition in 16C74 + add_sfr_register(&adresl, 0x9e, RegisterValue(0,0)); + adcon0.setA2DBits(10); + adcon0.setAdresLow(&adresl); + + + adcon1.setValidCfgBits(ADCON1::PCFG0 | ADCON1::PCFG1 | + ADCON1::PCFG2 | ADCON1::PCFG3, 0); + + adcon1.setChannelConfiguration(0, 0xff); + adcon1.setChannelConfiguration(1, 0xff); + adcon1.setChannelConfiguration(2, 0x1f); + adcon1.setChannelConfiguration(3, 0x1f); + adcon1.setChannelConfiguration(4, 0x0b); + adcon1.setChannelConfiguration(5, 0x0b); + adcon1.setChannelConfiguration(6, 0x00); + adcon1.setChannelConfiguration(7, 0x00); + adcon1.setChannelConfiguration(8, 0xff); + adcon1.setChannelConfiguration(9, 0x3f); + adcon1.setChannelConfiguration(10, 0x3f); + adcon1.setChannelConfiguration(11, 0x3f); + adcon1.setChannelConfiguration(12, 0x3f); + adcon1.setChannelConfiguration(13, 0x1f); + adcon1.setChannelConfiguration(14, 0x01); + adcon1.setChannelConfiguration(15, 0x0d); + + adcon1.setVrefHiConfiguration(1, 3); + adcon1.setVrefHiConfiguration(3, 3); + adcon1.setVrefHiConfiguration(5, 3); + adcon1.setVrefHiConfiguration(8, 3); + adcon1.setVrefHiConfiguration(10, 3); + adcon1.setVrefHiConfiguration(11, 3); + adcon1.setVrefHiConfiguration(12, 3); + adcon1.setVrefHiConfiguration(13, 3); + adcon1.setVrefHiConfiguration(15, 3); + + adcon1.setVrefLoConfiguration(8, 2); + adcon1.setVrefLoConfiguration(11, 2); + adcon1.setVrefLoConfiguration(12, 2); + adcon1.setVrefLoConfiguration(13, 2); + adcon1.setVrefLoConfiguration(15, 2); + add_sfr_register(&ssp.sspcon2, 0x91, RegisterValue(0,0) ,"sspcon2"); + ssp.initialize( + get_pir_set(), // PIR + &(*m_portc)[3], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[5], // SDO + &(*m_portc)[4], // SDI + m_trisc, // i2c tris port + SSP_TYPE_MSSP + ); +} + +void P16F874::create() +{ + P16C74::create(); + + EEPROM_WIDE *e; + e = new EEPROM_WIDE(this,pir2); + e->initialize(eeprom_memory_size()); + + e->set_intcon(&intcon_reg); + set_eeprom_wide(e); + + status->rp_mask = 0x60; // rp0 and rp1 are valid. + indf->base_address_mask1 = 0x80; // used for indirect accesses above 0x100 + indf->base_address_mask2 = 0x1ff; // used for indirect accesses above 0x100 + + P16F874::create_sfr_map(); +} + +Processor * P16F874::construct(const char *name) +{ + P16F874 *p = new P16F874(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +P16F874::P16F874(const char *_name, const char *desc) + : P16C74(_name,desc), + comparator(this), + adresl(this,"adresl", "A2D Result Low") +{ + set_hasSSP(); +} + +P16F874::~P16F874() +{ + remove_sfr_register(&adresl); + remove_sfr_register(&ssp.sspcon2); + remove_sfr_register(get_eeprom()->get_reg_eedata()); + remove_sfr_register(get_eeprom()->get_reg_eecon1()); + remove_sfr_register(get_eeprom()->get_reg_eeadr()); + remove_sfr_register(get_eeprom()->get_reg_eecon2()); + remove_sfr_register(get_eeprom()->get_reg_eedatah()); + remove_sfr_register(get_eeprom()->get_reg_eeadrh()); + delete get_eeprom(); +} + +//------------------------------------------------------ +void P16F874A::set_out_of_range_pm(uint address, uint value) +{ + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + { + get_eeprom()->change_rom(address - 0x2100, value); + } +} + +void P16F874A::create_sfr_map() +{ + // Link the comparator and voltage ref to porta + comparator.initialize(get_pir_set(), + &(*m_porta)[2], &(*m_porta)[0], + &(*m_porta)[1], &(*m_porta)[2], + &(*m_porta)[3], &(*m_porta)[4], &(*m_porta)[5]); + + comparator.cmcon.set_configuration(1, 0, AN0, AN3, AN0, AN3, ZERO); + comparator.cmcon.set_configuration(2, 0, AN1, AN2, AN1, AN2, ZERO); + comparator.cmcon.set_configuration(1, 1, AN0, AN3, AN0, AN3, OUT0); + comparator.cmcon.set_configuration(2, 1, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(1, 2, AN0, AN3, AN0, AN3, NO_OUT); + comparator.cmcon.set_configuration(2, 2, AN1, AN2, AN1, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 3, AN0, AN3, AN0, AN3, OUT0); + comparator.cmcon.set_configuration(2, 3, AN1, AN2, AN1, AN2, OUT1); + comparator.cmcon.set_configuration(1, 4, AN0, AN3, AN0, AN3, NO_OUT); + comparator.cmcon.set_configuration(2, 4, AN1, AN3, AN1, AN3, NO_OUT); + comparator.cmcon.set_configuration(1, 5, AN0, AN3, AN0, AN3, OUT0); + comparator.cmcon.set_configuration(2, 5, AN1, AN3, AN1, AN3, OUT1); + comparator.cmcon.set_configuration(1, 6, AN0, VREF, AN3, VREF, NO_OUT); + comparator.cmcon.set_configuration(2, 6, AN1, VREF, AN2, VREF, NO_OUT); + comparator.cmcon.set_configuration(1, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + + add_sfr_register(&comparator.cmcon, 0x9c, RegisterValue(7,0),"cmcon"); + add_sfr_register(&comparator.vrcon, 0x9d, RegisterValue(0,0),"vrcon"); +} + +void P16F874A::create() +{ + P16F874::create(); + P16F874A::create_sfr_map(); +} + +Processor * P16F874A::construct(const char *name) +{ + P16F874A *p = new P16F874A(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +P16F874A::P16F874A(const char *_name, const char *desc) + : P16F874(_name,desc), + comparator(this) +{ +} + +P16F874A::~P16F874A() +{ + remove_sfr_register(&comparator.cmcon); + remove_sfr_register(&comparator.vrcon); +} + +void P16F877::create_sfr_map() +{ +} + +void P16F877::create() +{ + P16F874::create(); + + delete_file_registers(0x20, 0x7f); // get rid of alias registers + delete_file_registers(0xa0, 0xff); // "" + add_file_registers(0x20, 0x7f, 0); + add_file_registers(0xa0, 0xef, 0); + add_file_registers(0x110, 0x16f, 0); + add_file_registers(0x190, 0x1ef, 0); + alias_file_registers(0x70,0x7f,0x80); + alias_file_registers(0x70,0x7f,0x100); + alias_file_registers(0x70,0x7f,0x180); + + P16F877::create_sfr_map(); +} + +Processor * P16F877::construct(const char *name) +{ + P16F877 *p = new P16F877(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +P16F877::P16F877(const char *_name, const char *desc) + : P16F874(_name,desc) +{ +} + +P16F877::~P16F877() +{ + delete_file_registers(0x110, 0x16f); + delete_file_registers(0x190, 0x1ef); +} + +void P16F877A::create_sfr_map() +{ +} + +void P16F877A::create() +{ + P16F874A::create(); + + delete_file_registers(0x20, 0x7f); // get rid of alias registers + delete_file_registers(0xa0, 0xff); // "" + add_file_registers(0x20, 0x7f, 0); + add_file_registers(0xa0, 0xef, 0); + + add_file_registers(0x110, 0x16f, 0); + add_file_registers(0x190, 0x1ef, 0); + alias_file_registers(0x70,0x7f,0x80); + alias_file_registers(0x70,0x7f,0x100); + alias_file_registers(0x70,0x7f,0x180); + + P16F877A::create_sfr_map(); +} + +Processor * P16F877A::construct(const char *name) +{ + P16F877A *p = new P16F877A(name); + + p->create(); + p->create_invalid_registers (); + return p; +} + +P16F877A::P16F877A(const char *_name, const char *desc) + : P16F874A(_name,desc), + comparator(this) +{ +} + +P16F877A::~P16F877A() +{ + delete_file_registers(0x110, 0x16f); + delete_file_registers(0x190, 0x1ef); +} diff --git a/src/gpsim/devices/p16f87x.h b/src/gpsim/devices/p16f87x.h new file mode 100644 index 0000000..d4842ba --- /dev/null +++ b/src/gpsim/devices/p16f87x.h @@ -0,0 +1,267 @@ +/* + Copyright (C) 1998-2000 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __P16F87X_H__ +#define __P16F87X_H__ + +#include "p16x7x.h" + +#include "eeprom.h" +#include "comparator.h" + +class IOPORT; + + +class P16F871 : public P16C64 // The 74 has too much RAM and too many CCPs +{ + public: + // XXX + // This pir1_2, pir2_2 stuff is not particularly pretty. It would be + // better to just tell C++ to redefine pir1 and pir2 and PIR1v2 and + // PIR2v2, but C++ only supports covariance in member function return + // values. + PIR2v2 *pir2_2_reg; + + virtual PIR *get_pir2() { return (pir2_2_reg); } + + ADCON0 adcon0; + ADCON1 adcon1; + sfr_register adres; + sfr_register adresl; + + USART_MODULE usart; + + // That now brings us up to spec with the 74 as far as we need to be + + + virtual void set_out_of_range_pm(uint address, uint value); + + virtual PROCESSOR_TYPE isa(){return _P16F871_;}; + virtual uint program_memory_size() const { return 0x0800; }; + virtual uint eeprom_memory_size() const { return 64; }; + + void create_sfr_map(); + void create(); + virtual uint register_memory_size () const { return 0x200;}; + + P16F871(const char *_name=0, const char *desc=0); + ~P16F871(); + static Processor *construct(const char *name); + + virtual void set_eeprom(EEPROM *ep) { + // use set_eeprom_wide as P16F871 expect a wide EEPROM + assert(0); + + } + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { + eeprom = ep; + } + virtual EEPROM_WIDE *get_eeprom() { return ((EEPROM_WIDE *)eeprom); } + + +private: + +}; + + + + +class P16F873 : public P16C73 +{ + + public: + + sfr_register adresl; + + virtual void set_out_of_range_pm(uint address, uint value); + + virtual PROCESSOR_TYPE isa(){return _P16F873_;}; + virtual uint program_memory_size() const { return 0x1000; }; + + void create_sfr_map(); + void create(); + virtual uint register_memory_size () const { return 0x200;}; + + P16F873(const char *_name=0, const char *desc=0); + ~P16F873(); + + virtual void set_eeprom(EEPROM *ep) { + // use set_eeprom_wide as P16F873 expect a wide EEPROM + assert(0); + } + virtual uint eeprom_memory_size() const { return 128; }; + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { + eeprom = ep; + } + virtual EEPROM_WIDE *get_eeprom() { return ((EEPROM_WIDE *)eeprom); } + static Processor *construct(const char *name); + +private: + +}; + + +class P16F873A : public P16F873 +{ +public: + ComparatorModule comparator; + virtual PROCESSOR_TYPE isa(){return _P16F873A_;}; + + void create_sfr_map(); + void create(); + + P16F873A(const char *_name=0, const char *desc=0); + ~P16F873A(); + static Processor *construct(const char *name); +}; + + +class P16F876 : public P16C73 +{ + public: + + sfr_register adresl; + virtual void set_out_of_range_pm(uint address, uint value); + + virtual PROCESSOR_TYPE isa(){return _P16F876_;}; + virtual uint program_memory_size() const { return 0x2000; }; + + void create_sfr_map(); + void create(); + virtual uint register_memory_size () const { return 0x200;}; + + P16F876(const char *_name=0, const char *desc=0); + ~P16F876(); + static Processor *construct(const char *name); + + virtual void set_eeprom(EEPROM *ep) { + // use set_eeprom_wide as P16F873 expect a wide EEPROM + assert(0); + } + virtual uint eeprom_memory_size() const { return 256; }; + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { + eeprom = ep; + } + virtual EEPROM_WIDE *get_eeprom() { return ((EEPROM_WIDE *)eeprom); } +}; + +class P16F876A : public P16F873A +{ + public: + ComparatorModule comparator; + virtual PROCESSOR_TYPE isa(){return _P16F876A_;}; + virtual uint program_memory_size() const { return 0x2000; }; + virtual uint eeprom_memory_size() const { return 256; }; + + void create_sfr_map(); + void create(); + virtual uint register_memory_size () const { return 0x200;}; + + P16F876A(const char *_name=0, const char *desc=0); + ~P16F876A(); + static Processor *construct(const char *name); +}; + + +class P16F874 : public P16C74 +{ +public: + ComparatorModule comparator; + + sfr_register adresl; + + virtual void set_out_of_range_pm(uint address, uint value); + + virtual PROCESSOR_TYPE isa(){return _P16F874_;}; + virtual uint program_memory_size() const { return 0x1000; }; + + void create_sfr_map(); + void create(); + virtual uint register_memory_size () const { return 0x200;}; + + P16F874(const char *_name=0, const char *desc=0); + ~P16F874(); + static Processor *construct(const char *name); + + virtual uint eeprom_memory_size() const { return 128; }; + virtual void set_eeprom(EEPROM *ep) { + // use set_eeprom_wide as P16F873 expect a wide EEPROM + assert(0); + } + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { + eeprom = ep; + } + virtual EEPROM_WIDE *get_eeprom() { return ((EEPROM_WIDE *)eeprom); } + //virtual bool hasSSP() { return true;} +}; + +class P16F877 : public P16F874 +{ +public: + virtual PROCESSOR_TYPE isa(){return _P16F877_;}; + virtual uint program_memory_size() const { return 0x2000; }; + virtual uint eeprom_memory_size() const { return 256; }; + + void create_sfr_map(); + void create(); + + P16F877(const char *_name=0, const char *desc=0); + ~P16F877(); + static Processor *construct(const char *name); +}; + +class P16F874A : public P16F874 +{ +public: + ComparatorModule comparator; + + virtual void set_out_of_range_pm(uint address, uint value); + + virtual PROCESSOR_TYPE isa(){return _P16F874A_;}; + virtual uint program_memory_size() const { return 0x1000; }; + virtual uint eeprom_memory_size() const { return 256; }; + + void create_sfr_map(); + void create(); + virtual uint register_memory_size () const { return 0x200;}; + + P16F874A(const char *_name=0, const char *desc=0); + ~P16F874A(); + static Processor *construct(const char *name); + +}; + +class P16F877A : public P16F874A +{ +public: + ComparatorModule comparator; + virtual PROCESSOR_TYPE isa(){return _P16F877A_;}; + virtual uint program_memory_size() const { return 0x2000; }; + virtual uint eeprom_memory_size() const { return 256; }; + + void create_sfr_map(); + void create(); + + P16F877A(const char *_name=0, const char *desc=0); + ~P16F877A(); + static Processor *construct(const char *name); +}; + +#endif diff --git a/src/gpsim/devices/p16f88x.cc b/src/gpsim/devices/p16f88x.cc new file mode 100644 index 0000000..51cd429 --- /dev/null +++ b/src/gpsim/devices/p16f88x.cc @@ -0,0 +1,2067 @@ +/* + * + Copyright (C) 2010,2015 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +// +// p16f88x +// +// This file supports: +// PIC16F882 +// PIC16F883 +// PIC16F884 +// PIC16F885 +// PIC16F886 +// PIC16F887 +// + +#include +#include +#include + +//#include "config.h" + +#include "stimuli.h" + +#include "p16f88x.h" +#include "pic-ioports.h" +#include "packages.h" + +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("%s:%d-%s() ",__FILE__,__LINE__, __FUNCTION__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +//======================================================================== +// +// Configuration Memory for the 16F8X devices. + +class Config188x : public ConfigWord +{ +public: + Config188x(P16F88x *pCpu) + : ConfigWord("CONFIG188x", 0x3fff, "Configuration Word", pCpu, 0x2007) + { + } + enum { + FOSC0 = 1<<0, + FOSC1 = 1<<1, + FOSC2 = 1<<2, + WDTEN = 1<<3, + PWRTEN = 1<<4, + MCLRE = 1<<5, + + BOREN = 1<<8, + BOREN1 = 1<<9, + LVP = 1<<12, + + CPD = 1<<8, + WRT0 = 1<<9, + WRT1 = 1<<10, + NOT_DEBUG = 1<<11, + }; + + virtual void set(int64_t v) + { + Integer::set(v); + Dprintf(("Config188x set %x\n", (int)v)); + if (m_pCpu) + { + m_pCpu->wdt.initialize((v & WDTEN) == WDTEN); + } + } +}; + + +//======================================================================== + +P16F88x::P16F88x(const char *_name, const char *desc) + : _14bit_processor(_name,desc), + intcon_reg(this,"intcon","Interrupt Control"), + t1con(this, "t1con", "TMR1 Control"), + pie1(this,"PIE1", "Peripheral Interrupt Enable"), + pie2(this,"PIE2", "Peripheral Interrupt Enable"), + t2con(this, "t2con", "TMR2 Control"), + pr2(this, "pr2", "TMR2 Period Register"), + tmr2(this, "tmr2", "TMR2 Register"), + tmr1l(this, "tmr1l", "TMR1 Low"), + tmr1h(this, "tmr1h", "TMR1 High"), + ccp1con(this, "ccp1con", "Capture Compare Control"), + ccpr1l(this, "ccpr1l", "Capture Compare 1 Low"), + ccpr1h(this, "ccpr1h", "Capture Compare 1 High"), + ccp2con(this, "ccp2con", "Capture Compare Control"), + ccpr2l(this, "ccpr2l", "Capture Compare 2 Low"), + ccpr2h(this, "ccpr2h", "Capture Compare 2 High"), + pcon(this, "pcon", "pcon"), + ssp(this), + osccon(0), + osctune(this, "osctune", "OSC Tune"), + wdtcon(this, "wdtcon", "WDT Control", 1), + usart(this), + comparator(this), + vrcon(this, "vrcon", "Voltage Reference Control Register"), + srcon(this, "srcon", "SR Latch Control Resgister"), + ansel(this,"ansel", "Analog Select"), + anselh(this,"anselh", "Analog Select high"), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + eccpas(this, "eccpas", "ECCP Auto-Shutdown Control Register"), + pwm1con(this, "pwm1con", "Enhanced PWM Control Register"), + pstrcon(this, "pstrcon", "Pulse Sterring Control Register"), + adresh(this,"adresh", "A2D Result High"), + adresl(this,"adresl", "A2D Result Low") +{ + + m_porta = new PicPortRegister(this,"porta","", 8,0x1f); + m_trisa = new PicTrisRegister(this,"trisa","", m_porta, false); + m_ioc = new IOC(this, "iocb", "Interrupt-On-Change B Register"); + m_portb = new PicPortGRegister(this,"portb","", &intcon_reg, m_ioc,8,0xff); + m_trisb = new PicTrisRegister(this,"trisb","", m_portb, false); + m_portc = new PicPortRegister(this,"portc","",8,0xff); + m_trisc = new PicTrisRegister(this,"trisc","",m_portc, false); + m_porte = new PicPortRegister(this,"porte","",8,0x0f); + m_trise = new PicPSP_TrisRegister(this,"trise","",m_porte, false); + + pir1_2_reg = new PIR1v2(this,"pir1","Peripheral Interrupt Register",&intcon_reg,&pie1); + pir2_2_reg = new PIR2v3(this,"pir2","Peripheral Interrupt Register",&intcon_reg,&pie2); + pir1 = pir1_2_reg; + pir2 = pir2_2_reg; + m_wpu = new WPU(this, "wpub", "Weak Pull-up Register", m_portb, 0xff); + + tmr0.set_cpu(this, m_porta, 4, option_reg); + tmr0.start(0); + comparator.cmxcon0[0] = new CMxCON0_V2(this, "cm1con0", + " Comparator C1 Control Register 0", 0, &comparator); + comparator.cmxcon0[1] = new CMxCON0_V2(this, "cm2con0", + " Comparator C2 Control Register 0", 1, &comparator); + comparator.cmxcon1[0] = new CM2CON1_V3(this, "cm2con1", + " Comparator C1 Control Register 1", 0, &comparator); + comparator.cmxcon1[1] = comparator.cmxcon1[0]; +} + +P16F88x::~P16F88x() +{ + unassignMCLRPin(); + delete_file_registers(0x20, 0x7f); + delete_file_registers(0xa0, 0xbf); + + remove_sfr_register(&tmr0); + remove_sfr_register(&intcon_reg); + remove_sfr_register(&pie2); + remove_sfr_register(&pie1); + remove_sfr_register(&tmr1l); + remove_sfr_register(&tmr1h); + remove_sfr_register(&pcon); + remove_sfr_register(&t1con); + remove_sfr_register(&tmr2); + remove_sfr_register(&t2con); + remove_sfr_register(&pr2); + remove_sfr_register(get_eeprom()->get_reg_eedata()); + remove_sfr_register(get_eeprom()->get_reg_eeadr()); + remove_sfr_register(get_eeprom()->get_reg_eedatah()); + remove_sfr_register(get_eeprom()->get_reg_eeadrh()); + remove_sfr_register(get_eeprom()->get_reg_eecon1()); + remove_sfr_register(get_eeprom()->get_reg_eecon2()); + delete get_eeprom(); + + remove_sfr_register(&intcon_reg); + remove_sfr_register(osccon); + remove_sfr_register(&osctune); + remove_sfr_register(&usart.rcsta); + remove_sfr_register(&usart.txsta); + remove_sfr_register(&usart.spbrg); + remove_sfr_register(&usart.spbrgh); + remove_sfr_register(&usart.baudcon); + remove_sfr_register(&vrcon); + remove_sfr_register(&srcon); + remove_sfr_register(&wdtcon); + remove_sfr_register(&ccpr2l); + remove_sfr_register(&ccpr2h); + remove_sfr_register(&ccp2con); + remove_sfr_register(&adresl); + remove_sfr_register(&adresh); + remove_sfr_register(&ansel); + remove_sfr_register(&anselh); + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&ccpr1l); + remove_sfr_register(&ccpr1h); + remove_sfr_register(&ccp1con); + remove_sfr_register(&ccpr2l); + remove_sfr_register(&ccpr2h); + remove_sfr_register(&ccp2con); + remove_sfr_register(&pwm1con); + remove_sfr_register(&pstrcon); + remove_sfr_register(&eccpas); + remove_sfr_register(&ssp.sspcon2); + remove_sfr_register(&ssp.sspbuf); + remove_sfr_register(&ssp.sspcon); + remove_sfr_register(&ssp.sspadd); + remove_sfr_register(&ssp.sspstat); + delete_sfr_register(usart.txreg); + delete_sfr_register(usart.rcreg); + remove_sfr_register(comparator.cmxcon0[0]); + remove_sfr_register(comparator.cmxcon0[1]); + remove_sfr_register(comparator.cmxcon1[1]); + + delete_sfr_register(m_porta); + delete_sfr_register(m_trisa); + delete_sfr_register(m_portb); + delete_sfr_register(m_trisb); + delete_sfr_register(m_porte); + delete_sfr_register(m_trise); + delete_sfr_register(m_portc); + delete_sfr_register(m_trisc); + + delete_sfr_register(pir1); + delete_sfr_register(pir2); + delete_sfr_register(m_wpu); + delete_sfr_register(m_ioc); +} + +void P16F88x::create_iopin_map() +{ + fprintf(stderr, "%s should be defined at a higer level\n", __FUNCTION__); +} + +void P16F88x::create_sfr_map() +{ + add_sfr_register(indf, 0x00); + alias_file_registers(0x00,0x00,0x80); + + add_sfr_register(&tmr0, 0x01); + add_sfr_register(option_reg, 0x81, RegisterValue(0xff,0)); + + add_sfr_register(pcl, 0x02, RegisterValue(0,0)); + add_sfr_register(status, 0x03, RegisterValue(0x18,0)); + add_sfr_register(fsr, 0x04); + alias_file_registers(0x02,0x04,0x80); + + add_sfr_register(m_porta, 0x05); + add_sfr_register(m_trisa, 0x85, RegisterValue(0x3f,0)); + + add_sfr_register(m_portb, 0x06); + add_sfr_register(m_trisb, 0x86, RegisterValue(0xff,0)); + + add_sfr_register(pclath, 0x0a, RegisterValue(0,0)); + + add_sfr_register(&intcon_reg, 0x0b, RegisterValue(0,0)); + //alias_file_registers(0x0a,0x0b,0x80); //Already donw + + intcon = &intcon_reg; + + pir_set_2_def.set_pir1(pir1); + pir_set_2_def.set_pir2(pir2); + + add_sfr_register(m_porte, 0x09); + add_sfr_register(m_trise, 0x89, RegisterValue(0xff,0)); + add_sfr_register(m_portc, 0x07); + add_sfr_register(m_trisc, 0x87, RegisterValue(0xff,0)); + + add_file_registers(0x20, 0x7f, 0); + add_file_registers(0xa0, 0xbf, 0); + + alias_file_registers(0x70,0x7f,0x80); + alias_file_registers(0x70,0x7f,0x100); + alias_file_registers(0x70,0x7f,0x180); + + add_sfr_register(get_pir2(), 0x0d, RegisterValue(0,0),"pir2"); + add_sfr_register(&pie2, 0x8d, RegisterValue(0,0)); + + pir_set_2_def.set_pir2(pir2); + + pie2.setPir(get_pir2()); + alias_file_registers(0x00,0x04,0x100); + alias_file_registers(0x80,0x84,0x100); + alias_file_registers(0x06,0x06,0x100); + alias_file_registers(0x86,0x86,0x100); + + add_sfr_register(pir1, 0x0c, RegisterValue(0,0),"pir1"); + add_sfr_register(&pie1, 0x8c, RegisterValue(0,0)); + + add_sfr_register(&tmr1l, 0x0e, RegisterValue(0,0),"tmr1l"); + add_sfr_register(&tmr1h, 0x0f, RegisterValue(0,0),"tmr1h"); + + add_sfr_register(&pcon, 0x8e, RegisterValue(0,0),"pcon"); + + add_sfr_register(&t1con, 0x10, RegisterValue(0,0)); + add_sfr_register(&tmr2, 0x11, RegisterValue(0,0)); + add_sfr_register(&t2con, 0x12, RegisterValue(0,0)); + add_sfr_register(&pr2, 0x92, RegisterValue(0xff,0)); + + get_eeprom()->get_reg_eedata()->new_name("eedat"); + get_eeprom()->get_reg_eedatah()->new_name("eedath"); + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x10c); + add_sfr_register(get_eeprom()->get_reg_eeadr(), 0x10d); + add_sfr_register(get_eeprom()->get_reg_eedatah(), 0x10e); + add_sfr_register(get_eeprom()->get_reg_eeadrh(), 0x10f); + add_sfr_register(get_eeprom()->get_reg_eecon1(), 0x18c, RegisterValue(0,0)); + get_eeprom()->get_reg_eecon1()->set_bits(EECON1::EEPGD); + add_sfr_register(get_eeprom()->get_reg_eecon2(), 0x18d); + + alias_file_registers(0x0a,0x0b,0x080); + alias_file_registers(0x0a,0x0b,0x100); + alias_file_registers(0x0a,0x0b,0x180); + + intcon_reg.set_pir_set(get_pir_set()); + + add_sfr_register(osccon, 0x8f, RegisterValue(0x60,0),"osccon"); + add_sfr_register(&osctune, 0x90, RegisterValue(0,0),"osctune"); + + osccon->set_osctune(&osctune); + osctune.set_osccon(osccon); + + usart.initialize(pir1,&(*m_portc)[6], &(*m_portc)[7], + new _TXREG(this,"txreg", "USART Transmit Register", &usart), + new _RCREG(this,"rcreg", "USART Receiver Register", &usart)); + + add_sfr_register(&usart.rcsta, 0x18, RegisterValue(0,0),"rcsta"); + add_sfr_register(&usart.txsta, 0x98, RegisterValue(2,0),"txsta"); + add_sfr_register(&usart.spbrg, 0x99, RegisterValue(0,0),"spbrg"); + add_sfr_register(&usart.spbrgh, 0x9a, RegisterValue(0,0),"spbrgh"); + add_sfr_register(&usart.baudcon, 0x187,RegisterValue(0x40,0),"baudctl"); + add_sfr_register(usart.txreg, 0x19, RegisterValue(0,0),"txreg"); + add_sfr_register(usart.rcreg, 0x1a, RegisterValue(0,0),"rcreg"); + usart.set_eusart(true); + comparator.assign_tmr1l(&tmr1l); + comparator.cmxcon1[1]->set_vrcon(&vrcon); + + add_sfr_register(comparator.cmxcon0[0], 0x107, RegisterValue(0,0), "cm1con0"); + add_sfr_register(comparator.cmxcon0[1], 0x108, RegisterValue(0,0), "cm2con0"); + add_sfr_register(comparator.cmxcon1[1], 0x109, RegisterValue(2,0), "cm2con1"); + add_sfr_register(&vrcon, 0x97, RegisterValue(0,0),"vrcon"); + add_sfr_register(&srcon, 0x185, RegisterValue(0,0),"srcon"); + add_sfr_register(&wdtcon, 0x105, RegisterValue(0x08,0),"wdtcon"); + add_sfr_register(&adresl, 0x9e, RegisterValue(0,0)); + add_sfr_register(&adresh, 0x1e, RegisterValue(0,0)); + add_sfr_register(&ansel, 0x188, RegisterValue(0xff,0)); + add_sfr_register(&anselh, 0x189, RegisterValue(0xff,0)); + add_sfr_register(&adcon0, 0x1f, RegisterValue(0,0)); + add_sfr_register(&adcon1, 0x9f, RegisterValue(0,0)); + add_sfr_register(m_wpu, 0x95, RegisterValue(0xff,0)); + add_sfr_register(m_ioc, 0x96, RegisterValue(0,0)); + + ansel.setAdcon1(&adcon1); + ansel.setAnselh(&anselh); + anselh.setAdcon1(&adcon1); + anselh.setAnsel(&ansel); + adcon0.setAdresLow(&adresl); + adcon0.setAdres(&adresh); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(&intcon_reg); + adcon0.setA2DBits(10); + adcon0.setPir(pir1); + adcon0.setChannel_Mask(0xf); + adcon0.setChannel_shift(2); + adcon0.setGo(1); + + adcon1.setValidBits(0xb0); + adcon1.setNumberOfChannels(14); + adcon1.setValidCfgBits(ADCON1::VCFG0 | ADCON1::VCFG1 , 4); + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[3]); + adcon1.setIOPin(4, &(*m_porta)[4]); + adcon1.setIOPin(8, &(*m_portb)[2]); + adcon1.setIOPin(9, &(*m_portb)[3]); + adcon1.setIOPin(10, &(*m_portb)[1]); + adcon1.setIOPin(11, &(*m_portb)[4]); + adcon1.setIOPin(12, &(*m_portb)[0]); + adcon1.setIOPin(13, &(*m_portb)[5]); + + // set a2d modes where an3 is Vref+ + adcon1.setVrefHiConfiguration(1, 3); + adcon1.setVrefHiConfiguration(3, 3); + + // set a2d modes where an2 is Vref- + adcon1.setVrefLoConfiguration(2, 2); + adcon1.setVrefLoConfiguration(3, 2); + + vrcon.setValidBits(0xff); // All bits settable + + add_sfr_register(&ccpr1l, 0x15, RegisterValue(0,0)); + add_sfr_register(&ccpr1h, 0x16, RegisterValue(0,0)); + add_sfr_register(&ccp1con, 0x17, RegisterValue(0,0)); + add_sfr_register(&ccpr2l, 0x1b, RegisterValue(0,0)); + add_sfr_register(&ccpr2h, 0x1c, RegisterValue(0,0)); + add_sfr_register(&ccp2con, 0x1d, RegisterValue(0,0)); + add_sfr_register(&pwm1con, 0x9b, RegisterValue(0,0)); + add_sfr_register(&pstrcon, 0x9d, RegisterValue(1,0)); + add_sfr_register(&eccpas, 0x9c, RegisterValue(0,0)); + eccpas.setIOpin(0, 0, &(*m_portb)[0]); + eccpas.link_registers(&pwm1con, &ccp1con); + ssp.sspmsk = new _SSPMSK(this, "ssp1msk"); + add_sfr_register(&ssp.sspbuf, 0x13, RegisterValue(0,0),"sspbuf"); + add_sfr_register(&ssp.sspcon, 0x14, RegisterValue(0,0),"sspcon"); + add_sfr_register(&ssp.sspcon2, 0x91, RegisterValue(0,0),"sspcon2"); + add_sfr_register(&ssp.sspadd, 0x93, RegisterValue(0,0),"sspadd"); + add_sfr_register(ssp.sspmsk, 0x93, RegisterValue(0xff,0), "sspmsk", false); + add_sfr_register(&ssp.sspstat, 0x94, RegisterValue(0,0),"sspstat"); + tmr2.ssp_module[0] = &ssp; + + ssp.initialize( + get_pir_set(), // PIR + &(*m_portc)[3], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[5], // SDO + &(*m_portc)[4], // SDI + m_trisc, // i2c tris port + SSP_TYPE_SSP + ); + tmr1l.tmrh = &tmr1h; + tmr1l.t1con = &t1con; + tmr1h.tmrl = &tmr1l; + + t1con.tmrl = &tmr1l; + + t2con.tmr2 = &tmr2; + tmr2.pir_set = get_pir_set(); + tmr2.pr2 = &pr2; + tmr2.t2con = &t2con; + tmr2.add_ccp ( &ccp1con ); + tmr2.add_ccp ( &ccp2con ); + pr2.tmr2 = &tmr2; + + tmr1l.setIOpin(&(*m_portc)[0]); + ccp1con.setBitMask(0xff); + ccp1con.pstrcon = &pstrcon; + ccp1con.pwm1con = &pwm1con; + ccp1con.setCrosslinks(&ccpr1l, pir1, PIR1v2::CCP1IF, &tmr2, &eccpas); + ccpr1l.ccprh = &ccpr1h; + ccpr1l.tmrl = &tmr1l; + ccpr1h.ccprl = &ccpr1l; + + ccp2con.setIOpin(&(*m_portc)[1]); + ccp2con.setCrosslinks(&ccpr2l, pir2, PIR2v3::CCP2IF, &tmr2); + ccpr2l.ccprh = &ccpr2h; + ccpr2l.tmrl = &tmr1l; + ccpr2h.ccprl = &ccpr2l; + + if (pir1) { + pir1->set_intcon(&intcon_reg); + pir1->set_pie(&pie1); + } + pie1.setPir(pir1); + + comparator.cmxcon1[0]->set_OUTpin(&(*m_porta)[4], &(*m_porta)[5]); + comparator.cmxcon1[0]->set_INpinNeg(&(*m_porta)[0], &(*m_porta)[1], + &(*m_portb)[3],&(*m_portb)[1]); + comparator.cmxcon1[0]->set_INpinPos(&(*m_porta)[3], &(*m_porta)[2]); + comparator.cmxcon1[0]->setBitMask(0x33); + comparator.cmxcon0[0]->setBitMask(0xb7); + comparator.cmxcon0[0]->setIntSrc(new InterruptSource(pir2, PIR2v2::C1IF)); + comparator.cmxcon0[1]->setBitMask(0xb7); + comparator.cmxcon0[1]->setIntSrc(new InterruptSource(pir2, PIR2v2::C2IF)); +} + +void P16F88x::option_new_bits_6_7(uint bits) +{ + Dprintf(("P18F88x::option_new_bits_6_7 bits=%x\n", bits)); + m_portb->setIntEdge ( (bits & OPTION_REG::BIT6) == OPTION_REG::BIT6); + m_wpu->set_wpu_pu ( (bits & OPTION_REG::BIT7) != OPTION_REG::BIT7); +} + +void P16F88x::set_out_of_range_pm(uint address, uint value) +{ + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + { + get_eeprom()->change_rom(address - 0x2100, value); + } +} + +bool P16F88x::set_config_word(uint address, uint cfg_word) +{ + enum { + CFG_FOSC0 = 1<<0, + CFG_FOSC1 = 1<<1, + CFG_FOSC2 = 1<<4, + CFG_MCLRE = 1<<5, + CFG_CCPMX = 1<<12 + }; + // Let the base class do most of the work: + if (address == 0x2007) + { + pic_processor::set_config_word(address, cfg_word); + + uint valid_pins = m_porta->getEnableMask(); + + set_int_osc(false); + // Careful these bits not adjacent + switch(cfg_word & (CFG_FOSC0 | CFG_FOSC1 | CFG_FOSC2)) { + + case 0: // LP oscillator: low power crystal is on RA6 and RA7 + case 1: // XT oscillator: crystal/resonator is on RA6 and RA7 + case 2: // HS oscillator: crystal/resonator is on RA6 and RA7 + break; + + case 0x13: // ER oscillator: RA6 is CLKOUT, resistor (?) on RA7 + break; + + case 3: // EC: RA6 is an I/O, RA7 is a CLKIN + case 0x12: // ER oscillator: RA6 is an I/O, RA7 is a CLKIN + valid_pins = (valid_pins & 0x7f)|0x40; + break; + + case 0x10: // INTRC: Internal Oscillator, RA6 and RA7 are I/O's + set_int_osc(true); + valid_pins |= 0xc0; + break; + + case 0x11: // INTRC: Internal Oscillator, RA7 is an I/O, RA6 is CLKOUT + set_int_osc(true); + valid_pins = (valid_pins & 0xbf)|0x80; + break; + + } + // If the /MCLRE bit is set then RE3 is the MCLR pin, otherwise it's + // a general purpose I/O pin. + + if ((cfg_word & CFG_MCLRE)) + { + assignMCLRPin(1); + } + else + { + unassignMCLRPin(); + } + + if (valid_pins != m_porta->getEnableMask()) // enable new pins for IO + { + m_porta->setEnableMask(valid_pins); + m_porta->setTris(m_trisa); + } + return true; + } + else if (address == 0x2008 ) + { + //cout << "p16f88x 0x" << hex << address << " config word2 0x" << cfg_word << '\n'; + } + return false; +} + +void P16F88x::create_config_memory() +{ + m_configMemory = new ConfigMemory(this,2); + m_configMemory->addConfigWord(0,new Config188x(this)); + m_configMemory->addConfigWord(1,new ConfigWord("CONFIG2", 0,"Configuration Word",this,0x2008)); + wdt.initialize(true); // default WDT enabled + wdt.set_timeout(0.000035); + set_config_word(0x2007, 0x3fff); + +} + +void P16F88x::create(int eesize) +{ + create_iopin_map(); + + _14bit_processor::create(); + osccon = new OSCCON(this, "osccon", "OSC Control"); + + EEPROM_WIDE *e; + e = new EEPROM_WIDE(this,pir2); + e->initialize(eesize); + e->set_intcon(&intcon_reg); + set_eeprom_wide(e); + + status->rp_mask = 0x60; // rp0 and rp1 are valid. + indf->base_address_mask1 = 0x80; // used for indirect accesses above 0x100 + indf->base_address_mask2 = 0x1ff; // used for indirect accesses above 0x100 + + P16F88x::create_sfr_map(); +} + +//======================================================================== +// +Processor * P16F882::construct(const char *name) +{ + P16F882 *p = new P16F882(name); + + p->P16F88x::create(128); + p->P16F882::create_sfr_map(); + p->create_invalid_registers (); + + return p; +} + +P16F882::P16F882(const char *_name, const char *desc) + : P16F88x(_name,desc) +{ + m_porta->setEnableMask(0xff); +} + +void P16F882::create_iopin_map(void) +{ + package = new Package(28); + if(!package) return; + + // Now Create the package and place the I/O pins + package->assign_pin(1, m_porte->addPin(new IO_bi_directional("porte3"),3)); + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 4, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 5, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 6, m_porta->addPin(new IO_open_collector("porta4"),4)); + package->assign_pin( 7, m_porta->addPin(new IO_bi_directional("porta5"),5)); + package->assign_pin(8, 0); + package->assign_pin( 9, m_porta->addPin(new IO_bi_directional("porta7"),7)); + package->assign_pin( 10, m_porta->addPin(new IO_bi_directional("porta6"),6)); + package->assign_pin(11, m_portc->addPin(new IO_bi_directional("portc0"),0)); + package->assign_pin(12, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(13, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin(14, m_portc->addPin(new IO_bi_directional("portc3"),3)); + package->assign_pin(15, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin(16, m_portc->addPin(new IO_bi_directional("portc5"),5)); + package->assign_pin(17, m_portc->addPin(new IO_bi_directional("portc6"),6)); + package->assign_pin(18, m_portc->addPin(new IO_bi_directional("portc7"),7)); + package->assign_pin(19, 0); + package->assign_pin(20, 0); + package->assign_pin(21, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin(22, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin(23, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin(24, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(25, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(26, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(27, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(28, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + +} + +void P16F882::create_sfr_map() +{ + ccp1con.setIOpin(&(*m_portc)[2], &(*m_portb)[2], &(*m_portb)[1], &(*m_portb)[4]); +} +//======================================================================== +// +// Pic 16F883 +// +Processor * P16F883::construct(const char *name) +{ + P16F883 *p = new P16F883(name); + + p->P16F88x::create(256); + p->P16F883::create_sfr_map(); + p->create_invalid_registers (); + + return p; +} + +P16F883::P16F883(const char *_name, const char *desc) + : P16F882(_name,desc) +{ + m_porta->setEnableMask(0xff); +} + +P16F883::~P16F883() +{ + delete_file_registers(0xc0,0xef); + delete_file_registers(0x120,0x16f); +} + +void P16F883::create_sfr_map() +{ + add_file_registers(0xc0,0xef,0); + add_file_registers(0x120,0x16f,0); + ccp1con.setIOpin(&(*m_portc)[2], &(*m_portb)[2], &(*m_portb)[1], &(*m_portb)[4]); +} +//======================================================================== +// +// Pic 16F886 +// + +Processor * P16F886::construct(const char *name) +{ + P16F886 *p = new P16F886(name); + + p->P16F88x::create(256); + p->P16F886::create_sfr_map(); + p->create_invalid_registers (); + + return p; +} + +P16F886::P16F886(const char *_name, const char *desc) + : P16F882(_name,desc) +{ + m_porta->setEnableMask(0xff); +} + +P16F886::~P16F886() +{ + delete_file_registers(0xc0,0xef); + delete_file_registers(0x120,0x16f); + delete_file_registers(0x190,0x1ef); +} + +void P16F886::create_sfr_map() +{ + add_file_registers(0xc0,0xef,0); + add_file_registers(0x120,0x16f,0); + add_file_registers(0x190,0x1ef,0); + ccp1con.setIOpin(&(*m_portc)[2], &(*m_portb)[2], &(*m_portb)[1], &(*m_portb)[4]); +} +//======================================================================== +// +// Pic 16F887 +// + +Processor * P16F887::construct(const char *name) +{ + P16F887 *p = new P16F887(name); + + p->P16F88x::create(256); + p->P16F887::create_sfr_map(); + p->create_invalid_registers (); + + return p; +} + +P16F887::P16F887(const char *_name, const char *desc) + : P16F884(_name,desc) +{ +} + +P16F887::~P16F887() +{ + delete_file_registers(0x110,0x11f); + delete_file_registers(0x190,0x1ef); +} + +void P16F887::create_sfr_map() +{ + add_file_registers(0xc0,0xef,0); + add_file_registers(0x110,0x16f,0); + //add_file_registers(0x110,0x11f,0); + add_file_registers(0x190,0x1ef,0); + + add_sfr_register(m_portd, 0x08); + add_sfr_register(m_trisd, 0x88, RegisterValue(0xff,0)); + + ccp1con.setIOpin(&(*m_portc)[2], &(*m_portd)[5], &(*m_portd)[6], &(*m_portd)[7]); + adcon1.setIOPin(5, &(*m_porte)[0]); + adcon1.setIOPin(6, &(*m_porte)[1]); + adcon1.setIOPin(7, &(*m_porte)[2]); +} + +//======================================================================== +// +Processor * P16F884::construct(const char *name) +{ + P16F884 *p = new P16F884(name); + + p->P16F88x::create(256); + p->P16F884::create_sfr_map(); + p->create_invalid_registers (); + + return p; +} + +P16F884::P16F884(const char *_name, const char *desc) + : P16F88x(_name,desc) +{ + m_porta->setEnableMask(0xff); + + // trisa5 is an input only pin + m_trisa->setEnableMask(0xdf); + + m_portd = new PicPSP_PortRegister(this,"portd","",8,0xff); + m_trisd = new PicTrisRegister(this,"trisd","",(PicPortRegister *)m_portd, false); +} + +P16F884::~P16F884() +{ + delete_file_registers(0xc0,0xef); + delete_file_registers(0x120,0x16f); + + delete_sfr_register(m_portd); + delete_sfr_register(m_trisd); +} + +//------------------------------------------------------------------------ +// +void P16F884::create_iopin_map(void) +{ + package = new Package(40); + if(!package) return; + + // Now Create the package and place the I/O pins + package->assign_pin(1, m_porte->addPin(new IO_bi_directional("porte3"),3)); + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 4, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 5, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 6, m_porta->addPin(new IO_open_collector("porta4"),4)); + package->assign_pin( 7, m_porta->addPin(new IO_bi_directional("porta5"),5)); + package->assign_pin( 8, m_porte->addPin(new IO_bi_directional("porte0"),0)); + package->assign_pin( 9, m_porte->addPin(new IO_bi_directional("porte1"),1)); + package->assign_pin(10, m_porte->addPin(new IO_bi_directional("porte2"),2)); + package->assign_pin(11, 0); + package->assign_pin(12, 0); + package->assign_pin( 13, m_porta->addPin(new IO_bi_directional("porta7"),7)); + package->assign_pin( 14, m_porta->addPin(new IO_bi_directional("porta6"),6)); + package->assign_pin(15, m_portc->addPin(new IO_bi_directional("portc0"),0)); + package->assign_pin(16, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(17, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin(18, m_portc->addPin(new IO_bi_directional("portc3"),3)); + package->assign_pin(23, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin(24, m_portc->addPin(new IO_bi_directional("portc5"),5)); + package->assign_pin(25, m_portc->addPin(new IO_bi_directional("portc6"),6)); + package->assign_pin(26, m_portc->addPin(new IO_bi_directional("portc7"),7)); + package->assign_pin(19, m_portd->addPin(new IO_bi_directional("portd0"),0)); + package->assign_pin(20, m_portd->addPin(new IO_bi_directional("portd1"),1)); + package->assign_pin(21, m_portd->addPin(new IO_bi_directional("portd2"),2)); + package->assign_pin(22, m_portd->addPin(new IO_bi_directional("portd3"),3)); + package->assign_pin(27, m_portd->addPin(new IO_bi_directional("portd4"),4)); + package->assign_pin(28, m_portd->addPin(new IO_bi_directional("portd5"),5)); + package->assign_pin(29, m_portd->addPin(new IO_bi_directional("portd6"),6)); + package->assign_pin(30, m_portd->addPin(new IO_bi_directional("portd7"),7)); + package->assign_pin(31, 0); + package->assign_pin(32, 0); + package->assign_pin(33, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin(34, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin(35, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin(36, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(37, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(38, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(39, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(40, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); +} + +void P16F884::create_sfr_map() +{ + add_file_registers(0xc0,0xef,0); + add_file_registers(0x120,0x16f,0); + + add_sfr_register(m_portd, 0x08); + add_sfr_register(m_trisd, 0x88, RegisterValue(0xff,0)); + + ccp1con.setIOpin(&(*m_portc)[2], &(*m_portd)[5], &(*m_portd)[6], &(*m_portd)[7]); + adcon1.setIOPin(5, &(*m_porte)[0]); + adcon1.setIOPin(6, &(*m_porte)[1]); + adcon1.setIOPin(7, &(*m_porte)[2]); +} +//------------------------------------------------------------------------ +// +// + +class ConfigF631 : public ConfigWord +{ +public: + ConfigF631(P16F631 *pCpu) + : ConfigWord("CONFIG", 0x3fff, "Configuration Word", pCpu, 0x2007) + { + Dprintf(("ConfigF631::ConfigF631 %p\n", m_pCpu)); + } + + enum { + FOSC0 = 1<<0, + FOSC1 = 1<<1, + FOSC2 = 1<<2, + WDTEN = 1<<3, + PWRTEN = 1<<4, + MCLRE = 1<<5, + BODEN = 1<<6, + CP = 1<<7, + CPD = 1<<8 + }; + + string toString() + { + int64_t i64; + get(i64); + int i = i64 &0xfff; + + char buff[356]; + + const char *OSCdesc[8] = { + "LP oscillator", + "XT oscillator", + "HS oscillator", + "EC oscillator w/ OSC2 configured as I/O", + "INTOSC oscillator: I/O on RA4 pin, I/O on RA5", + "INTOSC oscillator: CLKOUT on RA4 pin, I/O on RA5", + "RC oscillator: I/O on RA4 pin, RC on RA5", + "RC oscillator: CLKOUT on RA4 pin, RC on RA5" + }; + snprintf(buff,sizeof(buff), + " $%04x\n" + " FOSC=%d - Clk source = %s\n" + " WDTEN=%d - WDT is %s\n" + " PWRTEN=%d - Power up timer is %s\n" + " MCLRE=%d - RA3 Pin %s\n" + " BODEN=%d - Brown-out Detect %s\n" + " CP=%d - Code Protection %s\n" + " CPD=%d - Data Code Protection %s\n", + i, + i&(FOSC0|FOSC1|FOSC2), OSCdesc[i&(FOSC0|FOSC1|FOSC2)], + ((i&WDTE) ? 1 : 0), ((i&WDTE) ? "enabled" : "disabled"), + ((i&PWRTEN) ? 1 : 0), ((i&PWRTEN) ? "disabled" : "enabled"), + ((i&MCLRE) ? 1 : 0), ((i&MCLRE) ? "MCLR" : "Input"), + ((i&BODEN) ? 1 : 0), ((i&BODEN) ? "enabled" : "disabled"), + ((i&CP) ? 1 : 0), ((i&CP) ? "disabled" : "enabled"), + ((i&CPD) ? 1 : 0), ((i&CPD) ? "disabled" : "enabled") + ); + return string(buff); + } +}; +P16F631::P16F631(const char *_name, const char *desc) + : _14bit_processor(_name, desc), + t1con(this, "t1con", "TMR1 Control"), + pie1(this,"pie1", "Peripheral Interrupt Enable"), + pie2(this,"pie2", "Peripheral Interrupt Enable"), + tmr1l(this, "tmr1l", "TMR1 Low"), + tmr1h(this, "tmr1h", "TMR1 High"), + osctune(this, "osctune", "OSC Tune"), + pcon(this, "pcon", "pcon"), + wdtcon(this, "wdtcon", "WDT Control", 0x1f), + osccon(0), + vrcon(this, "vrcon", "Voltage Reference Control Register"), + srcon(this, "srcon", "SR Latch Control Resgister"), + ansel(this,"ansel", "Analog Select"), + comparator(this), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + + intcon_reg(this,"intcon","Interrupt Control") +{ + pir1_2_reg = new PIR1v2(this,"pir1","Peripheral Interrupt Register",&intcon_reg,&pie1); + pir1 = pir1_2_reg; + pir2_3_reg = new PIR2v3(this,"pir2","Peripheral Interrupt Register",&intcon_reg,&pie2); + pir2 = pir2_3_reg; + + m_ioca = new IOC(this, "ioca", "Interrupt-On-Change GPIO Register"); + m_iocb = new IOC(this, "iocb", "Interrupt-On-Change GPIO Register"); + + m_porta = new PicPortGRegister(this,"porta","",&intcon_reg, m_ioca, 8,0x3f); + m_trisa = new PicTrisRegister(this,"trisa","", m_porta, false, 0x37); + + m_portb = new PicPortGRegister(this,"portb","",&intcon_reg, m_iocb, 8,0xf0); + m_trisb = new PicTrisRegister(this,"trisb","", m_portb, false); + + m_wpua = new WPU(this, "wpua", "Weak Pull-up Register", m_porta, 0x37); + m_wpub = new WPU(this, "wpub", "Weak Pull-up Register", m_portb, 0xf0); + tmr0.set_cpu(this, m_porta, 4, option_reg); + tmr0.start(0); + + m_portc = new PicPortRegister(this,"portc","",8,0xff); + m_trisc = new PicTrisRegister(this,"trisc","", m_portc, false); + + comparator.cmxcon0[0] = new CMxCON0_V2(this, "cm1con0", + " Comparator C1 Control Register 0", 0, &comparator); + comparator.cmxcon0[1] = new CMxCON0_V2(this, "cm2con0", + " Comparator C2 Control Register 0", 1, &comparator); + comparator.cmxcon1[0] = new CM2CON1_V4(this, "cm2con1", + " Comparator C1 Control Register 1", 0, &comparator); + comparator.cmxcon1[1] = comparator.cmxcon1[0]; +} + +P16F631::~P16F631() +{ + unassignMCLRPin(); + delete_file_registers(0x40, 0x7f); + remove_sfr_register(comparator.cmxcon0[0]); + remove_sfr_register(comparator.cmxcon0[1]); + remove_sfr_register(comparator.cmxcon1[1]); + + remove_sfr_register(get_eeprom()->get_reg_eedata()); + remove_sfr_register(get_eeprom()->get_reg_eeadr()); + remove_sfr_register(get_eeprom()->get_reg_eecon1()); + remove_sfr_register(get_eeprom()->get_reg_eecon2()); + remove_sfr_register(&tmr0); + remove_sfr_register(&vrcon); + remove_sfr_register(&ansel); + remove_sfr_register(&srcon); + remove_sfr_register(&tmr1l); + remove_sfr_register(&tmr1h); + remove_sfr_register(&t1con); + remove_sfr_register(&pcon); + remove_sfr_register(&wdtcon); + remove_sfr_register(osccon); + remove_sfr_register(&pie1); + remove_sfr_register(&pie2); + remove_sfr_register(&intcon_reg); + remove_sfr_register(&osctune); + delete_sfr_register(pir2); + delete_sfr_register(m_portc); + delete_sfr_register(m_trisc); + + delete_sfr_register(m_portb); + delete_sfr_register(m_trisb); + delete_sfr_register(m_porta); + delete_sfr_register(m_trisa); + delete_sfr_register(m_ioca); + delete_sfr_register(m_iocb); + delete_sfr_register(m_wpua); + delete_sfr_register(m_wpub); + delete_sfr_register(pir1_2_reg); + delete e; +} +void P16F631::create_iopin_map(void) +{ + package = new Package(20); + if(!package) return; + + package->assign_pin(1, 0); // Vdd + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional_pu("porta5"),5)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional_pu("porta4"),4)); + package->assign_pin( 4, m_porta->addPin(new IOPIN("porta3"),3)); + package->assign_pin( 5, m_portc->addPin(new IO_bi_directional_pu("portc5"),5)); + package->assign_pin( 6, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin( 7, m_portc->addPin(new IO_bi_directional("portc3"),3)); + package->assign_pin( 8, m_portc->addPin(new IO_bi_directional("portc6"),6)); + package->assign_pin( 9, m_portc->addPin(new IO_bi_directional("portc7"),7)); + package->assign_pin(10, m_portb->addPin(new IO_bi_directional("portb7"),7)); + package->assign_pin(11, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(12, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(13, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(14, m_portc->addPin(new IO_bi_directional_pu("portc2"),2)); + package->assign_pin(15, m_portc->addPin(new IO_bi_directional_pu("portc1"),1)); + package->assign_pin(16, m_portc->addPin(new IO_bi_directional_pu("portc0"),0)); + package->assign_pin(17, m_porta->addPin(new IO_bi_directional_pu("porta2"),2)); + package->assign_pin(18, m_porta->addPin(new IO_bi_directional_pu("porta1"),1)); + package->assign_pin(19, m_porta->addPin(new IO_bi_directional_pu("porta0"),0)); + + package->assign_pin(20, 0); //VSS + + tmr1l.setIOpin(&(*m_portc)[0]); +} +Processor * P16F631::construct(const char *name) +{ + P16F631 *p = new P16F631(name); + + p->create(128); + p->create_invalid_registers (); + + return p; +} + +void P16F631::create(int eesize) +{ + create_iopin_map(); + + _14bit_processor::create(); + osccon = new OSCCON(this, "osccon", "OSC Control"); + + e = new EEPROM_WIDE(this,pir2); + e->initialize(eesize); + e->set_intcon(&intcon_reg); + set_eeprom_wide(e); + + status->rp_mask = 0x60; // rp0 and rp1 are valid. + indf->base_address_mask1 = 0x80; // used for indirect accesses above 0x100 + indf->base_address_mask2 = 0x1ff; // used for indirect accesses above 0x100 + + P16F631::create_sfr_map(); +} + +//------------------------------------------------------------------- +void P16F631::create_sfr_map() +{ + pir_set_2_def.set_pir1(pir1); + pir_set_2_def.set_pir2(pir2); + + add_file_registers(0x40, 0x7f, 0); + alias_file_registers(0x70, 0x7f, 0x80); + alias_file_registers(0x70, 0x7f, 0x100); + alias_file_registers(0x70, 0x7f, 0x180); + + add_sfr_register(indf, 0x00); + alias_file_registers(0x00,0x00,0x80); + alias_file_registers(0x00,0x00,0x100); + alias_file_registers(0x00,0x00,0x180); + + add_sfr_register(&tmr0, 0x01); + alias_file_registers(0x01,0x01,0x100); + add_sfr_register(option_reg, 0x81, RegisterValue(0xff,0)); + alias_file_registers(0x81,0x81,0x100); + + add_sfr_register(pcl, 0x02, RegisterValue(0,0)); + add_sfr_register(status, 0x03, RegisterValue(0x18,0)); + add_sfr_register(fsr, 0x04); + alias_file_registers(0x02,0x04,0x80); + alias_file_registers(0x02,0x04,0x100); + alias_file_registers(0x02,0x04,0x180); + + add_sfr_register(m_porta, 0x05); + add_sfr_register(m_trisa, 0x85, RegisterValue(0x3f,0)); + + add_sfr_register(m_portb, 0x06); + add_sfr_register(m_trisb, 0x86, RegisterValue(0xf0,0)); + + add_sfr_register(m_portc, 0x07); + add_sfr_register(m_trisc, 0x87, RegisterValue(0xff,0)); + alias_file_registers(0x05,0x07,0x100); + alias_file_registers(0x85,0x87,0x100); + + add_sfr_register(pclath, 0x0a, RegisterValue(0,0)); + add_sfr_register(&intcon_reg, 0x00b, RegisterValue(0,0)); + + alias_file_registers(0x0a,0x0b,0x80); + alias_file_registers(0x0a,0x0b,0x100); + alias_file_registers(0x0a,0x0b,0x180); + add_sfr_register(pir1, 0x0c, RegisterValue(0,0)); + add_sfr_register(pir2, 0x0d, RegisterValue(0,0)); + add_sfr_register(&tmr1l, 0x0e, RegisterValue(0,0), "tmr1l"); + add_sfr_register(&tmr1h, 0x0f, RegisterValue(0,0), "tmr1h"); + add_sfr_register(&t1con, 0x10, RegisterValue(0,0)); + add_sfr_register(&pcon, 0x8e, RegisterValue(0,0)); + add_sfr_register(&wdtcon, 0x97, RegisterValue(0x08,0)); + add_sfr_register(osccon, 0x8f, RegisterValue(0x60,0)); + + add_sfr_register(&vrcon, 0x118, RegisterValue(0,0),"vrcon"); + add_sfr_register(comparator.cmxcon0[0], 0x119, RegisterValue(0,0), "cm1con0"); + add_sfr_register(comparator.cmxcon0[1], 0x11a, RegisterValue(0,0), "cm2con0"); + add_sfr_register(comparator.cmxcon1[1], 0x11b, RegisterValue(2,0), "cm2con1"); + comparator.cmxcon1[0]->set_OUTpin(&(*m_porta)[2], &(*m_portc)[4]); + comparator.cmxcon1[0]->set_INpinNeg(&(*m_porta)[1], &(*m_portc)[1], + &(*m_portc)[2], &(*m_portc)[3]); + comparator.cmxcon1[0]->set_INpinPos(&(*m_porta)[0], &(*m_portc)[0]); + comparator.cmxcon1[0]->setBitMask(0x03); + comparator.cmxcon0[0]->setBitMask(0xb7); + comparator.cmxcon0[0]->setIntSrc(new InterruptSource(pir2, PIR2v2::C1IF)); + comparator.cmxcon0[1]->setBitMask(0xb7); + comparator.cmxcon0[1]->setIntSrc(new InterruptSource(pir2, PIR2v2::C2IF)); + comparator.cmxcon1[0]->set_vrcon(&vrcon); + comparator.cmxcon1[1] = comparator.cmxcon1[0]; + comparator.assign_tmr1l(&tmr1l); + + add_sfr_register(&ansel, 0x11e, RegisterValue(0xff,0)); + add_sfr_register(&srcon, 0x19e, RegisterValue(0,0),"srcon"); + + ansel.setAdcon1(&adcon1); + ansel.setValidBits(0xff); + + adcon1.setNumberOfChannels(12); + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(4, &(*m_portc)[0]); + + adcon1.setIOPin(5, &(*m_portc)[1]); + adcon1.setIOPin(6, &(*m_portc)[2]); + adcon1.setIOPin(7, &(*m_portc)[3]); + intcon = &intcon_reg; + intcon_reg.set_pir_set(get_pir_set()); + + tmr1l.tmrh = &tmr1h; + tmr1l.t1con = &t1con; + // FIXME -- can't delete this new'd item + tmr1l.setInterruptSource(new InterruptSource(pir1, PIR1v3::TMR1IF)); + tmr1h.tmrl = &tmr1l; + t1con.tmrl = &tmr1l; + + tmr1l.setIOpin(&(*m_porta)[5]); + tmr1l.setGatepin(&(*m_porta)[4]); + + add_sfr_register(&pie1, 0x8c, RegisterValue(0,0)); + add_sfr_register(&pie2, 0x8d, RegisterValue(0,0)); + if (pir1) { + pir1->set_intcon(&intcon_reg); + pir1->set_pie(&pie1); + } + pie1.setPir(pir1); + pie2.setPir(pir2); + + get_eeprom()->get_reg_eedata()->new_name("eedat"); + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x10c); + add_sfr_register(get_eeprom()->get_reg_eeadr(), 0x10d); + add_sfr_register(get_eeprom()->get_reg_eecon1(), 0x18c, RegisterValue(0,0)); + add_sfr_register(get_eeprom()->get_reg_eecon2(), 0x18d); + add_sfr_register(m_wpua, 0x95, RegisterValue(0x37,0),"wpua"); + add_sfr_register(m_wpub, 0x115, RegisterValue(0xf0,0),"wpub"); + add_sfr_register(m_ioca, 0x96, RegisterValue(0,0),"ioca"); + add_sfr_register(m_iocb, 0x116, RegisterValue(0,0),"iocb"); + add_sfr_register(&osctune, 0x90, RegisterValue(0,0),"osctune"); + + osccon->set_osctune(&osctune); + osctune.set_osccon(osccon); +} +//------------------------------------------------------------------- +void P16F631::option_new_bits_6_7(uint bits) +{ + m_wpua->set_wpu_pu( (bits & OPTION_REG::BIT7) != OPTION_REG::BIT7); + m_wpub->set_wpu_pu( (bits & OPTION_REG::BIT7) != OPTION_REG::BIT7); + m_porta->setIntEdge((bits & OPTION_REG::BIT6) == OPTION_REG::BIT6); +} +//------------------------------------------------------------------- +void P16F631::create_config_memory() +{ + m_configMemory = new ConfigMemory(this,1); + m_configMemory->addConfigWord(0,new ConfigF631(this)); + wdt.initialize(true); // default WDT enabled + wdt.set_timeout(0.000035); + set_config_word(0x2007, 0x3fff); + +}; + +//------------------------------------------------------------------- +bool P16F631::set_config_word(uint address, uint cfg_word) +{ + enum { + CFG_FOSC0 = 1<<0, + CFG_FOSC1 = 1<<1, + CFG_FOSC2 = 1<<2, + CFG_WDTE = 1<<3, + CFG_MCLRE = 1<<5, + CFG_IESO = 1<<10, + }; + + if(address == config_word_address()) + { + uint valid_pins = m_porta->getEnableMask(); + + if ((cfg_word & CFG_MCLRE) == CFG_MCLRE) + { + assignMCLRPin(4); + } + else + { + unassignMCLRPin(); + } + + wdt.initialize((cfg_word & CFG_WDTE) == CFG_WDTE); + + set_int_osc(false); + + // AnalogReq is used so ADC does not change clock names + // set_config_word is first called with default and then + // often called a second time. the following call is to + // reset porta so next call to AnalogReq sill set the pin name + // + (&(*m_porta)[4])->AnalogReq((Register *)this, false, "porta4"); + valid_pins |= 0x20; + + uint fosc = cfg_word & (CFG_FOSC0 | CFG_FOSC1 | CFG_FOSC2); + if (osccon) + { + osccon->set_config_xosc(fosc < 3); + osccon->set_config_irc(fosc == 4 || fosc == 5); + osccon->set_config_ieso(cfg_word & CFG_IESO); + } + + switch(fosc) + { + case 0: // LP oscillator: low power crystal is on RA4 and RA5 + case 1: // XT oscillator: crystal/resonator is on RA4 and RA5 + case 2: // HS oscillator: crystal/resonator is on RA4 and RA5 + (&(*m_porta)[4])->AnalogReq((Register *)this, true, "OSC2"); + + valid_pins &= 0xcf; + break; + + case 3: // EC I/O on RA4 pin, CLKIN on RA5 + valid_pins &= 0xef; + break; + + case 5: // INTOSC CLKOUT on RA4 pin + (&(*m_porta)[4])->AnalogReq((Register *)this, true, "CLKOUT"); + case 4: // INTOSC + set_int_osc(true); + osccon->set_rc_frequency(); + break; + + case 6: //RC oscillator: I/O on RA4 pin, RC on RA5 + valid_pins &= 0xdf; + break; + + case 7: // RC oscillator: CLKOUT on RA4 pin, RC on RA5 + (&(*m_porta)[4])->AnalogReq((Register *)this, true, "CLKOUT"); + + valid_pins &= 0xdf; + break; + }; + + if (valid_pins != m_porta->getEnableMask()) // enable new pins for IO + { + m_porta->setEnableMask(valid_pins); + m_trisa->setEnableMask(valid_pins & 0xf7); + } + return(true); + } + return false; +} + +//======================================================================== +// +// Pic 16F684 +// +P16F684::P16F684(const char *_name, const char *desc) + : _14bit_processor(_name, desc), + comparator(this), + t1con(this, "t1con", "TMR1 Control"), + t2con(this, "t2con", "TMR2 Control"), + pie1(this,"pie1", "Peripheral Interrupt Enable"), + pr2(this, "pr2", "TMR2 Period Register"), + tmr2(this, "tmr2", "TMR2 Register"), + tmr1l(this, "tmr1l", "TMR1 Low"), + tmr1h(this, "tmr1h", "TMR1 High"), + osctune(this, "osctune", "OSC Tune"), + pcon(this, "pcon", "pcon"), + wdtcon(this, "wdtcon", "WDT Control", 0x1f), + osccon(0), + ansel(this,"ansel", "Analog Select"), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adresh(this,"adresh", "A2D Result High"), + adresl(this,"adresl", "A2D Result Low"), + ccp1con(this, "ccp1con", "Capture Compare Control"), + ccpr1l(this, "ccpr1l", "Capture Compare 1 Low"), + ccpr1h(this, "ccpr1h", "Capture Compare 1 High"), + eccpas(this, "eccpas", "ECCP Auto-Shutdown Control Register"), + pwm1con(this, "pwm1con", "Enhanced PWM Control Register"), + pstrcon(this, "pstrcon", "Pulse Sterring Control Register"), + intcon_reg(this,"intcon","Interrupt Control") +{ + pir1_3_reg = new PIR1v3(this,"pir1","Peripheral Interrupt Register",&intcon_reg,&pie1); + pir1 = pir1_3_reg; + pir1->valid_bits = pir1->writable_bits = 0xff; + + m_ioca = new IOC(this, "ioca", "Interrupt-On-Change GPIO Register"); + + m_porta = new PicPortGRegister(this,"porta","",&intcon_reg, m_ioca, 8,0x3f); + m_trisa = new PicTrisRegister(this,"trisa","", m_porta, false); + + m_wpua = new WPU(this, "wpua", "Weak Pull-up Register", m_porta, 0x37); + tmr0.set_cpu(this, m_porta, 4, option_reg); + tmr0.start(0); + + m_portc = new PicPortRegister(this,"portc","",8,0x3f); + m_trisc = new PicTrisRegister(this,"trisc","", m_portc, false); +} + +P16F684::~P16F684() +{ + unassignMCLRPin(); + + delete_file_registers(0x20, 0x7f); + delete_file_registers(0xa0, 0xbf); + + remove_sfr_register(&tmr0); + remove_sfr_register(&intcon_reg); + remove_sfr_register(pir1); + remove_sfr_register(&tmr1l); + remove_sfr_register(&tmr1h); + remove_sfr_register(&t1con); + remove_sfr_register(&tmr2); + remove_sfr_register(&t2con); + remove_sfr_register(&ccpr1l); + remove_sfr_register(&ccpr1h); + remove_sfr_register(&ccp1con); + remove_sfr_register(&pwm1con); + remove_sfr_register(&eccpas); + remove_sfr_register(&wdtcon); + remove_sfr_register(&comparator.cmcon); + remove_sfr_register(&comparator.cmcon1); + remove_sfr_register(&adresh); + remove_sfr_register(&adcon0); + remove_sfr_register(&pie1); + remove_sfr_register(&pcon); + remove_sfr_register(osccon); + remove_sfr_register(&osctune); + remove_sfr_register(&ansel); + remove_sfr_register(&pr2); + remove_sfr_register(&comparator.vrcon); + remove_sfr_register(get_eeprom()->get_reg_eedata()); + remove_sfr_register(get_eeprom()->get_reg_eeadr()); + remove_sfr_register(get_eeprom()->get_reg_eecon1()); + remove_sfr_register(get_eeprom()->get_reg_eecon2()); + remove_sfr_register(&adresl); + remove_sfr_register(&adcon1); + + delete_sfr_register(m_portc); + delete_sfr_register(m_trisc); + + delete_sfr_register(m_porta); + delete_sfr_register(m_trisa); + delete_sfr_register(m_ioca); + delete_sfr_register(m_wpua); + delete_sfr_register(pir1_3_reg); + delete e; +} +void P16F684::create_iopin_map(void) +{ + package = new Package(14); + if(!package) return; + + package->assign_pin(1, 0); // Vdd + + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional_pu("porta5"),5)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional_pu("porta4"),4)); + package->assign_pin( 4, m_porta->addPin(new IOPIN("porta3"),3)); + package->assign_pin( 5, m_portc->addPin(new IO_bi_directional_pu("portc5"),5)); + package->assign_pin( 6, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin( 7, m_portc->addPin(new IO_bi_directional("portc3"),3)); + + package->assign_pin( 8, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin( 9, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(10, m_portc->addPin(new IO_bi_directional("portc0"),0)); + + package->assign_pin(11, m_porta->addPin(new IO_bi_directional_pu("porta2"),2)); + package->assign_pin(12, m_porta->addPin(new IO_bi_directional_pu("porta1"),1)); + package->assign_pin(13, m_porta->addPin(new IO_bi_directional_pu("porta0"),0)); + + package->assign_pin(14, 0); //VSS + + tmr1l.setIOpin(&(*m_portc)[0]); +} +Processor * P16F684::construct(const char *name) +{ + P16F684 *p = new P16F684(name); + + p->create(256); + p->create_invalid_registers (); + + return p; +} + +void P16F684::create(int eesize) +{ + create_iopin_map(); + + _14bit_processor::create(); + + osccon = new OSCCON(this, "osccon", "OSC Control"); + + e = new EEPROM_WIDE(this,pir1); + e->initialize(eesize); + e->set_intcon(&intcon_reg); + set_eeprom_wide(e); + + status->rp_mask = 0x60; // rp0 and rp1 are valid. + indf->base_address_mask1 = 0x80; // used for indirect accesses above 0x100 + indf->base_address_mask2 = 0x1ff; // used for indirect accesses above 0x100 + + P16F684::create_sfr_map(); +} + +//------------------------------------------------------------------- +void P16F684::create_sfr_map() +{ + + pir_set_def.set_pir1(pir1); + + add_file_registers(0x20, 0x7f, 0); + add_file_registers(0xa0, 0xbf, 0); + alias_file_registers(0x70, 0x7f, 0x80); + + add_sfr_register(indf, 0x00); + alias_file_registers(0x00,0x00,0x80); + + add_sfr_register(&tmr0, 0x01); + add_sfr_register(option_reg, 0x81, RegisterValue(0xff,0)); + + add_sfr_register(pcl, 0x02, RegisterValue(0,0)); + add_sfr_register(status, 0x03, RegisterValue(0x18,0)); + add_sfr_register(fsr, 0x04); + alias_file_registers(0x02,0x04,0x80); + + add_sfr_register(m_porta, 0x05); + add_sfr_register(m_trisa, 0x85, RegisterValue(0x3f,0)); + + add_sfr_register(m_portc, 0x07); + add_sfr_register(m_trisc, 0x87, RegisterValue(0xff,0)); + + add_sfr_register(pclath, 0x0a, RegisterValue(0,0)); + add_sfr_register(&intcon_reg, 0x00b, RegisterValue(0,0)); + + alias_file_registers(0x0a,0x0b,0x80); + add_sfr_register(pir1, 0x0c, RegisterValue(0,0)); + add_sfr_register(&tmr1l, 0x0e, RegisterValue(0,0), "tmr1l"); + add_sfr_register(&tmr1h, 0x0f, RegisterValue(0,0), "tmr1h"); + add_sfr_register(&t1con, 0x10, RegisterValue(0,0)); + add_sfr_register(&tmr2, 0x11, RegisterValue(0,0)); + add_sfr_register(&t2con, 0x12, RegisterValue(0,0)); + add_sfr_register(&ccpr1l, 0x13, RegisterValue(0,0)); + add_sfr_register(&ccpr1h, 0x14, RegisterValue(0,0)); + add_sfr_register(&ccp1con, 0x15, RegisterValue(0,0)); + add_sfr_register(&pwm1con, 0x16, RegisterValue(0,0)); + add_sfr_register(&eccpas, 0x17, RegisterValue(0,0)); + add_sfr_register(&wdtcon, 0x18, RegisterValue(0x08,0)); + add_sfr_register(&comparator.cmcon, 0x19, RegisterValue(0,0), "cmcon0"); + add_sfr_register(&comparator.cmcon1, 0x1a, RegisterValue(0,0), "cmcon1"); + add_sfr_register(&adresh, 0x1e, RegisterValue(0,0)); + add_sfr_register(&adcon0, 0x1f, RegisterValue(0,0)); + + add_sfr_register(&pie1, 0x8c, RegisterValue(0,0)); + add_sfr_register(&pcon, 0x8e, RegisterValue(0,0)); + add_sfr_register(osccon, 0x8f, RegisterValue(0x60,0)); + + add_sfr_register(&osctune, 0x90, RegisterValue(0,0),"osctune"); + add_sfr_register(&ansel, 0x91, RegisterValue(0xff,0)); + add_sfr_register(&pr2, 0x92, RegisterValue(0xff,0)); + add_sfr_register(m_wpua, 0x95, RegisterValue(0x37,0),"wpua"); + add_sfr_register(m_ioca, 0x96, RegisterValue(0,0),"ioca"); + add_sfr_register(&comparator.vrcon, 0x99, RegisterValue(0,0),"vrcon"); + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x9a); + add_sfr_register(get_eeprom()->get_reg_eeadr(), 0x9b); + add_sfr_register(get_eeprom()->get_reg_eecon1(), 0x9c, RegisterValue(0,0)); + add_sfr_register(get_eeprom()->get_reg_eecon2(), 0x9d); + add_sfr_register(&adresl, 0x9e, RegisterValue(0,0)); + add_sfr_register(&adcon1, 0x9f, RegisterValue(0,0)); + + ansel.setAdcon1(&adcon1); + ansel.setValidBits(0xff); + + // Link the comparator and voltage ref to porta + comparator.initialize(&pir_set_def, NULL, + &(*m_porta)[0], &(*m_porta)[1], // AN0 AN1 + 0, 0, + &(*m_porta)[2], &(*m_portc)[4]); //OUT0 OUT1 + + comparator.cmcon.setINpin(2, &(*m_portc)[0], "an4"); //AN4 + comparator.cmcon.setINpin(3, &(*m_portc)[1], "an5"); //AN5 + + comparator.cmcon.set_tmrl(&tmr1l); + comparator.cmcon1.set_tmrl(&tmr1l); + + comparator.cmcon.set_configuration(1, 0, AN0, AN1, AN0, AN1, ZERO); + comparator.cmcon.set_configuration(2, 0, AN2, AN3, AN2, AN3, ZERO); + comparator.cmcon.set_configuration(1, 1, AN1, AN2, AN0, AN2, NO_OUT); + comparator.cmcon.set_configuration(2, 1, AN3, AN2, AN3, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 2, AN1, VREF, AN0, VREF, NO_OUT); + comparator.cmcon.set_configuration(2, 2, AN3, VREF, AN2, VREF, NO_OUT); + comparator.cmcon.set_configuration(1, 3, AN1, AN2, AN1, AN2, NO_OUT); + comparator.cmcon.set_configuration(2, 3, AN3, AN2, AN3, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 4, AN1, AN0, AN1, AN0, NO_OUT); + comparator.cmcon.set_configuration(2, 4, AN3, AN2, AN3, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 5, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 5, AN3, AN2, AN3, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 6, AN1, AN2, AN1, AN2, OUT0); + comparator.cmcon.set_configuration(2, 6, AN3, AN2, AN3, AN2, OUT1); + comparator.cmcon.set_configuration(1, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.vrcon.setValidBits(0xaf); + + adcon0.setAdresLow(&adresl); + adcon0.setAdres(&adresh); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(&intcon_reg); + adcon0.setA2DBits(10); + adcon0.setPir(pir1); + adcon0.setChannel_Mask(7); + adcon0.setChannel_shift(2); + + adcon1.setAdcon0(&adcon0); // VCFG0, VCFG1 in adcon0 + adcon1.setNumberOfChannels(8); + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[4]); + adcon1.setIOPin(4, &(*m_portc)[0]); + adcon1.setIOPin(5, &(*m_portc)[1]); + adcon1.setIOPin(6, &(*m_portc)[2]); + adcon1.setIOPin(7, &(*m_portc)[3]); + adcon1.setVrefHiConfiguration(2, 1); + intcon = &intcon_reg; + intcon_reg.set_pir_set(get_pir_set()); + + tmr1l.tmrh = &tmr1h; + tmr1l.t1con = &t1con; + // FIXME -- can't delete this new'd item + tmr1l.setInterruptSource(new InterruptSource(pir1, PIR1v3::TMR1IF)); + tmr1h.tmrl = &tmr1l; + t1con.tmrl = &tmr1l; + + tmr1l.setIOpin(&(*m_porta)[5]); + tmr1l.setGatepin(&(*m_porta)[4]); + + if (pir1) { + pir1->set_intcon(&intcon_reg); + pir1->set_pie(&pie1); + } + pie1.setPir(pir1); + + t2con.tmr2 = &tmr2; + tmr2.pir_set = get_pir_set(); + tmr2.pr2 = &pr2; + tmr2.t2con = &t2con; + tmr2.add_ccp ( &ccp1con ); + pr2.tmr2 = &tmr2; + + eccpas.setIOpin(0, 0, &(*m_portc)[5]); + eccpas.link_registers(&pwm1con, &ccp1con); + + ccp1con.setIOpin(&(*m_portc)[5], &(*m_portc)[4], &(*m_portc)[3], &(*m_portc)[2]); + ccp1con.setBitMask(0xff); + ccp1con.pstrcon = &pstrcon; + ccp1con.pwm1con = &pwm1con; + ccp1con.setCrosslinks(&ccpr1l, pir1, PIR1v2::CCP1IF, &tmr2, &eccpas); + ccpr1l.ccprh = &ccpr1h; + ccpr1l.tmrl = &tmr1l; + ccpr1h.ccprl = &ccpr1l; + + osccon->set_osctune(&osctune); + osctune.set_osccon(osccon); + +} +//------------------------------------------------------------------- +void P16F684::option_new_bits_6_7(uint bits) +{ + m_wpua->set_wpu_pu( (bits & OPTION_REG::BIT7) != OPTION_REG::BIT7); + m_porta->setIntEdge((bits & OPTION_REG::BIT6) == OPTION_REG::BIT6); +} +//------------------------------------------------------------------- +void P16F684::create_config_memory() +{ + m_configMemory = new ConfigMemory(this,1); + m_configMemory->addConfigWord(0,new ConfigF631((P16F631*)this)); + wdt.initialize(true); // default WDT enabled + wdt.set_timeout(0.000035); + set_config_word(0x2007, 0x3fff); + +}; + +//------------------------------------------------------------------- +bool P16F684::set_config_word(uint address, uint cfg_word) +{ + enum { + CFG_FOSC0 = 1<<0, + CFG_FOSC1 = 1<<1, + CFG_FOSC2 = 1<<2, + CFG_WDTE = 1<<3, + CFG_MCLRE = 1<<5, + CFG_IESO = 1<<11, + }; + + if(address == config_word_address()) + { + config_clock_mode = (cfg_word & (CFG_FOSC0 | CFG_FOSC1 | CFG_FOSC2)); + if (osccon) + { + osccon->set_config_xosc(config_clock_mode < 3); + osccon->set_config_irc(config_clock_mode == 4 || config_clock_mode == 5); + osccon->set_config_ieso(cfg_word & CFG_IESO); + } + uint valid_pins = m_porta->getEnableMask(); + + if ((cfg_word & CFG_MCLRE) == CFG_MCLRE) + { + assignMCLRPin(4); + } + else + { + unassignMCLRPin(); + } + + wdt.initialize((cfg_word & CFG_WDTE) == CFG_WDTE); + + set_int_osc(false); + + // AnalogReq is used so ADC does not change clock names + // set_config_word is first called with default and then + // often called a second time. the following call is to + // reset porta so next call to AnalogReq sill set the pin name + // + (&(*m_porta)[4])->AnalogReq((Register *)this, false, "porta4"); + valid_pins |= 0x20; + switch(config_clock_mode) + { + + case 0: // LP oscillator: low power crystal is on RA4 and RA5 + case 1: // XT oscillator: crystal/resonator is on RA4 and RA5 + case 2: // HS oscillator: crystal/resonator is on RA4 and RA5 + (&(*m_porta)[4])->AnalogReq((Register *)this, true, "OSC2"); + valid_pins &= 0xcf; + break; + + case 3: // EC I/O on RA4 pin, CLKIN on RA5 + valid_pins &= 0xef; + break; + + + case 5: // INTOSC CLKOUT on RA4 pin + (&(*m_porta)[4])->AnalogReq((Register *)this, true, "CLKOUT"); + case 4: // INTOSC + set_int_osc(true); + osccon->set_rc_frequency(); + break; + + case 6: //RC oscillator: I/O on RA4 pin, RC on RA5 + valid_pins &= 0xdf; + break; + + case 7: // RC oscillator: CLKOUT on RA4 pin, RC on RA5 + (&(*m_porta)[4])->AnalogReq((Register *)this, true, "CLKOUT"); + valid_pins &= 0xdf; + break; + }; + + if (valid_pins != m_porta->getEnableMask()) // enable new pins for IO + { + m_porta->setEnableMask(valid_pins); + m_trisa->setEnableMask(valid_pins); + } + return(true); + } + return false; +} +//======================================================================== +// +// Pic 16F677 +// + +Processor * P16F677::construct(const char *name) +{ + P16F677 *p = new P16F677(name); + + p->create(256); + p->set_hasSSP(); + p->create_sfr_map(); + p->create_invalid_registers (); + + return p; +} + +P16F677::P16F677(const char *_name, const char *desc) + : P16F631(_name,desc), + ssp(this), + anselh(this,"anselh", "Analog Select high"), + adresh(this,"adresh", "A2D Result High"), + adresl(this,"adresl", "A2D Result Low") +{ +} + +P16F677::~P16F677() +{ + delete_file_registers(0x20,0x3f); + delete_file_registers(0xa0,0xbf); + + remove_sfr_register(&anselh); + + if (hasSSP()) { + remove_sfr_register(&ssp.sspbuf); + remove_sfr_register(&ssp.sspcon); + remove_sfr_register(&ssp.sspadd); + remove_sfr_register(&ssp.sspstat); + } + remove_sfr_register(&adresl); + remove_sfr_register(&adresh); + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + delete m_cvref; + delete m_v06ref; +} + +void P16F677::create_sfr_map() +{ + + ansel.setAdcon1(&adcon1); + ansel.setAnselh(&anselh); + anselh.setAdcon1(&adcon1); + anselh.setAnsel(&ansel); + anselh.setValidBits(0x0f); + ansel.setValidBits(0xff); + adcon0.setAdresLow(&adresl); + adcon0.setAdres(&adresh); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(&intcon_reg); + adcon0.setA2DBits(10); + adcon0.setPir(pir1); + adcon0.setChannel_Mask(0xf); + adcon0.setChannel_shift(2); + adcon0.setGo(1); + adcon0.setValidBits(0xff); + + adcon1.setValidBits(0xb0); + adcon1.setAdcon0(&adcon0); + adcon1.setNumberOfChannels(14); + adcon1.setValidCfgBits(ADCON1::VCFG0 , 6); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[4]); + + adcon1.setIOPin(8, &(*m_portc)[6]); + adcon1.setIOPin(9, &(*m_portc)[7]); + adcon1.setIOPin(10, &(*m_portb)[4]); + adcon1.setIOPin(11, &(*m_portb)[5]); + adcon1.setVoltRef(12, 0.0); + adcon1.setVoltRef(13, 0.0); + + m_cvref = new a2d_stimulus(&adcon1, 12, "a2d_cvref"); + m_v06ref = new a2d_stimulus(&adcon1, 13, "a2d_v06ref"); + ((Processor*)this)->CVREF->attach_stimulus(m_cvref); + ((Processor*)this)->V06REF->attach_stimulus(m_v06ref); + + // set a2d modes where an1 is Vref+ + adcon1.setVrefHiConfiguration(2, 1); + + add_sfr_register(&anselh, 0x11f, RegisterValue(0x0f,0)); + add_file_registers(0x20,0x3f,0); + add_file_registers(0xa0,0xbf,0); +// ccp1con.setIOpin(&(*m_portc)[2], &(*m_portb)[2], &(*m_portb)[1], &(*m_portb)[4]); + + + if (hasSSP()) { + add_sfr_register(&ssp.sspbuf, 0x13, RegisterValue(0,0),"sspbuf"); + add_sfr_register(&ssp.sspcon, 0x14, RegisterValue(0,0),"sspcon"); + add_sfr_register(&ssp.sspadd, 0x93, RegisterValue(0,0),"sspadd"); + add_sfr_register(&ssp.sspstat, 0x94, RegisterValue(0,0),"sspstat"); + + ssp.initialize( + get_pir_set(), // PIR + &(*m_portb)[6], // SCK + &(*m_portc)[6], // SS + &(*m_portc)[7], // SDO + &(*m_portb)[4], // SDI + m_trisb, // i2c tris port + SSP_TYPE_SSP + ); + } + add_sfr_register(&adresl, 0x9e, RegisterValue(0,0)); + add_sfr_register(&adresh, 0x1e, RegisterValue(0,0)); + add_sfr_register(&adcon0, 0x1f, RegisterValue(0,0)); + add_sfr_register(&adcon1, 0x9f, RegisterValue(0,0)); +} +//======================================================================== +// +// Pic 16F685 +// + +Processor * P16F685::construct(const char *name) +{ + P16F685 *p = new P16F685(name); + + p->create(256); + p->create_sfr_map(); + p->create_invalid_registers (); + + return p; +} + +P16F685::P16F685(const char *_name, const char *desc) + : P16F677(_name,desc), + t2con(this, "t2con", "TMR2 Control"), + pr2(this, "pr2", "TMR2 Period Register"), + tmr2(this, "tmr2", "TMR2 Register"), + tmr1l(this, "tmr1l", "TMR1 Low"), + tmr1h(this, "tmr1h", "TMR1 High"), + ccp1con(this, "ccp1con", "Capture Compare Control"), + ccpr1l(this, "ccpr1l", "Capture Compare 1 Low"), + ccpr1h(this, "ccpr1h", "Capture Compare 1 High"), + pcon(this, "pcon", "pcon"), + eccpas(this, "eccpas", "ECCP Auto-Shutdown Control Register"), + pwm1con(this, "pwm1con", "Enhanced PWM Control Register"), + pstrcon(this, "pstrcon", "Pulse Sterring Control Register") +{ + set_hasSSP(); +} + +P16F685::~P16F685() +{ + delete_file_registers(0xc0,0xef); + delete_file_registers(0x120,0x16f); + remove_sfr_register(&pstrcon); + remove_sfr_register(&tmr2); + remove_sfr_register(&t2con); + remove_sfr_register(&pr2); + remove_sfr_register(&ccpr1l); + remove_sfr_register(&ccpr1h); + remove_sfr_register(&ccp1con); + remove_sfr_register(&pwm1con); + remove_sfr_register(&eccpas); +} + +void P16F685::create_sfr_map() +{ + P16F677::create_sfr_map(); + + add_sfr_register(get_eeprom()->get_reg_eedatah(), 0x10e ); + add_sfr_register(get_eeprom()->get_reg_eeadrh(), 0x10f); + + // Enable program memory reads and writes. + get_eeprom()->get_reg_eecon1()->set_bits(EECON1::EEPGD); + + + add_sfr_register(&tmr2, 0x11, RegisterValue(0,0)); + add_sfr_register(&t2con, 0x12, RegisterValue(0,0)); + add_sfr_register(&pr2, 0x92, RegisterValue(0xff,0)); + t2con.tmr2 = &tmr2; + tmr2.pir_set = get_pir_set(); + tmr2.pr2 = &pr2; + tmr2.t2con = &t2con; + tmr2.add_ccp ( &ccp1con ); + pr2.tmr2 = &tmr2; + + eccpas.setIOpin(0, 0, &(*m_portb)[0]); + eccpas.link_registers(&pwm1con, &ccp1con); + add_sfr_register(&pstrcon, 0x19d, RegisterValue(1,0)); + + ccp1con.setIOpin(&(*m_portc)[5], &(*m_portc)[4], &(*m_portc)[3], &(*m_portc)[2]); + ccp1con.setBitMask(0xff); + ccp1con.pstrcon = &pstrcon; + ccp1con.pwm1con = &pwm1con; + ccp1con.setCrosslinks(&ccpr1l, pir1, PIR1v2::CCP1IF, &tmr2, &eccpas); + ccpr1l.ccprh = &ccpr1h; + ccpr1l.tmrl = &tmr1l; + ccpr1h.ccprl = &ccpr1l; + + add_sfr_register(&ccpr1l, 0x15, RegisterValue(0,0)); + add_sfr_register(&ccpr1h, 0x16, RegisterValue(0,0)); + add_sfr_register(&ccp1con, 0x17, RegisterValue(0,0)); + + add_sfr_register(&pwm1con, 0x1c, RegisterValue(0,0)); + add_sfr_register(&eccpas, 0x1d, RegisterValue(0,0)); +// add_file_registers(0x20,0x3f,0); +// add_file_registers(0xa0,0xef,0); + add_file_registers(0xc0,0xef,0); + add_file_registers(0x120,0x16f,0); + + +} +//======================================================================== +// +// Pic 16F687 +// + +Processor * P16F687::construct(const char *name) +{ + P16F687 *p = new P16F687(name); + + p->create(256); + p->create_sfr_map(); + p->create_invalid_registers (); + + return p; +} + +P16F687::P16F687(const char *_name, const char *desc) + : P16F677(_name,desc), + tmr1l(this, "tmr1l", "TMR1 Low"), + tmr1h(this, "tmr1h", "TMR1 High"), + pcon(this, "pcon", "pcon"), + usart(this) +{ + set_hasSSP(); +} + +P16F687::~P16F687() +{ + remove_sfr_register(&usart.rcsta); + remove_sfr_register(&usart.txsta); + remove_sfr_register(&usart.spbrg); + remove_sfr_register(&usart.spbrgh); + remove_sfr_register(&usart.baudcon); + delete_sfr_register(usart.txreg); + delete_sfr_register(usart.rcreg); +} + +void P16F687::create_sfr_map() +{ + P16F677::create_sfr_map(); + + add_sfr_register(get_eeprom()->get_reg_eedatah(), 0x10e); + add_sfr_register(get_eeprom()->get_reg_eeadrh(), 0x10f); + +// add_file_registers(0x20,0x3f,0); +// add_file_registers(0xa0,0xbf,0); + + usart.initialize(pir1,&(*m_portb)[7], &(*m_portb)[5], + new _TXREG(this,"txreg", "USART Transmit Register", &usart), + new _RCREG(this,"rcreg", "USART Receiver Register", &usart)); + + add_sfr_register(&usart.rcsta, 0x18, RegisterValue(0,0),"rcsta"); + add_sfr_register(&usart.txsta, 0x98, RegisterValue(2,0),"txsta"); + add_sfr_register(&usart.spbrg, 0x99, RegisterValue(0,0),"spbrg"); + add_sfr_register(&usart.spbrgh, 0x9a, RegisterValue(0,0),"spbrgh"); + add_sfr_register(&usart.baudcon, 0x9b,RegisterValue(0x40,0),"baudctl"); + add_sfr_register(usart.txreg, 0x19, RegisterValue(0,0),"txreg"); + add_sfr_register(usart.rcreg, 0x1a, RegisterValue(0,0),"rcreg"); + usart.set_eusart(true); + +} +//======================================================================== +// +// Pic 16F689 +// + +Processor * P16F689::construct(const char *name) +{ + P16F689 *p = new P16F689(name); + + p->create(256); + p->create_sfr_map(); + p->create_invalid_registers (); + + return p; +} + +P16F689::P16F689(const char *_name, const char *desc) + : P16F687(_name,desc) +{ + set_hasSSP(); +} + +//======================================================================== +// +Processor * P16F690::construct(const char *name) +{ + P16F690 *p = new P16F690(name); + + p->create(256); + p->create_sfr_map(); + p->create_invalid_registers (); + + return p; +} + +P16F690::P16F690(const char *_name, const char *desc) + : P16F685(_name,desc), + ccp2con(this, "ccp2con", "Capture Compare Control"), + ccpr2l(this, "ccpr2l", "Capture Compare 2 Low"), + ccpr2h(this, "ccpr2h", "Capture Compare 2 High"), + usart(this) +{ + set_hasSSP(); +} + +P16F690::~P16F690() +{ + remove_sfr_register(&usart.rcsta); + remove_sfr_register(&usart.txsta); + remove_sfr_register(&usart.spbrg); + remove_sfr_register(&usart.spbrgh); + remove_sfr_register(&usart.baudcon); + delete_sfr_register(usart.txreg); + delete_sfr_register(usart.rcreg); +} + +void P16F690::create_sfr_map() +{ + P16F685::create_sfr_map(); + + tmr2.ssp_module[0] = &ssp; + eccpas.setIOpin(0, 0, &(*m_portb)[0]); + eccpas.link_registers(&pwm1con, &ccp1con); + + usart.initialize(pir1,&(*m_portb)[7], &(*m_portb)[5], + new _TXREG(this,"txreg", "USART Transmit Register", &usart), + new _RCREG(this,"rcreg", "USART Receiver Register", &usart)); + + add_sfr_register(&usart.rcsta, 0x18, RegisterValue(0,0),"rcsta"); + add_sfr_register(&usart.txsta, 0x98, RegisterValue(2,0),"txsta"); + add_sfr_register(&usart.spbrg, 0x99, RegisterValue(0,0),"spbrg"); + add_sfr_register(&usart.spbrgh, 0x9a, RegisterValue(0,0),"spbrgh"); + add_sfr_register(&usart.baudcon, 0x9b,RegisterValue(0x40,0),"baudctl"); + add_sfr_register(usart.txreg, 0x19, RegisterValue(0,0),"txreg"); + add_sfr_register(usart.rcreg, 0x1a, RegisterValue(0,0),"rcreg"); + usart.set_eusart(true); + + // add_sfr_register(&pstrcon, 0x19d, RegisterValue(1,0)); +} diff --git a/src/gpsim/devices/p16f88x.h b/src/gpsim/devices/p16f88x.h new file mode 100644 index 0000000..d3f469a --- /dev/null +++ b/src/gpsim/devices/p16f88x.h @@ -0,0 +1,510 @@ +/* + Copyright (C) 2010,2015 Roy Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __P16F88X_H__ +#define __P16F88X_H__ + +#include "p16x6x.h" + + +/*************************************************************************** + * + * Include file for: P16F887, P16F88 + * + * + * + ***************************************************************************/ + +class P16F88x : public _14bit_processor +{ +public: + + INTCON_14_PIR intcon_reg; + + PicPortRegister *m_porta; + PicTrisRegister *m_trisa; + + PicPortGRegister *m_portb; + PicTrisRegister *m_trisb; + WPU *m_wpu; + IOC *m_ioc; + + PicPortRegister *m_portc; + PicTrisRegister *m_trisc; + + T1CON t1con; + PIR *pir1; + PIE pie1; + PIR *pir2; + PIE pie2; + T2CON t2con; + PR2 pr2; + TMR2 tmr2; + TMRL tmr1l; + TMRH tmr1h; + CCPCON ccp1con; + CCPRL ccpr1l; + CCPRH ccpr1h; + CCPCON ccp2con; + CCPRL ccpr2l; + CCPRH ccpr2h; + PCON pcon; + SSP_MODULE ssp; + PIR1v2 *pir1_2_reg; + PIR2v3 *pir2_2_reg; + PIR_SET_2 pir_set_2_def; + + OSCCON *osccon; + OSCTUNE osctune; + WDTCON wdtcon; + USART_MODULE usart; + ComparatorModule2 comparator; + VRCON vrcon; + SRCON srcon; + ANSEL ansel; + ANSEL_H anselh; + ADCON0 adcon0; + ADCON1 adcon1; + ECCPAS eccpas; + PWM1CON pwm1con; + PSTRCON pstrcon; + + + sfr_register adresh; + sfr_register adresl; + + PicPortRegister *m_porte; + PicPSP_TrisRegister *m_trise; + + + P16F88x(const char *_name=0, const char *desc=0); + ~P16F88x(); + virtual void set_out_of_range_pm(uint address, uint value); + +// virtual PROCESSOR_TYPE isa(){return _P16F88x_;}; + + virtual uint register_memory_size () const { return 0x200;}; + + virtual uint program_memory_size() { return 0; }; + virtual void option_new_bits_6_7(uint bits); + + virtual void create_sfr_map(); + + // The f628 (at least) I/O pins depend on the Fosc Configuration bits. + virtual bool set_config_word(uint address, uint cfg_word); + + + virtual void create(int eesize); + virtual void create_iopin_map(); + virtual void create_config_memory(); + + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as P16F8x expects to have a PIR capable EEPROM + assert(0); + } + + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { + eeprom = ep; + } + virtual EEPROM_WIDE *get_eeprom() { return ((EEPROM_WIDE *)eeprom); } + + + virtual PIR *get_pir1() { return (pir1); } + virtual PIR *get_pir2() { return (pir2); } + virtual PIR_SET *get_pir_set() { return (&pir_set_2_def); } +}; + + +class P16F884 : public P16F88x +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F884_;}; + + virtual uint program_memory_size() const { return 4096; }; + PicPSP_PortRegister *m_portd; + + PicTrisRegister *m_trisd; + + + P16F884(const char *_name=0, const char *desc=0); + ~P16F884(); + static Processor *construct(const char *name); + + virtual void create_sfr_map(); + virtual void create_iopin_map(); +}; + +class P16F887 : public P16F884 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F887_;}; + + virtual uint program_memory_size() const { return 8192; }; + + + P16F887(const char *_name=0, const char *desc=0); + ~P16F887(); + static Processor *construct(const char *name); + + virtual void create_sfr_map(); +}; +class P16F882 : public P16F88x +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F882_;}; + + virtual uint program_memory_size() const { return 2048; }; + + + P16F882(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + + virtual void create_sfr_map(); + virtual void create_iopin_map(); +}; +class P16F883 : public P16F882 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F883_;}; + + virtual uint program_memory_size() const { return 4096; }; + + + P16F883(const char *_name=0, const char *desc=0); + ~P16F883(); + static Processor *construct(const char *name); + + virtual void create_sfr_map(); +}; + +class P16F886 : public P16F882 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F886_;}; + + virtual uint program_memory_size() const { return 8192; }; + + P16F886(const char *_name=0, const char *desc=0); + ~P16F886(); + static Processor *construct(const char *name); + + virtual void create_sfr_map(); +}; + +class P16F631 : public _14bit_processor +{ +public: + + P16F631(const char *_name=0, const char *desc=0); + virtual ~P16F631(); + + T1CON t1con; + PIR *pir1; + PIR *pir2; + PIE pie1; + PIE pie2; + TMRL tmr1l; + TMRH tmr1h; + OSCTUNE osctune; + PCON pcon; + WDTCON wdtcon; + OSCCON *osccon; + VRCON_2 vrcon; + SRCON srcon; + ANSEL ansel; + ComparatorModule2 comparator; + ADCON0_12F adcon0; + ADCON1_16F adcon1; + + + EEPROM_WIDE *e; + PIR1v2 *pir1_2_reg; + PIR2v3 *pir2_3_reg; + + INTCON_14_PIR intcon_reg; + PIR_SET_2 pir_set_2_def; + WPU *m_wpua; + WPU *m_wpub; + IOC *m_ioca; + IOC *m_iocb; + + + virtual PIR *get_pir2() { return (pir2); } + virtual PIR *get_pir1() { return (pir1); } + virtual PIR_SET *get_pir_set() { return (&pir_set_2_def); } + + + + PicPortGRegister *m_porta; + PicTrisRegister *m_trisa; + + PicPortGRegister *m_portb; + PicTrisRegister *m_trisb; + + PicPortRegister *m_portc; + PicTrisRegister *m_trisc; + + a2d_stimulus *m_cvref; + a2d_stimulus *m_v06ref; + + virtual PROCESSOR_TYPE isa(){return _P16F631_;} + static Processor *construct(const char *name); + void create(int); + + virtual void create_sfr_map(); + virtual void create_iopin_map(); + virtual void option_new_bits_6_7(uint bits); + + virtual uint program_memory_size() const { return 0x400; }; + virtual uint register_memory_size () const { return 0x200; } + + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { eeprom = ep; } + virtual void create_config_memory(); + virtual bool set_config_word(uint address, uint cfg_word); +}; + +class P16F677 : public P16F631 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F677_;}; + + virtual uint program_memory_size() const { return 4096; }; + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as P16F8x expects to have a PIR capable EEPROM + assert(0); + } + + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { + eeprom = ep; + } + virtual EEPROM_WIDE *get_eeprom() { return ((EEPROM_WIDE *)eeprom); } + + + P16F677(const char *_name=0, const char *desc=0); + ~P16F677(); + static Processor *construct(const char *name); + + SSP_MODULE ssp; + + ANSEL_H anselh; + sfr_register adresh; + sfr_register adresl; + virtual void create_sfr_map(); +}; + +class P16F687 : public P16F677 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F687_;}; + + virtual uint program_memory_size() const { return 2048; }; + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as P16F8x expects to have a PIR capable EEPROM + assert(0); + } + + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { + eeprom = ep; + } + virtual EEPROM_WIDE *get_eeprom() { return ((EEPROM_WIDE *)eeprom); } + + + P16F687(const char *_name=0, const char *desc=0); + ~P16F687(); + static Processor *construct(const char *name); + TMRL tmr1l; + TMRH tmr1h; + PCON pcon; + + USART_MODULE usart; + + virtual void create_sfr_map(); +}; + +class P16F684 : public _14bit_processor +{ +public: + + ComparatorModule comparator; + virtual PROCESSOR_TYPE isa(){return _P16F684_;}; + virtual uint program_memory_size() const { return 2048; }; + virtual uint register_memory_size () const { return 0x100;}; + virtual void create(int eesize); + virtual void create_iopin_map(); + + + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as P16F8x expects to have a PIR capable EEPROM + assert(0); + } + + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { + eeprom = ep; + } + virtual EEPROM_WIDE *get_eeprom() { return ((EEPROM_WIDE *)eeprom); } + + virtual void option_new_bits_6_7(uint bits); + + virtual void create_config_memory(); + virtual bool set_config_word(uint, uint); + + + P16F684(const char *_name=0, const char *desc=0); + virtual ~P16F684(); + static Processor *construct(const char *name); + PicPortGRegister *m_porta; + PicTrisRegister *m_trisa; + + PicPortRegister *m_portc; + PicTrisRegister *m_trisc; + + WPU *m_wpua; + IOC *m_ioca; + + + T1CON t1con; + T2CON t2con; + PIR1v3 *pir1; + PIE pie1; + PR2 pr2; + TMR2 tmr2; + TMRL tmr1l; + TMRH tmr1h; + OSCTUNE osctune; + PCON pcon; + WDTCON wdtcon; + OSCCON *osccon; + ANSEL ansel; + ADCON0_12F adcon0; + ADCON1_16F adcon1; + sfr_register adresh; + sfr_register adresl; + + CCPCON ccp1con; + CCPRL ccpr1l; + CCPRH ccpr1h; + ECCPAS eccpas; + PWM1CON pwm1con; + PSTRCON pstrcon; + PIR1v3 *pir1_3_reg; + INTCON_14_PIR intcon_reg; + PIR_SET_1 pir_set_def; + IOC *m_iocc; + EEPROM_WIDE *e; + + virtual PIR_SET *get_pir_set() { return (&pir_set_def); } + + virtual void create_sfr_map(); +}; + +class P16F685 : public P16F677 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F685_;}; + + virtual uint program_memory_size() const { return 4096; }; + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as P16F8x expects to have a PIR capable EEPROM + assert(0); + } + + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { + eeprom = ep; + } + virtual EEPROM_WIDE *get_eeprom() { return ((EEPROM_WIDE *)eeprom); } + + + P16F685(const char *_name=0, const char *desc=0); + ~P16F685(); + static Processor *construct(const char *name); + T2CON t2con; + PR2 pr2; + TMR2 tmr2; + TMRL tmr1l; + TMRH tmr1h; + CCPCON ccp1con; + CCPRL ccpr1l; + CCPRH ccpr1h; + PCON pcon; + ECCPAS eccpas; + PWM1CON pwm1con; + PSTRCON pstrcon; + + virtual void create_sfr_map(); +}; + +class P16F689 : public P16F687 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F689_;}; + + virtual uint program_memory_size() const { return 4096; }; + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as P16F8x expects to have a PIR capable EEPROM + assert(0); + } + + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { + eeprom = ep; + } + virtual EEPROM_WIDE *get_eeprom() { return ((EEPROM_WIDE *)eeprom); } + + + P16F689(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); +}; +class P16F690 : public P16F685 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F690_;}; + + virtual uint program_memory_size() const { return 4096; }; + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as P16F8x expects to have a PIR capable EEPROM + assert(0); + } + + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { eeprom = ep; } + + virtual EEPROM_WIDE *get_eeprom() { return ((EEPROM_WIDE *)eeprom); } + + P16F690(const char *_name=0, const char *desc=0); + ~P16F690(); + + static Processor *construct(const char *name); + CCPCON ccp2con; + CCPRL ccpr2l; + CCPRH ccpr2h; + + USART_MODULE usart; + + virtual void create_sfr_map(); +}; +#endif diff --git a/src/gpsim/devices/p16f8x.cc b/src/gpsim/devices/p16f8x.cc new file mode 100644 index 0000000..49a7689 --- /dev/null +++ b/src/gpsim/devices/p16f8x.cc @@ -0,0 +1,868 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + Copyright (C) 2006 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +// +// p16f8x +// +// This file supports: +// PIC16F87 +// PIC16F88 +// PIC16F818 +// PIC16F819 +// + +#include +#include +#include + +//#include "config.h" + +#include "stimuli.h" + +#include "p16f8x.h" +#include "pic-ioports.h" +#include "packages.h" + + +//======================================================================== +// +// Configuration Memory for the 16F8X devices. + +class Config1 : public ConfigWord +{ +public: + Config1(pic_processor *pCpu) + : ConfigWord("CONFIG1", 0x3fff, "Configuration Word", pCpu, 0x2007) + { + } + + enum { + FOSC0 = 1<<0, + FOSC1 = 1<<1, + WDTEN = 1<<2, + PWRTEN = 1<<3, + + FOSC2 = 1<<4, + MCLRE = 1<<5, + BOREN = 1<<6, + LVP = 1<<7, + + CPD = 1<<8, + WRT0 = 1<<9, + WRT1 = 1<<10, + DEBUG = 1<<11, + + CCPMX = 1<<12, + CP = 1<<13 + }; + + virtual void set(int64_t v) + { + Integer::set(v); + if (m_pCpu) + m_pCpu->wdt.initialize((v & WDTEN) == WDTEN); + } +}; + + +//======================================================================== + +P16F8x::P16F8x(const char *_name, const char *desc) + : P16X6X_processor(_name,desc), + wdtcon(this, "wdtcon", "WDT Control", 0x1f), + osccon(0), + osctune(this, "osctune", "OSC Tune"), + usart(this), + comparator(this) +{ + pir1_2_reg = new PIR1v2(this,"pir1","Peripheral Interrupt Register",&intcon_reg,&pie1); + pir2_2_reg = new PIR2v2(this,"pir2","Peripheral Interrupt Register",&intcon_reg,&pie2); + delete pir1; + delete pir2; + pir1 = pir1_2_reg; + pir2 = pir2_2_reg; +} + +P16F8x::~P16F8x() +{ + delete_file_registers(0xc0, 0xef); + delete_file_registers(0x110,0x16f); + delete_file_registers(0x190,0x1ef); + remove_sfr_register(&comparator.cmcon); + remove_sfr_register(&comparator.vrcon); + remove_sfr_register(&wdtcon); + remove_sfr_register(get_eeprom()->get_reg_eedata()); + remove_sfr_register(get_eeprom()->get_reg_eeadr()); + remove_sfr_register(get_eeprom()->get_reg_eedatah()); + remove_sfr_register(get_eeprom()->get_reg_eeadrh()); + remove_sfr_register(get_eeprom()->get_reg_eecon1()); + remove_sfr_register(get_eeprom()->get_reg_eecon2()); + remove_sfr_register(&usart.rcsta); + remove_sfr_register(&usart.txsta); + remove_sfr_register(&usart.spbrg); + delete_sfr_register(usart.txreg); + delete_sfr_register(usart.rcreg); + delete get_eeprom(); + remove_sfr_register(osccon); + remove_sfr_register(&osctune); + remove_sfr_register(&pie2); +} + +void P16F8x::create_iopin_map() +{ + package = new Package(18); + if(!package) return; + + // Now Create the package and place the I/O pins + package->assign_pin(17, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin(18, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 1, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 3, m_porta->addPin(new IO_open_collector("porta4"),4)); + package->assign_pin( 4, m_porta->addPin(new IO_bi_directional("porta5"),5)); + package->assign_pin(15, m_porta->addPin(new IO_bi_directional("porta6"),6)); + package->assign_pin(16, m_porta->addPin(new IO_bi_directional("porta7"),7)); + + package->assign_pin(5, 0); // Vss + package->assign_pin( 6, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin( 7, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin( 8, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin( 9, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(10, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(11, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(12, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(13, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + package->assign_pin(14, 0); // Vdd + + if (hasSSP()) { + ssp.initialize( + get_pir_set(), // PIR + &(*m_portb)[4], // SCK + &(*m_portb)[5], // SS + &(*m_portb)[2], // SDO + &(*m_portb)[1], // SDI + m_trisb, // i2c tris port + SSP_TYPE_SSP + ); + } +} + +void P16F8x::create_sfr_map() +{ + pir_set_2_def.set_pir1(pir1); + pir_set_2_def.set_pir2(pir2); + + add_file_registers(0xc0, 0xef, 0); + add_file_registers(0x110,0x16f,0); + add_file_registers(0x190,0x1ef,0); + + alias_file_registers(0x70,0x7f,0x80); + alias_file_registers(0x70,0x7f,0x100); + alias_file_registers(0x70,0x7f,0x180); + + add_sfr_register(get_pir2(), 0x0d, RegisterValue(0,0),"pir2"); + add_sfr_register(&pie2, 0x8d, RegisterValue(0,0)); + + pir_set_def.set_pir2(pir2); + + pie2.setPir(get_pir2()); + alias_file_registers(0x00,0x04,0x100); + alias_file_registers(0x80,0x84,0x100); + + alias_file_registers(0x06,0x06,0x100); + alias_file_registers(0x86,0x86,0x100); + + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x10c); + add_sfr_register(get_eeprom()->get_reg_eeadr(), 0x10d); + add_sfr_register(get_eeprom()->get_reg_eedatah(), 0x10e); + add_sfr_register(get_eeprom()->get_reg_eeadrh(), 0x10f); + add_sfr_register(get_eeprom()->get_reg_eecon1(), 0x18c, RegisterValue(0,0)); + add_sfr_register(get_eeprom()->get_reg_eecon2(), 0x18d); + + //alias_file_registers(0x0a,0x0b,0x080); // Already done + alias_file_registers(0x0a,0x0b,0x100); + alias_file_registers(0x0a,0x0b,0x180); + + intcon = &intcon_reg; + intcon_reg.set_pir_set(get_pir_set()); + + add_sfr_register(osccon, 0x8f, RegisterValue(0,0),"osccon"); + add_sfr_register(&osctune, 0x90, RegisterValue(0,0),"osctune"); + + osccon->set_osctune(&osctune); + osctune.set_osccon(osccon); + osccon->write_mask = 0x73; + osccon->has_iofs_bit = true; + + usart.initialize(pir1,&(*m_portb)[5], &(*m_portb)[2], + new _TXREG(this,"txreg", "USART Transmit Register", &usart), + new _RCREG(this,"rcreg", "USART Receiver Register", &usart)); + + add_sfr_register(&usart.rcsta, 0x18, RegisterValue(0,0),"rcsta"); + add_sfr_register(&usart.txsta, 0x98, RegisterValue(2,0),"txsta"); + add_sfr_register(&usart.spbrg, 0x99, RegisterValue(0,0),"spbrg"); + add_sfr_register(usart.txreg, 0x19, RegisterValue(0,0),"txreg"); + add_sfr_register(usart.rcreg, 0x1a, RegisterValue(0,0),"rcreg"); + // Link the comparator and voltage ref to porta + comparator.initialize(get_pir_set(), &(*m_porta)[2], &(*m_porta)[0], + &(*m_porta)[1], &(*m_porta)[2], &(*m_porta)[3], &(*m_porta)[3], + &(*m_porta)[4]); + + comparator.cmcon.set_configuration(1, 0, AN0, AN3, AN0, AN3, ZERO); + comparator.cmcon.set_configuration(2, 0, AN1, AN2, AN1, AN2, ZERO); + comparator.cmcon.set_configuration(1, 1, AN0, AN2, AN3, AN2, NO_OUT); + comparator.cmcon.set_configuration(2, 1, AN1, AN2, AN1, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 2, AN0, VREF, AN3, VREF, NO_OUT); + comparator.cmcon.set_configuration(2, 2, AN1, VREF, AN2, VREF, NO_OUT); + comparator.cmcon.set_configuration(1, 3, AN0, AN2, AN0, AN2, NO_OUT); + comparator.cmcon.set_configuration(2, 3, AN1, AN2, AN1, AN3, NO_OUT); + comparator.cmcon.set_configuration(1, 4, AN0, AN3, AN0, AN3, NO_OUT); + comparator.cmcon.set_configuration(2, 4, AN1, AN2, AN1, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 5, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 5, AN1, AN2, AN1, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 6, AN0, AN2, AN0, AN2, OUT0); + comparator.cmcon.set_configuration(2, 6, AN1, AN2, AN1, AN2, OUT1); + comparator.cmcon.set_configuration(1, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + + add_sfr_register(&comparator.cmcon, 0x9c, RegisterValue(7,0),"cmcon"); + add_sfr_register(&comparator.vrcon, 0x9d, RegisterValue(0,0),"cvrcon"); + add_sfr_register(&wdtcon, 0x105, RegisterValue(0x08,0),"wdtcon"); +} + +void P16F8x::set_out_of_range_pm(uint address, uint value) +{ + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + { + get_eeprom()->change_rom(address - 0x2100, value); + } +} + +//======================================================================== +bool P16F8x::set_config_word(uint address, uint cfg_word) +{ + enum { + CFG_FOSC0 = 1<<0, + CFG_FOSC1 = 1<<1, + CFG_FOSC2 = 1<<4, + CFG_MCLRE = 1<<5, + CFG_CCPMX = 1<<12, + CFG2_IESO = 1<<1 + }; + + uint fosc; + + // Let the base class do most of the work: + if (address == 0x2007) + { + pic_processor::set_config_word(address, cfg_word); + + uint valid_pins = m_porta->getEnableMask(); + + set_int_osc(false); + // Careful these bits not adjacent + fosc = ((cfg_word & CFG_FOSC2) >> 2) | (cfg_word & (CFG_FOSC0 | CFG_FOSC1)); + if (osccon) + { + osccon->set_config_xosc(fosc < 3); + osccon->set_config_irc(fosc == 4 || fosc == 5); + } + switch(fosc) + { + case 0: // LP oscillator: low power crystal is on RA6 and RA7 + case 1: // XT oscillator: crystal/resonator is on RA6 and RA7 + case 2: // HS oscillator: crystal/resonator is on RA6 and RA7 + break; + + case 3: // EC: RA6 is an I/O, RA7 is a CLKIN + case 6: // ER oscillator: RA6 is an I/O, RA7 is a CLKIN + valid_pins = (valid_pins & 0x7f)|0x40; + break; + + case 4: // INTRC: Internal Oscillator, RA6 and RA7 are I/O's + set_int_osc(true); + valid_pins |= 0xc0; + break; + + case 5: // INTRC: Internal Oscillator, RA7 is an I/O, RA6 is CLKOUT + set_int_osc(true); + valid_pins = (valid_pins & 0xbf)|0x80; + break; + + case 7: // ER oscillator: RA6 is CLKOUT, resistor (?) on RA7 + break; + } + // If the /MCLRE bit is set then RA5 is the MCLR pin, otherwise it's + // a general purpose I/O pin. + if ((cfg_word & CFG_MCLRE)) + { + assignMCLRPin(4); + } + else + { + unassignMCLRPin(); + } + + if (cfg_word & CFG_CCPMX) + ccp1con.setIOpin(&((*m_portb)[0])); + else + ccp1con.setIOpin(&((*m_portb)[3])); + + if (valid_pins != m_porta->getEnableMask()) // enable new pins for IO + { + m_porta->setEnableMask(valid_pins); + m_porta->setTris(m_trisa); + } + return true; + } + else if (address == 0x2008 ) + { + cout << "p16f8x 0x" << hex << address << " config word 0x" << cfg_word << '\n'; + if (osccon) osccon->set_config_ieso(cfg_word & CFG2_IESO); + return true; + } + return false; +} + +//======================================================================== + +void P16F8x::create_config_memory() +{ + m_configMemory = new ConfigMemory(this,2); + m_configMemory->addConfigWord(0,new Config1(this)); + m_configMemory->addConfigWord(1,new ConfigWord("CONFIG2", 0,"Configuration Word",this,0x2008)); + wdt.initialize(true); // default WDT enabled + wdt.set_timeout(0.000035); + set_config_word(0x2007, 0x3fff); +} + + +//======================================================================== +void P16F8x::create(int eesize) +{ + set_hasSSP(); + create_iopin_map(); + + _14bit_processor::create(); + + osccon = new OSCCON_1(this, "osccon", "OSC Control"); + + EEPROM_WIDE *e; + e = new EEPROM_WIDE(this,pir2); + e->initialize(eesize); + e->set_intcon(&intcon_reg); + set_eeprom_wide(e); + + P16X6X_processor::create_sfr_map(); + + status->rp_mask = 0x60; // rp0 and rp1 are valid. + indf->base_address_mask1 = 0x80; // used for indirect accesses above 0x100 + indf->base_address_mask2 = 0x1ff; // used for indirect accesses above 0x100 + + P16F8x::create_sfr_map(); + +} + +void P16F8x::enter_sleep() +{ + tmr1l.sleep(); + osccon->sleep(); + _14bit_processor::enter_sleep(); +} + +void P16F8x::exit_sleep() +{ + if (m_ActivityState == ePASleeping) + { + tmr1l.wake(); + osccon->wake(); + _14bit_processor::exit_sleep(); + } +} + +//======================================================================== + +P16F81x::P16F81x(const char *_name, const char *desc) + : P16X6X_processor(_name,desc), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adresh(this,"adresh", "A2D Result High"), + adresl(this,"adresl", "A2D Result Low"), + osccon(0), + osctune(this, "osctune", "OSC Tune") +{ + pir1_2_reg = new PIR1v2(this,"pir1","Peripheral Interrupt Register",&intcon_reg,&pie1); + pir2_2_reg = new PIR2v2(this,"pir2","Peripheral Interrupt Register",&intcon_reg,&pie2); + delete pir1; + delete pir2; + pir1 = pir1_2_reg; + pir2 = pir2_2_reg; +} + +P16F81x::~P16F81x() +{ + remove_sfr_register(osccon); + remove_sfr_register(&osctune); + remove_sfr_register(&adresl); + remove_sfr_register(&adresh); + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(get_eeprom()->get_reg_eedata()); + remove_sfr_register(get_eeprom()->get_reg_eeadr()); + remove_sfr_register(get_eeprom()->get_reg_eedatah()); + remove_sfr_register(get_eeprom()->get_reg_eeadrh()); + remove_sfr_register(get_eeprom()->get_reg_eecon1()); + remove_sfr_register(get_eeprom()->get_reg_eecon2()); + remove_sfr_register(&pie2); + delete get_eeprom(); +} + +void P16F81x::create_iopin_map() +{ + package = new Package(18); + if(!package) return; + + // Now Create the package and place the I/O pins + package->assign_pin(17, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin(18, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 1, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 3, m_porta->addPin(new IO_open_collector("porta4"),4)); + package->assign_pin( 4, m_porta->addPin(new IO_bi_directional("porta5"),5)); + package->assign_pin(15, m_porta->addPin(new IO_bi_directional("porta6"),6)); + package->assign_pin(16, m_porta->addPin(new IO_bi_directional("porta7"),7)); + + package->assign_pin(5, 0); // Vss + package->assign_pin( 6, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin( 7, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin( 8, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin( 9, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(10, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(11, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(12, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(13, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + package->assign_pin(14, 0); // Vdd + + if (hasSSP()) { + ssp.initialize( + get_pir_set(), // PIR + &(*m_portb)[4], // SCK + &(*m_portb)[5], // SS + &(*m_portb)[2], // SDO + &(*m_portb)[1], // SDI + m_trisb, // i2c tris port + SSP_TYPE_SSP + ); + } +} + +void P16F81x::create_sfr_map() +{ + pir_set_2_def.set_pir1(pir1); + pir_set_2_def.set_pir2(pir2); + + //add_file_registers(0xa0, 0xef, 0); + //add_file_registers(0xc0, 0xef, 0); + //add_file_registers(0x110,0x16f,0); + //add_file_registers(0x190,0x1ef,0); + + add_sfr_register(get_pir2(), 0x0d, RegisterValue(0,0),"pir2"); + add_sfr_register(&pie2, 0x8d, RegisterValue(0,0)); + + pir_set_def.set_pir2(pir2); + + pie2.setPir(get_pir2()); + alias_file_registers(0x00,0x04,0x100); + alias_file_registers(0x80,0x84,0x100); + + alias_file_registers(0x06,0x06,0x100); + alias_file_registers(0x86,0x86,0x100); + + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x10c); + add_sfr_register(get_eeprom()->get_reg_eeadr(), 0x10d); + add_sfr_register(get_eeprom()->get_reg_eedatah(), 0x10e); + add_sfr_register(get_eeprom()->get_reg_eeadrh(), 0x10f); + add_sfr_register(get_eeprom()->get_reg_eecon1(), 0x18c, RegisterValue(0,0)); + add_sfr_register(get_eeprom()->get_reg_eecon2(), 0x18d); + + //alias_file_registers(0x0a,0x0b,0x080); //Already done + alias_file_registers(0x0a,0x0b,0x100); + alias_file_registers(0x0a,0x0b,0x180); + + intcon = &intcon_reg; + intcon_reg.set_pir_set(get_pir_set()); + + add_sfr_register(osccon, 0x8f, RegisterValue(0,0),"osccon"); + add_sfr_register(&osctune, 0x90, RegisterValue(0,0),"osctune"); + + osccon->set_osctune(&osctune); + osccon->write_mask = 0x70; + osctune.set_osccon(osccon); + + add_sfr_register(&adresl, 0x9e, RegisterValue(0,0)); + add_sfr_register(&adresh, 0x1e, RegisterValue(0,0)); + + add_sfr_register(&adcon0, 0x1f, RegisterValue(0,0)); + add_sfr_register(&adcon1, 0x9f, RegisterValue(0,0)); + + adcon0.setAdresLow(&adresl); + adcon0.setAdres(&adresh); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(&intcon_reg); + adcon0.setA2DBits(10); + adcon0.setPir(pir1); + adcon0.setChannel_Mask(7); + + adcon1.setNumberOfChannels(5); + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[3]); + adcon1.setIOPin(4, &(*m_porta)[4]); + + adcon1.setChannelConfiguration(0, 0x1f); + adcon1.setChannelConfiguration(1, 0x1f); + adcon1.setChannelConfiguration(2, 0x1f); + adcon1.setChannelConfiguration(3, 0x1f); + adcon1.setChannelConfiguration(4, 0x0b); + adcon1.setChannelConfiguration(5, 0x0b); + adcon1.setChannelConfiguration(6, 0x00); + adcon1.setChannelConfiguration(7, 0x00); + adcon1.setChannelConfiguration(8, 0x1f); + adcon1.setChannelConfiguration(9, 0x1f); + adcon1.setChannelConfiguration(10, 0x1f); + adcon1.setChannelConfiguration(11, 0x1f); + adcon1.setChannelConfiguration(12, 0x1f); + adcon1.setChannelConfiguration(13, 0x0f); + adcon1.setChannelConfiguration(14, 0x01); + adcon1.setChannelConfiguration(15, 0x0d); + + // set a2d modes where an3 is Vref+ + adcon1.setVrefHiConfiguration(1, 3); + adcon1.setVrefHiConfiguration(3, 3); + adcon1.setVrefHiConfiguration(5, 3); + adcon1.setVrefHiConfiguration(8, 3); + adcon1.setVrefHiConfiguration(10, 3); + adcon1.setVrefHiConfiguration(11, 3); + adcon1.setVrefHiConfiguration(12, 3); + adcon1.setVrefHiConfiguration(13, 3); + adcon1.setVrefHiConfiguration(15, 3); + + // set a2d modes where an2 is Vref- + adcon1.setVrefLoConfiguration(8, 2); + adcon1.setVrefLoConfiguration(11, 2); + adcon1.setVrefLoConfiguration(12, 2); + adcon1.setVrefLoConfiguration(13, 2); + adcon1.setVrefLoConfiguration(15, 2); + + adcon1.setValidCfgBits(ADCON1::PCFG0 | ADCON1::PCFG1 | + ADCON1::PCFG2 | ADCON1::PCFG3 , 0); +} + +void P16F81x::set_out_of_range_pm(uint address, uint value) +{ + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + { + get_eeprom()->change_rom(address - 0x2100, value); + } +} + +//======================================================================== +bool P16F81x::set_config_word(uint address, uint cfg_word) +{ + enum { + CFG_FOSC0 = 1<<0, + CFG_FOSC1 = 1<<1, + CFG_FOSC2 = 1<<4, + CFG_MCLRE = 1<<5, + CFG_CCPMX = 1<<12 + }; + + // Let the base class do most of the work: + if (pic_processor::set_config_word(address, cfg_word)) + { + uint valid_pins = m_porta->getEnableMask(); + + set_int_osc(false); + // Careful these bits not adjacent + switch(cfg_word & (CFG_FOSC0 | CFG_FOSC1 | CFG_FOSC2)) + { + case 0: // LP oscillator: low power crystal is on RA6 and RA7 + case 1: // XT oscillator: crystal/resonator is on RA6 and RA7 + case 2: // HS oscillator: crystal/resonator is on RA6 and RA7 + break; + + case 0x13: // ER oscillator: RA6 is CLKOUT, resistor (?) on RA7 + break; + + case 3: // EC: RA6 is an I/O, RA7 is a CLKIN + case 0x12: // ER oscillator: RA6 is an I/O, RA7 is a CLKIN + valid_pins = (valid_pins & 0x7f)|0x40; + break; + + case 0x10: // INTRC: Internal Oscillator, RA6 and RA7 are I/O's + set_int_osc(true); + valid_pins |= 0xc0; + break; + + case 0x11: // INTRC: Internal Oscillator, RA7 is an I/O, RA6 is CLKOUT + set_int_osc(true); + valid_pins = (valid_pins & 0xbf)|0x80; + break; + } + + // If the /MCLRE bit is set then RA5 is the MCLR pin, otherwise it's + // a general purpose I/O pin. + if ((cfg_word & CFG_MCLRE)) + { + assignMCLRPin(4); + } + else + { + unassignMCLRPin(); + } + + if (cfg_word & CFG_CCPMX) + { + ccp1con.setIOpin(&((*m_portb)[2])); + } + else + { + ccp1con.setIOpin(&((*m_portb)[3])); + } + + if (valid_pins != m_porta->getEnableMask()) // enable new pins for IO + { + m_porta->setEnableMask(valid_pins); + m_porta->setTris(m_trisa); + } + return true; + } + return false; +} + +//======================================================================== + +void P16F81x::create_config_memory() +{ + m_configMemory = new ConfigMemory(this,2); + m_configMemory->addConfigWord(0,new Config1(this)); + m_configMemory->addConfigWord(1,new ConfigWord("CONFIG2", 0,"Configuration Word",this,0x2008)); + wdt.initialize(true); // default WDT enabled + wdt.set_timeout(0.000035); + set_config_word(0x2007, 0x3fff); +} + +//======================================================================== +void P16F81x::create(int eesize) +{ + set_hasSSP(); + create_iopin_map(); + + _14bit_processor::create(); + + osccon = new OSCCON_1(this, "osccon", "OSC Control"); + + EEPROM_WIDE *e; + e = new EEPROM_WIDE(this,pir2); + e->initialize(eesize); + e->set_intcon(&intcon_reg); + set_eeprom_wide(e); + + P16X6X_processor::create_sfr_map(); + + status->rp_mask = 0x60; // rp0 and rp1 are valid. + indf->base_address_mask1 = 0x80; // used for indirect accesses above 0x100 + indf->base_address_mask2 = 0x1ff; // used for indirect accesses above 0x100 + + P16F81x::create_sfr_map(); +} + +//======================================================================== +// +Processor * P16F87::construct(const char *name) +{ + P16F87 *p = new P16F87(name); + + p->P16F8x::create(256); + p->P16F87::create_sfr_map(); + p->create_invalid_registers (); + + return p; +} + +P16F87::P16F87(const char *_name, const char *desc) + : P16F8x(_name,desc) +{ + m_porta->setEnableMask(0xff); + // trisa5 is an input only pin + m_trisa->setEnableMask(0xdf); +} + +void P16F87::create_sfr_map() +{ +} +//======================================================================== +// +Processor * P16F88::construct(const char *name) +{ + P16F88 *p = new P16F88(name); + + p->P16F88::create(); + p->create_invalid_registers (); + + return p; +} + +P16F88::P16F88(const char *_name, const char *desc) + : P16F87(_name,desc), + ansel(this,"ansel", "Analog Select"), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adresh(this,"adresh", "A2D Result High"), + adresl(this,"adresl", "A2D Result Low") +{ +} + +P16F88::~P16F88() +{ + remove_sfr_register(&adresl); + remove_sfr_register(&adresh); + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&ansel); +} +void P16F88::create() +{ + P16F8x::create(256); + P16F88::create_sfr_map(); +} + +void P16F88::create_sfr_map() +{ + add_sfr_register(&adresl, 0x9e, RegisterValue(0,0)); + add_sfr_register(&adresh, 0x1e, RegisterValue(0,0)); + + add_sfr_register(&adcon0, 0x1f, RegisterValue(0,0)); + add_sfr_register(&adcon1, 0x9f, RegisterValue(0,0)); + add_sfr_register(&ansel, 0x9b, RegisterValue(0x7f,0)); + + ansel.setAdcon1(&adcon1); + adcon0.setAdresLow(&adresl); + adcon0.setAdres(&adresh); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(&intcon_reg); + adcon0.setA2DBits(10); + adcon0.setPir(pir1); + adcon0.setChannel_Mask(7); + + adcon1.setNumberOfChannels(7); + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[3]); + adcon1.setIOPin(4, &(*m_porta)[4]); + adcon1.setIOPin(5, &(*m_portb)[6]); + adcon1.setIOPin(6, &(*m_portb)[7]); + + adcon1.setVrefHiConfiguration(2, 3); + adcon1.setVrefHiConfiguration(3, 3); + + adcon1.setVrefLoConfiguration(1, 2); + adcon1.setVrefLoConfiguration(3, 2); + +/* Channel Configuration done dynamiclly based on ansel */ + + adcon1.setValidCfgBits(ADCON1::VCFG0 | ADCON1::VCFG1 , 4); + + // Link the A/D converter to the Capture Compare Module + ccp2con.setADCON(&adcon0); +} + +//======================================================================== +// +Processor * P16F818::construct(const char *name) +{ + P16F818 *p = new P16F818(name); + + p->P16F818::create(); + p->create_invalid_registers (); + + return p; +} + +P16F818::P16F818(const char *_name, const char *desc) + : P16F81x(_name,desc) +{ +} + +void P16F818::create() +{ + P16F81x::create(128); + P16F818::create_sfr_map(); +} + +void P16F818::create_sfr_map() +{ + alias_file_registers(0x40,0x7f,0x80); + alias_file_registers(0x20,0x7f,0x100); + alias_file_registers(0x20,0x7f,0x180); + +} + +//======================================================================== +// +Processor * P16F819::construct(const char *name) +{ + P16F819 *p = new P16F819(name); + + p->P16F819::create(); + p->create_invalid_registers (); + + return p; +} + +P16F819::P16F819(const char *_name, const char *desc) + : P16F81x(_name,desc) +{ +} + +P16F819::~P16F819() +{ + delete_file_registers(0xc0,0xef); + delete_file_registers(0x120,0x16f); +} + +void P16F819::create() +{ + P16F81x::create(256); + P16F819::create_sfr_map(); +} + +void P16F819::create_sfr_map() +{ + add_file_registers(0xc0,0xef, 0); + add_file_registers(0x120,0x16f, 0); + alias_file_registers(0x70,0x7f,0x80); + alias_file_registers(0x70,0x7f,0x100); + alias_file_registers(0x20,0x7f,0x180); +} diff --git a/src/gpsim/devices/p16f8x.h b/src/gpsim/devices/p16f8x.h new file mode 100644 index 0000000..91d8727 --- /dev/null +++ b/src/gpsim/devices/p16f8x.h @@ -0,0 +1,222 @@ +/* + Copyright (C) 1998-2002 T. Scott Dattalo + Copyright (C) 2006 Roy Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __P16F8X_H__ +#define __P16F8X_H__ + +#include "p16x6x.h" + +#include "pir.h" +#include "eeprom.h" +#include "comparator.h" +#include "a2dconverter.h" + +/*************************************************************************** + * + * Include file for: P16F87, P16F88 + * + * + * The F8x devices are similar to 16F62x + * + * + ***************************************************************************/ + +class P16F8x : public P16X6X_processor +{ +public: + + PIR1v2 *pir1_2_reg; + PIR2v2 *pir2_2_reg; + PIR_SET_2 pir_set_2_def; + + WDTCON wdtcon; + OSCCON_1 *osccon; + OSCTUNE osctune; + + + P16F8x(const char *_name=0, const char *desc=0); + ~P16F8x(); + virtual void set_out_of_range_pm(uint address, uint value); + + USART_MODULE usart; + ComparatorModule comparator; + virtual PROCESSOR_TYPE isa(){return _P16F87_;}; + + virtual uint register_memory_size () const { return 0x200;}; + + virtual uint program_memory_size() { return 0; }; + + virtual void create_sfr_map(); + + // The f628 (at least) I/O pins depend on the Fosc Configuration bits. + virtual bool set_config_word(uint address, uint cfg_word); + + + virtual void create(int eesize); + virtual void create_iopin_map(); + virtual void create_config_memory(); + virtual void enter_sleep(); + virtual void exit_sleep(); + + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as P16F8x expects to have a PIR capable EEPROM + assert(0); + } + + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { + eeprom = ep; + } + virtual EEPROM_WIDE *get_eeprom() { return ((EEPROM_WIDE *)eeprom); } + + + virtual PIR *get_pir1() { return (pir1); } + virtual PIR *get_pir2() { return (pir2); } + virtual PIR_SET *get_pir_set() { return (&pir_set_2_def); } +}; + +class P16F81x : public P16X6X_processor +{ +public: + + PIR1v2 *pir1_2_reg; + PIR2v2 *pir2_2_reg; + PIR_SET_2 pir_set_2_def; + + ADCON0 adcon0; + ADCON1 adcon1; + sfr_register adresh; + sfr_register adresl; + + OSCCON_1 *osccon; + OSCTUNE osctune; + + + P16F81x(const char *_name=0, const char *desc=0); + ~P16F81x(); + virtual void set_out_of_range_pm(uint address, uint value); + + virtual PROCESSOR_TYPE isa(){return _P16F818_;}; + + virtual uint register_memory_size () const { return 0x200;}; + + virtual uint program_memory_size() { return 0; }; + + virtual void create_sfr_map(); + + // The f628 (at least) I/O pins depend on the Fosc Configuration bits. + virtual bool set_config_word(uint address, uint cfg_word); + virtual void create_config_memory(); + + + virtual void create(int eesize); + virtual void create_iopin_map(); + + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as P16F8x expects to have a PIR capable EEPROM + assert(0); + } + + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { + eeprom = ep; + } + virtual EEPROM_WIDE *get_eeprom() { return ((EEPROM_WIDE *)eeprom); } + + + virtual PIR *get_pir1() { return (pir1); } + virtual PIR *get_pir2() { return (pir2); } + virtual PIR_SET *get_pir_set() { return (&pir_set_2_def); } +}; + +class P16F87 : public P16F8x +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F87_;}; + + virtual uint program_memory_size() const { return 0x1000; }; + + P16F87(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + virtual void create_sfr_map(); +}; + +class P16F88 : public P16F87 +{ +public: + + + ANSEL ansel; + ADCON0 adcon0; + ADCON1 adcon1; + sfr_register adresh; + sfr_register adresl; + + virtual PROCESSOR_TYPE isa(){return _P16F88_;}; + + virtual uint program_memory_size() const { return 0x1000; }; + + virtual void create(); + virtual void create_sfr_map(); + + + P16F88(const char *_name=0, const char *desc=0); + ~P16F88(); + static Processor *construct(const char *name); +}; + +class P16F818 : public P16F81x +{ +public: + + + virtual PROCESSOR_TYPE isa(){return _P16F818_;}; + + virtual uint program_memory_size() const { return 0x400; }; + + virtual void create(); + virtual void create_sfr_map(); + + + P16F818(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); +}; + +class P16F819 : public P16F81x +{ +public: + + + + virtual PROCESSOR_TYPE isa(){return _P16F819_;}; + + virtual uint program_memory_size() const { return 0x800; }; + + virtual void create(); + virtual void create_sfr_map(); + + + P16F819(const char *_name=0, const char *desc=0); + ~P16F819(); + static Processor *construct(const char *name); +}; + + +#endif diff --git a/src/gpsim/devices/p16f91x.cc b/src/gpsim/devices/p16f91x.cc new file mode 100644 index 0000000..58ecae5 --- /dev/null +++ b/src/gpsim/devices/p16f91x.cc @@ -0,0 +1,846 @@ +/* + Copyright (C) 2017 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +// +// p16f91x +// +// This file supports: +// P16F917 P16F914 +// P16F916 P16F913 +// + +#include +#include +#include + +#include "config.h" +#include "p16f91x.h" +#include "pic-ioports.h" +#include "stimuli.h" +#include "packages.h" + +P16F91X::P16F91X (const char *_name, const char *_desc) + : _14bit_processor(_name,_desc), + intcon_reg(this,"intcon","Interrupt Control"), + t1con(this, "t1con", "TMR1 Control"), + pie1(this,"PIE1", "Peripheral Interrupt Enable"), + pie2(this,"PIE2", "Peripheral Interrupt Enable"), + t2con(this, "t2con", "TMR2 Control"), + pr2(this, "pr2", "TMR2 Period Register"), + tmr2(this, "tmr2", "TMR2 Register"), + tmr1l(this, "tmr1l", "TMR1 Low"), + tmr1h(this, "tmr1h", "TMR1 High"), + ccp1con(this, "ccp1con", "Capture Compare Control"), + ccpr1l(this, "ccpr1l", "Capture Compare 1 Low"), + ccpr1h(this, "ccpr1h", "Capture Compare 1 High"), + ccp2con(this, "ccp2con", "Capture Compare Control"), + ccpr2l(this, "ccpr2l", "Capture Compare 2 Low"), + ccpr2h(this, "ccpr2h", "Capture Compare 2 High"), + pcon(this, "pcon", "pcon"), + lvdcon(this, "lvdcon", "Low-Voltage Detect Control Register"), + ssp(this), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adres(this,"adresh", "A2D Result"), + adresl(this,"adresl", "A2D Result Low"), + ansel(this, "ansel", "Analog Select Register"), + usart(this), + lcd_module(this, true), + wdtcon(this, "wdtcon", "WDT Control", 0x1f), + osctune(this, "osctune", "OSC Tune"), + comparator(this) +{ + + pir1 = new PIR1v4(this,"pir1","Peripheral Interrupt Register",&intcon_reg, &pie1); + pir2 = new PIR2v5(this,"pir2","Peripheral Interrupt Register",&intcon_reg, &pie2); + m_porta = new PicPortRegister(this,"porta","", 8, 0xff); + m_trisa = new PicTrisRegister(this,"trisa","", m_porta, false); + + tmr0.set_cpu(this, m_porta, 4, option_reg); + tmr0.start(0); + + m_iocb = new IOC(this, "iocb", "Interrupt-On-Change B Register"); + m_portb = new PicPortGRegister(this,"portb","",&intcon_reg,m_iocb,8,0xff); + m_trisb = new PicTrisRegister(this,"trisb","", m_portb, false); + m_wpub = new WPU(this, "wpub", "Weak Pull-up Register", m_portb, 0xff); + + m_portc = new PicPortRegister(this,"portc","", 8, 0xff); + m_trisc = new PicTrisRegister(this,"trisc","", m_portc, false); + + m_porte = new PicPortRegister(this,"porte","", 4, 0x0f); + m_trise = new PicTrisRegister(this,"trise","", m_porte, false, 0x7); + + osccon = new OSCCON(this, "osccon", "OSC Control"); + EEPROM_WIDE *e; + e = new EEPROM_WIDE(this,pir1); + e->initialize(256); + e->set_intcon(&intcon_reg); + set_eeprom_wide(e); +} + +P16F91X::~P16F91X () +{ + unassignMCLRPin(); + remove_sfr_register(&tmr0); + remove_sfr_register(&intcon_reg); + + delete_sfr_register(m_porta); + delete_sfr_register(m_trisa); + + delete_sfr_register(m_portb); + delete_sfr_register(m_trisb); + delete_sfr_register(m_wpub); + delete_sfr_register(m_iocb); + + + delete_sfr_register(m_portc); + delete_sfr_register(m_trisc); + delete_sfr_register(m_porte); + delete_sfr_register(m_trise); + + remove_sfr_register(&pie1); + remove_sfr_register(&pie2); + delete_sfr_register(pir1); + delete_sfr_register(pir2); + + remove_sfr_register(&t1con); + remove_sfr_register(&tmr2); + remove_sfr_register(&t2con); + remove_sfr_register(&pr2); + + delete_file_registers(0x20, 0x7f); + delete_file_registers(0xa0, 0xef); + delete_file_registers(0x120, 0x16f); + + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&adres); + remove_sfr_register(&adresl); + remove_sfr_register(&ansel); + remove_sfr_register(&usart.rcsta); + remove_sfr_register(&usart.txsta); + remove_sfr_register(&usart.spbrg); + remove_sfr_register(&comparator.cmcon); + remove_sfr_register(&comparator.cmcon1); + remove_sfr_register(&comparator.vrcon); + delete_sfr_register(usart.txreg); + delete_sfr_register(usart.rcreg); + delete_sfr_register(osccon); + remove_sfr_register(&osctune); + remove_sfr_register(&wdtcon); + remove_sfr_register(get_eeprom()->get_reg_eedata()); + remove_sfr_register(get_eeprom()->get_reg_eecon1()); + remove_sfr_register(get_eeprom()->get_reg_eeadr()); + remove_sfr_register(get_eeprom()->get_reg_eecon2()); + remove_sfr_register(get_eeprom()->get_reg_eedatah()); + remove_sfr_register(get_eeprom()->get_reg_eeadrh()); + delete get_eeprom(); + remove_sfr_register(&ssp.sspbuf); + remove_sfr_register(&ssp.sspcon); + remove_sfr_register(&ssp.sspadd); + remove_sfr_register(&ssp.sspstat); + remove_sfr_register(&ccpr1l); + remove_sfr_register(&ccpr1h); + remove_sfr_register(&ccp1con); + remove_sfr_register(&tmr1l); + remove_sfr_register(&tmr1h); + remove_sfr_register(&t1con); + remove_sfr_register(&pcon); + remove_sfr_register(&lvdcon); + delete_sfr_register(lcd_module.lcdcon); + delete_sfr_register(lcd_module.lcdps); + delete_sfr_register(lcd_module.lcdSEn[0]); + delete_sfr_register(lcd_module.lcdSEn[1]); + delete_sfr_register(lcd_module.lcddatax[0]); + delete_sfr_register(lcd_module.lcddatax[1]); + delete_sfr_register(lcd_module.lcddatax[3]); + delete_sfr_register(lcd_module.lcddatax[4]); + delete_sfr_register(lcd_module.lcddatax[6]); + delete_sfr_register(lcd_module.lcddatax[7]); + delete_sfr_register(lcd_module.lcddatax[9]); + delete_sfr_register(lcd_module.lcddatax[10]); + +} +bool P16F91X::set_config_word(uint address, uint cfg_word) +{ + enum { + CFG_FOSC0 = 1<<0, + CFG_FOSC1 = 1<<1, + CFG_FOSC2 = 1<<2, + CFG_WDTE = 1<<3, + CFG_MCLRE = 1<<5, + CFG_IESO = 1<<10, + }; + + if (address == 0x2007) + { + uint fosc = cfg_word & (CFG_FOSC0 | CFG_FOSC1 | CFG_FOSC2); + uint valid_pins = m_porta->getEnableMask(); + if ((cfg_word & CFG_MCLRE) == CFG_MCLRE) + { + assignMCLRPin(1); + } + else + { + unassignMCLRPin(); + } + osccon->set_config_xosc(fosc < 3); + osccon->set_config_irc(fosc == 4 || fosc == 5); + osccon->set_config_ieso(cfg_word & CFG_IESO); + + switch(fosc) + { + case 0: // LP oscillator: low power crystal is on RA4 and RA5 + case 1: // XT oscillator: crystal/resonator is on RA4 and RA5 + case 2: // HS oscillator: crystal/resonator is on RA4 and RA5 + (&(*m_porta)[6])->AnalogReq((Register *)this, true, "OSC2"); + valid_pins &= 0xcf; + break; + + case 3: // EC I/O on RA4 pin, CLKIN on RA5 + valid_pins &= 0xef; + break; + + case 5: // INTOSC CLKOUT on RA4 pin + (&(*m_porta)[6])->AnalogReq((Register *)this, true, "CLKOUT"); + case 4: // INTOSC + set_int_osc(true); + osccon->set_rc_frequency(); + break; + + case 6: //RC oscillator: I/O on RA4 pin, RC on RA5 + valid_pins &= 0xdf; + break; + + case 7: // RC oscillator: CLKOUT on RA4 pin, RC on RA5 + (&(*m_porta)[4])->AnalogReq((Register *)this, true, "CLKOUT"); + valid_pins &= 0xdf; + break; + }; + + if (valid_pins != m_porta->getEnableMask()) // enable new pins for IO + { + m_porta->setEnableMask(valid_pins); + m_trisa->setEnableMask(valid_pins & 0xf7); + } + } + return true; +} +//------------------------------------------------------------------- +void P16F91X::create_sfr_map() +{ + + add_sfr_register(indf, 0x00); + alias_file_registers(0x00,0x00,0x80); + alias_file_registers(0x00,0x00,0x100); + alias_file_registers(0x00,0x00,0x180); + + + add_sfr_register(&tmr0, 0x01); + alias_file_registers(0x01,0x01,0x100); + add_sfr_register(pcl, 0x02, RegisterValue(0,0)); + add_sfr_register(status, 0x03, RegisterValue(0x18,0)); + add_sfr_register(fsr, 0x04); + alias_file_registers(0x02,0x04,0x80); + alias_file_registers(0x02,0x04,0x100); + alias_file_registers(0x02,0x04,0x180); + + add_sfr_register(m_porta, 0x05); + add_sfr_register(m_portb, 0x06); + add_sfr_register(m_wpub, 0x95, RegisterValue(0xff,0),"wpub"); + add_sfr_register(m_iocb, 0x96, RegisterValue(0xff,0),"iocb"); + + alias_file_registers(0x06, 0x06, 0x100); + add_sfr_register(m_portc, 0x07); + + add_sfr_register(pclath, 0x0a, RegisterValue(0,0)); + add_sfr_register(&intcon_reg, 0x0b, RegisterValue(0,0)); + add_sfr_register(&tmr1l, 0x0e, RegisterValue(0,0), "tmr1l"); + add_sfr_register(&tmr1h, 0x0f, RegisterValue(0,0), "tmr1h"); + add_sfr_register(&t1con, 0x10, RegisterValue(0,0)); + + alias_file_registers(0x0a,0x0b,0x80); + alias_file_registers(0x0a,0x0b,0x100); + alias_file_registers(0x0a,0x0b,0x180); + + add_sfr_register(&tmr2, 0x11, RegisterValue(0,0)); + add_sfr_register(&t2con, 0x12, RegisterValue(0,0)); + add_sfr_register(&pr2, 0x92, RegisterValue(0xff,0)); + + add_sfr_register(&adcon0, 0x1f, RegisterValue(0,0)); + add_sfr_register(&adcon1, 0x9f, RegisterValue(0,0)); + add_sfr_register(&adres, 0x1e, RegisterValue(0,0)); + add_sfr_register(&adresl, 0x9e, RegisterValue(0,0)); + add_sfr_register(&ansel, 0x91, RegisterValue(0xff,0)); + + add_sfr_register(&pcon, 0x8e, RegisterValue(0x10,0)); + + add_file_registers(0x20, 0x7f, 0); + alias_file_registers(0x70,0x7f,0x80); + alias_file_registers(0x70,0x7f,0x100); + alias_file_registers(0x70,0x7f,0x180); + + add_file_registers(0xa0, 0xef, 0); + add_file_registers(0x120, 0x16f, 0); + + add_sfr_register(option_reg, 0x81, RegisterValue(0xff,0)); + alias_file_registers(0x81, 0x81, 0x100); + add_sfr_register(m_trisa, 0x85, RegisterValue(0xff,0)); + add_sfr_register(m_trisb, 0x86, RegisterValue(0xff,0)); + alias_file_registers(0x86, 0x86, 0x100); + add_sfr_register(m_trisc, 0x87, RegisterValue(0xff,0)); + + intcon = &intcon_reg; + add_sfr_register(pir1, 0x0c, RegisterValue(0,0),"pir1"); + add_sfr_register(pir2, 0x0d, RegisterValue(0,0),"pir2"); + add_sfr_register(&pie1, 0x8c, RegisterValue(0,0), "pie1"); + add_sfr_register(&pie2, 0x8d, RegisterValue(0,0), "pie2"); + + add_sfr_register(osccon, 0x8f, RegisterValue(0x60,0)); + add_sfr_register(&osctune, 0x90, RegisterValue(0,0),"osctune"); + add_sfr_register(&wdtcon, 0x105, RegisterValue(0x08,0),"wdtcon"); + + add_sfr_register(lcd_module.lcdps, 0x108, RegisterValue(0x0,0)); + add_sfr_register(lcd_module.lcdSEn[0], 0x11c, RegisterValue(0x0,0)); + add_sfr_register(lcd_module.lcdSEn[1], 0x11d, RegisterValue(0x0,0)); + add_sfr_register(lcd_module.lcddatax[0], 0x110, RegisterValue(0x0,0)); + add_sfr_register(lcd_module.lcddatax[1], 0x111, RegisterValue(0x0,0)); + add_sfr_register(lcd_module.lcddatax[3], 0x113, RegisterValue(0x0,0)); + add_sfr_register(lcd_module.lcddatax[4], 0x114, RegisterValue(0x0,0)); + add_sfr_register(lcd_module.lcddatax[6], 0x116, RegisterValue(0x0,0)); + add_sfr_register(lcd_module.lcddatax[7], 0x117, RegisterValue(0x0,0)); + add_sfr_register(lcd_module.lcddatax[9], 0x119, RegisterValue(0x0,0)); + add_sfr_register(lcd_module.lcddatax[10], 0x11a, RegisterValue(0x0,0)); + add_sfr_register(lcd_module.lcdcon, 0x107, RegisterValue(0x13,0)); + + lcd_module.set_Vlcd(&(*m_portc)[0], &(*m_portc)[1], &(*m_portc)[2]); + lcd_module.set_LCDsegn(0, &(*m_portb)[0], &(*m_portb)[1], + &(*m_portb)[2], &(*m_portb)[3]); + lcd_module.set_LCDsegn(4, &(*m_porta)[4], &(*m_porta)[5], + &(*m_portc)[3], &(*m_porta)[1]); + lcd_module.set_LCDsegn(8, &(*m_portc)[7], &(*m_portc)[6], + &(*m_portc)[4], &(*m_portc)[5]); + lcd_module.set_LCDsegn(12, &(*m_porta)[0], &(*m_portb)[7], + &(*m_portb)[6], &(*m_porta)[3]); + + lcd_module.setIntSrc(new InterruptSource(pir2, (1<<4))); + lcd_module.set_t1con(&t1con); + osccon->set_osctune(&osctune); + osctune.set_osccon(osccon); + + add_sfr_register(&comparator.cmcon, 0x9c, RegisterValue(0,0), "cmcon0"); + add_sfr_register(&comparator.cmcon1, 0x97, RegisterValue(0,0), "cmcon1"); + add_sfr_register(&comparator.vrcon, 0x9d, RegisterValue(0,0), "vrcon"); + + // Link the comparator and voltage ref to porta + comparator.initialize(get_pir_set(), NULL, + &(*m_porta)[0], &(*m_porta)[1], // AN0 AN1 + &(*m_porta)[2], &(*m_porta)[3], // AN2 AN3 + &(*m_porta)[4], &(*m_porta)[5]); //OUT0 OUT1 + + comparator.cmcon.set_tmrl(&tmr1l); + comparator.cmcon1.set_tmrl(&tmr1l); + + comparator.cmcon.set_configuration(1, 0, AN0, AN3, AN0, AN3, ZERO); + comparator.cmcon.set_configuration(2, 0, AN1, AN1, AN1, AN2, ZERO); + comparator.cmcon.set_configuration(1, 1, AN0, AN2, AN3, AN2, NO_OUT); + comparator.cmcon.set_configuration(2, 1, AN1, AN2, AN1, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 2, AN0, VREF, AN3, VREF, NO_OUT); + comparator.cmcon.set_configuration(2, 2, AN1, VREF, AN2, VREF, NO_OUT); + comparator.cmcon.set_configuration(1, 3, AN0, AN2, AN0, AN2, NO_OUT); + comparator.cmcon.set_configuration(2, 3, AN1, AN2, AN1, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 4, AN0, AN3, AN0, AN3, NO_OUT); + comparator.cmcon.set_configuration(2, 4, AN1, AN2, AN1, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 5, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 5, AN1, AN2, AN1, V06, NO_OUT); + comparator.cmcon.set_configuration(1, 6, AN0, AN2, AN0, AN2, OUT0); + comparator.cmcon.set_configuration(2, 6, AN1, AN2, AN1, AN2, OUT1); + comparator.cmcon.set_configuration(1, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.vrcon.setValidBits(0xaf); + + pir_set_2_def.set_pir1(pir1); + pir_set_2_def.set_pir2(pir2); + + tmr1l.tmrh = &tmr1h; + tmr1l.t1con = &t1con; + // FIXME -- can't delete this new'd item + tmr1l.setInterruptSource(new InterruptSource(pir1, PIR1v1::TMR1IF)); +// tmr1l.ccpcon = &ccp1con; + + tmr1h.tmrl = &tmr1l; + + t1con.tmrl = &tmr1l; + + t2con.tmr2 = &tmr2; + tmr2.pir_set = get_pir_set(); + tmr2.pr2 = &pr2; + tmr2.t2con = &t2con; + tmr2.add_ccp ( &ccp1con ); + tmr2.add_ccp ( &ccp2con ); + pr2.tmr2 = &tmr2; + + ccp1con.setIOpin(&(*m_portc)[5]); + ccp1con.setCrosslinks(&ccpr1l, pir1, PIR1v4::CCP1IF, &tmr2); + ccpr1l.ccprh = &ccpr1h; + ccpr1l.tmrl = &tmr1l; + ccpr1h.ccprl = &ccpr1l; + + + usart.initialize(pir1,&(*m_portc)[6], &(*m_portc)[7], + new _TXREG(this,"txreg", "USART Transmit Register", &usart), + new _RCREG(this,"rcreg", "USART Receiver Register", &usart)); + + add_sfr_register(&usart.rcsta, 0x18, RegisterValue(0,0),"rcsta"); + add_sfr_register(&usart.txsta, 0x98, RegisterValue(2,0),"txsta"); + add_sfr_register(&usart.spbrg, 0x99, RegisterValue(0,0),"spbrg"); + add_sfr_register(usart.txreg, 0x19, RegisterValue(0,0),"txreg"); + add_sfr_register(usart.rcreg, 0x1a, RegisterValue(0,0),"rcreg"); + + if (pir1) { + pir1->set_intcon(&intcon_reg); + pir1->set_pie(&pie1); + } + pie1.setPir(pir1); + + if (pir2) { + pir2->set_intcon(&intcon_reg); + pir2->set_pie(&pie2); + } + + //pie2.setPir(get_pir2()); + pie2.setPir(pir2); + + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x10c); + add_sfr_register(get_eeprom()->get_reg_eecon1(), 0x18c, RegisterValue(0,0)); + + // Enable program memory reads and writes. + get_eeprom()->get_reg_eecon1()->set_bits(EECON1::EEPGD); + + add_sfr_register(get_eeprom()->get_reg_eeadr(), 0x10d); + add_sfr_register(get_eeprom()->get_reg_eecon2(), 0x18d); + + get_eeprom()->get_reg_eedatah()->new_name("eedath"); + add_sfr_register(get_eeprom()->get_reg_eedatah(), 0x10e); + add_sfr_register(get_eeprom()->get_reg_eeadrh(), 0x10f); + + + adcon0.setAdres(&adres); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(&intcon_reg); + adcon0.setPir(pir1); + adcon0.setChannel_Mask(7); + adcon0.setChannel_shift(2); + adcon0.setGo(1); + adcon0.Vrefhi_position = 3; + adcon0.Vreflo_position = 2; + + adcon0.setAdresLow(&adresl); + + adcon0.setA2DBits(10); + + adcon1.setAdcon0(&adcon0); + + intcon_reg.set_pir_set(get_pir_set()); + + ssp.initialize( + get_pir_set(), // PIR + &(*m_portc)[3], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[5], // SDO + &(*m_portc)[4], // SDI + m_trisc, // I2C port + SSP_TYPE_BSSP + ); + add_sfr_register(&ssp.sspbuf, 0x13, RegisterValue(0,0),"sspbuf"); + add_sfr_register(&ssp.sspcon, 0x14, RegisterValue(0,0),"sspcon"); + add_sfr_register(&ssp.sspadd, 0x93, RegisterValue(0,0),"sspadd"); + add_sfr_register(&ssp.sspstat, 0x94, RegisterValue(0,0),"sspstat"); + tmr2.ssp_module[0] = &ssp; + add_sfr_register(&ccpr1l, 0x15, RegisterValue(0,0)); + add_sfr_register(&ccpr1h, 0x16, RegisterValue(0,0)); + add_sfr_register(&ccp1con, 0x17, RegisterValue(0,0)); + add_sfr_register(&lvdcon, 0x109, RegisterValue(4,0)); + lvdcon.setIntSrc(new InterruptSource(pir2, (1<<2))); + + +} +void P16F91X::option_new_bits_6_7(uint bits) +{ + m_portb->setRBPU( (bits & OPTION_REG::BIT7) == OPTION_REG::BIT7); + m_portb->setIntEdge((bits & OPTION_REG::BIT6) == OPTION_REG::BIT6); +} + +void P16F91X::update_vdd() +{ + lvdcon.check_lvd(); + Processor::update_vdd(); +} + +void P16F91X::enter_sleep() +{ + tmr1l.sleep(); + lcd_module.sleep(); + osccon->sleep(); + _14bit_processor::enter_sleep(); +} + +void P16F91X::exit_sleep() +{ + if (m_ActivityState == ePASleeping) + { + tmr1l.wake(); + lcd_module.wake(); + osccon->wake(); + _14bit_processor::exit_sleep(); + } +} + +//------------------------------------------------------------------- + +void P16F91X_40::create_iopin_map(void) +{ + + package = new Package(40); + if(!package) + return; + + + // Now Create the package and place the I/O pins + + package->assign_pin( 1, m_porte->addPin(new IO_bi_directional("porte3"),3)); + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 4, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 5, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 6, m_porta->addPin(new IO_bi_directional("porta4"),4)); + package->assign_pin( 7, m_porta->addPin(new IO_bi_directional("porta5"),5)); + + package->assign_pin( 8, m_porte->addPin(new IO_bi_directional("porte0"),0)); + package->assign_pin( 9, m_porte->addPin(new IO_bi_directional("porte1"),1)); + package->assign_pin(10, m_porte->addPin(new IO_bi_directional("porte2"),2)); + + package->assign_pin(11, 0); + package->assign_pin(12, 0); + package->assign_pin(13, m_porta->addPin(new IO_bi_directional("porta7"),7)); + package->assign_pin(14, m_porta->addPin(new IO_bi_directional("porta6"),6)); + + package->assign_pin(15, m_portc->addPin(new IO_bi_directional("portc0"),0)); + package->assign_pin(16, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(17, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin(18, m_portc->addPin(new IO_bi_directional("portc3"),3)); + package->assign_pin(23, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin(24, m_portc->addPin(new IO_bi_directional("portc5"),5)); + package->assign_pin(25, m_portc->addPin(new IO_bi_directional("portc6"),6)); + package->assign_pin(26, m_portc->addPin(new IO_bi_directional("portc7"),7)); + + + package->assign_pin(19, m_portd->addPin(new IO_bi_directional("portd0"),0)); + package->assign_pin(20, m_portd->addPin(new IO_bi_directional("portd1"),1)); + package->assign_pin(21, m_portd->addPin(new IO_bi_directional("portd2"),2)); + package->assign_pin(22, m_portd->addPin(new IO_bi_directional("portd3"),3)); + package->assign_pin(27, m_portd->addPin(new IO_bi_directional("portd4"),4)); + package->assign_pin(28, m_portd->addPin(new IO_bi_directional("portd5"),5)); + package->assign_pin(29, m_portd->addPin(new IO_bi_directional("portd6"),6)); + package->assign_pin(30, m_portd->addPin(new IO_bi_directional("portd7"),7)); + + package->assign_pin(31, 0); + package->assign_pin(32, 0); + + package->assign_pin(33, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin(34, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin(35, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin(36, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(37, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(38, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(39, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(40, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); +} + +void P16F91X_40::set_out_of_range_pm(uint address, uint value) +{ + + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + { + get_eeprom()->change_rom(address - 0x2100, value); + } +} + + +void P16F91X_40::create_sfr_map() +{ + P16F91X::create_sfr_map(); + + add_sfr_register(m_porte, 0x09); + add_sfr_register(m_trise, 0x89, RegisterValue(0x0f,0)); + add_sfr_register(m_portd, 0x08); + add_sfr_register(m_trisd, 0x88, RegisterValue(0xff,0)); + adcon1.setNumberOfChannels(8); + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[3]); + adcon1.setIOPin(4, &(*m_porta)[5]); + adcon1.setIOPin(5, &(*m_porte)[0]); + adcon1.setIOPin(6, &(*m_porte)[1]); + adcon1.setIOPin(7, &(*m_porte)[2]); + ansel.setAdcon1(&adcon1); + ansel.setValidBits(0xff); + ansel.config(0xff, 0); + add_sfr_register(&ccpr2l, 0x1b, RegisterValue(0,0)); + add_sfr_register(&ccpr2h, 0x1c, RegisterValue(0,0)); + add_sfr_register(&ccp2con, 0x1d, RegisterValue(0,0)); + ccp2con.setIOpin(&(*m_portd)[2]); + ccp2con.setCrosslinks(&ccpr2l, pir2, PIR2v5::CCP2IF, &tmr2); + ccpr2l.ccprh = &ccpr2h; + ccpr2l.tmrl = &tmr1l; + ccpr2h.ccprl = &ccpr2l; + + add_sfr_register(lcd_module.lcdSEn[2], 0x11e, RegisterValue(0x0,0)); + add_sfr_register(lcd_module.lcddatax[2], 0x112, RegisterValue(0x0,0)); + add_sfr_register(lcd_module.lcddatax[5], 0x115, RegisterValue(0x0,0)); + add_sfr_register(lcd_module.lcddatax[8], 0x118, RegisterValue(0x0,0)); + add_sfr_register(lcd_module.lcddatax[11], 0x11b, RegisterValue(0x0,0)); + lcd_module.set_LCDcom(&(*m_portb)[4], &(*m_portb)[5], + &(*m_porta)[2], &(*m_portd)[0]); + lcd_module.set_LCDsegn(16, &(*m_portd)[3], &(*m_portd)[4], + &(*m_portd)[5], &(*m_portd)[6]); + lcd_module.set_LCDsegn(20, &(*m_portd)[7], &(*m_porte)[0], + &(*m_porte)[1], &(*m_porte)[2]); +} + +void P16F91X_40::create() +{ + _14bit_processor::create(); + + status->rp_mask = 0x60; // rp0 and rp1 are valid. + indf->base_address_mask1 = 0x80; // used for indirect accesses above 0x100 + indf->base_address_mask2 = 0x1ff; // used for indirect accesses above 0x100 +} + +P16F91X_40::P16F91X_40(const char *_name, const char *desc) + : P16F91X(_name,desc) +{ + m_portd = new PicPortRegister(this,"portd","", 8, 0xff); + m_trisd = new PicTrisRegister(this,"trisd","", m_portd, false); +} + +P16F91X_40::~P16F91X_40() +{ + delete_sfr_register(m_portd); + delete_sfr_register(m_trisd); + delete_sfr_register(lcd_module.lcddatax[2]); + delete_sfr_register(lcd_module.lcddatax[5]); + delete_sfr_register(lcd_module.lcddatax[8]); + delete_sfr_register(lcd_module.lcddatax[11]); + delete_sfr_register(lcd_module.lcdSEn[2]); + remove_sfr_register(&ccp2con); + remove_sfr_register(&ccpr2h); + remove_sfr_register(&ccpr2l); +} + +//======================================================================== +void P16F91X_28::create_iopin_map(void) +{ + + package = new Package(28); + if(!package)return; + + // Now Create the package and place the I/O pins + package->assign_pin( 1, m_porte->addPin(new IO_bi_directional("porte3"),3)); + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 4, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 5, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 6, m_porta->addPin(new IO_bi_directional("porta4"),4)); + package->assign_pin( 7, m_porta->addPin(new IO_bi_directional("porta5"),5)); + package->assign_pin(8, 0); + package->assign_pin(9, m_porta->addPin(new IO_bi_directional("porta7"),7)); + package->assign_pin(10, m_porta->addPin(new IO_bi_directional("porta6"),6)); + + package->assign_pin(11, m_portc->addPin(new IO_bi_directional("portc0"),0)); + package->assign_pin(12, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(13, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin(14, m_portc->addPin(new IO_bi_directional("portc3"),3)); + + package->assign_pin(15, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin(16, m_portc->addPin(new IO_bi_directional("portc5"),5)); + package->assign_pin(17, m_portc->addPin(new IO_bi_directional("portc6"),6)); + package->assign_pin(18, m_portc->addPin(new IO_bi_directional("portc7"),7)); + + package->assign_pin(19, 0); + package->assign_pin(20, 0); + + package->assign_pin(21, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin(22, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin(23, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin(24, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(25, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(26, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(27, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(28, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); +} + +void P16F91X_28::set_out_of_range_pm(uint address, uint value) +{ + + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + { + get_eeprom()->change_rom(address - 0x2100, value); + } +} + + +void P16F91X_28::create_sfr_map() +{ + P16F91X::create_sfr_map(); + + add_sfr_register(m_porte, 0x09); + add_sfr_register(m_trise, 0x89, RegisterValue(0x04,0)); + adcon1.setNumberOfChannels(5); + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[3]); + adcon1.setIOPin(4, &(*m_porta)[5]); + ansel.setAdcon1(&adcon1); + ansel.setValidBits(0x1f); + ansel.config(0x1f, 0); + lcd_module.set_LCDcom(&(*m_portb)[4], &(*m_portb)[5], + &(*m_porta)[2], &(*m_porta)[3]); +} + +void P16F91X_28::create() +{ + _14bit_processor::create(); + + status->rp_mask = 0x60; // rp0 and rp1 are valid. + indf->base_address_mask1 = 0x80; // used for indirect accesses above 0x100 + indf->base_address_mask2 = 0x1ff; // used for indirect accesses above 0x100 +} + +//======================================================================== +P16F91X_28::P16F91X_28(const char *_name, const char *desc) + : P16F91X(_name,desc) +{ +} + +P16F91X_28::~P16F91X_28() +{ +} + +Processor * P16F917::construct(const char *name) +{ + P16F917 *p = new P16F917(name); + + p->create(); + p->create_invalid_registers (); + return p; +} + +void P16F917::create() +{ + P16F91X_40::create(); + P16F91X_40::create_iopin_map(); + create_sfr_map(); +} + +void P16F917::create_sfr_map() +{ + P16F91X_40::create_sfr_map(); + add_file_registers(0x190, 0x1ef, 0); +} + +P16F917::~P16F917() +{ + delete_file_registers(0x190, 0x1ef); +} + +P16F917::P16F917(const char *_name, const char *desc) : P16F91X_40(_name, desc) +{ +} + +//******************************************************* +Processor * P16F916::construct(const char *name) +{ + P16F916 *p = new P16F916(name); + + p->create(); + p->create_invalid_registers (); + return p; +} + +void P16F916::create() +{ + P16F91X_28::create(); + P16F91X_28::create_iopin_map(); + create_sfr_map(); +} + +void P16F916::create_sfr_map() +{ + P16F91X_28::create_sfr_map(); + add_file_registers(0x190, 0x1ef, 0); +} + +P16F916::~P16F916() +{ + delete_file_registers(0x190, 0x1ef); +} + +P16F916::P16F916(const char *_name, const char *desc) : P16F91X_28(_name, desc) +{ +} + +//******************************************************* +Processor * P16F914::construct(const char *name) +{ + P16F914 *p = new P16F914(name); + + p->create(); + p->create_invalid_registers (); + return p; +} + +void P16F914::create() +{ + P16F91X_40::create(); + P16F91X_40::create_iopin_map(); + create_sfr_map(); +} + +//******************************************************* +Processor * P16F913::construct(const char *name) +{ + P16F913 *p = new P16F913(name); + + p->create(); + p->create_invalid_registers (); + return p; +} + +void P16F913::create() +{ + P16F91X_28::create(); + P16F91X_28::create_iopin_map(); + create_sfr_map(); + +} diff --git a/src/gpsim/devices/p16f91x.h b/src/gpsim/devices/p16f91x.h new file mode 100644 index 0000000..0fc7106 --- /dev/null +++ b/src/gpsim/devices/p16f91x.h @@ -0,0 +1,225 @@ +/* + Copyright (C) 2017 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __P16F91X_H__ +#define __P16F91X_H__ + +#include "p16x7x.h" + +#include "eeprom.h" +#include "comparator.h" +#include "lcd_module.h" + +class IOPORT; + +class P16F91X : public _14bit_processor +{ +public: + + P16F91X(const char *_name=0, const char *desc=0); + ~P16F91X(); + + INTCON_14_PIR intcon_reg; + T1CON t1con; + PIR *pir1; + PIE pie1; + PIR *pir2; + PIE pie2; + T2CON t2con; + PR2 pr2; + TMR2 tmr2; + TMRL tmr1l; + TMRH tmr1h; + CCPCON ccp1con; + CCPRL ccpr1l; + CCPRH ccpr1h; + CCPCON ccp2con; + CCPRL ccpr2l; + CCPRH ccpr2h; + PCON pcon; + LVDCON_14 lvdcon; + SSP_MODULE ssp; + PIR1v2 *pir1_2_reg; + PIR_SET_2 pir_set_2_def; + virtual PIR *get_pir1() { return (pir1_2_reg); } + virtual PIR_SET *get_pir_set() { return (&pir_set_2_def); } + PIR2v2 *pir2_2_reg; + virtual PIR *get_pir2() { return (pir2_2_reg); } + + + ADCON0_91X adcon0; + ADCON1_16F adcon1; + sfr_register adres; + sfr_register adresl; + ANSEL_P ansel; + + USART_MODULE usart; + + LCD_MODULE lcd_module; + + WDTCON wdtcon; + OSCCON *osccon; + OSCTUNE osctune; + + ComparatorModule comparator; + + + + PicPortRegister *m_porta; + PicTrisRegister *m_trisa; + + PicPortBRegister *m_portb; + PicTrisRegister *m_trisb; + WPU *m_wpub; + IOC *m_iocb; + + PicPortRegister *m_portc; + PicTrisRegister *m_trisc; + + PicPortRegister *m_porte; + PicTrisRegister *m_trise; + + virtual void create_sfr_map(); + virtual void option_new_bits_6_7(uint bits); + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { + eeprom = ep; + } + virtual EEPROM_WIDE *get_eeprom() { return ((EEPROM_WIDE *)eeprom); } + virtual void update_vdd(); + virtual bool set_config_word(uint address, uint cfg_word); + virtual void enter_sleep(); + virtual void exit_sleep(); +}; + + +class P16F91X_40 : public P16F91X +{ + public: + + PicPortRegister *m_portd; + PicTrisRegister *m_trisd; + virtual void set_out_of_range_pm(uint address, uint value); + + virtual void create_sfr_map(); + virtual void create_iopin_map(); + void create(); + virtual uint register_memory_size () const { return 0x200;}; + + + virtual void set_eeprom(EEPROM *ep) { + // use set_eeprom_wide as P16F917 expect a wide EEPROM + assert(0); + + } + + P16F91X_40(const char *_name=0, const char *desc=0); + ~P16F91X_40(); + +private: + +}; +class P16F91X_28 : public P16F91X +{ + public: + + virtual void set_out_of_range_pm(uint address, uint value); + + virtual void create_sfr_map(); + virtual void create_iopin_map(); + void create(); + virtual uint register_memory_size () const { return 0x200;}; + + + virtual void set_eeprom(EEPROM *ep) { + // use set_eeprom_wide as P16F917 expect a wide EEPROM + assert(0); + + } + + P16F91X_28(const char *_name=0, const char *desc=0); + ~P16F91X_28(); + +private: + +}; +class P16F917 : public P16F91X_40 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P16F917_;}; + virtual uint program_memory_size() const { return 8192; }; + virtual uint register_memory_size () const { return 0x200;}; + + P16F917(const char *_name=0, const char *desc=0); + ~P16F917(); + static Processor *construct(const char *name); + void create(); + void create_sfr_map(); + +private: + +}; +class P16F916 : public P16F91X_28 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P16F916_;}; + virtual uint program_memory_size() const { return 8192; }; + virtual uint register_memory_size () const { return 0x200;}; + + P16F916(const char *_name=0, const char *desc=0); + ~P16F916(); + static Processor *construct(const char *name); + void create(); + void create_sfr_map(); + + private: +}; + + +class P16F914 : public P16F91X_40 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P16F914_;}; + virtual uint program_memory_size() const { return 4096; }; + virtual uint register_memory_size () const { return 0x200;}; + + P16F914(const char *_name=0, const char *desc=0) : P16F91X_40(_name, desc) {}; + static Processor *construct(const char *name); + void create(); + +private: + +}; + +class P16F913 : public P16F91X_28 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P16F913_;}; + virtual uint program_memory_size() const { return 4096; }; + virtual uint register_memory_size () const { return 0x200;}; + + P16F913(const char *_name=0, const char *desc=0) : P16F91X_28(_name, desc) {}; + static Processor *construct(const char *name); + void create(); + +private: + +}; + +#endif diff --git a/src/gpsim/devices/p16x5x.cc b/src/gpsim/devices/p16x5x.cc new file mode 100644 index 0000000..89d169f --- /dev/null +++ b/src/gpsim/devices/p16x5x.cc @@ -0,0 +1,318 @@ +/* + Copyright (C) 2000 T. Scott Dattalo, Daniel Schudel + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +// +// p16x5x +// +// This file supports: +// P16C54 +// P16C55 +// P16C56 + + +#include +#include +#include + +#include "packages.h" +#include "p16x5x.h" +#include "pic-ioports.h" + +void P16C54::create_iopin_map() +{ +#ifdef USE_PIN_MODULE_FOR_TOCKI + IOPIN * tockipin; +#endif + + package = new Package(18); + if(!package) + return; + + // Now Create the package and place the I/O pins + + package->assign_pin(17, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin(18, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 1, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta3"),3)); +#ifdef USE_PIN_MODULE_FOR_TOCKI + // RCP - attempt to add TOCKI without port register + tockipin = new IOPIN("tocki"); + m_tocki->setPin ( tockipin ); + package->assign_pin( 3, tockipin ); + // RCP - End new code +#else + package->assign_pin( 3, m_tocki->addPin(new IOPIN("tocki"),0)); +#endif + package->assign_pin( 4, 0); + package->assign_pin( 5, 0); + package->assign_pin( 6, m_portb->addPin(new IO_bi_directional("portb0"),0)); + package->assign_pin( 7, m_portb->addPin(new IO_bi_directional("portb1"),1)); + package->assign_pin( 8, m_portb->addPin(new IO_bi_directional("portb2"),2)); + package->assign_pin( 9, m_portb->addPin(new IO_bi_directional("portb3"),3)); + package->assign_pin(10, m_portb->addPin(new IO_bi_directional("portb4"),4)); + package->assign_pin(11, m_portb->addPin(new IO_bi_directional("portb5"),5)); + package->assign_pin(12, m_portb->addPin(new IO_bi_directional("portb6"),6)); + package->assign_pin(13, m_portb->addPin(new IO_bi_directional("portb7"),7)); + package->assign_pin(14, 0); + package->assign_pin(15, 0); + package->assign_pin(16, 0); +} + + +void P16C55::create_iopin_map() +{ + package = new Package(28); + if(!package) + return; + + // Now Create the package and place the I/O pins + + package->assign_pin( 6, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin( 7, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 8, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 9, m_porta->addPin(new IO_bi_directional("porta3"),3)); +#ifdef USE_PIN_MODULE_FOR_TOCKI + // RCP - attempt to add TOCKI without port register + tockipin = new IOPIN("tocki"); + m_tocki->setPin ( tockipin ); + package->assign_pin( 1, tockipin ); + // RCP - End new code +#else + package->assign_pin( 1, m_tocki->addPin(new IOPIN("tocki"),0)); +#endif + package->assign_pin( 2, 0); + package->assign_pin( 3, 0); + package->assign_pin( 4, 0); + package->assign_pin( 5, 0); + + package->assign_pin(10, m_portb->addPin(new IO_bi_directional("portb0"),0)); + package->assign_pin(11, m_portb->addPin(new IO_bi_directional("portb1"),1)); + package->assign_pin(12, m_portb->addPin(new IO_bi_directional("portb2"),2)); + package->assign_pin(13, m_portb->addPin(new IO_bi_directional("portb3"),3)); + package->assign_pin(14, m_portb->addPin(new IO_bi_directional("portb4"),4)); + package->assign_pin(15, m_portb->addPin(new IO_bi_directional("portb5"),5)); + package->assign_pin(16, m_portb->addPin(new IO_bi_directional("portb6"),6)); + package->assign_pin(17, m_portb->addPin(new IO_bi_directional("portb7"),7)); + + package->assign_pin(18, m_portc->addPin(new IO_bi_directional("portc0"),0)); + package->assign_pin(19, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(20, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin(21, m_portc->addPin(new IO_bi_directional("portc3"),3)); + package->assign_pin(22, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin(23, m_portc->addPin(new IO_bi_directional("portc5"),5)); + package->assign_pin(24, m_portc->addPin(new IO_bi_directional("portc6"),6)); + package->assign_pin(25, m_portc->addPin(new IO_bi_directional("portc7"),7)); + + package->assign_pin(26, 0); + package->assign_pin(27, 0); + package->assign_pin(28, 0); + +} + +void P16C54::create_sfr_map() +{ + add_file_registers(0x07, 0x1f, 0x00); + + add_sfr_register(indf, 0x00); + + add_sfr_register(&tmr0, 0x01); + + add_sfr_register(pcl, 0x02, RegisterValue(0,0)); + add_sfr_register(status, 0x03, RegisterValue(0x18,0)); + add_sfr_register(fsr, 0x04); + + add_sfr_register(m_porta, 0x05); + add_sfr_register(m_portb, 0x06); + + add_sfr_register(option_reg, 0xffffffff, RegisterValue(0xff,0)); + add_sfr_register(m_trisa, 0xffffffff, RegisterValue(0x1f,0)); + add_sfr_register(m_trisb, 0xffffffff, RegisterValue(0xff,0)); +#ifndef USE_PIN_MODULE_FOR_TOCKI + add_sfr_register(m_tocki, 0xffffffff, RegisterValue(0x01,0)); + add_sfr_register(m_trist0, 0xffffffff, RegisterValue(0x01,0)); +#endif +} + +void P16C54::create() +{ + create_iopin_map(); + _12bit_processor::create(); +} + +Processor * P16C54::construct(const char *name) +{ + P16C54 *p = new P16C54(name); + + p->pc->set_reset_address(0x1ff); + + p->create(); + p->create_invalid_registers(); + p->create_sfr_map(); + + return p; +} + +P16C54::P16C54(const char *_name, const char *desc) + : _12bit_processor(_name,desc) +{ + m_porta = new PicPortRegister(this,"porta","",8,0x1f); + m_trisa = new PicTrisRegister(this,"trisa","",m_porta, false); + + m_portb = new PicPortRegister(this,"portb","",8,0xff); + m_trisb = new PicTrisRegister(this,"trisb","",m_portb, false); + +#ifdef USE_PIN_MODULE_FOR_TOCKI +// RCP - Attempt to assign TOCKI without a port register + m_tocki = new PinModule(); + cout << "c54 contructor assigning tmr0\n"; + tmr0.set_cpu(this, m_tocki); +#else + m_tocki = new PicPortRegister(this,"tockiport","",8,0x01); + m_trist0 = new PicTrisRegister(this,"trist0","",m_tocki, false); +// cout << "c54 contructor assigning tmr0 to tocki register\n"; + tmr0.set_cpu(this, m_tocki, 0,option_reg); +#endif + tmr0.start(0); +} + +P16C54::~P16C54() +{ + delete_file_registers(0x07, 0x1f); + +// add_sfr_register(indf); + + remove_sfr_register(&tmr0); + +// add_sfr_register(pcl); +// add_sfr_register(status); +// add_sfr_register(fsr); + + delete_sfr_register(m_porta); + delete_sfr_register(m_portb); + +// delete_sfr_register(option_reg); + delete_sfr_register(m_trisa); + delete_sfr_register(m_trisb); +#ifndef USE_PIN_MODULE_FOR_TOCKI + delete_sfr_register(m_tocki); + delete_sfr_register(m_trist0); +#endif + +} + +void P16C54::tris_instruction(uint tris_register) +{ + switch (tris_register) + { + case 5: + m_trisa->put(Wget()); + //trace.write_TRIS(m_trisa->value.get()); + break; + case 6: + m_trisb->put(Wget()); + //trace.write_TRIS(m_trisb->value.get()); + break; + default: + cout << __FUNCTION__ << ": Unknown TRIS register " << tris_register << endl; + break; + } +} + +void P16C55::create_sfr_map() +{ + P16C54::create_sfr_map(); + + delete_file_registers(0x07, 0x07); + add_sfr_register(m_portc, 0x07); + add_sfr_register(m_trisc, 0xffffffff, RegisterValue(0xff,0)); +} + +void P16C55::create() +{ + P16C54::create(); +} + +Processor * P16C55::construct(const char *name) +{ + P16C55 *p = new P16C55(name); + + p->pc->set_reset_address(0x1ff); + + p->create(); + p->create_invalid_registers(); + p->create_sfr_map(); + + return p; +} + +P16C55::P16C55(const char *_name, const char *desc) + : P16C54(_name,desc) +{ + m_portc = new PicPortRegister(this,"portc","",8,0xff); + m_trisc = new PicTrisRegister(this,"trisc","", m_portc, false); +} + +P16C55::~P16C55() +{ + delete_sfr_register(m_trisc); +} + +void P16C55::tris_instruction(uint tris_register) +{ + + switch (tris_register) + { + case 5: + m_trisa->put(Wget()); + //trace.write_TRIS(m_trisa->value.get()); + break; + case 6: + m_trisb->put(Wget()); + //trace.write_TRIS(m_trisb->value.get()); + break; + case 7: + m_trisc->put(Wget()); + //trace.write_TRIS(m_trisc->value.get()); + break; + default: + cout << __FUNCTION__ << ": Unknown TRIS register " << tris_register << endl; + break; + } +} + +Processor * P16C56::construct(const char *name) +{ + P16C56 *p = new P16C56(name); + + p->pc->set_reset_address(0x3ff); + + p->create(); + p->create_invalid_registers(); + p->create_sfr_map(); + + return p; +} + +P16C56::P16C56(const char *_name, const char *desc) + : P16C54(_name,desc) +{ +} + diff --git a/src/gpsim/devices/p16x5x.h b/src/gpsim/devices/p16x5x.h new file mode 100644 index 0000000..36cc7a7 --- /dev/null +++ b/src/gpsim/devices/p16x5x.h @@ -0,0 +1,130 @@ +/* + Copyright (C) 2000,2001 T. Scott Dattalo, Daniel Schudel, Robert Pearce + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +// +// p16x5x +// +// This file supports: +// P16C54 +// P16C55 +// P16C56 + +#ifndef __P16X5X_H__ +#define __P16X5X_H__ + +#include "packages.h" +#include "stimuli.h" +#include "12bit-processors.h" + +class PicPortRegister; +class PicTrisRegister; +class PicLatchRegister; + + +class P16C54 : public _12bit_processor +{ +public: + PicPortRegister *m_porta; + PicTrisRegister *m_trisa; + + PicPortRegister *m_portb; + PicTrisRegister *m_trisb; + +#ifdef USE_PIN_MODULE_FOR_TOCKI + PinModule *m_tocki; +#else + PicPortRegister *m_tocki; + PicTrisRegister *m_trist0; +#endif + + virtual PROCESSOR_TYPE isa(){return _P16C54_;}; + + virtual uint program_memory_size() const { return 0x200; }; + virtual uint register_memory_size() const { return 0x20; }; + virtual uint config_word_address() const {return 0xFFF;}; + + virtual void create_sfr_map(); + + virtual void option_new_bits_6_7(uint bits) {} + + P16C54(const char *_name=0, const char *desc=0); + virtual ~P16C54(); + void create(); + virtual void create_iopin_map(); + + static Processor *construct(const char *name); + virtual void tris_instruction(uint tris_register); + + virtual uint fsr_valid_bits() + { + return 0x1f; // Only 32 register addresses + } + + virtual uint fsr_register_page_bits() + { + return 0; // Only one register page. + } + + +}; + +class P16C55 : public P16C54 +{ +public: + + PicPortRegister *m_portc; + PicTrisRegister *m_trisc; + + virtual PROCESSOR_TYPE isa(){return _P16C55_;}; + + virtual uint program_memory_size() const { return 0x200; }; + virtual uint register_memory_size() const { return 0x20; }; + virtual uint config_word_address() const {return 0xFFF;}; + + virtual void create_sfr_map(); + + P16C55(const char *_name=0, const char *desc=0); + virtual ~P16C55(); + virtual void create(); + virtual void create_iopin_map(); + + static Processor *construct(const char *name); + virtual void tris_instruction(uint tris_register); + +}; + +class P16C56 : public P16C54 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16C56_;}; + + virtual uint program_memory_size() const { return 0x400; }; + virtual uint register_memory_size() const { return 0x20; }; + virtual uint config_word_address() const {return 0xFFF;}; + + P16C56(const char *_name=0, const char *desc=0); + + static Processor *construct(const char *name); + +}; + +#endif diff --git a/src/gpsim/devices/p16x6x.cc b/src/gpsim/devices/p16x6x.cc new file mode 100644 index 0000000..6d67edf --- /dev/null +++ b/src/gpsim/devices/p16x6x.cc @@ -0,0 +1,1076 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +// p16x6x +// +// This file supports: +// P16C61 + +#include +#include +#include + + +#include "packages.h" +#include "stimuli.h" + +#include "p16x6x.h" +#include "pic-ioports.h" +#include "intcon.h" + + + + +//--------------------------------------------------------- +// +// P16x6x::create_sfr_map(void) - Here's where all of the +// registers are defined for a p16c63 and greater... +void P16X6X_processor::create_sfr_map() +{ + Pic14Bit::create_sfr_map(); + + // P16x63 and higher have porta5 + m_porta->setEnableMask(0x3f); + m_porta->setTris(m_trisa); + + // The 16c62,c64 have general purpose registers + // at addresses 20-7f and a0-bf + add_file_registers(0x20, 0x7f, 0); + add_file_registers(0xa0, 0xbf, 0); + + + add_sfr_register(pir1, 0x0c, RegisterValue(0,0),"pir1"); + add_sfr_register(&pie1, 0x8c, RegisterValue(0,0)); + + add_sfr_register(&tmr1l, 0x0e, RegisterValue(0,0),"tmr1l"); + add_sfr_register(&tmr1h, 0x0f, RegisterValue(0,0),"tmr1h"); + + add_sfr_register(&pcon, 0x8e, RegisterValue(0,0),"pcon"); + + add_sfr_register(&t1con, 0x10, RegisterValue(0,0)); + add_sfr_register(&tmr2, 0x11, RegisterValue(0,0)); + add_sfr_register(&t2con, 0x12, RegisterValue(0,0)); + add_sfr_register(&pr2, 0x92, RegisterValue(0xff,0)); + + if( hasSSP() ) { + add_sfr_register(&ssp.sspbuf, 0x13, RegisterValue(0,0),"sspbuf"); + add_sfr_register(&ssp.sspcon, 0x14, RegisterValue(0,0),"sspcon"); + add_sfr_register(&ssp.sspadd, 0x93, RegisterValue(0,0),"sspadd"); + add_sfr_register(&ssp.sspstat, 0x94, RegisterValue(0,0),"sspstat"); + tmr2.ssp_module[0] = &ssp; + } + + add_sfr_register(&ccpr1l, 0x15, RegisterValue(0,0)); + add_sfr_register(&ccpr1h, 0x16, RegisterValue(0,0)); + add_sfr_register(&ccp1con, 0x17, RegisterValue(0,0)); + + // get_pir_set()->set_pir1(get_pir1()); + pir_set_def.set_pir1(pir1); + + intcon = &intcon_reg; + intcon_reg.set_pir_set(get_pir_set()); + + // Maybe there's a better place for this, but let's go ahead and link all + // of the registers together (there's probably a better way too) : + + tmr1l.tmrh = &tmr1h; + tmr1l.t1con = &t1con; + // FIXME -- can't delete this new'd item + tmr1l.setInterruptSource(new InterruptSource(pir1, PIR1v1::TMR1IF)); +// tmr1l.ccpcon = &ccp1con; + + tmr1h.tmrl = &tmr1l; + t1con.tmrl = &tmr1l; + + t2con.tmr2 = &tmr2; + tmr2.pir_set = get_pir_set(); + tmr2.pr2 = &pr2; + tmr2.t2con = &t2con; + tmr2.add_ccp ( &ccp1con ); + tmr2.add_ccp ( &ccp2con ); + pr2.tmr2 = &tmr2; + + ccp1con.setCrosslinks(&ccpr1l, pir1, PIR1v1::CCP1IF, &tmr2); + ccp1con.setIOpin(&((*m_portc)[2])); + ccpr1l.ccprh = &ccpr1h; + ccpr1l.tmrl = &tmr1l; + ccpr1h.ccprl = &ccpr1l; + + // portc->ccp1con = &ccp1con; + + ccpr1l.new_name("ccpr1l"); + ccpr1h.new_name("ccpr1h"); + ccp1con.new_name("ccp1con"); + + if (pir1) { + pir1->set_intcon(&intcon_reg); + pir1->set_pie(&pie1); + } + pie1.setPir(pir1); +} + +//-------------------------------------------------- +P16X6X_processor::P16X6X_processor(const char *_name, const char *_desc) + : Pic14Bit(_name,_desc), + t1con(this, "t1con", "TMR1 Control"), + pie1(this,"PIE1", "Peripheral Interrupt Enable"), + pie2(this,"PIE2", "Peripheral Interrupt Enable"), + t2con(this, "t2con", "TMR2 Control"), + pr2(this, "pr2", "TMR2 Period Register"), + tmr2(this, "tmr2", "TMR2 Register"), + tmr1l(this, "tmr1l", "TMR1 Low"), + tmr1h(this, "tmr1h", "TMR1 High"), + ccp1con(this, "ccp1con", "Capture Compare Control"), + ccpr1l(this, "ccpr1l", "Capture Compare 1 Low"), + ccpr1h(this, "ccpr1h", "Capture Compare 1 High"), + ccp2con(this, "ccp2con", "Capture Compare Control"), + ccpr2l(this, "ccpr2l", "Capture Compare 2 Low"), + ccpr2h(this, "ccpr2h", "Capture Compare 2 High"), + pcon(this, "pcon", "pcon"), + ssp(this) +{ + m_portc = new PicPortRegister(this,"portc","",8,0xff); + m_trisc = new PicTrisRegister(this,"trisc","",m_portc, false); + + pir1 = new PIR1v1(this,"pir1","Peripheral Interrupt Register",&intcon_reg, &pie1); + pir2 = new PIR2v1(this,"pir2","Peripheral Interrupt Register",&intcon_reg, &pie2); +} + +P16X6X_processor::~P16X6X_processor() +{ + remove_sfr_register(&tmr1l); + remove_sfr_register(&tmr1h); + remove_sfr_register(&pcon); + remove_sfr_register(&t1con); + remove_sfr_register(&tmr2); + remove_sfr_register(&t2con); + remove_sfr_register(&pr2); + + if( hasSSP()) { + remove_sfr_register(&ssp.sspbuf); + remove_sfr_register(&ssp.sspcon); + remove_sfr_register(&ssp.sspadd); + remove_sfr_register(&ssp.sspstat); + } + remove_sfr_register(&ccpr1l); + remove_sfr_register(&ccpr1h); + remove_sfr_register(&ccp1con); + remove_sfr_register(&pie1); + + delete_file_registers(0x20,0x7f); + delete_file_registers(0xa0,0xbf); + delete_sfr_register(m_portc); + delete_sfr_register(m_trisc); + delete_sfr_register(pir2); + delete_sfr_register(pir1); +} + +/******************************************************************* + * + * Definitions for the various P16x6x processors + * + */ + +void P16C61::create(void) +{ + create_iopin_map(); + + _14bit_processor::create(); + + add_file_registers(0x0c, 0x2f, 0x80); + Pic14Bit::create_sfr_map(); +} + +Processor * P16C61::construct(const char *name) +{ + P16C61 *p = new P16C61(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +P16C61::P16C61(const char *_name, const char *desc) + : P16X8X(_name,desc) +{ + ram_top = 0x2f; +} +P16C61::~P16C61() +{ +} + +//------------------------------------------------------------------------ +// +void P16C62::create_iopin_map(void) +{ + package = new Package(28); + if(!package) + return; + + package->assign_pin(1, 0); + + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 4, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 5, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 6, m_porta->addPin(new IO_open_collector("porta4"),4)); + package->assign_pin( 7, m_porta->addPin(new IO_bi_directional("porta5"),5)); + + + package->assign_pin(8, 0); //VSS + package->assign_pin(9, 0); // OSC + package->assign_pin(10, 0); // OSC + + package->assign_pin(11, m_portc->addPin(new IO_bi_directional("portc0"),0)); + package->assign_pin(12, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(13, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin(14, m_portc->addPin(new IO_bi_directional("portc3"),3)); + package->assign_pin(15, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin(16, m_portc->addPin(new IO_bi_directional("portc5"),5)); + package->assign_pin(17, m_portc->addPin(new IO_bi_directional("portc6"),6)); + package->assign_pin(18, m_portc->addPin(new IO_bi_directional("portc7"),7)); + + package->assign_pin(19, 0); //VSS + package->assign_pin(20, 0); //VDD + package->assign_pin(21, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin(22, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin(23, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin(24, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(25, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(26, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(27, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(28, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + + if (hasSSP()) { + ssp.initialize( + get_pir_set(), // PIR + &(*m_portc)[3], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[5], // SDO + &(*m_portc)[4], // SDI + m_trisc, // I2C port + SSP_TYPE_BSSP + ); + } + + tmr1l.setIOpin(&(*m_portc)[0]); +} + +P16C62::P16C62(const char *_name, const char *desc) + : P16X6X_processor(_name,desc) +{ + set_hasSSP(); +} +P16C62::~P16C62() +{ +} + +void P16C62::create_sfr_map() +{ + P16X6X_processor::create_sfr_map(); + + add_sfr_register(m_portc, 0x07); + add_sfr_register(m_trisc, 0x87, RegisterValue(0xff,0)); + + //1((PORTC*)portc)->ccp1con = &ccp1con; +} + +void P16C62::create(void) +{ + create_iopin_map(); + + _14bit_processor::create(); + + P16C62::create_sfr_map(); + + // Build the links between the I/O Pins and the internal peripherals + //1ccp1con.iopin = portc->pins[2]; +} + +Processor * P16C62::construct(const char *name) +{ + P16C62 *p = new P16C62(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +//------------------------------------------------------------------------ +// +void P16C63::create_sfr_map(void) +{ + add_file_registers(0xc0, 0xff, 0); + + add_sfr_register(pir2, 0x0d, RegisterValue(0,0),"pir2"); + add_sfr_register(&pie2, 0x8d, RegisterValue(0,0)); + + add_sfr_register(&ccpr2l, 0x1b, RegisterValue(0,0)); + add_sfr_register(&ccpr2h, 0x1c, RegisterValue(0,0)); + add_sfr_register(&ccp2con, 0x1d, RegisterValue(0,0)); + + // get_pir_set()->set_pir2(get_pir2()); + pir_set_def.set_pir2(pir2); + + ccp2con.setCrosslinks(&ccpr2l, pir2, PIR2v1::CCP2IF, &tmr2); + ccp2con.setIOpin(&((*m_portc)[1])); + ccpr2l.ccprh = &ccpr2h; + ccpr2l.tmrl = &tmr1l; + ccpr2h.ccprl = &ccpr2l; + + usart.initialize(pir1,&(*m_portc)[6], &(*m_portc)[7], + new _TXREG(this,"txreg", "USART Transmit Register", &usart), + new _RCREG(this,"rcreg", "USART Receiver Register", &usart)); + + add_sfr_register(&usart.rcsta, 0x18, RegisterValue(0,0),0); + add_sfr_register(&usart.txsta, 0x98, RegisterValue(2,0),"txsta"); + add_sfr_register(&usart.spbrg, 0x99, RegisterValue(0,0),"spbrg"); + add_sfr_register(usart.txreg, 0x19, RegisterValue(0,0),"txreg"); + add_sfr_register(usart.rcreg, 0x1a, RegisterValue(0,0),"rcreg"); + + if (pir2) { + pir2->set_intcon(&intcon_reg); + pir2->set_pie(&pie2); + } + + pie2.setPir(get_pir2()); + +} + +//------------------------------------------------------------------------ +// +// P16C63 constructor +// +// Note: Since the 'C63 is derived from the 'C62. So before this constructor +// is called, the C62 constructor will be called. Most of the initialization +// is done within the 'C62 constructor. + +P16C63::P16C63(const char *_name, const char *desc) + : P16C62(_name,desc), + usart(this) +{ +} + +P16C63::~P16C63() +{ + remove_sfr_register(&pie2); + remove_sfr_register(&ccpr2l); + remove_sfr_register(&ccpr2h); + remove_sfr_register(&ccp2con); + if (registers[0xf0]->alias_mask & 0x80) + delete_file_registers(0xc0, 0xef); + else + delete_file_registers(0xc0, 0xff); + remove_sfr_register(&usart.rcsta); + remove_sfr_register(&usart.txsta); + remove_sfr_register(&usart.spbrg); + delete_sfr_register(usart.txreg); + delete_sfr_register(usart.rcreg); + + //delete_sfr_register(pir2,0x0d); +} + +void P16C63::create(void) +{ + P16C62::create(); + + P16C63::create_sfr_map(); + + // Build the links between the I/O Pins and the internal peripherals + //1ccp2con.iopin = portc->pins[1]; +} + +Processor * P16C63::construct(const char *name) +{ + P16C63 *p = new P16C63(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +//---------------------------------------------------------- +// +P16C64::P16C64(const char *_name, const char *desc) + : P16X6X_processor(_name,desc) +{ + set_hasSSP(); + pir1_2_reg = new PIR1v2(this,"pir1","Peripheral Interrupt Register",&intcon_reg,&pie1); + delete pir1; + pir1 = pir1_2_reg; + + + m_portd = new PicPSP_PortRegister(this,"portd","",8,0xff); + m_trisd = new PicTrisRegister(this,"trisd","",(PicPortRegister *)m_portd, false); + + m_porte = new PicPortRegister(this,"porte","",8,0x07); + m_trise = new PicPSP_TrisRegister(this,"trise","",m_porte, false); +} +P16C64::~P16C64() +{ + delete_sfr_register(m_portd); + delete_sfr_register(m_trisd); + + delete_sfr_register(m_porte); + delete_sfr_register(m_trise); +} + +void P16C64::create_iopin_map(void) +{ + package = new Package(40); + if(!package) return; + + // Now Create the package and place the I/O pins + package->assign_pin(1, 0); + + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 4, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 5, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 6, m_porta->addPin(new IO_open_collector("porta4"),4)); + package->assign_pin( 7, m_porta->addPin(new IO_bi_directional("porta5"),5)); + + package->assign_pin( 8, m_porte->addPin(new IO_bi_directional("porte0"),0)); + package->assign_pin( 9, m_porte->addPin(new IO_bi_directional("porte1"),1)); + package->assign_pin(10, m_porte->addPin(new IO_bi_directional("porte2"),2)); + + package->assign_pin(11, 0); + package->assign_pin(12, 0); + package->assign_pin(13, 0); + package->assign_pin(14, 0); + + package->assign_pin(15, m_portc->addPin(new IO_bi_directional("portc0"),0)); + package->assign_pin(16, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(17, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin(18, m_portc->addPin(new IO_bi_directional("portc3"),3)); + package->assign_pin(23, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin(24, m_portc->addPin(new IO_bi_directional("portc5"),5)); + package->assign_pin(25, m_portc->addPin(new IO_bi_directional("portc6"),6)); + package->assign_pin(26, m_portc->addPin(new IO_bi_directional("portc7"),7)); + + + package->assign_pin(19, m_portd->addPin(new IO_bi_directional("portd0"),0)); + package->assign_pin(20, m_portd->addPin(new IO_bi_directional("portd1"),1)); + package->assign_pin(21, m_portd->addPin(new IO_bi_directional("portd2"),2)); + package->assign_pin(22, m_portd->addPin(new IO_bi_directional("portd3"),3)); + package->assign_pin(27, m_portd->addPin(new IO_bi_directional("portd4"),4)); + package->assign_pin(28, m_portd->addPin(new IO_bi_directional("portd5"),5)); + package->assign_pin(29, m_portd->addPin(new IO_bi_directional("portd6"),6)); + package->assign_pin(30, m_portd->addPin(new IO_bi_directional("portd7"),7)); + + package->assign_pin(31, 0); + package->assign_pin(32, 0); + + package->assign_pin(33, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin(34, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin(35, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin(36, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(37, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(38, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(39, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(40, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + + if (hasSSP()) { + ssp.initialize( + get_pir_set(), // PIR + &(*m_portc)[3], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[5], // SDO + &(*m_portc)[4], // SDI + m_trisc, // I2C port + SSP_TYPE_BSSP + ); + } + psp.initialize(get_pir_set(), // PIR + m_portd, // Parallel port + m_trisd, // Parallel tris + m_trise, // Control tris + &(*m_porte)[0], // NOT RD + &(*m_porte)[1], // NOT WR + &(*m_porte)[2]); // NOT CS + + tmr1l.setIOpin(&(*m_portc)[0]); +} + +void P16C64::create_sfr_map(void) +{ + pir_set_2_def.set_pir1(pir1_2_reg); + + P16X6X_processor::create_sfr_map(); + + add_sfr_register(m_portc, 0x07); + add_sfr_register(m_trisc, 0x87, RegisterValue(0xff,0)); + + add_sfr_register(m_portd, 0x08); + add_sfr_register(m_trisd, 0x88, RegisterValue(0xff,0)); + + add_sfr_register(m_porte, 0x09); + add_sfr_register(m_trise, 0x89, RegisterValue(0x07,0)); + + //1((PORTC*)portc)->ccp1con = &ccp1con; +} + +void P16C64::create(void) +{ + create_iopin_map(); + + _14bit_processor::create(); + + //P16X6X_processor::create_sfr_map(); + P16C64::create_sfr_map(); + + // Build the links between the I/O Pins and the internal peripherals + //1ccp1con.iopin = portc->pins[2]; +} + +Processor * P16C64::construct(const char *name) +{ + P16C64 *p = new P16C64(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + + +//------------------------------------------------------------------------ +// +// + +void P16C65::create_sfr_map(void) +{ + //P16C64::create_sfr_map(); + + add_file_registers(0xc0, 0xff, 0); + + add_sfr_register(pir2, 0x0d, RegisterValue(0,0),"pir2"); + add_sfr_register(&pie2, 0x8d, RegisterValue(0,0)); + + add_sfr_register(&ccpr2l, 0x1b, RegisterValue(0,0)); + add_sfr_register(&ccpr2h, 0x1c, RegisterValue(0,0)); + add_sfr_register(&ccp2con, 0x1d, RegisterValue(0,0)); + + // get_pir_set()->set_pir2(&get_pir2()); + pir_set_def.set_pir2(pir2); + + ccp2con.setCrosslinks(&ccpr2l, pir2, PIR2v2::CCP2IF, &tmr2); + ccp2con.setIOpin(&((*m_portc)[1])); + + ccpr2l.ccprh = &ccpr2h; + ccpr2l.tmrl = &tmr1l; + ccpr2h.ccprl = &ccpr2l; + + usart.initialize(pir1,&(*m_portc)[6], &(*m_portc)[7], + new _TXREG(this,"txreg", "USART Transmit Register", &usart), + new _RCREG(this,"rcreg", "USART Receiver Register", &usart)); + + add_sfr_register(&usart.rcsta, 0x18, RegisterValue(0,0),"rcsta"); + add_sfr_register(&usart.txsta, 0x98, RegisterValue(2,0),"txsta"); + add_sfr_register(&usart.spbrg, 0x99, RegisterValue(0,0),"spbrg"); + add_sfr_register(usart.txreg, 0x19, RegisterValue(0,0),"txreg"); + add_sfr_register(usart.rcreg, 0x1a, RegisterValue(0,0),"rcreg"); + + if (pir2) + { + pir2->set_intcon(&intcon_reg); + pir2->set_pie(&pie2); + } + + pie2.setPir(get_pir2()); +} + +//------------------------------------------------------------------------ +// +// P16C65 constructor +// +// Note: Since the 'C65 is derived from the 'C64. So before this constructor +// is called, the C64 constructor will be called. Most of the initialization +// is done within the 'C64 constructor. + +P16C65::P16C65(const char *_name, const char *desc) + : P16C64(_name,desc), + usart(this) +{ +} +P16C65::~P16C65() +{ + if (registers[0xf0]->alias_mask & 0x80) + delete_file_registers(0xc0, 0xef); + else + delete_file_registers(0xc0, 0xff); + remove_sfr_register(&ccpr2l); + remove_sfr_register(&ccpr2h); + remove_sfr_register(&ccp2con); + remove_sfr_register(&pie2); + remove_sfr_register(&usart.rcsta); + remove_sfr_register(&usart.txsta); + remove_sfr_register(&usart.spbrg); + delete_sfr_register(usart.txreg); + delete_sfr_register(usart.rcreg); +} + +void P16C65::create(void) +{ + P16C64::create(); + + P16C65::create_sfr_map(); + + // Build the links between the I/O Pins and the internal peripherals + // ccp1con.iopin = portc.pins[2]; + //1ccp2con.iopin = portc->pins[1]; +} + +Processor * P16C65::construct(const char *name) +{ + P16C65 *p = new P16C65(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +//======================================================================== +// +// Configuration Memory for 16F630/676 + +class ConfigF630 : public ConfigWord +{ +public: + ConfigF630(P16F630 *pCpu) + : ConfigWord("CONFIG", 0x3fff, "Configuration Word", pCpu, 0x2007) + { + //Dprintf(("ConfigF630::ConfigF630 %p\n", m_pCpu)); + if (m_pCpu) + { + m_pCpu->set_config_word(0x2007, 0x3fff); + } + } + + enum { + FOSC0 = 1<<0, + FOSC1 = 1<<1, + FOSC2 = 1<<2, + WDTEN = 1<<3, + PWRTEN = 1<<4, + MCLRE = 1<<5, + BODEN = 1<<6, + CP = 1<<7, + CPD = 1<<8 + }; + + string toString() + { + int64_t i64; + get(i64); + int i = i64 &0xfff; + + char buff[356]; + + const char *OSCdesc[8] = { + "LP oscillator", + "XT oscillator", + "HS oscillator", + "EC oscillator w/ OSC2 configured as I/O", + "INTOSC oscillator: I/O on RA4 pin, I/O on RA5", + "INTOSC oscillator: CLKOUT on RA4 pin, I/O on RA5", + "RC oscillator: I/O on RA4 pin, RC on RA5", + "RC oscillator: CLKOUT on RA4 pin, RC on RA5" + }; + snprintf(buff,sizeof(buff), + " $%04x\n" + " FOSC=%d - Clk source = %s\n" + " WDTEN=%d - WDT is %s\n" + " PWRTEN=%d - Power up timer is %s\n" + " MCLRE=%d - RA3 Pin %s\n" + " BODEN=%d - Brown-out Detect %s\n" + " CP=%d - Code Protection %s\n" + " CPD=%d - Data Code Protection %s\n", + i, + i&(FOSC0|FOSC1|FOSC2), OSCdesc[i&(FOSC0|FOSC1|FOSC2)], + ((i&WDTE) ? 1 : 0), ((i&WDTE) ? "enabled" : "disabled"), + ((i&PWRTEN) ? 1 : 0), ((i&PWRTEN) ? "disabled" : "enabled"), + ((i&MCLRE) ? 1 : 0), ((i&MCLRE) ? "MCLR" : "Input"), + ((i&BODEN) ? 1 : 0), ((i&BODEN) ? "enabled" : "disabled"), + ((i&CP) ? 1 : 0), ((i&CP) ? "disabled" : "enabled"), + ((i&CPD) ? 1 : 0), ((i&CPD) ? "disabled" : "enabled") + ); + return string(buff); + } +}; + +//------------------------------------------------------------------------ +// +P16F630::P16F630(const char *_name, const char *desc) + : _14bit_processor(_name, desc), + t1con(this, "t1con", "TMR1 Control"), + pie1(this,"PIE1", "Peripheral Interrupt Enable"), + tmr1l(this, "tmr1l", "TMR1 Low"), + tmr1h(this, "tmr1h", "TMR1 High"), + osccal(this, "osccal", "Oscillator Calibration Register", 0xfc), + intcon_reg(this,"intcon","Interrupt Control"), + comparator(this) +{ + pir1_3_reg = new PIR1v3(this,"pir1","Peripheral Interrupt Register",&intcon_reg,&pie1); + pir1 = pir1_3_reg; + + m_ioc = new IOC(this, "ioc", "Interrupt-On-Change GPIO Register"); + + m_porta = new PicPortGRegister(this,"porta","",&intcon_reg, m_ioc, 8,0x3f); + m_trisa = new PicTrisRegister(this,"trisa","", m_porta, false); + + m_wpu = new WPU(this, "wpu", "Weak Pull-up Register", m_porta, 0x37); + tmr0.set_cpu(this, m_porta, 4, option_reg); + tmr0.start(0); + + m_portc = new PicPortRegister(this,"portc","",8,0x3f); + m_trisc = new PicTrisRegister(this,"trisc","", m_portc, false); +} + +P16F630::~P16F630() +{ + unassignMCLRPin(); + delete_file_registers(0x20, 0x5f); + delete_sfr_register(m_portc); + delete_sfr_register(m_trisc); + + delete_sfr_register(m_porta); + delete_sfr_register(m_trisa); + delete_sfr_register(m_ioc); + delete_sfr_register(m_wpu); + delete_sfr_register(pir1_3_reg); + remove_sfr_register(&tmr0); + remove_sfr_register(&intcon_reg); + remove_sfr_register(&tmr1l); + remove_sfr_register(&tmr1h); + remove_sfr_register(&t1con); + remove_sfr_register(&comparator.cmcon); + remove_sfr_register(&comparator.vrcon); + remove_sfr_register(&osccal); + remove_sfr_register(&pie1); + delete e; +} + +void P16F630::create_iopin_map(void) +{ + package = new Package(14); + if(!package) return; + + package->assign_pin(1, 0); // Vdd + + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional_pu("porta5"),5)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional_pu("porta4"),4)); + package->assign_pin( 4, m_porta->addPin(new IOPIN("porta3"),3)); + package->assign_pin( 5, m_portc->addPin(new IO_bi_directional_pu("portc5"),5)); + package->assign_pin( 6, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin( 7, m_portc->addPin(new IO_bi_directional("portc3"),3)); + + package->assign_pin( 8, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin( 9, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(10, m_portc->addPin(new IO_bi_directional("portc0"),0)); + + package->assign_pin(11, m_porta->addPin(new IO_bi_directional_pu("porta2"),2)); + package->assign_pin(12, m_porta->addPin(new IO_bi_directional_pu("porta1"),1)); + package->assign_pin(13, m_porta->addPin(new IO_bi_directional_pu("porta0"),0)); + + package->assign_pin(14, 0); //VSS + + tmr1l.setIOpin(&(*m_portc)[0]); +} + +Processor * P16F630::construct(const char *name) +{ + P16F630 *p = new P16F630(name); + + p->create(128); + p->create_invalid_registers (); + + return p; +} + +void P16F630::create(int eesize) +{ + create_iopin_map(); + + _14bit_processor::create(); + + e = new EEPROM_WIDE(this,pir1); + e->initialize(eesize); + e->set_intcon(&intcon_reg); + set_eeprom_wide(e); + + P16F630::create_sfr_map(); +} + +void P16F630::create_sfr_map() +{ + pir_set_def.set_pir1(pir1); + + add_file_registers(0x20, 0x5f, 0); + alias_file_registers(0x20, 0x5f, 0x80); + + add_sfr_register(indf, 0x00); + alias_file_registers(0x00,0x00,0x80); + + add_sfr_register(&tmr0, 0x01); + add_sfr_register(option_reg, 0x81, RegisterValue(0xff,0)); + + add_sfr_register(pcl, 0x02, RegisterValue(0,0)); + add_sfr_register(status, 0x03, RegisterValue(0x18,0)); + add_sfr_register(fsr, 0x04); + alias_file_registers(0x02,0x04,0x80); + + add_sfr_register(m_porta, 0x05); + add_sfr_register(m_trisa, 0x85, RegisterValue(0x3f,0)); + + add_sfr_register(m_portc, 0x07); + add_sfr_register(m_trisc, 0x87, RegisterValue(0xff,0)); + + add_sfr_register(pclath, 0x0a, RegisterValue(0,0)); + + add_sfr_register(&intcon_reg, 0x0b, RegisterValue(0,0)); + alias_file_registers(0x0a,0x0b,0x80); + add_sfr_register(pir1, 0x0c, RegisterValue(0,0)); + add_sfr_register(&tmr1l, 0x0e, RegisterValue(0,0), "tmr1l"); + add_sfr_register(&tmr1h, 0x0f, RegisterValue(0,0), "tmr1h"); + add_sfr_register(&t1con, 0x10, RegisterValue(0,0)); + + intcon = &intcon_reg; + intcon_reg.set_pir_set(get_pir_set()); + + tmr1l.tmrh = &tmr1h; + tmr1l.t1con = &t1con; + // FIXME -- can't delete this new'd item + tmr1l.setInterruptSource(new InterruptSource(pir1, PIR1v3::TMR1IF)); + tmr1h.tmrl = &tmr1l; + t1con.tmrl = &tmr1l; + + tmr1l.setIOpin(&(*m_porta)[5]); + tmr1l.setGatepin(&(*m_porta)[4]); + + add_sfr_register(&pie1, 0x8c, RegisterValue(0,0)); + if (pir1) { + pir1->set_intcon(&intcon_reg); + pir1->set_pie(&pie1); + } + pie1.setPir(pir1); + + + // Link the comparator and voltage ref to porta + comparator.initialize(get_pir_set(), NULL, + &(*m_porta)[0], &(*m_porta)[1], + NULL, NULL, + &(*m_porta)[2], NULL); + + comparator.cmcon.set_configuration(1, 0, AN0, AN1, AN0, AN1, ZERO); + comparator.cmcon.set_configuration(1, 1, AN0, AN1, AN0, AN1, OUT0); + comparator.cmcon.set_configuration(1, 2, AN0, AN1, AN0, AN1, NO_OUT); + comparator.cmcon.set_configuration(1, 3, AN1, VREF, AN1, VREF, OUT0); + comparator.cmcon.set_configuration(1, 4, AN1, VREF, AN1, VREF, NO_OUT); + comparator.cmcon.set_configuration(1, 5, AN1, VREF, AN0, VREF, OUT0); + comparator.cmcon.set_configuration(1, 6, AN1, VREF, AN0, VREF, NO_OUT); + comparator.cmcon.set_configuration(1, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 0, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 1, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 2, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 3, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 4, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 5, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 6, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + + add_sfr_register(&comparator.cmcon, 0x19, RegisterValue(0,0),"cmcon"); + add_sfr_register(&comparator.vrcon, 0x99, RegisterValue(0,0),"cvrcon"); + + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x9a); + add_sfr_register(get_eeprom()->get_reg_eeadr(), 0x9b); + add_sfr_register(get_eeprom()->get_reg_eecon1(), 0x9c, RegisterValue(0,0)); + add_sfr_register(get_eeprom()->get_reg_eecon2(), 0x9d); + add_sfr_register(m_wpu, 0x95, RegisterValue(0x37,0),"wpua"); + add_sfr_register(m_ioc, 0x96, RegisterValue(0,0),"ioca"); + add_sfr_register(&osccal, 0x90, RegisterValue(0x80,0)); + +} +//------------------------------------------------------------------- +void P16F630::option_new_bits_6_7(uint bits) +{ + m_wpu->set_wpu_pu( (bits & OPTION_REG::BIT7) != OPTION_REG::BIT7); + m_porta->setIntEdge((bits & OPTION_REG::BIT6) == OPTION_REG::BIT6); +} +//------------------------------------------------------------------- +void P16F630::create_config_memory() +{ + m_configMemory = new ConfigMemory(this,1); + m_configMemory->addConfigWord(0,new ConfigF630(this)); + +}; + +//------------------------------------------------------------------- +bool P16F630::set_config_word(uint address, uint cfg_word) +{ + enum { + CFG_FOSC0 = 1<<0, + CFG_FOSC1 = 1<<1, + CFG_FOSC2 = 1<<2, + CFG_WDTE = 1<<3, + CFG_MCLRE = 1<<5, + }; + + + if(address == config_word_address()) + { + uint valid_pins = m_porta->getEnableMask(); + + if ((cfg_word & CFG_MCLRE) == CFG_MCLRE) + { + assignMCLRPin(4); + } + else unassignMCLRPin(); + + wdt.initialize((cfg_word & CFG_WDTE) == CFG_WDTE); + + set_int_osc(false); + + // AnalogReq is used so ADC does not change clock names + // set_config_word is first called with default and then + // often called a second time. the following call is to + // reset porta so next call to AnalogReq sill set the pin name + // + (&(*m_porta)[4])->AnalogReq((Register *)this, false, "porta4"); + valid_pins |= 0x20; + switch(cfg_word & (CFG_FOSC0 | CFG_FOSC1 | CFG_FOSC2)) + { + + case 0: // LP oscillator: low power crystal is on RA4 and RA5 + case 1: // XT oscillator: crystal/resonator is on RA4 and RA5 + case 2: // HS oscillator: crystal/resonator is on RA4 and RA5 + (&(*m_porta)[4])->AnalogReq((Register *)this, true, "OSC2"); + valid_pins &= 0xcf; + break; + + case 3: // EC I/O on RA4 pin, CLKIN on RA5 + valid_pins &= 0xef; + break; + + case 5: // INTOSC CLKOUT on RA4 pin + (&(*m_porta)[4])->AnalogReq((Register *)this, true, "CLKOUT"); + case 4: // INTOSC + set_int_osc(true); + osccal.set_freq(4e6); + break; + + case 6: //RC oscillator: I/O on RA4 pin, RC on RA5 + valid_pins &= 0xdf; + break; + + case 7: // RC oscillator: CLKOUT on RA4 pin, RC on RA5 + (&(*m_porta)[4])->AnalogReq((Register *)this, true, "CLKOUT"); + valid_pins &= 0xdf; + break; + }; + + if (valid_pins != m_porta->getEnableMask()) // enable new pins for IO + { + m_porta->setEnableMask(valid_pins); + m_trisa->setEnableMask(valid_pins); + } + return(true); + } + return false; +} + +//------------------------------------------------------------------------ +// +P16F676::P16F676(const char *_name, const char *desc) + : P16F630(_name, desc), + ansel(this,"ansel", "Analog Select"), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adresh(this,"adresh", "A2D Result High"), + adresl(this,"adresl", "A2D Result Low") +{ +} +P16F676::~P16F676() +{ + remove_sfr_register(&adresl); + remove_sfr_register(&adresh); + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&ansel); +} + +Processor * P16F676::construct(const char *name) +{ + P16F676 *p = new P16F676(name); + + p->create(128); + p->create_invalid_registers (); + + return p; +} + +void P16F676::create(int ram_top) +{ + P16F630::create(ram_top); + create_sfr_map(); +} + +void P16F676::create_sfr_map() +{ + add_sfr_register(&adresl, 0x9e, RegisterValue(0,0)); + add_sfr_register(&adresh, 0x1e, RegisterValue(0,0)); + + add_sfr_register(&adcon0, 0x1f, RegisterValue(0,0)); + add_sfr_register(&adcon1, 0x9f, RegisterValue(0,0)); + add_sfr_register(&ansel, 0x91, RegisterValue(0xff,0)); + + + ansel.setAdcon1(&adcon1); +// ansel.setAdcon0(&adcon0); + adcon0.setAdresLow(&adresl); + adcon0.setAdres(&adresh); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(&intcon_reg); + adcon0.setA2DBits(10); + adcon0.setPir(pir1); + adcon0.setChannel_Mask(7); + adcon0.setChannel_shift(2); + + adcon1.setAdcon0(&adcon0); + adcon1.setNumberOfChannels(8); + + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[4]); + adcon1.setIOPin(4, &(*m_portc)[0]); + adcon1.setIOPin(5, &(*m_portc)[1]); + adcon1.setIOPin(6, &(*m_portc)[2]); + adcon1.setIOPin(7, &(*m_portc)[3]); + + adcon1.setVrefHiConfiguration(2, 1); + +/* Channel Configuration done dynamiclly based on ansel */ + +} diff --git a/src/gpsim/devices/p16x6x.h b/src/gpsim/devices/p16x6x.h new file mode 100644 index 0000000..37f1454 --- /dev/null +++ b/src/gpsim/devices/p16x6x.h @@ -0,0 +1,264 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __P16X6X_H__ +#define __P16X6X_H__ + +#include "14bit-processors.h" +#include "p16x8x.h" +#include "14bit-tmrs.h" +#include "intcon.h" +#include "pir.h" +#include "ssp.h" +#include "psp.h" +#include "eeprom.h" +#include "comparator.h" +#include "a2dconverter.h" + + +// +// -- Define a class to contain most of the registers/peripherals +// of a 16x6x device (where the second `x' is >= 3 +// + +class P16X6X_processor : public Pic14Bit +{ +public: + + PicPortRegister *m_portc; + PicTrisRegister *m_trisc; + + T1CON t1con; + PIR *pir1; + PIE pie1; + PIR *pir2; + PIE pie2; + T2CON t2con; + PR2 pr2; + TMR2 tmr2; + TMRL tmr1l; + TMRH tmr1h; + CCPCON ccp1con; + CCPRL ccpr1l; + CCPRH ccpr1h; + CCPCON ccp2con; + CCPRL ccpr2l; + CCPRH ccpr2h; + PCON pcon; + PIR_SET_1 pir_set_def; + SSP_MODULE ssp; + + virtual uint program_memory_size() const { return 0x800; }; + virtual uint register_memory_size () const { return 0x100; } + + virtual void create_sfr_map(); + virtual PIR *get_pir2() { return (pir2); } + virtual PIR *get_pir1() { return (pir1); } + virtual PIR_SET *get_pir_set() { return (&pir_set_def); } + + P16X6X_processor(const char *_name=0, const char *desc=0); + virtual ~P16X6X_processor(); +}; + +/********************************************************************* + * class definitions for the 16c6x family of processors + */ + + class P16C61 : public P16X8X +{ + public: + + P16C61(const char *_name=0, const char *desc=0); + virtual ~P16C61(); + + virtual PROCESSOR_TYPE isa(){return _P16C61_;}; + virtual uint program_memory_size() const { return 0x400; }; + virtual void create(); + + static Processor *construct(const char *name); + +}; + +class P16C62 : public P16X6X_processor +{ + public: + + P16C62(const char *_name=0, const char *desc=0); + virtual ~P16C62(); + + static Processor *construct(const char *name); + + TMR2_MODULE tmr2_module; + virtual PROCESSOR_TYPE isa(){return _P16C62_;}; + + virtual void create_sfr_map(); + + virtual uint program_memory_size() const { return 0x800; }; + virtual void create_iopin_map(); + + virtual void create(); +}; + +class P16C63 : public P16C62 +{ + public: + + P16C63(const char *_name=0, const char *desc=0); + virtual ~P16C63(); + + USART_MODULE usart; + + virtual PROCESSOR_TYPE isa(){return _P16C63_;}; + + virtual uint program_memory_size() const { return 0x1000; }; + + static Processor *construct(const char *name); + void create(); + void create_sfr_map(); +}; + + +class P16C64 : public P16X6X_processor +{ + public: + + P16C64(const char *_name=0, const char *desc=0); + virtual ~P16C64(); + + // XXX + // This pir1_2, pir2_2 stuff is not particularly pretty. It would be + // better to just tell C++ to redefine pir1 and pir2 and PIR1v2 and + // PIR2v2, but C++ only supports covariance in member function return + // values. + PIR1v2 *pir1_2_reg; + PIR_SET_2 pir_set_2_def; + virtual PIR *get_pir1() { return (pir1_2_reg); } + virtual PIR_SET *get_pir_set() { return (&pir_set_2_def); } + + + PicPSP_PortRegister *m_portd; + + PicTrisRegister *m_trisd; + + PicPortRegister *m_porte; + PicPSP_TrisRegister *m_trise; + PSP psp; + + static Processor *construct(const char *name); + + TMR2_MODULE tmr2_module; + virtual PROCESSOR_TYPE isa(){return _P16C64_;}; + + void create_sfr_map(); + + virtual uint program_memory_size() const { return 0x800; }; + virtual void create(); + virtual void create_iopin_map(); + + virtual bool hasSPS() {return false;} +}; + +class P16C65 : public P16C64 +{ + public: + + P16C65(const char *_name=0, const char *desc=0); + virtual ~P16C65(); + + USART_MODULE usart; + + virtual PROCESSOR_TYPE isa(){return _P16C65_;}; + + virtual uint program_memory_size() const { return 0x1000; }; + + static Processor *construct(const char *name); + void create(); + void create_sfr_map(); +}; + + +class P16F630 : public _14bit_processor +{ + public: + + P16F630(const char *_name=0, const char *desc=0); + virtual ~P16F630(); + + T1CON t1con; + PIR *pir1; + PIE pie1; + TMRL tmr1l; + TMRH tmr1h; + OSCCAL osccal; + + EEPROM_WIDE *e; + PIR1v3 *pir1_3_reg; + + INTCON_14_PIR intcon_reg; + ComparatorModule comparator; + PIR_SET_1 pir_set_def; + WPU *m_wpu; + IOC *m_ioc; + + virtual PIR *get_pir2() { return (NULL); } + virtual PIR *get_pir1() { return (pir1); } + virtual PIR_SET *get_pir_set() { return (&pir_set_def); } + + PicPortGRegister *m_porta; + PicTrisRegister *m_trisa; + + PicPortRegister *m_portc; + PicTrisRegister *m_trisc; + + virtual PROCESSOR_TYPE isa(){return _P16F630_;} + static Processor *construct(const char *name); + void create(int); + + virtual void create_sfr_map(); + virtual void create_iopin_map(); + virtual void option_new_bits_6_7(uint bits); + + virtual uint program_memory_size() const { return 0x400; }; + virtual uint register_memory_size () const { return 0x100; } + + virtual void set_eeprom_wide(EEPROM_WIDE *ep) { eeprom = ep; } + virtual void create_config_memory(); + virtual bool set_config_word(uint address, uint cfg_word); +}; + +class P16F676 : public P16F630 +{ + public: + + P16F676(const char *_name=0, const char *desc=0); + virtual ~P16F676(); + + ANSEL ansel; + ADCON0_12F adcon0; + ADCON1_16F adcon1; + sfr_register adresh; + sfr_register adresl; + + virtual PROCESSOR_TYPE isa(){return _P16F676_;} + static Processor *construct(const char *name); + virtual void create(int); + virtual void create_sfr_map(); +}; +#endif diff --git a/src/gpsim/devices/p16x7x.cc b/src/gpsim/devices/p16x7x.cc new file mode 100644 index 0000000..3690f75 --- /dev/null +++ b/src/gpsim/devices/p16x7x.cc @@ -0,0 +1,879 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +// +// p16x7x +// +// This file supports: +// P16C71 +// P16C712 +// P16C716 +// P16F716 +// P16C72 +// P16C73 +// P16C74 + + +#include +#include +#include + +#include "config.h" +#include "packages.h" +#include "p16x7x.h" +#include "pic-ioports.h" +#include "stimuli.h" +#include "pm_rd.h" + +//#define DEBUG_AD + +//------------------------------------------------------ +class P16C71::PIR_16C71 : public PIR_SET +{ +public: + PIR_16C71(ADCON0 *adcon0) + : m_adcon0(adcon0) { } + + virtual int interrupt_status() { return m_adcon0->getADIF(); } + +private: + ADCON0 *m_adcon0; +}; + +//------------------------------------------------------------------------ +// +P16C71::P16C71(const char *_name, const char *desc) + : P16X8X(_name, desc), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adres(this,"adres", "A2D Result") + +{ + m_pir = new PIR_16C71(&adcon0); +} + +P16C71::~P16C71() +{ + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&adres); + delete m_pir; +} + +void P16C71::create_sfr_map() +{ + add_sfr_register(&adcon0, 0x08, RegisterValue(0,0)); + add_sfr_register(&adcon1, 0x88, RegisterValue(0,0)); + + add_sfr_register(&adres, 0x09, RegisterValue(0,0)); + + adcon1.setValidCfgBits(ADCON1::PCFG0 | ADCON1::PCFG1,0); + adcon1.setNumberOfChannels(4); + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[3]); + adcon1.setChannelConfiguration(0, 0x0f); + adcon1.setChannelConfiguration(1, 0x0f); + adcon1.setChannelConfiguration(2, 0x03); + adcon1.setChannelConfiguration(3, 0x00); + adcon1.setVrefHiConfiguration(1, 3); + + adcon0.setAdres(&adres); + adcon0.setAdresLow(0); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(&intcon_reg); + adcon0.setA2DBits(8); + + intcon = &intcon_reg; + + intcon_reg.set_pir_set(m_pir); +} + + +void P16C71::create() +{ + ram_top = 0x2f; + P16X8X::create_iopin_map(); + _14bit_processor::create(); + + set_eeprom(0); + + add_file_registers(0x0c, ram_top, 0x80); + Pic14Bit::create_sfr_map(); + + create_sfr_map(); + +} + +Processor * P16C71::construct(const char *name) +{ + P16C71 *p = new P16C71(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +P16x71x::P16x71x(const char *_name, const char *desc) + : _14bit_processor(_name, desc), + intcon_reg(this,"intcon","Interrupt Control"), + t1con(this, "t1con", "TMR1 Control"), + pie1(this,"PIE1", "Peripheral Interrupt Enable"), + t2con(this, "t2con", "TMR2 Control"), + pr2(this, "pr2", "TMR2 Period Register"), + tmr2(this, "tmr2", "TMR2 Register"), + tmr1l(this, "tmr1l", "TMR1 Low"), + tmr1h(this, "tmr1h", "TMR1 High"), + ccp1con(this, "ccp1con", "Capture Compare Control"), + ccpr1l(this, "ccpr1l", "Capture Compare 1 Low"), + ccpr1h(this, "ccpr1h", "Capture Compare 1 High"), + pcon(this, "pcon", "pcon"), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adres(this,"adres", "A2D Result") +{ + pir1 = new PIR1v2(this,"pir1","Peripheral Interrupt Register",&intcon_reg, &pie1); + + m_porta = new PicPortRegister(this,"porta","", 8,0x1f); + m_trisa = new PicTrisRegister(this,"trisa","", m_porta, false); + + tmr0.set_cpu(this, m_porta, 4, option_reg); + tmr0.start(0); + + m_ioc = new IOC(this, "iocen", "Interrupt-On-Change negative edge", 0xf0); + m_portb = new PicPortGRegister(this,"portb","",&intcon_reg,m_ioc,8,0xff); + m_trisb = new PicTrisRegister(this,"trisb","", m_portb, false); + m_portb->intf_bit = 0; + + m_ioc->put_value(0xf0); +} + +P16x71x::~P16x71x() +{ + unassignMCLRPin(); + remove_sfr_register(&tmr0); + remove_sfr_register(&intcon_reg); + + delete_sfr_register(m_portb); + delete_sfr_register(m_trisb); + + delete_sfr_register(m_porta); + delete_sfr_register(m_trisa); + + remove_sfr_register(&tmr1l); + remove_sfr_register(&tmr1h); + + remove_sfr_register(&pcon); + + remove_sfr_register(&t1con); + remove_sfr_register(&tmr2); + remove_sfr_register(&t2con); + remove_sfr_register(&pr2); + + remove_sfr_register(&pie1); + delete_sfr_register(pir1); + + remove_sfr_register(&ccpr1l); + remove_sfr_register(&ccpr1h); + remove_sfr_register(&ccp1con); + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&adres); + + + delete_file_registers(0x20,0x7f); + delete_file_registers(0xa0,0xbf); + +} + +//------------------------------------------------------------------- +void P16x71x::option_new_bits_6_7(uint bits) +{ + //1 ((PORTB *)portb)->rbpu_intedg_update(bits); + m_portb->setRBPU( (bits & (1<<7)) == (1<<7)); + m_portb->setIntEdge((bits & (1<<6)) == (1<<6)); +} + + +void P16x71x::create_sfr_map() +{ + add_sfr_register(indf, 0x00); + alias_file_registers(0x00,0x00,0x80); + + add_sfr_register(&tmr0, 0x01); + add_sfr_register(option_reg, 0x81, RegisterValue(0xff,0)); + + add_sfr_register(pcl, 0x02, RegisterValue(0,0)); + add_sfr_register(status, 0x03, RegisterValue(0x18,0)); + add_sfr_register(fsr, 0x04); + alias_file_registers(0x02,0x04,0x80); + + add_sfr_register(m_porta, 0x05); + add_sfr_register(m_trisa, 0x85, RegisterValue(0x3f,0)); + + add_sfr_register(m_portb, 0x06); + add_sfr_register(m_trisb, 0x86, RegisterValue(0xff,0)); + + add_sfr_register(pclath, 0x0a, RegisterValue(0,0)); + //add_sfr_register(pclath, 0x8a, RegisterValue(0,0)); + + add_sfr_register(&intcon_reg, 0x0b, RegisterValue(0,0)); + alias_file_registers(0x0a,0x0b,0x80); + + intcon = &intcon_reg; + + m_porta->setEnableMask(0x1f); + m_porta->setTris(m_trisa); + + // The 16c62,c64 have general purpose registers + // at addresses 20-7f and a0-bf + add_file_registers(0x20, 0x7f, 0); + add_file_registers(0xa0, 0xbf, 0); + + + add_sfr_register(pir1, 0x0c, RegisterValue(0,0),"pir1"); + add_sfr_register(&pie1, 0x8c, RegisterValue(0,0)); + + add_sfr_register(&tmr1l, 0x0e, RegisterValue(0,0),"tmr1l"); + add_sfr_register(&tmr1h, 0x0f, RegisterValue(0,0),"tmr1h"); + + add_sfr_register(&pcon, 0x8e, RegisterValue(0,0),"pcon"); + + add_sfr_register(&t1con, 0x10, RegisterValue(0,0)); + add_sfr_register(&tmr2, 0x11, RegisterValue(0,0)); + add_sfr_register(&t2con, 0x12, RegisterValue(0,0)); + add_sfr_register(&pr2, 0x92, RegisterValue(0xff,0)); + + // get_pir_set()->set_pir1(get_pir1()); + pir_set_def.set_pir1(pir1); + + intcon = &intcon_reg; + intcon_reg.set_pir_set(get_pir_set()); + + // Maybe there's a better place for this, but let's go ahead and link all + // of the registers together (there's probably a better way too) : + + tmr1l.tmrh = &tmr1h; + tmr1l.t1con = &t1con; + tmr1l.setInterruptSource(new InterruptSource(pir1, PIR1v1::TMR1IF)); + + tmr1h.tmrl = &tmr1l; + + t1con.tmrl = &tmr1l; + + t2con.tmr2 = &tmr2; + tmr2.pir_set = get_pir_set(); + tmr2.pr2 = &pr2; + tmr2.t2con = &t2con; + tmr2.add_ccp(&ccp1con); + pr2.tmr2 = &tmr2; + + + if (pir1) { + pir1->set_intcon(&intcon_reg); + pir1->set_pie(&pie1); + pir1->valid_bits = pir1->writable_bits = 0x47; + } + pie1.setPir(pir1); + + /* The A/D section is similar to 16x71, but not equal */ + add_sfr_register(&adcon0, 0x1f, RegisterValue(0,0)); + add_sfr_register(&adcon1, 0x9f, RegisterValue(0,0)); + + add_sfr_register(&adres, 0x1e, RegisterValue(0,0)); + + //1adcon0.analog_port = porta; + adcon0.setAdres(&adres); + adcon0.setAdresLow(0); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(&intcon_reg); + adcon0.setChannel_Mask(3); + adcon0.setA2DBits(8); + intcon = &intcon_reg; + + adcon1.setValidCfgBits(ADCON1::PCFG0 | ADCON1::PCFG1| ADCON1::PCFG2,0); + adcon1.setNumberOfChannels(4); + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[3]); + adcon1.setChannelConfiguration(0, 0x0f); + adcon1.setChannelConfiguration(1, 0x0f); + adcon1.setChannelConfiguration(2, 0x0f); + adcon1.setChannelConfiguration(3, 0x0f); + adcon1.setChannelConfiguration(4, 0x0b); + adcon1.setChannelConfiguration(5, 0x0b); + adcon1.setChannelConfiguration(6, 0x00); + adcon1.setChannelConfiguration(7, 0x00); + adcon1.setVrefHiConfiguration(1, 3); + adcon1.setVrefHiConfiguration(3, 3); + adcon1.setVrefHiConfiguration(5, 3); + + add_sfr_register(&ccpr1l, 0x15, RegisterValue(0,0)); + add_sfr_register(&ccpr1h, 0x16, RegisterValue(0,0)); + add_sfr_register(&ccp1con, 0x17, RegisterValue(0,0)); + + ccp1con.setIOpin(&(*m_portb)[3], 0, 0, 0); + ccp1con.setBitMask(0x3f); + ccpr1l.ccprh = &ccpr1h; + ccpr1l.tmrl = &tmr1l; + ccpr1h.ccprl = &ccpr1l; + + + +} + +void P16x71x::create_iopin_map() +{ + + package = new Package(18); + if(!package) + return; + + // Now Create the package and place the I/O pins + + package->assign_pin(17, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin(18, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 1, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 3, m_porta->addPin(new IO_open_collector("porta4"),4)); + + createMCLRPin(4); + package->assign_pin( 5, 0); + package->assign_pin( 6, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin( 7, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin( 8, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin( 9, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(10, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(11, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(12, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(13, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + package->assign_pin(14, 0); + package->assign_pin(15, 0); + package->assign_pin(16, 0); + +} + +//-------------------------------------- +void P16C712::create_sfr_map() +{ + /* Extra timers and Capture/Compare are like in 16x63 => 16X6X code */ + //P16X6X_processor::create_sfr_map(); + P16x71x::create_sfr_map(); + ccp1con.setIOpin(&(*m_portb)[3], 0, 0, 0); + ccp1con.setBitMask(0x3f); + ccp1con.setCrosslinks(&ccpr1l, pir1, PIR1v2::CCP1IF, &tmr2, 0); + add_sfr_register(&trisccp, 0x87, RegisterValue(0xff,0)); + add_sfr_register(&dataccp, 0x07, RegisterValue(0x00,0)); +} + +void P16C712::create() +{ + P16x71x::create_iopin_map(); /* 14 bits 18 pins connections */ + _14bit_processor::create(); + create_sfr_map(); + + //1ccp1con.iopin = portb->pins[2]; +} + +Processor * P16C712::construct(const char *name) +{ + P16C712 *p = new P16C712(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +P16C712::P16C712(const char *_name, const char *desc) + : P16x71x(_name, desc), + trisccp(this, "trisccp", "TRISCCP Register"), + dataccp(this, "dataccp", "DATACCP Register") +{ +} + +P16C712::~P16C712() +{ + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&adres); + remove_sfr_register(&trisccp); + remove_sfr_register(&dataccp); +} + +//-------------------------------------- + +Processor * P16C716::construct(const char *name) +{ + P16C716 *p = new P16C716(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +P16C716::P16C716(const char *_name, const char *desc) + : P16C712(_name, desc) +{ +} + +//-------------------------------------- + +Processor * P16F716::construct(const char *name) +{ + P16F716 *p = new P16F716(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +void P16F716::create_sfr_map() +{ + P16x71x::create_sfr_map(); + add_sfr_register(&pwm1con, 0x18, RegisterValue(0,0)); + add_sfr_register(&eccpas, 0x19, RegisterValue(0,0)); + + eccpas.setIOpin(&(*m_portb)[4], 0, &(*m_portb)[0]); + eccpas.link_registers(&pwm1con, &ccp1con); + + // portb3 already set + ccp1con.setIOpin(0, &(*m_portb)[5], &(*m_portb)[6], &(*m_portb)[7]); + ccp1con.setBitMask(0xff); + ccp1con.pwm1con = &pwm1con; + ccp1con.setCrosslinks(&ccpr1l, pir1, PIR1v2::CCP1IF, &tmr2, &eccpas); + +} + +void P16F716::create() +{ + P16x71x::create_iopin_map(); /* 14 bits 18 pins connections */ + _14bit_processor::create(); + create_sfr_map(); +} + +P16F716::P16F716(const char *_name, const char *desc) + : P16C712(_name, desc), + eccpas(this, "eccpas", "ECCP Auto-Shutdown Control Register"), + pwm1con(this, "pwm1con", "Enhanced PWM Control Register") +{ +} + +P16F716::~P16F716() +{ + remove_sfr_register(&pwm1con); + remove_sfr_register(&eccpas); +} + +//-------------------------------------- + +void P16C72::create_sfr_map() +{ + // Parent classes just set PIR version 1 + pir_set_2_def.set_pir1(pir1_2_reg); + pir_set_2_def.set_pir2(pir2_2_reg); + + add_sfr_register(&adcon0, 0x1f, RegisterValue(0,0)); + add_sfr_register(&adcon1, 0x9f, RegisterValue(0,0)); + + add_sfr_register(&adres, 0x1e, RegisterValue(0,0)); + + adcon0.setAdres(&adres); + adcon0.setAdresLow(0); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(&intcon_reg); + adcon0.setPir(pir1_2_reg); + adcon0.setChannel_Mask(7); // even though there are only 5 inputs... + adcon0.setA2DBits(8); + + intcon = &intcon_reg; + + adcon1.setValidCfgBits(ADCON1::PCFG0 | ADCON1::PCFG1| ADCON1::PCFG2, 0); + adcon1.setNumberOfChannels(5); + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[3]); + adcon1.setIOPin(4, &(*m_porta)[5]); + adcon1.setChannelConfiguration(0, 0x1f); + adcon1.setChannelConfiguration(1, 0x1f); + adcon1.setChannelConfiguration(2, 0x1f); + adcon1.setChannelConfiguration(3, 0x1f); + adcon1.setChannelConfiguration(4, 0x0b); + adcon1.setChannelConfiguration(5, 0x0b); + adcon1.setChannelConfiguration(6, 0x00); + adcon1.setChannelConfiguration(7, 0x00); + adcon1.setVrefHiConfiguration(1, 3); + adcon1.setVrefHiConfiguration(3, 3); + adcon1.setVrefHiConfiguration(5, 3); + + // Link the A/D converter to the Capture Compare Module + ccp2con.setADCON(&adcon0); +} + +void P16C72::create() +{ + P16C62::create(); + P16C72::create_sfr_map(); +} + +Processor * P16C72::construct(const char *name) +{ + P16C72 *p = new P16C72(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + + +P16C72::P16C72(const char *_name, const char *desc) + : P16C62(_name, desc), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adres(this,"adres", "A2D Result") +{ + pir1_2_reg = new PIR1v2(this,"pir1","Peripheral Interrupt Register",&intcon_reg,&pie1); + pir2_2_reg = new PIR2v2(this,"pir2","Peripheral Interrupt Register",&intcon_reg,&pie2); + + delete pir1; + delete pir2; + pir1 = pir1_2_reg; + pir2 = pir2_2_reg; +} + +P16C72::~P16C72() +{ + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&adres); +} + +//-------------------------------------- + +void P16C73::create_sfr_map() +{ + // Parent classes just set PIR version 1 + pir_set_2_def.set_pir1(pir1_2_reg); + pir_set_2_def.set_pir2(pir2_2_reg); + + add_sfr_register(&adcon0, 0x1f, RegisterValue(0,0)); + add_sfr_register(&adcon1, 0x9f, RegisterValue(0,0)); + + add_sfr_register(&adres, 0x1e, RegisterValue(0,0)); + + adcon0.setAdres(&adres); + adcon0.setAdresLow(0); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(&intcon_reg); + adcon0.setPir(pir1_2_reg); + adcon0.setChannel_Mask(7); // even though there are only 5 inputs... + adcon0.setA2DBits(8); + + intcon = &intcon_reg; + + //1adcon1.analog_port = porta; + adcon1.setValidCfgBits(ADCON1::PCFG0 | ADCON1::PCFG1| ADCON1::PCFG2, 0); + + adcon1.setNumberOfChannels(5); + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[3]); + adcon1.setIOPin(4, &(*m_porta)[5]); + adcon1.setChannelConfiguration(0, 0x1f); + adcon1.setChannelConfiguration(1, 0x1f); + adcon1.setChannelConfiguration(2, 0x1f); + adcon1.setChannelConfiguration(3, 0x1f); + adcon1.setChannelConfiguration(4, 0x0b); + adcon1.setChannelConfiguration(5, 0x0b); + adcon1.setChannelConfiguration(6, 0x00); + adcon1.setChannelConfiguration(7, 0x00); + adcon1.setVrefHiConfiguration(1, 3); + adcon1.setVrefHiConfiguration(3, 3); + adcon1.setVrefHiConfiguration(5, 3); + + // Link the A/D converter to the Capture Compare Module + ccp2con.setADCON(&adcon0); +} + +void P16C73::create() +{ + P16C63::create(); + P16C73::create_sfr_map(); +} + +Processor * P16C73::construct(const char *name) +{ + P16C73 *p = new P16C73(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + + +P16C73::P16C73(const char *_name, const char *desc) + : P16C63(_name, desc), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adres(this,"adres", "A2D Result") +{ + pir1_2_reg = new PIR1v2(this,"pir1","Peripheral Interrupt Register",&intcon_reg,&pie1); + pir2_2_reg = new PIR2v2(this,"pir2","Peripheral Interrupt Register",&intcon_reg,&pie2); + + delete pir1; + pir1 = pir1_2_reg; + delete pir2; + pir2 = pir2_2_reg; +} + +P16C73::~P16C73() +{ + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&adres); +} + +//------------------------------------------------------------ + +void P16F73::create_sfr_map() +{ + add_sfr_register(pm_rd.get_reg_pmadr(), 0x10d); + add_sfr_register(pm_rd.get_reg_pmadrh(), 0x10f); + add_sfr_register(pm_rd.get_reg_pmdata(), 0x10c); + add_sfr_register(pm_rd.get_reg_pmdath(), 0x10e); + add_sfr_register(pm_rd.get_reg_pmcon1(), 0x18c); + + alias_file_registers(0x80,0x80,0x80); + alias_file_registers(0x01,0x01,0x100); + alias_file_registers(0x82,0x84,0x80); + alias_file_registers(0x06,0x06,0x100); + alias_file_registers(0x8a,0x8b,0x80); + alias_file_registers(0x100,0x100,0x80); + alias_file_registers(0x81,0x81,0x100); + alias_file_registers(0x102,0x104,0x80); + alias_file_registers(0x86,0x86,0x100); + alias_file_registers(0x10a,0x10b,0x80); + + alias_file_registers(0x20,0x7f,0x100); + alias_file_registers(0xa0,0xff,0x100); +} + +void P16F73::create() +{ + P16C73::create(); + + status->rp_mask = 0x60; // rp0 and rp1 are valid. + indf->base_address_mask1 = 0x80; // used for indirect accesses above 0x100 + indf->base_address_mask2 = 0x1ff; // used for indirect accesses above 0x100 + + P16F73::create_sfr_map(); +} + +Processor * P16F73::construct(const char *name) +{ + P16F73 *p = new P16F73(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + + +P16F73::P16F73(const char *_name, const char *desc) + : P16C73(_name, desc), + pm_rd(this) +{ +} + +P16F73::~P16F73() +{ + remove_sfr_register(pm_rd.get_reg_pmadr()); + remove_sfr_register(pm_rd.get_reg_pmadrh()); + remove_sfr_register(pm_rd.get_reg_pmdata()); + remove_sfr_register(pm_rd.get_reg_pmdath()); + remove_sfr_register(pm_rd.get_reg_pmcon1()); +} + +//------------------------------------------------------------ +// +// 16C74 +// + +void P16C74::create_sfr_map() +{ + // Parent classes just set PIR version 1 + pir_set_2_def.set_pir1(pir1_2_reg); + pir_set_2_def.set_pir2(pir2_2_reg); + + add_sfr_register(&adcon0, 0x1f, RegisterValue(0,0)); + add_sfr_register(&adcon1, 0x9f, RegisterValue(0,0)); + + add_sfr_register(&adres, 0x1e, RegisterValue(0,0)); + + //1adcon0.analog_port = porta; + //1adcon0.analog_port2 = porte; + + adcon0.setAdres(&adres); + adcon0.setAdresLow(0); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(&intcon_reg); + adcon0.setPir(pir1_2_reg); + adcon0.setChannel_Mask(7); + adcon0.setA2DBits(8); + + intcon = &intcon_reg; + + adcon1.setValidCfgBits(ADCON1::PCFG0 | ADCON1::PCFG1 | ADCON1::PCFG2, 0); + adcon1.setNumberOfChannels(8); + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[3]); + adcon1.setIOPin(4, &(*m_porta)[5]); + adcon1.setIOPin(5, &(*m_porte)[0]); + adcon1.setIOPin(6, &(*m_porte)[1]); + adcon1.setIOPin(7, &(*m_porte)[2]); + + adcon1.setChannelConfiguration(0, 0xff); + adcon1.setChannelConfiguration(1, 0xff); + adcon1.setChannelConfiguration(2, 0x1f); + adcon1.setChannelConfiguration(3, 0x1f); + adcon1.setChannelConfiguration(4, 0x0b); + adcon1.setChannelConfiguration(5, 0x0b); + adcon1.setChannelConfiguration(6, 0x00); + adcon1.setChannelConfiguration(7, 0x00); + + adcon1.setVrefHiConfiguration(1, 3); + adcon1.setVrefHiConfiguration(3, 3); + adcon1.setVrefHiConfiguration(5, 3); + + // Link the A/D converter to the Capture Compare Module + ccp2con.setADCON(&adcon0); +} + +void P16C74::create() +{ + P16C65::create(); + P16C74::create_sfr_map(); +} + +Processor * P16C74::construct(const char *name) +{ + P16C74 *p = new P16C74(name);; + + p->create(); + p->create_invalid_registers (); + + return p; +} + + +P16C74::P16C74(const char *_name, const char *desc) + : P16C65(_name, desc) , + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adres(this,"adres", "A2D Result") +{ + pir1_2_reg = new PIR1v2(this,"pir1","Peripheral Interrupt Register",&intcon_reg,&pie1); + pir2_2_reg = new PIR2v2(this,"pir2","Peripheral Interrupt Register",&intcon_reg,&pie2); + + delete pir1; + delete pir2; + pir1 = pir1_2_reg; + pir2 = pir2_2_reg; +} + +P16C74::~P16C74() +{ + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&adres); +} +//------------------------------------------------------------ + +void P16F74::create_sfr_map() +{ + add_sfr_register(pm_rd.get_reg_pmadr(), 0x10d); + add_sfr_register(pm_rd.get_reg_pmadrh(), 0x10f); + add_sfr_register(pm_rd.get_reg_pmdata(), 0x10c); + add_sfr_register(pm_rd.get_reg_pmdath(), 0x10e); + add_sfr_register(pm_rd.get_reg_pmcon1(), 0x18c); + + alias_file_registers(0x80,0x80,0x80); + alias_file_registers(0x01,0x01,0x100); + alias_file_registers(0x82,0x84,0x80); + alias_file_registers(0x06,0x06,0x100); + alias_file_registers(0x8a,0x8b,0x80); + alias_file_registers(0x100,0x100,0x80); + alias_file_registers(0x81,0x81,0x100); + alias_file_registers(0x102,0x104,0x80); + alias_file_registers(0x86,0x86,0x100); + alias_file_registers(0x10a,0x10b,0x80); + + alias_file_registers(0x20,0x7f,0x100); + alias_file_registers(0xa0,0xff,0x100); +} + +void P16F74::create() +{ + P16C74::create(); + + status->rp_mask = 0x60; // rp0 and rp1 are valid. + indf->base_address_mask1 = 0x80; // used for indirect accesses above 0x100 + indf->base_address_mask2 = 0x1ff; // used for indirect accesses above 0x100 + + P16F74::create_sfr_map(); +} + +Processor * P16F74::construct(const char *name) +{ + P16F74 *p = new P16F74(name); + + p->create(); + p->create_invalid_registers (); + + return p; +} + +P16F74::P16F74(const char *_name, const char *desc) + : P16C74(_name, desc), + pm_rd(this) +{ +} + +P16F74::~P16F74() +{ + remove_sfr_register(pm_rd.get_reg_pmadr()); + remove_sfr_register(pm_rd.get_reg_pmadrh()); + remove_sfr_register(pm_rd.get_reg_pmdata()); + remove_sfr_register(pm_rd.get_reg_pmdath()); + remove_sfr_register(pm_rd.get_reg_pmcon1()); +} diff --git a/src/gpsim/devices/p16x7x.h b/src/gpsim/devices/p16x7x.h new file mode 100644 index 0000000..90d2fb5 --- /dev/null +++ b/src/gpsim/devices/p16x7x.h @@ -0,0 +1,285 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __P16X7X_H__ +#define __P16X7X_H__ + + +#include "p16x6x.h" /* The '7x stuff is like '6x stuff with a/d converters */ +//RRR#include "pir.h" +//#include "a2dconverter.h" +#include "pm_rd.h" + +//--------------------------------------------------------- + +class P16C71 : public P16X8X +{ + public: + + ADCON0 adcon0; + ADCON1 adcon1; + sfr_register adres; + + virtual PROCESSOR_TYPE isa(){return _P16C71_;}; + + virtual uint program_memory_size() const { return 0x400; }; + virtual void create_sfr_map(); + + P16C71(const char *_name=0, const char *desc=0); + ~P16C71(); + + void create(); + static Processor *construct(const char *name); + +private: + // This is not a real PIR register, but only one that allows the A2D Interrupt + // flag be processed in manner similar to other processors. + class PIR_16C71; + PIR_16C71 *m_pir; +}; + +class P16x71x : public _14bit_processor +{ + public: + + INTCON_14_PIR intcon_reg; + IOC *m_ioc; + PicPortRegister *m_porta; + PicTrisRegister *m_trisa; + + PicPortGRegister *m_portb; + PicTrisRegister *m_trisb; + + + T1CON t1con; + PIR *pir1; + PIE pie1; + T2CON t2con; + PR2 pr2; + TMR2 tmr2; + TMRL tmr1l; + TMRH tmr1h; + CCPCON ccp1con; + CCPRL ccpr1l; + CCPRH ccpr1h; + PCON pcon; + PIR_SET_1 pir_set_def; + ADCON0 adcon0; + ADCON1 adcon1; + sfr_register adres; + + virtual void create_iopin_map(); + virtual void create_sfr_map(); + virtual void option_new_bits_6_7(uint bits); + + virtual PIR *get_pir1() { return (pir1); } + virtual PIR_SET *get_pir_set() { return (&pir_set_def); } + + P16x71x(const char *_name=0, const char *desc=0); + ~P16x71x(); +// static Processor *construct(const char *name){;} + + // virtual bool hasSSP() { return false; } +}; +class P16C712 : public P16x71x +{ + public: + + TRISCCP trisccp; + DATACCP dataccp; + + virtual PROCESSOR_TYPE isa(){return _P16C712_;}; + virtual uint program_memory_size() const { return 1024; }; + virtual uint register_memory_size () const { return 0x100; } + + + virtual void create_sfr_map(); + + + P16C712(const char *_name=0, const char *desc=0); + ~P16C712(); + void create(); + static Processor *construct(const char *name); + + virtual bool hasSSP() { return false; } +}; + +class P16C716 : public P16C712 +{ + public: + + virtual PROCESSOR_TYPE isa(){return _P16C716_;}; + + virtual uint program_memory_size() const { return 0x800; }; + + P16C716(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + +}; + +class P16F716 : public P16C712 +{ + public: + + virtual PROCESSOR_TYPE isa(){return _P16F716_;}; + + virtual uint program_memory_size() const { return 0x800; }; + + P16F716(const char *_name=0, const char *desc=0); + ~P16F716(); + static Processor *construct(const char *name); + virtual void create_sfr_map(); + virtual void create(); + + ECCPAS eccpas; + PWM1CON pwm1con; + +}; + +class P16C72 : public P16C62 +{ + public: + // XXX + // This pir1_2, pir2_2 stuff is not particularly pretty. It would be + // better to just tell C++ to redefine pir1 and pir2 and PIR1v2 and + // PIR2v2, but C++ only supports covariance in member function return + // values. + PIR1v2 *pir1_2_reg; + PIR2v2 *pir2_2_reg; + PIR_SET_2 pir_set_2_def; + ADCON0 adcon0; + ADCON1 adcon1; + sfr_register adres; + + virtual PROCESSOR_TYPE isa(){return _P16C72_;}; + + void create_sfr_map(); + virtual PIR *get_pir1() { return (pir1_2_reg); } + virtual PIR *get_pir2() { return (pir2_2_reg); } + virtual PIR_SET *get_pir_set() { return (&pir_set_2_def); } + + + P16C72(const char *_name=0, const char *desc=0); + ~P16C72(); + void create(); + static Processor *construct(const char *name); + +}; + +class P16C73 : public P16C63 +{ + public: + // XXX + // This pir1_2, pir2_2 stuff is not particularly pretty. It would be + // better to just tell C++ to redefine pir1 and pir2 and PIR1v2 and + // PIR2v2, but C++ only supports covariance in member function return + // values. + PIR1v2 *pir1_2_reg; + PIR2v2 *pir2_2_reg; + PIR_SET_2 pir_set_2_def; + ADCON0 adcon0; + ADCON1 adcon1; + sfr_register adres; + + virtual PROCESSOR_TYPE isa(){return _P16C73_;}; + + void create_sfr_map(); + virtual PIR *get_pir1() { return (pir1_2_reg); } + virtual PIR *get_pir2() { return (pir2_2_reg); } + virtual PIR_SET *get_pir_set() { return (&pir_set_2_def); } + + P16C73(const char *_name=0, const char *desc=0); + ~P16C73(); + void create(); + static Processor *construct(const char *name); + +}; + +class P16F73 : public P16C73 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F73_;}; + virtual uint register_memory_size () const { return 0x200;}; + + void create_sfr_map(); + P16F73(const char *_name=0, const char *desc=0); + ~P16F73(); + void create(); + static Processor *construct(const char *name); + +protected: + PM_RD pm_rd; +}; + +//--------------------------------------------------------- + +class P16C74 : public P16C65 // Not a typo, a 'c74 is more like a 'c65 then a 'c64! +{ + public: + // XXX + // This pir1_2, pir2_2 stuff is not particularly pretty. It would be + // better to just tell C++ to redefine pir1 and pir2 and PIR1v2 and + // PIR2v2, but C++ only supports covariance in member function return + // values. + PIR1v2 *pir1_2_reg; + PIR2v2 *pir2_2_reg; + PIR_SET_2 pir_set_2_def; + ADCON0 adcon0; + ADCON1 adcon1; + sfr_register adres; + + virtual PROCESSOR_TYPE isa(){return _P16C74_;}; + + void create_sfr_map(); + virtual PIR *get_pir1() { return (pir1_2_reg); } + virtual PIR *get_pir2() { return (pir2_2_reg); } + virtual PIR_SET *get_pir_set() { return (&pir_set_2_def); } + + virtual uint program_memory_size() const { return 0x1000; }; + + + P16C74(const char *_name=0, const char *desc=0); + ~P16C74(); + void create(); + static Processor *construct(const char *name); + +}; + +class P16F74 : public P16C74 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F74_;}; + virtual uint register_memory_size () const { return 0x200;}; + + void create_sfr_map(); + P16F74(const char *_name=0, const char *desc=0); + ~P16F74(); + void create(); + static Processor *construct(const char *name); + +protected: + PM_RD pm_rd; +}; + + +#endif + diff --git a/src/gpsim/devices/p16x8x.cc b/src/gpsim/devices/p16x8x.cc new file mode 100644 index 0000000..b334663 --- /dev/null +++ b/src/gpsim/devices/p16x8x.cc @@ -0,0 +1,229 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +// +// p16x8x +// +// This file supports: +// PIC16C84 +// PIC16CR84 +// PIC16F84 +// PIC16F83 +// PIC16CR83 +// + +#include +#include +#include + +#include "config.h" +#include "stimuli.h" +#include "eeprom.h" +#include "p16x8x.h" +#include "pic-ioports.h" +#include "packages.h" + +P16X8X::P16X8X(const char *_name, const char *desc) + : Pic14Bit(_name,desc) +{ + if(config_modes) + config_modes->valid_bits = ConfigMode::CM_FOSC0 | ConfigMode::CM_FOSC1 | + ConfigMode::CM_FOSC1x | ConfigMode::CM_WDTE | ConfigMode::CM_PWRTE; +} + +P16X8X::~P16X8X() +{ + delete_file_registers(0x0c, ram_top); + if (get_eeprom()) + { + remove_sfr_register(get_eeprom()->get_reg_eedata()); + remove_sfr_register(get_eeprom()->get_reg_eecon1()); + remove_sfr_register(get_eeprom()->get_reg_eeadr()); + remove_sfr_register(get_eeprom()->get_reg_eecon2()); + delete get_eeprom(); + } +} +void P16X8X::create_sfr_map() +{ + Pic14Bit::create_sfr_map(); + + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x08); + add_sfr_register(get_eeprom()->get_reg_eecon1(), 0x88, RegisterValue(0,0)); + + add_sfr_register(get_eeprom()->get_reg_eeadr(), 0x09); + add_sfr_register(get_eeprom()->get_reg_eecon2(), 0x89); +} + +//------------------------------------------------------------------- +void P16X8X::set_out_of_range_pm(uint address, uint value) +{ + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + get_eeprom()->change_rom(address - 0x2100, value); +} + +void P16X8X::create_iopin_map() +{ + package = new Package(18); + if(!package) return; + + // Now Create the package and place the I/O pins + + package->assign_pin(17, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin(18, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 1, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 3, m_porta->addPin(new IO_open_collector("porta4"),4)); + + package->assign_pin( 4, 0); + package->assign_pin( 5, 0); + package->assign_pin( 6, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin( 7, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin( 8, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin( 9, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(10, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(11, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(12, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(13, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + package->assign_pin(14, 0); + package->assign_pin(15, 0); + package->assign_pin(16, 0); + +} + + + + +void P16X8X::create(int _ram_top) +{ + EEPROM *e; + + ram_top = _ram_top; + create_iopin_map(); + + _14bit_processor::create(); + + e = new EEPROM(this); + e->initialize(EEPROM_SIZE); + + e->set_intcon(&intcon_reg); + + set_eeprom(e); + + add_file_registers(0x0c, ram_top, 0x80); + P16X8X::create_sfr_map(); + +} + +//======================================================================== +// +// Pic 16C84 +// + +Processor * P16C84::construct(const char *name) +{ + P16C84 *p = new P16C84(name); + + p->create(0x2f); + p->create_invalid_registers (); + + return p; +} + +P16C84::P16C84(const char *_name, const char *desc) + : P16X8X(_name,desc) +{ +} + +void P16C84::create(int ram_top) +{ + P16X8X::create(0x2f); + createMCLRPin(4); +} + +//======================================================================== +// +Processor * P16F84::construct(const char *name) +{ + P16F84 *p = new P16F84(name); + + p->create(0x4f); + p->create_invalid_registers (); + + return p; +} + +P16F84::P16F84(const char *_name, const char *desc) + : P16X8X(_name,desc) +{ +} + +void P16F84::create(int ram_top) +{ + P16X8X::create(0x4f); + + createMCLRPin(4); +} + +//======================================================================== +// +P16F83::P16F83(const char *_name, const char *desc) + : P16X8X(_name,desc) +{ +} + +Processor * P16F83::construct(const char *name) +{ + P16F83 *p = new P16F83(name);; + + p->create(0x2f); + p->create_invalid_registers (); + + return p; +} + +void P16F83::create(int ram_top) +{ + P16X8X::create(0x2f); + createMCLRPin(4); +} + +//======================================================================== +P16CR83::P16CR83(const char *_name, const char *desc) + : P16F83(_name,desc) +{ +} + +Processor * P16CR83::construct(const char *name) +{ + return 0; +} + +//======================================================================== +P16CR84::P16CR84(const char *_name, const char *desc) + : P16F84(_name,desc) +{ +} + +Processor * P16CR84::construct(const char *name) +{ + return 0; +} + diff --git a/src/gpsim/devices/p16x8x.h b/src/gpsim/devices/p16x8x.h new file mode 100644 index 0000000..85cf211 --- /dev/null +++ b/src/gpsim/devices/p16x8x.h @@ -0,0 +1,104 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __P16X8X_H__ +#define __P16X8X_H__ + +#include "14bit-processors.h" +#include "intcon.h" + +class P16X8X : public Pic14Bit +{ +public: + P16X8X(const char *_name=0, const char *desc=0); + ~P16X8X(); + virtual void create_sfr_map(); + virtual void set_out_of_range_pm(uint address, uint value); + virtual void create_iopin_map(); + virtual void create(int ram_top); + virtual uint register_memory_size () const { return 0x100; } + +protected: + uint ram_top; +}; + +class P16C84 : public P16X8X +{ +public: + + P16C84(const char *_name=0, const char *desc=0); + + virtual PROCESSOR_TYPE isa(){return _P16C84_;}; + virtual void create(int ram_top); + + virtual uint program_memory_size() const { return 0x400; } + static Processor *construct(const char *name); +}; + +class P16F84 : public P16X8X +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F84_;}; + + virtual void create(int ram_top); + virtual uint program_memory_size() const { return 0x400; }; + + P16F84(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); +}; + +class P16CR84 : public P16F84 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16CR84_;}; + + P16CR84(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); +}; + + + +class P16F83 : public P16X8X +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16F83_;}; + + virtual uint program_memory_size() const { return 0x200; }; + virtual void create(int ram_top); + + P16F83(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); +}; + +class P16CR83 : public P16F83 +{ +public: + + virtual PROCESSOR_TYPE isa(){return _P16CR83_;}; + + P16CR83(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); +}; + + +#endif diff --git a/src/gpsim/devices/p17c75x.cc b/src/gpsim/devices/p17c75x.cc new file mode 100644 index 0000000..e869c13 --- /dev/null +++ b/src/gpsim/devices/p17c75x.cc @@ -0,0 +1,602 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include +#include +#include + +#include "config.h" +#include "p17c75x.h" + +#if 0 +void _68pins::create_iopin_map(void) +{ + // ---- This is probably going to be moved: + porta = new PORTA; + portb = new PORTB; + portc = new PORTC; + portd = new PORTD; + porte = new PORTE; + portf = new PORTF; + portg = new PORTG; + + if(verbose) + cout << "Create i/o pin map\n"; + // Build the links between the I/O Ports and their tris registers. + porta->tris = &ddra; + + portb->tris = &ddrb; + ddrb.port = portb; + + portc->tris = &ddrc; + ddrc.port = portc; + + portd->tris = &ddrd; + ddrd.port = portd; + + porte->tris = &ddre; + ddre.port = porte; + + portf->tris = &ddrf; + ddrf.port = portf; + + portg->tris = &ddrg; + ddrg.port = portg; + + // And give them a more meaningful name. + ddrb.new_name("ddrb"); + ddrc.new_name("ddrc"); + ddrd.new_name("ddrd"); + ddre.new_name("ddre"); + ddrf.new_name("ddrf"); + ddrg.new_name("ddrg"); + + // Define the valid I/O pins. + porta->valid_iopins = 0x3f; + portb->valid_iopins = 0xff; + portc->valid_iopins = 0xff; + portd->valid_iopins = 0xff; + porte->valid_iopins = 0x0f; + portf->valid_iopins = 0xff; + portg->valid_iopins = 0xff; + + + // Now Create the package and place the I/O pins + + create_pkg(68); + + // Vdd and Vss pins + assign_pin(2, 0); + assign_pin(20, 0); + assign_pin(37, 0); + assign_pin(49, 0); + assign_pin(19, 0); + assign_pin(36, 0); + assign_pin(53, 0); + assign_pin(68, 0); + + // AVdd and AVss pins + assign_pin(29, 0); + assign_pin(30, 0); + + // NC pins + assign_pin(1, 0); + assign_pin(18, 0); + assign_pin(35, 0); + assign_pin(52, 0); + + // Test pin + assign_pin(17, 0); + + // Reset pin + assign_pin(16, 0); + + // Oscillator pins + assign_pin(50, 0); + assign_pin(51, 0); + + assign_pin(60, new IOPIN(porta, 0)); + assign_pin(44, new IOPIN(porta, 1)); + assign_pin(45, new IO_bi_directional_pu(porta, 2)); + assign_pin(46, new IO_bi_directional_pu(porta, 3)); + assign_pin(43, new IO_bi_directional(porta, 4)); + assign_pin(42, new IO_bi_directional(porta, 5)); + + assign_pin(59, new IO_bi_directional(portb, 0)); + assign_pin(58, new IO_bi_directional(portb, 1)); + assign_pin(54, new IO_bi_directional(portb, 2)); + assign_pin(57, new IO_bi_directional(portb, 3)); + assign_pin(56, new IO_bi_directional(portb, 4)); + assign_pin(55, new IO_bi_directional(portb, 5)); + assign_pin(47, new IO_bi_directional(portb, 6)); + assign_pin(48, new IO_bi_directional(portb, 7)); + + assign_pin(3, new IO_bi_directional(portc, 0)); + assign_pin(67, new IO_bi_directional(portc, 1)); + assign_pin(66, new IO_bi_directional(portc, 2)); + assign_pin(65, new IO_bi_directional(portc, 3)); + assign_pin(64, new IO_bi_directional(portc, 4)); + assign_pin(63, new IO_bi_directional(portc, 5)); + assign_pin(62, new IO_bi_directional(portc, 6)); + assign_pin(61, new IO_bi_directional(portc, 7)); + + assign_pin(11, new IO_bi_directional(portd, 0)); + assign_pin(10, new IO_bi_directional(portd, 1)); + assign_pin(9, new IO_bi_directional(portd, 2)); + assign_pin(8, new IO_bi_directional(portd, 3)); + assign_pin(7, new IO_bi_directional(portd, 4)); + assign_pin(6, new IO_bi_directional(portd, 5)); + assign_pin(5, new IO_bi_directional(portd, 6)); + assign_pin(4, new IO_bi_directional(portd, 7)); + + assign_pin(12, new IO_bi_directional(porte, 0)); + assign_pin(13, new IO_bi_directional(porte, 1)); + assign_pin(14, new IO_bi_directional(porte, 2)); + assign_pin(15, new IO_bi_directional(porte, 3)); + + assign_pin(28, new IO_bi_directional(portf, 0)); + assign_pin(27, new IO_bi_directional(portf, 1)); + assign_pin(26, new IO_bi_directional(portf, 2)); + assign_pin(25, new IO_bi_directional(portf, 3)); + assign_pin(24, new IO_bi_directional(portf, 4)); + assign_pin(23, new IO_bi_directional(portf, 5)); + assign_pin(22, new IO_bi_directional(portf, 6)); + assign_pin(21, new IO_bi_directional(portf, 7)); + + assign_pin(34, new IO_bi_directional(portg, 0)); + assign_pin(33, new IO_bi_directional(portg, 1)); + assign_pin(32, new IO_bi_directional(portg, 2)); + assign_pin(31, new IO_bi_directional(portg, 3)); + assign_pin(38, new IO_bi_directional(portg, 4)); + assign_pin(39, new IO_bi_directional(portg, 5)); + assign_pin(41, new IO_bi_directional(portg, 6)); + assign_pin(40, new IO_bi_directional(portg, 7)); + +} +#endif + + +//======================================================================== +// +// Pic 17C7xx +// + + +Processor * P17C7xx::construct(const char *name) +{ + + P17C7xx *p = new P17C7xx; + + cout << " 17c7xx construct\n"; + + p->create(0x1fff); + p->create_invalid_registers (); + + p->new_name("p17c7xx"); + return p; + +} + +P17C7xx::P17C7xx() + : cpusta(this,"cpusta","") +{ + //_16bit_processor::create(); + // create_iopins(iopin_map, num_of_iopins); + name_str = "p17c7xx"; +} + +void P17C7xx::create(int ram_top) +{ + cout << "p17c7xx create\n"; + + + create_iopin_map(); + + //_16bit_processor::create(); + + // FIXME - TSD the 17c7xx is derived from the 16bit_processor, + // but it can call the _16bit_processor::create member function + // (because it assumes the 16bit processor is an 18cxxx device) + + pic_processor::create(); + + fast_stack.init(this); + /* + ind0.init(this); + ind1.init(this); + ind2.init(this); + */ + tmr0l.initialize(); + intcon.initialize(); + + //usart.initialize(this); + //tbl.initialize(this); + //tmr0l.start(0); + + // create_iopin_map(); + // create_sfr_map(); + + add_file_registers(0x0, ram_top, 0); +} + +void P17C7xx::create_sfr_map() +{ +} + +//======================================================================== +// +Processor * P17C75x::construct(const char *name) +{ + P17C75x *p = new P17C75x; + + p->create(0x1fff); + p->create_invalid_registers (); + + p->new_name("p17c75x"); + return p; +} + +void P17C75x::create(int ram_top) +{ + P17C7xx::create(ram_top); + + cout << "p17c75x parent created\n"; + P17C75x::create_sfr_map(); + cout << "p17c75x sfr map created\n"; + cout << "p17c75x parent created\n"; +} + +P17C75x::P17C75x() +{ + //if(verbose) + cout << "17c75x constructor, type = " << isa() << '\n'; +} + +void P17C75x::create_sfr_map() +{ +#if 0 + if (verbose) + cout << "creating p17c75x common registers\n"; + + add_file_registers(0x01A, 0x01f, 0x100); + alias_file_registers(0x1A, 0x1f, 0x200); + alias_file_registers(0x1A, 0x1f, 0x300); + alias_file_registers(0x1A, 0x1f, 0x400); + alias_file_registers(0x1A, 0x1f, 0x500); + alias_file_registers(0x1A, 0x1f, 0x600); + alias_file_registers(0x1A, 0x1f, 0x700); + + add_file_registers(0x020, 0x0ff, 0); + add_file_registers(0x120, 0x1ff, 0); + add_file_registers(0x220, 0x2ff, 0); + add_file_registers(0x320, 0x3ff, 0); + + //Unbanked registers + add_sfr_register(&ind0.indf, 0x00, 0, "indf0"); + add_sfr_register(&ind0.fsrl, 0x01, 0, "fsr0"); // Indirect addressing + + add_sfr_register(&pcl, 0x02, 0, "pcl"); + add_sfr_register(&pclath, 0x03, 0, "pclath"); // Program counter + + add_sfr_register(&status, 0x04, 0xf0, "alusta"); // ALU status + // add_sfr_register(&t0sta, 0x05, 0, "t0sta"); // Timer0 Status + add_sfr_register(&cpusta, 0x06, 0x3C, "cpusta"); // CPU status + // add_sfr_register(&intsta, 0x07, 0, "intsta"); + add_sfr_register(&ind1.indf, 0x08, 0, "indf1"); + add_sfr_register(&ind1.fsrl, 0x09, 0, "fsr1"); + add_sfr_register(&W, 0x0a, 0, "wreg"); + // add_sfr_register(&tmr0l, 0x0b, 0, "tmr0l"); // Timer0 registers + // add_sfr_register(&tmr0h, 0x0c, 0, "tmr0h"); + // add_sfr_register(&tblptrl, 0x0d, 0, "tblptrl"); // Program memory table pointer + // add_sfr_register(&tblptrh, 0x0e, 0, "tblptrh"); + add_sfr_register(&bsr, 0x0f, 0, "bsr"); // Bank select register + + add_sfr_register(&prodl, 0x18, 0, "prodl"); // 16 bit product registers + add_sfr_register(&prodh, 0x19, 0, "prodh"); + alias_file_registers(0x18, 0x19, 0x100); + alias_file_registers(0x18, 0x19, 0x200); + alias_file_registers(0x18, 0x19, 0x300); + alias_file_registers(0x18, 0x19, 0x400); + alias_file_registers(0x18, 0x19, 0x500); + alias_file_registers(0x18, 0x19, 0x600); + alias_file_registers(0x18, 0x19, 0x700); + + // Bank 0 + add_sfr_register(porta, 0x10, 0, "porta"); // PortA bits + add_sfr_register(&ddrb, 0x11, 0xff, "ddrb"); // Data direction register of portA + add_sfr_register(portb, 0x12, 0, "portb"); + /* + add_sfr_register(&rcsta1, 0x13, 0, "rcsta1"); // Serial port 1 rec. status register + add_sfr_register(&rcreg1, 0x14, 0, "rcreg1"); // Serial port 1 receive register + add_sfr_register(&txsta1, 0x15, 0, "txsta1"); + add_sfr_register(&txreg1, 0x16, 0, "txreg1"); + add_sfr_register(&spbrg1, 0x17, 0, "spbrg1"); + */ + // Bank 1 + add_sfr_register(&ddrc, 0x110, 0xff, "ddrc"); + add_sfr_register(portc, 0x111, 0, "portc"); + add_sfr_register(&ddrd, 0x112, 0xff, "ddrd"); + add_sfr_register(portd, 0x113, 0, "portd"); + add_sfr_register(&ddre, 0x114, 0x0f, "ddre"); + add_sfr_register(porte, 0x115, 0, "porte"); + add_sfr_register(&pir1, 0x116, 0x02, "pir1"); + add_sfr_register(&pie1, 0x117, 0, "pie1"); + + // Bank 2 + /* + add_sfr_register(&tmr1, 0x210, 0, "tmr1"); + add_sfr_register(&tmr2, 0x211, 0, "tmr2"); + add_sfr_register(&tmr3l, 0x212, 0, "tmr3l"); + add_sfr_register(&tmr3h, 0x213, 0, "tmr3h"); + add_sfr_register(&pr1, 0x214, 0, "pr1"); // Timer1's period register + add_sfr_register(&pr2, 0x215, 0, "pr2"); // Timer2's period register + add_sfr_register(&pr3l, 0x216, 0, "pr3l"); // Timer3's period registers + add_sfr_register(&pr3h, 0x217, 0, "pr3h"); + + // Bank 3 + add_sfr_register(&pw1dcl, 0x310, 0, "pw1dcl"); + add_sfr_register(&pw2dcl, 0x311, 0, "pw2dcl"); + add_sfr_register(&pw1dch, 0x312, 0, "pw1dch"); + add_sfr_register(&pw2dch, 0x313, 0, "pw2dch"); + add_sfr_register(&ca2l, 0x314, 0, "ca2l"); // Capture2 registers + add_sfr_register(&ca2h, 0x315, 0, "ca2h"); + add_sfr_register(&tcon1, 0x316, 0, "tcon1"); + add_sfr_register(&tcon2, 0x317, 0, "tcon2"); + */ + // Bank 4 + add_sfr_register(&pir2, 0x410, 0, "pir2"); + add_sfr_register(&pie2, 0x411, 0, "pie2"); + //add_sfr_register(& , 0x412); + /* + add_sfr_register(&rcsta2, 0x413, 0, "rcsta2"); + add_sfr_register(&rcreg2, 0x414, 0, "rcreg2"); + add_sfr_register(&txsta2, 0x415, 0x02, "txsta2"); + add_sfr_register(&txreg2, 0x416, 0, "txreg2"); + add_sfr_register(&spbrg2, 0x417, 0, "spbrg2"); + */ + // Bank 5 + add_sfr_register(&ddrf, 0x510, 0xff, "ddrf"); + add_sfr_register(portf, 0x511, 0, "portf"); + add_sfr_register(&ddrg, 0x512, 0xff, "ddrg"); + add_sfr_register(portg, 0x513, 0, "portg"); + /* + add_sfr_register(&adcon0, 0x514, 0, "adcon0"); + add_sfr_register(&adcon1, 0x515, 0, "adcon1"); + add_sfr_register(&adresl, 0x516, 0, "adresl"); + add_sfr_register(&adresh, 0x517, 0, "adresh"); + */ + // Bank 6 + /* + add_sfr_register(&sspadd, 0x610, 0, "sspadd"); // Synchronous serial port registers + add_sfr_register(&sspcon1, 0x611, 0, "sspcon1"); + add_sfr_register(&sspcon2, 0x612, 0, "sspcon2"); + add_sfr_register(&sspstat, 0x613, 0, "sspstat"); + add_sfr_register(&sspbuf, 0x614, 0, "sspbuf"); + */ + //add_sfr_register(& 0x615); + //add_sfr_register(& 0x616); + //add_sfr_register(& 0x617); + + // Bank 7 + /* + add_sfr_register(&pw3dcl, 0x710, 0, "pw3dcl"); + add_sfr_register(&pw3dch, 0x711, 0, "pw3dch"); + add_sfr_register(&ca3l, 0x712, 0, "ca3l"); + add_sfr_register(&ca3h, 0x713, 0, "ca3h"); + add_sfr_register(&ca4l, 0x714, 0, "ca4l"); + add_sfr_register(&ca4h, 0x715, 0, "ca4h"); + add_sfr_register(&tcon3, 0x716, 0, "tcon3"); + //add_sfr_register(& 0x717); + */ + // Initialize all of the register cross linkages + + // All of the status bits on the 16bit core are writable + status.write_mask = 0xff; + +#endif +} + +//======================================================================== +// +Processor * P17C756::construct(const char *name) +{ + P17C756 *p = new P17C756; + + cout << " 17c756 construct\n"; + + p->P17C7xx::create(0x1fff); + p->create_invalid_registers (); + + p->new_name("p17c756"); + return p; +} + +void P17C756::create() +{ + + create_iopin_map(); + + + P17C756::create_sfr_map(); + // create_iopin_map(&iopin_map, &num_of_iopins); + + _16bit_processor::create(); + + // create_iopins(iopin_map, num_of_iopins); + +} + +void P17C756::create_sfr_map() +{ + + cout << "create_sfr_map P17C756\n"; +} + +P17C756::P17C756() +{ +} + +//------------------------------------------------------------------------ +// +Processor * P17C756A::construct(const char *name) +{ + + P17C756A *p = new P17C756A; + + cout << " 17c756a construct\n"; + + p->P17C7xx::create(0x1fff); + //p->create_invalid_registers (); + + p->new_name("p17c756a"); + return p; +} + +P17C756A::P17C756A() +{ +} + +void P17C756A::create() +{ + create_iopin_map(); + + P17C756A::create_sfr_map(); + // create_iopin_map(&iopin_map, &num_of_iopins); + + _16bit_processor::create(); + + // create_iopins(iopin_map, num_of_iopins); +} + +void P17C756A::create_sfr_map() +{ +} + +//======================================================================== +// +Processor * P17C752::construct(const char *name) +{ + P17C752 *p = new P17C752; + + cout << " 17c752 construct\n"; + + p->P17C7xx::create(0x1fff); + p->create_invalid_registers (); + + p->new_name("p17c752"); + return p; +} + +void P17C752::create() +{ + + create_iopin_map(); + + + P17C752::create_sfr_map(); + // create_iopin_map(&iopin_map, &num_of_iopins); + + _16bit_processor::create(); + + // create_iopins(iopin_map, num_of_iopins); + +} + +void P17C752::create_sfr_map() +{ + + cout << "create_sfr_map P17C752\n"; +} + +P17C752::P17C752() +{ +} + +//======================================================================== +// +Processor * P17C762::construct(const char *name) +{ + P17C762 *p = new P17C762; + + p->P17C7xx::create(0x1fff); + p->create_invalid_registers (); + + p->new_name("p17c762"); + return p; +} + +void P17C762::create() +{ + create_iopin_map(); + + P17C762::create_sfr_map(); + // create_iopin_map(&iopin_map, &num_of_iopins); + + _16bit_processor::create(); + + // create_iopins(iopin_map, num_of_iopins); +} + +void P17C762::create_sfr_map() +{ + + cout << "create_sfr_map P17C762\n"; +} + +P17C762::P17C762() +{ +} + +//======================================================================== +// +Processor * P17C766::construct(const char *name) +{ + P17C766 *p = new P17C766; + + p->P17C7xx::create(0x1fff); + p->create_invalid_registers (); + + p->new_name("p17c766"); + return p; +} + +void P17C766::create() +{ + create_iopin_map(); + + P17C766::create_sfr_map(); + // create_iopin_map(&iopin_map, &num_of_iopins); + + _16bit_processor::create(); + + // create_iopins(iopin_map, num_of_iopins); +} + +void P17C766::create_sfr_map() +{ +} + +P17C766::P17C766() +{ +} + + + diff --git a/src/gpsim/devices/p17c75x.h b/src/gpsim/devices/p17c75x.h new file mode 100644 index 0000000..f07dfa5 --- /dev/null +++ b/src/gpsim/devices/p17c75x.h @@ -0,0 +1,133 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __P17C75X_H__ +#define __P17C75X_H__ + +#include "16bit-processors.h" +#include "p16x6x.h" + + +class P17C7xx : public _16bit_processor +{ + public: + + CPUSTA cpusta; + + P17C7xx(); + + static Processor *construct(const char *name); + virtual PROCESSOR_TYPE isa(){return _P17C7xx_;}; + + virtual void create(int ram_top); + + virtual void create_sfr_map(); + virtual uint program_memory_size() const { return 0x400; }; +}; + +class P17C75x : public P17C7xx +{ + public: + + P17C75x(); + static Processor *construct(const char *name); + virtual void create(int ram_top); + virtual void create_sfr_map(); + + virtual PROCESSOR_TYPE isa(){return _P17C75x_;}; + + virtual uint program_memory_size() const { return 0x4000; }; +}; + +class P17C752 : public P17C75x +{ + public: + virtual PROCESSOR_TYPE isa(){return _P17C752_;}; + P17C752(); + static Processor *construct(const char *name); + void create(); + + void create_sfr_map(); + + virtual uint program_memory_size() const { return 0x2000; }; + virtual uint register_memory_size() const { return 0x800; }; +}; + +class P17C756 : public P17C75x +{ + public: + + virtual PROCESSOR_TYPE isa(){return _P17C756_;}; + void create_sfr_map(); + + P17C756(); + static Processor *construct(const char *name); + void create(); + + virtual uint program_memory_size() const { return 0x4000; }; + virtual uint register_memory_size() const { return 0x800; }; +}; + +class P17C756A : public P17C75x +{ + public: + + virtual PROCESSOR_TYPE isa(){return _P17C756A_;}; + void create_sfr_map(); + + P17C756A(); + static Processor *construct(const char *name); + void create(); + + virtual uint program_memory_size() const { return 0x4000; }; + virtual uint register_memory_size() const { return 0x800; }; +}; + +class P17C762 : public P17C75x +{ + public: + + virtual PROCESSOR_TYPE isa(){return _P17C762_;}; + void create_sfr_map(); + + P17C762(); + static Processor *construct(const char *name); + void create(); + + virtual uint program_memory_size() const { return 0x4000; }; + virtual uint register_memory_size() const { return 0x800; }; +}; + +class P17C766 : public P17C75x +{ + public: + + virtual PROCESSOR_TYPE isa(){return _P17C766_;}; + void create_sfr_map(); + + P17C766(); + static Processor *construct(const char *name); + void create(); + + virtual uint program_memory_size() const { return 0x4000; }; + virtual uint register_memory_size() const { return 0x800; }; +}; + +#endif diff --git a/src/gpsim/devices/p18fk.cc b/src/gpsim/devices/p18fk.cc new file mode 100644 index 0000000..6378ebc --- /dev/null +++ b/src/gpsim/devices/p18fk.cc @@ -0,0 +1,1244 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + Copyright (C) 2010 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include +#include +#include + +#include "config.h" +#include "p18x.h" +#include "p18fk.h" +#include "pic-ioports.h" +#include "packages.h" +#include "stimuli.h" + +/* Config Word defines */ +#define MCLRE (1<<7) +#define P2BMX (1<<5) +#define T3CMX (1<<4) +#define HFOFST (1<<3) +#define LPT1OSC (1<<2) +#define CCP3MX (1<<2) +#define PBADEN (1<<1) +#define CCP2MX (1<<0) + + +//------------------------------------------------------------------------ +// +// P18F14K22 +// + +//------------------------------------------------------------------------ +void P18F14K22::create_iopin_map() +{ + package = new Package(20); + + if(!package) + return; + + // Build the links between the I/O Ports and their tris registers. + + package->assign_pin( 1, 0); // Vdd + + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta5"),5)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional("porta4"),4)); + package->assign_pin( 4, m_porta->addPin(new IO_open_collector("porta3"),3)); // %%%FIXME - is this O/C ? + + package->assign_pin( 5, m_portc->addPin(new IO_bi_directional("portc5"),3)); + package->assign_pin( 6, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin( 7, m_portc->addPin(new IO_bi_directional("portc3"),3)); + package->assign_pin( 8, m_portc->addPin(new IO_bi_directional("portc6"),6)); + package->assign_pin( 9, m_portc->addPin(new IO_bi_directional("portc7"),7)); + + package->assign_pin(10, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + package->assign_pin(11, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(12, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(13, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + + package->assign_pin(14, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin(15, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(16, m_portc->addPin(new IO_bi_directional("portc0"),0)); + + package->assign_pin(17, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin(18, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin(19, m_porta->addPin(new IO_bi_directional("porta0"),0)); + + package->assign_pin(20, 0); // Vss + + + tmr1l.setIOpin(&(*m_porta)[5]); + ssp.initialize(&pir_set_def, // PIR + &(*m_portb)[6], // SCK + &(*m_portc)[6], // SS + &(*m_portc)[7], // SDO + &(*m_portb)[4], // SDI + m_trisb, // i2c tris port + SSP_TYPE_MSSP + ); +} + + +P18F14K22::P18F14K22(const char *_name, const char *desc) + : _16bit_processor(_name,desc), + adcon0(this, "adcon0", "A2D control register 0"), + adcon1(this, "adcon1", "A2D control register 1"), + adcon2(this, "adcon2", "A2D control register 2"), + vrefcon0(this, "vrefcon0", "Fixed Voltage Reference Control Register"), + vrefcon1(this, "vrefcon1", "Voltage Reference Control Register 0", 0xed), + vrefcon2(this, "vrefcon2", "Voltage Reference Control Register 1",0x1f, &vrefcon1), + eccp1as(this, "eccp1as", "ECCP 1 Auto-Shutdown Control Register"), + pwm1con(this, "pwm1con", "Enhanced PWM 1 Control Register"), + osctune(this, "osctune", "OSC Tune"), + comparator(this), + ansela(this, "ansel", "Analog Select Register"), + anselb(this, "anselh", "Analog Select Register High"), + slrcon(this, "slrcon", "Slew Rate Control Register", 0x07), + ccptmrs(this), + pstrcon(this, "pstrcon", "PWM Steering Control Register"), + sr_module(this), + ssp1(this), + osccon2(this, "osccon2", "Oscillator Control Register 2") +{ +// delete pir2; +// pir2 = (PIR2v2 *)(new PIR2v4(this, "pir2" , "Peripheral Interrupt Register",0,0 )); + wpua = new WPU(this, "wpua", "Weak Pull-Up Porta Register", m_porta, 0x3f); + wpub = new WPU(this, "wpub", "Weak Pull-Up Portb Register", m_portb, 0xf0); + ioca = new IOC(this, "ioca", "Interrupt-On-Change Porta Control Register", 0xf0); + iocb = new IOC(this, "iocb", "Interrupt-On-Change Portb Control Register", 0xf0); + + // By default TMR2 controls deals with all ccp units until + // changed by ccptmrsx registers +// ccptmrs.set_tmr246(&tmr2, &tmr4, &tmr6); +// ccptmrs.set_ccp(&ccp1con, &ccp2con, &ccp3con, &ccp4con, &ccp5con); + comparator.cmxcon0[0] = new CMxCON0_V2(this, "cm1con0", + " Comparator C1 Control Register 0", 0, &comparator); + comparator.cmxcon0[1] = new CMxCON0_V2(this, "cm2con0", + " Comparator C2 Control Register 0", 1, &comparator); + comparator.cmxcon1[0] = new CM2CON1_V2(this, "cm2con1", + " Comparator Control Register 1", &comparator); + comparator.cmxcon1[1] = comparator.cmxcon1[0]; +} + + +P18F14K22::~P18F14K22() +{ + remove_sfr_register(comparator.cmxcon0[0]); + remove_sfr_register(comparator.cmxcon0[1]); + remove_sfr_register(comparator.cmxcon1[0]); + remove_sfr_register(&osccon2); + + remove_sfr_register(&usart.spbrgh); + remove_sfr_register(&usart.baudcon); + remove_sfr_register(&osctune); + remove_sfr_register(&tmr2); + remove_sfr_register(&pr2); + remove_sfr_register(&t2con); + remove_sfr_register(&pwm1con); + remove_sfr_register(&eccp1as); + remove_sfr_register(&ccpr2h); + remove_sfr_register(&ccpr2l); + remove_sfr_register(&ccp2con); + remove_sfr_register(osccon); + remove_sfr_register(&ansela); + remove_sfr_register(&anselb); + delete_sfr_register(wpub); + delete_sfr_register(iocb); + delete_sfr_register(wpua); + delete_sfr_register(ioca); + remove_sfr_register(&slrcon); + remove_sfr_register(&ccptmrs.ccptmrs1); + remove_sfr_register(&ccptmrs.ccptmrs0); + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&adcon2); + remove_sfr_register(&vrefcon0); + remove_sfr_register(&vrefcon1); + remove_sfr_register(&vrefcon2); + remove_sfr_register(&sr_module.srcon0); + remove_sfr_register(&sr_module.srcon1); + remove_sfr_register(&pstrcon); + remove_sfr_register(&ssp1.sspbuf); + remove_sfr_register(&ssp1.sspadd); + remove_sfr_register(ssp1.sspmsk); + remove_sfr_register(&ssp1.sspstat); + remove_sfr_register(&ssp1.sspcon); + remove_sfr_register(&ssp1.sspcon2); + remove_sfr_register(&ssp1.ssp1con3); + remove_sfr_register(&osccon2); +} + + +void P18F14K22::create() +{ + RegisterValue porv(0,0); + RegisterValue porvh(0xff,0); + + tbl.initialize ( eeprom_memory_size(), 32, 4, CONFIG1L, false ); + tbl.set_intcon(&intcon); + set_eeprom_pir(&tbl); + tbl.set_pir(pir2); + tbl.eecon1.set_valid_bits(0xbf); + + create_iopin_map(); + + _16bit_processor::create(); + remove_sfr_register(&lvdcon); + + set_osc_pin_Number(0, 2, &(*m_porta)[5]); + set_osc_pin_Number(1, 3, &(*m_porta)[4]); + + // @todo : some of these may not be right + m_configMemory->addConfigWord(CONFIG1L-CONFIG1L,new ConfigWord("CONFIG1L", 0x00, "Configuration Register 1 low", this, CONFIG1L)); + m_configMemory->addConfigWord(CONFIG1H-CONFIG1L,new Config1H_4bits(this, CONFIG1H, 0x25)); + m_configMemory->addConfigWord(CONFIG3H-CONFIG1L,new Config3H(this, CONFIG3H, 0x88)); + + +// add_sfr_register( osccon, 0xfd3, RegisterValue(0x30,0), "osccon"); + osccon->por_value = RegisterValue(0x30,0); + + add_sfr_register(&adcon0, 0xfc2, porv, "adcon0"); + add_sfr_register(&adcon1, 0xfc1, porv, "adcon1"); + add_sfr_register(&adcon2, 0xfc0, porv, "adcon2"); + + add_sfr_register(&pstrcon, 0xfb9, RegisterValue(0x01,0)); + add_sfr_register(&pwm1con, 0xfb7, porv); + add_sfr_register(&eccp1as, 0xfb6, porv); + + add_sfr_register(comparator.cmxcon0[0], 0xf6d, RegisterValue(0x08,0), "cm1con0"); + add_sfr_register(comparator.cmxcon0[1], 0xf6b, RegisterValue(0x08,0), "cm2con0"); + add_sfr_register(comparator.cmxcon1[0], 0xf6c, porv, "cm2con1"); + + + add_sfr_register(ioca, 0xf79, porvh); + add_sfr_register(wpua, 0xf77, porvh); + add_sfr_register(iocb, 0xf7a, porvh); + add_sfr_register(wpub, 0xf78, porvh); + add_sfr_register(&slrcon, 0xf76, porvh); + + add_sfr_register(&sr_module.srcon0, 0xf68, porv); + add_sfr_register(&sr_module.srcon1, 0xf69, porv); + + add_sfr_register(&vrefcon0, 0xfba, RegisterValue(0x10,0)); + add_sfr_register(&vrefcon1, 0xfbb, porv); + add_sfr_register(&vrefcon2, 0xfbc, porv); + + add_sfr_register(&anselb, 0xf7f, RegisterValue(0x0f,0)); + add_sfr_register(&ansela, 0xf7e, RegisterValue(0xff,0)); + + add_sfr_register(ssp1.sspmsk, 0xf6f, RegisterValue(0xff,0),"sspmask"); + + eccp1as.setBitMask(0xfc); + add_sfr_register(&osccon2, 0xfd2, RegisterValue(0x04,0), "osccon2"); + ((OSCCON_HS *)osccon)->osccon2 = &osccon2; + + // ECCP shutdown trigger + eccp1as.setIOpin(0, 0, &(*m_portb)[0]); + eccp1as.link_registers(&pwm1con, &ccp1con); + //RRR comparator.cmcon.set_eccpas(&eccp1as); + ccp1con.setBitMask(0xff); + ccp1con.setCrosslinks(&ccpr1l, &pir1, PIR1v2::CCP1IF, &tmr2, &eccp1as); + ccp1con.pwm1con = &pwm1con; + ccp1con.pstrcon = &pstrcon; + ccp1con.setIOpin(&((*m_portc)[5]), &((*m_portc)[4]), &((*m_portc)[3]), &((*m_portc)[2])); + pwm1con.setBitMask(0x80); + + adcon0.setAdresLow(&adresl); + adcon0.setAdres(&adresh); + adcon0.setAdcon1(&adcon1); + adcon0.setAdcon2(&adcon2); + adcon0.setIntcon(&intcon); + adcon0.setPir(&pir1); + adcon0.setChannel_Mask(0x0f); // upto 16 channels + adcon0.setA2DBits(10); + adcon1.setNumberOfChannels(12); + adcon1.setVrefHiChannel(3); + adcon1.setVrefLoChannel(2); + adcon1.setAdcon0(&adcon0); // VCFG0, VCFG1 in adcon0 + vrefcon0.set_adcon1(&adcon1); + vrefcon1.set_adcon1(&adcon1); + vrefcon0.set_daccon0(&vrefcon1); + + + ansela.setIOPin(0, &(*m_porta)[0], &adcon1); + ansela.setIOPin(1, &(*m_porta)[1], &adcon1); + ansela.setIOPin(2, &(*m_porta)[2], &adcon1); + ansela.setIOPin(3, &(*m_porta)[4], &adcon1); + ansela.setIOPin(4, &(*m_portc)[0], &adcon1); + ansela.setIOPin(5, &(*m_portc)[1], &adcon1); + ansela.setIOPin(6, &(*m_portc)[2], &adcon1); + ansela.setIOPin(7, &(*m_portc)[3], &adcon1); + anselb.setIOPin(8, &(*m_portc)[6], &adcon1); + anselb.setIOPin(9, &(*m_portc)[7], &adcon1); + anselb.setIOPin(10, &(*m_portb)[4], &adcon1); + anselb.setIOPin(11, &(*m_portb)[5], &adcon1); +} + + +OSCCON * P18F14K22::getOSCCON(void) +{ + OSCCON_HS * new_oc = new OSCCON_HS(this, "osccon", "OSC Control"); + new_oc->minValPLL = 6; // This family doesn't allow PLL at 4MHz + return new_oc; +} + + +void P18F14K22::set_config3h(int64_t value) +{ + (value & MCLRE) ? assignMCLRPin(4) : unassignMCLRPin(); +} + + +// Set the oscillator mode from the CONFIG1H value +void P18F14K22::osc_mode(uint value) +{ + uint mode = value & (FOSC3 | FOSC2 | FOSC1 | FOSC0); + uint pin_Number0 = get_osc_pin_Number(0); + uint pin_Number1 = get_osc_pin_Number(1); + bool pllen = value & PLLCFG; + + if (mode == 0x8 || mode == 0x9) + set_int_osc(true); + else + set_int_osc(false); + + if (pin_Number1 < 253) + { + switch(mode) + { + case 0xf: // external RC CLKOUT RA6 + case 0xe: + case 0xc: + case 0xa: + case 0x9: + case 0x6: + case 0x4: + // CLKO = OSC2 + cout << "CLKO not simulated\n"; + set_clk_pin(pin_Number1, get_osc_PinMonitor(1) , "CLKO", + false, m_porta, m_trisa, m_lata); + break; + + default: + clr_clk_pin(pin_Number1, get_osc_PinMonitor(1), + m_porta, m_trisa, m_lata); + break; + } + } + set_pplx4_osc(pllen); + if (pin_Number0 < 253) + { + if ( mode != 0x9 && mode != 0x8 ) // not internal OSC, set OSC1 + { + set_clk_pin(pin_Number0, get_osc_PinMonitor(0) , "OSC1", + true, m_porta, m_trisa, m_lata); + } + else + { + clr_clk_pin(pin_Number0, get_osc_PinMonitor(0), + m_porta, m_trisa, m_lata); + } + } + if (pin_Number1 < 253) + { + if ( mode < 4 ) + { + set_clk_pin(pin_Number1, get_osc_PinMonitor(1) , "OSC2", + true, m_porta, m_trisa, m_lata); + } + else + { + clr_clk_pin(pin_Number1, get_osc_PinMonitor(1), + m_porta, m_trisa, m_lata); + } + } + +} + + +Processor * P18F14K22::construct(const char *name) +{ + P18F14K22 *p = new P18F14K22(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + + +void P18F14K22::create_sfr_map() +{ + _16bit_processor::create_sfr_map(); + + RegisterValue porv(0,0); + +// remove_sfr_register(t3con); +// add_sfr_register(t3con2, 0xfb1,porv); + add_sfr_register(&osctune, 0xf9b,porv); + osccon->set_osctune(&osctune); + osctune.set_osccon(osccon); + osccon2.set_osccon(osccon); + + + comparator.cmxcon1[0]->set_OUTpin(&(*m_porta)[2], &(*m_porta)[4]); + comparator.cmxcon1[0]->set_INpinNeg(&(*m_porta)[1], &(*m_portc)[1], + &(*m_portc)[2],&(*m_portc)[3]); + comparator.cmxcon1[0]->set_INpinPos(&(*m_porta)[0], &(*m_portc)[0]); + comparator.cmxcon1[0]->setBitMask(0x3f); + comparator.cmxcon0[0]->setBitMask(0xbf); + comparator.cmxcon0[0]->setIntSrc(new InterruptSource(pir2, PIR2v2::C1IF)); + comparator.cmxcon0[1]->setBitMask(0xbf); + comparator.cmxcon0[1]->setIntSrc(new InterruptSource(pir2, PIR2v2::C2IF)); + vrefcon0.set_cmModule(&comparator); +// comparator.assign_t1gcon(&t1gcon, &t3gcon, &t5gcon); +// comparator.assign_sr_module(&sr_module); +// comparator.assign_eccpsas(&eccp1as, &eccp2as, &eccp3as); + sr_module.srcon1.set_ValidBits(0xff); + sr_module.setPins(&(*m_portb)[0], &(*m_porta)[2], &(*m_portc)[4]); + + vrefcon1.set_cmModule(&comparator); + vrefcon1.setDACOUT(&(*m_porta)[2]); + + + //1 usart16.initialize_16(this,&pir_set_def,&portc); + add_sfr_register(&usart.spbrgh, 0xfb0,porv,"spbrgh"); + add_sfr_register(&usart.baudcon, 0xfb8,porv,"baudcon"); + usart.set_eusart(true); + usart.set_TXpin(&(*m_portb)[7]); + usart.set_RXpin(&(*m_portb)[5]); + init_pir2(pir2, PIR2v4::TMR3IF); + tmr3l.setIOpin(&(*m_portc)[0]); + + tmr2.ssp_module[0] = &ssp1; + + ssp1.initialize( + 0, // PIR + &(*m_portc)[3], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[5], // SDO + &(*m_portc)[4], // SDI + m_trisc, // i2c tris port + SSP_TYPE_MSSP1 + ); + ssp1.mk_ssp_int(&pir1, PIR1v1::SSPIF); // SSP1IF + ssp1.mk_bcl_int(pir2, PIR2v2::BCLIF); // BCL1IF +} + + + + + +//------------------------------------------------------------------------ +// +// P18F26K22 +// + +//------------------------------------------------------------------------ +void P18F26K22::create_iopin_map() +{ + package = new Package(28); + + if(!package) + return; + + // Build the links between the I/O Ports and their tris registers. + + package->assign_pin( 1, m_porte->addPin(new IO_bi_directional("porte3"),3)); + + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 4, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 5, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 6, m_porta->addPin(new IO_open_collector("porta4"),4)); // %%%FIXME - is this O/C ? + package->assign_pin( 7, m_porta->addPin(new IO_bi_directional("porta5"),5)); + + + + package->assign_pin(8, 0); // Vss + package->assign_pin(9, m_porta->addPin(new IO_bi_directional("porta7"),7)); // OSC1 + + package->assign_pin(10, m_porta->addPin(new IO_bi_directional("porta6"),6)); + + package->assign_pin(11, m_portc->addPin(new IO_bi_directional("portc0"),0)); + package->assign_pin(12, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(13, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin(14, m_portc->addPin(new IO_bi_directional("portc3"),3)); + package->assign_pin(15, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin(16, m_portc->addPin(new IO_bi_directional("portc5"),5)); + package->assign_pin(17, m_portc->addPin(new IO_bi_directional("portc6"),6)); + package->assign_pin(18, m_portc->addPin(new IO_bi_directional("portc7"),7)); + + package->assign_pin(19, 0); // Vss + package->assign_pin(20, 0); // Vdd + + package->assign_pin(21, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin(22, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin(23, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin(24, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(25, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(26, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(27, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(28, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + + tmr1l.setIOpin(&(*m_portc)[0]); + ssp.initialize(&pir_set_def, // PIR + &(*m_portc)[3], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[5], // SDO + &(*m_portc)[4], // SDI + m_trisc, // i2c tris port + SSP_TYPE_MSSP + ); + + //1portc.usart = &usart16; +} + +P18F26K22::P18F26K22(const char *_name, const char *desc) + : _16bit_processor(_name,desc), + adcon0(this, "adcon0", "A2D control register 0"), + adcon1(this, "adcon1", "A2D control register 1"), + adcon2(this, "adcon2", "A2D control register 2"), + vrefcon0(this, "vrefcon0", "Fixed Voltage Reference Control Register"), + vrefcon1(this, "vrefcon1", "Voltage Reference Control Register 0", 0xed), + vrefcon2(this, "vrefcon2", "Voltage Reference Control Register 1",0x1f, &vrefcon1), + eccp1as(this, "eccp1as", "ECCP 1 Auto-Shutdown Control Register"), + eccp2as(this, "eccp2as", "ECCP 2 Auto-Shutdown Control Register"), + eccp3as(this, "eccp3as", "ECCP 3 Auto-Shutdown Control Register"), + pwm1con(this, "pwm1con", "Enhanced PWM 1 Control Register"), + pwm2con(this, "pwm2con", "Enhanced PWM 2 Control Register"), + pwm3con(this, "pwm3con", "Enhanced PWM 3 Control Register"), + osctune(this, "osctune", "OSC Tune"), + t1gcon(this, "t1gcon", "Timer 1 Gate Control Register"), + t3gcon(this, "t3gcon", "Timer 3 Gate Control Register"), + tmr5l(this, "tmr5l", "TMR5 Low "), + tmr5h(this, "tmr5h", "TMR5 High"), + t5gcon(this, "t5gcon", "Timer 5 Gate Control Register"), + t4con(this, "t4con", "TMR4 Control"), + pr4(this, "pr4", "TMR4 Period Register"), + tmr4(this, "tmr4", "TMR4 Register"), + t6con(this, "t6con", "TMR6 Control"), + pr6(this, "pr6", "TMR6 Period Register"), + tmr6(this, "tmr6", "TMR6 Register"), + pir3(this,"pir3","Peripheral Interrupt Register",0,0), + pie3(this, "pie3", "Peripheral Interrupt Enable"), + pir4(this,"pir4","Peripheral Interrupt Register 4",0,0), + pie4(this, "pie4", "Peripheral Interrupt Enable 4"), + pir5(this,"pir5","Peripheral Interrupt Register 5",0,0), + pie5(this, "pie5", "Peripheral Interrupt Enable 5"), + ipr3(this, "ipr3", "Interrupt Priorities 3"), + ipr4(this, "ipr4", "Interrupt Priorities 4"), + ipr5(this, "ipr5", "Interrupt Priorities 5"), + ccp3con(this, "ccp3con", "Enhanced Capture Compare Control"), + ccpr3l(this, "ccpr3l", "Capture Compare 3 Low"), + ccpr3h(this, "ccpr3h", "Capture Compare 3 High"), + ccp4con(this, "ccp4con", "Capture Compare Control"), + ccpr4l(this, "ccpr4l", "Capture Compare 4 Low"), + ccpr4h(this, "ccpr4h", "Capture Compare 4 High"), + ccp5con(this, "ccp5con", "Capture Compare Control"), + ccpr5l(this, "ccpr5l", "Capture Compare 5 Low"), + ccpr5h(this, "ccpr5h", "Capture Compare 5 High"), + usart2(this), + comparator(this), + pmd0(this, "pmd0", "Peripheral Module Disable 0"), + pmd1(this, "pmd1", "Peripheral Module Disable 1"), + pmd2(this, "pmd2", "Peripheral Module Disable 2"), + ansela(this, "ansela", "PortA Analog Select Register"), + anselb(this, "anselb", "PortB Analog Select Register"), + anselc(this, "anselc", "PortC Analog Select Register"), + slrcon(this, "slrcon", "Slew Rate Control Register", 0x1f), + ccptmrs(this), + pstr1con(this, "pstr1con", "PWM Steering Control Register 1"), + pstr2con(this, "pstr2con", "PWM Steering Control Register 2"), + pstr3con(this, "pstr3con", "PWM Steering Control Register 3"), + sr_module(this), + ssp1(this), + ssp2(this), + ctmu(this), + hlvdcon(this, "hlvdcon", "High/Low-Voltage Detect Register"), + osccon2(this, "osccon2", "Oscillator Control Register 2") + +{ + delete pir2; + pir2 = (PIR2v2 *)(new PIR2v4(this, "pir2" , "Peripheral Interrupt Register",0,0 )); + wpub = new WPU(this, "wpub", "Weak Pull-Up Portb Register", m_portb, 0xff); + iocb = new IOC(this, "iocb", "Interrupt-On-Change Portb Control Register", 0xf0); + m_porte = new PicPortRegister(this,"porte","",8,0xFF); + m_trise = new PicTrisRegister(this,"trise","", m_porte, false); + m_late = new PicLatchRegister(this,"late","",m_porte); + delete t1con; + + t1con = new T5CON(this, "t1con", "Timer 1 Control Register"); + t3con2 = new T5CON(this, "t3con", "Timer 3 Control Register"); + t5con = new T5CON(this, "t5con", "Timer 5 Control Register"); + pir_set_def.set_pir3(&pir3); + pir_set_def.set_pir4(&pir4); + pir_set_def.set_pir5(&pir5); + + // By default TMR2 controls deals with all ccp units until + // changed by ccptmrsx registers + tmr2.add_ccp(&ccp3con); + tmr2.add_ccp(&ccp4con); + tmr2.add_ccp(&ccp5con); + tmr2.m_txgcon = &t1gcon; + t4con.tmr2 = &tmr4; + tmr4.pr2 = &pr4; + tmr4.t2con = &t4con; + tmr4.setInterruptSource(new InterruptSource(&pir5, PIR5v1::TMR4IF)); + tmr4.m_txgcon = &t3gcon; + pr4.tmr2 = &tmr4; + t6con.tmr2 = &tmr6; + tmr6.pr2 = &pr6; + tmr6.t2con = &t6con; + tmr6.setInterruptSource(new InterruptSource(&pir5, PIR5v1::TMR6IF)); + tmr6.m_txgcon = &t5gcon; + pr6.tmr2 = &tmr6; + ccptmrs.set_tmr246(&tmr2, &tmr4, &tmr6); + ccptmrs.set_ccp(&ccp1con, &ccp2con, &ccp3con, &ccp4con, &ccp5con); + comparator.cmxcon0[0] = new CMxCON0_V2(this, "cm1con0", + " Comparator C1 Control Register 0", 0, &comparator); + comparator.cmxcon0[1] = new CMxCON0_V2(this, "cm2con0", + " Comparator C2 Control Register 0", 1, &comparator); + comparator.cmxcon1[0] = new CM2CON1_V2(this, "cm2con1", + " Comparator Control Register 1", &comparator); + comparator.cmxcon1[1] = comparator.cmxcon1[0]; + + ctmu.ctmuconh = new CTMUCONH(this, "ctmuconh", + "CTMU Control Register 0", &ctmu); + ctmu.ctmuconl = new CTMUCONL(this, "ctmuconl", + "CTMU Control Register 1", &ctmu); + ctmu.ctmuicon = new CTMUICON(this, "ctmuicon", + "CTMU Current Control Register", &ctmu); + + ctmu.ctmu_stim = new ctmu_stimulus(this,"ctmu_stim", 5.0, 1e12); + adcon0.set_ctmu_stim(ctmu.ctmu_stim); + ctmu.adcon1 = &adcon1; + ctmu.cm2con1 = (CM2CON1_V2 *)comparator.cmxcon1[0]; + ctmu.set_IOpins(&(*m_portb)[2],&(*m_portb)[3], &(*m_portc)[2]); + hlvdcon.setIntSrc(new InterruptSource(pir2, PIR2v2::HLVDIF)); + hlvdcon.set_hlvdin(&(*m_porta)[5]); +} + +P18F26K22::~P18F26K22() +{ + delete ctmu.ctmu_stim; + delete_sfr_register(m_porte); + delete_sfr_register(m_late); + delete_sfr_register(m_trise); + delete_sfr_register(t3con2); + delete_sfr_register(t5con); + delete_sfr_register(usart2.txreg); + delete_sfr_register(usart2.rcreg); + remove_sfr_register(comparator.cmxcon0[0]); + remove_sfr_register(comparator.cmxcon0[1]); + remove_sfr_register(comparator.cmxcon1[0]); + + remove_sfr_register(&usart.spbrgh); + remove_sfr_register(&usart.baudcon); + remove_sfr_register(&osctune); + remove_sfr_register(&tmr2); + remove_sfr_register(&pr2); + remove_sfr_register(&t2con); + remove_sfr_register(&pwm1con); + remove_sfr_register(&eccp1as); + remove_sfr_register(&pwm2con); + remove_sfr_register(&eccp2as); + remove_sfr_register(&pwm3con); + remove_sfr_register(&eccp3as); + remove_sfr_register(&ccpr2h); + remove_sfr_register(&ccpr2l); + remove_sfr_register(&ccp2con); + remove_sfr_register(&ccpr3h); + remove_sfr_register(&ccpr3l); + remove_sfr_register(&ccp3con); + remove_sfr_register(&ccpr4h); + remove_sfr_register(&ccpr4l); + remove_sfr_register(&ccp4con); + remove_sfr_register(&ccpr5h); + remove_sfr_register(&ccpr5l); + remove_sfr_register(&ccp5con); + remove_sfr_register(osccon); + remove_sfr_register(&ipr3); + remove_sfr_register(&pir3); + remove_sfr_register(&pie3); + remove_sfr_register(&pie4); + remove_sfr_register(&pir4); + remove_sfr_register(&ipr4); + remove_sfr_register(&pie5); + remove_sfr_register(&pir5); + remove_sfr_register(&ipr5); + remove_sfr_register(&tmr5h); + remove_sfr_register(&tmr5l); + remove_sfr_register(&t1gcon); + remove_sfr_register(&t3gcon); + remove_sfr_register(&t5gcon); + remove_sfr_register(&pmd0); + remove_sfr_register(&pmd1); + remove_sfr_register(&pmd2); + remove_sfr_register(&ansela); + remove_sfr_register(&anselb); + remove_sfr_register(&anselc); + delete_sfr_register(wpub); + delete_sfr_register(iocb); + remove_sfr_register(&slrcon); + remove_sfr_register(&ccptmrs.ccptmrs1); + remove_sfr_register(&ccptmrs.ccptmrs0); + remove_sfr_register(&tmr6); + remove_sfr_register(&pr6); + remove_sfr_register(&t6con); + remove_sfr_register(&tmr4); + remove_sfr_register(&pr4); + remove_sfr_register(&t4con); + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&adcon2); + remove_sfr_register(&vrefcon0); + remove_sfr_register(&vrefcon1); + remove_sfr_register(&vrefcon2); + remove_sfr_register(&sr_module.srcon0); + remove_sfr_register(&sr_module.srcon1); + remove_sfr_register(&pstr1con); + remove_sfr_register(&pstr2con); + remove_sfr_register(&pstr3con); + remove_sfr_register(&usart2.rcsta); + remove_sfr_register(&usart2.txsta); + remove_sfr_register(&usart2.spbrg); + remove_sfr_register(&usart2.spbrgh); + remove_sfr_register(&usart2.baudcon); + remove_sfr_register(&ssp1.sspbuf); + remove_sfr_register(&ssp1.sspadd); + remove_sfr_register(ssp1.sspmsk); + remove_sfr_register(&ssp1.sspstat); + remove_sfr_register(&ssp1.sspcon); + remove_sfr_register(&ssp1.sspcon2); + remove_sfr_register(&ssp1.ssp1con3); + remove_sfr_register(&ssp2.sspbuf); + remove_sfr_register(&ssp2.sspadd); + remove_sfr_register(ssp2.sspmsk); + remove_sfr_register(&ssp2.sspstat); + remove_sfr_register(&ssp2.sspcon); + remove_sfr_register(&ssp2.sspcon2); + remove_sfr_register(&ssp2.ssp1con3); + delete_sfr_register(ctmu.ctmuconh); + delete_sfr_register(ctmu.ctmuconl); + delete_sfr_register(ctmu.ctmuicon); + remove_sfr_register(&hlvdcon); + remove_sfr_register(&osccon2); + + + delete_file_registers(0xf3b, 0xf3c, false); + delete_file_registers(0xf83, 0xf83, false); + delete_file_registers(0xf85, 0xf88, false); + delete_file_registers(0xf8c, 0xf91, false); + delete_file_registers(0xf95, 0xf95, false); + delete_file_registers(0xf97, 0xf9a, false); + //delete_file_registers(0xf9d, 0xf9e, false); + delete_file_registers(0xfb5, 0xfb5, false); + delete_file_registers(0xfd4, 0xfd4, false); +} + +void P18F26K22::create() +{ + RegisterValue porv(0,0); + RegisterValue porvh(0xff,0); + + tbl.initialize ( eeprom_memory_size(), 32, 4, CONFIG1L); + tbl.set_intcon(&intcon); + set_eeprom_pir(&tbl); + tbl.set_pir(pir2); + tbl.eecon1.set_valid_bits(0xbf); + + create_iopin_map(); + + _16bit_processor::create(); + + remove_sfr_register(&ssp.sspcon2); + remove_sfr_register(&ssp.sspcon); + remove_sfr_register(&ssp.sspstat); + remove_sfr_register(&ssp.sspadd); + remove_sfr_register(&ssp.sspbuf); + remove_sfr_register(&lvdcon); + + set_osc_pin_Number(0, 9, &(*m_porta)[7]); + set_osc_pin_Number(1,10, &(*m_porta)[6]); + + m_configMemory->addConfigWord(CONFIG1L-CONFIG1L,new ConfigWord("CONFIG1L", 0x00, "Configuration Register 1 low", this, CONFIG1L)); + m_configMemory->addConfigWord(CONFIG1H-CONFIG1L,new Config1H_4bits(this, CONFIG1H, 0x25)); + m_configMemory->addConfigWord(CONFIG3H-CONFIG1L,new Config3H(this, CONFIG3H, 0xbf)); + + +// add_sfr_register(osccon, 0xfd3, RegisterValue(0x30,0), "osccon"); + add_sfr_register(&osccon2, 0xfd2, RegisterValue(0x04,0), "osccon2"); + ((OSCCON_HS *)osccon)->osccon2 = &osccon2; + osccon->write_mask = 0xf3; + osccon->por_value = RegisterValue(0x30,0); + + add_sfr_register(&t1gcon, 0xfcc, porv, "t1gcon"); + add_sfr_register(&ssp1.ssp1con3, 0xfcb, RegisterValue(0,0),"ssp1con3"); + add_sfr_register(ssp1.sspmsk, 0xfca, RegisterValue(0xff,0),"ssp1msk"); + add_sfr_register(&ssp1.sspbuf, 0xfc9, RegisterValue(0,0),"ssp1buf"); + add_sfr_register(&ssp1.sspadd, 0xfc8, RegisterValue(0,0),"ssp1add"); + add_sfr_register(&ssp1.sspstat, 0xfc7, RegisterValue(0,0),"ssp1stat"); + add_sfr_register(&ssp1.sspcon, 0xfc6, RegisterValue(0,0),"ssp1con"); + add_sfr_register(&ssp1.sspcon2, 0xfc5, RegisterValue(0,0),"ssp1con2"); + + add_sfr_register(&adcon0, 0xfc2, porv, "adcon0"); + add_sfr_register(&adcon1, 0xfc1, porv, "adcon1"); + add_sfr_register(&adcon2, 0xfc0, porv, "adcon2"); + + add_sfr_register(&tmr2, 0xfbc, porv, "tmr2"); + add_sfr_register(&pr2, 0xfbb, RegisterValue(0xff,0), "pr2"); + add_sfr_register(&t2con, 0xfba, porv, "t2con"); + add_sfr_register(&pstr1con, 0xfb9, RegisterValue(0x01,0)); + add_sfr_register(&pwm1con, 0xfb7, porv); + add_sfr_register(&eccp1as, 0xfb6, porv); + add_sfr_register(&t3gcon, 0xfb4, porv); + + add_sfr_register(&ipr3, 0xfa5, porv, "ipr3"); + add_sfr_register(&pir3, 0xfa4, porv, "pir3"); + add_sfr_register(&pie3, 0xfa3, porv, "pie3"); + + add_sfr_register(&hlvdcon, 0xf9c, porv, "hlvdcon"); + + add_sfr_register(&ipr5, 0xf7f, porv, "ipr5"); + add_sfr_register(&pir5, 0xf7e, porv, "pir5"); + add_sfr_register(&pie5, 0xf7d, porv, "pie5"); + add_sfr_register(&ipr4, 0xf7c, porv, "ipr4"); + add_sfr_register(&pir4, 0xf7b, porv, "pir4"); + add_sfr_register(&pie4, 0xf7a, porv, "pie4"); + add_sfr_register(comparator.cmxcon0[0], 0xf79, RegisterValue(0x08,0), "cm1con0"); + add_sfr_register(comparator.cmxcon0[1], 0xf78, RegisterValue(0x08,0), "cm2con0"); + add_sfr_register(comparator.cmxcon1[0], 0xf77, porv, "cm2con1"); + + + add_sfr_register(&ssp2.sspbuf, 0xf6f, RegisterValue(0,0),"ssp2buf"); + add_sfr_register(&ssp2.sspadd, 0xf6e, RegisterValue(0,0),"ssp2add"); + add_sfr_register(&ssp2.sspstat, 0xf6d, RegisterValue(0,0),"ssp2stat"); + add_sfr_register(&ssp2.sspcon, 0xf6c, RegisterValue(0,0),"ssp2con"); + add_sfr_register(&ssp2.sspcon2, 0xf6b, RegisterValue(0,0),"ssp2con2"); + add_sfr_register(ssp2.sspmsk, 0xf6a, RegisterValue(0xff,0),"ssp2msk"); + add_sfr_register(&ssp2.ssp1con3, 0xf69, RegisterValue(0,0),"ssp2con3"); + add_sfr_register(&ccpr2h, 0xf68, porv, "ccpr2h"); + add_sfr_register(&ccpr2l, 0xf67, porv, "ccpr2l"); + add_sfr_register(&ccp2con, 0xf66, porv, "ccp2con"); + add_sfr_register(&pwm2con, 0xf65, porv); + add_sfr_register(&eccp2as, 0xf64, porv); + add_sfr_register(&pstr2con, 0xf63, RegisterValue(0x01,0)); + add_sfr_register(iocb, 0xf62, porvh); + add_sfr_register(wpub, 0xf61, porvh); + add_sfr_register(&slrcon, 0xf60, porvh); + + add_sfr_register(&ccpr3h, 0xf5f, porv); + add_sfr_register(&ccpr3l, 0xf5e, porv); + add_sfr_register(&ccp3con, 0xf5d, porv); + add_sfr_register(&pwm3con, 0xf5c, porv); + add_sfr_register(&eccp3as, 0xf5b, porv); + add_sfr_register(&pstr3con, 0xf5a, RegisterValue(0x01,0)); + add_sfr_register(&ccpr4h, 0xf59, porv); + add_sfr_register(&ccpr4l, 0xf58, porv); + add_sfr_register(&ccp4con, 0xf57, porv); + add_sfr_register(&ccpr5h, 0xf56, porv); + add_sfr_register(&ccpr5l, 0xf55, porv); + add_sfr_register(&ccp5con, 0xf54, porv); + add_sfr_register(&tmr4, 0xf53, porv); + add_sfr_register(&pr4, 0xf52, porvh); + add_sfr_register(&t4con, 0xf51, porv); + add_sfr_register(&tmr5h, 0xf50, porv, "tmr5h"); + + add_sfr_register(&tmr5l, 0xf4f, porv, "tmr5l"); + add_sfr_register(t5con, 0xf4e, porv); + add_sfr_register(&t5gcon, 0xf4d, porv); + add_sfr_register(&tmr6, 0xf4c, porv); + add_sfr_register(&pr6, 0xf4b, porvh); + add_sfr_register(&t6con, 0xf4a, porv); + add_sfr_register(&ccptmrs.ccptmrs0, 0xf49, porv); + add_sfr_register(&ccptmrs.ccptmrs1, 0xf48, porv); + add_sfr_register(&sr_module.srcon0, 0xf47, porv); + add_sfr_register(&sr_module.srcon1, 0xf46, porv); + add_sfr_register(ctmu.ctmuconh, 0xf45, porv, "ctmuconh"); + add_sfr_register(ctmu.ctmuconl, 0xf44, porv, "ctmuconl"); + add_sfr_register(ctmu.ctmuicon, 0xf43, porv, "ctmuicon"); + add_sfr_register(&vrefcon0, 0xf42, RegisterValue(0x10,0)); + add_sfr_register(&vrefcon1, 0xf41, porv); + add_sfr_register(&vrefcon2, 0xf40, porv); + + add_sfr_register(&pmd0, 0xf3f, porv); + add_sfr_register(&pmd1, 0xf3e, porv); + add_sfr_register(&pmd2, 0xf3d, porv); + add_sfr_register(&anselc, 0xf3a, RegisterValue(0xfc,0)); + add_sfr_register(&anselb, 0xf39, RegisterValue(0x3f,0)); + add_sfr_register(&ansela, 0xf38, RegisterValue(0x2f,0)); + + add_sfr_register(new RegZero(this, "ZeroFD4", "Always read as zero"), 0xFD4, porv); + add_sfr_register(new RegZero(this, "ZeroFB5", "Always read as zero"), 0xFB5, porv); + add_sfr_register(new RegZero(this, "ZeroF9A", "Always read as zero"), 0xF9A, porv); + add_sfr_register(new RegZero(this, "ZeroF99", "Always read as zero"), 0xF99, porv); + add_sfr_register(new RegZero(this, "ZeroF98", "Always read as zero"), 0xF98, porv); + add_sfr_register(new RegZero(this, "ZeroF97", "Always read as zero"), 0xF97, porv); + add_sfr_register(new RegZero(this, "trisd", "Always read as zero"), 0xF95, porv); + add_sfr_register(new RegZero(this, "ZeroF91", "Always read as zero"), 0xF91, porv); + add_sfr_register(new RegZero(this, "ZeroF90", "Always read as zero"), 0xF90, porv); + add_sfr_register(new RegZero(this, "ZeroF8F", "Always read as zero"), 0xF8F, porv); + add_sfr_register(new RegZero(this, "ZeroF8E", "Always read as zero"), 0xF8E, porv); + add_sfr_register(new RegZero(this, "late", "Always read as zero"), 0xF8D, porv); + add_sfr_register(new RegZero(this, "latd", "Always read as zero"), 0xF8C, porv); + add_sfr_register(new RegZero(this, "ZeroF88", "Always read as zero"), 0xF88, porv); + add_sfr_register(new RegZero(this, "ZeroF87", "Always read as zero"), 0xF87, porv); + add_sfr_register(new RegZero(this, "ZeroF86", "Always read as zero"), 0xF86, porv); + add_sfr_register(new RegZero(this, "ZeroF85", "Always read as zero"), 0xF85, porv); + add_sfr_register(new RegZero(this, "portd", "Always read as zero"), 0xF83, porv); + add_sfr_register(new RegZero(this, "ansele", "Always read as zero"), 0xF3C, porv); + add_sfr_register(new RegZero(this, "anseld", "Always read as zero"), 0xF3B, porv); + + eccp1as.setBitMask(0xfc); + eccp2as.setBitMask(0xfc); + eccp3as.setBitMask(0xfc); + // ECCP shutdown trigger + eccp1as.setIOpin(0, 0, &(*m_portb)[0]); + eccp2as.setIOpin(0, 0, &(*m_portb)[0]); + eccp3as.setIOpin(0, 0, &(*m_portb)[0]); + eccp1as.link_registers(&pwm1con, &ccp1con); + eccp2as.link_registers(&pwm2con, &ccp2con); + eccp3as.link_registers(&pwm3con, &ccp3con); + //RRR comparator.cmcon.set_eccpas(&eccp1as); + ccp1con.setBitMask(0xff); + ccp2con.setBitMask(0xff); + ccp3con.setBitMask(0xff); + ccp4con.setBitMask(0x3f); + ccp5con.setBitMask(0x3f); + ccp1con.setCrosslinks(&ccpr1l, &pir1, PIR1v2::CCP1IF, &tmr2, &eccp1as); + ccp2con.setCrosslinks(&ccpr2l, pir2, PIR2v2::CCP2IF, &tmr2, &eccp2as); + ccp3con.setCrosslinks(&ccpr3l, &pir4, PIR4v1::CCP3IF, &tmr2, &eccp3as); + ccp1con.pwm1con = &pwm1con; + ccp2con.pwm1con = &pwm2con; + ccp3con.pwm1con = &pwm3con; + ccp1con.pstrcon = &pstr1con; + ccp2con.pstrcon = &pstr2con; + ccp3con.pstrcon = &pstr3con; + ccp1con.setIOpin(&((*m_portc)[2]), &((*m_portb)[2]), &((*m_portb)[1]), &((*m_portb)[4])); + pwm1con.setBitMask(0x80); + //ccp3con.setCrosslinks(&ccpr3l, &pir3, PIR3v2::CCP3IF, &tmr6, &eccp3as); + adcon0.setAdresLow(&adresl); + adcon0.setAdres(&adresh); + adcon0.setAdcon1(&adcon1); + adcon0.setAdcon2(&adcon2); + adcon0.setIntcon(&intcon); + adcon0.setPir(&pir1); + adcon0.setChannel_Mask(0x1f); // upto 32 channels + adcon0.setA2DBits(10); + adcon1.setNumberOfChannels(20); + adcon1.setVrefHiChannel(3); + adcon1.setVrefLoChannel(2); + adcon1.setAdcon0(&adcon0); // VCFG0, VCFG1 in adcon0 + vrefcon0.set_adcon1(&adcon1); + vrefcon1.set_adcon1(&adcon1); + vrefcon0.set_daccon0(&vrefcon1); + + + ansela.setIOPin(0, &(*m_porta)[0], &adcon1); + ansela.setIOPin(1, &(*m_porta)[1], &adcon1); + ansela.setIOPin(2, &(*m_porta)[2], &adcon1); + ansela.setIOPin(3, &(*m_porta)[3], &adcon1); + ansela.setIOPin(4, &(*m_porta)[5], &adcon1); + anselb.setIOPin(8, &(*m_portb)[2], &adcon1); + anselb.setIOPin(9, &(*m_portb)[3], &adcon1); + anselb.setIOPin(10, &(*m_portb)[1], &adcon1); + anselb.setIOPin(11, &(*m_portb)[4], &adcon1); + anselb.setIOPin(12, &(*m_portb)[0], &adcon1); + anselb.setIOPin(13, &(*m_portb)[5], &adcon1); + anselc.setIOPin(14, &(*m_portc)[2], &adcon1); + anselc.setIOPin(15, &(*m_portc)[3], &adcon1); + anselc.setIOPin(16, &(*m_portc)[4], &adcon1); + anselc.setIOPin(17, &(*m_portc)[5], &adcon1); + anselc.setIOPin(18, &(*m_portc)[6], &adcon1); + anselc.setIOPin(19, &(*m_portc)[7], &adcon1); + + osccon->write_mask = 0xf3; + + +} +void P18F26K22::set_config3h(int64_t value) +{ + PinModule *p2b; + (value & MCLRE) ? assignMCLRPin(1) : unassignMCLRPin(); + if ( value & P2BMX) + p2b = &((*m_portb)[5]); + else + p2b = &((*m_portc)[0]); + + if ( value & CCP3MX ) + ccp3con.setIOpin(&((*m_portb)[5]), &((*m_portc)[5])); + else + ccp3con.setIOpin(&((*m_portc)[6]), &((*m_portc)[5])); + + if ( value & CCP2MX ) + ccp2con.setIOpin(&((*m_portc)[1]), p2b); + else + ccp2con.setIOpin(&((*m_portb)[3]), p2b); + + if ( value & PBADEN ) + anselb.por_value=RegisterValue( 0x3f,0); + else + anselb.por_value=RegisterValue(0,0); + +} + +void P18F26K22::osc_mode(uint value) +{ + uint mode = value & (FOSC3 | FOSC2 | FOSC1 | FOSC0); + uint pin_Number0 = get_osc_pin_Number(0); + uint pin_Number1 = get_osc_pin_Number(1); + + + set_pplx4_osc(value & PLLCFG); + + if (mode == 0x8 || mode == 0x9) + { + if (osccon) osccon->set_config_irc(true); + set_int_osc(true); + } + else + { + set_int_osc(false); + if (osccon) osccon->set_config_irc(false); + } + + if (osccon) + { + osccon->set_config_ieso(value & IESO); + osccon->set_config_xosc(mode < 4); + } + + switch(mode) + { + case 0xf: // external RC CLKOUT RA6 + case 0xe: + case 0xc: + case 0xa: + case 0x9: + case 0x6: + case 0x4: + if (pin_Number1 < 253) // CLKO = OSC2 + { + cout << "CLKO not simulated\n"; + set_clk_pin(pin_Number1, get_osc_PinMonitor(1) , "CLKO", + false, m_porta, m_trisa, m_lata); + } + break; + } + if (pin_Number0 < 253) + { + if (mode != 0x9 && mode != 0x8 ) // not internal OSC, set OSC1 + { + set_clk_pin(pin_Number0, get_osc_PinMonitor(0) , "OSC1", + true, m_porta, m_trisa, m_lata); + } + else + { + clr_clk_pin(pin_Number0, get_osc_PinMonitor(0), + m_porta, m_trisa, m_lata); + } + + } + if (pin_Number1 < 253) + { + if (mode < 4) + { + set_clk_pin(pin_Number1, get_osc_PinMonitor(1) , "OSC2", + true, m_porta, m_trisa, m_lata); + } + else + { + clr_clk_pin(pin_Number1, get_osc_PinMonitor(1), + m_porta, m_trisa, m_lata); + } + } +} + +void P18F26K22::update_vdd() +{ + hlvdcon.check_hlvd(); + Processor::update_vdd(); +} + +Processor * P18F26K22::construct(const char *name) +{ + + P18F26K22 *p = new P18F26K22(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + + +void P18F26K22::create_sfr_map() +{ + _16bit_processor::create_sfr_map(); + + RegisterValue porv(0,0); + + add_sfr_register(m_porte, 0xf84,porv); + add_sfr_register(m_trise, 0xf96,RegisterValue(0x07,0)); + + remove_sfr_register(t3con); + add_sfr_register(t3con2, 0xfb1,porv); + add_sfr_register(&osctune, 0xf9b,porv); + osccon->set_osctune(&osctune); + osctune.set_osccon(osccon); + osccon2.set_osccon(osccon); + + comparator.cmxcon1[0]->set_OUTpin(&(*m_porta)[4], &(*m_porta)[5]); + comparator.cmxcon1[0]->set_INpinNeg(&(*m_porta)[0], &(*m_porta)[1], + &(*m_portb)[3],&(*m_portb)[2]); + comparator.cmxcon1[0]->set_INpinPos(&(*m_porta)[3], &(*m_porta)[2]); + comparator.cmxcon1[0]->setBitMask(0x3f); + comparator.cmxcon0[0]->setBitMask(0xbf); + comparator.cmxcon0[0]->setIntSrc(new InterruptSource(pir2, PIR2v2::C1IF)); + comparator.cmxcon0[1]->setBitMask(0xbf); + comparator.cmxcon0[1]->setIntSrc(new InterruptSource(pir2, PIR2v2::C2IF)); + vrefcon0.set_cmModule(&comparator); + comparator.assign_t1gcon(&t1gcon, &t3gcon, &t5gcon); + comparator.assign_sr_module(&sr_module); + comparator.assign_eccpsas(&eccp1as, &eccp2as, &eccp3as); + sr_module.srcon1.set_ValidBits(0xff); + sr_module.setPins(&(*m_portb)[0], &(*m_porta)[4], &(*m_porta)[5]); + + vrefcon1.set_cmModule(&comparator); + vrefcon1.setDACOUT(&(*m_porta)[2]); + + + + ccp2con.setCrosslinks(&ccpr2l, pir2, PIR2v2::CCP2IF, &tmr2); + ccp2con.setIOpin(&((*m_portc)[1])); // May be altered by Config3H_2x21::set + ccpr2l.ccprh = &ccpr2h; + ccpr2l.tmrl = &tmr1l; + ccpr2h.ccprl = &ccpr2l; + ccp3con.setCrosslinks(&ccpr3l, &pir3, PIR3v1::CCP3IF, &tmr2); + ccpr3l.ccprh = &ccpr3h; + ccpr3l.tmrl = &tmr1l; + ccpr3h.ccprl = &ccpr3l; + ccp4con.setCrosslinks(&ccpr4l, &pir3, PIR3v1::CCP4IF, &tmr2); + ccp4con.setIOpin(&((*m_portb)[0])); + ccpr4l.ccprh = &ccpr4h; + ccpr4l.tmrl = &tmr1l; + ccpr4h.ccprl = &ccpr4l; + ccp5con.setIOpin(&((*m_porta)[4])); + ccp5con.setCrosslinks(&ccpr5l, &pir3, PIR3v1::CCP5IF, &tmr2); + ccpr5l.ccprh = &ccpr5h; + ccpr5l.tmrl = &tmr1l; + ccpr5h.ccprl = &ccpr5l; + + //1 usart16.initialize_16(this,&pir_set_def,&portc); + usart.txsta.new_name("txsta1"); + usart.txreg->new_name("txreg1"); + usart.rcsta.new_name("rcsta1"); + usart.rcreg->new_name("rcreg1"); + usart.mk_rcif_int(&pir1, PIR1v2::RCIF); + usart.mk_txif_int(&pir1, PIR1v2::TXIF); + add_sfr_register(&usart.spbrgh, 0xfb0,porv,"spbrgh1"); + add_sfr_register(&usart.baudcon, 0xfb8,porv,"baudcon1"); + usart.set_eusart(true); + init_pir2(pir2, PIR2v4::TMR3IF); + tmr3l.setIOpin(&(*m_portc)[0]); + + pir3.set_intcon(&intcon); + pir3.set_pie(&pie3); + pir3.set_ipr(&ipr3); + pie3.setPir(&pir3); + + pir4.set_intcon(&intcon); + pir4.set_pie(&pie4); + pir4.set_ipr(&ipr4); + pie4.setPir(&pir4); + + pir5.set_intcon(&intcon); + pir5.set_pie(&pie5); + pir5.set_ipr(&ipr5); + pie5.setPir(&pir5); + + ((T5CON *)t1con)->t1gcon = &t1gcon; + t1gcon.setInterruptSource(new InterruptSource(&pir3, PIR3v3::TMR1GIF)); + t3gcon.setInterruptSource(new InterruptSource(&pir3, PIR3v3::TMR3GIF)); + t5gcon.setInterruptSource(new InterruptSource(&pir3, PIR3v3::TMR5GIF)); + + t1gcon.set_tmrl(&tmr1l); + t3gcon.set_tmrl(&tmr3l); + t5gcon.set_tmrl(&tmr5l); + t1gcon.setGatepin(&(*m_portb)[5]); + t3gcon.setGatepin(&(*m_portc)[0]); + t5gcon.setGatepin(&(*m_portb)[4]); + + t3con2->tmrl = &tmr3l; + t5con->tmrl = &tmr5l; + ((T5CON *)t3con2)->t1gcon = &t3gcon; + ((T5CON *)t5con)->t1gcon = &t5gcon; + tmr5l.setInterruptSource(new InterruptSource(&pir5, PIR5v1::TMR5IF)); + tmr5l.tmrh = &tmr5h; + tmr5h.tmrl = &tmr5l; + tmr3l.t1con = t3con2; + tmr5l.t1con = t5con; + + //cout << "Create second USART\n"; + usart2.initialize(&pir3,&(*m_portb)[6], &(*m_portb)[7], + new _TXREG(this,"txreg2", "USART Transmit Register", &usart2), + new _RCREG(this,"rcreg2", "USART Receiver Register", &usart2)); + + add_sfr_register(&usart2.baudcon, 0xf70, porv, "baudcon2"); + add_sfr_register(&usart2.rcsta, 0xf71, porv, "rcsta2"); + add_sfr_register(&usart2.txsta, 0xf72, RegisterValue(0x02,0), "txsta2"); + add_sfr_register(usart2.txreg, 0xf73, porv, "txreg2"); + add_sfr_register(usart2.rcreg, 0xf74, porv, "rcreg2"); + add_sfr_register(&usart2.spbrg, 0xf75, porv, "spbrg2"); + add_sfr_register(&usart2.spbrgh, 0xf76, porv, "spbrgh2"); + + usart2.mk_rcif_int(&pir3, PIR3v1::RCIF); + usart2.mk_txif_int(&pir3, PIR3v1::TXIF); + tmr2.ssp_module[0] = &ssp1; + tmr2.ssp_module[1] = &ssp2; + + ssp1.initialize( + 0, // PIR + &(*m_portc)[3], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[5], // SDO + &(*m_portc)[4], // SDI + m_trisc, // i2c tris port + SSP_TYPE_MSSP1 + ); + ssp1.mk_ssp_int(&pir1, PIR1v1::SSPIF); // SSP1IF + ssp1.mk_bcl_int(pir2, PIR2v2::BCLIF); // BCL1IF + + ssp2.initialize( + 0, // PIR + &(*m_portb)[1], // SCK + &(*m_portb)[0], // SS + &(*m_portb)[3], // SDO + &(*m_portb)[2], // SDI + m_trisb, // i2c tris port + SSP_TYPE_MSSP1 + ); + ssp2.mk_ssp_int(&pir3, PIR3v3::SSP2IF); // SSP2IF + ssp2.mk_bcl_int(&pir3, PIR3v3::BCL2IF); // BCL2IF + +} + diff --git a/src/gpsim/devices/p18fk.h b/src/gpsim/devices/p18fk.h new file mode 100644 index 0000000..8dbfab0 --- /dev/null +++ b/src/gpsim/devices/p18fk.h @@ -0,0 +1,221 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + Copyright (C) 2010,2015 Roy R Rankin + + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __P18FK_H__ +#define __P18FK_H__ + +#include "16bit-processors.h" +#include "eeprom.h" +#include "psp.h" +#include "pir.h" +#include "comparator.h" +#include "spp.h" +#include "ctmu.h" + +#ifdef IESO +#undef IESO +#endif +#define IESO (1<<7) + +class PicPortRegister; +class PicTrisRegister; +class PicLatchRegister; +class ADCON0_V2; +class ADCON1_V2; +class ADCON2_V2; + + +class P18F14K22 : public _16bit_processor +{ + public: + + ADCON0_V2 adcon0; + ADCON1_2B adcon1; + ADCON2_V2 adcon2; + FVRCON_V2 vrefcon0; + DACCON0_V2 vrefcon1; + DACCON1 vrefcon2; + ECCPAS eccp1as; + PWM1CON pwm1con; + OSCTUNE osctune; + + ComparatorModule2 comparator; + ANSEL_2A ansela; + ANSEL_2A anselb; + IOC slrcon; // using IOC for it's mask this register is a NOP in gpsim +// sfr_register slrcon; // this register is a NOP in gpsim + CCPTMRS ccptmrs; + PSTRCON pstrcon; + SR_MODULE sr_module; + SSP1_MODULE ssp1; + OSCCON2 osccon2; + + WPU *wpua; + WPU *wpub; + IOC *ioca; + IOC *iocb; + virtual bool HasCCP2(void) { return false; } + virtual bool MovedReg() { return false;} + virtual OSCCON * getOSCCON(void); + + virtual PROCESSOR_TYPE isa(){return _P18F14K22_;} + P18F14K22(const char *_name=0, const char *desc=0); + ~P18F14K22(); + static Processor *construct(const char *name); + + virtual PROCESSOR_TYPE base_isa(){return _PIC18_PROCESSOR_;}; + virtual uint access_gprs() { return 0x60; }; + virtual uint program_memory_size() const { return 0x4000; }; + virtual uint last_actual_register () const { return 0x01FF;}; + virtual uint eeprom_memory_size() const { return 256; }; + virtual void create_iopin_map(); + virtual void create_sfr_map(); + virtual void osc_mode(uint value); + virtual void set_config3h(int64_t x); + virtual string string_config3h(int64_t x) + {return string("fix string_config3h");} + virtual uint get_device_id() { return (0x20 << 8)|(0x3 <<5); } + + void create(); + + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as the 18Fxxx devices use an EEPROM with PIR + assert(0); + } + virtual void set_eeprom_pir(EEPROM_PIR *ep) { eeprom = ep; } + virtual EEPROM_PIR *get_eeprom() { return ((EEPROM_PIR *)eeprom); } +}; + + + +class P18F26K22 : public _16bit_processor +{ + public: + + PicPortRegister *m_porte; + PicTrisRegister *m_trise; + PicLatchRegister *m_late; + + + ADCON0_V2 adcon0; + ADCON1_2B adcon1; + ADCON2_V2 adcon2; + FVRCON_V2 vrefcon0; + DACCON0_V2 vrefcon1; + DACCON1 vrefcon2; + ECCPAS eccp1as; + ECCPAS eccp2as; + ECCPAS eccp3as; + PWM1CON pwm1con; + PWM1CON pwm2con; + PWM1CON pwm3con; + OSCTUNE osctune; + + T1GCON t1gcon; + T5CON *t3con2; + T1GCON t3gcon; + TMRL tmr5l; + TMRH tmr5h; + T5CON *t5con; + T1GCON t5gcon; + T2CON t4con; + PR2 pr4; + TMR2 tmr4; + T2CON t6con; + PR2 pr6; + TMR2 tmr6; + PIR3v3 pir3; + PIE pie3; + PIR4v1 pir4; + PIE pie4; + PIR5v1 pir5; + PIE pie5; + sfr_register ipr3; + sfr_register ipr4; + sfr_register ipr5; + CCPCON ccp3con; + CCPRL ccpr3l; + CCPRH ccpr3h; + CCPCON ccp4con; + CCPRL ccpr4l; + CCPRH ccpr4h; + CCPCON ccp5con; + CCPRL ccpr5l; + CCPRH ccpr5h; + USART_MODULE usart2; + ComparatorModule2 comparator; + sfr_register pmd0; + sfr_register pmd1; + sfr_register pmd2; + ANSEL_2B ansela; + ANSEL_2B anselb; + ANSEL_2B anselc; + IOC slrcon; // using IOC for it's mask this register is a NOP in gpsim + CCPTMRS ccptmrs; + PSTRCON pstr1con; + PSTRCON pstr2con; + PSTRCON pstr3con; + SR_MODULE sr_module; + SSP1_MODULE ssp1; + SSP1_MODULE ssp2; + CTMU ctmu; + HLVDCON hlvdcon; + OSCCON2 osccon2; + + WPU *wpub; + IOC *iocb; + virtual bool HasCCP2(void) { return false; }; // at wrong address + virtual bool MovedReg() { return true;} + virtual OSCCON * getOSCCON(void) { return new OSCCON_HS(this, "osccon", "OSC Control"); } + + virtual PROCESSOR_TYPE isa(){return _P18F26K22_;}; + P18F26K22(const char *_name=0, const char *desc=0); + ~P18F26K22(); + static Processor *construct(const char *name); + + virtual PROCESSOR_TYPE base_isa(){return _PIC18_PROCESSOR_;}; + virtual uint access_gprs() { return 0x60; }; + virtual uint program_memory_size() const { return 0x8000; }; + virtual uint last_actual_register () const { return 0x0F37;}; + virtual uint eeprom_memory_size() const { return 1024; }; + virtual void create_iopin_map(); + virtual void create_sfr_map(); + virtual void osc_mode(uint value); + virtual void set_config3h(int64_t x); + virtual string string_config3h(int64_t x) + {return string("fix string_config3h");} + virtual uint get_device_id() { return (0x54 << 8)|(0x3 <<5); } + + void create(); + virtual void update_vdd(); + + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as the 18Fxxx devices use an EEPROM with PIR + assert(0); + } + virtual void set_eeprom_pir(EEPROM_PIR *ep) { eeprom = ep; } + virtual EEPROM_PIR *get_eeprom() { return ((EEPROM_PIR *)eeprom); } +}; + + + +#endif diff --git a/src/gpsim/devices/p18x.cc b/src/gpsim/devices/p18x.cc new file mode 100644 index 0000000..bc6208a --- /dev/null +++ b/src/gpsim/devices/p18x.cc @@ -0,0 +1,2440 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + Copyright (C) 2010 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include +#include +#include + +#include "config.h" +#include "p18x.h" +#include "pic-ioports.h" +#include "packages.h" +#include "stimuli.h" + +/* Config Word defines */ +#define MCLRE (1<<7) +#define P2BMX (1<<5) +#define T3CMX (1<<4) +#define HFOFST (1<<3) +#define LPT1OSC (1<<2) +#define CCP3MX (1<<2) +#define PBADEN (1<<1) +#define CCP2MX (1<<0) + + +/** + * A special variant of the Config3H class that includes all the bits that + * config register does on PIC18F2x21 and derivatives (including 4620). Note + * that the "set" method requires that the parent processor is an instance + * of the P18F2x21 class (or a derived variant thereof). + */ +class Config3H_2x21 : public ConfigWord +{ +public: + Config3H_2x21(_16bit_processor *pCpu, uint addr, uint def_val) + : ConfigWord("CONFIG3H", ~def_val & 0xfff, "Config Reg 3H", pCpu, addr) + { + set(def_val); + } + + virtual void set(int64_t v) + { + int64_t i64; + get(i64); + int diff = (i64 ^ v) &0xfff; + Integer::set(v); + + if (m_pCpu) + { + P18F2x21 *pCpu21 = (P18F2x21*)m_pCpu; + + if (diff & MCLRE) + (v & MCLRE) ? m_pCpu->assignMCLRPin(1) : m_pCpu->unassignMCLRPin(); + if ( pCpu21->adcon1 ) + { + uint pcfg = (v & PBADEN) ? 0 + : (ADCON1::PCFG0 | ADCON1::PCFG1 | ADCON1::PCFG2); + pCpu21->adcon1->por_value=RegisterValue(pcfg,0); + } + if ( diff & CCP2MX ) + { + if ( v & CCP2MX ) + pCpu21->ccp2con.setIOpin(&((*pCpu21->m_portc)[1])); + else + pCpu21->ccp2con.setIOpin(&((*pCpu21->m_portb)[3])); + } + } + } + + virtual string toString() + { + int64_t i64; + get(i64); + int i = i64 &0xfff; + + char buff[256]; + snprintf(buff, sizeof(buff), "$%04x\n" + " MCLRE=%d - %s\n" + " LPT1OSC=%d - Timer1 configured for %s operation\n" + " PBADEN=%d - PORTB<4:0> pins %s\n" + " CCP2MX=%d - CCP2 I/O is muxed with %s\n", + i, + (i & MCLRE) ? 1:0, (i & MCLRE) ? "Pin is MCLRE" : "Pin is RE3", + (i & LPT1OSC) ? 1:0, (i & LPT1OSC) ? "low-power" : "higher power", + (i & PBADEN) ?1:0, + (i & PBADEN) ? "analog on Reset" : "digital I/O on reset", + (i & CCP2MX) ? 1:0, (i & CCP2MX) ? "RC1" : "RB3" + ); + return string(buff); + } + +}; + +//---------------------------------------------------------------------- +// For only MCLRE in CONFIG3H and using pin 4 (RA5) +// +class Config3H_1x20 : public ConfigWord +{ +public: + Config3H_1x20(_16bit_processor *pCpu, uint addr, uint def_val) + : ConfigWord("CONFIG3H", ~def_val & 0xfff, "Config Reg 3H", pCpu, addr) + { + set(def_val); + } + + virtual void set(int64_t v) + { + int64_t i64; + get(i64); + int diff = (i64 ^ v) &0xfff; + Integer::set(v); + + if (m_pCpu) + { + if (diff & MCLRE) + (v & MCLRE) ? m_pCpu->assignMCLRPin(4) : m_pCpu->unassignMCLRPin(); + } + } + virtual string toString() + { + int64_t i64; + get(i64); + int i = i64 &0xfff; + + char buff[256]; + snprintf(buff, sizeof(buff), "$%04x\n" + " MCLRE=%d - %s\n", + i, + (i & MCLRE) ? 1:0, (i & MCLRE) ? "Pin is MCLRE" : "Pin is RA5" + ); + return string(buff); + } +}; + +//======================================================================== +// +void P18C2x2::create() +{ + create_iopin_map(); + _16bit_compat_adc::create(); + osccon->value = RegisterValue(0x00,0); + osccon->por_value = RegisterValue(0x00,0); + init_pir2(pir2, PIR2v2::TMR3IF); +} + +//------------------------------------------------------------------------ +void P18C2x2::create_iopin_map() +{ + package = new Package(28); + + if(!package) + return; + + // Build the links between the I/O Ports and their tris registers. + + //package->assign_pin(1, 0); // /MCLR + createMCLRPin(1); + + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 4, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 5, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 6, m_porta->addPin(new IO_open_collector("porta4"),4)); + package->assign_pin( 7, m_porta->addPin(new IO_bi_directional("porta5"),5)); + + package->assign_pin(8, 0); // Vss + package->assign_pin(9, 0); // OSC1 + + package->assign_pin(10, m_porta->addPin(new IO_bi_directional("porta6"),6)); + + package->assign_pin(11, m_portc->addPin(new IO_bi_directional("portc0"),0)); + package->assign_pin(12, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(13, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin(14, m_portc->addPin(new IO_bi_directional("portc3"),3)); + package->assign_pin(15, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin(16, m_portc->addPin(new IO_bi_directional("portc5"),5)); + package->assign_pin(17, m_portc->addPin(new IO_bi_directional("portc6"),6)); + package->assign_pin(18, m_portc->addPin(new IO_bi_directional("portc7"),7)); + + package->assign_pin(19, 0); // Vss + package->assign_pin(20, 0); // Vdd + + package->assign_pin(21, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin(22, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin(23, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin(24, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(25, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(26, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(27, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(28, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + + tmr1l.setIOpin(&(*m_portc)[0]); + ssp.initialize(&pir_set_def, // PIR + &(*m_portc)[3], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[5], // SDO + &(*m_portc)[4], // SDI + m_trisc, // i2c tris port + SSP_TYPE_MSSP + ); + set_osc_pin_Number(0,9, NULL); + set_osc_pin_Number(1,10, &(*m_porta)[6]); + //1portc.usart = &usart16; +} + +P18C2x2::P18C2x2(const char *_name, const char *desc) + : _16bit_compat_adc(_name,desc) +{ +} + +//------------------------------------------------------------------------ +// +P18C242::P18C242(const char *_name, const char *desc) + : P18C2x2(_name,desc) +{ +} + +void P18C242::create() +{ + P18C2x2::create(); +} + +Processor * P18C242::construct(const char *name) +{ + P18C242 *p = new P18C242(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18C252::P18C252(const char *_name, const char *desc) + : P18C242(_name,desc) +{ +} + +void P18C252::create() +{ + P18C242::create(); +} + +Processor * P18C252::construct(const char *name) +{ + P18C252 *p = new P18C252(name);; + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//======================================================================== +// +void P18C4x2::create() +{ + create_iopin_map(); + + _16bit_compat_adc::create(); + osccon->value = RegisterValue(0x00,0); + osccon->por_value = RegisterValue(0x00,0); +} +//------------------------------------------------------------------------ +void P18C4x2::create_iopin_map() +{ + package = new Package(40); + + if(!package) + return; + + createMCLRPin(1); + + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 4, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 5, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 6, m_porta->addPin(new IO_open_collector("porta4"),4)); + package->assign_pin( 7, m_porta->addPin(new IO_bi_directional("porta5"),5)); + + package->assign_pin( 8, m_porte->addPin(new IO_bi_directional("porte0"),0)); + package->assign_pin( 9, m_porte->addPin(new IO_bi_directional("porte1"),1)); + package->assign_pin(10, m_porte->addPin(new IO_bi_directional("porte2"),2)); + + + package->assign_pin(11, 0); + package->assign_pin(12, 0); + package->assign_pin(13, new IOPIN("OSC1")); + package->assign_pin(14, m_porta->addPin(new IO_bi_directional("porta6"),6)); + + package->assign_pin(15, m_portc->addPin(new IO_bi_directional("portc0"),0)); + package->assign_pin(16, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(17, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin(18, m_portc->addPin(new IO_bi_directional("portc3"),3)); + package->assign_pin(23, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin(24, m_portc->addPin(new IO_bi_directional("portc5"),5)); + package->assign_pin(25, m_portc->addPin(new IO_bi_directional("portc6"),6)); + package->assign_pin(26, m_portc->addPin(new IO_bi_directional("portc7"),7)); + + package->assign_pin(19, m_portd->addPin(new IO_bi_directional("portd0"),0)); + package->assign_pin(20, m_portd->addPin(new IO_bi_directional("portd1"),1)); + package->assign_pin(21, m_portd->addPin(new IO_bi_directional("portd2"),2)); + package->assign_pin(22, m_portd->addPin(new IO_bi_directional("portd3"),3)); + package->assign_pin(27, m_portd->addPin(new IO_bi_directional("portd4"),4)); + package->assign_pin(28, m_portd->addPin(new IO_bi_directional("portd5"),5)); + package->assign_pin(29, m_portd->addPin(new IO_bi_directional("portd6"),6)); + package->assign_pin(30, m_portd->addPin(new IO_bi_directional("portd7"),7)); + + package->assign_pin(31, 0); + package->assign_pin(32, 0); + + package->assign_pin(33, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin(34, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin(35, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin(36, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(37, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(38, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(39, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(40, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + + + psp.initialize(&pir_set_def, // PIR + m_portd, // Parallel port + m_trisd, // Parallel tris + m_trise, // Control tris + &(*m_porte)[0], // NOT RD + &(*m_porte)[1], // NOT WR + &(*m_porte)[2]); // NOT CS + + tmr1l.setIOpin(&(*m_portc)[0]); + + ssp.initialize(&pir_set_def, // PIR + &(*m_portc)[3], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[5], // SDO + &(*m_portc)[4], // SDI + m_trisc, // i2c tris port + SSP_TYPE_MSSP + ); + //1portc.ccp1con = &ccp1con; + //1portc.usart = &usart16; +} + +P18C4x2::P18C4x2(const char *_name, const char *desc) + : _16bit_compat_adc(_name,desc) +{ + m_portd = new PicPSP_PortRegister(this,"portd","",8,0xff); + m_trisd = new PicTrisRegister(this,"trisd","", (PicPortRegister *)m_portd, false); + m_latd = new PicLatchRegister(this,"latd","",m_portd); + + m_porte = new PicPortRegister(this,"porte","",8,0x07); + m_trise = new PicPSP_TrisRegister(this,"trise","", m_porte, false); + m_late = new PicLatchRegister(this,"late","",m_porte); + +} +P18C4x2::~P18C4x2() +{ + delete_sfr_register(m_portd); + delete_sfr_register(m_porte); + + delete_sfr_register(m_latd); + delete_sfr_register(m_late); + + delete_sfr_register(m_trisd); + delete_sfr_register(m_trise); +} + + +void P18C4x2::create_sfr_map() +{ + _16bit_processor::create_sfr_map(); + + RegisterValue porv(0,0); + + // Assume this should follow the old behaviour as it's an old chip + osccon->por_value = porv; + + add_sfr_register(m_portd, 0xf83,porv); + add_sfr_register(m_porte, 0xf84,porv); + + add_sfr_register(m_latd, 0xf8c,porv); + add_sfr_register(m_late, 0xf8d,porv); + + add_sfr_register(m_trisd, 0xf95,RegisterValue(0xff,0)); + add_sfr_register(m_trise, 0xf96,RegisterValue(0x07,0)); + + // rest of configureation in parent class + adcon1->setNumberOfChannels(8); + adcon1->setIOPin(5, &(*m_porte)[0]); + adcon1->setIOPin(6, &(*m_porte)[1]); + adcon1->setIOPin(7, &(*m_porte)[2]); + init_pir2(pir2, PIR2v2::TMR3IF); + tmr3l.setIOpin(&(*m_portc)[0]); + + //1 usart16.initialize_16(this,&pir_set_def,&portc); +} + +//------------------------------------------------------------------------ +// +P18C442::P18C442(const char *_name, const char *desc) + : P18C4x2(_name,desc) +{ +} + +void P18C442::create() +{ + P18C4x2::create(); + + set_osc_pin_Number(0,13, NULL); + set_osc_pin_Number(1,14, &(*m_porta)[6]); +} + +Processor * P18C442::construct(const char *name) +{ + P18C442 *p = new P18C442(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18C452::P18C452(const char *_name, const char *desc) + : P18C442(_name,desc) +{ +} + +void P18C452::create() +{ + P18C442::create(); +} + +Processor * P18C452::construct(const char *name) +{ + P18C452 *p = new P18C452(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F242::P18F242(const char *_name, const char *desc) + : P18C242(_name,desc) +{ +} + +void P18F242::create() +{ + tbl.initialize ( eeprom_memory_size(), 32, 4, CONFIG1L, false); + tbl.set_intcon(&intcon); + set_eeprom_pir(&tbl); + tbl.set_pir(pir2); + tbl.eecon1.set_valid_bits(0xbf); + + P18C242::create(); +} + +Processor * P18F242::construct(const char *name) +{ + P18F242 *p = new P18F242(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F252::P18F252(const char *_name, const char *desc) + : P18F242(_name,desc) +{ +} + +void P18F252::create() +{ + P18F242::create(); +} +Processor * P18F252::construct(const char *name) +{ + P18F252 *p = new P18F252(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F442::P18F442(const char *_name, const char *desc) + : P18C442(_name,desc) +{ +} + +void P18F442::create() +{ + tbl.initialize ( eeprom_memory_size(), 32, 4, CONFIG1L, false); + tbl.set_intcon(&intcon); + set_eeprom_pir(&tbl); + tbl.set_pir(pir2); + tbl.eecon1.set_valid_bits(0xbf); + + P18C442::create(); +} + +Processor * P18F442::construct(const char *name) +{ + P18F442 *p = new P18F442(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F248::P18F248(const char *_name, const char *desc) + : P18F242(_name,desc) +{ +} + +void P18F248::create() +{ + P18F242::create(); +} + +Processor * P18F248::construct(const char *name) +{ + P18F248 *p = new P18F248(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F258::P18F258(const char *_name, const char *desc) + : P18F252(_name,desc) +{ +} + +void P18F258::create() +{ + P18F252::create(); +} + +Processor * P18F258::construct(const char *name) +{ + P18F258 *p = new P18F258(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F448::P18F448(const char *_name, const char *desc) + : P18F442(_name,desc) +{ +} + +void P18F448::create() +{ + P18F442::create(); +} + +Processor * P18F448::construct(const char *name) +{ + P18F448 *p = new P18F448(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F452::P18F452(const char *_name, const char *desc) + : P18F442(_name,desc) +{ +} + +void P18F452::create() +{ + P18F442::create(); +} + +Processor * P18F452::construct(const char *name) +{ + P18F452 *p = new P18F452(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F458::P18F458(const char *_name, const char *desc) + : P18F452(_name,desc) +{ +} + +void P18F458::create() +{ + P18F452::create(); +} + +Processor * P18F458::construct(const char *name) +{ + P18F458 *p = new P18F458(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F2455::P18F2455(const char *_name, const char *desc) + : P18F2x21(_name,desc), + ufrml(this, "ufrml", "USB Frame Number register Low" ), + ufrmh(this, "ufrmh", "USB Frame Number register High" ), + uir (this, "uir" , "USB Interrupt Status register" ), + uie (this, "uie" , "USB Interrupt Enable register" ), + ueir (this, "ueir" , "USB Error Interrupt Status register"), + ueie (this, "ueie" , "USB Error Interrupt Enable register"), + ustat(this, "ustat", "USB Transfer Status register" ), + ucon (this, "ucon" , "USB Control register" ), + uaddr(this, "uaddr", "USB Device Address register" ), + ucfg (this, "ucfg" , "USB Configuration register" ), + uep0 (this, "uep0" , "USB Endpoint 0 Enable register" ), + uep1 (this, "uep1" , "USB Endpoint 1 Enable register" ), + uep2 (this, "uep2" , "USB Endpoint 2 Enable register" ), + uep3 (this, "uep3" , "USB Endpoint 3 Enable register" ), + uep4 (this, "uep4" , "USB Endpoint 4 Enable register" ), + uep5 (this, "uep5" , "USB Endpoint 5 Enable register" ), + uep6 (this, "uep6" , "USB Endpoint 6 Enable register" ), + uep7 (this, "uep7" , "USB Endpoint 7 Enable register" ), + uep8 (this, "uep8" , "USB Endpoint 8 Enable register" ), + uep9 (this, "uep9" , "USB Endpoint 9 Enable register" ), + uep10(this, "uep10", "USB Endpoint 10 Enable register" ), + uep11(this, "uep11", "USB Endpoint 11 Enable register" ), + uep12(this, "uep12", "USB Endpoint 12 Enable register" ), + uep13(this, "uep13", "USB Endpoint 13 Enable register" ), + uep14(this, "uep14", "USB Endpoint 14 Enable register" ), + uep15(this, "uep15", "USB Endpoint 15 Enable register" ) +{ + cout << "\nP18F2455 does not support USB registers and functionality\n\n"; +} + +P18F2455::~P18F2455() +{ + remove_sfr_register(&ufrml); + remove_sfr_register(&ufrmh); + remove_sfr_register(&uir ); + remove_sfr_register(&uie ); + remove_sfr_register(&ueir ); + remove_sfr_register(&ueie ); + remove_sfr_register(&ustat); + remove_sfr_register(&ucon ); + remove_sfr_register(&uaddr); + remove_sfr_register(&ucfg ); + remove_sfr_register(&uep0 ); + remove_sfr_register(&uep1 ); + remove_sfr_register(&uep2 ); + remove_sfr_register(&uep3 ); + remove_sfr_register(&uep4 ); + remove_sfr_register(&uep5 ); + remove_sfr_register(&uep6 ); + remove_sfr_register(&uep7 ); + remove_sfr_register(&uep8 ); + remove_sfr_register(&uep9 ); + remove_sfr_register(&uep10); + remove_sfr_register(&uep11); + remove_sfr_register(&uep12); + remove_sfr_register(&uep13); + remove_sfr_register(&uep14); + remove_sfr_register(&uep15); +} +void P18F2455::create_sfr_map() +{ + P18F2x21::create_sfr_map(); + package->destroy_pin(14); + package->assign_pin(14, 0, false); // Vusb + + /* The MSSP/I2CC pins are different on this chip. */ + ssp.initialize(&pir_set_def, // PIR + &(*m_portb)[1], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[7], // SDO + &(*m_portb)[0], // SDI + m_trisb, // i2c tris port + SSP_TYPE_MSSP + ); + add_sfr_register(&ufrml,0x0F66, RegisterValue(0,0),"ufrm"); + add_sfr_register(&ufrmh,0X0F67, RegisterValue(0,0)); + add_sfr_register(&uir ,0x0F68, RegisterValue(0,0)); + add_sfr_register(&uie ,0x0F69, RegisterValue(0,0)); + add_sfr_register(&ueir ,0x0F6A, RegisterValue(0,0)); + add_sfr_register(&ueie ,0x0F6B, RegisterValue(0,0)); + add_sfr_register(&ustat,0X0F6C, RegisterValue(0,0)); + add_sfr_register(&ucon ,0x0F6D, RegisterValue(0,0)); + add_sfr_register(&uaddr,0X0F6E, RegisterValue(0,0)); + add_sfr_register(&ucfg ,0x0F6F, RegisterValue(0,0)); + add_sfr_register(&uep0 ,0x0F70, RegisterValue(0,0)); + add_sfr_register(&uep1 ,0x0F71, RegisterValue(0,0)); + add_sfr_register(&uep2 ,0x0F72, RegisterValue(0,0)); + add_sfr_register(&uep3 ,0x0F73, RegisterValue(0,0)); + add_sfr_register(&uep4 ,0x0F74, RegisterValue(0,0)); + add_sfr_register(&uep5 ,0x0F75, RegisterValue(0,0)); + add_sfr_register(&uep6 ,0x0F76, RegisterValue(0,0)); + add_sfr_register(&uep7 ,0x0F77, RegisterValue(0,0)); + add_sfr_register(&uep8 ,0x0F78, RegisterValue(0,0)); + add_sfr_register(&uep9 ,0x0F79, RegisterValue(0,0)); + add_sfr_register(&uep10,0x0F7A, RegisterValue(0,0)); + add_sfr_register(&uep11,0x0F7B, RegisterValue(0,0)); + add_sfr_register(&uep12,0x0F7C, RegisterValue(0,0)); + add_sfr_register(&uep13,0x0F7D, RegisterValue(0,0)); + add_sfr_register(&uep14,0x0F7E, RegisterValue(0,0)); + add_sfr_register(&uep15,0x0F7F, RegisterValue(0,0)); +} + +Processor * P18F2455::construct(const char *name) +{ + P18F2455 *p = new P18F2455(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +// P18F2550 - 28 pin +// + +P18F2550::P18F2550(const char *_name, const char *desc) + : P18F2x21(_name,desc), + ufrml(this, "ufrml", "USB Frame Number register Low" ), + ufrmh(this, "ufrmh", "USB Frame Number register High" ), + uir (this, "uir" , "USB Interrupt Status register" ), + uie (this, "uie" , "USB Interrupt Enable register" ), + ueir (this, "ueir" , "USB Error Interrupt Status register"), + ueie (this, "ueie" , "USB Error Interrupt Enable register"), + ustat(this, "ustat", "USB Transfer Status register" ), + ucon (this, "ucon" , "USB Control register" ), + uaddr(this, "uaddr", "USB Device Address register" ), + ucfg (this, "ucfg" , "USB Configuration register" ), + uep0 (this, "uep0" , "USB Endpoint 0 Enable register" ), + uep1 (this, "uep1" , "USB Endpoint 1 Enable register" ), + uep2 (this, "uep2" , "USB Endpoint 2 Enable register" ), + uep3 (this, "uep3" , "USB Endpoint 3 Enable register" ), + uep4 (this, "uep4" , "USB Endpoint 4 Enable register" ), + uep5 (this, "uep5" , "USB Endpoint 5 Enable register" ), + uep6 (this, "uep6" , "USB Endpoint 6 Enable register" ), + uep7 (this, "uep7" , "USB Endpoint 7 Enable register" ), + uep8 (this, "uep8" , "USB Endpoint 8 Enable register" ), + uep9 (this, "uep9" , "USB Endpoint 9 Enable register" ), + uep10(this, "uep10", "USB Endpoint 10 Enable register" ), + uep11(this, "uep11", "USB Endpoint 11 Enable register" ), + uep12(this, "uep12", "USB Endpoint 12 Enable register" ), + uep13(this, "uep13", "USB Endpoint 13 Enable register" ), + uep14(this, "uep14", "USB Endpoint 14 Enable register" ), + uep15(this, "uep15", "USB Endpoint 15 Enable register" ) +{ + cout << "\nP18F2550 does not support USB registers and functionality\n\n"; +} + +P18F2550::~P18F2550() +{ + remove_sfr_register(&ufrml); + remove_sfr_register(&ufrmh); + remove_sfr_register(&uir ); + remove_sfr_register(&uie ); + remove_sfr_register(&ueir ); + remove_sfr_register(&ueie ); + remove_sfr_register(&ustat); + remove_sfr_register(&ucon ); + remove_sfr_register(&uaddr); + remove_sfr_register(&ucfg ); + remove_sfr_register(&uep0 ); + remove_sfr_register(&uep1 ); + remove_sfr_register(&uep2 ); + remove_sfr_register(&uep3 ); + remove_sfr_register(&uep4 ); + remove_sfr_register(&uep5 ); + remove_sfr_register(&uep6 ); + remove_sfr_register(&uep7 ); + remove_sfr_register(&uep8 ); + remove_sfr_register(&uep9 ); + remove_sfr_register(&uep10); + remove_sfr_register(&uep11); + remove_sfr_register(&uep12); + remove_sfr_register(&uep13); + remove_sfr_register(&uep14); + remove_sfr_register(&uep15); +} +void P18F2550::create_sfr_map() +{ + P18F2x21::create_sfr_map(); + package->destroy_pin(14); + package->assign_pin(14, 0, false); // Vusb + + /* The MSSP/I2CC pins are different on this chip. */ + ssp.initialize(&pir_set_def, // PIR + &(*m_portb)[1], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[7], // SDO + &(*m_portb)[0], // SDI + m_trisb, // i2c tris port + SSP_TYPE_MSSP + ); + add_sfr_register(&ufrml,0x0F66, RegisterValue(0,0),"ufrm"); + add_sfr_register(&ufrmh,0X0F67, RegisterValue(0,0)); + add_sfr_register(&uir ,0x0F68, RegisterValue(0,0)); + add_sfr_register(&uie ,0x0F69, RegisterValue(0,0)); + add_sfr_register(&ueir ,0x0F6A, RegisterValue(0,0)); + add_sfr_register(&ueie ,0x0F6B, RegisterValue(0,0)); + add_sfr_register(&ustat,0X0F6C, RegisterValue(0,0)); + add_sfr_register(&ucon ,0x0F6D, RegisterValue(0,0)); + add_sfr_register(&uaddr,0X0F6E, RegisterValue(0,0)); + add_sfr_register(&ucfg ,0x0F6F, RegisterValue(0,0)); + add_sfr_register(&uep0 ,0x0F70, RegisterValue(0,0)); + add_sfr_register(&uep1 ,0x0F71, RegisterValue(0,0)); + add_sfr_register(&uep2 ,0x0F72, RegisterValue(0,0)); + add_sfr_register(&uep3 ,0x0F73, RegisterValue(0,0)); + add_sfr_register(&uep4 ,0x0F74, RegisterValue(0,0)); + add_sfr_register(&uep5 ,0x0F75, RegisterValue(0,0)); + add_sfr_register(&uep6 ,0x0F76, RegisterValue(0,0)); + add_sfr_register(&uep7 ,0x0F77, RegisterValue(0,0)); + add_sfr_register(&uep8 ,0x0F78, RegisterValue(0,0)); + add_sfr_register(&uep9 ,0x0F79, RegisterValue(0,0)); + add_sfr_register(&uep10,0x0F7A, RegisterValue(0,0)); + add_sfr_register(&uep11,0x0F7B, RegisterValue(0,0)); + add_sfr_register(&uep12,0x0F7C, RegisterValue(0,0)); + add_sfr_register(&uep13,0x0F7D, RegisterValue(0,0)); + add_sfr_register(&uep14,0x0F7E, RegisterValue(0,0)); + add_sfr_register(&uep15,0x0F7F, RegisterValue(0,0)); +} + +Processor * P18F2550::construct(const char *name) +{ + P18F2550 *p = new P18F2550(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +// P18F4455 +// + +P18F4455::P18F4455(const char *_name, const char *desc) + : P18F4x21(_name,desc), + ufrml(this, "ufrml", "USB Frame Number register Low" ), + ufrmh(this, "ufrmh", "USB Frame Number register High" ), + uir (this, "uir" , "USB Interrupt Status register" ), + uie (this, "uie" , "USB Interrupt Enable register" ), + ueir (this, "ueir" , "USB Error Interrupt Status register"), + ueie (this, "ueie" , "USB Error Interrupt Enable register"), + ustat(this, "ustat", "USB Transfer Status register" ), + ucon (this, "ucon" , "USB Control register" ), + uaddr(this, "uaddr", "USB Device Address register" ), + ucfg (this, "ucfg" , "USB Configuration register" ), + uep0 (this, "uep0" , "USB Endpoint 0 Enable register" ), + uep1 (this, "uep1" , "USB Endpoint 1 Enable register" ), + uep2 (this, "uep2" , "USB Endpoint 2 Enable register" ), + uep3 (this, "uep3" , "USB Endpoint 3 Enable register" ), + uep4 (this, "uep4" , "USB Endpoint 4 Enable register" ), + uep5 (this, "uep5" , "USB Endpoint 5 Enable register" ), + uep6 (this, "uep6" , "USB Endpoint 6 Enable register" ), + uep7 (this, "uep7" , "USB Endpoint 7 Enable register" ), + uep8 (this, "uep8" , "USB Endpoint 8 Enable register" ), + uep9 (this, "uep9" , "USB Endpoint 9 Enable register" ), + uep10(this, "uep10", "USB Endpoint 10 Enable register" ), + uep11(this, "uep11", "USB Endpoint 11 Enable register" ), + uep12(this, "uep12", "USB Endpoint 12 Enable register" ), + uep13(this, "uep13", "USB Endpoint 13 Enable register" ), + uep14(this, "uep14", "USB Endpoint 14 Enable register" ), + uep15(this, "uep15", "USB Endpoint 15 Enable register" ), + sppcon(this, "sppcon", "Streaming Parallel port control register"), + sppcfg(this, "sppcfg", "Streaming Parallel port configuration register"), + sppeps(this, "sppeps", "SPP ENDPOINT ADDRESS AND STATUS REGISTER"), + sppdata(this, "sppdata", "Streaming Parallel port data register") + +{ + cout << "\nP18F4455 does not support USB registers and functionality\n\n"; +} + +P18F4455::~P18F4455() +{ + remove_sfr_register(&ufrml); + remove_sfr_register(&ufrmh); + remove_sfr_register(&uir ); + remove_sfr_register(&uie ); + remove_sfr_register(&ueir ); + remove_sfr_register(&ueie ); + remove_sfr_register(&ustat); + remove_sfr_register(&ucon ); + remove_sfr_register(&uaddr); + remove_sfr_register(&ucfg ); + remove_sfr_register(&uep0 ); + remove_sfr_register(&uep1 ); + remove_sfr_register(&uep2 ); + remove_sfr_register(&uep3 ); + remove_sfr_register(&uep4 ); + remove_sfr_register(&uep5 ); + remove_sfr_register(&uep6 ); + remove_sfr_register(&uep7 ); + remove_sfr_register(&uep8 ); + remove_sfr_register(&uep9 ); + remove_sfr_register(&uep10); + remove_sfr_register(&uep11); + remove_sfr_register(&uep12); + remove_sfr_register(&uep13); + remove_sfr_register(&uep14); + remove_sfr_register(&uep15); + remove_sfr_register(&sppcon); + remove_sfr_register(&sppcfg); + remove_sfr_register(&sppeps); + remove_sfr_register(&sppdata); +} + +void P18F4455::create() +{ + P18F4x21::create(); + + package->destroy_pin(18); + package->assign_pin(18, 0, false); // Vusb + + /* The MSSP/I2CC pins are different on this chip. */ + ssp.initialize(&pir_set_def, // PIR + &(*m_portb)[1], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[7], // SDO + &(*m_portb)[0], // SDI + m_trisb, // i2c tris port + SSP_TYPE_MSSP + ); + + // RP: RRR commented out comparator.cmcon.set_eccpas(&eccpas); ?? + // Streaming Parallel port (SPP) + spp.initialize(&pir_set_def, // PIR + m_portd, //Parallel port + m_trisd, //Parallel port tristate register + &sppcon, + &sppcfg, + &sppeps, + &sppdata, + &(*m_porte)[0], // CLK1SPP + &(*m_porte)[1], // CLK2SPP + &(*m_porte)[2], // OESPP + &(*m_portb)[4] // CSSPP + ); + + add_sfr_register(&sppdata,0x0F62, RegisterValue(0,0)); + add_sfr_register(&sppcfg,0x0F63, RegisterValue(0,0)); + add_sfr_register(&sppeps,0x0F64, RegisterValue(0,0)); + add_sfr_register(&sppcon,0x0F65, RegisterValue(0,0)); + add_sfr_register(&ufrml,0x0F66, RegisterValue(0,0),"ufrm"); + add_sfr_register(&ufrmh,0X0F67, RegisterValue(0,0)); + add_sfr_register(&uir ,0x0F68, RegisterValue(0,0)); + add_sfr_register(&uie ,0x0F69, RegisterValue(0,0)); + add_sfr_register(&ueir ,0x0F6A, RegisterValue(0,0)); + add_sfr_register(&ueie ,0x0F6B, RegisterValue(0,0)); + add_sfr_register(&ustat,0X0F6C, RegisterValue(0,0)); + add_sfr_register(&ucon ,0x0F6D, RegisterValue(0,0)); + add_sfr_register(&uaddr,0X0F6E, RegisterValue(0,0)); + add_sfr_register(&ucfg ,0x0F6F, RegisterValue(0,0)); + add_sfr_register(&uep0 ,0x0F70, RegisterValue(0,0)); + add_sfr_register(&uep1 ,0x0F71, RegisterValue(0,0)); + add_sfr_register(&uep2 ,0x0F72, RegisterValue(0,0)); + add_sfr_register(&uep3 ,0x0F73, RegisterValue(0,0)); + add_sfr_register(&uep4 ,0x0F74, RegisterValue(0,0)); + add_sfr_register(&uep5 ,0x0F75, RegisterValue(0,0)); + add_sfr_register(&uep6 ,0x0F76, RegisterValue(0,0)); + add_sfr_register(&uep7 ,0x0F77, RegisterValue(0,0)); + add_sfr_register(&uep8 ,0x0F78, RegisterValue(0,0)); + add_sfr_register(&uep9 ,0x0F79, RegisterValue(0,0)); + add_sfr_register(&uep10,0x0F7A, RegisterValue(0,0)); + add_sfr_register(&uep11,0x0F7B, RegisterValue(0,0)); + add_sfr_register(&uep12,0x0F7C, RegisterValue(0,0)); + add_sfr_register(&uep13,0x0F7D, RegisterValue(0,0)); + add_sfr_register(&uep14,0x0F7E, RegisterValue(0,0)); + add_sfr_register(&uep15,0x0F7F, RegisterValue(0,0)); + + // Initialize the register cross linkages + init_pir2(pir2, PIR2v4::TMR3IF); + + //new InterruptSource(pir2, PIR2v4::USBIF); +} + +Processor * P18F4455::construct(const char *name) +{ + P18F4455 *p = new P18F4455(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F4550::P18F4550(const char *_name, const char *desc) + : P18F4x21(_name,desc), + ufrml(this, "ufrml", "USB Frame Number register Low" ), + ufrmh(this, "ufrmh", "USB Frame Number register High" ), + uir (this, "uir" , "USB Interrupt Status register" ), + uie (this, "uie" , "USB Interrupt Enable register" ), + ueir (this, "ueir" , "USB Error Interrupt Status register"), + ueie (this, "ueie" , "USB Error Interrupt Enable register"), + ustat(this, "ustat", "USB Transfer Status register" ), + ucon (this, "ucon" , "USB Control register" ), + uaddr(this, "uaddr", "USB Device Address register" ), + ucfg (this, "ucfg" , "USB Configuration register" ), + uep0 (this, "uep0" , "USB Endpoint 0 Enable register" ), + uep1 (this, "uep1" , "USB Endpoint 1 Enable register" ), + uep2 (this, "uep2" , "USB Endpoint 2 Enable register" ), + uep3 (this, "uep3" , "USB Endpoint 3 Enable register" ), + uep4 (this, "uep4" , "USB Endpoint 4 Enable register" ), + uep5 (this, "uep5" , "USB Endpoint 5 Enable register" ), + uep6 (this, "uep6" , "USB Endpoint 6 Enable register" ), + uep7 (this, "uep7" , "USB Endpoint 7 Enable register" ), + uep8 (this, "uep8" , "USB Endpoint 8 Enable register" ), + uep9 (this, "uep9" , "USB Endpoint 9 Enable register" ), + uep10(this, "uep10", "USB Endpoint 10 Enable register" ), + uep11(this, "uep11", "USB Endpoint 11 Enable register" ), + uep12(this, "uep12", "USB Endpoint 12 Enable register" ), + uep13(this, "uep13", "USB Endpoint 13 Enable register" ), + uep14(this, "uep14", "USB Endpoint 14 Enable register" ), + uep15(this, "uep15", "USB Endpoint 15 Enable register" ), + sppcon(this, "sppcon", "Streaming Parallel port control register"), + sppcfg(this, "sppcfg", "Streaming Parallel port configuration register"), + sppeps(this, "sppeps", "SPP ENDPOINT ADDRESS AND STATUS REGISTER"), + sppdata(this, "sppdata", "Streaming Parallel port data register") + +{ + cout << "\nP18F4550 does not support USB registers and functionality\n\n"; +} + +P18F4550::~P18F4550() +{ + remove_sfr_register(&ufrml); + remove_sfr_register(&ufrmh); + remove_sfr_register(&uir ); + remove_sfr_register(&uie ); + remove_sfr_register(&ueir ); + remove_sfr_register(&ueie ); + remove_sfr_register(&ustat); + remove_sfr_register(&ucon ); + remove_sfr_register(&uaddr); + remove_sfr_register(&ucfg ); + remove_sfr_register(&uep0 ); + remove_sfr_register(&uep1 ); + remove_sfr_register(&uep2 ); + remove_sfr_register(&uep3 ); + remove_sfr_register(&uep4 ); + remove_sfr_register(&uep5 ); + remove_sfr_register(&uep6 ); + remove_sfr_register(&uep7 ); + remove_sfr_register(&uep8 ); + remove_sfr_register(&uep9 ); + remove_sfr_register(&uep10); + remove_sfr_register(&uep11); + remove_sfr_register(&uep12); + remove_sfr_register(&uep13); + remove_sfr_register(&uep14); + remove_sfr_register(&uep15); + remove_sfr_register(&sppcon); + remove_sfr_register(&sppcfg); + remove_sfr_register(&sppeps); + remove_sfr_register(&sppdata); +} + +void P18F4550::create() +{ + P18F4x21::create(); + + package->destroy_pin(18); + package->assign_pin(18, 0, false); // Vusb + + /* The MSSP/I2CC pins are different on this chip. */ + ssp.initialize(&pir_set_def, // PIR + &(*m_portb)[1], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[7], // SDO + &(*m_portb)[0], // SDI + m_trisb, // i2c tris port + SSP_TYPE_MSSP + ); + + // Streaming Parallel port (SPP) + spp.initialize(&pir_set_def, // PIR + m_portd, //Parallel port + m_trisd, //Parallel port tristate register + &sppcon, + &sppcfg, + &sppeps, + &sppdata, + &(*m_porte)[0], // CLK1SPP + &(*m_porte)[1], // CLK2SPP + &(*m_porte)[2], // OESPP + &(*m_portb)[4] // CSSPP + ); + + // RP: RRR commented out comparator.cmcon.set_eccpas(&eccpas); ?? + add_sfr_register(&sppdata,0x0F62, RegisterValue(0,0)); + add_sfr_register(&sppcfg,0x0F63, RegisterValue(0,0)); + add_sfr_register(&sppeps,0x0F64, RegisterValue(0,0)); + add_sfr_register(&sppcon,0x0F65, RegisterValue(0,0)); + add_sfr_register(&ufrml,0x0F66, RegisterValue(0,0),"ufrm"); + add_sfr_register(&ufrmh,0X0F67, RegisterValue(0,0)); + add_sfr_register(&uir ,0x0F68, RegisterValue(0,0)); + add_sfr_register(&uie ,0x0F69, RegisterValue(0,0)); + add_sfr_register(&ueir ,0x0F6A, RegisterValue(0,0)); + add_sfr_register(&ueie ,0x0F6B, RegisterValue(0,0)); + add_sfr_register(&ustat,0X0F6C, RegisterValue(0,0)); + add_sfr_register(&ucon ,0x0F6D, RegisterValue(0,0)); + add_sfr_register(&uaddr,0X0F6E, RegisterValue(0,0)); + add_sfr_register(&ucfg ,0x0F6F, RegisterValue(0,0)); + add_sfr_register(&uep0 ,0x0F70, RegisterValue(0,0)); + add_sfr_register(&uep1 ,0x0F71, RegisterValue(0,0)); + add_sfr_register(&uep2 ,0x0F72, RegisterValue(0,0)); + add_sfr_register(&uep3 ,0x0F73, RegisterValue(0,0)); + add_sfr_register(&uep4 ,0x0F74, RegisterValue(0,0)); + add_sfr_register(&uep5 ,0x0F75, RegisterValue(0,0)); + add_sfr_register(&uep6 ,0x0F76, RegisterValue(0,0)); + add_sfr_register(&uep7 ,0x0F77, RegisterValue(0,0)); + add_sfr_register(&uep8 ,0x0F78, RegisterValue(0,0)); + add_sfr_register(&uep9 ,0x0F79, RegisterValue(0,0)); + add_sfr_register(&uep10,0x0F7A, RegisterValue(0,0)); + add_sfr_register(&uep11,0x0F7B, RegisterValue(0,0)); + add_sfr_register(&uep12,0x0F7C, RegisterValue(0,0)); + add_sfr_register(&uep13,0x0F7D, RegisterValue(0,0)); + add_sfr_register(&uep14,0x0F7E, RegisterValue(0,0)); + add_sfr_register(&uep15,0x0F7F, RegisterValue(0,0)); + + // Initialize the register cross linkages + + //new InterruptSource(pir2, PIR2v4::USBIF); +} + +Processor * P18F4550::construct(const char *name) +{ + P18F4550 *p = new P18F4550(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +Processor * P18F1220::construct(const char *name) +{ + P18F1220 *p = new P18F1220(name); + p->create(); + p->create_invalid_registers(); + + return p; +} + +void P18F1220::create() +{ + tbl.initialize ( eeprom_memory_size(), 32, 4, CONFIG1L, false); + tbl.set_intcon(&intcon); + set_eeprom_pir(&tbl); + tbl.set_pir(pir2); + tbl.eecon1.set_valid_bits(0xbf); + + create_iopin_map(); + + _16bit_processor::create(); + _16bit_v2_adc::create(7); + osccon->value = RegisterValue(0x00,0); + osccon->por_value = RegisterValue(0x00,0); + osccon->has_iofs_bit = true; + usart.txsta.setIOpin(&(*m_portb)[1]); + usart.rcsta.setIOpin(&(*m_portb)[4]); + adcon1->setIOPin(4, &(*m_portb)[0]); + adcon1->setIOPin(5, &(*m_portb)[1]); + adcon1->setIOPin(6, &(*m_portb)[4]); + adcon1->setValidCfgBits(0x7f, 0); + adcon0->setChannel_Mask(0x7); + adcon1->setAdcon0(adcon0); // VCFG0, VCFG1 in adcon0 + remove_sfr_register(&ssp.sspcon2); + remove_sfr_register(&ssp.sspcon); + remove_sfr_register(&ssp.sspstat); + remove_sfr_register(&ssp.sspadd); + remove_sfr_register(&ssp.sspbuf); + + add_sfr_register(&osctune, 0xf9b,RegisterValue(0,0)); + osccon->set_osctune(&osctune); + osctune.set_osccon(osccon); + + + set_osc_pin_Number(0,16, &(*m_porta)[7]); + set_osc_pin_Number(1,15, &(*m_porta)[6]); + m_configMemory->addConfigWord(CONFIG1H-CONFIG1L,new Config1H_4bits(this, CONFIG1H, 0xcf)); + m_configMemory->addConfigWord(CONFIG3H-CONFIG1L,new Config3H_1x20(this, CONFIG3H, 0x80)); + + add_sfr_register(&usart.spbrgh, 0xfb0,RegisterValue(0,0),"spbrgh"); + add_sfr_register(&usart.baudcon, 0xfaa,RegisterValue(0,0),"baudctl"); + usart.set_eusart(true); + + add_sfr_register(&pwm1con, 0xfb7, RegisterValue(0,0)); + add_sfr_register(&eccpas, 0xfb6, RegisterValue(0,0)); + ccp1con.setBitMask(0xff); + ccp1con.setCrosslinks(&ccpr1l, &pir1, PIR1v2::CCP1IF, &tmr2, &eccpas); + eccpas.setIOpin(&(*m_portb)[1], &(*m_portb)[2], &(*m_portb)[0]); + eccpas.link_registers(&pwm1con, &ccp1con); + ccp1con.pwm1con = &pwm1con; + ccp1con.setIOpin(&((*m_portb)[3]), &((*m_portb)[2]), &((*m_portb)[6]), &((*m_portb)[7])); + init_pir2(pir2, PIR2v2::TMR3IF); + tmr3l.setIOpin(&(*m_portb)[6]); +} +//------------------------------------------------------------------------ +void P18F1220::create_iopin_map() +{ + package = new Package(18); + + if(!package) + return; + + package->assign_pin( 1, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 6, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 7, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional("porta4"),4)); + package->assign_pin( 4, m_porta->addPin(new IO_open_collector("porta5"),5)); + package->assign_pin(15, m_porta->addPin(new IO_bi_directional("porta6"),6)); + package->assign_pin(16, m_porta->addPin(new IO_bi_directional("porta7"),7)); + + package->assign_pin( 8, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin( 9, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin(17, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin(18, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(10, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(11, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(12, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(13, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + + package->assign_pin(5, 0); + package->assign_pin(14, 0); +} + +P18F1220::P18F1220(const char *_name, const char *desc) + : _16bit_v2_adc(_name,desc), + osctune(this, "osctune", "OSC Tune"), + eccpas(this, "eccpas", "ECCP Auto-Shutdown Control Register"), + pwm1con(this, "pwm1con", "Enhanced PWM Control Register") +{ +} + +P18F1220::~P18F1220() +{ + remove_sfr_register(&usart.spbrgh); + remove_sfr_register(&usart.baudcon); + remove_sfr_register(&osctune); + remove_sfr_register(&pwm1con); + remove_sfr_register(&eccpas); +} + +void P18F1220::osc_mode(uint value) +{ + IOPIN *m_pin; + uint pin_Number = get_osc_pin_Number(0); + uint fosc = value & (FOSC3 | FOSC2 | FOSC1 | FOSC0); + + if (osccon) + { + osccon->set_config_irc(fosc >= 8 && fosc <= 9); + osccon->set_config_xosc(fosc > 9 || fosc < 3 || fosc == 6); + osccon->set_config_ieso(value & IESO); + } + + value &= (FOSC3 | FOSC2 | FOSC1 | FOSC0); + set_int_osc(false); + if (pin_Number < 253) + { + m_pin = package->get_pin(pin_Number); + if (value == 8 || value == 9) + { + clr_clk_pin(pin_Number, get_osc_PinMonitor(0), + m_porta, m_trisa, m_lata); + set_int_osc(true); + } + else + { + set_clk_pin(pin_Number, get_osc_PinMonitor(0), "OSC1", true, + m_porta, m_trisa, m_lata); + } + } + if ( (pin_Number = get_osc_pin_Number(1)) < 253 && + (m_pin = package->get_pin(pin_Number))) + { + pll_factor = 0; + switch(value) + { + case 6: + pll_factor = 2; + case 0: + case 1: + case 2: + set_clk_pin(pin_Number, get_osc_PinMonitor(1), "OSC2", true, + m_porta, m_trisa, m_lata); + break; + + case 4: + case 9: + case 12: + case 13: + case 14: + case 15: + cout << "CLKO not simulated\n"; + set_clk_pin(pin_Number, get_osc_PinMonitor(1) , "CLKO", false, + m_porta, m_trisa, m_lata); + break; + + default: + clr_clk_pin(pin_Number, get_osc_PinMonitor(1), + m_porta, m_trisa, m_lata); + break; + } + } + +} + +//------------------------------------------------------------------------ +// +P18F1320::P18F1320(const char *_name, const char *desc) + : P18F1220(_name,desc) +{ +} + +void P18F1320::create() +{ + P18F1220::create(); +} + +Processor * P18F1320::construct(const char *name) +{ + P18F1320 *p = new P18F1320(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//======================================================================== +// +void P18F2x21::create() +{ + delete pir2; + pir2 = (PIR2v2 *)(new PIR2v4(this, "pir2" , "Peripheral Interrupt Register",0,0 )); + + tbl.initialize ( eeprom_memory_size(), 32, 4, CONFIG1L, false); + tbl.set_intcon(&intcon); + set_eeprom_pir(&tbl); + tbl.set_pir(pir2); + tbl.eecon1.set_valid_bits(0xbf); + create_iopin_map(); + + _16bit_processor::create(); + + m_configMemory->addConfigWord(CONFIG3H-CONFIG1L,new Config3H_2x21(this, CONFIG3H, 0x83)); + m_configMemory->addConfigWord(CONFIG1H-CONFIG1L,new Config1H_4bits(this, CONFIG1H, 0x07)); + + set_osc_pin_Number(0, 9, &(*m_porta)[7]); + set_osc_pin_Number(1,10, &(*m_porta)[6]); + + + + /// @bug registers not present on 28 pin according to table 5-1 of the + /// data sheet, but bit-restricted according to section 16.4.7 + add_sfr_register(&pwm1con, 0xfb7, RegisterValue(0,0)); + add_sfr_register(&eccpas, 0xfb6, RegisterValue(0,0)); + + eccpas.setBitMask(0xfc); + eccpas.setIOpin(0, 0, &(*m_portb)[0]); + eccpas.link_registers(&pwm1con, &ccp1con); + comparator.cmcon.set_eccpas(&eccpas); + ccp1con.setBitMask(0x3f); + ccp1con.setCrosslinks(&ccpr1l, &pir1, PIR1v2::CCP1IF, &tmr2, &eccpas); + ccp1con.pwm1con = &pwm1con; + ccp1con.setIOpin(&((*m_portc)[2]), 0, 0, 0); + pwm1con.setBitMask(0x80); +} + +//------------------------------------------------------------------------ +void P18F2x21::create_iopin_map() +{ + package = new Package(28); + + if(!package) + return; + + // Build the links between the I/O Ports and their tris registers. + + package->assign_pin( 1, m_porte->addPin(new IO_bi_directional("porte3"),3)); + + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 4, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 5, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 6, m_porta->addPin(new IO_open_collector("porta4"),4)); // %%%FIXME - is this O/C ? + package->assign_pin( 7, m_porta->addPin(new IO_bi_directional("porta5"),5)); + + + + package->assign_pin(8, 0); // Vss + package->assign_pin(9, m_porta->addPin(new IO_bi_directional("porta7"),7)); // OSC1 + + package->assign_pin(10, m_porta->addPin(new IO_bi_directional("porta6"),6)); + + package->assign_pin(11, m_portc->addPin(new IO_bi_directional("portc0"),0)); + package->assign_pin(12, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(13, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin(14, m_portc->addPin(new IO_bi_directional("portc3"),3)); + package->assign_pin(15, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin(16, m_portc->addPin(new IO_bi_directional("portc5"),5)); + package->assign_pin(17, m_portc->addPin(new IO_bi_directional("portc6"),6)); + package->assign_pin(18, m_portc->addPin(new IO_bi_directional("portc7"),7)); + + package->assign_pin(19, 0); // Vss + package->assign_pin(20, 0); // Vdd + + package->assign_pin(21, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin(22, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin(23, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin(24, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(25, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(26, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(27, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(28, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + + tmr1l.setIOpin(&(*m_portc)[0]); + ssp.initialize(&pir_set_def, // PIR + &(*m_portc)[3], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[5], // SDO + &(*m_portc)[4], // SDI + m_trisc, // i2c tris port + SSP_TYPE_MSSP + ); + + + //1portc.usart = &usart16; +} + +P18F2x21::P18F2x21(const char *_name, const char *desc) + : _16bit_v2_adc(_name,desc), + eccpas(this, "eccp1as", "ECCP Auto-Shutdown Control Register"), + pwm1con(this, "eccp1del", "Enhanced PWM Control Register"), + osctune(this, "osctune", "OSC Tune"), + comparator(this) +{ + m_porte = new PicPortRegister(this,"porte","",8,0x08); + // No TRIS register for port E on 28-pin devices +} + +P18F2x21::~P18F2x21() +{ + delete_sfr_register(m_porte); + remove_sfr_register(&usart.spbrgh); + remove_sfr_register(&usart.baudcon); + remove_sfr_register(&osctune); + remove_sfr_register(&comparator.cmcon); + remove_sfr_register(&comparator.vrcon); + remove_sfr_register(&pwm1con); + remove_sfr_register(&eccpas); +} + +void P18F2x21::create_sfr_map() +{ + _16bit_processor::create_sfr_map(); + _16bit_v2_adc::create(13); + + RegisterValue porv(0,0); + + add_sfr_register(m_porte, 0xf84,porv); + + adcon1->setIOPin(4, &(*m_porta)[5]); +/* Not on 28 pin processors + adcon1->setIOPin(5, &(*m_porte)[0]); + adcon1->setIOPin(6, &(*m_porte)[1]); + adcon1->setIOPin(7, &(*m_porte)[2]); +*/ + adcon1->setIOPin(8, &(*m_portb)[2]); + adcon1->setIOPin(9, &(*m_portb)[3]); + adcon1->setIOPin(10, &(*m_portb)[1]); + adcon1->setIOPin(11, &(*m_portb)[4]); + adcon1->setIOPin(12, &(*m_portb)[0]); + + add_sfr_register(&osctune, 0xf9b,porv); + osccon->set_osctune(&osctune); + osccon->has_iofs_bit = true; + osctune.set_osccon(osccon); + + // rest of configuration in parent class + + // Link the comparator and voltage ref to porta + comparator.initialize(&pir_set_def, &(*m_porta)[2], &(*m_porta)[0], + &(*m_porta)[1], &(*m_porta)[2], &(*m_porta)[3], &(*m_porta)[4], + &(*m_porta)[5]); + + comparator.cmcon.set_configuration(1, 0, AN0, AN3, AN0, AN3, ZERO); + comparator.cmcon.set_configuration(2, 0, AN1, AN2, AN1, AN2, ZERO); + comparator.cmcon.set_configuration(1, 1, AN0, AN3, AN0, AN3, OUT0); + comparator.cmcon.set_configuration(2, 1, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(1, 2, AN0, AN3, AN0, AN3, NO_OUT); + comparator.cmcon.set_configuration(2, 2, AN1, AN2, AN1, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 3, AN0, AN3, AN0, AN3, OUT0); + comparator.cmcon.set_configuration(2, 3, AN1, AN2, AN1, AN2, OUT1); + comparator.cmcon.set_configuration(1, 4, AN0, AN3, AN0, AN3, NO_OUT); + comparator.cmcon.set_configuration(2, 4, AN1, AN3, AN1, AN3, NO_OUT); + comparator.cmcon.set_configuration(1, 5, AN0, AN3, AN0, AN3, OUT0); + comparator.cmcon.set_configuration(2, 5, AN1, AN3, AN1, AN3, OUT1); + comparator.cmcon.set_configuration(1, 6, AN0, VREF, AN3, VREF, NO_OUT); + comparator.cmcon.set_configuration(2, 6, AN1, VREF, AN2, VREF, NO_OUT); + comparator.cmcon.set_configuration(1, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + + add_sfr_register(&comparator.cmcon, 0xfb4, RegisterValue(7,0),"cmcon"); + add_sfr_register(&comparator.vrcon, 0xfb5, RegisterValue(0,0),"cvrcon"); + + ccp2con.setCrosslinks(&ccpr2l, pir2, PIR2v2::CCP2IF, &tmr2); +// ccp2con.setIOpin(&((*m_portc)[1])); // handled by Config3H_2x21 + ccpr2l.ccprh = &ccpr2h; + ccpr2l.tmrl = &tmr1l; + ccpr2h.ccprl = &ccpr2l; + + //1 usart16.initialize_16(this,&pir_set_def,&portc); + add_sfr_register(&usart.spbrgh, 0xfb0,porv,"spbrgh"); + add_sfr_register(&usart.baudcon, 0xfb8,porv,"baudcon"); + usart.set_eusart(true); + init_pir2(pir2, PIR2v4::TMR3IF); + tmr3l.setIOpin(&(*m_portc)[0]); +} + +void P18F2x21::osc_mode(uint value) +{ + IOPIN *m_pin; + uint pin_Number = get_osc_pin_Number(0); + uint fosc = value & (FOSC3 | FOSC2 | FOSC1 | FOSC0); + + if (osccon) + { + osccon->set_config_irc(fosc >= 8 && fosc <= 11); + osccon->set_config_xosc(fosc > 11 || fosc < 4); + osccon->set_config_ieso(value & IESO); + } + + value &= (FOSC3 | FOSC2 | FOSC1 | FOSC0); + set_int_osc(false); + if (pin_Number < 253) + { + m_pin = package->get_pin(pin_Number); + if (value == 8 || value == 9) // internal RC clock + { + clr_clk_pin(pin_Number, get_osc_PinMonitor(0), + m_porta, m_trisa, m_lata); + set_int_osc(true); + } + else + { + set_clk_pin(pin_Number, get_osc_PinMonitor(0), "OSC1", true, + m_porta, m_trisa, m_lata); + set_int_osc(false); + } + } + if ( (pin_Number = get_osc_pin_Number(1)) < 253 && + (m_pin = package->get_pin(pin_Number))) + { + pll_factor = 0; + switch(value) + { + case 6: + pll_factor = 2; + case 0: + case 1: + case 2: + set_clk_pin(pin_Number, get_osc_PinMonitor(1), "OSC2", true, + m_porta, m_trisa, m_lata); + break; + + case 3: + case 4: + case 9: + case 10: + case 11: + case 12: + case 13: + case 14: + case 15: + cout << "CLKO not simulated\n"; + set_clk_pin(pin_Number, get_osc_PinMonitor(1) , "CLKO", false, + m_porta, m_trisa, m_lata); + break; + + default: + clr_clk_pin(pin_Number, get_osc_PinMonitor(1), + m_porta, m_trisa, m_lata); + break; + } + } + +} + +//------------------------------------------------------------------------ +// +P18F2221::P18F2221(const char *_name, const char *desc) + : P18F2x21(_name,desc) +{ +} + +Processor * P18F2221::construct(const char *name) +{ + P18F2221 *p = new P18F2221(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F2321::P18F2321(const char *_name, const char *desc) + : P18F2x21(_name,desc) +{ +} + +Processor * P18F2321::construct(const char *name) +{ + P18F2321 *p = new P18F2321(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F2420::P18F2420(const char *_name, const char *desc) + : P18F2x21(_name,desc) +{ +} + +Processor * P18F2420::construct(const char *name) +{ + P18F2420 *p = new P18F2420(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F2520::P18F2520(const char *_name, const char *desc) + : P18F2x21(_name,desc) +{ +} + +Processor * P18F2520::construct(const char *name) +{ + P18F2520 *p = new P18F2520(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F2525::P18F2525(const char *_name, const char *desc) + : P18F2x21(_name,desc) +{ +} + +Processor * P18F2525::construct(const char *name) +{ + P18F2525 *p = new P18F2525(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F2620::P18F2620(const char *_name, const char *desc) + : P18F2x21(_name,desc) +{ +} + +Processor * P18F2620::construct(const char *name) +{ + P18F2620 *p = new P18F2620(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//======================================================================= +// +void P18F4x21::create() +{ + delete pir2; + pir2 = (PIR2v2 *)(new PIR2v4(this, "pir2" , "Peripheral Interrupt Register",0,0 )); + + tbl.initialize ( eeprom_memory_size(), 32, 4, CONFIG1L, false); + tbl.set_intcon(&intcon); + set_eeprom_pir(&tbl); + tbl.set_pir(pir2); + tbl.eecon1.set_valid_bits(0xbf); + + create_iopin_map(); + + _16bit_processor::create(); + + m_configMemory->addConfigWord(CONFIG3H-CONFIG1L,new Config3H_2x21(this, CONFIG3H, 0x83)); + m_configMemory->addConfigWord(CONFIG1H-CONFIG1L,new Config1H_4bits(this, CONFIG1H, 0x07)); + + set_osc_pin_Number(0, 13, &(*m_porta)[7]); + set_osc_pin_Number(1,14, &(*m_porta)[6]); + + add_sfr_register(&pwm1con, 0xfb7, RegisterValue(0,0)); + add_sfr_register(&eccpas, 0xfb6, RegisterValue(0,0)); + eccpas.setIOpin(0, 0, &(*m_portb)[0]); + eccpas.link_registers(&pwm1con, &ccp1con); + comparator.cmcon.set_eccpas(&eccpas); + ccp1con.setBitMask(0xff); + ccp1con.setCrosslinks(&ccpr1l, &pir1, PIR1v2::CCP1IF, &tmr2, &eccpas); + ccp1con.pwm1con = &pwm1con; + ccp1con.setIOpin(&((*m_portc)[2]), &((*m_portd)[5]), &((*m_portd)[6]), &((*m_portd)[7])); + +} + +//------------------------------------------------------------------------ +void P18F4x21::create_iopin_map() +{ + package = new Package(40); + + if(!package) + return; + + // Build the links between the I/O Ports and their tris registers. + + package->assign_pin( 1, m_porte->addPin(new IO_bi_directional("porte3"),3)); + + package->assign_pin( 2, m_porta->addPin(new IO_bi_directional("porta0"),0)); + package->assign_pin( 3, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin( 4, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin( 5, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin( 6, m_porta->addPin(new IO_open_collector("porta4"),4)); + package->assign_pin( 7, m_porta->addPin(new IO_bi_directional("porta5"),5)); + + package->assign_pin( 8, m_porte->addPin(new IO_bi_directional("porte0"),0)); + package->assign_pin( 9, m_porte->addPin(new IO_bi_directional("porte1"),1)); + package->assign_pin(10, m_porte->addPin(new IO_bi_directional("porte2"),2)); + + + package->assign_pin(11, 0); // Vdd + package->assign_pin(12, 0); // Vss + package->assign_pin(13, m_porta->addPin(new IO_bi_directional("porta7"),7)); + package->assign_pin(14, m_porta->addPin(new IO_bi_directional("porta6"),6)); + + package->assign_pin(15, m_portc->addPin(new IO_bi_directional("portc0"),0)); + package->assign_pin(16, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(17, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin(18, m_portc->addPin(new IO_bi_directional("portc3"),3)); + package->assign_pin(23, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin(24, m_portc->addPin(new IO_bi_directional("portc5"),5)); + package->assign_pin(25, m_portc->addPin(new IO_bi_directional("portc6"),6)); + package->assign_pin(26, m_portc->addPin(new IO_bi_directional("portc7"),7)); + + package->assign_pin(19, m_portd->addPin(new IO_bi_directional("portd0"),0)); + package->assign_pin(20, m_portd->addPin(new IO_bi_directional("portd1"),1)); + package->assign_pin(21, m_portd->addPin(new IO_bi_directional("portd2"),2)); + package->assign_pin(22, m_portd->addPin(new IO_bi_directional("portd3"),3)); + package->assign_pin(27, m_portd->addPin(new IO_bi_directional("portd4"),4)); + package->assign_pin(28, m_portd->addPin(new IO_bi_directional("portd5"),5)); + package->assign_pin(29, m_portd->addPin(new IO_bi_directional("portd6"),6)); + package->assign_pin(30, m_portd->addPin(new IO_bi_directional("portd7"),7)); + + package->assign_pin(31, 0); // Vss + package->assign_pin(32, 0); // Vdd + + package->assign_pin(33, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + package->assign_pin(34, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin(35, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin(36, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(37, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(38, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(39, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(40, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + + tmr1l.setIOpin(&(*m_portc)[0]); + + ssp.initialize(&pir_set_def, // PIR + &(*m_portc)[3], // SCK + &(*m_porta)[5], // SS + &(*m_portc)[5], // SDO + &(*m_portc)[4], // SDI + m_trisc, // i2c tris port + SSP_TYPE_MSSP + ); + + //1portc.ccp1con = &ccp1con; + //1portc.usart = &usart16; +} + +P18F4x21::P18F4x21(const char *_name, const char *desc) + : P18F2x21(_name,desc) +{ + m_portd = new PicPSP_PortRegister(this,"portd","",8,0xFF); + m_trisd = new PicTrisRegister(this,"trisd","", (PicPortRegister *)m_portd, false); + m_latd = new PicLatchRegister(this,"latd","",m_portd); + +// m_porte = new PicPortRegister(this,"porte","",8,0x07); + m_porte->setEnableMask(0x07); // It's been created by the P18F2x21 constructor, but with the wrong enables + m_trise = new PicPSP_TrisRegister(this,"trise","", m_porte, false); + m_late = new PicLatchRegister(this,"late","",m_porte); + +} +P18F4x21::~P18F4x21() +{ + delete_sfr_register(m_portd); + delete_sfr_register(m_trisd); + delete_sfr_register(m_latd); + delete_sfr_register(m_trise); + delete_sfr_register(m_late); + remove_sfr_register(&pwm1con); + remove_sfr_register(&eccpas); +} + +void P18F4x21::create_sfr_map() +{ + _16bit_processor::create_sfr_map(); + _16bit_v2_adc::create(13); + + RegisterValue porv(0,0); + + add_sfr_register(m_portd, 0xf83,porv); + add_sfr_register(m_porte, 0xf84,porv); + + add_sfr_register(m_latd, 0xf8c,porv); + add_sfr_register(m_late, 0xf8d,porv); + + add_sfr_register(m_trisd, 0xf95,RegisterValue(0xff,0)); + add_sfr_register(m_trise, 0xf96,RegisterValue(0x07,0)); + + add_sfr_register(&osctune, 0xf9b,porv); + osccon->set_osctune(&osctune); + osctune.set_osccon(osccon); + + adcon1->setIOPin(4, &(*m_porta)[5]); + adcon1->setIOPin(5, &(*m_porte)[0]); + adcon1->setIOPin(6, &(*m_porte)[1]); + adcon1->setIOPin(7, &(*m_porte)[2]); + adcon1->setIOPin(8, &(*m_portb)[2]); + adcon1->setIOPin(9, &(*m_portb)[3]); + adcon1->setIOPin(10, &(*m_portb)[1]); + adcon1->setIOPin(11, &(*m_portb)[4]); + adcon1->setIOPin(12, &(*m_portb)[0]); +/* + adcon1->setChanTable(0x1ff, 0x1fff, 0x1fff, 0x0fff, + 0x07ff, 0x03ff, 0x01ff, 0x00ff, 0x007f, 0x003f, + 0x001f, 0x000f, 0x0007, 0x0003, 0x0001, 0x0000); + adcon1->setVrefHiChannel(3); + adcon1->setVrefLoChannel(2); +*/ + + + + + + // Link the comparator and voltage ref to porta + comparator.initialize(&pir_set_def, &(*m_porta)[2], &(*m_porta)[0], + &(*m_porta)[1], &(*m_porta)[2], &(*m_porta)[3], &(*m_porta)[4], + &(*m_porta)[5]); + + comparator.cmcon.set_configuration(1, 0, AN0, AN3, AN0, AN3, ZERO); + comparator.cmcon.set_configuration(2, 0, AN1, AN2, AN1, AN2, ZERO); + comparator.cmcon.set_configuration(1, 1, AN0, AN3, AN0, AN3, OUT0); + comparator.cmcon.set_configuration(2, 1, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(1, 2, AN0, AN3, AN0, AN3, NO_OUT); + comparator.cmcon.set_configuration(2, 2, AN1, AN2, AN1, AN2, NO_OUT); + comparator.cmcon.set_configuration(1, 3, AN0, AN3, AN0, AN3, OUT0); + comparator.cmcon.set_configuration(2, 3, AN1, AN2, AN1, AN2, OUT1); + comparator.cmcon.set_configuration(1, 4, AN0, AN3, AN0, AN3, NO_OUT); + comparator.cmcon.set_configuration(2, 4, AN1, AN3, AN1, AN3, NO_OUT); + comparator.cmcon.set_configuration(1, 5, AN0, AN3, AN0, AN3, OUT0); + comparator.cmcon.set_configuration(2, 5, AN1, AN3, AN1, AN3, OUT1); + comparator.cmcon.set_configuration(1, 6, AN0, VREF, AN3, VREF, NO_OUT); + comparator.cmcon.set_configuration(2, 6, AN1, VREF, AN2, VREF, NO_OUT); + comparator.cmcon.set_configuration(1, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + + add_sfr_register(&comparator.cmcon, 0xfb4, RegisterValue(7,0),"cmcon"); + add_sfr_register(&comparator.vrcon, 0xfb5, RegisterValue(0,0),"cvrcon"); + + ccp2con.setCrosslinks(&ccpr2l, pir2, PIR2v2::CCP2IF, &tmr2); +// ccp2con.setIOpin(&((*m_portc)[1])); // Handled by Config3H_2x21::set + ccpr2l.ccprh = &ccpr2h; + ccpr2l.tmrl = &tmr1l; + ccpr2h.ccprl = &ccpr2l; + + //1 usart16.initialize_16(this,&pir_set_def,&portc); + add_sfr_register(&usart.spbrgh, 0xfb0,porv,"spbrgh"); + add_sfr_register(&usart.baudcon, 0xfb8,porv,"baudcon"); + usart.set_eusart(true); + init_pir2(pir2, PIR2v4::TMR3IF); + tmr3l.setIOpin(&(*m_portc)[0]); +} + +//------------------------------------------------------------------------ +// +P18F4221::P18F4221(const char *_name, const char *desc) + : P18F4x21(_name,desc) +{ +} + +Processor * P18F4221::construct(const char *name) +{ + P18F4221 *p = new P18F4221(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F4321::P18F4321(const char *_name, const char *desc) + : P18F4x21(_name,desc) +{ +} + +Processor * P18F4321::construct(const char *name) +{ + P18F4321 *p = new P18F4321(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F4420::P18F4420(const char *_name, const char *desc) + : P18F4x21(_name,desc) +{ +} + +Processor * P18F4420::construct(const char *name) +{ + P18F4420 *p = new P18F4420(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F4520::P18F4520(const char *_name, const char *desc) + : P18F4x21(_name,desc) +{ +} + +Processor * P18F4520::construct(const char *name) +{ + P18F4520 *p = new P18F4520(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//------------------------------------------------------------------------ +// +P18F4620::P18F4620(const char *_name, const char *desc) + : P18F4x21(_name,desc) +{ +} + +Processor * P18F4620::construct(const char *name) +{ + P18F4620 *p = new P18F4620(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + +//======================================================================== +// +void P18F6x20::create() +{ + tbl.initialize ( eeprom_memory_size(), 32, 4, CONFIG1L, true); + tbl.set_intcon(&intcon); + set_eeprom_pir(&tbl); + tbl.set_pir(pir2); + tbl.eecon1.set_valid_bits(0xbf); + + create_iopin_map(); + + _16bit_processor::create(); + + m_configMemory->addConfigWord(CONFIG1H-CONFIG1L,new Config1H_4bits(this, CONFIG1H, 0x27)); + init_pir2(pir2, PIR2v2::TMR3IF); + tmr3l.setIOpin(&(*m_portc)[0]); +} + +//------------------------------------------------------------------------ +void P18F6x20::create_iopin_map() +{ + package = new Package(64); + + if(!package) + return; + + // Build the links between the I/O Ports and their tris registers. + + package->assign_pin( 1, m_porte->addPin(new IO_bi_directional("porte1"),1)); + package->assign_pin( 2, m_porte->addPin(new IO_bi_directional("porte0"),0)); + + package->assign_pin( 3, m_portg->addPin(new IO_bi_directional("portg0"),0)); + package->assign_pin( 4, m_portg->addPin(new IO_bi_directional("portg1"),1)); + package->assign_pin( 5, m_portg->addPin(new IO_bi_directional("portg2"),2)); + package->assign_pin( 6, m_portg->addPin(new IO_bi_directional("portg3"),3)); + + createMCLRPin(7); + + package->assign_pin( 8, m_portg->addPin(new IO_bi_directional("portg4"),4)); + + package->assign_pin( 9, 0); // Vss + package->assign_pin(10, 0); // Vdd + + package->assign_pin(11, m_portf->addPin(new IO_bi_directional("portf7"),7)); + package->assign_pin(12, m_portf->addPin(new IO_bi_directional("portf6"),6)); + package->assign_pin(13, m_portf->addPin(new IO_bi_directional("portf5"),5)); + package->assign_pin(14, m_portf->addPin(new IO_bi_directional("portf4"),4)); + package->assign_pin(15, m_portf->addPin(new IO_bi_directional("portf3"),3)); + package->assign_pin(16, m_portf->addPin(new IO_bi_directional("portf2"),2)); + package->assign_pin(17, m_portf->addPin(new IO_bi_directional("portf1"),1)); + package->assign_pin(18, m_portf->addPin(new IO_bi_directional("portf0"),0)); + + package->assign_pin(19, 0); // AVdd + package->assign_pin(20, 0); // AVss + + package->assign_pin(21, m_porta->addPin(new IO_bi_directional("porta3"),3)); + package->assign_pin(22, m_porta->addPin(new IO_bi_directional("porta2"),2)); + package->assign_pin(23, m_porta->addPin(new IO_bi_directional("porta1"),1)); + package->assign_pin(24, m_porta->addPin(new IO_bi_directional("porta0"),0)); + + package->assign_pin(25, 0); // Vss + package->assign_pin(26, 0); // Vdd + + package->assign_pin(27, m_porta->addPin(new IO_bi_directional("porta5"),5)); + package->assign_pin(28, m_porta->addPin(new IO_open_collector("porta4"),4)); + + package->assign_pin(29, m_portc->addPin(new IO_bi_directional("portc1"),1)); + package->assign_pin(30, m_portc->addPin(new IO_bi_directional("portc0"),0)); + package->assign_pin(31, m_portc->addPin(new IO_bi_directional("portc6"),6)); + package->assign_pin(32, m_portc->addPin(new IO_bi_directional("portc7"),7)); + package->assign_pin(33, m_portc->addPin(new IO_bi_directional("portc2"),2)); + package->assign_pin(34, m_portc->addPin(new IO_bi_directional("portc3"),3)); + package->assign_pin(35, m_portc->addPin(new IO_bi_directional("portc4"),4)); + package->assign_pin(36, m_portc->addPin(new IO_bi_directional("portc5"),5)); + + package->assign_pin(37, m_portb->addPin(new IO_bi_directional_pu("portb7"),7)); + + package->assign_pin(38, 0); // Vdd + package->assign_pin(39, 0); // OSC1/CLKI + + package->assign_pin(40, m_porta->addPin(new IO_bi_directional("porta6"),6)); + + package->assign_pin(41, 0); // Vss + + package->assign_pin(42, m_portb->addPin(new IO_bi_directional_pu("portb6"),6)); + package->assign_pin(43, m_portb->addPin(new IO_bi_directional_pu("portb5"),5)); + package->assign_pin(44, m_portb->addPin(new IO_bi_directional_pu("portb4"),4)); + package->assign_pin(45, m_portb->addPin(new IO_bi_directional_pu("portb3"),3)); + package->assign_pin(46, m_portb->addPin(new IO_bi_directional_pu("portb2"),2)); + package->assign_pin(47, m_portb->addPin(new IO_bi_directional_pu("portb1"),1)); + package->assign_pin(48, m_portb->addPin(new IO_bi_directional_pu("portb0"),0)); + + package->assign_pin(49, m_portd->addPin(new IO_bi_directional("portd7"),7)); + package->assign_pin(50, m_portd->addPin(new IO_bi_directional("portd6"),6)); + package->assign_pin(51, m_portd->addPin(new IO_bi_directional("portd5"),5)); + package->assign_pin(52, m_portd->addPin(new IO_bi_directional("portd4"),4)); + package->assign_pin(53, m_portd->addPin(new IO_bi_directional("portd3"),3)); + package->assign_pin(54, m_portd->addPin(new IO_bi_directional("portd2"),2)); + package->assign_pin(55, m_portd->addPin(new IO_bi_directional("portd1"),1)); + + package->assign_pin(56, 0); // Vss + package->assign_pin(57, 0); // Vdd + + package->assign_pin(58, m_portd->addPin(new IO_bi_directional("portd0"),0)); + + package->assign_pin(59, m_porte->addPin(new IO_bi_directional("porte7"),7)); + package->assign_pin(60, m_porte->addPin(new IO_bi_directional("porte6"),6)); + package->assign_pin(61, m_porte->addPin(new IO_bi_directional("porte5"),5)); + package->assign_pin(62, m_porte->addPin(new IO_bi_directional("porte4"),4)); + package->assign_pin(63, m_porte->addPin(new IO_bi_directional("porte3"),3)); + package->assign_pin(64, m_porte->addPin(new IO_bi_directional("porte2"),2)); + + psp.initialize(&pir_set_def, // PIR + m_portd, // Parallel port + m_trisd, // Parallel tris + pspcon, // Control register + &(*m_porte)[0], // NOT RD + &(*m_porte)[1], // NOT WR + &(*m_porte)[2]); // NOT CS + + tmr1l.setIOpin(&(*m_portc)[0]); + ssp.initialize(&pir_set_def, // PIR + &(*m_portc)[3], // SCK + &(*m_portf)[7], // SS + &(*m_portc)[5], // SDO + &(*m_portc)[4], // SDI + m_trisc, // i2c tris port + SSP_TYPE_MSSP + ); + + + set_osc_pin_Number(0,39, NULL); + set_osc_pin_Number(1,40, &(*m_porta)[6]); +} + +P18F6x20::P18F6x20(const char *_name, const char *desc) + : _16bit_v2_adc(_name,desc), + t4con(this, "t4con", "TMR4 Control"), + pr4(this, "pr4", "TMR4 Period Register"), + tmr4(this, "tmr4", "TMR4 Register"), + pir3(this,"pir3","Peripheral Interrupt Register",0,0), + pie3(this, "pie3", "Peripheral Interrupt Enable"), + ipr3(this, "ipr3", "Interrupt Priorities"), + ccp3con(this, "ccp3con", "Capture Compare Control"), + ccpr3l(this, "ccpr3l", "Capture Compare 3 Low"), + ccpr3h(this, "ccpr3h", "Capture Compare 3 High"), + ccp4con(this, "ccp4con", "Capture Compare Control"), + ccpr4l(this, "ccpr4l", "Capture Compare 4 Low"), + ccpr4h(this, "ccpr4h", "Capture Compare 4 High"), + ccp5con(this, "ccp5con", "Capture Compare Control"), + ccpr5l(this, "ccpr5l", "Capture Compare 5 Low"), + ccpr5h(this, "ccpr5h", "Capture Compare 5 High"), + usart2(this), comparator(this) +{ + m_portd = new PicPSP_PortRegister(this,"portd","",8,0xFF); + m_trisd = new PicTrisRegister(this,"trisd","", (PicPortRegister *)m_portd, false); + m_latd = new PicLatchRegister(this,"latd","",m_portd); + + m_porte = new PicPortRegister(this,"porte","",8,0xFF); + m_trise = new PicTrisRegister(this,"trise","", m_porte, false); + m_late = new PicLatchRegister(this,"late","",m_porte); + + m_portf = new PicPortRegister(this,"portf","",8,0xFF); + m_trisf = new PicTrisRegister(this,"trisf","", m_portf, false); + m_latf = new PicLatchRegister(this,"latf","",m_portf); + + m_portg = new PicPortRegister(this,"portg","",8,0x1F); + m_trisg = new PicTrisRegister(this,"trisg","", m_portg, false); + m_latg = new PicLatchRegister(this,"latg","",m_portg); + + pspcon = new PSPCON(this, "pspcon",""); + + +} + +P18F6x20::~P18F6x20() +{ + delete_sfr_register(m_portd); + delete_sfr_register(m_porte); + delete_sfr_register(m_portf); + delete_sfr_register(m_portg); + + delete_sfr_register(m_latd); + delete_sfr_register(m_late); + delete_sfr_register(m_latf); + delete_sfr_register(m_latg); + + delete_sfr_register(m_trisd); + delete_sfr_register(m_trise); + delete_sfr_register(m_trisf); + delete_sfr_register(m_trisg); + delete_sfr_register(pspcon); + delete_sfr_register(usart2.txreg); + delete_sfr_register(usart2.rcreg); + + remove_sfr_register(&pie3); + remove_sfr_register(&pir3); + remove_sfr_register(&ipr3); + remove_sfr_register(&usart2.rcsta); + remove_sfr_register(&usart2.txsta); + remove_sfr_register(&usart2.spbrg); + remove_sfr_register(&ccp4con); + remove_sfr_register(&ccpr4l); + remove_sfr_register(&ccpr4h); + remove_sfr_register(&ccp5con); + remove_sfr_register(&ccpr5l); + remove_sfr_register(&ccpr5h); + remove_sfr_register(&t4con); + remove_sfr_register(&pr4); + remove_sfr_register(&tmr4); + remove_sfr_register(&ccp3con); + remove_sfr_register(&ccpr3l); + remove_sfr_register(&ccpr3h); + remove_sfr_register(&comparator.cmcon); + remove_sfr_register(&comparator.vrcon); + +} + +void P18F6x20::create_sfr_map() +{ + _16bit_processor::create_sfr_map(); + _16bit_v2_adc::create(12); + + RegisterValue porv(0,0); + + osccon->por_value.put(0x01,0x01); + + // cout << "Create extra ports\n"; + add_sfr_register(m_portd, 0xf83,porv); + add_sfr_register(m_porte, 0xf84,porv); + add_sfr_register(m_portf, 0xf85,porv); + add_sfr_register(m_portg, 0xf86,porv); + + add_sfr_register(m_latd, 0xf8c,porv); + add_sfr_register(m_late, 0xf8d,porv); + add_sfr_register(m_latf, 0xf8e,porv); + add_sfr_register(m_latg, 0xf8f,porv); + + add_sfr_register(m_trisd, 0xf95,RegisterValue(0xff,0)); + add_sfr_register(m_trise, 0xf96,RegisterValue(0xff,0)); + add_sfr_register(m_trisf, 0xf97,RegisterValue(0xff,0)); + add_sfr_register(m_trisg, 0xf98,RegisterValue(0x1f,0)); + + add_sfr_register(&pie3, 0xfa3,porv,"pie3"); + add_sfr_register(&pir3, 0xfa4,porv,"pir3"); + add_sfr_register(&ipr3, 0xfa5,porv,"ipr3"); + + + + add_sfr_register(pspcon, 0xfb0,RegisterValue(0x00,0)); + + // cout << "Assign ADC pins to " << adcon1 << "\n"; + adcon1->setIOPin(4, &(*m_porta)[5]); + adcon1->setIOPin(5, &(*m_portf)[0]); + adcon1->setIOPin(6, &(*m_portf)[1]); + adcon1->setIOPin(7, &(*m_portf)[2]); + adcon1->setIOPin(8, &(*m_portf)[3]); + adcon1->setIOPin(9, &(*m_portf)[4]); + adcon1->setIOPin(10, &(*m_portf)[5]); + adcon1->setIOPin(11, &(*m_portf)[6]); +// adcon1->setIOPin(12, &(*m_portb)[0]); +/* + adcon1->setChanTable(0x1ff, 0x1fff, 0x1fff, 0x0fff, + 0x07ff, 0x03ff, 0x01ff, 0x00ff, 0x007f, 0x003f, + 0x001f, 0x000f, 0x0007, 0x0003, 0x0001, 0x0000); + adcon1->setVrefHiChannel(3); + adcon1->setVrefLoChannel(2); +*/ + + + // Link the comparator and voltage ref to portf + comparator.initialize(&pir_set_def, &(*m_portf)[5], + 0, 0, 0, 0, + &(*m_portf)[2], &(*m_portf)[1]); + + // set anx for input pins + comparator.cmcon.setINpin(0, &(*m_portf)[6], "an11"); + comparator.cmcon.setINpin(1, &(*m_portf)[5], "an10"); + comparator.cmcon.setINpin(2, &(*m_portf)[4], "an9"); + comparator.cmcon.setINpin(3, &(*m_portf)[3], "an8"); + + + comparator.cmcon.set_configuration(1, 0, AN0, AN1, AN0, AN1, ZERO); + comparator.cmcon.set_configuration(2, 0, AN2, AN3, AN2, AN3, ZERO); + comparator.cmcon.set_configuration(1, 1, AN0, AN1, AN0, AN1, OUT0); + comparator.cmcon.set_configuration(2, 1, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(1, 2, AN0, AN1, AN0, AN1, NO_OUT); + comparator.cmcon.set_configuration(2, 2, AN2, AN3, AN2, AN3, NO_OUT); + comparator.cmcon.set_configuration(1, 3, AN0, AN1, AN0, AN1, OUT0); + comparator.cmcon.set_configuration(2, 3, AN2, AN3, AN2, AN3, OUT1); + comparator.cmcon.set_configuration(1, 4, AN0, AN1, AN0, AN1, NO_OUT); + comparator.cmcon.set_configuration(2, 4, AN2, AN1, AN2, AN1, NO_OUT); + comparator.cmcon.set_configuration(1, 5, AN0, AN1, AN0, AN1, OUT0); + comparator.cmcon.set_configuration(2, 5, AN2, AN1, AN2, AN1, OUT1); + comparator.cmcon.set_configuration(1, 6, AN0, VREF, AN1, VREF, NO_OUT); + comparator.cmcon.set_configuration(2, 6, AN2, VREF, AN3, VREF, NO_OUT); + comparator.cmcon.set_configuration(1, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + comparator.cmcon.set_configuration(2, 7, NO_IN, NO_IN, NO_IN, NO_IN, ZERO); + + add_sfr_register(&comparator.cmcon, 0xfb4, RegisterValue(7,0),"cmcon"); + add_sfr_register(&comparator.vrcon, 0xfb5, RegisterValue(0,0),"cvrcon"); + + + // cout << "Setting CCP cross-links\n"; + ccp2con.setCrosslinks(&ccpr2l, pir2, PIR2v2::CCP2IF, &tmr2); + ccp2con.setIOpin(&((*m_portc)[1])); + ccpr2l.ccprh = &ccpr2h; + ccpr2l.tmrl = &tmr1l; + ccpr2h.ccprl = &ccpr2l; + + add_sfr_register(&ccp3con, 0xfb7,porv,"ccp3con"); + add_sfr_register(&ccpr3l, 0xfb8,porv,"ccpr3l"); + add_sfr_register(&ccpr3h, 0xfb9,porv,"ccpr3h"); + add_sfr_register(&ccp4con, 0xf73,porv,"ccp4con"); + add_sfr_register(&ccpr4l, 0xf74,porv,"ccpr4l"); + add_sfr_register(&ccpr4h, 0xf75,porv,"ccpr4h"); + add_sfr_register(&ccp5con, 0xf70,porv,"ccp5con"); + add_sfr_register(&ccpr5l, 0xf71,porv,"ccpr5l"); + add_sfr_register(&ccpr5h, 0xf72,porv,"ccpr5h"); + + add_sfr_register(&t4con, 0xf76,porv,"t4con"); + add_sfr_register(&pr4, 0xf77,RegisterValue(0xff,0),"pr4"); + add_sfr_register(&tmr4, 0xf78,porv,"tmr4"); + + ccp3con.setCrosslinks(&ccpr3l, &pir3, PIR3v1::CCP3IF, &tmr2); + ccp3con.setIOpin(&((*m_portg)[0])); + ccpr3l.ccprh = &ccpr3h; + ccpr3l.tmrl = &tmr1l; + ccpr3h.ccprl = &ccpr3l; + tmr2.add_ccp ( &ccp3con ); + + ccp4con.setCrosslinks(&ccpr4l, &pir3, PIR3v1::CCP4IF, &tmr2); + ccp4con.setIOpin(&((*m_portg)[3])); + ccpr4l.ccprh = &ccpr4h; + ccpr4l.tmrl = &tmr1l; + ccpr4h.ccprl = &ccpr4l; + tmr2.add_ccp ( &ccp4con ); + + ccp5con.setCrosslinks(&ccpr5l, &pir3, PIR3v1::CCP5IF, &tmr2); + ccp5con.setIOpin(&((*m_portg)[4])); + ccpr5l.ccprh = &ccpr5h; + ccpr5l.tmrl = &tmr1l; + ccpr5h.ccprl = &ccpr5l; + tmr2.add_ccp ( &ccp5con ); + + //cout << "Create second USART\n"; + usart2.initialize(&pir3,&(*m_portg)[1], &(*m_portg)[2], + new _TXREG(this,"txreg2", "USART Transmit Register", &usart2), + new _RCREG(this,"rcreg2", "USART Receiver Register", &usart2)); + + add_sfr_register(&usart2.rcsta, 0xf6b,porv,"rcsta2"); + add_sfr_register(&usart2.txsta, 0xf6c,RegisterValue(0x02,0),"txsta2"); + add_sfr_register(usart2.txreg, 0xf6d,porv,"txreg2"); + add_sfr_register(usart2.rcreg, 0xf6e,porv,"rcreg2"); + add_sfr_register(&usart2.spbrg, 0xf6f,porv,"spbrg2"); + + t4con.tmr2 = &tmr4; + tmr4.pir_set = &pir_set_def; //get_pir_set(); + tmr4.pr2 = &pr4; + tmr4.t2con = &t4con; + tmr4.add_ccp ( &ccp1con ); + tmr4.add_ccp ( &ccp2con ); + pr4.tmr2 = &tmr4; + + pir3.set_intcon(&intcon); + pir3.set_pie(&pie3); + pir3.set_ipr(&ipr3); + pie3.setPir(&pir3); + //pie3.new_name("pie3"); + +} + +//------------------------------------------------------------------------ +// +P18F6520::P18F6520(const char *_name, const char *desc) + : P18F6x20(_name,desc) +{ +} + +Processor * P18F6520::construct(const char *name) +{ + P18F6520 *p = new P18F6520(name); + + p->create(); + p->create_invalid_registers(); + + return p; +} + diff --git a/src/gpsim/devices/p18x.h b/src/gpsim/devices/p18x.h new file mode 100644 index 0000000..ead9ea0 --- /dev/null +++ b/src/gpsim/devices/p18x.h @@ -0,0 +1,708 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + Copyright (C) 2010,2015 Roy R Rankin + + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __P18X_H__ +#define __P18X_H__ + +#include "16bit-processors.h" +#include "eeprom.h" +#include "psp.h" +#include "pir.h" +#include "comparator.h" +#include "spp.h" +#include "ctmu.h" + +#define IESO (1<<12) + +class PicPortRegister; +class PicTrisRegister; +class PicLatchRegister; +class ADCON0_V2; +class ADCON1_V2; +class ADCON2_V2; + +class P18C2x2 : public _16bit_compat_adc +{ + public: + + P18C2x2(const char *_name=0, const char *desc=0); + + void create(); + + virtual PROCESSOR_TYPE isa(){return _P18Cxx2_;}; + virtual PROCESSOR_TYPE base_isa(){return _PIC18_PROCESSOR_;}; + + virtual uint program_memory_size() const { return 0x400; }; + virtual uint IdentMemorySize() const { return 2; } // only two words on 18C + + virtual void create_iopin_map(); +}; + +class P18C242 : public P18C2x2 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18C242_;}; + P18C242(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + void create(); + + virtual uint program_memory_size() const { return 0x2000; }; + virtual uint last_actual_register () const { return 0x01FF;}; +}; + +class P18C252 : public P18C242 +{ + public: + + virtual PROCESSOR_TYPE isa(){return _P18C252_;}; + P18C252(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + void create(); + + virtual uint program_memory_size() const { return 0x4000; }; + virtual uint last_actual_register () const { return 0x05FF;}; + + +}; + +/********************************************************************* + * class definitions for the 18C4x2 family + */ + +//class P18C4x2 : public _16bit_processor +class P18C4x2 : public _16bit_compat_adc +{ + public: + + + PicPSP_PortRegister *m_portd; + PicTrisRegister *m_trisd; + PicLatchRegister *m_latd; + + PicPortRegister *m_porte; + PicPSP_TrisRegister *m_trise; + PicLatchRegister *m_late; + + PSP psp; + + P18C4x2(const char *_name=0, const char *desc=0); + ~P18C4x2(); + + void create(); + + virtual PROCESSOR_TYPE isa(){return _P18Cxx2_;}; + virtual PROCESSOR_TYPE base_isa(){return _PIC18_PROCESSOR_;}; + + virtual uint program_memory_size() const { return 0x400; }; + virtual uint IdentMemorySize() const { return 2; } // only two words on 18C + + virtual void create_sfr_map(); + virtual void create_iopin_map(); + +}; + + +class P18C442 : public P18C4x2 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18C442_;}; + P18C442(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + void create(); + virtual uint program_memory_size() const { return 0x2000; }; + virtual uint eeprom_memory_size() const { return 256; }; + virtual uint last_actual_register () const { return 0x01FF;}; + +}; + + +class P18C452 : public P18C442 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18C452_;}; + P18C452(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + void create(); + virtual uint program_memory_size() const { return 0x4000; }; + virtual uint last_actual_register () const { return 0x05FF;}; + +}; + +class P18F242 : public P18C242 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F242_;}; + P18F242(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + void create(); + virtual uint program_memory_size() const { return 0x2000; }; + virtual uint eeprom_memory_size() const { return 256; }; + virtual uint IdentMemorySize() const { return 4; } + + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as the 18Fxxx devices use an EEPROM with PIR + assert(0); + } + virtual void set_eeprom_pir(EEPROM_PIR *ep) { eeprom = ep; } + virtual EEPROM_PIR *get_eeprom() { return ((EEPROM_PIR *)eeprom); } + +}; + +class P18F252 : public P18F242 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F252_;}; + P18F252(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + void create(); + virtual uint program_memory_size() const { return 0x4000; }; + virtual uint last_actual_register () const { return 0x05FF;}; + +}; + +class P18F442 : public P18C442 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F442_;}; + P18F442(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + void create(); + virtual uint program_memory_size() const { return 0x2000; }; + virtual uint IdentMemorySize() const { return 4; } + + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as the 18Fxxx devices use an EEPROM with PIR + assert(0); + } + virtual void set_eeprom_pir(EEPROM_PIR *ep) { eeprom = ep; } + virtual EEPROM_PIR *get_eeprom() { return ((EEPROM_PIR *)eeprom); } + +}; + +// +// The P18F248 is the same as the P18F242 except it has CAN, one fewer +// CCP module and a 5/10 ADC. For now just assume it is identical. +class P18F248 : public P18F242 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F248_;}; + P18F248(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + void create(); +}; + +// +// The P18F258 is the same as the P18F252 except it has CAN, one fewer +// CCP module and a 5/10 ADC. For now just assume it is identical. +class P18F258 : public P18F252 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F258_;}; + P18F258(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + void create(); +}; + +// +// The P18F448 is the same as the P18F442 except it has CAN, one fewer +// CCP module and a 5/10 ADC. For now just assume it is identical. +class P18F448 : public P18F442 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F448_;}; + P18F448(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + void create(); +}; + + +class P18F452 : public P18F442 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F452_;}; + P18F452(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + void create(); + + virtual uint program_memory_size() const { return 0x4000; }; + virtual uint last_actual_register () const { return 0x05FF;}; +}; + +// +// The P18F458 is the same as the P18F452 except it has CAN and one +// fewer CCP module. For now just assume it is identical. +class P18F458 : public P18F452 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F458_;}; + P18F458(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + void create(); +}; + + + +class P18F1220 : public _16bit_v2_adc +{ + public: + OSCTUNE osctune; + ECCPAS eccpas; + PWM1CON pwm1con; + + virtual PROCESSOR_TYPE base_isa(){return _PIC18_PROCESSOR_;}; + virtual PROCESSOR_TYPE isa(){return _P18F1220_;}; + P18F1220(const char *_name=0, const char *desc=0); + ~P18F1220(); + + + static Processor *construct(const char *name); + void create(); + virtual void create_iopin_map(); + virtual uint program_memory_size() const { return 0x1000; }; + virtual uint eeprom_memory_size() const { return 256; }; + virtual void osc_mode(uint value); + virtual uint last_actual_register () const { return 0x00FF;}; + + // Strip down from base class + virtual bool HasPortC(void) { return false; }; + virtual bool HasCCP2(void) { return false; }; + + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as the 18Fxxx devices use an EEPROM with PIR + assert(0); + } + virtual void set_eeprom_pir(EEPROM_PIR *ep) { eeprom = ep; } + virtual EEPROM_PIR *get_eeprom() { return ((EEPROM_PIR *)eeprom); } + virtual uint get_device_id() { return (0x07 << 8)|(0x7 <<5); } +}; + + +class P18F1320 : public P18F1220 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F1320_;}; + P18F1320(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + void create(); + + virtual uint program_memory_size() const { return 0x2000; }; + virtual uint get_device_id() { return (0x07 << 8)|(0x6 <<5); } + +}; + + + +class P18F2x21 : public _16bit_v2_adc +{ + public: + + PicPortRegister *m_porte; + PicPSP_TrisRegister *m_trise; + PicLatchRegister *m_late; + + ECCPAS eccpas; + PWM1CON pwm1con; + + OSCTUNE osctune; + ComparatorModule comparator; + + P18F2x21(const char *_name=0, const char *desc=0); + ~P18F2x21(); + + void create(); + + virtual PROCESSOR_TYPE isa(){return _P18Cxx2_;}; + virtual PROCESSOR_TYPE base_isa(){return _PIC18_PROCESSOR_;}; + + virtual uint program_memory_size() const { return 0x400; }; + virtual uint eeprom_memory_size() const { return 0x100; }; + +// Setting the correct register memory size breaks things +// virtual uint register_memory_size () const { return 0x200;}; + virtual uint last_actual_register () const { return 0x01FF;}; + + virtual void create_iopin_map(); + virtual void create_sfr_map(); + + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as the 18Fxxx devices use an EEPROM with PIR + assert(0); + } + virtual void set_eeprom_pir(EEPROM_PIR *ep) { eeprom = ep; } + virtual EEPROM_PIR *get_eeprom() { return ((EEPROM_PIR *)eeprom); } + + virtual void osc_mode(uint value); +}; + + +class P18F2221 : public P18F2x21 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F2221_;}; + P18F2221(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + + virtual uint program_memory_size() const { return 0x800; }; + virtual uint get_device_id() { return (0x21 << 8)|(0x3 <<5); } +}; + +class P18F2321 : public P18F2x21 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F2321_;}; + P18F2321(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + + virtual uint program_memory_size() const { return 0x1000; }; + virtual uint get_device_id() { return (0x21 << 8)|(0x1 <<5); } +}; + +class P18F2420 : public P18F2x21 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F2420_;}; + P18F2420(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + + virtual uint program_memory_size() const { return 0x2000; }; + virtual uint eeprom_memory_size() const { return 256; }; + virtual uint last_actual_register () const { return 0x02FF;}; + virtual uint get_device_id() { return (0x0c << 8)|(0x6 <<5); } +}; + +class P18F2455 : public P18F2x21 +{ + public: + sfr_register ufrml, ufrmh, uir, uie, ueir, ueie, ustat, ucon, + uaddr, ucfg, uep0, uep1, uep2, uep3, uep4, uep5, + uep6, uep7, uep8, uep9, uep10, uep11, uep12, uep13, + uep14, uep15; + + virtual PROCESSOR_TYPE isa(){return _P18F2455_;}; + P18F2455(const char *_name=0, const char *desc=0); + ~P18F2455(); + static Processor *construct(const char *name); + void create_sfr_map(); + + virtual uint access_gprs() { return 0x60; }; // USB peripheral moves access split + virtual uint program_memory_size() const { return 0x3000; }; + virtual uint last_actual_register () const { return 0x07FF;}; + virtual uint get_device_id() { return (0x12 << 8)|(0x3 <<5); } + +}; + +class P18F2550 : public P18F2x21 +{ + public: + sfr_register ufrml, ufrmh, uir, uie, ueir, ueie, ustat, ucon, + uaddr, ucfg, uep0, uep1, uep2, uep3, uep4, uep5, + uep6, uep7, uep8, uep9, uep10, uep11, uep12, uep13, + uep14, uep15; + + virtual PROCESSOR_TYPE isa(){return _P18F2550_;}; + P18F2550(const char *_name=0, const char *desc=0); + ~P18F2550(); + static Processor *construct(const char *name); + void create_sfr_map(); + + virtual uint access_gprs() { return 0x60; }; // USB peripheral moves access split + virtual uint program_memory_size() const { return 16384; }; + virtual uint last_actual_register () const { return 0x07FF;}; + virtual uint get_device_id() { return (0x12 << 8)|(0x2 <<5); } + +}; + +class P18F2520 : public P18F2x21 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F2520_;}; + P18F2520(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + + virtual uint program_memory_size() const { return 0x4000; }; + virtual uint last_actual_register () const { return 0x05FF;}; + virtual uint get_device_id() { return (0x0c << 8)|(0x4 <<5); } +}; + +class P18F2525 : public P18F2x21 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F2525_;}; + P18F2525(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + + virtual uint program_memory_size() const { return 24576; }; + virtual uint last_actual_register () const { return 0x05FF;}; + virtual uint get_device_id() { return (0x0c << 8)|(0x6 <<5); } +}; + +class P18F2620 : public P18F2x21 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F2620_;}; + P18F2620(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + + virtual uint program_memory_size() const { return 0x8000; }; + virtual uint last_actual_register () const { return 0x0F7F;}; + virtual uint get_device_id() { return (0x0c << 8)|(0x4 <<5); } +}; + +class RegZero : public Register +{ +public: + RegZero(Module *_cpu, const char *_name=0, const char *desc=0): + Register(_cpu, _name, desc) {} + virtual void put(uint new_value) { value.put(0);} + virtual void put_value(uint new_value) { value.put(0);} +}; + +class P18F4x21 : public P18F2x21 +{ + public: + + PicPSP_PortRegister *m_portd; + PicTrisRegister *m_trisd; + PicLatchRegister *m_latd; + + + P18F4x21(const char *_name=0, const char *desc=0); + ~P18F4x21(); + + void create(); + + virtual void create_iopin_map(); + virtual void create_sfr_map(); +}; + + +class P18F4221 : public P18F4x21 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F4221_;}; + P18F4221(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + + virtual uint program_memory_size() const { return 0x800; }; + virtual uint get_device_id() { return (0x21 << 8)|(0x2 <<5); } +}; + +class P18F4321 : public P18F4x21 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F4321_;}; + P18F4321(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + + virtual uint program_memory_size() const { return 0x1000; }; + virtual uint get_device_id() { return (0x21 << 8)|(0x0 <<5); } +}; + +class P18F4420 : public P18F4x21 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F4420_;}; + P18F4420(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + + virtual uint program_memory_size() const { return 0x2000; }; + virtual uint get_device_id() { return (0x0c << 8)|(0x2 <<5); } +}; + +class P18F4455 : public P18F4x21 +{ + public: + sfr_register ufrml, ufrmh, uir, uie, ueir, ueie, ustat, ucon, + uaddr, ucfg, uep0, uep1, uep2, uep3, uep4, uep5, + uep6, uep7, uep8, uep9, uep10, uep11, uep12, uep13, + uep14, uep15; + + SPP spp; + SPPCON sppcon; + SPPCFG sppcfg; + SPPEPS sppeps; + SPPDATA sppdata; + + virtual PROCESSOR_TYPE isa(){return _P18F4455_;}; + P18F4455(const char *_name=0, const char *desc=0); + ~P18F4455(); + static Processor *construct(const char *name); + void create(); + + virtual uint access_gprs() { return 0x60; }; // USB peripheral moves access split + virtual uint program_memory_size() const { return 0x3000; }; + virtual uint last_actual_register () const { return 0x07FF;}; + virtual uint get_device_id() { return (0x12 << 8)|(0x1 <<5); } + +}; + +class P18F4550 : public P18F4x21 +{ + public: + sfr_register ufrml, ufrmh, uir, uie, ueir, ueie, ustat, ucon, + uaddr, ucfg, uep0, uep1, uep2, uep3, uep4, uep5, + uep6, uep7, uep8, uep9, uep10, uep11, uep12, uep13, + uep14, uep15; + + SPP spp; + SPPCON sppcon; + SPPCFG sppcfg; + SPPEPS sppeps; + SPPDATA sppdata; + + virtual PROCESSOR_TYPE isa(){return _P18F4550_;}; + P18F4550(const char *_name=0, const char *desc=0); + ~P18F4550(); + static Processor *construct(const char *name); + void create(); + + virtual uint access_gprs() { return 0x60; }; // USB peripheral moves access split + virtual uint program_memory_size() const { return 16384; }; + virtual uint last_actual_register () const { return 0x07FF;}; + virtual uint get_device_id() { return (0x12 << 8)|(0x0 <<5); } + +}; + +class P18F4520 : public P18F4x21 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F4520_;}; + P18F4520(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + + virtual uint program_memory_size() const { return 0x4000; }; + virtual uint last_actual_register () const { return 0x05FF;}; + virtual uint get_device_id() { return (0x0c << 8)|(0x0 <<5); } +}; + + + + + +/*** +PIC18F4620 +Not implemented: + OSCFIF bit in peripheral interrupt register 2 (PIR2v2 pir2)(And Enable Bit) + +***/ +class P18F4620 : public P18F4x21 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F4620_;}; + P18F4620(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + + virtual uint program_memory_size() const { return 0x8000; }; + virtual uint eeprom_memory_size() const { return 1024; }; + virtual uint last_actual_register () const { return 0x0F7F;}; + virtual uint get_device_id() { return (0x0c << 8)|(0x4 <<5); } +}; + + + +class P18F6x20 : public _16bit_v2_adc +{ + public: + + PicPSP_PortRegister *m_portd; + PicTrisRegister *m_trisd; + PicLatchRegister *m_latd; + + PicPortRegister *m_porte; + PicTrisRegister *m_trise; + PicLatchRegister *m_late; + + PicPortRegister *m_portf; + PicTrisRegister *m_trisf; + PicLatchRegister *m_latf; + + PicPortRegister *m_portg; + PicTrisRegister *m_trisg; + PicLatchRegister *m_latg; + + PSP psp; + PSPCON *pspcon; + +// ECCPAS eccpas; +// PWM1CON pwm1con; + T2CON t4con; + PR2 pr4; + TMR2 tmr4; + PIR3v1 pir3; + PIE pie3; + sfr_register ipr3; + CCPCON ccp3con; + CCPRL ccpr3l; + CCPRH ccpr3h; + CCPCON ccp4con; + CCPRL ccpr4l; + CCPRH ccpr4h; + CCPCON ccp5con; + CCPRL ccpr5l; + CCPRH ccpr5h; + USART_MODULE usart2; + +// OSCTUNE osctune; + ComparatorModule comparator; + + P18F6x20(const char *_name=0, const char *desc=0); + ~P18F6x20(); + + void create(); + + virtual PROCESSOR_TYPE isa(){return _P18Cxx2_;}; + virtual PROCESSOR_TYPE base_isa(){return _PIC18_PROCESSOR_;}; + virtual uint access_gprs() { return 0x60; }; + + virtual uint program_memory_size() const { return 0x4000; }; + virtual uint eeprom_memory_size() const { return 1024; }; + +// Setting the correct register memory size breaks things +// virtual uint register_memory_size () const { return 0x800;}; + virtual uint last_actual_register () const { return 0x07FF;}; + + virtual void create_iopin_map(); + virtual void create_sfr_map(); + + + virtual void set_eeprom(EEPROM *ep) { + // Use set_eeprom_pir as the 18Fxxx devices use an EEPROM with PIR + assert(0); + } + virtual void set_eeprom_pir(EEPROM_PIR *ep) { eeprom = ep; } + virtual EEPROM_PIR *get_eeprom() { return ((EEPROM_PIR *)eeprom); } +}; + + +class P18F6520 : public P18F6x20 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P18F6520_;}; + P18F6520(const char *_name=0, const char *desc=0); + static Processor *construct(const char *name); + +// virtual uint program_memory_size() const { return 0x4000; }; + virtual uint bugs() { return BUG_DAW; }; + virtual uint get_device_id() { return (0x0b << 8)|(0x1 <<5); } +}; + +#endif diff --git a/src/gpsim/devices/p1xf1xxx.cc b/src/gpsim/devices/p1xf1xxx.cc new file mode 100644 index 0000000..44813e9 --- /dev/null +++ b/src/gpsim/devices/p1xf1xxx.cc @@ -0,0 +1,1067 @@ +/* + Copyright (C) 2013,2014,2017 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +// +// p1xf1xxx +// +// This file supports: +// PIC12[L]F1822 +// PIC12[L]F1840 +// PIC16[L]F1823 +// PIC16[L]F1825 +// +//Note: All these processors have extended 14bit instructions + +#include +#include +#include + +#include "config.h" +#include "stimuli.h" +#include "eeprom.h" +#include "p1xf1xxx.h" +#include "pic-ioports.h" +#include "packages.h" +#include "apfcon.h" +#include "pir.h" + +//#define DEBUG +#if defined(DEBUG) +#include "config.h" +#define Dprintf(arg) {printf("%s:%d ",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + + +P12F1822::P12F1822(const char *_name, const char *desc) + : _14bit_e_processor(_name,desc), + comparator(this), + pie1(this,"PIE1", "Peripheral Interrupt Enable"), + pie2(this,"PIE2", "Peripheral Interrupt Enable"), + t2con(this, "t2con", "TMR2 Control"), + pr2(this, "pr2", "TMR2 Period Register"), + tmr2(this, "tmr2", "TMR2 Register"), + t1con_g(this, "t1con", "TMR1 Control Register"), + tmr1l(this, "tmr1l", "TMR1 Low"), + tmr1h(this, "tmr1h", "TMR1 High"), + ccp1con(this, "ccp1con", "Capture Compare Control"), + ccpr1l(this, "ccpr1l", "Capture Compare 1 Low"), + ccpr1h(this, "ccpr1h", "Capture Compare 1 High"), + fvrcon(this, "fvrcon", "Voltage reference control register", 0xbf, 0x40), + borcon(this, "borcon", "Brown-out reset control register"), + ansela(this, "ansela", "Analog Select"), + adcon0(this,"adcon0", "A2D Control 0"), + adcon1(this,"adcon1", "A2D Control 1"), + adresh(this,"adresh", "A2D Result High"), + adresl(this,"adresl", "A2D Result Low"), + osccon(0), + osctune(this, "osctune", "Oscillator Tunning Register"), + oscstat(this, "oscstat", "Oscillator Status Register"), + wdtcon(this, "wdtcon", "Watch dog timer control", 0x3f), + usart(this), + ssp(this), + apfcon(this, "apfcon", "Alternate Pin Function Control Register", 0xef), + pwm1con(this, "pwm1con", "Enhanced PWM Control Register"), + ccp1as(this, "ccp1as", "CCP1 Auto-Shutdown Control Register"), + pstr1con(this, "pstr1con", "Pulse Sterring Control Register"), + cpscon0(this, "cpscon0", " Capacitive Sensing Control Register 0"), + cpscon1(this, "cpscon1", " Capacitive Sensing Control Register 1"), + sr_module(this), dsm_module(this) + +{ + m_iocaf = new IOCxF(this, "iocaf", "Interrupt-On-Change flag Register", 0x3f); + m_iocap = new IOC(this, "iocap", "Interrupt-On-Change positive edge", 0x3f); + m_iocan = new IOC(this, "iocan", "Interrupt-On-Change negative edge", 0x3f); + m_porta = new PicPortIOCRegister(this,"porta","", intcon, m_iocap, m_iocan, m_iocaf, 8,0x3f); + m_trisa = new PicTrisRegister(this,"trisa","", m_porta, false, 0x37); + m_lata = new PicLatchRegister(this,"lata","",m_porta, 0x37); + m_daccon0 = new DACCON0(this, "daccon0", "DAC Voltage reference register 0", 0xec, 32); + m_daccon1 = new DACCON1(this, "daccon1", "DAC Voltage reference register 1", 0x1f, m_daccon0); + m_cpu_temp = new CPU_Temp("cpu_temperature", 30., "CPU die temperature"); + + tmr0.set_cpu(this, m_porta, 4, &option_reg); + tmr0.start(0); + tmr0.set_t1gcon(&t1con_g.t1gcon); + cpscon1.m_cpscon0 = &cpscon0; + cpscon0.m_tmr0 = &tmr0; + cpscon0.m_t1con_g = &t1con_g; + + ((INTCON_14_PIR *)intcon)->write_mask = 0xfe; + + m_wpua = new WPU(this, "wpua", "Weak Pull-up Register", m_porta, 0x3f); + + pir1 = new PIR1v1822(this,"pir1","Peripheral Interrupt Register",intcon, &pie1); + pir2 = new PIR2v1822(this,"pir2","Peripheral Interrupt Register",intcon, &pie2); + + comparator.cmxcon0[0] = new CMxCON0(this, "cm1con0", " Comparator C1 Control Register 0", 0, &comparator); + comparator.cmxcon1[0] = new CMxCON1(this, "cm1con1", " Comparator C1 Control Register 1", 0, &comparator); + comparator.cmout = new CMOUT(this, "cmout", "Comparator Output Register"); +} + +P12F1822::~P12F1822() +{ + unassignMCLRPin(); + delete_file_registers(0x20, 0x7f); + delete_file_registers(0xa0, 0xbf); + + delete_sfr_register(m_iocap); + delete_sfr_register(m_iocan); + delete_sfr_register(m_iocaf); + delete_sfr_register(m_daccon0); + delete_sfr_register(m_daccon1); + delete_sfr_register(m_trisa); + delete_sfr_register(m_porta); + delete_sfr_register(m_lata); + + delete_sfr_register(m_wpua); + remove_sfr_register(&tmr0); + + remove_sfr_register(&tmr1l); + remove_sfr_register(&tmr1h); + remove_sfr_register(&t1con_g); + remove_sfr_register(&t1con_g.t1gcon); + + remove_sfr_register(&tmr2); + remove_sfr_register(&pr2); + remove_sfr_register(&t2con); + remove_sfr_register(&cpscon0); + remove_sfr_register(&cpscon1); + remove_sfr_register(&ssp.sspbuf); + remove_sfr_register(&ssp.sspadd); + remove_sfr_register(ssp.sspmsk); + remove_sfr_register(&ssp.sspstat); + remove_sfr_register(&ssp.sspcon); + remove_sfr_register(&ssp.sspcon2); + remove_sfr_register(&ssp.ssp1con3); + remove_sfr_register(&ccpr1l); + remove_sfr_register(&ccpr1h); + remove_sfr_register(&ccp1con); + remove_sfr_register(&pwm1con); + remove_sfr_register(&ccp1as); + remove_sfr_register(&pstr1con); + remove_sfr_register(&pie1); + remove_sfr_register(&pie2); + remove_sfr_register(&adresl); + remove_sfr_register(&adresh); + remove_sfr_register(&adcon0); + remove_sfr_register(&adcon1); + remove_sfr_register(&borcon); + remove_sfr_register(&fvrcon); + remove_sfr_register(&sr_module.srcon0); + remove_sfr_register(&sr_module.srcon1); + remove_sfr_register(&apfcon ); + remove_sfr_register(&ansela); + remove_sfr_register(get_eeprom()->get_reg_eeadr()); + remove_sfr_register(get_eeprom()->get_reg_eeadrh()); + remove_sfr_register(get_eeprom()->get_reg_eedata()); + remove_sfr_register(get_eeprom()->get_reg_eedatah()); + remove_sfr_register(get_eeprom()->get_reg_eecon1()); + remove_sfr_register(get_eeprom()->get_reg_eecon2()); + remove_sfr_register(&usart.spbrg); + remove_sfr_register(&usart.spbrgh); + remove_sfr_register(&usart.rcsta); + remove_sfr_register(&usart.txsta); + remove_sfr_register(&usart.baudcon); + remove_sfr_register(&ssp.sspbuf); + remove_sfr_register(&ssp.sspadd); + remove_sfr_register(ssp.sspmsk); + remove_sfr_register(&ssp.sspstat); + remove_sfr_register(&ssp.sspcon); + remove_sfr_register(&ssp.sspcon2); + remove_sfr_register(&ssp.ssp1con3); + remove_sfr_register(&ccpr1l); + remove_sfr_register(&ccpr1h); + remove_sfr_register(&ccp1con); + remove_sfr_register(&pwm1con); + remove_sfr_register(&ccp1as); + remove_sfr_register(&pstr1con); + remove_sfr_register(&osctune); + remove_sfr_register(&option_reg); + remove_sfr_register(osccon); + remove_sfr_register(&oscstat); + + remove_sfr_register(comparator.cmxcon0[0]); + remove_sfr_register(comparator.cmxcon1[0]); + remove_sfr_register(comparator.cmout); + delete_sfr_register(usart.rcreg); + delete_sfr_register(usart.txreg); + delete_sfr_register(pir1); + delete_sfr_register(pir2); + remove_sfr_register(&dsm_module.mdcon); + remove_sfr_register(&dsm_module.mdsrc); + remove_sfr_register(&dsm_module.mdcarl); + remove_sfr_register(&dsm_module.mdcarh); + delete e; + delete m_cpu_temp; + delete osccon; +} + +Processor * P12F1822::construct(const char *name) +{ + P12F1822 *p = new P12F1822(name); + + p->create(0x7f, 256, 0x2700); + p->create_invalid_registers (); + + return p; +} + +void P12F1822::create_sfr_map() +{ + pir_set_2_def.set_pir1(pir1); + pir_set_2_def.set_pir2(pir2); + + + //add_sfr_register(indf, 0x00); + add_file_registers(0xa0, 0xbf, 0x00); + add_sfr_register(m_porta, 0x0c); + add_sfr_registerR(pir1, 0x11, RegisterValue(0,0),"pir1"); + add_sfr_registerR(pir2, 0x12, RegisterValue(0,0),"pir2"); + add_sfr_register(&tmr0, 0x15); + + add_sfr_register(&tmr1l, 0x16, RegisterValue(0,0),"tmr1l"); + add_sfr_register(&tmr1h, 0x17, RegisterValue(0,0),"tmr1h"); + add_sfr_register(&t1con_g, 0x18, RegisterValue(0,0)); + add_sfr_register(&t1con_g.t1gcon, 0x19, RegisterValue(0,0)); + + add_sfr_register(&tmr2, 0x1a, RegisterValue(0,0)); + add_sfr_register(&pr2, 0x1b, RegisterValue(0,0)); + add_sfr_register(&t2con, 0x1c, RegisterValue(0,0)); + add_sfr_register(&cpscon0, 0x1e, RegisterValue(0,0), "cpscon0"); + add_sfr_register(&cpscon1, 0x1f, RegisterValue(0,0)); + + + add_sfr_register(m_trisa, 0x8c, RegisterValue(0x3f,0)); + + pcon.valid_bits = 0xcf; + add_sfr_register(&option_reg, 0x95, RegisterValue(0xff,0)); + add_sfr_register(&osctune, 0x98, RegisterValue(0,0)); + add_sfr_register(osccon, 0x99, RegisterValue(0x38,0)); + add_sfr_register(&oscstat, 0x9a, RegisterValue(0,0)); + + intcon_reg.set_pir_set(get_pir_set()); + + + tmr1l.tmrh = &tmr1h; + tmr1l.t1con = &t1con_g; + tmr1l.setInterruptSource(new InterruptSource(pir1, PIR1v1::TMR1IF)); + + tmr1h.tmrl = &tmr1l; + t1con_g.tmrl = &tmr1l; + t1con_g.t1gcon.set_tmrl(&tmr1l); + t1con_g.t1gcon.setInterruptSource(new InterruptSource(pir1, PIR1v1822::TMR1IF)); + + + + tmr1l.setIOpin(&(*m_porta)[5]); + t1con_g.t1gcon.setGatepin(&(*m_porta)[3]); + + add_sfr_register(&pie1, 0x91, RegisterValue(0,0)); + add_sfr_register(&pie2, 0x92, RegisterValue(0,0)); + add_sfr_register(&adresl, 0x9b); + add_sfr_register(&adresh, 0x9c); + add_sfr_register(&adcon0, 0x9d, RegisterValue(0x00,0)); + add_sfr_register(&adcon1, 0x9e, RegisterValue(0x00,0)); + + + usart.initialize(pir1, + &(*m_porta)[0], // TX pin + &(*m_porta)[1], // RX pin + new _TXREG(this,"txreg", "USART Transmit Register", &usart), + new _RCREG(this,"rcreg", "USART Receiver Register", &usart)); + + usart.set_eusart(true); + + add_sfr_register(m_lata, 0x10c); + add_sfr_register(comparator.cmxcon0[0], 0x111, RegisterValue(0x04,0)); + add_sfr_register(comparator.cmxcon1[0], 0x112, RegisterValue(0x00,0)); + add_sfr_register(comparator.cmout, 0x115, RegisterValue(0x00,0)); + add_sfr_register(&borcon, 0x116, RegisterValue(0x80,0)); + add_sfr_register(&fvrcon, 0x117, RegisterValue(0x00,0)); + add_sfr_register(m_daccon0, 0x118, RegisterValue(0x00,0)); + add_sfr_register(m_daccon1, 0x119, RegisterValue(0x00,0)); + add_sfr_register(&sr_module.srcon0, 0x11a, RegisterValue(0x00,0)); + add_sfr_register(&sr_module.srcon1, 0x11b, RegisterValue(0x00,0)); + add_sfr_register(&apfcon , 0x11d, RegisterValue(0x00,0)); + add_sfr_register(&ansela, 0x18c, RegisterValue(0x17,0)); + add_sfr_register(get_eeprom()->get_reg_eeadr(), 0x191); + add_sfr_register(get_eeprom()->get_reg_eeadrh(), 0x192); + get_eeprom()->get_reg_eedata()->new_name("eedatl"); + get_eeprom()->get_reg_eedatah()->new_name("eedath"); + add_sfr_register(get_eeprom()->get_reg_eedata(), 0x193); + add_sfr_register(get_eeprom()->get_reg_eedatah(), 0x194); + add_sfr_register(get_eeprom()->get_reg_eecon1(), 0x195, RegisterValue(0x00,0)); + + add_sfr_register(get_eeprom()->get_reg_eecon2(), 0x196); + add_sfr_register(usart.rcreg, 0x199, RegisterValue(0,0),"rcreg"); + add_sfr_register(usart.txreg, 0x19a, RegisterValue(0,0),"txreg"); + add_sfr_register(&usart.spbrg, 0x19b, RegisterValue(0,0),"spbrgl"); + add_sfr_register(&usart.spbrgh, 0x19c, RegisterValue(0,0),"spbrgh"); + add_sfr_register(&usart.rcsta, 0x19d, RegisterValue(0,0),"rcsta"); + add_sfr_register(&usart.txsta, 0x19e, RegisterValue(2,0),"txsta"); + add_sfr_register(&usart.baudcon, 0x19f,RegisterValue(0x40,0),"baudcon"); + + add_sfr_register(m_wpua, 0x20c, RegisterValue(0x3f,0),"wpua"); + add_sfr_register(&ssp.sspbuf, 0x211, RegisterValue(0,0),"ssp1buf"); + add_sfr_register(&ssp.sspadd, 0x212, RegisterValue(0,0),"ssp1add"); + add_sfr_register(ssp.sspmsk, 0x213, RegisterValue(0xff,0),"ssp1msk"); + add_sfr_register(&ssp.sspstat, 0x214, RegisterValue(0,0),"ssp1stat"); + add_sfr_register(&ssp.sspcon, 0x215, RegisterValue(0,0),"ssp1con"); + add_sfr_register(&ssp.sspcon2, 0x216, RegisterValue(0,0),"ssp1con2"); + add_sfr_register(&ssp.ssp1con3, 0x217, RegisterValue(0,0),"ssp1con3"); + add_sfr_register(&ccpr1l, 0x291, RegisterValue(0,0)); + add_sfr_register(&ccpr1h, 0x292, RegisterValue(0,0)); + add_sfr_register(&ccp1con, 0x293, RegisterValue(0,0)); + add_sfr_register(&pwm1con, 0x294, RegisterValue(0,0)); + add_sfr_register(&ccp1as, 0x295, RegisterValue(0,0)); + add_sfr_register(&pstr1con, 0x296, RegisterValue(1,0)); + + add_sfr_register(m_iocap, 0x391, RegisterValue(0,0),"iocap"); + add_sfr_register(m_iocan, 0x392, RegisterValue(0,0),"iocan"); + add_sfr_register(m_iocaf, 0x393, RegisterValue(0,0),"iocaf"); + m_iocaf->set_intcon(intcon); + add_sfr_register(&dsm_module.mdcon, 0x39c, RegisterValue(0x20,0)); + add_sfr_register(&dsm_module.mdsrc, 0x39d, RegisterValue(0x00,0)); + add_sfr_register(&dsm_module.mdcarl, 0x39e, RegisterValue(0x00,0)); + add_sfr_register(&dsm_module.mdcarh, 0x39f, RegisterValue(0x00,0)); + + tmr2.ssp_module[0] = &ssp; + + ssp.initialize( + get_pir_set(), // PIR + &(*m_porta)[1], // SCK + &(*m_porta)[3], // SS + &(*m_porta)[0], // SDO + &(*m_porta)[2], // SDI + m_trisa, // i2c tris port + SSP_TYPE_MSSP1 + ); + apfcon.set_pins(0, &ccp1con, CCPCON::CCP_PIN, &(*m_porta)[2], &(*m_porta)[5]); //CCP1/P1A + apfcon.set_pins(1, &ccp1con, CCPCON::PxB_PIN, &(*m_porta)[0], &(*m_porta)[4]); //P1B + apfcon.set_pins(2, &usart, USART_MODULE::TX_PIN, &(*m_porta)[0], &(*m_porta)[4]); //USART TX Pin + apfcon.set_pins(3, &t1con_g.t1gcon, 0, &(*m_porta)[4], &(*m_porta)[3]); //tmr1 gate + apfcon.set_pins(5, &ssp, SSP1_MODULE::SS_PIN, &(*m_porta)[3], &(*m_porta)[0]); //SSP SS + apfcon.set_pins(6, &ssp, SSP1_MODULE::SDO_PIN, &(*m_porta)[0], &(*m_porta)[4]); //SSP SDO + apfcon.set_pins(7, &usart, USART_MODULE::RX_PIN, &(*m_porta)[1], &(*m_porta)[5]); //USART RX Pin + + if (pir1) + { + pir1->set_intcon(intcon); + pir1->set_pie(&pie1); + } + pie1.setPir(pir1); + pie2.setPir(pir2); + t2con.tmr2 = &tmr2; + tmr2.pir_set = get_pir_set(); + tmr2.pr2 = &pr2; + tmr2.t2con = &t2con; + tmr2.add_ccp ( &ccp1con ); +// tmr2.add_ccp ( &ccp2con ); + pr2.tmr2 = &tmr2; + + ccp1as.setIOpin(0, 0, &(*m_porta)[2]); + ccp1as.link_registers(&pwm1con, &ccp1con); + + ccp1con.setIOpin(&(*m_porta)[2], &(*m_porta)[0]); + ccp1con.pstrcon = &pstr1con; + ccp1con.pwm1con = &pwm1con; + ccp1con.setCrosslinks(&ccpr1l, pir1, PIR1v1822::CCP1IF, &tmr2, &ccp1as); + ccpr1l.ccprh = &ccpr1h; + ccpr1l.tmrl = &tmr1l; + ccpr1h.ccprl = &ccpr1l; + + + ansela.config(0x17, 0); + ansela.setValidBits(0x17); + ansela.setAdcon1(&adcon1); + + adcon0.setAdresLow(&adresl); + adcon0.setAdres(&adresh); + adcon0.setAdcon1(&adcon1); + adcon0.setIntcon(intcon); + adcon0.setA2DBits(10); + adcon0.setPir(pir1); + adcon0.setChannel_Mask(0x1f); + adcon0.setChannel_shift(2); + adcon0.setGo(1); + + adcon1.setAdcon0(&adcon0); + adcon1.setNumberOfChannels(32); // not all channels are used + adcon1.setIOPin(0, &(*m_porta)[0]); + adcon1.setIOPin(1, &(*m_porta)[1]); + adcon1.setIOPin(2, &(*m_porta)[2]); + adcon1.setIOPin(3, &(*m_porta)[4]); + adcon1.setValidBits(0xf3); + adcon1.setVrefHiConfiguration(0, 1); + adcon1.set_FVR_chan(0x1f); + + comparator.cmxcon1[0]->set_OUTpin(&(*m_porta)[2]); + comparator.cmxcon1[0]->set_INpinNeg(&(*m_porta)[1], &(*m_porta)[4]); + comparator.cmxcon1[0]->set_INpinPos(&(*m_porta)[0]); + comparator.cmxcon0[0]->setBitMask(0xf7); + comparator.cmxcon0[0]->setIntSrc(new InterruptSource(pir2, (1<<5))); + comparator.cmxcon1[0]->setBitMask(0xf1); + comparator.assign_pir_set(get_pir_set()); + comparator.assign_t1gcon(&t1con_g.t1gcon); + comparator.assign_sr_module(&sr_module); + fvrcon.set_adcon1(&adcon1); + fvrcon.set_cpscon0(&cpscon0); + fvrcon.set_daccon0(m_daccon0); + fvrcon.set_cmModule(&comparator); + fvrcon.set_VTemp_AD_chan(0x1d); + fvrcon.set_FVRAD_AD_chan(0x1f); + + m_daccon0->set_adcon1(&adcon1); + m_daccon0->set_cpscon0(&cpscon0); + m_daccon0->set_cmModule(&comparator); + m_daccon0->set_FVRCDA_AD_chan(0x1e); + m_daccon0->setDACOUT(&(*m_porta)[0]); + + cpscon0.set_pin(0, &(*m_porta)[0]); + cpscon0.set_pin(1, &(*m_porta)[1]); + cpscon0.set_pin(2, &(*m_porta)[2]); + cpscon0.set_pin(3, &(*m_porta)[4]); + + + sr_module.setPins(&(*m_porta)[1], &(*m_porta)[2], &(*m_porta)[5]); + + osccon->set_osctune(&osctune); + osccon->set_oscstat(&oscstat); + osctune.set_osccon((OSCCON *)osccon); + osccon->write_mask = 0xfb; + dsm_module.usart_mod = &usart; +} + +//------------------------------------------------------------------- +void P12F1822::set_out_of_range_pm(uint address, uint value) +{ + + if( (address>= 0x2100) && (address < 0x2100 + get_eeprom()->get_rom_size())) + get_eeprom()->change_rom(address - 0x2100, value); +} + +void P12F1822::create_iopin_map() +{ + + package = new Package(8); + if(!package) + return; + + // Now Create the package and place the I/O pins + package->assign_pin(7, m_porta->addPin(new IO_bi_directional_pu("porta0"),0)); + package->assign_pin(6, m_porta->addPin(new IO_bi_directional_pu("porta1"),1)); + package->assign_pin(5, m_porta->addPin(new IO_bi_directional_pu("porta2"),2)); + package->assign_pin(4, m_porta->addPin(new IO_bi_directional_pu("porta3"),3)); + package->assign_pin(3, m_porta->addPin(new IO_bi_directional_pu("porta4"),4)); + package->assign_pin(2, m_porta->addPin(new IO_bi_directional_pu("porta5"),5)); + + package->assign_pin( 1, 0); // Vdd + package->assign_pin( 8, 0); // Vss +} + +void P12F1822::create(int ram_top, int eeprom_size, int dev_id) +{ + create_iopin_map(); + + e = new EEPROM_EXTND(this, pir2); + set_eeprom(e); + + osccon = new OSCCON_2(this, "osccon", "Oscillator Control Register"); + + pic_processor::create(); + + e->initialize(eeprom_size, 16, 16, 0x8000); + e->set_intcon(intcon); + e->get_reg_eecon1()->set_valid_bits(0xff); + + add_file_registers(0x20, ram_top, 0x00); + _14bit_e_processor::create_sfr_map(); + create_sfr_map(); + dsm_module.setOUTpin(&(*m_porta)[0]); + dsm_module.setMINpin(&(*m_porta)[1]); + dsm_module.setCIN1pin(&(*m_porta)[2]); + dsm_module.setCIN2pin(&(*m_porta)[4]); + // Set DeviceID + if (m_configMemory && m_configMemory->getConfigWord(6)) + m_configMemory->getConfigWord(6)->set(dev_id); +} + +void P12F1822::enter_sleep() +{ + tmr1l.sleep(); + osccon->sleep(); + _14bit_e_processor::enter_sleep(); +} + +void P12F1822::exit_sleep() +{ + if (m_ActivityState == ePASleeping) + { + tmr1l.wake(); + osccon->wake(); + _14bit_e_processor::exit_sleep(); + } +} + +void P12F1822::option_new_bits_6_7(uint bits) +{ + Dprintf(("P12F1822::option_new_bits_6_7 bits=%x\n", bits)); + m_porta->setIntEdge ( (bits & OPTION_REG::BIT6) == OPTION_REG::BIT6); + m_wpua->set_wpu_pu ( (bits & OPTION_REG::BIT7) != OPTION_REG::BIT7); +} + +void P12F1822::oscillator_select(uint cfg_word1, bool clkout) +{ + uint mask = 0x1f; + + uint fosc = cfg_word1 & (FOSC0|FOSC1|FOSC2); + + osccon->set_config_irc(fosc == 4); + osccon->set_config_xosc(fosc < 3); + osccon->set_config_ieso(cfg_word1 & IESO); + set_int_osc(false); + switch(fosc) + { + case 0: //LP oscillator: low power crystal + case 1: //XT oscillator: Crystal/resonator + case 2: //HS oscillator: High-speed crystal/resonator + mask = 0x0f; + break; + + case 3: //EXTRC oscillator External RC circuit connected to CLKIN pin + mask = 0x1f; + if(clkout) mask = 0x0f; + break; + + case 4: //INTOSC oscillator: I/O function on CLKIN pin + set_int_osc(true); + mask = 0x3f; + if(clkout) mask = 0x2f; + break; + + case 5: //ECL: External Clock, Low-Power mode (0-0.5 MHz): on CLKIN pin + mask = 0x1f; + if(clkout) mask = 0x0f; + break; + + case 6: //ECM: External Clock, Medium-Power mode (0.5-4 MHz): on CLKIN pin + mask = 0x1f; + if(clkout) mask = 0x0f; + break; + + case 7: //ECH: External Clock, High-Power mode (4-32 MHz): on CLKIN pin + mask = 0x1f; + if(clkout) mask = 0x0f; + break; + }; + ansela.setValidBits(0x17 & mask); + m_porta->setEnableMask(mask); +} + +void P12F1822::program_memory_wp(uint mode) +{ + switch(mode) + { + case 3: // no write protect + get_eeprom()->set_prog_wp(0x0); + break; + + case 2: // write protect 0000-01ff + get_eeprom()->set_prog_wp(0x0200); + break; + + case 1: // write protect 0000-03ff + get_eeprom()->set_prog_wp(0x0400); + break; + + case 0: // write protect 0000-07ff + get_eeprom()->set_prog_wp(0x0800); + break; + + default: + printf("%s unexpected mode %u\n", __FUNCTION__, mode); + break; + } + +} +//======================================================================== + + +P12LF1822::P12LF1822(const char *_name, const char *desc) + : P12F1822(_name,desc) +{} + +P12LF1822::~P12LF1822() +{} + +Processor * P12LF1822::construct(const char *name) +{ + P12LF1822 *p = new P12LF1822(name); + + p->create(0x7f, 256, 0x2800); + p->create_invalid_registers (); + + return p; +} + +void P12LF1822::create(int ram_top, int eeprom_size, int dev_id) +{ + P12F1822::create(ram_top, eeprom_size, dev_id); +} + +//======================================================================== +Processor * P12F1840::construct(const char *name) +{ + P12F1840 *p = new P12F1840(name); + + p->create(0x7f, 256, 0x1b80); + p->create_invalid_registers (); + + return p; +} + +P12F1840::P12F1840(const char *_name, const char *desc) : + P12F1822(_name, desc) +{ +} + +P12F1840::~P12F1840() +{ + delete_file_registers(0xc0, 0xef, 0x00); + delete_file_registers(0x120, 0x16f, 0x00); + delete_sfr_register(vrefcon); +} + +void P12F1840::create(int ram_top, int eeprom_size, int dev_id) +{ + P12F1822::create(ram_top, eeprom_size, 0x1b80); + add_file_registers(0xc0, 0xef, 0x00); + add_file_registers(0x120, 0x16f, 0x00); + + vrefcon = new sfr_register(this, "vrefcon", + "Voltage Regulator Control Register"); + add_sfr_register(vrefcon, 0x197, RegisterValue(0x01,0)); +} + +//======================================================================== +Processor * P12LF1840::construct(const char *name) +{ + P12LF1840 *p = new P12LF1840(name); + + p->create(0x7f, 256, 0x1b80); + p->create_invalid_registers (); + + return p; +} + +P12LF1840::P12LF1840(const char *_name, const char *desc) : + P12F1840(_name, desc) +{ +} + +P12LF1840::~P12LF1840() +{ +} + +void P12LF1840::create(int ram_top, int eeprom_size, int dev_id) +{ + P12F1840::create(ram_top, eeprom_size, 0x1bc0); +} + +//======================================================================== + +P16F1823::P16F1823(const char *_name, const char *desc) + : P12F1822(_name,desc), + anselc(this, "anselc", "Analog Select port c") +{ + + m_portc = new PicPortBRegister(this,"portc","", intcon, 8,0x3f); + m_trisc = new PicTrisRegister(this,"trisc","", m_portc, false, 0x3f); + m_latc = new PicLatchRegister(this,"latc","",m_portc, 0x3f); + m_wpuc = new WPU(this, "wpuc", "Weak Pull-up Register", m_portc, 0x3f); + comparator.cmxcon0[1] = new CMxCON0(this, "cm2con0", " Comparator C2 Control Register 0", 1, &comparator); + comparator.cmxcon1[1] = new CMxCON1(this, "cm2con1", " Comparator C2 Control Register 1", 1, &comparator); + cpscon1.mValidBits = 0x0f; + pir2->valid_bits |= PIR2v1822::C2IF; + pir2->writable_bits |= PIR2v1822::C2IF; +} + +P16F1823::~P16F1823() +{ + delete_sfr_register(m_portc); + delete_sfr_register(m_trisc); + delete_sfr_register(m_latc); + remove_sfr_register(comparator.cmxcon0[1]); + remove_sfr_register(comparator.cmxcon1[1]); + delete_sfr_register(m_wpuc); + remove_sfr_register(&anselc); +} + +void P16F1823::create_iopin_map() +{ + package = new Package(14); + if(!package) return; + + // Now Create the package and place the I/O pins + package->assign_pin(13, m_porta->addPin(new IO_bi_directional_pu("porta0"),0)); + package->assign_pin(12, m_porta->addPin(new IO_bi_directional_pu("porta1"),1)); + package->assign_pin(11, m_porta->addPin(new IO_bi_directional_pu("porta2"),2)); + package->assign_pin(4, m_porta->addPin(new IO_bi_directional_pu("porta3"),3)); + package->assign_pin(3, m_porta->addPin(new IO_bi_directional_pu("porta4"),4)); + package->assign_pin(2, m_porta->addPin(new IO_bi_directional_pu("porta5"),5)); + + package->assign_pin(10, m_portc->addPin(new IO_bi_directional_pu("portc0"),0)); + package->assign_pin(9, m_portc->addPin(new IO_bi_directional_pu("portc1"),1)); + package->assign_pin(8, m_portc->addPin(new IO_bi_directional_pu("portc2"),2)); + package->assign_pin(7, m_portc->addPin(new IO_bi_directional_pu("portc3"),3)); + package->assign_pin(6, m_portc->addPin(new IO_bi_directional_pu("portc4"),4)); + package->assign_pin(5, m_portc->addPin(new IO_bi_directional_pu("portc5"),5)); + + package->assign_pin( 1, 0); // Vdd + package->assign_pin( 14, 0); // Vss +} + +Processor * P16F1823::construct(const char *name) +{ + P16F1823 *p = new P16F1823(name); + + p->create(0x7f, 256, 0x2720); + p->create_invalid_registers (); + + return p; +} + +void P16F1823::create(int ram_top, int eeprom_size, int dev_id) +{ + create_iopin_map(); + e = new EEPROM_EXTND(this, pir2); + set_eeprom(e); + + osccon = new OSCCON_2(this, "osccon", "Oscillator Control Register"); + + pic_processor::create(); + + e->initialize(eeprom_size, 16, 16, 0x8000); + e->set_intcon(intcon); + e->get_reg_eecon1()->set_valid_bits(0xff); + + add_file_registers(0x20, ram_top, 0x00); + _14bit_e_processor::create_sfr_map(); + P12F1822::create_sfr_map(); + create_sfr_map(); + dsm_module.setOUTpin(&(*m_portc)[4]); + dsm_module.setMINpin(&(*m_portc)[3]); + dsm_module.setCIN1pin(&(*m_portc)[2]); + dsm_module.setCIN2pin(&(*m_portc)[5]); + // Set DeviceID + if (m_configMemory && m_configMemory->getConfigWord(6)) + m_configMemory->getConfigWord(6)->set(dev_id); +} + +void P16F1823::create_sfr_map() +{ + add_sfr_register(m_portc, 0x0e); + add_sfr_register(m_trisc, 0x8e, RegisterValue(0x3f,0)); + add_sfr_register(m_latc, 0x10e); + add_sfr_register(comparator.cmxcon0[1], 0x113, RegisterValue(0x04,0)); + add_sfr_register(comparator.cmxcon1[1], 0x114, RegisterValue(0x00,0)); + add_sfr_register(&anselc, 0x18e, RegisterValue(0x0f,0)); + add_sfr_register(m_wpuc, 0x20e, RegisterValue(0x3f,0),"wpuc"); + + anselc.config(0x0f, 4); + anselc.setValidBits(0x0f); + anselc.setAdcon1(&adcon1); + ansela.setAnsel(&anselc); + anselc.setAnsel(&ansela); + adcon1.setIOPin(4, &(*m_portc)[0]); + adcon1.setIOPin(5, &(*m_portc)[1]); + adcon1.setIOPin(6, &(*m_portc)[2]); + adcon1.setIOPin(7, &(*m_portc)[3]); + + ssp.set_sckPin(&(*m_portc)[0]); + ssp.set_sdiPin(&(*m_portc)[1]); + ssp.set_sdoPin(&(*m_portc)[2]); + ssp.set_ssPin(&(*m_portc)[3]); + ssp.set_tris(m_trisc); + + // Pin values for default APFCON + usart.set_TXpin(&(*m_portc)[4]); // TX pin + usart.set_RXpin(&(*m_portc)[5]); // RX pin + + ccp1con.setIOpin(&(*m_portc)[5], &(*m_portc)[4], &(*m_portc)[3], &(*m_portc)[2]); + apfcon.set_ValidBits(0xec); + // pins 0,1 not used for p16f1823 + apfcon.set_pins(2, &usart, USART_MODULE::TX_PIN, &(*m_portc)[4], &(*m_porta)[0]); //USART TX Pin + // pin 3 defined in p12f1822 + apfcon.set_pins(5, &ssp, SSP1_MODULE::SS_PIN, &(*m_portc)[3], &(*m_porta)[3]); //SSP SS + apfcon.set_pins(6, &ssp, SSP1_MODULE::SDO_PIN, &(*m_portc)[2], &(*m_porta)[4]); //SSP SDO + apfcon.set_pins(7, &usart, USART_MODULE::RX_PIN, &(*m_portc)[5], &(*m_porta)[1]); //USART RX Pin + comparator.cmxcon1[0]->set_INpinNeg(&(*m_porta)[1], &(*m_portc)[1], + &(*m_portc)[2], &(*m_portc)[3]); + comparator.cmxcon1[1]->set_INpinNeg(&(*m_porta)[1], &(*m_portc)[1], + &(*m_portc)[2], &(*m_portc)[3]); + comparator.cmxcon1[1]->set_INpinPos(&(*m_portc)[0]); + comparator.cmxcon1[0]->set_OUTpin(&(*m_porta)[2]); + comparator.cmxcon1[1]->set_OUTpin(&(*m_portc)[4]); + comparator.cmxcon0[0]->setBitMask(0xf7); + comparator.cmxcon0[0]->setIntSrc(new InterruptSource(pir2, (1<<5))); + comparator.cmxcon0[1]->setBitMask(0xf7); + comparator.cmxcon0[1]->setIntSrc(new InterruptSource(pir2, (1<<6))); + comparator.cmxcon1[0]->setBitMask(0xf3); + comparator.cmxcon1[1]->setBitMask(0xf3); + + + cpscon0.set_pin(4, &(*m_portc)[0]); + cpscon0.set_pin(5, &(*m_portc)[1]); + cpscon0.set_pin(6, &(*m_portc)[2]); + cpscon0.set_pin(7, &(*m_portc)[3]); + sr_module.srcon1.set_ValidBits(0xff); + sr_module.setPins(&(*m_porta)[1], &(*m_porta)[2], &(*m_portc)[4]); +} +//======================================================================== + + +P16LF1823::P16LF1823(const char *_name, const char *desc) + : P16F1823(_name,desc) +{ +} +P16LF1823::~P16LF1823() +{ +} + +void P16LF1823::create(int ram_top, int eeprom_size, int dev_id) +{ + P16F1823::create(ram_top, eeprom_size, dev_id); +} + +Processor * P16LF1823::construct(const char *name) +{ + P16LF1823 *p = new P16LF1823(name); + + p->create(0x7f, 256, 0x2820); + p->create_invalid_registers (); + + return p; +} + +//======================================================================== +Processor * P16F1825::construct(const char *name) +{ + P16F1825 *p = new P16F1825(name); + + p->create( 0x7f, 256, 0x2760 ); + p->create_invalid_registers (); + + return p; +} +P16F1825::P16F1825(const char *_name, const char *desc) + : P16F1823(_name, desc) + , pie3( this,"pie3", "Peripheral Interrupt Enable") + , t4con( this, "t4con", "TMR4 Control") + , pr4( this, "pr4", "TMR4 Period Register") + , tmr4( this, "tmr4", "TMR4 Register") + , t6con( this, "t6con", "TMR6 Control") + , pr6( this, "pr6", "TMR6 Period Register") + , tmr6( this, "tmr6", "TMR6 Register") + , ccp2con( this, "ccp2con", "Capture Compare Control") + , ccpr2l( this, "ccpr2l", "Capture Compare 2 Low") + , ccpr2h( this, "ccpr2h", "Capture Compare 2 High") + , pwm2con( this, "pwm2con", "Enhanced PWM Control Register") + , ccp2as( this, "ccp2as", "CCP2 Auto-Shutdown Control Register") + , pstr2con( this, "pstr2con", "Pulse Sterring Control Register") + , ccp3con( this, "ccp3con", "Capture Compare Control") + , ccpr3l( this, "ccpr3l", "Capture Compare 3 Low") + , ccpr3h( this, "ccpr3h", "Capture Compare 3 High") + , ccp4con( this, "ccp4con", "Capture Compare Control") + , ccpr4l( this, "ccpr4l", "Capture Compare 4 Low") + , ccpr4h( this, "ccpr4h", "Capture Compare 4 High") + , ccptmrs( this, "ccptmrs", "PWM Timer Selection Control Register") + , apfcon0( this, "apfcon0", "Alternate Pin Function Control Register 0", 0xec) + , apfcon1( this, "apfcon1", "Alternate Pin Function Control Register 1", 0x0f) + , inlvla(this, "inlvla", "PORTA Input Level Control Register") + , inlvlc(this, "inlvlc", "PORTC Input Level Control Register") +{ + pir3 = new PIR( this, "pir3", "Peripheral Interrupt Register", intcon, &pie3, 0x3a); +} + +P16F1825::~P16F1825() +{ + delete_file_registers(0xc0, 0xef); + delete_file_registers(0x120, 0x16f); + delete_file_registers(0x1a0, 0x1ef); + delete_file_registers(0x220, 0x26f); + delete_file_registers(0x2a0, 0x2ef); + delete_file_registers(0x320, 0x32f); + delete_file_registers(0x420, 0x46f); + delete_file_registers(0x4a0, 0x4ef); + delete_file_registers(0x520, 0x56f); + delete_file_registers(0x5a0, 0x5ef); + delete_sfr_register(pir3); + remove_sfr_register(&pie3); + remove_sfr_register(&ccpr2l); + remove_sfr_register(&ccpr2h); + remove_sfr_register(&ccp2con); + remove_sfr_register(&pwm2con); + remove_sfr_register(&ccp2as); + remove_sfr_register(&pstr2con); + remove_sfr_register(&ccptmrs); + remove_sfr_register(&ccpr3l); + remove_sfr_register(&ccpr3h); + remove_sfr_register(&ccp3con); + remove_sfr_register(&ccpr4l); + remove_sfr_register(&ccpr4h); + remove_sfr_register(&ccp4con); + remove_sfr_register(&apfcon1); + remove_sfr_register(&inlvla); + remove_sfr_register(&inlvlc); + remove_sfr_register(&tmr4); + remove_sfr_register(&pr4); + remove_sfr_register(&t4con); + remove_sfr_register(&tmr6); + remove_sfr_register(&pr6); + remove_sfr_register(&t6con); +} + +void P16F1825::create(int ram_top, int eeprom_size, int dev_id) +{ + P16F1823::create( ram_top, eeprom_size, dev_id ); + pir_set_2_def.set_pir3(pir3); + pie3.setPir(pir3); + add_file_registers(0xc0, 0xef, 0x00); + add_file_registers(0x120, 0x16f, 0x00); + add_file_registers(0x1a0, 0x1ef, 0x00); + add_file_registers(0x220, 0x26f, 0x00); + add_file_registers(0x2a0, 0x2ef, 0x00); + add_file_registers(0x320, 0x32f, 0x00); + add_file_registers(0x420, 0x46f, 0x00); + add_file_registers(0x4a0, 0x4ef, 0x00); + add_file_registers(0x520, 0x56f, 0x00); + add_file_registers(0x5a0, 0x5ef, 0x00); + add_sfr_register(pir3, 0x013, RegisterValue(0,0)); + add_sfr_register(&pie3, 0x093, RegisterValue(0,0)); + add_sfr_register(&apfcon1, 0x11e, RegisterValue(0,0)); + add_sfr_register(&ccpr2l, 0x298, RegisterValue(0,0)); + add_sfr_register(&ccpr2h, 0x299, RegisterValue(0,0)); + add_sfr_registerR(&ccp2con, 0x29a, RegisterValue(0,0)); + add_sfr_register(&pwm2con, 0x29b, RegisterValue(0,0)); + add_sfr_register(&ccp2as, 0x29c, RegisterValue(0,0)); + add_sfr_register(&pstr2con, 0x29d, RegisterValue(1,0)); + ccptmrs.set_tmr246(&tmr2, &tmr4, &tmr6); + ccptmrs.set_ccp(&ccp1con, &ccp2con, &ccp3con, &ccp4con); + add_sfr_registerR(&ccptmrs, 0x29e, RegisterValue(0,0)); + + tmr2.add_ccp ( &ccp2con ); + add_sfr_register(&ccpr3l, 0x311, RegisterValue(0,0)); + add_sfr_register(&ccpr3h, 0x312, RegisterValue(0,0)); + add_sfr_registerR(&ccp3con, 0x313, RegisterValue(0,0)); + add_sfr_register(&ccpr4l, 0x318, RegisterValue(0,0)); + add_sfr_register(&ccpr4h, 0x319, RegisterValue(0,0)); + add_sfr_registerR(&ccp4con, 0x31a, RegisterValue(0,0)); + + add_sfr_register(&inlvla, 0x38c, RegisterValue(0,0)); + add_sfr_register(&inlvlc, 0x38e, RegisterValue(0,0)); + + add_sfr_register(&tmr4, 0x415, RegisterValue(0,0)); + add_sfr_register(&pr4, 0x416, RegisterValue(0,0)); + add_sfr_register(&t4con, 0x417, RegisterValue(0,0)); + add_sfr_register(&tmr6, 0x41c, RegisterValue(0,0)); + add_sfr_register(&pr6, 0x41d, RegisterValue(0,0)); + add_sfr_register(&t6con, 0x41e, RegisterValue(0,0)); + + ccp1con.setBitMask(0xff); + ccp1con.setIOpin(&(*m_portc)[5], &(*m_portc)[4], &(*m_portc)[3], &(*m_portc)[2]); + ccp2as.setIOpin(0, 0, &(*m_porta)[2]); + ccp2as.link_registers(&pwm2con, &ccp2con); + + ccp2con.setBitMask(0xff); + ccp2con.setIOpin(&(*m_portc)[3], &(*m_portc)[2]); + ccp2con.pstrcon = &pstr2con; + ccp2con.pwm1con = &pwm2con; + ccp2con.setCrosslinks(&ccpr2l, pir2, PIR2v1822::CCP2IF, &tmr2, &ccp2as); + ccpr2l.ccprh = &ccpr2h; + ccpr2l.tmrl = &tmr1l; + ccpr2h.ccprl = &ccpr2l; + ccp3con.setCrosslinks(&ccpr3l, pir3, (1<<4), 0, 0); + ccp3con.setIOpin(&(*m_porta)[2]); + ccpr3l.ccprh = &ccpr3h; + ccpr3l.tmrl = &tmr1l; + ccpr3h.ccprl = &ccpr3l; + ccp4con.setCrosslinks(&ccpr4l, pir3, (1<<5), 0, 0); + ccp4con.setIOpin(&(*m_portc)[1]); + ccpr4l.ccprh = &ccpr4h; + ccpr4l.tmrl = &tmr1l; + ccpr4h.ccprl = &ccpr4l; + t4con.tmr2 = &tmr4; + + tmr4.setInterruptSource(new InterruptSource(pir3, 1<<1)); + tmr4.pir_set = get_pir_set(); + tmr4.pr2 = &pr4; + tmr4.t2con = &t4con; + + + t6con.tmr2 = &tmr6; + tmr6.setInterruptSource(new InterruptSource(pir3, 1<<3)); + tmr6.pr2 = &pr6; + tmr6.t2con = &t6con; + + pr2.tmr2 = &tmr2; + pr4.tmr2 = &tmr4; + pr6.tmr2 = &tmr6; + + apfcon0.set_pins(2, &usart, USART_MODULE::TX_PIN, &(*m_portc)[4], &(*m_porta)[0]); //USART TX Pin + apfcon0.set_pins(3, &t1con_g.t1gcon, 0, &(*m_porta)[4], &(*m_porta)[3]); //tmr1 gate + apfcon0.set_pins(5, &ssp, SSP1_MODULE::SS_PIN, &(*m_portc)[3], &(*m_porta)[3]); //SSP SS + apfcon0.set_pins(6, &ssp, SSP1_MODULE::SDO_PIN, &(*m_portc)[2], &(*m_porta)[4]); //SSP SDO + apfcon0.set_pins(7, &usart, USART_MODULE::RX_PIN, &(*m_portc)[5], &(*m_porta)[1]); //USART RX Pin + apfcon1.set_pins(0, &ccp2con, CCPCON::CCP_PIN, &(*m_portc)[3], &(*m_porta)[5]); //CCP2/P2A + apfcon1.set_pins(1, &ccp2con, CCPCON::PxB_PIN, &(*m_portc)[2], &(*m_porta)[4]); //P2B + apfcon1.set_pins(2, &ccp1con, CCPCON::PxC_PIN, &(*m_portc)[3], &(*m_portc)[1]); //P1C + apfcon1.set_pins(3, &ccp1con, CCPCON::PxD_PIN, &(*m_portc)[2], &(*m_portc)[0]); //P1D +} + +//======================================================================== +Processor * P16LF1825::construct(const char *name) +{ + P16LF1825 *p = new P16LF1825(name); + + p->create(0x3FF, 256, 0x2860); + p->create_invalid_registers (); + + return p; +} +P16LF1825::P16LF1825(const char *_name, const char *desc) + : P16F1825(_name, desc) +{ +} + +P16LF1825::~P16LF1825() +{ +} + +void P16LF1825::create(int ram_top, int eeprom_size, int dev_id) +{ + P16F1825::create(ram_top, eeprom_size, dev_id); +} diff --git a/src/gpsim/devices/p1xf1xxx.h b/src/gpsim/devices/p1xf1xxx.h new file mode 100644 index 0000000..9a8be2a --- /dev/null +++ b/src/gpsim/devices/p1xf1xxx.h @@ -0,0 +1,249 @@ +/* + Copyright (C) 2013,2014,2017 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +#ifndef __P1xF1xxx_H__ +#define __P1xF1xxx_H__ + +#include "p16f178x.h" +#include "p16f1503.h" + +#include "14bit-processors.h" +#include "14bit-tmrs.h" +#include "intcon.h" +#include "pir.h" +#include "pie.h" +#include "eeprom.h" +#include "comparator.h" +#include "a2dconverter.h" +#include "pic-ioports.h" +#include "dsm_module.h" +#include "cwg.h" +#include "nco.h" +#include "clc.h" +#include "apfcon.h" + +#define FOSC0 (1<<0) +#define FOSC1 (1<<1) +#define FOSC2 (1<<2) +#define IESO (1<<12) + + +class P12F1822 : public _14bit_e_processor +{ + public: + ComparatorModule2 comparator; + PIR_SET_2 pir_set_2_def; + PIE pie1; + PIR *pir1; + PIE pie2; + PIR *pir2; + T2CON_64 t2con; + PR2 pr2; + TMR2 tmr2; + T1CON_G t1con_g; + TMRL tmr1l; + TMRH tmr1h; + CCPCON ccp1con; + CCPRL ccpr1l; + CCPRH ccpr1h; + FVRCON fvrcon; + BORCON borcon; + ANSEL_P ansela; + ADCON0 adcon0; + ADCON1_16F adcon1; + sfr_register adresh; + sfr_register adresl; + OSCCON_2 *osccon; + OSCTUNE osctune; + OSCSTAT oscstat; + //OSCCAL osccal; + WDTCON wdtcon; + USART_MODULE usart; + SSP1_MODULE ssp; + APFCON apfcon; + PWM1CON pwm1con; + ECCPAS ccp1as; + PSTRCON pstr1con; + CPSCON0 cpscon0; + CPSCON1 cpscon1; + SR_MODULE sr_module; + EEPROM_EXTND *e; + + WPU *m_wpua; + IOC *m_iocap; + IOC *m_iocan; + IOCxF *m_iocaf; + PicPortIOCRegister *m_porta; + PicTrisRegister *m_trisa; + PicLatchRegister *m_lata; + DACCON0 *m_daccon0; + DACCON1 *m_daccon1; + DSM_MODULE dsm_module; + + virtual PIR *get_pir2() { return (NULL); } + virtual PIR *get_pir1() { return (pir1); } + virtual PIR_SET *get_pir_set() { return (&pir_set_2_def); } + + virtual EEPROM_EXTND *get_eeprom() { return ((EEPROM_EXTND *)eeprom); } + + virtual PROCESSOR_TYPE isa(){return _P12F1822_;}; + + static Processor *construct(const char *name); + P12F1822(const char *_name=0, const char *desc=0); + ~P12F1822(); + virtual void create_sfr_map(); + + virtual void set_out_of_range_pm(uint address, uint value); + virtual void create_iopin_map(); + virtual void create(int ram_top, int eeprom_size, int dev_id); + virtual uint register_memory_size () const { return 0x1000; } + virtual void option_new_bits_6_7(uint bits); + virtual uint program_memory_size() const { return 2048; } + virtual void enter_sleep(); + virtual void exit_sleep(); + virtual void oscillator_select(uint mode, bool clkout); + virtual void program_memory_wp(uint mode); +}; + +class P12LF1822 : public P12F1822 +{ + public: + + virtual PROCESSOR_TYPE isa(){return _P12LF1822_;}; + + static Processor *construct(const char *name); + + P12LF1822(const char *_name=0, const char *desc=0); + ~P12LF1822(); + virtual void create(int ram_top, int eeprom_size, int dev_id); +}; + +class P12F1840 : public P12F1822 +{ + public: + static Processor *construct(const char *name); + virtual uint program_memory_size() const { return 4096; } + virtual void create(int ram_top, int eeprom_size, int dev_id); + virtual PROCESSOR_TYPE isa(){return _P12F1840_;}; + + P12F1840(const char *_name=0, const char *desc=0); + ~P12F1840(); + + sfr_register *vrefcon; +}; + +class P12LF1840 : public P12F1840 +{ + public: + static Processor *construct(const char *name); + virtual void create(int ram_top, int eeprom_size, int dev_id); + virtual PROCESSOR_TYPE isa(){return _P12LF1840_;}; + + P12LF1840(const char *_name=0, const char *desc=0); + ~P12LF1840(); +}; + +class P16F1823 : public P12F1822 +{ + public: + ANSEL_P anselc; + virtual PROCESSOR_TYPE isa(){return _P16F1823_;}; + + P16F1823(const char *_name=0, const char *desc=0); + ~P16F1823(); + + static Processor *construct(const char *name); + virtual void create_sfr_map(); + virtual void create_iopin_map(); + virtual void create(int ram_top, int eeprom_size, int dev_id); + + PicPortBRegister *m_portc; + PicTrisRegister *m_trisc; + PicLatchRegister *m_latc; + WPU *m_wpuc; +}; + +class P16LF1823 : public P16F1823 +{ + public: + virtual PROCESSOR_TYPE isa(){return _P16LF1823_;}; + + P16LF1823(const char *_name=0, const char *desc=0); + ~P16LF1823(); + + static Processor *construct(const char *name); + virtual void create(int ram_top, int eeprom_size, int dev_id); + +}; + +class P16F1825 : public P16F1823 +{ + public: + static Processor *construct( const char *name ); + virtual uint program_memory_size() const { return 8*1024; } + virtual void create( int ram_top, int eeprom_size, int dev_id ); + virtual PROCESSOR_TYPE isa(){ return _P16F1825_; }; + + P16F1825( const char *_name=0, const char *desc=0 ); + ~P16F1825(); + + PIE pie3; + PIR* pir3; + T2CON_64 t4con; + PR2 pr4; + TMR2 tmr4; + T2CON_64 t6con; + PR2 pr6; + TMR2 tmr6; + CCPCON ccp2con; + CCPRL ccpr2l; + CCPRH ccpr2h; + PWM1CON pwm2con; + ECCPAS ccp2as; + PSTRCON pstr2con; + CCPCON ccp3con; + CCPRL ccpr3l; + CCPRH ccpr3h; + CCPCON ccp4con; + CCPRL ccpr4l; + CCPRH ccpr4h; + CCPTMRS14 ccptmrs; + APFCON apfcon0; + APFCON apfcon1; + sfr_register inlvla; + sfr_register inlvlc; +}; + +class P16LF1825 : public P16F1825 +{ + public: + static Processor *construct(const char *name); + virtual void create(int ram_top, int eeprom_size, int dev_id); + virtual PROCESSOR_TYPE isa(){return _P16LF1825_;}; + + P16LF1825(const char *_name=0, const char *desc=0); + ~P16LF1825(); +}; +#endif //__P1xF1xxx_H__ diff --git a/src/gpsim/errors.cc b/src/gpsim/errors.cc new file mode 100644 index 0000000..89d5697 --- /dev/null +++ b/src/gpsim/errors.cc @@ -0,0 +1,77 @@ + +#include "errors.h" + +/***************************************************************** + * The primordial Assembler Error class. + */ +AnError::AnError(const std::string & _severity, const std::string & _errMsg) + : severity(_severity), errMsg(_errMsg) +{ +} + +AnError::~AnError() +{ +} + +string AnError::toString() +{ + return string("\"" + errMsg + "\""); +} + + +string AnError::get_errMsg() +{ + return errMsg; +} + +/***************************************************************** + * Generate assembler errors of severity "ERROR" + */ +int Error::count; + +Error::Error(const std::string & errMsg) + : AnError(string("ERROR"), errMsg) +{ +} + +Error::~Error() +{ +} + +/***************************************************************** + * Generate assembler errors of severity "FATAL_ERROR" + */ +FatalError::FatalError(const std::string & errMsg) + : AnError(string("FATAL_ERROR"), errMsg) +{ +} + +FatalError::~FatalError() +{ +} + +/***************************************************************** + * Generate a generic Type Mismatch error of the "expected xx, + * observed yy" variety. + */ +TypeMismatch::TypeMismatch(const std::string &theOperator, + const std::string &expectedType, const std::string &observedType) + : Error(" Type mismatch for " + theOperator + " operator. Type expected " + expectedType + + ", found " + observedType) +{ +} + +/***************************************************************** + * Generate a generic Type Mismatch error of the "operator x + * cannot be applied to type y" variety. + */ +TypeMismatch::TypeMismatch(const std::string &theOperator, + const std::string &observedType) + : Error("Operator <" + theOperator + "> cannot be applied to type " + + observedType) +{ +} + +TypeMismatch::~TypeMismatch() +{ +} diff --git a/src/gpsim/errors.h b/src/gpsim/errors.h new file mode 100644 index 0000000..460978a --- /dev/null +++ b/src/gpsim/errors.h @@ -0,0 +1,48 @@ +#if !defined(_ERRORS_H_) +#define _ERRORS_H_ + +#include + +#include "gpsim_object.h" +using namespace std; + +//***************************************************************** +class AnError : public gpsimObject { + public: + AnError(const std::string &severity, const std::string &errMsg); + virtual ~AnError(); + + string toString(); + string get_errMsg(); + + private: + string severity; + string errMsg; +}; + +//***************************************************************** +class Error : public AnError { + public: + explicit Error(const std::string &errMsg); + virtual ~Error(); + + static int count; +}; + +//***************************************************************** +class FatalError : public AnError { + public: + explicit FatalError(const std::string &errMsg); + virtual ~FatalError(); +}; + +//***************************************************************** +class TypeMismatch : public Error { + public: + TypeMismatch(const std::string &theOperator, const std::string &expectedType, + const std::string &observedType); + TypeMismatch(const std::string &theOperator, const std::string &observedType); + virtual ~TypeMismatch(); +}; + +#endif // _ERRORS_ diff --git a/src/gpsim/gpsim_classes.h b/src/gpsim/gpsim_classes.h new file mode 100644 index 0000000..c90a90c --- /dev/null +++ b/src/gpsim/gpsim_classes.h @@ -0,0 +1,65 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +/* + * gpsim_classes.h + * + * This include file contains most of the class names defined in gpsim + * It's used to define forward references to classes and help alleviate + * include file dependencies. + */ + +#ifndef __GPSIM_CLASSES_H__ +#define __GPSIM_CLASSES_H__ + +/*================================================================== + * + * Here are a few enum definitions + */ + + +/* + * Define all of the different types of reset conditions: + */ + +enum RESET_TYPE +{ + POR_RESET, // Power-on reset + WDT_RESET, // Watch Dog timer timeout reset + IO_RESET, // I/O pin reset + MCLR_RESET, // MCLR (Master Clear) reset + SOFT_RESET, // Software initiated reset + BOD_RESET, // Brown out detection reset + SIM_RESET, // Simulation Reset + EXIT_RESET, // Leaving Reset, resuming normal execution. + OTHER_RESET, // + STKUNF_RESET, // Stack undeflow reset + STKOVF_RESET // Statck overflow reset + +}; + +enum IOPIN_TYPE +{ + INPUT_ONLY, // e.g. MCLR + BI_DIRECTIONAL, // most iopins + BI_DIRECTIONAL_PU, // same as bi_directional, but with pullup resistor. e.g. portb + OPEN_COLLECTOR // bit4 in porta on the 18 pin midrange devices. +}; +#endif // __GPSIM_CLASSES_H__ diff --git a/src/gpsim/gpsim_object.cc b/src/gpsim/gpsim_object.cc new file mode 100644 index 0000000..860bbca --- /dev/null +++ b/src/gpsim/gpsim_object.cc @@ -0,0 +1,186 @@ + +/* + Copyright (C) 2004 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include +#include +#include +#include + +#include "config.h" + +#include "gpsim_object.h" + +//======================================================================== + +gpsimObject::gpsimObject() +: cpDescription(0) +{ +} + +gpsimObject::gpsimObject(const char *_name, const char *desc) + : cpDescription(desc) +{ + if (_name) + name_str = _name; +} + +gpsimObject::~gpsimObject() +{ + name_str.clear(); + cpDescription = 0; +} + +// The 'type' of any Viewable object is equivalent to the class name. +string gpsimObject::showType() +{ + const char* name; + + name = typeid(*this).name(); + + /* Unfortunately, the class name string returned by typeid() is + * implementation-specific. If a particular compiler produces + * ugly output, this is your chance to clean it up. */ +#if defined __GNUC__ + /* GNU C++ puts the length of the class name in front of the + actual class name. We will skip over it for clarity. */ + if (*name == 'N') // Class names with format N nn name nn name E + { + char buf[256]; + int cnt; + + name++; + buf[0] = 0; + + while (isdigit(*name)) + { + for(cnt = 0; isdigit(*name); name++) + cnt = cnt * 10 + *name - '0'; + strncat(buf, name, cnt); + name += cnt; + if (isdigit(*name)) + strcat(buf, "::"); + } + name = buf; + } + else // just nn name + { + while (isdigit(*name)) + name++; + } +#elif defined _MSC_VER + /* + From Visual C++ on line documentation + The type_info::name member function returns a const char* to + a null-terminated string representing the human-readable name + of the type. The memory pointed to is cached and should never + be directly deallocated. + */ + // Skip over the word 'class '. + name += 6; +#else + #warning --->You might want to clean up the result of typeid() here... +#endif + + return string(name); +} + + +string gpsimObject::show() +{ + return showType() + ":" + toString(); +} + +void gpsimObject::new_name(const char *s) +{ + + if(s) + name_str = string(s); +} + +void gpsimObject::new_name(string &new_name) +{ + name_str = new_name; +} + +char *gpsimObject::name(char *return_str, int len) +{ + if(return_str) + snprintf(return_str,len,"%s",name_str.c_str()); + + return return_str; +} + +/// TEMPORARY -- remove after gpsimValue and Value have been merged. +uint gpsimObject::get_value() +{ + return 0; +} + +char *gpsimObject::toString(char *return_str, int len) +{ + if(return_str) + snprintf(return_str,len,"%s",toString().c_str()); + + return return_str; +} +char *gpsimObject::toBitStr(char *return_str, int len) +{ + if(return_str) + *return_str = 0; + + return return_str; +} + +string &gpsimObject::name(void) const +{ + return (string &)name_str; +} + +string gpsimObject::toString() +{ + //return showType(); + + char buff[64]; + snprintf(buff,sizeof(buff), " = 0x%x",get_value()); + string s = name() + string(buff); + return s; + +} + +int gpsimObject::clear_break() +{ + //cout << showType() << " objects do not support break points\n"; + return -1; +} + +string gpsimObject::description() +{ + if(cpDescription) + return string(cpDescription); + else + return string("no description"); +} + +void gpsimObject::set_description(const char *new_description) +{ + cpDescription = new_description; +} diff --git a/src/gpsim/gpsim_object.h b/src/gpsim/gpsim_object.h new file mode 100644 index 0000000..22c6072 --- /dev/null +++ b/src/gpsim/gpsim_object.h @@ -0,0 +1,132 @@ + +/* + Copyright (C) 2004 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#ifndef __GPSIM_OBJECT_H__ +#define __GPSIM_OBJECT_H__ + +typedef unsigned int uint; + +#include +using namespace std; + +class BreakType; + +/// gpsimObject - base class for most of gpsim's objects +/// + +class gpsimObject { + public: + + gpsimObject(); + gpsimObject(const char *_name, const char *desc=0); + virtual ~gpsimObject(); + + /// Get the name of the object + virtual string &name(void) const; + + /// copy the name to a user char array + virtual char *name(char *, int len); + + /// copy the object value to a user char array + virtual char *toString(char *, int len); + virtual char *toBitStr(char *, int len); + + /// Assign a new name to the object + /// FIXME why have two ways of naming ??? + virtual void new_name(const char *); + virtual void new_name(string &); + + /// TEMPORARY -- remove after gpsimValue and Value have been merged. + virtual uint get_value(); + + + /// description - get a description of this object. If the object has + /// a name, then 'help value_name' at the command line will display + /// the description. + + virtual string description(); + void set_description(const char *); + + /// Access object-specific information + string show(); + string showType(); + virtual string toString(); + + + // Breakpoint types supported by Value + enum ObjectBreakTypes { + eBreakAny, // ??? + eBreakWrite, // Register write + eBreakRead, // Register read + eBreakChange, // Register change + eBreakExecute // Program memory execute + }; + + // Breakpoint types supported by Value + enum ObjectActionTypes { + eActionHalt, + eActionLog, + }; + + /// breakpoints + /// set a break point on a gpsim object. The BreakType specifies the + /// the condition for which the break will trigger when this value + /// is accessed. In addition, the optional expr is a boolean expression + /// that is evaluated when the Object is accessed. The expression must + /// evaluate to true for the break to trigger. If the break is successfully + /// set then a non-negative number (the break point number) will be returned. + /// If the break fails, then -1 is returned. + /// The ActionType specifies the action to take when the break is triggered. + + virtual int clear_break(); + +protected: + + string name_str; // A unique name to describe the object + const char *cpDescription; // A desciption of the object + +}; + +//------------------------------------------------------------------------ +// BreakTypes +// +class BreakType +{ +public: + explicit BreakType(int _type) + : m_type(_type) + { + } + + virtual ~BreakType() + { + } + + virtual int type() + { + return m_type; + } +protected: + int m_type; +}; + +#endif // __GPSIM_OBJECT_H__ diff --git a/src/gpsim/gpsim_time.cc b/src/gpsim/gpsim_time.cc new file mode 100644 index 0000000..4e513a4 --- /dev/null +++ b/src/gpsim/gpsim_time.cc @@ -0,0 +1,749 @@ +/* + Copyright (C) 1998-2000 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include +#include +#include + +#include "14bit-processors.h" +#include +#include "stimuli.h" +#include "errors.h" +#include "config.h" +#include "protocol.h" + +//#define __DEBUG_CYCLE_COUNTER__ + +//-------------------------------------------------- +// Global instantiation of the cycle counter +// and the stop watch; +//-------------------------------------------------- + +Cycle_Counter cycles; + +// create an instance of inline get_cycles() method by taking its address +Cycle_Counter &(*dummy_cycles)(void) = get_cycles; + +//StopWatch* stop_watch = 0l; + + +//-------------------------------------------------- +// member functions for the Cycle_Counter class +//-------------------------------------------------- +/* + Overview of Cycle Counter break points. + + The Cycle Counter break points coordinate simulation time. At the + moment, the cycle counter advances one count for every instruction + cycle. Thus "real time" is defined in terms of "instruction cycles". + (NOTE - This will change!) + + Now, the way gpsim uses these break points is by allowing peripherals + to grab control of the simulation at a particular instance of time. + For example, if the UART peripheral needs to send the next data + bit in 100 microseconds, then it needs to have control of the simulator + in exactly 100 microseconds from right now. The way this is handled, + is that the cycle counter is advanced at every instruction cycle + (This will change...) and when the cycle counter matches the cycle + that corresponds to that 100 microsecond gap, gpsim will divert + control to the UART peripheral. + + There are 3 components to a cycle counter break point. First there's + the obvious thing: the number that corresponds to the cycle at which + we wish to break. This is a 64-bit integer and thus should cover a + fairly significant simulation interval! A 32-bit integer only covers + about 7 minutes of simulation time for a pic running at 20MHz. 64-bits + provides over 100,000 years of simulation time! + + The next component is the call back function. This is a pointer to a + function, or actually a class that contains a function, that is + called when the current value of the cycle counter matches the + break point value. In the UART example, this function will be something + that the UART peripheral passed when it set the break point. This + is how the UART peripheral gets control of the simulator. + + Finally, the third component is the linked list mechanism. Each time + a break point is set, it gets inserted into a linked list that is + sorted by the cycle break point value. Thus the first element in + the list (if there are any elements at all) is always the next + cycle counter break point. +*/ + +Cycle_Counter_breakpoint_list::Cycle_Counter_breakpoint_list() +{ + next = 0; + prev = 0 ; + f = 0; + bActive = false; +} + +Cycle_Counter_breakpoint_list *Cycle_Counter_breakpoint_list::getNext() +{ + return next; +} + +Cycle_Counter_breakpoint_list *Cycle_Counter_breakpoint_list::getPrev() +{ + return prev; +} + +void Cycle_Counter_breakpoint_list::clear() +{ + bActive = false; + if(f) f->clear_trigger(); +} + +void Cycle_Counter_breakpoint_list::invoke() +{ + if(bActive) + { + clear(); + if(f) f->callback(); + } +} + +Cycle_Counter::Cycle_Counter(void) +{ + value = 0; + break_on_this = END_OF_TIME; + + m_instruction_cps = 5.0e6; + m_seconds_per_cycle = 1 / m_instruction_cps; + + active.next = 0; + active.prev = 0; + inactive.next = 0; + inactive.prev = 0; +} + +Cycle_Counter::~Cycle_Counter(void) +{ + Cycle_Counter_breakpoint_list *l1, *l2; + int cactive, cinactive; + cactive = cinactive = 0; + + l1 = (&active)->next; + while(l1) + { + cactive++; + l2 = l1->next; + l1->next = 0; + delete l1; + l1 = l2; + } + l1 = (&inactive)->next; + while(l1) + { + cinactive++; + l2 = l1->next; + l1->next = 0; + delete l1; + l1 = l2; + } +} + +void Cycle_Counter::preset(uint64_t new_value) +{ + value = new_value; +} + +void Cycle_Counter::increment() +{ + // This has been changed so the cycle counter (value) + // is incremented after processing breakpoints + + // Increment the current cycle then check if + // we have a break point set here + + if( value == break_on_this ) + breakpoint(); + + value++; +} + +void Cycle_Counter::set_instruction_cps(uint64_t cps) +{ + if(cps) + { + m_instruction_cps = (double)cps; + m_seconds_per_cycle = 1.0/m_instruction_cps; + } +} + +//-------------------------------------------------- +// get(double seconds_from_now) +// +// Return the cycle number that corresponds to a time +// biased from the current time. +// +// INPUT: time in seconds (note that it's a double) +// +// OUTPUT: cycle count + +uint64_t Cycle_Counter::get( double future_time_from_now ) +{ + return value + (uint64_t)(m_instruction_cps * future_time_from_now); +} + +//-------------------------------------------------- +// set_break +// set a cycle counter break point. Return 1 if successful. +// +// The break points are stored in a singly-linked-list sorted by the +// order in which they will occur. When this routine is called, the +// value of 'future_cycle' is compared against the values in the +// 'active' list. + +bool Cycle_Counter::set_break(uint64_t future_cycle, TriggerObject *f, uint bpn) +{ + Cycle_Counter_breakpoint_list *l1 = &active, *l2; + static uint CallBackID_Sequence=1; + +#ifdef __DEBUG_CYCLE_COUNTER__ + cout << "Cycle_Counter::set_break cycle = 0x" << hex<callback_print(); + } + else cout << " does not have callback\n"; +#endif + + l2 = &inactive; + if (l2->next == 0) + { + l2->next = new Cycle_Counter_breakpoint_list; + l2->next->prev = l2; + } + if(inactive.next == 0) + { + cout << " too many breaks are set on the cycle counter \n"; + return 0; + } + else if(future_cycle <= value) + { + cout << "Cycle break point "<< future_cycle << " ignored: has already gone\n"; + cout << "current cycle is " << value << '\n'; + return 0; + } + else + { + // place the break point into the sorted break list + + bool break_set = false; + + while( (l1->next) && !break_set) + { + // If the next break point is at a cycle greater than the + // one we wish to set, then we found the insertion point. + // Otherwise + if(l1->next->break_value >= future_cycle) break_set = true; + else l1 = l1->next; + } + // At this point, we have the position where we need to insert the + // break point: it's at l1->next. + + l2 = l1->next; + l1->next = inactive.next; + + // remove the break point from the 'inactive' list + inactive.next = inactive.next->next; + + l1->next->next = l2; + l1->next->prev = l1; + + if(l2) l2->prev = l1->next; + + l1->next->break_value = future_cycle; + l1->next->f = f; + l1->next->breakpoint_number = bpn; + l1->next->bActive = true; + + if(f) f->CallBackID = ++CallBackID_Sequence; + +#ifdef __DEBUG_CYCLE_COUNTER__ + cout << "set_break l1->next=" << hex << l1->next << " "; + + if (f) f->callback_print(); + else cout << endl; + cout << "cycle break " << future_cycle << " bpn " << bpn << '\n'; + if(f) cout << "call back sequence number = "<< f->CallBackID <<'\n'; +#endif + } + break_on_this = active.next->break_value; + + return 1; +} + +//-------------------------------------------------- +// remove_break +// remove break for TriggerObject +void Cycle_Counter::clear_break(TriggerObject *f) +{ + Cycle_Counter_breakpoint_list *l1 = &active, *l2 = 0; + + if(!f) return; + + while( (l1->next) && !l2) + { + if( l1->next->f == f ) l2 = l1; + l1=l1->next; + } + if(!l2) + { + //#ifdef __DEBUG_CYCLE_COUNTER__ + cout << "WARNING Cycle_Counter::clear_break could not find break point\n Culprit:\t"; + f->callback_print(); + //#endif + return; + } + // at this point l2->next points to our break point + // It needs to be removed from the 'active' list and put onto the 'inactive' list. + + l1 = l2; + l2 = l1->next; // save a copy for a moment + l1->next = l1->next->next; // remove the break + + if(l1->next) l1->next->prev = l1; // fix the backwards link. + + l2->clear(); + +#ifdef __DEBUG_CYCLE_COUNTER__ + if (f) cout << "Clearing break call back sequence number = "<< f->CallBackID <<'\n'; +#endif + + l1 = inactive.next; // Now move the break to the inactive list. + inactive.next = l2; + l2->next = l1; + + break_on_this = active.next ? active.next->break_value : 0; +} + +//-------------------------------------------------- +// set_break_delta +// set a cycle counter break point relative to the current cpu cycle value. Return 1 if successful. +// +bool Cycle_Counter::set_break_delta(uint64_t delta, TriggerObject *f, uint bpn) +{ + +#ifdef __DEBUG_CYCLE_COUNTER__ + cout << "Cycle_Counter::set_break_delta delta = 0x" << hex<next && !found) + { + // If the next break point is at the same cycle as the + // one we wish to clear, then we found the deletion point. + // Otherwise keep searching. + + if(l1->next->break_value == at_cycle) found = 1; + else l1=l1->next; + } + if(!found) + { + cout << "Cycle_Counter::clear_break could not find break at cycle 0x" + << hex << setw(16) << setfill('0') << at_cycle << endl; + return; + } + l2 = l1->next; // save a copy for a moment + l1->next = l1->next->next; // remove the break + + if(l1->next) l1->next->prev = l2; + + l2->clear(); + + l1 = inactive.next; // Now move the break to the inactive list. + if(!l1) return; + + l2->next = l1; + inactive.next = l2; + + break_on_this = active.next ? active.next->break_value : 0; +} + +//------------------------------------------------------------------------ +// breakpoint +// +// When the cycle counter has encountered a cycle that has a breakpoint, +// this routine is called. +// + +void Cycle_Counter::breakpoint() +{ + // There's a break point set on this cycle. If there's a callback function, then call + // it other wise halt execution by setting the global break flag. + + // Loop in case there are multiple breaks + //while(value == break_on_this && active.next) { + while(active.next && value == active.next->break_value) + { + if(active.next->f) + { + // This flag will get set true if the call back + // function moves the break point to another cycle. + Cycle_Counter_breakpoint_list *l1 = active.next; + TriggerObject *lastBreak = active.next->f; + + // this stops recursive callbacks + if (l1->bActive) + { + l1->bActive = false; + lastBreak->callback(); + } + clear_current_break(lastBreak); + } + else + { + get_bp().check_cycle_break(active.next->breakpoint_number); + clear_current_break(); + } + } + if(active.next) break_on_this = active.next->break_value; +} + +//------------------------------------------------------------------------ +// reassign_break +// change the cycle of an existing break point. +// +// This is only called by the internal peripherals and not (directly) by +// the user. It's purpose is to accommodate the dynamic and unpredictable +// needs of the internal cpu timing. For example, if tmr0 is set to roll +// over on a certain cycle and the program changes the pre-scale value, +// then the break point has to be moved to the new cycle. + +bool Cycle_Counter::reassign_break(uint64_t old_cycle, uint64_t new_cycle, TriggerObject *f) +{ + Cycle_Counter_breakpoint_list *l1 = &active, *l2; + + bool found_old = false; + bool break_set = false; + + reassigned = true; // assume that the break point does actually get reassigned. + +#ifdef __DEBUG_CYCLE_COUNTER__ + cout << "Cycle_Counter::reassign_break, old " << old_cycle << " new " << new_cycle; + if(f) cout << " Call back ID = " << f->CallBackID; + + cout << '\n'; + + dump_breakpoints(); +#endif + // + // First, we search for the break point by comparing the 'old_cycle' + // with the break point cycle of all active break points. Two criteria + // must be satisfied for a match: + // + // 1) The 'old_cycle' must exactly match the cycle of an active + // break point. + // 2) The Call back function pointer must exactly match the call back + // function point of the same active break point. + // + // The reason for both of these, is so that we can differentiate multiple + // break points set at the same cycle. + // + // NOTE to consider: + // + // It would be far more efficient to have the "set_break" function return + // a handle or a pointer that we could use here to immediately identify + // the break we wish to reassign. This would also disambiguate multiple + // breaks set at the same cycle. We'd still have to perform a search through + // the linked list to find the new point, but that search would be limited + // (i.e. the reassignment is either before *or* after the current). A bi- + // directional search can be optimized with a doubly-linked list... + + while( (l1->next) && !found_old) + { + // If the next break point is at a cycle greater than the + // one we wish to set, then we found the insertion point. + + if(l1->next->f == f && l1->next->break_value == old_cycle) { +#ifdef __DEBUG_CYCLE_COUNTER__ + cout << " cycle match "; + if(f && (f->CallBackID == l1->next->f->CallBackID)) + cout << " Call Back IDs match = " << f->CallBackID << ' '; +#endif + found_old = true; + /* + if(l1->next->f == f) + found_old = true; + else + l1 = l1->next; + */ + } + else l1 = l1->next; + } + if(found_old) + { + // Now move the break point +#ifdef __DEBUG_CYCLE_COUNTER__ + cout << " found old "; + + if(l1->next->bActive == false) + { + cout << "CycleCounter - reassigning in active break "; + if(l1->next->f) + l1->next->f->callback_print(); + cout << endl; + } +#endif + if(new_cycle > old_cycle) + { + // First check to see if we can stay in the same relative position within the list + // Is this the last one in the list? (or equivalently, is the one after this one + // a NULL?) + + if(l1->next->next == 0) + { + l1->next->break_value = new_cycle; + l1->next->bActive = true; + break_on_this = active.next->break_value; +#ifdef __DEBUG_CYCLE_COUNTER__ + cout << " replaced at current position (next is NULL)\n"; + dump_breakpoints(); // debug +#endif + return 1; + } + + // Is the next one in the list still beyond this one? + if(l1->next->next->break_value >= new_cycle) + { + l1->next->break_value = new_cycle; + l1->next->bActive = true; + break_on_this = active.next->break_value; +#ifdef __DEBUG_CYCLE_COUNTER__ + cout << " replaced at current position (next is greater)\n"; + dump_breakpoints(); // debug +#endif + return 1; + } + + // Darn. Looks like we have to move it. + +#ifdef __DEBUG_CYCLE_COUNTER__ + cout << " moving \n"; +#endif + l2 = l1->next; // l2 now points to this break point + l1->next = l1->next->next; // Unlink this break point + l1->next->prev = l1; + + while( l1->next && !break_set) + { + // If the next break point is at a cycle greater than the + // one we wish to set, then we found the insertion point. + // Otherwise, continue searching. + + if(l1->next->break_value > new_cycle) break_set = 1; + else l1 = l1->next; + } + // At this point, we know that our breakpoint needs to be + // moved to the position just after l1 + l2->next = l1->next; + l1->next = l2; + l2->prev = l1; + if(l2->next) l2->next->prev = l2; + + break_on_this = active.next->break_value; + + l2->break_value = new_cycle; + l2->bActive = true; + +#ifdef __DEBUG_CYCLE_COUNTER__ + dump_breakpoints(); // debug +#endif + } + else + { // old_cycle < new_cycle + // First check to see if we can stay in the same relative position within the list + +#ifdef __DEBUG_CYCLE_COUNTER__ + cout << " old cycle is less than new one\n"; +#endif + // Is this the first one in the list? + if(l1 == &active) + { + l1->next->break_value = new_cycle; + l1->next->bActive = true; + break_on_this = new_cycle; +#ifdef __DEBUG_CYCLE_COUNTER__ + cout << " replaced at current position\n"; + dump_breakpoints(); // debug +#endif + return 1; + } + + // Is the previous one in the list still before this one? + if(l1->break_value < new_cycle) + { + l1->next->break_value = new_cycle; + l1->next->bActive = true; + + break_on_this = active.next->break_value; + +#ifdef __DEBUG_CYCLE_COUNTER__ + cout << " replaced at current position\n"; + dump_breakpoints(); // debug +#endif + return 1; + } + + // Darn. Looks like we have to move it. + l2 = l1->next; // l2 now points to this break point + + l1->next = l1->next->next; // Unlink this break point + if(l1->next) l1->next->prev = l1; + + l1 = &active; // Start searching from the beginning of the list + + while( (l1->next) && !break_set) + { + + // If the next break point is at a cycle greater than the + // one we wish to set, then we found the insertion point. + // Otherwise + if(l1->next->break_value > new_cycle) + break_set = 1; + else + l1 = l1->next; + + } + + l2->next = l1->next; + if (l2->next) l2->next->prev = l2; + + l1->next = l2; + l2->prev = l1; + + l2->break_value = new_cycle; + l2->bActive = true; + + break_on_this = active.next->break_value; + +#ifdef __DEBUG_CYCLE_COUNTER__ + dump_breakpoints(); // debug +#endif + } + } + else + { + // oops our assumption was wrong, we were unable to reassign the break point + // to another cycle because we couldn't find the old one! + + reassigned = false; + + // If the break point was not found, it can't be moved. So let's just create + // a new break point. + cout << "WARNING Cycle_Counter::reassign_break could not find old break point\n"; + cout << " a new break will created at cycle: 0x"<callback_print(); + } + set_break( new_cycle, f ); + } + return 1; +} + +void Cycle_Counter::clear_current_break( TriggerObject *f ) +{ + if( active.next == 0 ) return; + + if( (value == break_on_this) && (!f || (f && f==active.next->f)) ) + { +#ifdef __DEBUG_CYCLE_COUNTER__ + cout << "Cycle_Counter::clear_current_break "; + cout << "current cycle " << hex << setw(16) << setfill('0') << value << endl; + cout << "clearing current cycle break " << hex << setw(16) << setfill('0') << break_on_this; + if( active.next->f ) + cout << " Call Back ID = " << active.next->f->CallBackID; + cout <<'\n'; + + if( active.next->next && active.next->next->break_value == break_on_this ) { + cout << " but there's one pending at the same cycle"; + if(active.next->next->f) + cout << " With ID = " << active.next->next->f->CallBackID; + cout << '\n'; + } +#endif + Cycle_Counter_breakpoint_list *l1; + + active.next->bActive = false; + l1 = inactive.next; // ptr to 1st inactive bp + inactive.next = active.next; // let the 1st active bp become the 1st inactive one + active.next = active.next->next; // The 2nd active bp is now the 1st + inactive.next->next = l1; // The 2nd inactive bp used to be the 1st + + if( active.next ) + { + break_on_this = active.next->break_value; + active.next->prev = &active; + } + else break_on_this = END_OF_TIME; + } + else + { + // If 'value' doesn't equal 'break_on_this' then what's most probably + // happened is that the breakpoint associated with 'break_on_this' + // has invoked a callback function that then did a ::reassign_break(). + // There's a slight chance that we have a bug - but very slight... + //if(verbose & 4) + { +// cout << "debug::Didn't clear the current cycle break because != break_on_this\n"; +// cout << "value = " << value << "\nbreak_on_this = " << break_on_this <<'\n'; + } + } +} + +void Cycle_Counter::dump_breakpoints(void) +{ + Cycle_Counter_breakpoint_list *l1 = &active; + + cout << "Current Cycle " << hex << setw(16) << setfill('0') << value << '\n'; + cout << "Next scheduled cycle break " << hex << setw(16) << setfill('0') << break_on_this << '\n'; + + while(l1->next) + { + cout << "internal cycle break " << hex << setw(16) << setfill('0') << l1->next->break_value << ' '; + + if(l1->next->f) l1->next->f->callback_print(); + else cout << "does not have callback\n"; + + l1 = l1->next; + } +} diff --git a/src/gpsim/gpsim_time.h b/src/gpsim/gpsim_time.h new file mode 100644 index 0000000..0f15765 --- /dev/null +++ b/src/gpsim/gpsim_time.h @@ -0,0 +1,182 @@ +/* + Copyright (C) 1998-2000 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __GPSIM_TIME_H__ +#define __GPSIM_TIME_H__ + +#include "breakpoints.h" + +//--------------------------------------------------------- +// Cycle Counter +// +// The cycle counter class is used to coordinate the timing +// between the different peripherals within a processor and +// in some cases, the timing between several simulated processors +// and modules. +// +// The smallest quantum of simulated time is called a 'cycle'. +// The simuluation engine increments a 'Cycle Counter' at quantum +// simulation step. Simulation objects that wished to be notified +// at a specific instance in time can set a cycle counter break +// point that will get invoked whenever the cycle counter reaches +// that instance. + +//------------------------------------------------------------ +// +// Cycle counter breakpoint list +// +// This is a friend class to the Cycle Counter class. Its purpose +// is to maintain a doubly linked list of cycle counter break +// points. + +class Cycle_Counter_breakpoint_list +{ + +public: + // This is the value compared to the cycle counter. + uint64_t break_value; + + // True when this break is active. + bool bActive; + + // The breakpoint_number is a number uniquely identifying this + // cycle counter break point. Note, this number is used only + // when the break point was assigned by a user + + uint breakpoint_number; + + // If non-null, the TriggerObject will point to an object that will get invoked + // when the breakpoint is encountered. + + TriggerObject *f; + + // Doubly-linked list mechanics.. + // (these will be made private eventually) + Cycle_Counter_breakpoint_list *next; + Cycle_Counter_breakpoint_list *prev; + + Cycle_Counter_breakpoint_list *getNext(); + Cycle_Counter_breakpoint_list *getPrev(); + void clear(); + void invoke(); + Cycle_Counter_breakpoint_list(); +}; + +class Cycle_Counter +{ +public: + +#define BREAK_ARRAY_SIZE 4 +#define BREAK_ARRAY_MASK (BREAK_ARRAY_SIZE -1) + // Largest cycle counter value + + static const uint64_t END_OF_TIME=0xFFFFFFFFFFFFFFFFULL; + + + bool reassigned; // Set true when a break point is reassigned (or deleted) + + Cycle_Counter_breakpoint_list + active, // Head of the active breakpoint linked list + inactive; // Head of the inactive one. + + bool bSynchronous; // a flag that's true when the time per counter tick is constant + + Cycle_Counter(); + ~Cycle_Counter(); + void preset(uint64_t new_value); // not used currently. + + /* + increment - This inline member function is called once or + twice for every simulated instruction. Its purpose is to + increment the cycle counter using roll over arithmetic. + If there's a breakpoint set on the new value of the cycle + counter then the simulation is either stopped or a callback + function is invoked. In either case, the break point is + cleared. + */ + void increment(); + + /* + advance the Cycle Counter by more than one instruction quantum. + This is almost identical to the increment() function except that + we allow the counter to be advanced by an arbitrary amount. + They're separated only for efficiency reasons. This one runs slower. + */ + inline void advance(uint64_t step) + { + while (step--) + { + if (value == break_on_this) breakpoint(); + } + value++; + } + + // Return the current cycle counter value + uint64_t get() { return value; } + + // Return the cycle counter for some time off in the future: + uint64_t get(double future_time_from_now); + + bool set_break(uint64_t future_cycle, + TriggerObject *f=0, uint abp = MAX_BREAKPOINTS); + bool set_break_delta(uint64_t future_cycle, + TriggerObject *f=0, uint abp = MAX_BREAKPOINTS); + bool reassign_break(uint64_t old_cycle,uint64_t future_cycle, TriggerObject *f=0); + void clear_current_break(TriggerObject *f=0); + void dump_breakpoints(); + + void clear_break(uint64_t at_cycle); + void clear_break(TriggerObject *f); + void set_instruction_cps(uint64_t cps); + double instruction_cps() { return m_instruction_cps; } + double seconds_per_cycle() { return m_seconds_per_cycle; } + +private: + + // The number of instruction cycles that correspond to one second + double m_instruction_cps; + double m_seconds_per_cycle; + + uint64_t value; // Current value of the cycle counter. + uint64_t break_on_this; // If there's a pending cycle break point, then it'll be this + + /* + breakpoint + when the member function "increment()" encounters a break point, + breakpoint() is called. + */ + void breakpoint(); +}; + +#if defined(IN_MODULE) && defined(_WIN32) + // we are in a module: don't access cycles object directly! + LIBGPSIM_EXPORT Cycle_Counter &get_cycles(); +#else + // we are in gpsim: use of get_cycles() is recommended, + // even if cycles object can be accessed directly. + extern Cycle_Counter cycles; + + inline Cycle_Counter &get_cycles() + { + return cycles; + } +#endif + +#endif diff --git a/src/gpsim/hexutils.cc b/src/gpsim/hexutils.cc new file mode 100644 index 0000000..972c302 --- /dev/null +++ b/src/gpsim/hexutils.cc @@ -0,0 +1,385 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + Copyright (C) 2007 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +// T. Scott Dattalo + +// Portions of this file were obtained from: + +/* intel16.c - read an intel hex file */ +/* Copyright (c) 1994 Ian King */ + +#include +#include + +#include "pic-processor.h" +#include "hexutils.h" + + +//------------------------------------------------------------------------ +// IntelHexProgramFileType -- constructor +// +// When a IntelHexProgramFileType is instantiated, it will get placed +// on to a 'ProgramFileType' list. This list is then used (ultimately) +// by the 'load' command to load files of this type. + +IntelHexProgramFileType::IntelHexProgramFileType() +{ + // Determine endianess of current processor + short word = 0x4321; + isBigEndian = (*(char *)& word) != 0x21; +} + +void IntelHexProgramFileType::putachar (FILE * file, unsigned char c) +{ + checksum += c; + fprintf(file, "%02X", c); +} + +/* write big endian word */ +void IntelHexProgramFileType::write_be_word(FILE * file, int w) +{ + unsigned short nw =hton16(w); + putachar(file, nw & 0xff ); + putachar(file, (nw >> 8) & 0xff); +} + +/* write little endian word */ +void IntelHexProgramFileType::write_le_word(FILE * file, int w) +{ + unsigned short nw =hton16(w); + putachar(file, (nw >> 8) & 0xff); + putachar(file, nw & 0xff ); +} + +int IntelHexProgramFileType::getachar (FILE * file) +{ + int c; + do c = fgetc (file); + while (c == '\r'); /* strip LF out of MSDOS files */ + + return c; +} + +unsigned char IntelHexProgramFileType::getbyte (FILE * file) +{ + unsigned char byte; + uint data; + + if (fscanf (file, "%02x", &data) != 1) return 0; + + byte = data & 0xff; + checksum += byte; /* all the bytes are used in the checksum */ + /* so here is the best place to update it */ + return byte; +} + +/* read big endian word */ +int IntelHexProgramFileType::read_be_word(FILE * file) +{ + int w; + w = getbyte(file); + w |= getbyte(file) << 8; + return(ntoh16(w)); +} + +/* read little endian word */ +int IntelHexProgramFileType::read_le_word(FILE * file) +{ + int w; + w = getbyte(file) << 8; + w |= getbyte(file); + return(ntoh16(w)); +} + +uint IntelHexProgramFileType::getword(FILE *file) +{ + unsigned char lo = getbyte(file); + return ((getbyte(file) << 8) | lo); +} + +int IntelHexProgramFileType::LoadProgramFile( Processor **pProcessor, const char *pFilename, + FILE *inputfile, const char *pProcessorName ) +{ + if(*pProcessor == NULL) { + // Need to determine processor from file. + // for now return error. + return ERR_NEED_PROCESSOR_SPECIFIED; + } + // assume no configuration word is in the hex file. + (*pProcessor)->set_config_word((*pProcessor)->config_word_address(),0xffff); + int iReturn; + if((iReturn = readihex16( *pProcessor, inputfile)) != SUCCESS) // No errors were found in the hex file. + { + (*pProcessor)->set_frequency(10e6); + (*pProcessor)->reset(POR_RESET); + (*pProcessor)->simulation_mode = eSM_STOPPED; + + return SUCCESS; + } + return iReturn; +} + +/* + * writeihexN outputs Register structures in Intel hex format + * + * bytes_per_word - number of bytes of register to output + * fr - pointer to array of Register structures + * size - number of Register structures to output + * file - File descriptor for output + * out_base - address offset in words for first register + * + * If bytes_per_word == 1 this writes ihex8 format + * bytes_per_word == 2 this writes ihex16 format + * address is big endian, data little endian + * byte address (word_address*2) is written + */ +void IntelHexProgramFileType::writeihexN( int bytes_per_word, Register **fr, int32_t size, FILE *file, int32_t out_base ) +{ + int32_t extended_address; + int32_t address; + int rec_size = 32; // output record size in bytes + int i; + int j = 0; + + if (fr == NULL || file == NULL || size <= 0 || (bytes_per_word != 1 && bytes_per_word != 2)) + return; + + out_base <<= (bytes_per_word - 1); // convert word address to byte address + + extended_address = out_base >> 16; + address = out_base & 0xffff; + + if (extended_address) + fprintf( file, ":02000004%04X%02X\n", extended_address, ext_csum(extended_address) ); + + while( j < size) + { + if (rec_size > (size - j) * bytes_per_word) + rec_size = (size -j) * bytes_per_word; + if (address & 0x10000) + { + extended_address++; + address &= 0xffff; + fprintf(file, ":02000004%04X%02X\n", + extended_address, + ext_csum(extended_address) + ); + } + fprintf(file, ":%02X", rec_size); + checksum = rec_size; + write_be_word(file, address); + putachar(file, 0); + for(i = 0; i < rec_size; j++, i += bytes_per_word) + { + if (bytes_per_word == 2) + write_le_word(file, fr[j]->get_value()); + else + putachar(file, fr[j]->get_value()); + } + fprintf(file, "%02X\n", (-checksum) & 0xff); + address += rec_size; + } + fprintf(file, ":00000001FF\n"); +} + +int IntelHexProgramFileType::readihex16( Processor *pProcessor, FILE * file ) +{ + int extended_address = 0; + int address; + int linetype = 0; + int bytesthisline; + int i; + int lineCount = 1; + int csby; + Processor *& cpu = pProcessor; + + while (1) { + if (getachar (file) != ':') { + printf ("Need a colon as first character in each line\n"); + printf ("Colon missing in line %d\n", lineCount); + //exit (1); + return ERR_BAD_FILE; + } + + checksum = 0; + bytesthisline = getbyte (file); + address = read_be_word(file) / 2; + + /* wierdness of INHX16! address different */ + /* endian-ness and 2x too big */ + +/* The address is big endian and is a byte address + * which is why gpsim which uses word addresses considers + * them 2x to big. This file assumes the data is little endian. + * RRR + */ + linetype = getbyte (file); /* 0 for data, 1 for end */ + + switch (linetype ) + { + case 0: // Data record + { + unsigned char buff[256]; + bytesthisline &= 0xff; + for (i = 0; i < bytesthisline; i++) + buff[i] = getbyte(file); + + cpu->init_program_memory_at_index(address|extended_address, + buff, bytesthisline); + } + break; + case 1: // End of hex file + return SUCCESS; + case 4: // Extended address + { + extended_address = read_be_word(file) << 15; + printf ("Extended linear address %x %x\n", + address, extended_address); + + } + break; + default: + printf ("Error! Unknown record type! %d\n", linetype); + return ERR_BAD_FILE; + } + csby = getbyte (file); /* get the checksum byte */ + /* this should make the checksum zero */ + /* due to side effect of getbyte */ + + if (checksum) + { + printf ("Checksum error in input file.\n"); + printf ("Got 0x%02x want 0x%02x at line %d\n", + csby, (0 - checksum) & 0xff, lineCount); + return ERR_BAD_FILE; + } + + (void) getachar( file ); /* lose */ + + lineCount++; + } + return SUCCESS; +} +/* + * readihexN loads Register structures from file in Intel hex format + * + * bytes_per_word - number of bytes of register to output (1 & 2 supported) + * fr - pointer to array of Register structures + * size - number of Register structures to output + * file - File descriptor for output + * offset - address offset in words for first register + * + * If bytes_per_word == 1 this reads ihex8 format + * bytes_per_word == 2 this reads ihex16 format + * address is big endian, data little endian + * byte address (word address*2) is read + */ +int IntelHexProgramFileType::readihexN (int bytes_per_word, Register **fr, int32_t size, FILE * file, int32_t offset) +{ + int extended_address = 0; + int address; + int linetype = 0; + int wordsthisline, bytesthisline; + int i; + int lineCount = 1; + int csby; + + while (1) { + if (getachar (file) != ':') { + printf ("Need a colon as first character in each line\n"); + printf ("Colon missing in line %d\n", lineCount); + return ERR_BAD_FILE; + } + + checksum = 0; + bytesthisline = getbyte (file); + wordsthisline = bytesthisline / bytes_per_word; + address = read_be_word(file); + + linetype = getbyte (file); /* 0 for data, 1 for end */ + + switch (linetype ) { + case 0: // Data record + { + int data; + int32_t index = (extended_address | address) / bytes_per_word - offset; + + if (index < 0) + { + printf("Address 0x%x less than offset 0x%x line %d\n", + (extended_address | address) / bytes_per_word, + offset, + lineCount ); + return ERR_BAD_FILE; + } + if (index + wordsthisline > size) + { + printf("Index %d exceeds size %d at line %d\n", + index + wordsthisline, + size, + lineCount ); + return ERR_BAD_FILE; + } + for (i = 0; i < wordsthisline; i++) + { + if (bytes_per_word == 1) + data = getbyte(file); + else + data = read_le_word(file); + + fr[index+i]->put_value(data); + } + } + break; + case 1: // End of hex file + return SUCCESS; + case 4: // Extended address + { + + extended_address = read_be_word(file) << 16; + printf ("Extended linear address %x %x\n", + address, extended_address); + + } + break; + default: + printf ("Error! Unknown record type! %d\n", linetype); + return ERR_BAD_FILE; + } + + csby = getbyte (file); /* get the checksum byte */ + /* this should make the checksum zero */ + /* due to side effect of getbyte */ + + if (checksum) { + printf ("Checksum error in input file.\n"); + printf ("Got 0x%02x want 0x%02x at line %d\n", + csby, (0 - checksum) & 0xff, lineCount); + return ERR_BAD_FILE; + } + (void) getachar (file); /* lose */ + + lineCount++; + } + return SUCCESS; +} + +/* ... The End ... */ diff --git a/src/gpsim/hexutils.h b/src/gpsim/hexutils.h new file mode 100644 index 0000000..9378b2b --- /dev/null +++ b/src/gpsim/hexutils.h @@ -0,0 +1,82 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#if !defined(__HEXUTILS_H__) +#define __HEXUTILS_H__ + +//#include "program_files.h" +#include "stdio.h" +#include "processor.h" + +class IntelHexProgramFileType +{ + public: + enum { + SUCCESS = 0, + ERR_UNRECOGNIZED_PROCESSOR = -1, + ERR_FILE_NOT_FOUND = -2, + ERR_FILE_NAME_TOO_LONG = -3, + ERR_LST_FILE_NOT_FOUND = -4, + ERR_BAD_FILE = -5, + ERR_NO_PROCESSOR_SPECIFIED = -6, + ERR_PROCESSOR_INIT_FAILED = -7, + ERR_NEED_PROCESSOR_SPECIFIED = -8, + }; + + IntelHexProgramFileType(); + int readihex16 (Processor *pProcessor, FILE * file); + inline void writeihex16(Register **fr, int32_t size, FILE *file, int32_t offset) + { writeihexN(2, fr, size, file, offset); } + inline void writeihex8(Register **fr, int32_t size, FILE *file, int32_t offset) + { writeihexN(1, fr, size, file, offset); } + + inline int readihex16(Register **fr, int32_t size, FILE *file, int32_t offset) + { return readihexN(2, fr, size, file, offset); } + inline int readihex8(Register **fr, int32_t size, FILE *file, int32_t offset) + { return readihexN(1, fr, size, file, offset); } + + + // ProgramFileType overrides + virtual int LoadProgramFile(Processor **pProcessor, const char *pFilename, + FILE *pFile, const char *pProcessorName); + private: + unsigned char checksum; + bool isBigEndian; + + int getachar (FILE * file); + unsigned char getbyte (FILE * file); + uint getword (FILE *file); + void putachar (FILE * file, unsigned char c); + void write_be_word(FILE * file, int w); + void write_le_word(FILE * file, int w); + int read_be_word(FILE * file); + int read_le_word(FILE * file); + // Compute checksum for extended address record + inline int ext_csum(int32_t add) { + return ((-(6 + (add & 0xff) + ((add >> 8) & 0xff)) & 0xff)); + } + void writeihexN(int bytes_per_word, Register **fr, int32_t size, FILE *file, int32_t out_base); + int readihexN (int bytes_per_word, Register **fr, int32_t size, FILE * file, int32_t offset); + // The following do the same function of ntohs and htons + // these save having to include networking includes + inline int ntoh16(int w) { return isBigEndian ? w : ((w >> 8) & 0xff) | ((w & 0xff) << 8);} + inline int hton16(int w) { return isBigEndian ? w : ((w >> 8) & 0xff) | ((w & 0xff) << 8);} +}; +#endif // __HEXUTILS_H__ diff --git a/src/gpsim/ioports.cc b/src/gpsim/ioports.cc new file mode 100644 index 0000000..9c5479c --- /dev/null +++ b/src/gpsim/ioports.cc @@ -0,0 +1,719 @@ +/* + Copyright (C) 1998 Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +#include +#include +#include +#include +#include +#include + +#include "config.h" +#include "ioports.h" +#include "modules.h" +#include "stimuli.h" + +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("%s:%d-%s ",__FILE__,__LINE__,__FUNCTION__); printf arg; } +#else +#define Dprintf(arg) {} +#endif +//#define D2 +#ifdef D2 +#define D2printf(arg) {fprintf(stderr, "%s:%d-%s ",__FILE__,__LINE__,__FUNCTION__); printf arg; } +#else +#define D2printf(arg) {} +#endif + +//-------------------------------------------------- +// +//-------------------------------------------------- +SignalControl::~SignalControl() +{ +} + +PeripheralSignalSource::PeripheralSignalSource(PinModule *_pin) + : m_pin(_pin), m_cState('?') +{ + assert(m_pin); +} + +PeripheralSignalSource::~PeripheralSignalSource() +{ +} + +void PeripheralSignalSource::release() +{ +} + +// getState is called when the PinModule is attempting to +// update the output state for the I/O Pin. + +char PeripheralSignalSource::getState() +{ + return m_cState; +} + +/// putState is called when the peripheral output source +/// wants to change the output state. +void PeripheralSignalSource::putState(const char new3State) +{ + if (new3State != m_cState) + { + m_cState = new3State; + m_pin->updatePinModule(); + } +} + +void PeripheralSignalSource::toggle() +{ + switch (m_cState) + { + case '1': + case 'W': + putState('0'); + break; + case '0': + case 'w': + putState('1'); + break; + } +} + +//------------------------------------------------------------------- +// +// ioports.cc +// +// The ioport infrastructure for gpsim is provided here. The class +// taxonomy for the IOPORT class is: +// +// file_register +// |-> sfr_register +// |-> IOPORT +// |-> PORTA +// |-> PORTB +// |-> PORTC +// |-> PORTD +// |-> PORTE +// |-> PORTF +// +// Each I/O port has an associated array of I/O pins which provide an +// interface to the virtual external world of the stimuli. +// +//------------------------------------------------------------------- + +class SignalSource : public SignalControl +{ + public: + SignalSource(PortRegister *_reg, uint bitPosition) + : m_register(_reg), m_bitMask(1<getDriving()&m_bitMask)!=0)?'1':'0') : 'Z'; + char r = m_register ? (((m_register->getDriving()&m_bitMask)!=0)?'1':'0') : 'Z'; + /**/ + Dprintf(("SignalSource::getState() %s bitmask:0x%x state:%c\n", + (m_register?m_register->name().c_str():"NULL"), + m_bitMask,r)); + /**/ + return r; + } + + private: + PortRegister *m_register; + uint m_bitMask; +}; + + +//------------------------------------------------------------------------ +PortSink::PortSink(PortRegister *portReg, uint iobit) + : m_PortRegister(portReg), m_iobit(iobit) +{ + assert (m_PortRegister); +} + +void PortSink::setSinkState(char cNewSinkState) +{ + Dprintf((" PortSink::setSinkState:bit=%u,val=%c\n", m_iobit, cNewSinkState)); + + m_PortRegister->setbit(m_iobit,cNewSinkState); +} + +void PortSink::release() +{ + //cout << "PortSink::release() ;" << this << endl; + delete this; +} +//------------------------------------------------------------------------ +PortRegister::PortRegister(Module *pCpu, const char *pName, const char *pDesc, uint numIopins, uint _mask) + : sfr_register(pCpu, pName, pDesc), + PortModule(numIopins), + mEnableMask(_mask), + drivingValue(0), rvDrivenValue(0,0) +{ + mValidBits = (1<addSymbol(iopin); + return PortModule::addPin(iopin, iPinNumber); +} + +IOPIN * PortRegister::addPin(IOPIN *iopin, uint iPinNumber) +{ +// cpu->addSymbol(iopin); + return PortModule::addPin(iopin, iPinNumber); +} + +void PortRegister::setEnableMask(uint newEnableMask) +{ + Dprintf (( "PortRegister::setEnableMask for %s to %02X\n", + name_str.c_str(), newEnableMask )); + mOutputMask = newEnableMask; + //uint maskDiff = getEnableMask() ^ newEnableMask; + uint oldEnableMask = getEnableMask(); + + for (uint i=0, m=1; isetDefaultSource(new SignalSource(this, i)); + pmP->addSink(new PortSink(this, i)); + } + else + { + if (pmP->getSourceState() == '?') + { + pmP->setDefaultSource(new SignalSource(this, i)); + pmP->addSink(new PortSink(this, i)); + } + } + } + mEnableMask = newEnableMask; +} + +void PortRegister::put(uint new_value) +{ + put_value(new_value); +} + +void PortRegister::put_value(uint new_value) +{ + Dprintf(("PortRegister::put_value old=0x%x:new=0x%x\n",value.data,new_value)); + + uint diff = mEnableMask & (new_value ^ value.data); + drivingValue = new_value & mEnableMask; + value.data = drivingValue; + + if(diff) { + // If no stimuli are connected to the Port pins, then the driving + // value and the driven value are the same. If there are external + // stimuli (or perhaps internal peripherals) overdriving or overriding + // this port, then the call to updatePort() will update 'drivenValue' + // to its proper value. In either case, calling updatePort ensures + // the drivenValue is updated properly + + updatePort(); + } +} +//------------------------------------------------------------------------ +// PortRegister::updateUI() UI really means GUI. +// We just pass control to the update method, which is defined in gpsimValue. + +void PortRegister::updateUI() +{ + update(); +} +//------------------------------------------------------------------------ +// PortRegister::setbit +// +// This method is called whenever a stimulus changes the state of +// an I/O pin associated with the port register. 3-state logic is +// used. +// FIXME - rvDrivenValue and value are always the same, so why have +// FIXME - both? + +void PortRegister::setbit(uint bit_number, char new3State) +{ + int set_mask = (1<updatePinModule(); + } +} + +void PortModule::updateUI() +{ + // hmmm nothing +} + +void PortModule::updatePin(uint iPinNumber) +{ + if (iPinNumber < mNumIopins) + iopins[iPinNumber]->updatePinModule(); +} + +void PortModule::updatePins(uint iPinBitMask) +{ + for (uint i=0,j=1; iupdatePinModule(); +} + +SignalSink *PortModule::addSink(SignalSink *new_sink, uint iPinNumber) +{ + if (iPinNumber < mNumIopins) + iopins[iPinNumber]->addSink(new_sink); + return new_sink; +} + +IOPIN *PortModule::addPin(IOPIN *new_pin, uint iPinNumber) +{ + if (iPinNumber < mNumIopins) + { + // If there is not a PinModule for this pin, then add one. + if (iopins[iPinNumber] == &AnInvalidPinModule) + iopins[iPinNumber] = new PinModule(this,iPinNumber); + iopins[iPinNumber]->setPin(new_pin); + } + else + { + printf("PortModule::addPin ERROR pin %u > %u\n", iPinNumber, mNumIopins); + } + return new_pin; +} + +void PortModule::addPinModule(PinModule *newModule, uint iPinNumber) +{ + if (iPinNumber < mNumIopins && iopins[iPinNumber] == &AnInvalidPinModule) + iopins[iPinNumber] = newModule; +} + +IOPIN *PortModule::getPin(uint iPinNumber) +{ + if (iPinNumber < mNumIopins) return &iopins[iPinNumber]->getPin(); + + return 0; +} + +//------------------------------------------------------------------------ +// PinModule + +PinModule::PinModule() + : PinMonitor(), + m_cLastControlState('?'), m_cLastSinkState('?'), + m_cLastSourceState('?'), m_cLastPullupControlState('?'), + m_defaultSource(0), m_activeSource(0), + m_defaultControl(0), m_activeControl(0), + m_defaultPullupControl(0), m_activePullupControl(0), + m_pin(0), m_port(0), m_pinNumber(0) +{ + for(int i = 0; i < ANALOG_TABLE_SIZE; i++) + m_analog_reg[i] = NULL; +} + +PinModule::PinModule(PortModule *_port, uint _pinNumber, IOPIN *_pin) + : PinMonitor(), + m_cLastControlState('?'), m_cLastSinkState('?'), + m_cLastSourceState('?'), m_cLastPullupControlState('?'), + m_defaultSource(0), m_activeSource(0), + m_defaultControl(0), m_activeControl(0), + m_defaultPullupControl(0), m_activePullupControl(0), + m_pin(_pin), m_port(_port), m_pinNumber(_pinNumber), + m_bForcedUpdate(false) +{ + setPin(m_pin); + for(int i = 0; i < 3; i++) m_analog_reg[i] = NULL; +} + +PinModule::~PinModule() +{ + if (m_pin && (m_activeSource != m_defaultSource)) + D2printf(("Pin %s sources active %p default %p\n", m_pin->name().c_str(), m_activeSource, m_defaultSource)); + + if (m_activeSource && (m_activeSource != m_defaultSource)) + { + //cout << __FUNCTION__ << " deleting active source:"<getState() <release(); + m_activeSource = m_defaultSource; + } + if (m_defaultSource) + { + m_defaultSource->release(); + delete m_defaultSource; + m_defaultSource = 0; + } + if (m_activeControl && (m_activeControl != m_defaultControl)) + { + m_activeControl->release(); + m_activeControl = m_defaultControl; + } + if (m_defaultControl) + { + m_defaultControl->release(); + m_defaultControl = 0; + } + + if (m_activePullupControl && (m_activePullupControl != m_defaultPullupControl)) + m_activePullupControl->release(); + + if (m_defaultPullupControl) m_defaultPullupControl->release(); + + if (m_pin) m_pin->setMonitor(0); +} + +void PinModule::setPin(IOPIN *new_pin) +{ + // Replace our pin only if this one is valid and we don't have one already. + if (!m_pin && new_pin) + { + m_pin = new_pin; + m_pin->setMonitor(this); + m_cLastControlState = getControlState(); + m_cLastSourceState = getSourceState(); + } + +} +void PinModule::refreshPinOnUpdate(bool bForcedUpdate) +{ + m_bForcedUpdate = bForcedUpdate; +} + +void PinModule::updatePinModule() +{ + if (!m_pin) return; + + bool bStateChange=m_bForcedUpdate; + + Dprintf(("PinModule::updatePinModule():%s enter cont=%c,source=%c,pullup%c\n", + (m_pin ? m_pin->name().c_str() : "NOPIN"), + m_cLastControlState,m_cLastSourceState,m_cLastPullupControlState)); + + char cCurrentControlState = getControlState(); + uint old_dir = m_pin->get_direction(); + uint new_dir = ( cCurrentControlState=='1' ) ? IOPIN::DIR_INPUT : IOPIN::DIR_OUTPUT; + + if( new_dir != old_dir ) + { + m_cLastControlState = cCurrentControlState; + m_pin->update_direction( new_dir, false ); + bStateChange = true; + } + char cCurrentSourceState = getSourceState(); + + if( cCurrentSourceState != m_cLastSourceState ) + { + m_cLastSourceState = cCurrentSourceState; + m_pin->setDrivingState( cCurrentSourceState ); + bStateChange = true; + } + char cCurrentPullupControlState = getPullupControlState(); + + if( cCurrentPullupControlState != m_cLastPullupControlState ) + { + m_cLastPullupControlState = cCurrentPullupControlState; + m_pin->update_pullup(m_cLastPullupControlState,false); + bStateChange = true; + } + if (bStateChange) + { + Dprintf(("PinModule::updatePinModule() exit cont=%c,source=%c,pullup%c\n", + m_cLastControlState,m_cLastSourceState, + m_cLastPullupControlState)); + + if( m_pin->snode ) m_pin->snode->update(); + else setDrivenState( cCurrentSourceState ); + } +} + +void PinModule::setDefaultControl(SignalControl *newDefaultControl) +{ + if(!m_defaultControl && newDefaultControl) + { + m_defaultControl = newDefaultControl; + setControl(m_defaultControl); + } + else delete newDefaultControl; //// YIKES!!! -- wouldn't it be better to return an error code? +} +void PinModule::setControl(SignalControl *newControl) +{ + m_activeControl = newControl ? newControl : m_defaultControl; +} + +void PinModule::setDefaultSource(SignalControl *newDefaultSource) +{ + if(!m_defaultSource && newDefaultSource) + { + m_defaultSource = newDefaultSource; + setSource(m_defaultSource); + } +} + +void PinModule::setSource(SignalControl *newSource) +{ + D2printf(("setSource new %p old %p default %p\n", newSource, m_activeSource, m_defaultSource)); + if (m_activeSource && newSource != m_activeSource) + m_activeSource->release(); + m_activeSource = newSource ? newSource : m_defaultSource; +} + +void PinModule::setDefaultPullupControl(SignalControl *newDefaultPullupControl) +{ + if(!m_defaultPullupControl && newDefaultPullupControl) + { + m_defaultPullupControl = newDefaultPullupControl; + setPullupControl(m_defaultPullupControl); + } +} + +void PinModule::setPullupControl(SignalControl *newPullupControl) +{ + m_activePullupControl = newPullupControl ? newPullupControl : m_defaultPullupControl; +} + +char PinModule::getControlState() +{ + return m_activeControl ? m_activeControl->getState() : '?'; +} +char PinModule::getSourceState() +{ + return m_activeSource ? m_activeSource->getState() : '?'; +} + +char PinModule::getPullupControlState() +{ + return m_activePullupControl ? m_activePullupControl->getState() : '?'; +} + +void PinModule::setDrivenState( char new3State ) +{ + m_cLastSinkState = new3State; + + list :: iterator ssi; + for (ssi = sinks.begin(); ssi != sinks.end(); ++ssi) + (*ssi)->setSinkState( new3State ); +} + +void PinModule::setDrivingState(char new3State) +{ + //printf("PinModule::%s -- does nothing\n",__FUNCTION__); +} + +void PinModule::set_nodeVoltage(double) +{ + //printf("PinModule::%s -- does nothing\n",__FUNCTION__); +} + +void PinModule::putState(char) +{ + //printf("PinModule::%s -- does nothing\n",__FUNCTION__); +} + +void PinModule::setDirection() +{ + //printf("PinModule::%s -- does nothing\n",__FUNCTION__); +} + +void PinModule::updateUI() +{ + m_port->updateUI(); +} + +// AnalogReq is called by modules such as ADC and Comparator +// to set or release a pin to/from analog mode. When a pin is in +// analog mode the TRIS register is still active and output pins +// are still driven high or low, but reads of the port register +// return 0 for the pin. When a pin mode is changes the breadboard +// name of the pin is changed to newname. +// +// A table of each calling module is kept as a module may +// request analog mode after another has. The pin is put in +// analog mode when the first module requests it (up=true) +// and is taken out of analog mode when all modules have +// requested analog mode to be released (up=false); +// +void PinModule::AnalogReq( Register* reg, bool analog, const char* newname ) +{ + if (!m_port) return; + + int i, index; + uint total_cnt = 0; + + // is the calling register in the table and what is the current + // count of modules requesting analog mode + + for(i=0, index=-1; i < ANALOG_TABLE_SIZE && m_analog_reg[i]; i++) + { + if (m_analog_reg[i] == reg) index = i; + if (m_analog_active[i]) total_cnt++; + } + + // Register is not in table so add it. + // + if (index < 0) + { + assert(i < ANALOG_TABLE_SIZE); // table not large enough + index = i; + m_analog_reg[index] = reg; + m_analog_active[index] = false; + } + if( analog ) // Set pin to analog mode request + { + m_analog_active[index] = true; + if (total_cnt == 0) + { + uint mask = m_port->getOutputMask(); + mask &= ~(1 << getPinNumber()); + m_port->setOutputMask(mask); + Dprintf(("PinModule::UpAnalogCnt up %s newname=%s mask=%x\n", getPin().name().c_str(), newname, mask)); + + getPin().set_is_analog(true); + getPin().set_Cth(5e-12); // add analog pin input capacitance + } + } + else if (!analog && m_analog_active[index]) // release register request for analog pin + { + m_analog_active[index] = false; + if (total_cnt == 1) + { + uint mask = m_port->getOutputMask(); + mask |= (1 << getPinNumber()); + Dprintf(("PinModule::UpAnalogCnt down %s newname=%s mask=%x\n", getPin().name().c_str(), newname, mask)); + m_port->setOutputMask(mask); + + getPin().set_is_analog(false); + getPin().set_Cth(0.); + } + } +} diff --git a/src/gpsim/ioports.h b/src/gpsim/ioports.h new file mode 100644 index 0000000..6242918 --- /dev/null +++ b/src/gpsim/ioports.h @@ -0,0 +1,345 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +#ifndef __IOPORTS_H__ +#define __IOPORTS_H__ + +#include "registers.h" +#include "stimuli.h" + +class stimulus; +class Stimulus_Node; +class PinModule; + + +///**********************************************************************/ +/// +/// I/O ports +/// +/// An I/O port is collection of I/O pins. For a PIC processor, these +/// are the PORTA, PORTB, etc, registers. gpsim models I/O ports in +/// a similar way it models other registers; there's a base class from +/// which all specific I/O ports are derived. However, I/O ports are +/// special in that they're an interface between a processor's core +/// and the outside world. The requirements vary wildly from one processor +/// to the next; in fact they even vary dynamically within one processor. +/// gpsim attempts to abstract this interface with a set of base classes +/// that are responsible for routing signal state information. These +/// base classes make no attempt to decipher this information, instead +/// this job is left to the peripherals and stimuli connected to the +/// I/O pins and ports. +/// +/// +/// PinModule +/// +/// Here's a general description of gpsim I/O pin design: +/// +/// Data +/// Select ======+ +/// +-|-+ Outgoing +/// Source1 ===>| M | data +/// Source2 ===>| U |=============+ +/// SourceN ===>| X | | +/// +---+ | +-------+ +/// Control +===>| IOPIN | +/// Select ======+ | | +/// +-|-+ I/O Pin | | +/// Control1 ===>| M | Direction | |<======> Physical +/// Control2 ===>| U |=================>| | Interface +/// ControlN ===>| X | | | +/// +---+ | | +/// Sink Decode +===<| | +/// Select ======+ | +-------+ +/// +-|-+ Incoming | +/// Sink1 <====| D | data | +/// Sink2 <====| E |<============| +/// SinkN <====| C | +/// +---+ +/// +/// The PinModule models a Processor's I/O Pin. The schematic illustrates +/// the abstract description of the PinModule. Its job is to merge together +/// all of the Processor's peripherals that can control a processor's pin. +/// For example, a UART peripheral may be shared with a general purpose I/O +/// pin. The UART may have a transmit and receive pin and select whether it's +/// in control of the I/O pins. The uart transmit pin and the port's I/O pin +/// can both act as a source for the physical interface. The PinModule +/// arbitrates between the two. Similarly, the UART receive pin can be multiplexed +/// with a register pin. In this case, the PinModule will route signal +/// changes to both devices. Finally, a peripheral like the '622's comparators +/// may overide the output control. The PinModule again arbitrates. +/// +/// +/// PortModule +/// +/// The PortModule is the base class for processor I/O ports. It's essentially +/// a register that contains an array of PinModule's. +/// +/// Register PortModule +/// |-> sfr_register | +/// | | +/// \------+--------/ +/// | +/// +--> PortRegister +/// |--> PicPortRegister + + + +///------------------------------------------------------------ +/// +/// SignalControl - A pure virtual class that defines the interface for +/// a signal control. The I/O Pin Modules will query the source's state +/// via SignalControl. The control is usually used to control the I/O pin +/// direction (i.e. whether it's an input or output...), drive value, +/// pullup state, etc. +/// When a Pin Module is through with the SignalControl, it will call +/// the release() method. This is primarily used to delete the SignalControl +/// objects. + +class SignalControl +{ + public: + virtual ~SignalControl(); //// fixme + virtual char getState()=0; + virtual void release()=0; +}; + +///------------------------------------------------------------ +/// PeripheralSignalSource - A class to interface I/O pins with +/// peripheral outputs. + +class PeripheralSignalSource : public SignalControl +{ + public: + explicit PeripheralSignalSource(PinModule *_pin); + virtual ~PeripheralSignalSource(); + virtual void release(); + + /// getState - called by the PinModule to determine the source state + virtual char getState(); + + /// putState - called by the peripheral to set a new state + virtual void putState(const char new3State); + + /// toggle - called by the peripheral to toggle the current state. + virtual void toggle(); + + private: + PinModule *m_pin; + char m_cState; +}; + +///------------------------------------------------------------ +/// PortModule - Manages all of the I/O pins associated with a single +/// port. The PortModule supplies the interface to the I/O pin's. It +/// is designed to handle a group of I/O pins. However, the low level +/// I/O pin processing is handled by PinModule objects contained within +/// the PortModule. + +class PortModule +{ + public: + explicit PortModule(uint numIopins); + virtual ~PortModule(); + + /// updatePort -- loop through update all I/O pins + virtual void updatePort(); + + /// updatePin -- Update a single I/O pin + virtual void updatePin(uint iPinNumber); + + /// updatePins -- Update several I/O pins + virtual void updatePins(uint iPinBitMask); + + /// updateUI -- convey pin state info to a User Interface (e.g. the gui). + virtual void updateUI(); + + /// addPinModule -- supply a pin module at a particular bit position. + /// Most of the low level I/O pin related processing will be handled + /// here. The PortModule per-pin helper methods below essentially + /// call methods in the PinModule to do the dirty work. + /// Each bit position can have only one PinModule. If multiple + /// modules are added, only the first will be used and the others + /// will be ignored. + void addPinModule(PinModule *, uint iPinNumber); + + /// addSource -- supply a pin with a source of data. There may + SignalControl *addSource(SignalControl *, uint iPinNumber); + + /// addControl -- supply a pin with a data direction control + SignalControl *addControl(SignalControl *, uint iPinNumber); + + /// addPullupControl -- supply a pin with a pullup control + SignalControl *addPullupControl(SignalControl *, uint iPinNumber); + + /// addSink -- supply a sink to receive info driven on to a pin + SignalSink *addSink(SignalSink *, uint iPinNumber); + + /// addPin -- supply an I/O pin. Note, this will create a default pin module + /// if one is not already created. + IOPIN *addPin(IOPIN *, uint iPinNumber); + + /// getPin -- an I/O pin accessor. This returns the I/O pin at a particular + /// bit position. + IOPIN *getPin(uint iPinNumber); + + /// operator[] -- PinModule accessor. This returns the pin module at + /// a particular bit position. + PinModule &operator [] (uint pin_number); + + PinModule * getIOpins(uint pin_number); + + // set/get OutputMask which controls bits returned on I/O + // port register get() call. Used to return 0 for analog pins + virtual void setOutputMask (uint OutputMask) { mOutputMask = OutputMask;} + virtual uint getOutputMask () { return(mOutputMask);} + + protected: + uint mNumIopins; + uint mOutputMask; + + private: + /// PinModule -- The array of PinModules that are handled by PortModule. + PinModule **iopins; +}; + +///------------------------------------------------------------ +/// PinModule - manages the interface to a physical I/O pin. Both +/// simple and complex I/O pins are handled. An example of a simple +/// I/O is one where there is a single data source, data sink and +/// control, like say the GPIO pin on a small PIC. A complex pin +/// is one that is multiplexed with peripherals. +/// +/// The parent class 'PinMonitor', allows the PinModule to be +/// registered with the I/O pin. In other words, when the I/O pin +/// changes state, the PinModule will be notified. +#define ANALOG_TABLE_SIZE 3 + +class PinModule : public PinMonitor +{ + public: + PinModule(); + PinModule(PortModule *, uint _pinNumber, IOPIN *new_pin=0); + virtual ~PinModule(); + + /// updatePinModule -- The low level I/O pin state is resolved here + /// by examining the direction and state of the I/O pin. + void updatePinModule(); + + /// refreshPinOnUpdate - modal behavior. If set to true, then + /// a pin's state will always be refreshed whenever the PinModule + /// is updated. If false, then the pin is updated only if there + /// is a detected state change. + void refreshPinOnUpdate(bool bForcedUpdate); + + void setPin(IOPIN *); + void clrPin() { m_pin = NULL; } + void setDefaultSource(SignalControl *); + void setSource(SignalControl *); + void setDefaultControl(SignalControl *); + void setControl(SignalControl *); + void setPullupControl(SignalControl *); + void setDefaultPullupControl(SignalControl *); + + char getControlState(); + char getSourceState(); + char getPullupControlState(); + uint getPinNumber() { return m_pinNumber;} + void AnalogReq(Register *reg, bool analog, const char *newName); + // If active control not default, return it + SignalControl *getActiveControl() {return (m_activeControl == m_defaultControl)?0:m_activeControl;} + // If active source not default, return it + SignalControl *getActiveSource() {return (m_activeSource == m_defaultSource)?0:m_activeSource;} + + IOPIN &getPin() { return *m_pin;} + /// + virtual void setDrivenState(char); + virtual void setDrivingState(char); + virtual void set_nodeVoltage(double); + virtual void putState(char); + virtual void setDirection(); + virtual void updateUI(); + + private: + char m_cLastControlState; + char m_cLastSinkState; + char m_cLastSourceState; + char m_cLastPullupControlState; + + SignalControl *m_defaultSource, *m_activeSource; + SignalControl *m_defaultControl, *m_activeControl; + SignalControl *m_defaultPullupControl, *m_activePullupControl; + + IOPIN *m_pin; + PortModule *m_port; + uint m_pinNumber; + bool m_bForcedUpdate; + Register* m_analog_reg[ANALOG_TABLE_SIZE + 1]; + bool m_analog_active[ANALOG_TABLE_SIZE + 1]; +}; + + +///------------------------------------------------------------ +class PortRegister : public sfr_register, public PortModule +{ + public: + PortRegister(Module *pCpu, const char *pName, const char *pDesc, + uint numIopins, uint enableMask); + + virtual void put(uint new_value); + virtual void put_value(uint new_value); + virtual uint get(); + virtual uint get_value(); + virtual void putDrive(uint new_drivingValue); + virtual uint getDriving(); + virtual void setbit(uint bit_number, char new_value); + virtual void setEnableMask(uint nEnableMask); + IOPIN *addPin(IOPIN *, uint iPinNumber); + IOPIN *addPin(Module *mod, IOPIN *pin, uint iPinNumber); + + uint getEnableMask() { return mEnableMask; } + virtual void updateUI(); + + protected: + uint mEnableMask; + uint drivingValue; + RegisterValue rvDrivenValue; +}; + +class PortSink : public SignalSink +{ + public: + PortSink(PortRegister *portReg, uint iobit); + + virtual ~PortSink() { } + + virtual void setSinkState(char); + virtual void release(); + + private: + PortRegister *m_PortRegister; + uint m_iobit; +}; + +#endif // __IOPORTS_H__ diff --git a/src/gpsim/modules.cc b/src/gpsim/modules.cc new file mode 100644 index 0000000..8b16224 --- /dev/null +++ b/src/gpsim/modules.cc @@ -0,0 +1,131 @@ +/* + Copyright (C) 1998,1999,2000 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +//#include "modules.h" + +#include +#include +#include +#include +#include +#include +#include +#include + +#include "config.h" + +#ifndef _WIN32 +#include +#if !defined(_MAX_PATH) + #define _MAX_PATH 1024 +#endif + +#else +#include +#include +/* + * interface is a Module class member variable in gpsim, + * in WIN32 Platform SDK it is a macro, defined in BaseTypes.h + * the WIN32 Platform SDK definition should be undefined + */ +#undef interface +#endif + +#include "pic-processor.h" +#include "stimuli.h" +#include "value.h" +#include "packages.h" + +// When a new library is loaded, all of the module types +// it supports are placed into the ModuleTypes map. This +// object is private to this file. + +typedef map ModuleTypeInfo_t; +ModuleTypeInfo_t ModuleTypes; + +/***************************************************************************** + * + * Module.cc + * + * Here's where much of the infrastructure of gpsim is defined. + * + * A Module is define to be something that gpsim knows how to simulate. + * When gpsim was originally designed, a module was simple a pic processor. + * This concept was expanded to accomodate devices like LEDs, switches, + * LCDs and so on. + */ + +Module::Module(const char *_name, const char *desc) + : gpsimObject(_name, desc), package(0), + simulation_mode(eSM_STOPPED), Vdd(5.0), version(0) +{ +} + +#if 0 // warning: 'void dumpOneSymbol(const SymbolEntry_t&)' defined but not used +static void dumpOneSymbol(const SymbolEntry_t &sym) +{ + cout << " " << sym.second + << " stored as " << sym.first + << endl; +} +#endif + + +Module::~Module(void) +{ + delete package; + + package = 0; +} + +void Module::reset(RESET_TYPE r) +{ + cout << " resetting module " << name() << endl; +} + +//------------------------------------------------------------------- +//------------------------------------------------------------------- +void Module::create_pkg(uint number_of_pins) +{ + if(package) delete package; + + package = new Package(number_of_pins); +} + +void Module::assign_pin(uint pin_number, IOPIN *pin) +{ + if(package) package->assign_pin(pin_number, pin); +} + +int Module::get_pin_count(void) +{ + if(package) return package->get_pin_count(); + + return 0; + +} + +IOPIN *Module::get_pin(uint pin_number) +{ + if(package) return package->get_pin(pin_number); + + return 0; +} diff --git a/src/gpsim/modules.h b/src/gpsim/modules.h new file mode 100644 index 0000000..afc8cbc --- /dev/null +++ b/src/gpsim/modules.h @@ -0,0 +1,124 @@ +/* + Copyright (C) 1998,1999,2000 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +/* + modules.h + The base class for modules is defined here. + Include this file into yours for creating custom modules. + */ + +#ifndef __MODULES_H__ +#define __MODULES_H__ + +#include +#include +#include +#include +#include +#include +#include + +#include "gpsim_object.h" +#include "gpsim_classes.h" + +class Module; +class Module_Types; +class Processor; +class IOPIN; +class Value; +class Package; + +typedef Module* (*Module_FPTR)(); +typedef Module_Types* (*Module_Types_FPTR)(); + + +enum SIMULATION_MODES +{ + eSM_INITIAL, + eSM_STOPPED, + eSM_RUNNING, + eSM_SLEEPING, + eSM_SINGLE_STEPPING, + eSM_STEPPING_OVER, + eSM_RUNNING_OVER +}; + + +/* + * interface is a Module class member variable in gpsim, + * in WIN32 Platform SDK it is a macro, defined in BaseTypes.h + * the WIN32 Platform SDK definition should be undefined + */ + +#ifdef interface +#undef interface +#endif + +//------------------------------------------------------------------------ +// +/// Module - Base class for all gpsim behavior models. + +class Module : public gpsimObject +{ + public: + + Module(const char *_name=0, const char *desc=0); + virtual ~Module(); + + Package *package; // A package for the module + SIMULATION_MODES simulation_mode; // describes the simulation state for this module + + /// I/O pin specific + virtual int get_pin_count(); + virtual IOPIN *get_pin(uint pin_number); + virtual void assign_pin(uint pin_number, IOPIN *pin); + virtual void create_pkg(uint number_of_pins); + virtual double get_Vdd() { return Vdd; } + virtual void set_Vdd(double v) { Vdd = v; } + + /// Registers - mostly processors, but can apply to complex modules + virtual uint register_mask () const { return 0xff;} + virtual uint register_size () const { return 1;} + + virtual void reset(RESET_TYPE r); + + virtual char *get_version() { return version;} + + const char *type(void) { return module_type.c_str(); } + void set_module_type(string type) { module_type = type; } + + private: + string module_type; + + protected: + double Vdd; + + char *version;// Derived modules should assign more reasonable values for this. +}; + +class Module_Types +{ + public: + + const char *names[2]; + Module * (*module_constructor) (const char *module_name); +}; + +#endif // __MODULES_H__ diff --git a/src/gpsim/modules/14bit-tmrs.cc b/src/gpsim/modules/14bit-tmrs.cc new file mode 100644 index 0000000..99d26f4 --- /dev/null +++ b/src/gpsim/modules/14bit-tmrs.cc @@ -0,0 +1,3097 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + Copyright (C) 2006,2009,2010,2013,2015,2017 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include +#include +#include +#include +#include + +#include "config.h" +#include "14bit-tmrs.h" +#include "stimuli.h" +#include "a2dconverter.h" +#include "clc.h" + +// +// 14bit-tmrs.cc +// +// Timer 1&2 modules for the 14bit core pic processors. +// +//#define DEBUG + +#if defined(DEBUG) +#define Dprintf(arg) {printf("%s:%d ",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + + +//-------------------------------------------------- +// CCPRL +//-------------------------------------------------- + +CCPRL::CCPRL(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + ccprh(0), ccpcon(0), tmrl(0) +{ +} + +bool CCPRL::test_compare_mode() +{ + return tmrl && ccpcon && ccpcon->test_compare_mode(); +} + +void CCPRL::put(uint new_value) +{ + value.put(new_value); + + if(test_compare_mode()) + start_compare_mode(); // Actually, re-start with new capture value. +} + +void CCPRL::capture_tmr() +{ + tmrl->get_low_and_high(); + + value.put(tmrl->value.get()); + + ccprh->value.put(tmrl->tmrh->value.get()); + + //int c = value.get() + 256*ccprh->value.get(); +} + +void CCPRL::start_compare_mode(CCPCON *ref) +{ + int capture_value = value.get() + 256*ccprh->value.get(); + + if ( ref ) ccpcon = ref; + if ( ccpcon ) tmrl->set_compare_event ( capture_value, ccpcon ); + else cout << "CPRL: Attempting to set a compare callback with no CCPCON\n"; +} + +void CCPRL::stop_compare_mode() +{ + // If this CCP is in the compare mode, then change to non-compare and cancel + // the tmr breakpoint. + + if(test_compare_mode()) + { + tmrl->clear_compare_event ( ccpcon ); + } + ccpcon = 0; +} + +void CCPRL::start_pwm_mode() +{ + //cout << "CCPRL: starting pwm mode\n"; + + ccprh->pwm_mode = 1; +} +void CCPRL::stop_pwm_mode() +{ + //cout << "CCPRL: stopping pwm mode\n"; + + ccprh->pwm_mode = 0; +} + +//-------------------------------------------------- +// assign_tmr - assign a new timer to the capture compare module +// +// This was created for the 18f family where it's possible to dynamically +// choose which clock is captured during an event. +// +void CCPRL::assign_tmr(TMRL *ptmr) +{ + if(ptmr) { + cout << "Reassigning CCPRL clock source\n"; + + tmrl = ptmr; + } + +} + +//-------------------------------------------------- +// CCPRH +//-------------------------------------------------- + +CCPRH::CCPRH(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + ccprl(0),pwm_mode(0),pwm_value(0) +{ +} + +// put_value allows PWM code to put data +void CCPRH::put_value(uint new_value) +{ + value.put(new_value); +} + +void CCPRH::put(uint new_value) +{ + + //cout << "CCPRH put \n"; + + if(pwm_mode == 0) // In pwm_mode, CCPRH is a read-only register. + { + put_value(new_value); + + if(ccprl && ccprl->test_compare_mode()) + ccprl->start_compare_mode(); // Actually, re-start with new capture value. + + } +} + +uint CCPRH::get() +{ + //cout << "CCPRH get\n"; + return value.get(); +} + +//-------------------------------------------------- +// +//-------------------------------------------------- +class CCPSignalSource : public SignalControl +{ +public: + CCPSignalSource(CCPCON *_ccp, int _index) + : m_ccp(_ccp), + state('?'), index(_index) + { + assert(m_ccp); + } + virtual ~CCPSignalSource() { } + + void setState(char m_state) { state = m_state; } + virtual char getState() { return state; } + virtual void release() { m_ccp->releasePins(index); } + +private: + CCPCON *m_ccp; + char state; + int index; +}; + +//-------------------------------------------------- +// +//-------------------------------------------------- + +class CCPSignalSink : public SignalSink +{ + public: + CCPSignalSink(CCPCON *_ccp, int _index) + : m_ccp(_ccp), index(_index) + { + assert(_ccp); + } + + virtual ~CCPSignalSink(){} + virtual void release() { m_ccp->releaseSink(); } + void setSinkState(char new3State) + { + m_ccp->new_edge( new3State=='1' || new3State=='W'); + } + private: + CCPCON *m_ccp; + int index; + }; + + class Tristate : public SignalControl + { + public: + Tristate() { } + ~Tristate() { } + char getState() { return '1'; } // set port to high impedance by setting it to input + virtual void release() { } +}; +//-------------------------------------------------- +// CCPCON +//-------------------------------------------------- +CCPCON::CCPCON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + pstrcon(0), + pwm1con(0), + eccpas(0), + m_sink(0), + m_tristate(0), + m_bInputEnabled(false), + m_bOutputEnabled(false), + m_cOutputState('?'), + edges(0), delay_source0(false), delay_source1(false), + bridge_shutdown(false), + ccprl(0), pir(0), tmr2(0), adcon0(0) +{ + for(int i=0; i<4; i++) + { + m_PinModule[i] = 0; + m_source[i] = 0; + source_active[i] = false; + } + mValidBits = 0x3f; +} + +CCPCON::~CCPCON() +{ + + + for(int i = 0; i<4; i++) + { + if (m_source[i]) + { + if ( source_active[i] && m_PinModule[i] ) + { + m_PinModule[i]->setSource(0); + } + delete m_source[i]; + } + } + + if (m_tristate) delete m_tristate; + if (m_PinModule[0] && m_sink) m_PinModule[0]->removeSink(m_sink); + if (m_sink) delete m_sink; +} + +void CCPCON::setIOPin1(PinModule *p1) +{ + if (p1 && &(p1->getPin())) + { + if (m_PinModule[0]) + { + if (m_PinModule[0] != p1) + { + m_PinModule[0]->removeSink(m_sink); + m_PinModule[0] = p1; + p1->addSink(m_sink); + } + } + else + { + m_PinModule[0] = p1; + m_sink = new CCPSignalSink(this, 0); + m_tristate = new Tristate(); + m_source[0] = new CCPSignalSource(this, 0); + p1->addSink(m_sink); + } + } +} + +void CCPCON::setIOPin2(PinModule *p2) +{ + if (p2) + { + m_PinModule[1] = p2; + if (!m_source[1]) + m_source[1] = new CCPSignalSource(this, 1); + } + else + { + if (m_source[1]) + { + delete m_source[1]; + m_source[1] = 0; + } + m_PinModule[1] = 0; + } +} + +void CCPCON::setIOPin3(PinModule *p3) +{ + if (p3) + { + m_PinModule[2] = p3; + if (!m_source[2]) m_source[2] = new CCPSignalSource(this, 2); + } + else + { + if (m_source[2]) + { + delete m_source[2]; + m_source[2] = 0; + } + m_PinModule[2] = 0; + } +} + +void CCPCON::setIOPin4(PinModule *p4) +{ + if (p4) + { + m_PinModule[3] = p4; + if (!m_source[3]) m_source[3] = new CCPSignalSource(this, 3); + } + else + { + if (m_source[3]) + { + delete m_source[3]; + m_source[3] = 0; + } + } +} + +void CCPCON::setIOpin(int data, PinModule *pin) +{ + switch(data) + { + case CCP_PIN: + setIOPin1(pin); + break; + + case PxB_PIN: + setIOPin2(pin); + break; + + case PxC_PIN: + setIOPin3(pin); + break; + + case PxD_PIN: + setIOPin4(pin); + break; + } +} + +// EPWM has four outputs PWM 1 +void CCPCON::setIOpin(PinModule *p1, PinModule *p2, PinModule *p3, PinModule *p4) +{ + Dprintf(("%s::setIOpin %s %s %s %s\n", name().c_str(), + (p1 && &(p1->getPin())) ? p1->getPin().name().c_str():"unknown", + (p2 && &(p2->getPin())) ? p2->getPin().name().c_str():"unknown", + (p3 && &(p3->getPin())) ? p3->getPin().name().c_str():"unknown", + (p4 && &(p4->getPin())) ? p4->getPin().name().c_str():"unknown" + )); + if (p1 && !&(p1->getPin())) + { + Dprintf(("FIXME %s::setIOpin called where p1 has unassigned pin\n", name().c_str())); + return; + } + + setIOPin1(p1); + setIOPin2(p2); + setIOPin3(p3); + setIOPin4(p4); +} + +void CCPCON::setCrosslinks ( CCPRL *_ccprl, PIR *_pir, uint _mask, + TMR2 *_tmr2, ECCPAS *_eccpas ) +{ + ccprl = _ccprl; + pir = _pir; + tmr2 = _tmr2; + eccpas = _eccpas; + pir_mask = _mask; +} + +void CCPCON::setADCON(ADCON0 *_adcon0) +{ + adcon0 = _adcon0; +} + +char CCPCON::getState() +{ + return m_bOutputEnabled ? m_cOutputState : '?'; +} + +void CCPCON::new_edge(uint level) +{ + Dprintf(("%s::new_edge() level=%u\n",name().c_str(), level)); + + switch(value.get() & (CCPM3 | CCPM2 | CCPM1 | CCPM0)) + { + case ALL_OFF0: + case ALL_OFF1: + case ALL_OFF2: + case ALL_OFF3: + Dprintf(("--CCPCON not enabled\n")); + return; + + case CAP_FALLING_EDGE: + if (level == 0 && ccprl) { + ccprl->capture_tmr(); + pir->set(pir_mask); + Dprintf(("--CCPCON caught falling edge\n")); + } + break; + + case CAP_RISING_EDGE: + if (level && ccprl) { + ccprl->capture_tmr(); + pir->set(pir_mask); + Dprintf(("--CCPCON caught rising edge\n")); + } + break; + + case CAP_RISING_EDGE4: + if (level && --edges <= 0) { + ccprl->capture_tmr(); + pir->set(pir_mask); + edges = 4; + Dprintf(("--CCPCON caught 4th rising edge\n")); + } + //else cout << "Saw rising edge, but skipped\n"; + break; + + + case CAP_RISING_EDGE16: + if (level && --edges <= 0) { + ccprl->capture_tmr(); + pir->set(pir_mask); + edges = 16; + Dprintf(("--CCPCON caught 4th rising edge\n")); + } + //else cout << "Saw rising edge, but skipped\n"; + break; + + case COM_SET_OUT: + case COM_CLEAR_OUT: + case COM_INTERRUPT: + case COM_TRIGGER: + case PWM0: + case PWM1: + case PWM2: + case PWM3: + //cout << "CCPCON is set up as an output\n"; + return; + } +} + +void CCPCON::compare_match() +{ + + Dprintf(("%s::compare_match()\n", name().c_str())); + + switch(value.get() & (CCPM3 | CCPM2 | CCPM1 | CCPM0)) + { + case ALL_OFF0: + case ALL_OFF1: + case ALL_OFF2: + case ALL_OFF3: + Dprintf(("-- CCPCON not enabled\n")); + return; + + case CAP_FALLING_EDGE: + case CAP_RISING_EDGE: + case CAP_RISING_EDGE4: + case CAP_RISING_EDGE16: + Dprintf(("-- CCPCON is programmed for capture. bug?\n")); + break; + + case COM_SET_OUT: + m_cOutputState = '1'; + m_source[0]->setState('1'); + m_PinModule[0]->updatePinModule(); + if (pir) + pir->set(pir_mask); + Dprintf(("-- CCPCON setting compare output to 1\n")); + break; + + case COM_CLEAR_OUT: + m_cOutputState = '0'; + m_source[0]->setState('0'); + m_PinModule[0]->updatePinModule(); + if (pir) + pir->set(pir_mask); + Dprintf(("-- CCPCON setting compare output to 0\n")); + break; + + case COM_INTERRUPT: + if (pir) + pir->set(pir_mask); + Dprintf(("-- CCPCON setting interrupt\n")); + break; + + case COM_TRIGGER: + if (ccprl) + ccprl->tmrl->clear_timer(); + if (pir) + pir->set(pir_mask); + if(adcon0) + adcon0->start_conversion(); + + Dprintf(("-- CCPCON triggering an A/D conversion ccprl %p\n", ccprl)); + break; + + case PWM0: + case PWM1: + case PWM2: + case PWM3: + //cout << "CCPCON is set up as an output\n"; + return; + + } +} + +// handle dead-band delay in half-bridge mode +void CCPCON::callback() +{ + + if(delay_source0) + { + m_source[0]->setState('1'); + m_PinModule[0]->updatePinModule(); + delay_source0 = false; + } + if(delay_source1) + { + m_source[1]->setState('1'); + m_PinModule[1]->updatePinModule(); + delay_source1 = false; + } +} + +void CCPCON::releaseSink() +{ + delete m_sink; + m_sink = 0; +} +void CCPCON::releasePins(int i) +{ + source_active[i] = false; +} + +void CCPCON::pwm_match(int level) +{ + uint new_value = value.get(); + Dprintf(("%s::pwm_match() level=%d pwm1con = %p now=0x%" PRINTF_GINT64_MODIFIER "x\n", name().c_str(), level, pwm1con, get_cycles().get())); + + + // if the level is 1, then tmr2 == pr2 and the pwm cycle + // is starting over. In which case, we need to update the duty + // cycle by reading ccprl and the ccp X & Y and caching them + // in ccprh's pwm slave register. + if(level == 1) { + // Auto shutdown comes off at start of PWM if ECCPASE clear + if (bridge_shutdown && (!eccpas || !(eccpas->get_value() & ECCPAS::ECCPASE))) + { + Dprintf(("bridge_shutdown=%d eccpas=%p ECCPAS=%x\n", bridge_shutdown, eccpas, + eccpas ? eccpas->get_value() & ECCPAS::ECCPASE: 0)); + for(int i = 0; i < 4; i++) + { + if(m_PinModule[i]) + { + m_PinModule[i]->setControl(0); //restore default pin direction + source_active[i] = false; + m_PinModule[i]->updatePinModule(); + } + } + bridge_shutdown = false; + } + + tmr2->pwm_dc(pwm_latch_value(), address); + ccprl->ccprh->put_value(ccprl->value.get()); + } + if( !pwm1con) { // simple PWM + + if (bridge_shutdown == false) // some processors use shutdown and simple PWM + { + m_cOutputState = level ? '1' : '0'; + m_source[0]->setState(level ? '1' : '0'); + m_PinModule[0]->setSource(m_source[0]); + source_active[0] = true; + + + if(level && !pwm_latch_value()) // if duty cycle == 0 output stays low + m_source[0]->setState('0'); + + m_PinModule[0]->updatePinModule(); + + //cout << "iopin should change\n"; + } + } + else // EPWM + { + + + if (!bridge_shutdown) + drive_bridge(level, new_value); + } +} +// +// Drive PWM bridge +// +void CCPCON::drive_bridge(int level, int new_value) +{ + uint pstrcon_value; + // pstrcon allows port steering for "single output" + // if it is not defined, just use the first port + if (pstrcon) + pstrcon_value = pstrcon->value.get(); + else + pstrcon_value = 1; + int pwm_width; + int delay = pwm1con->value.get() & ~PWM1CON::PRSEN; + + bool active_high[4]; + switch (new_value & (CCPM3|CCPM2|CCPM1|CCPM0)) + { + case PWM0: //P1A, P1C, P1B, P1D active high + active_high[0] = true; + active_high[1] = true; + active_high[2] = true; + active_high[3] = true; + break; + + case PWM1: // P1A P1C active high P1B P1D active low + active_high[0] = true; + active_high[1] = false; + active_high[2] = true; + active_high[3] = false; + break; + + case PWM2: // P1A P1C active low P1B P1D active high + active_high[0] = false; + active_high[1] = true; + active_high[2] = false; + active_high[3] = true; + break; + + case PWM3: // //P1A, P1C, P1B, P1D active low + active_high[0] = false; + active_high[1] = false; + active_high[2] = false; + active_high[3] = false; + break; + + default: + cout << "not pwm mode. bug?\n"; + return; + break; + } + switch((new_value & (P1M1|P1M0))>>6) // ECCP bridge mode + { + case 0: // Single + Dprintf(("Single bridge %s pstrcon=0x%x\n", name().c_str(), pstrcon_value)); + for (int i = 0; i <4; i++) + { + if (pstrcon_value & (1<setSource(m_source[i]); + source_active[i] = true; + // follow level except where duty cycle = 0 + if (level && pwm_latch_value()) + m_source[i]->setState(active_high[i]?'1':'0'); + else + m_source[i]->setState(active_high[i]?'0':'1'); + + m_PinModule[i]->updatePinModule(); + } + else if (m_PinModule[i]) + { + m_PinModule[i]->setSource(0); + source_active[i] = false; + } + } + break; + + case 2: // Half-Bridge + Dprintf(("half-bridge %s\n", name().c_str())); + m_PinModule[0]->setSource(m_source[0]); + source_active[0] = true; + m_PinModule[1]->setSource(m_source[1]); + source_active[1] = true; + if (m_PinModule[2]) + { + m_PinModule[2]->setSource(0); + source_active[2] = false; + } + if (m_PinModule[3]) + { + m_PinModule[3]->setSource(0); + source_active[3] = false; + } + delay_source0 = false; + delay_source1 = false; + // FIXME need to add deadband + // follow level except where duty cycle = 0 + pwm_width = level ? + pwm_latch_value() : + ((tmr2->pr2->value.get()+1)*4)-pwm_latch_value(); + if (!(level^active_high[0]) && pwm_latch_value()) + { + // No delay, change state + if (delay == 0) + m_source[0]->setState('1'); + else if (delay < pwm_width) // there is a delay + { + future_cycle = get_cycles().get() + delay; + get_cycles().set_break(future_cycle, this); + delay_source0 = true; + } + } + else + { + m_source[0]->setState('0'); + } + if (!(level^active_high[1]) && pwm_latch_value()) + { + m_source[1]->setState('0'); + } + else + { + // No delay, change state + if (delay == 0) + m_source[1]->setState('1'); + else if (delay < pwm_width) // there is a delay + { + future_cycle = get_cycles().get() + delay; + get_cycles().set_break(future_cycle, this); + delay_source1 = true; + } + } + m_PinModule[0]->updatePinModule(); + m_PinModule[1]->updatePinModule(); + break; + + case 1: // Full bidge Forward + Dprintf(("full-bridge %s, forward\n", name().c_str())); + if (m_PinModule[0]) + { + m_PinModule[0]->setSource(m_source[0]); + source_active[0] = true; + // P1A High (if active high) + m_source[0]->setState(active_high[0]?'1':'0'); + m_PinModule[0]->updatePinModule(); + } + if (m_PinModule[1]) + { + m_PinModule[1]->setSource(m_source[1]); + source_active[1] = true; + // P1B, P1C low (if active high) + m_source[1]->setState(active_high[1]?'0':'1'); + m_PinModule[1]->updatePinModule(); + } + if (m_PinModule[2]) + { + m_PinModule[2]->setSource(m_source[2]); + source_active[2] = true; + // P1B, P1C low (if active high) + m_source[2]->setState(active_high[2]?'0':'1'); + m_PinModule[2]->updatePinModule(); + } + if (m_PinModule[3]) + { + m_PinModule[3]->setSource(m_source[3]); + source_active[3] = true; + // P1D toggles + if (level && pwm_latch_value()) + m_source[3]->setState(active_high[3]?'1':'0'); + else + m_source[3]->setState(active_high[3]?'0':'1'); + m_PinModule[3]->updatePinModule(); + } + break; + + case 3: // Full bridge reverse + Dprintf(("full-bridge reverse %s\n", name().c_str())); + if (m_PinModule[0]) + { + m_PinModule[0]->setSource(m_source[0]); + source_active[0] = true; + // P1A, P1D low (if active high) + m_source[0]->setState(active_high[0]?'0':'1'); + m_PinModule[0]->updatePinModule(); + } + if (m_PinModule[1]) + { + m_PinModule[1]->setSource(m_source[1]); + source_active[1] = true; + // P1B toggles + if (level && pwm_latch_value()) + m_source[1]->setState(active_high[1]?'1':'0'); + else + m_source[1]->setState(active_high[1]?'0':'1'); + m_PinModule[1]->updatePinModule(); + } + if (m_PinModule[2]) + { + m_PinModule[2]->setSource(m_source[2]); + source_active[2] = true; + // P1C High (if active high) + m_source[2]->setState(active_high[2]?'1':'0'); + m_PinModule[2]->updatePinModule(); + } + if (m_PinModule[3]) + { + m_PinModule[3]->setSource(m_source[3]); + source_active[3] = true; + // P1A, P1D low (if active high) + m_source[3]->setState(active_high[3]?'0':'1'); + m_PinModule[3]->updatePinModule(); + } + break; + + default: + printf("%s::pwm_match impossible ECCP bridge mode\n", name().c_str()); + break; + } + +} +// +// Set PWM bridge into shutdown mode +// +void CCPCON::shutdown_bridge(int eccpas) +{ + bridge_shutdown = true; + + Dprintf(("eccpas=0x%x\n", eccpas)); + + switch(eccpas & (ECCPAS::PSSBD0 | ECCPAS::PSSBD1)) + { + case 0: // B D output 0 + if (m_source[1]) m_source[1]->setState('0'); + if (m_source[3]) m_source[3]->setState('0'); + break; + + case 1: // B, D output 1 + if (m_source[1]) m_source[1]->setState('1'); + if (m_source[3]) m_source[3]->setState('1'); + break; + + default: // Tristate B & D + if(m_PinModule[1]) m_PinModule[1]->setControl(m_tristate); + if(m_PinModule[3]) m_PinModule[3]->setControl(m_tristate); + break; + } + switch(eccpas & ((ECCPAS::PSSAC0 | ECCPAS::PSSAC1) >> 2)) + { + case 0: // A, C output 0 + m_source[0]->setState('0'); + if (m_source[2]) m_source[2]->setState('0'); + break; + + case 1: // A, C output 1 + m_source[0]->setState('1'); + if (m_source[2]) m_source[2]->setState('1'); + break; + + default: // Tristate A & C + m_PinModule[0]->setControl(m_tristate); + if(m_PinModule[2]) m_PinModule[2]->setControl(m_tristate); + break; + } + m_PinModule[0]->updatePinModule(); + if (m_PinModule[1]) m_PinModule[1]->updatePinModule(); + if (m_PinModule[2]) m_PinModule[2]->updatePinModule(); + if (m_PinModule[3]) m_PinModule[3]->updatePinModule(); +} + +void CCPCON::put(uint new_value) +{ + + uint old_value = value.get(); + new_value &= mValidBits; + + Dprintf(("%s::put() new_value=0x%x\n",name().c_str(), new_value)); + + value.put(new_value); + if (!ccprl || !tmr2) + return; + + // Return if no change other than possibly the duty cycle + if (((new_value ^ old_value) & ~(CCPY|CCPX)) == 0) + return; + + bool oldbInEn = m_bInputEnabled; + bool oldbOutEn = m_bOutputEnabled; + + switch(value.get() & (CCPM3 | CCPM2 | CCPM1 | CCPM0)) + { + case ALL_OFF0: + case ALL_OFF1: + case ALL_OFF2: + case ALL_OFF3: + if (ccprl) + { + ccprl->stop_compare_mode(); + ccprl->stop_pwm_mode(); + } + if (tmr2) + tmr2->stop_pwm(address); + m_bInputEnabled = false; + m_bOutputEnabled = false; + + // RP - According to 16F87x data sheet section 8.2.1 clearing CCPxCON also clears the latch + m_cOutputState = '0'; + m_source[0]->setState('0'); + break; + + case CAP_FALLING_EDGE: + case CAP_RISING_EDGE: + edges = 0; + ccprl->stop_compare_mode(); + ccprl->stop_pwm_mode(); + tmr2->stop_pwm(address); + m_bInputEnabled = true; + m_bOutputEnabled = false; + break; + + case CAP_RISING_EDGE4: + edges &= 3; + ccprl->stop_compare_mode(); + ccprl->stop_pwm_mode(); + tmr2->stop_pwm(address); + m_bInputEnabled = true; + m_bOutputEnabled = false; + break; + + case CAP_RISING_EDGE16: + ccprl->stop_compare_mode(); + ccprl->stop_pwm_mode(); + tmr2->stop_pwm(address); + m_bInputEnabled = true; + m_bOutputEnabled = false; + break; + + case COM_SET_OUT: + case COM_CLEAR_OUT: + m_bOutputEnabled = true; + case COM_INTERRUPT: + case COM_TRIGGER: + ccprl->start_compare_mode(this); + ccprl->stop_pwm_mode(); + tmr2->stop_pwm(address); + + // RP - just writing CCP2CON doesn't trigger the ADC; that only happens on a match + //if(adcon0) + // adcon0->start_conversion(); + + m_bInputEnabled = false; + //if(adcon0) cout << "CCP triggering an A/D\n"; + + break; + + case PWM0: + case PWM1: + case PWM2: + case PWM3: + ccprl->stop_compare_mode(); +/* do this when TMR2 == PR2 + ccprl->start_pwm_mode(); + tmr2->pwm_dc( pwm_latch_value(), address); +*/ + m_bInputEnabled = false; + m_bOutputEnabled = false; // this is done in pwm_match + m_cOutputState = '0'; + if ((old_value & P1M0) && (new_value & P1M0)) // old and new full-bridge + { // need to adjust timer if P1M1 also changed + Dprintf(("full bridge repeat old=0x%x new=%x\n", old_value, new_value)); + } + else + pwm_match(0); + //RRRpwm_match(2); + return; + break; + + } + + if (oldbOutEn != m_bOutputEnabled && m_PinModule) + { + if (m_bOutputEnabled) + { + m_PinModule[0]->setSource(m_source[0]); + source_active[0] = true; + } + else + { + m_PinModule[0]->setSource(0); + m_source[0]->setState('?'); + source_active[0] = false; + } + } + + if ((oldbInEn != m_bInputEnabled || + oldbOutEn != m_bOutputEnabled) + && m_PinModule[0]) + m_PinModule[0]->updatePinModule(); + +} + +bool CCPCON::test_compare_mode() +{ + switch(value.get() & (CCPM3 | CCPM2 | CCPM1 | CCPM0)) + { + case ALL_OFF0: + case ALL_OFF1: + case ALL_OFF2: + case ALL_OFF3: + case CAP_FALLING_EDGE: + case CAP_RISING_EDGE: + case CAP_RISING_EDGE4: + case CAP_RISING_EDGE16: + case PWM0: + case PWM1: + case PWM2: + case PWM3: + return false; + break; + + case COM_SET_OUT: + case COM_CLEAR_OUT: + case COM_INTERRUPT: + case COM_TRIGGER: + return true; + break; + } + return false; +} + +PWMxCON::PWMxCON(Processor *pCpu, const char *pName, const char *pDesc, char _index) + : CCPCON(pCpu, pName, pDesc), + pwmdcl(0), pwmdch(0), m_cwg(0), index(_index) +{ + mValidBits = 0xd0; + for(int i=0; i<4; i++) + m_clc[i] = 0; +} +void PWMxCON::put(uint new_value) +{ + new_value &= mValidBits; + put_value(new_value); +} + +void PWMxCON::put_value(uint new_value) +{ + uint diff = value.get() ^ new_value; + Dprintf(("PWMxCON::put %s new 0x%x diff 0x%x\n", name().c_str(), new_value, diff)); + if (!diff) return; + + value.put(new_value); + if (diff & PWMxEN) + { + if (new_value & PWMxEN) // Turn on PWM + { + pwm_match(0); + } + else // Turn off PWM + { + tmr2->stop_pwm(address); + } + } +} +/* + * level == 0 duty cycle match + * level == 1 tmr2 == PR2 + * level == 2 + */ +void PWMxCON::pwm_match(int level) +{ + uint reg = value.get(); + + if (!(reg & PWMxEN)) + return; + + Dprintf(("%s::pwm_match() level=%d now=%" PRINTF_GINT64_MODIFIER "d\n", name().c_str(), level, get_cycles().get())); + + if (level == 1) + { + tmr2->pwm_dc(pwm_latch_value(), address); + if(!pwm_latch_value()) // if duty cycle == 0 output stays low + level = 0; + + } + if (reg & PWMxPOL) // inverse output + { + level = level ? 0 : 1; + Dprintf(("invert output\n")); + } + if (level) + reg |= PWMxOUT; + else + reg &= ~PWMxOUT; + Dprintf(("reg 0x%x old 0x%x\n", reg, value.get())); + if (reg != value.get()) + put_value(reg); + if (m_cwg) m_cwg->out_pwm(level, index); + for(int i = 0; i<4; i++) + if (m_clc[i]) m_clc[i]->out_pwm(level, index); + if (reg & PWMxOE) + { + m_cOutputState = level ? '1' : '0'; + m_source[0]->setState(level ? '1' : '0'); + m_PinModule[0]->setSource(m_source[0]); + m_PinModule[0]->updatePinModule(); + source_active[0] = true; + Dprintf(("PWMxOE level %c\n", m_cOutputState)); + } +} + + + +TRISCCP::TRISCCP(Processor *pCpu, const char *pName, const char *pDesc) : + sfr_register(pCpu, pName), first(true) +{ +} +void TRISCCP::put(uint new_value) +{ + if (first) + { + first = false; + cout << name() << " not implemented, if required, file feature request\n"; + } + value.put(new_value); +} + +DATACCP::DATACCP(Processor *pCpu, const char *pName, const char *pDesc) : + sfr_register(pCpu, pName), first(true) +{ +} + +void DATACCP::put(uint new_value) +{ + if (first) + { + first = false; + cout << name() << " not implemented, if required, file feature request\n"; + } + value.put(new_value); +} + +// Attribute for frequency of external Timer1 oscillator +class TMR1_Freq_Attribute : public Float +{ + public: + TMR1_Freq_Attribute(Processor * _cpu, double freq, const char *name = "tmr1_freq"); + + virtual void set(double d); + double get_freq(); + + private: + Processor * cpu; +}; + +TMR1_Freq_Attribute::TMR1_Freq_Attribute(Processor * _cpu, double freq, const char *name) + : Float(name, freq, " Tmr oscillator frequency."), + cpu(_cpu) +{ + +} + +double TMR1_Freq_Attribute::get_freq() +{ + double d; + Float::get(d); + return(d); +} +void TMR1_Freq_Attribute::set(double d) +{ + Float::set ( d ); +} + +//-------------------------------------------------- +// T1CON +//-------------------------------------------------- +T1CON::T1CON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + tmrl(0), cpu(pCpu) +{ + char freq_name[] = "tmr1_freq"; + if (*(pName+1) >= '1' && *(pName+1) <= '9') freq_name[3] = *(pName+1); + freq_attribute = new TMR1_Freq_Attribute(pCpu, 32768., freq_name); +} +T1CON::~T1CON() +{ + delete freq_attribute; +} + +void T1CON::put(uint new_value) +{ + uint diff = value.get() ^ new_value; + value.put(new_value); + + if (!tmrl) return; + + // First, check the tmr1 clock source bit to see if we are changing from + // internal to external (or vice versa) clocks. + if( diff & (TMR1CS | T1OSCEN)) tmrl->new_clock_source(); + + if( diff & TMR1ON) + tmrl->on_or_off(value.get() & TMR1ON); + else if( diff & (T1CKPS0 | T1CKPS1 | TMR1GE | T1GINV)) + tmrl->update(); +} + +uint T1CON::get() +{ + return(value.get()); +} + +uint T1CON::get_prescale() +{ + return( ((value.get() &(T1CKPS0 | T1CKPS1)) >> 4) ); +} + +double T1CON::t1osc() +{ + return (value.get() & T1OSCEN) ? freq_attribute->get_freq() : 0.; +} +//-------------------------------------------------- +// +//-------------------------------------------------- + +// +// Signal T1GCon on change of state of Gate pin +// +class T1GCon_GateSignalSink : public SignalSink +{ +public: + T1GCon_GateSignalSink(T1GCON *_t1gcon) + : m_t1gcon(_t1gcon) + { + assert(_t1gcon); + } + virtual ~T1GCon_GateSignalSink() + { + } + + virtual void release() {delete this; } + virtual void setSinkState(char new3State) + { + m_t1gcon->PIN_gate( new3State=='1' || new3State=='W'); + } +private: + T1GCON *m_t1gcon; +}; + +T1GCON::T1GCON(Processor *pCpu, const char *pName, const char *pDesc, T1CON_G *_t1con_g) + : sfr_register(pCpu, pName, pDesc), sink(0), write_mask(0xfb), tmrl(0), + t1con_g(_t1con_g), m_Interrupt(0), + PIN_gate_state(false), T0_gate_state(false), CM1_gate_state(false), + CM2_gate_state(false), last_t1g_in(false), gate_pin(0) +{ +} + +T1GCON::~T1GCON() +{ + if (m_Interrupt) + m_Interrupt->release(); +} + +bool T1GCON::tmr1_isON() +{ + if (t1con_g) + return t1con_g->get_tmr1on(); + + if (tmrl->t1con) + return tmrl->t1con->get_tmr1on(); + + cerr << "Error " << name() << " get_tmr1on() not found\n"; + return false; +} + + +void T1GCON::put(uint new_value) +{ + uint old_value = value.get(); + new_value = (new_value & write_mask) | (old_value & ~write_mask); + uint diff = new_value ^ old_value; + bool t1ggo = new_value & T1GGO; + + assert(m_Interrupt); + assert(tmrl); + + if (!diff) return; + + value.put(new_value); + + if (diff & (T1GSS1 | T1GSS0 | T1GPOL | TMR1GE)) + { + switch(new_value & (T1GSS1 | T1GSS0)) + { + case 0: + new_gate(PIN_gate_state); + break; + + case 1: + new_gate(T0_gate_state); + break; + + case 2: + new_gate(CM1_gate_state); + break; + + case 3: + new_gate(CM2_gate_state); + break; + } + // Dont't allow gate change to clear new T1GG0 + if((diff & T1GGO) && t1ggo) + value.put(value.get() | T1GGO); + } + // T1GGO set and Single pulse mode + if ((diff & T1GGO) && (value.get() & (T1GGO | T1GSPM))) + { + //tmrl->IO_gate(true); + if (value.get() & T1GVAL) + { + value.put(value.get() & ~T1GVAL); + //tmrl->IO_gate(true); + tmrl->IO_gate(false); + } + } + if (diff & T1GTM) + { + if ((value.get() & T1GTM)) // T1GTM going high, set t1g_in to 0 + { + if(value.get() & T1GVAL) + { + value.put(value.get() & ~(T1GVAL)); + m_Interrupt->Trigger(); + } + tmrl->IO_gate(false); // Counting should be stopped + } + } + tmrl->update(); +} + +void T1GCON::setGatepin(PinModule *pin) +{ + + + if (pin != gate_pin) + { + if(sink) + { + gate_pin->removeSink(sink); + } + else + sink = new T1GCon_GateSignalSink(this); + + gate_pin = pin; + Dprintf(("T1GCON::setGatepin %s\n", pin->getPin().name().c_str())); + pin->addSink(sink); + } +} + +// The following 4 functions are called on a state change. +// They pass the state to new_gate if that input is selected. +void T1GCON::PIN_gate(bool state) +{ + PIN_gate_state = state; + if((value.get() & (T1GSS0|T1GSS1)) == 0) + new_gate(state); +} +void T1GCON::T0_gate(bool state) +{ + T0_gate_state = state; + if((value.get() & (T1GSS0|T1GSS1)) == 1) + new_gate(state); +} +// T[246] = PR[246] +// overloads T0_gate_state +void T1GCON::T2_gate(bool state) +{ + T0_gate_state = state; + if((value.get() & (T1GSS0|T1GSS1)) == 1) + new_gate(state); +} +void T1GCON::CM1_gate(bool state) +{ + CM1_gate_state = state; + if((value.get() & (T1GSS0|T1GSS1)) == 2) + { + new_gate(state); + } +} +void T1GCON::CM2_gate(bool state) +{ + CM2_gate_state = state; + + if((value.get() & (T1GSS0|T1GSS1)) == 3) + { + new_gate(state); + } +} +void T1GCON::new_gate(bool state) +{ + // TMR1 counts when state low (unless t1gpol is set) + // t1g_in is inverted as per XOR in spec sheet flow chart + bool t1g_in = (!get_t1GPOL()) ^ state ; + bool t1g_val = value.get() & T1GVAL; + uint reg_value = value.get(); + + + if ((t1g_in == last_t1g_in) && (t1g_in == t1g_val)) // no state change, do nothing + { + // tmrl->IO_gate(t1g_val); + return; + } + + + last_t1g_in = t1g_in; + + if ( reg_value & T1GTM) // Toggle mode + { + t1g_val = reg_value & T1GVAL; + if (t1g_in) // rising edge + { + t1g_val = ! t1g_val; // t1gval changes state + } + else + { + return; + } + } + else // Gate directly in control + { + t1g_val = t1g_in; + } + + if (reg_value & T1GSPM) // Single pulse mode + { + if (!(reg_value & T1GGO)) // do nothing if T1GGO clear + return; + + if (!t1g_val) // End of gate + { + reg_value &= ~T1GGO; //set done + } + else // Start of gate + { + } + //t1g_val = t1g_in; + } + + + if (t1g_val) + { + reg_value |= T1GVAL; + } + else + { + if (reg_value & T1GVAL) // interrupt on T1GVAL negative edge + { + m_Interrupt->Trigger(); + } + reg_value &= ~T1GVAL; + } + + value.put(reg_value); + tmrl->IO_gate(t1g_val); +} + +//-------------------------------------------------- +// T1CON_G +//-------------------------------------------------- +T1CON_G::T1CON_G(Processor *pCpu, const char *pName, const char *pDesc) + //: sfr_register(pCpu, pName, pDesc), + : T1CON(pCpu, pName, pDesc), + tmrl(0), freq_attribute(nullptr), + t1gcon(pCpu, "t1gcon", "TM1 Gate Control Register", this) +{ + new_name("T1CON"); +} + +T1CON_G::~T1CON_G() +{ +} + +void T1CON_G::put(uint new_value) +{ + uint diff = value.get() ^ new_value; + value.put(new_value); + + if (!tmrl) return; + + // First, check the tmr1 clock source bit to see if we are changing from + // internal to external (or vice versa) clocks. + if( diff & (TMR1CS0 | TMR1CS1 | T1OSCEN)) + tmrl->new_clock_source(); + + if( diff & TMR1ON) + tmrl->on_or_off(value.get() & TMR1ON); + else if( diff & (T1CKPS0 | T1CKPS1 )) + tmrl->update(); +} + +// If Cap. sensing oscillator T1 clock source, pass to T1 +void T1CON_G::t1_cap_increment() +{ + if (get_tmr1cs() == 3) // T1 input Cap. sensing oscillator + tmrl->increment(); +} +//-------------------------------------------------- +// member functions for the TMRH base class +//-------------------------------------------------- +TMRH::TMRH(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + tmrl(0) +{ + + value.put(0); + +} + +void TMRH::put(uint new_value) +{ + if(!tmrl) + { + value.put(new_value & 0xff); + return; + } + + tmrl->set_ext_scale(); + value.put(new_value & 0xff); + tmrl->synchronized_cycle = get_cycles().get(); + tmrl->last_cycle = tmrl->synchronized_cycle + - (int64_t)((tmrl->value.get() + (value.get()<<8) + * tmrl->prescale * tmrl->ext_scale) +0.5); + + if(tmrl->t1con->get_tmr1on()) tmrl->update(); +} + +uint TMRH::get() +{ + return get_value(); +} + +// For the gui and CLI +uint TMRH::get_value() +{ + // If the TMR1 is being read immediately after being written, then + // it hasn't had enough time to synchronize with the PIC's clock. + + if(get_cycles().get() <= tmrl->synchronized_cycle) + return value.get(); + + // If the TMR is not running then return. + if(!tmrl->t1con->get_tmr1on()) + return value.get(); + + tmrl->current_value(); + + return(value.get()); + +} + + +//-------------------------------------------------- +// +//-------------------------------------------------- + +class TMRl_GateSignalSink : public SignalSink +{ +public: + TMRl_GateSignalSink(TMRL *_tmr1l) + : m_tmr1l(_tmr1l) + { + assert(_tmr1l); + } + + virtual void release() { delete this; } + void setSinkState(char new3State) + { + m_tmr1l->IO_gate( new3State=='1' || new3State=='W'); + } +private: + TMRL *m_tmr1l; +}; + +//-------------------------------------------------- +// trivial class to represent a compare event reference +//-------------------------------------------------- + +class TMR1CapComRef +{ + public: + TMR1CapComRef * next; + + CCPCON * ccpcon; + uint value; + + TMR1CapComRef ( CCPCON * c, uint v ) : ccpcon(c), value(v) {}; +}; + +//-------------------------------------------------- +// member functions for the TMRL base class +//-------------------------------------------------- +TMRL::TMRL(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + value_16bit(0), + m_cState('?'), m_GateState(false), m_compare_GateState(true), + m_io_GateState(true), m_bExtClkEnabled(false), + m_sleeping(false), m_t1gss(true), m_Interrupt(0) +{ + value.put(0); + synchronized_cycle = 0; + prescale_counter = prescale = 1; + break_value = 0x10000; + last_cycle = 0; + future_cycle = 0; + + ext_scale = 1.; + tmrh = 0; + t1con = 0; + compare_queue = 0; + for (int i = 0; i < 4; i++) m_clc[i] = 0; +} + +TMRL::~TMRL() +{ + if (m_Interrupt) m_Interrupt->release(); +} +/* + * If we are similating an external RTC crystal for timer1, + * compute scale factor between crsytal speed and processor + * instruction cycle rate + * + * If tmr1cs = 1 Fosc is 4 x normal speed so reduce ticks by 1/4 + */ +void TMRL::set_ext_scale() +{ + current_value(); + if (t1con->get_t1oscen() && (t1con->get_tmr1cs() == 2)) // external clock + { + ext_scale = get_cycles().instruction_cps()/ + t1con->freq_attribute->get_freq(); + } + else if (t1con->get_tmr1cs() == 1) // Fosc + ext_scale = 0.25; + else ext_scale = 1.; + + if (future_cycle) + last_cycle = get_cycles().get() - (int64_t)(value_16bit *( prescale * ext_scale) + 0.5); +} + +void TMRL::release() +{ +} + +void TMRL::setIOpin(PinModule *extClkSource) +{ + Dprintf(("%s::setIOpin %s\n", name().c_str(), extClkSource?extClkSource->getPin().name().c_str():"")); + + if (extClkSource) + extClkSource->addSink(this); +} + + +void TMRL::setSinkState(char new3State) +{ + if (new3State != m_cState) { + m_cState = new3State; + if (m_bExtClkEnabled && (m_cState == '1' || m_cState == 'W')) + increment(); + } +} + +void TMRL::set_compare_event ( uint value, CCPCON *host ) +{ + TMR1CapComRef * event = compare_queue; + + if ( host ) + { + while ( event ) + { + if ( event->ccpcon == host ) + { + event->value = value; + update(); + return; + } + event = event->next; + } + event = new TMR1CapComRef ( host, value ); + event->next = compare_queue; + compare_queue = event; + update(); + } + else + cout << "TMRL::set_compare_event called with no CAPCOM\n"; +} + +void TMRL::clear_compare_event ( CCPCON *host ) +{ + TMR1CapComRef * event = compare_queue; + TMR1CapComRef * * eptr = &compare_queue; + + while ( event ) + { + if ( event->ccpcon == host ) + { + *eptr = event->next; + delete event; + update(); + return; + } + eptr = &event->next; + event = event->next; + } +} + +void TMRL::setGatepin(PinModule *extGateSource) +{ + Dprintf(("TMRL::setGatepin\n")); + + if (extGateSource) + extGateSource->addSink(new TMRl_GateSignalSink(this)); +} + +void TMRL::set_T1GSS(bool arg) +{ + + m_t1gss = arg; + if (m_t1gss) + IO_gate(m_io_GateState); + else + compare_gate(m_compare_GateState); +} +void TMRL::compare_gate(bool state) +{ + m_compare_GateState = state; + if (!m_t1gss && m_GateState != state) + { + m_GateState = state; + + Dprintf(("TMRL::compare_gate state %d \n", state)); + + if (t1con->get_tmr1GE()) + { + update(); + } + } +} +void TMRL::IO_gate(bool state) +{ + m_io_GateState = state; + + if (m_t1gss && (m_GateState != state)) + { + m_GateState = state; + + Dprintf(("TMRL::IO_gate state %d \n", state)); + + if (t1con->get_tmr1GE()) + { + update(); + } + } +} + +//------------------------------------------------------------ +// setInterruptSource() +// +// This Timer can be an interrupt source. When the interrupt +// needs to be generated, then the InterruptSource object will +// direct the interrupt to where it needs to go (usually this +// is the Peripheral Interrupt Register). + +void TMRL::setInterruptSource(InterruptSource *_int) +{ + m_Interrupt = _int; +} + +void TMRL::increment() +{ + Dprintf(("TMRL increment because of external clock\n")); + + if(--prescale_counter == 0) { + prescale_counter = prescale; + + // In synchronous counter mode prescaler works but rest of tmr1 does not + if (t1con->get_t1sync() == 0 && m_sleeping) + return; + + // prescaler works but rest of timer turned off + if (!t1con->get_tmr1on()) return; + + // If TMRH/TMRL have been manually changed, we'll want to + // get the up-to-date values; + + current_value(); + + value_16bit = 0xffff & ( value_16bit + 1); + + tmrh->value.put((value_16bit >> 8) & 0xff); + value.put(value_16bit & 0xff); + if(value_16bit == 0 && m_Interrupt) + { + m_Interrupt->Trigger(); + for(int i=0; i<4; i++) + if (m_clc[i]) m_clc[i]->t1_overflow(); + } + } + +} + +void TMRL::on_or_off(int new_state) +{ + + if(new_state) { + + Dprintf(("%s is being turned on\n", name().c_str())); + + // turn on the timer + + // Effective last cycle + // Compute the "effective last cycle", i.e. the cycle + // at which TMR1 was last 0 had it always been counting. + + last_cycle = (int64_t)(get_cycles().get() - + (value.get() + (tmrh->value.get()<<8)) * prescale * ext_scale + 0.5); + update(); + } + else { + + Dprintf(("%s is being turned off\n", name().c_str())); + + // turn off the timer and save the current value + current_value(); + if (future_cycle) + { + get_cycles().clear_break(this); + future_cycle = 0; + } + } + +} +// +// If anything has changed to affect when the next TMR1 break point +// will occur, this routine will make sure the break point is moved +// correctly. +// + +void TMRL::update() +{ + + Dprintf(("TMR1 %s update now=0x%" PRINTF_GINT64_MODIFIER "x\n",name().c_str(), get_cycles().get())); + // if t1con->get_t1GINV() is false, timer can run if m_GateState == 0 + + bool gate = t1con->get_t1GINV() ? m_GateState : !m_GateState; + Dprintf(("TMRL::update gate %d GateState %d inv %d get_tmr1on %x tmr1GE %x tmr1cs %x t1oscen %x\n", gate, m_GateState, t1con->get_t1GINV(), t1con->get_tmr1on(), t1con->get_tmr1GE(), t1con->get_tmr1cs(), t1con->get_t1oscen())); + /* When tmr1 is on, and t1con->get_tmr1GE() is true, + gate == 1 allows timer to run, gate == 0 stops timer. + However, if t1con->get_tmr1GE() is false gate has no + effect on timer running or not. + */ + if(t1con->get_tmr1on() && (t1con->get_tmr1GE() ? gate : true)) + { + switch(t1con->get_tmr1cs()) + { + case 0: // internal clock Fosc/4 + break; + + case 1: // internal clock Fosc + break; + + case 2: // External clock + if (t1con->get_t1oscen()) // External clock enabled + { + /* + external timer1 clock runs off a crystal which is typically + 32768 Hz and is independant on the instruction clock, but + gpsim runs on the instruction clock. Ext_scale is the ratio + of these two clocks so the breakpoint can be adjusted to be + triggered at the correct time. + */ + } + else // External stimuli(pin) + { + prescale = 1 << t1con->get_prescale(); + prescale_counter = prescale; + set_ext_scale(); + return; + } + break; + + case 3: // Cap. sensing oscillator + prescale = 1 << t1con->get_prescale(); + prescale_counter = prescale; + set_ext_scale(); + return; + break; + + default: + cout << "TMR1SC reserved value " << t1con->get_tmr1cs() << endl; + break; + } + + set_ext_scale(); + + + // Note, unlike TMR0, anytime something is written to TMRL, the + // prescaler is unaffected on the P18 processors. However, it is + // reset on the p16f88 processor, which is how the current code + // works. This only effects the external drive mode. + + prescale = 1 << t1con->get_prescale(); + prescale_counter = prescale; + + // synchronized_cycle = cycles.get() + 2; + synchronized_cycle = get_cycles().get(); + + + last_cycle = synchronized_cycle + - (int64_t)(value_16bit *( prescale * ext_scale) + 0.5); + + + break_value = 0x10000; // Assume that a rollover will happen first. + + for ( TMR1CapComRef * event = compare_queue; event; event = event->next ) + { + if ( event->value > value_16bit && event->value < break_value ) + { + // A compare interrupt is going to happen before the timer + // will rollover. + break_value = event->value; + } + } + uint64_t fc = get_cycles().get() + + (uint64_t)((break_value - value_16bit) * prescale * ext_scale); + + if(future_cycle) + get_cycles().reassign_break(future_cycle, fc, this); + else + get_cycles().set_break(fc, this); + + future_cycle = fc; + } + else + { + // turn off the timer and save the current value + if (future_cycle) + { + current_value(); + get_cycles().clear_break(this); + future_cycle = 0; + } + } +} + +void TMRL::put(uint new_value) +{ + set_ext_scale(); + + value.put(new_value & 0xff); + + if (!tmrh || !t1con) return; + + synchronized_cycle = get_cycles().get(); + last_cycle = synchronized_cycle - (int64_t)(( value.get() + + (tmrh->value.get()<<8)) * prescale * ext_scale + 0.5); + + current_value(); + + if(t1con->get_tmr1on()) update(); +} + +uint TMRL::get() +{ + return get_value(); +} + +// For the gui and CLI +uint TMRL::get_value() +{ + // If the TMRL is being read immediately after being written, then + // it hasn't had enough time to synchronize with the PIC's clock. + if(get_cycles().get() <= synchronized_cycle) + return value.get(); + + // If TMRL is not on, then return the current value + if(!t1con->get_tmr1on()) + return value.get(); + + current_value(); + + return(value.get()); +} + +//%%%FIXME%%% inline this +// if break inactive (future_cycle == 0), just read the TMR1H and TMR1L +// registers otherwise compute what the register should be and then +// update TMR1H and TMR1L. +// RP: Using future_cycle here is not strictly right. What we really want is +// the condition "TMR1 is running on a GPSIM-generated clock" (as opposed +// to being off, or externally clocked by a stimulus). The presence of a +// breakpoint is _usually_ a good indication of this, but not while we're +// actually processing that breakpoint. For the time being, we work around +// this by calling current_value "redundantly" in callback() +// +void TMRL::current_value() +{ + if (!tmrh) + return; + if (future_cycle == 0) + value_16bit = tmrh->value.get() * 256 + value.get(); + else + { + value_16bit = (uint64_t)((get_cycles().get() - last_cycle)/ + (prescale* ext_scale)); + + + if (value_16bit > 0x10000) + cerr << "overflow TMRL " << name() << " " << value_16bit << endl; + + value.put(value_16bit & 0xff); + tmrh->value.put((value_16bit>>8) & 0xff); + } +} + +uint TMRL::get_low_and_high() +{ + // If the TMRL is being read immediately after being written, then + // it hasn't had enough time to synchronize with the PIC's clock. + if(get_cycles().get() <= synchronized_cycle) + return value.get(); + + current_value(); + + return(value_16bit); +} + +// set m_bExtClkEnable is tmr1 is being clocked by an external stimulus +void TMRL::new_clock_source() +{ + + m_bExtClkEnabled = false; + + current_value(); + + switch(t1con->get_tmr1cs()) + { + case 0: // Fosc/4 + put(value.get()); + break; + + case 1: // Fosc + put(value.get()); + break; + + case 2: // External pin or crystal + + if(t1con->get_t1oscen()) // External crystal, simulate + { + put(value.get()); // let TMRL::put() set a cycle counter break point + } + else // external pin + { + if (future_cycle) + { + // Compute value_16bit with old prescale and ext_scale + current_value(); + get_cycles().clear_break(this); + future_cycle = 0; + } + prescale = 1 << t1con->get_prescale(); + prescale_counter = prescale; + set_ext_scale(); + m_bExtClkEnabled = true; + } + break; + + case 3: // Capacitor sense oscillator + if (future_cycle) + { + // Compute value_16bit with old prescale and ext_scale + current_value(); + get_cycles().clear_break(this); + future_cycle = 0; + } + prescale = 1 << t1con->get_prescale(); + prescale_counter = prescale; + set_ext_scale(); + break; + } + +} + +// +// clear_timer - This is called by either the CCP or PWM modules to +// reset the timer to zero. This is rather easy since the current TMR +// value is always referenced to the cpu cycle counter. +// + +void TMRL::clear_timer() +{ + + synchronized_cycle = get_cycles().get(); + last_cycle = synchronized_cycle; + value.put(0); + tmrh->value.put(0); +} + +// TMRL callback is called when the cycle counter hits the break point that +// was set in TMRL::put. The cycle counter will clear the break point, so +// we don't need to worry about it. At this point, TMRL is rolling over. + +void TMRL::callback() +{ + // If TMRL is being clocked by the external clock, then at some point + // the simulate code must have switched from the internal clock to + // external clock. The cycle break point was still set, so just ignore it. + if((t1con->get_tmr1cs() == 2) && ! t1con->get_t1oscen()) + { + value.put(0); + tmrh->value.put(0); + future_cycle = 0; // indicates that TMRL no longer has a break point + return; + } + + current_value(); // Because this relies on future_cycle, we must call it before clearing that + + future_cycle = 0; // indicate that there's no break currently set + + if(break_value < 0x10000) + { + // The break was due to a "compare" + + if ( value_16bit != break_value ) + cout << "TMR1 compare break: value=" << value_16bit << " but break_value=" << break_value << '\n'; + + for ( TMR1CapComRef * event = compare_queue; event; event = event->next ) + { + if ( event->value == break_value ) + { + // This CCP channel has a compare at this time + event->ccpcon->compare_match(); + } + } + } + else + { + + // The break was due to a roll-over + + //cout<<"TMRL rollover: " << hex << cycles.get() << '\n'; + if (m_Interrupt) + m_Interrupt->Trigger(); + + for(int i=0; i<4; i++) + if (m_clc[i]) m_clc[i]->t1_overflow(); + + // Reset the timer to 0. + + synchronized_cycle = get_cycles().get(); + last_cycle = synchronized_cycle; + value.put(0); + tmrh->value.put(0); + } + + update(); + +} + +//--------------------------- + +void TMRL::callback_print() +{ + cout << "TMRL " << name() << " CallBack ID " << CallBackID << '\n'; + +} + + +//--------------------------- + +void TMRL::sleep() +{ + m_sleeping = true; + Dprintf(("TMRL::sleep t1sysc %d\n", t1con->get_t1sync())); + // If tmr1 is running off Fosc/4 or Fosc this assumes Fosc stops during sleep + + if ( t1con->get_tmr1on() && t1con->get_tmr1cs() < 2) + { + if (future_cycle) + { + current_value(); + get_cycles().clear_break(this); + future_cycle = 0; + } + } +} + +//--------------------------- + +void TMRL::wake() +{ + m_sleeping = false; + Dprintf(("TMRL::wake\n")); + if ( t1con->get_tmr1on() && t1con->get_tmr1cs() < 2) + { + update(); + } +} + +//-------------------------------------------------- +// member functions for the PR2 base class +//-------------------------------------------------- + +PR2::PR2(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + tmr2(0) +{ +} + +void PR2::put(uint new_value) +{ + Dprintf(("PR2:: put %x\n", new_value)); + + if(value.get() != new_value) + { + if (tmr2) tmr2->new_pr2(new_value); + value.put(new_value); + } + else value.put(new_value); +} + +//-------------------------------------------------- +// member functions for the T2CON base class +//-------------------------------------------------- + +T2CON::T2CON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + tmr2(0) +{ +} + +void T2CON::put(uint new_value) +{ + uint diff = value.get() ^ new_value; + value.put(new_value); + + if (tmr2) + { + tmr2->new_pre_post_scale(); + + if( diff & TMR2ON) tmr2->on_or_off(value.get() & TMR2ON); + } +} + + +TMR2::TMR2(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + pwm_mode(0), + update_state(TMR2_ANY_PWM_UPDATE | TMR2_PR2_UPDATE), + last_update(0), + prescale(1), + prescale_counter(0), break_value(0), post_scale(0), + last_cycle(0), + pr2(0), pir_set(0), t2con(0), m_txgcon(0), m_Interrupt(0), + tmr2_interface(0) +{ + ssp_module[0] = ssp_module[1] = 0; + value.put(0); + future_cycle = 0; + + std::fill_n(duty_cycle, MAX_PWM_CHANS, 0); + for (int i = 0; i < 4; i++) + m_clc[i] = 0; + for (int cc = 0; cc < MAX_PWM_CHANS; cc++ ) + ccp[cc] = 0; +} + +TMR2::~TMR2() +{ + if (m_Interrupt) m_Interrupt->release(); +} + + +void TMR2::callback_print() +{ + cout << "TMR2 " << name() << " CallBack ID " << CallBackID << '\n'; +} + +void TMR2::start() +{ + value.put(0); + prescale = 0; + last_cycle = 0; + future_cycle = 0; +} + +bool TMR2::add_ccp ( CCPCON * _ccp ) +{ + int cc; + + for ( cc=0; ccaddress ) ) + { + //cout << "TMR2: pwm mode with ccp1. duty cycle = " << hex << dc << '\n'; + Dprintf(("TMR2::pwm_dc duty cycle 0x%x ccp_addres 0x%x\n", dc, ccp_address)); + duty_cycle[cc] = dc; + pwm_mode |= modeMask; + return; + } + modeMask <<= 1; + } + if ( ! found ) + { + cout << name() <<": error bad ccpxcon address while in pwm_dc()\n"; + cout << "ccp_address = " << ccp_address << " expected one of"; + for ( cc=0; ccaddress; + cout << '\n'; + } +} + +// +// stop_pwm +// + +void TMR2::stop_pwm(uint ccp_address) +{ + int modeMask = TMR2_PWM1_UPDATE; + int cc; + int old_pwm = pwm_mode; + + for ( cc=0; ccaddress ) ) + { + // cout << "TMR2: stopping pwm mode with ccp" << cc+1 << ".\n"; + pwm_mode &= ~modeMask; + if(last_update & modeMask) + update_state &= (~modeMask); + } + modeMask <<= 1; + } + + if((pwm_mode ^ old_pwm) && future_cycle && t2con->get_tmr2on()) + update(update_state); +} + +// +// update +// This member function will determine if/when there is a TMR2 break point +// that needs to be set and will set/move it if so. +// There are two different types of break sources: +// 1) TMR2 matching PR2 +// 2) TMR2 matching one of the ccp registers in pwm mode +// + +void TMR2::update(int ut) +{ + int modeMask = TMR2_PWM1_UPDATE; + int cc; + + //cout << "TMR2 update. cpu cycle " << hex << cycles.get() <<'\n'; + + if(t2con->get_tmr2on()) + { + if(future_cycle) + { + // If TMR2 is enabled (i.e. counting) then 'future_cycle' is non-zero, + // which means there's a cycle break point set on TMR2 that needs to + // be moved to a new cycle. + + current_value(); + + // Assume that we are not in pwm mode (and hence the next break will + // be due to tmr2 matching pr2) + + break_value = 1 + pr2->value.get(); + uint64_t fc = get_cycles().get() + (break_value - value.get()) * prescale; + + last_update = TMR2_PR2_UPDATE; + + // RP - I strongly suspect this is now entirely redundant, as I think the + // result comes out the same as above. + if (pwm_mode) + { + fc = last_cycle + break_value * prescale; + } + + for ( cc=0; cc (value.get()*4) ) && ( duty_cycle[cc] < break_value*4 ) ) + { + uint64_t nc = last_cycle + ( duty_cycle[cc] * prescale ) / 4; + + // cout << "TMR2:PWM" << cc+1 << " update at " << hex << nc << + // ", dc=" << duty_cycle[cc] << "\n"; + if ( nc < fc ) /// @bug not robust against wrap-around of uint64_t + { + last_update = modeMask; + fc = nc; + } + else if ( nc == fc ) + { + last_update |= modeMask; + } + } + } + modeMask <<= 1; + } + if (fc != future_cycle) + { + // cout << "TMR2: update new break at cycle "< TMR2 is still before the next break point. + Adjust the breakpoint to occur at correct TMR2 value + 2> TMR2 is now greater the PR2 + Assume TMR2 must count up to 0xff, roll-over and then + we are back in business. High CCP outputs stay high. + 3> TMR2 is now less than PR2 but greater than a CCP duty cycle point. + The CCP output stays as the duty cycle comparator does not + match on this cycle. + */ + + if (now < delta) // easy case, just shift break. + { + fc = last_cycle + delta; + +// printf ( " now < delta (0x%X), set future_cycle to 0x%" PRINTF_INT64_MODIFIER "X\n", delta, fc ); + + get_cycles().reassign_break(future_cycle, fc, this); + future_cycle = fc; + } + else if (now >= break_value * prescale) // TMR2 now greater than PR2 + { + // set break to when TMR2 will overflow + last_update |= TMR2_WRAP; + fc = last_cycle + 0x100 * prescale; + +// printf ( " now > break (0x%X), set future_cycle to 0x%" PRINTF_INT64_MODIFIER "X\n", break_value * prescale, fc ); + + get_cycles().reassign_break(future_cycle, fc, this); + future_cycle = fc; + } + else // new break < PR2 but > duty cycle break + { +// printf ( " new break < PR2 but > duty cycle\n" ); + update(update_state); + } + + + + /* + 'clear' the post scale counter. (I've actually implemented the + post scale counter as a count-down counter, so 'clearing it' + means resetting it to the starting point. + */ + if (t2con) + post_scale = t2con->get_post_scale(); + } +} + +uint TMR2::get() +{ + if(t2con->get_tmr2on()) current_value(); + + return(value.get()); +} + +uint TMR2::get_value() +{ + if(t2con->get_tmr2on()) current_value(); + + return(value.get()); +} + +void TMR2::new_pre_post_scale() +{ + //cout << "T2CON was written to, so update TMR2 " << t2con->get_tmr2on() << "\n"; + + if(!t2con->get_tmr2on()) { + // TMR2 is not on. If has just been turned off, clear the callback breakpoint. + + if(future_cycle) { + get_cycles().clear_break(this); + future_cycle = 0; + } + return; + } + + uint old_prescale = prescale; + prescale = t2con->get_pre_scale(); + post_scale = t2con->get_post_scale(); + + if(future_cycle) + { + // If TMR2 is enabled (i.e. counting) then 'future_cycle' is non-zero, + // which means there's a cycle break point set on TMR2 that needs to + // be moved to a new cycle. + + + if (prescale != old_prescale) // prescaler value change + { + // togo is number of cycles to next callback based on new prescaler. + uint64_t togo = (future_cycle - get_cycles().get()) * prescale / old_prescale; + + if (!togo) // I am not sure this can happen RRR + callback(); + else + { + uint64_t fc = togo + get_cycles().get(); + + get_cycles().reassign_break(future_cycle, fc, this); + future_cycle = fc; + } + } + } + else + { + //cout << "TMR2 was off, but now it's on.\n"; + + if (value.get() == pr2->value.get()) // TMR2 == PR2 + { + future_cycle = get_cycles().get(); + get_cycles().set_break(future_cycle, this); + callback(); + } + else if (value.get() > pr2->value.get()) // TMR2 > PR2 + { + cout << "Warning TMR2 turned on with TMR2 greater than PR2\n"; + // this will cause TMR2 to wrap + future_cycle = get_cycles().get() + + (1 + pr2->value.get() + (0x100 - value.get())) * prescale; + get_cycles().set_break(future_cycle, this); + } + else + { + future_cycle = get_cycles().get() + 1; + get_cycles().set_break(future_cycle, this); + last_cycle = get_cycles().get() - value.get(); + update(update_state); + } + } + +} + +void TMR2::new_pr2(uint new_value) +{ + Dprintf(("TMR2::new_pr2 on=%u\n", t2con->get_tmr2on())); + + if(t2con->get_tmr2on()) + { + Dprintf(( "TMR2::new_pr2(0x%02X) with timer at 0x%02X -\n", new_value, value.get() )); + + uint cur_break = (future_cycle - last_cycle)/prescale; + uint new_break = 1 + new_value; + uint now_cycle = (get_cycles().get() - last_cycle) / prescale; + + uint64_t fc = last_cycle; + Dprintf(( " cur_break = 0x%X, new_break = 0x%X, now = 0x%X\n", cur_break, new_break, now_cycle )); + Dprintf(( " last_cycle = 0x%" PRINTF_GINT64_MODIFIER "X\n", fc )); + + /* + PR2 change cases + + 1> TMR2 greater than new PR2 + TMR2 wraps through 0xff + 2> New PR2 breakpoint less than current breakpoint or + current break point due to PR2 + Change breakpoint to new value based on PR2 + 3> Other breakpoint < PR2 breakpoint + No need to do anything. + */ + + + if (now_cycle > new_break) // TMR2 > PR2 do wrap + { + // set break to when TMR2 will overflow + last_update |= TMR2_WRAP; + fc += 0x100 * prescale; + Dprintf(( " now > new, set future_cycle to 0x%" PRINTF_GINT64_MODIFIER "X\n", fc )); + get_cycles().reassign_break(future_cycle, fc, this); + future_cycle = fc; + } + else if (cur_break == break_value || // breakpoint due to pr2 + new_break < cur_break) // new break less than current + { + fc += new_break * prescale; + Dprintf(( " new= max_counts()) // Can get to max_counts during transition + { + cerr << "TMR2 BUG!! value = 0x" << tmr2_val << " which is greater than 0x"; + cerr << max_counts() << endl; + } +} + +// TMR2 callback is called when the cycle counter hits the break point that +// was set in TMR2::put. The cycle counter will clear the break point, so +// we don't need to worry about it. At this point, TMR2 is equal to PR2. + +void TMR2::callback() +{ + int cc; + + //cout<<"TMR2 callback cycle: " << hex << cycles.value << '\n'; + + // If tmr2 is still enabled, then set up for the next break. + // If tmr2 was disabled then ignore this break point. + if(t2con->get_tmr2on()) + { + + // What caused the callback: PR2 match or duty cyle match ? + + if (last_update & TMR2_WRAP) // TMR2 > PR2 + { + last_update &= ~TMR2_WRAP; + // This (implicitly) resets the timer to zero: + last_cycle = get_cycles().get(); + } + else if ( last_update & TMR2_ANY_PWM_UPDATE ) + { + int modeMask = TMR2_PWM1_UPDATE; + + for ( cc=0; ccpwm_match(0); + else + cout << "TMR2::callback() found update of non-existent CCP\n"; + } + modeMask <<= 1; + } + } + else + { + // matches PR2 + + //cout << "TMR2: PR2 match. pwm_mode is " << pwm_mode <<'\n'; + + // This (implicitly) resets the timer to zero: + last_cycle = get_cycles().get(); + for(int i =0; i<4; i++) + if(m_clc[i]) m_clc[i]->t2_match(); + + if (ssp_module[0]) + ssp_module[0]->tmr2_clock(); + if (ssp_module[1]) + ssp_module[1]->tmr2_clock(); + if (m_txgcon) // toggle T2_gate, if present + { + m_txgcon->T2_gate(1); + m_txgcon->T2_gate(0); + } + + for ( cc=0; ccis_pwm()) + { + ccp[cc]->pwm_match(1); + } + } + + if(--post_scale < 0) + { + //cout << "setting IF\n"; + if (pir_set) + pir_set->set_tmr2if(); + else if (m_Interrupt) // for multiple T2 (T2, T4, T6) + m_Interrupt->Trigger(); + + post_scale = t2con->get_post_scale(); + } + + update_state = TMR2_ANY_PWM_UPDATE | TMR2_PR2_UPDATE; + + } + update(update_state); + + } + else + future_cycle = 0; +} + + +//------------------------------------------------------------------------ +// TMR2_MODULE +// +// + +TMR2_MODULE::TMR2_MODULE() +{ + + t2con = 0; + pr2 = 0; + tmr2 = 0; + cpu = 0; + name_str = 0; + +} + +void TMR2_MODULE::initialize(T2CON *t2con_, PR2 *pr2_, TMR2 *tmr2_) +{ + + t2con = t2con_; + pr2 = pr2_; + tmr2 = tmr2_; + +} + +//-------------------------------------------------- +// +//-------------------------------------------------- + +class INT_SignalSink : public SignalSink +{ +public: + INT_SignalSink(ECCPAS *_eccpas, int _index) + : m_eccpas(_eccpas), m_index(_index) + { + assert(_eccpas); + } + + virtual void release() { delete this; } + void setSinkState(char new3State) + { + m_eccpas->set_trig_state( m_index, new3State=='0' || new3State=='w'); + } +private: + ECCPAS *m_eccpas; + int m_index; +}; + +//-------------------------------------------------- +// ECCPAS +//-------------------------------------------------- +ECCPAS::ECCPAS(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + pwm1con(0), ccp1con(0), + m_PinModule(0) +{ + trig_state[0] = trig_state[1] = trig_state[2] = false; + mValidBits = 0xff; +} + +ECCPAS::~ECCPAS() +{ +} +void ECCPAS::link_registers(PWM1CON *_pwm1con, CCPCON *_ccp1con) +{ + pwm1con = _pwm1con; + ccp1con = _ccp1con; +} +void ECCPAS::put(uint new_value) +{ + Dprintf(("ECCPAS::put() new_value=0x%x\n",new_value)); + + put_value(new_value); +} +void ECCPAS::put_value(uint new_value) +{ + + int old_value = value.get(); + new_value &= mValidBits; + + + // Auto-shutdown trigger active + // make sure ECCPASE is set + // if change in shutdown status, drive bridge outputs as per current flags + if (shutdown_trigger(new_value)) + { + new_value |= ECCPASE; + if ((new_value ^ old_value) & (ECCPASE|PSSAC1|PSSAC0|PSSBD1|PSSBD0)) + ccp1con->shutdown_bridge(new_value); + } + else // no Auto-shutdown triggers active + { + if (pwm1con->value.get() & PWM1CON::PRSEN) // clear ECCPASE bit + new_value &= ~ ECCPASE; + } + value.put(new_value); +} +// Return true is shutdown trigger is active +bool ECCPAS::shutdown_trigger(int key) +{ + + if ((key & ECCPAS0) && trig_state[0]) + return true; + + if ((key & ECCPAS1) && trig_state[1]) + return true; + + if ((key & ECCPAS2) && trig_state[2]) + return true; + + return false; +} +// connect IO pins to shutdown trigger source +void ECCPAS::setIOpin(PinModule *p0, PinModule *p1, PinModule *p2) +{ + if (p0) + { + m_PinModule = p0; + m_sink = new INT_SignalSink(this, 0); + p0->addSink(m_sink); + } + if (p1) + { + m_PinModule = p1; + m_sink = new INT_SignalSink(this, 1); + p1->addSink(m_sink); + } + if (p2) + { + m_PinModule = p2; + m_sink = new INT_SignalSink(this, 2); + p2->addSink(m_sink); + } +} + +// set shutdown trigger states +void ECCPAS::set_trig_state(int index, bool state) +{ + if (trig_state[index] != state) + { + Dprintf(("index=%d state=%d old=%d\n", index, state, trig_state[index])); + trig_state[index] = state; + put_value(value.get()); + } +} +// Trigger state from comparator 1 +void ECCPAS::c1_output(int state) +{ + set_trig_state(0, state); +} +// Trigger state from comparator 2 +void ECCPAS::c2_output(int state) +{ + set_trig_state(1, state); +} +//-------------------------------------------------- +// PWM1CON +//-------------------------------------------------- +PWM1CON::PWM1CON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ + mValidBits = 0xff; +} + +PWM1CON::~PWM1CON() +{ +} +void PWM1CON::put(uint new_value) +{ + new_value &= mValidBits; + Dprintf(("PWM1CON::put() new_value=0x%x\n",new_value)); + + value.put(new_value); +} +//-------------------------------------------------- +// PSTRCON +//-------------------------------------------------- +PSTRCON::PSTRCON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ +} + +PSTRCON::~PSTRCON() +{ +} +void PSTRCON::put(uint new_value) +{ + Dprintf(("PSTRCON::put() new_value=0x%x\n",new_value)); + new_value &= STRSYNC|STRD|STRC|STRB|STRA; + + value.put(new_value); +} + +//-------------------------------------------------------------------- +// PWM TIMER SELECTION CONTROL REGISTER +//-------------------------------------------------------------------- +CCPTMRS14::CCPTMRS14(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ + for(int i=0; i<4; i++) ccp[i] = 0; + t2=t4=t6=0; +} + +void CCPTMRS14::put(unsigned int new_value) +{ + TMR2* tx; + value.put(new_value); + + for(int i=0; i<4; i++) + { + switch(new_value & 0x3) + { + case 0: + tx = t2; + break; + + case 1: + tx = t4; + break; + + case 2: + tx = t6; + break; + + default: + tx = 0; + break; + } + if (ccp[i] && tx) + { + ccp[i]->set_tmr2(tx); + tx->add_ccp(ccp[i]); + } + new_value >>= 2; + } +} diff --git a/src/gpsim/modules/14bit-tmrs.h b/src/gpsim/modules/14bit-tmrs.h new file mode 100644 index 0000000..037f867 --- /dev/null +++ b/src/gpsim/modules/14bit-tmrs.h @@ -0,0 +1,873 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + Copyright (C) 2009,2010,2013 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +#ifndef __14_BIT_TMRS_H__ +#define __14_BIT_TMRS_H__ + +#include "gpsim_classes.h" +#include "registers.h" +#include "breakpoints.h" +#include "ioports.h" +#include "apfcon.h" +#include "ssp.h" +#include "cwg.h" + +class TMRL; +class TMRH; +class TMR2; +class CCPRL; +class CCPCON; +class PWM1CON; +class ADCON0; +class PIR_SET; +class InterruptSource; +class CWG; +class CLC; +class _14bit_processor; + +//--------------------------------------------------------- +// Todo +// +// The timer base classes need to be abstracted one more +// layer. The 18fxxx parts have a new timer, TMR3, that's +// almost but not quite, identical to the 16fxx's TMR1. + + +//--------------------------------------------------------- +// CCPCON - Capture and Compare registers +//--------------------------------------------------------- +class CCPRH : public sfr_register +{ + public: + + CCPRL *ccprl; + bool pwm_mode; + uint pwm_value; + + CCPRH(Processor *pCpu, const char *pName, const char *pDesc=0); + void put(uint new_value); + void put_value(uint new_value); + uint get(); +}; + +class CCPRL : public sfr_register +{ + public: + + CCPRH *ccprh; + CCPCON *ccpcon; + TMRL *tmrl; + + void put(uint new_value); + void capture_tmr(); + void start_compare_mode(CCPCON *ref=0); + void stop_compare_mode(); + bool test_compare_mode(); + void start_pwm_mode(); + void stop_pwm_mode(); + void assign_tmr(TMRL *ptmr); + CCPRL(Processor *pCpu, const char *pName, const char *pDesc=0); +}; + +class INT_SignalSink; // I/O pin interface +class PinModule; +// +// Enhanced Capture/Compare/PWM Auto-Shutdown control register +// +class ECCPAS : public sfr_register +{ + public: + + /* Bit definitions for the register */ + enum { + PSSBD0 = 1 << 0, // Pins P1B and P1D Shutdown control bits + PSSBD1 = 1 << 1, + PSSAC0 = 1 << 2, // Pins P1A and P1C Shutdown control bits + PSSAC1 = 1 << 3, + ECCPAS0 = 1 << 4, // ECCP Auto-shutdown Source Select bits + ECCPAS1 = 1 << 5, + ECCPAS2 = 1 << 6, + ECCPASE = 1 << 7 // ECCP Auto-Shutdown Event Status bit + }; + + + ECCPAS(Processor *pCpu, const char *pName, const char *pDesc=0); + ~ECCPAS(); + + void put(uint new_value); + void put_value(uint new_value); + void setBitMask(uint bm) { mValidBits = bm; } + void setIOpin(PinModule *p0, PinModule *p1, PinModule *p2); + void c1_output(int value); + void c2_output(int value); + void set_trig_state(int index, bool state); + bool shutdown_trigger(int); + void link_registers(PWM1CON *_pwm1con, CCPCON *_ccp1con); + + private: + PWM1CON *pwm1con; + CCPCON *ccp1con; + PinModule *m_PinModule; + INT_SignalSink *m_sink; + bool trig_state[3]; +}; +// +// Enhanced PWM control register +// +class PWM1CON : public sfr_register +{ + public: + + /* Bit definitions for the register */ + enum { + PDC0 = 1 << 0, // PWM delay count bits + PDC1 = 1 << 1, + PDC2 = 1 << 2, + PDC3 = 1 << 3, + PDC4 = 1 << 4, + PDC5 = 1 << 5, + PDC6 = 1 << 6, + PRSEN = 1 << 7 // PWM Restart Enable bit + }; + + PWM1CON(Processor *pCpu, const char *pName, const char *pDesc=0); + ~PWM1CON(); + + void put(uint new_value); + void setBitMask(uint bm) { mValidBits = bm; } + + private: +}; +// +// Enhanced PWM Pulse Steering control register +// +class PSTRCON : public sfr_register +{ + public: + + /* Bit definitions for the register */ + enum { + STRA = 1 << 0, // Steering enable bit A + STRB = 1 << 1, // Steering enable bit B + STRC = 1 << 2, // Steering enable bit C + STRD = 1 << 3, // Steering enable bit D + STRSYNC = 1 << 4, // Steering Sync bit + }; + + PSTRCON(Processor *pCpu, const char *pName, const char *pDesc=0); + ~PSTRCON(); + + void put(uint new_value); + + private: +}; + +//--------------------------------------------------------- +// CCPCON - Capture and Compare Control register +//--------------------------------------------------------- +class CCPSignalSource; // I/O pin interface +class CCPSignalSink; // I/O pin interface +class Tristate; // I/O pin high impedance +class CCP12CON; + +class CCPCON : public sfr_register, public TriggerObject, public apfpin +{ + public: + + /* Bit definitions for the register */ + enum { + CCPM0 = 1 << 0, + CCPM1 = 1 << 1, + CCPM2 = 1 << 2, + CCPM3 = 1 << 3, + CCPY = 1 << 4, + CCPX = 1 << 5, + P1M0 = 1 << 6, // CCP1 EPWM Output config bits 16f88x + P1M1 = 1 << 7 + }; + + /* Define the Modes (based on the CCPM bits) */ + enum { + ALL_OFF0 = 0, + ALL_OFF1 = 1, + ALL_OFF2 = 2, + ALL_OFF3 = 3, + CAP_FALLING_EDGE = 4, + CAP_RISING_EDGE = 5, + CAP_RISING_EDGE4 = 6, + CAP_RISING_EDGE16 = 7, + COM_SET_OUT = 8, + COM_CLEAR_OUT = 9, + COM_INTERRUPT = 0xa, + COM_TRIGGER = 0xb, + PWM0 = 0xc, + PWM1 = 0xd, + PWM2 = 0xe, + PWM3 = 0xf + }; + enum { + CCP_PIN = 0, + PxB_PIN, + PxC_PIN, + PxD_PIN + }; + + void setBitMask(uint bv) { mValidBits = bv; } + virtual void new_edge(uint level); + void compare_match(); + virtual void pwm_match(int new_state); + void drive_bridge(int level, int new_value); + void shutdown_bridge(int eccpas); + virtual void put(uint new_value); + char getState(); + bool test_compare_mode(); + void callback(); + void releasePins(int); + void releaseSink(); + + void setCrosslinks(CCPRL *, PIR *, uint _mask, TMR2 *, ECCPAS *_eccpas=0); + void setADCON(ADCON0 *); + + CCPCON(Processor *pCpu, const char *pName, const char *pDesc=0); + ~CCPCON(); + + virtual void setIOpin(int data, PinModule *pin); + void setIOpin(PinModule *p1, PinModule *p2=0, PinModule *p3=0, PinModule *p4=0); + void setIOPin1(PinModule *p1); + void setIOPin2(PinModule *p2); + void setIOPin3(PinModule *p3); + void setIOPin4(PinModule *p4); + void set_tmr2(TMR2 *_tmr2) { tmr2 = _tmr2;} + virtual bool is_pwm() { return value.get() & (PWM0 | PWM1);} + virtual uint pwm_latch_value() + {return ((value.get()>>4) & 3) | 4*ccprl->value.get();} + + PSTRCON *pstrcon; + PWM1CON *pwm1con; + ECCPAS *eccpas; + + protected: + PinModule *m_PinModule[4]; + CCPSignalSource *m_source[4]; + bool source_active[4]; + CCPSignalSink *m_sink; + Tristate *m_tristate; + bool m_bInputEnabled; // Input mode for capture/compare + bool m_bOutputEnabled; // Output mode for PWM + char m_cOutputState; + int edges; + uint64_t future_cycle; + bool delay_source0, delay_source1; + bool bridge_shutdown; + + + CCPRL *ccprl; + PIR *pir; + TMR2 *tmr2; + ADCON0 *adcon0; + uint pir_mask; +}; + +class PWMxCON : public CCPCON +{ + public: + enum { + PWMxEN = 1<<7, + PWMxOE = 1<<6, + PWMxOUT = 1<<5, + PWMxPOL = 1<<4 + }; + virtual void put(uint new_value); + virtual void put_value(uint new_value); + virtual void pwm_match(int level); + virtual bool is_pwm() { return true;} + virtual void new_edge(uint level){;} + virtual uint pwm_latch_value() + {return (pwmdch->value.get() << 2) + (pwmdcl->value.get()>>6);} + void set_pwmdc(sfr_register *_pwmdcl, sfr_register *_pwmdch) + { pwmdcl = _pwmdcl; pwmdch = _pwmdch;} + PWMxCON(Processor *pCpu, const char *pName, const char *pDesc=0, char _index=1); + void set_cwg(CWG *_cwg) { m_cwg = _cwg;} + void set_clc(CLC *_clc, int i) { m_clc[i] = _clc;} + + private: + sfr_register *pwmdcl; + sfr_register *pwmdch; + CWG *m_cwg; + CLC *m_clc[4]; + char index; +}; + +class TRISCCP : public sfr_register +{ + public: + + TRISCCP(Processor *pCpu, const char *pName, const char *pDesc=0); + enum + { + TT1CK = 1<<0, + TCCP = 1<<2 + }; + void put(uint value); + private: + bool first; +}; + +class DATACCP : public sfr_register +{ + public: + DATACCP(Processor *pCpu, const char *pName, const char *pDesc=0); + enum + { + TT1CK = 1<<0, + DCCP = 1<<2 + }; + void put(uint value); + private: + bool first; +}; + + +class TMR1_Freq_Attribute; +//--------------------------------------------------------- +// T1CON - Timer 1 control register + +class T1CON : public sfr_register +{ + public: + + enum + { + TMR1ON = 1<<0, + TMR1CS = 1<<1, + T1SYNC = 1<<2, + T1OSCEN = 1<<3, + T1CKPS0 = 1<<4, + T1CKPS1 = 1<<5, + T1RD16 = 1<<6, + TMR1GE = 1<<6, // TMR1 Gate Enable used if TMR1L::setGatepin() has been called + T1GINV = 1<<7 + }; + + TMRL *tmrl; + TMR1_Freq_Attribute *freq_attribute; + Processor *cpu; + + T1CON(Processor *pCpu, const char *pName, const char *pDesc=0); + ~T1CON(); + + uint get(); + + // For (at least) the 18f family, there's a 4X PLL that effects the + // the relative timing between gpsim's cycle counter (which is equivalent + // to the cumulative instruction count) and the external oscillator. In + // all parts, the clock source for the timer is fosc, the external oscillator. + // However, for the 18f parts, the instructions execute 4 times faster when + // the PLL is selected. + + virtual uint get_prescale(); + + virtual uint get_tmr1cs() + { + return((value.get() & TMR1CS)?2:0); + } + virtual bool get_tmr1on() + { + return(value.get() & TMR1ON); + } + virtual bool get_t1oscen() + { + return(value.get() & T1OSCEN); + } + virtual bool get_tmr1GE() + { + return(value.get() & TMR1GE); + } + virtual bool get_t1GINV() + { + return(value.get() & T1GINV); + } + virtual bool get_t1sync() + { + return(value.get() & T1SYNC); + } + virtual void put(uint new_value); + + double t1osc(); +}; + +class T1GCon_GateSignalSink; +class T1CON_G; + +// Timer 1 gate control Register +class T1GCON : public sfr_register, public apfpin +{ + public: + + enum + { + T1GSS0 = 1<<0, // Gate source select bits + T1GSS1 = 1<<1, + T1GVAL = 1<<2, // Current state bit + T1GGO = 1<<3, // Gate Single-Pulse Acquisition Status bit + T1GSPM = 1<<4, // Gate Single-Pulse Mode bit + T1GTM = 1<<5, // Gate Toggle Mode bit + T1GPOL = 1<<6, // Gate Polarity bit + TMR1GE = 1<<7, // Gate Enable bit + }; + + + void put(uint new_value); + virtual void setIOpin(int data, PinModule *pin) { setGatepin(pin);} + virtual void setGatepin(PinModule *); + virtual void PIN_gate(bool); + virtual void T0_gate(bool); + virtual void T2_gate(bool); + virtual void CM1_gate(bool); + virtual void CM2_gate(bool); + virtual void new_gate(bool); + void set_WRmask(uint mask) { write_mask = mask;} + void set_tmrl(TMRL *_tmrl) { tmrl = _tmrl;} + virtual void setInterruptSource(InterruptSource * _int) + { m_Interrupt = _int;} + virtual InterruptSource * getInterruptSource() { return m_Interrupt; } + virtual bool get_tmr1GE() { return(value.get() & TMR1GE); } + bool get_t1GPOL() { return (value.get() & T1GPOL); } + virtual bool tmr1_isON(); + + T1GCON(Processor *pCpu, const char *pName, const char *pDesc=0, T1CON_G *t1con_g=0); + ~T1GCON(); + + private: + + T1GCon_GateSignalSink *sink; + uint write_mask; + TMRL *tmrl; + T1CON_G *t1con_g; + InterruptSource *m_Interrupt; + bool PIN_gate_state; + bool T0_gate_state; // can also be Tx = PRx where x=2,4,6 + bool CM1_gate_state; + bool CM2_gate_state; + bool last_t1g_in; + PinModule *gate_pin; +}; + +// +// T1CON_G combines T1CON and T1GCON into one virtual register +// +class T1CON_G : public T1CON +{ + public: + + enum + { + TMR1ON = 1<<0, + T1SYNC = 1<<2, + T1OSCEN = 1<<3, + T1CKPS0 = 1<<4, + T1CKPS1 = 1<<5, + TMR1CS0 = 1<<6, + TMR1CS1 = 1<<7, + }; + + TMRL *tmrl; + TMR1_Freq_Attribute *freq_attribute; + + T1CON_G(Processor *pCpu, const char *pName, const char *pDesc=0); + ~T1CON_G(); + + void t1_cap_increment(); + + // RRR uint get(); + + // For (at least) the 18f family, there's a 4X PLL that effects the + // the relative timing between gpsim's cycle counter (which is equivalent + // to the cumulative instruction count) and the external oscillator. In + // all parts, the clock source for the timer is fosc, the external oscillator. + // However, for the 18f parts, the instructions execute 4 times faster when + // the PLL is selected. + + virtual uint get_prescale() + { return( ((value.get() &(T1CKPS0 | T1CKPS1)) >> 4) );} + + virtual uint get_tmr1cs() + { + return((value.get() & (TMR1CS1 | TMR1CS0))>>6); + } + virtual bool get_tmr1on() + { + return(value.get() & TMR1ON); + } + virtual bool get_t1oscen() + { + return(value.get() & T1OSCEN); + } + virtual bool get_t1sync() + { + return(value.get() & T1SYNC); + } + virtual void put(uint new_value); + virtual bool get_tmr1GE() + { + return t1gcon.get_tmr1GE(); + } + virtual bool get_t1GINV() { return true;} + + T1GCON t1gcon; +}; + +//--------------------------------------------------------- +// TMRL & TMRH - Timer 1 +class TMRH : public sfr_register +{ + public: + + TMRL *tmrl; + + void put(uint new_value); + uint get(); + virtual uint get_value(); + + TMRH(Processor *pCpu, const char *pName, const char *pDesc=0); +}; + +class TMR1CapComRef; + +class TMRL : public sfr_register, public TriggerObject, public SignalSink +{ + public: + + TMRH *tmrh; + T1CON *t1con; + + uint + prescale, + prescale_counter, + break_value, + value_16bit; /* Low and high concatenated */ + + double ext_scale; + + TMR1CapComRef * compare_queue; + + uint64_t + synchronized_cycle, + future_cycle; + int64_t last_cycle; // last_cycle can be negative for small cycle counts + + + virtual void callback(); + virtual void callback_print(); + + TMRL(Processor *pCpu, const char *pName, const char *pDesc=0); + ~TMRL(); + + void set_ext_scale(); + + virtual void release(); + + virtual void put(uint new_value); + virtual uint get(); + virtual uint get_value(); + virtual uint get_low_and_high(); + virtual void on_or_off(int new_state); + virtual void current_value(); + virtual void new_clock_source(); + virtual void update(); + virtual void clear_timer(); + virtual void setSinkState(char); + virtual void setIOpin(PinModule *); + virtual void setGatepin(PinModule *); + virtual void IO_gate(bool); + virtual void compare_gate(bool); + virtual void setInterruptSource(InterruptSource *); + virtual InterruptSource * getInterruptSource() { return m_Interrupt; } + virtual void sleep(); + virtual void wake(); + + void set_compare_event ( uint value, CCPCON *host ); + void clear_compare_event ( CCPCON *host ); + + void set_T1GSS(bool arg); + virtual void increment(); // Used when TMR1 is attached to an external clock + CLC *m_clc[4]; + + private: + //TMR1_Interface *tmr1_interface; + char m_cState; + bool m_GateState; // Only changes state if setGatepin() has been called + bool m_compare_GateState; + bool m_io_GateState; + bool m_bExtClkEnabled; + bool m_sleeping; + bool m_t1gss; // T1 gate source + // true - IO pin controls gate, + // false - compare controls gate + InterruptSource *m_Interrupt; +}; + +class PR2 : public sfr_register +{ + public: + + TMR2 *tmr2; + + PR2(Processor *pCpu, const char *pName, const char *pDesc=0); + void put(uint new_value); +}; + +//--------------------------------------------------------- +// T2CON - Timer 2 control register + +class T2CON : public sfr_register +{ + public: + + enum + { + T2CKPS0 = 1<<0, + T2CKPS1 = 1<<1, + TMR2ON = 1<<2, + TOUTPS0 = 1<<3, + TOUTPS1 = 1<<4, + TOUTPS2 = 1<<5, + TOUTPS3 = 1<<6 + }; + + TMR2 *tmr2; + + T2CON(Processor *pCpu, const char *pName, const char *pDesc=0); + + inline uint get_t2ckps0() + { + return(value.get() & T2CKPS0); + } + + inline uint get_t2ckps1() + { + return(value.get() & T2CKPS1); + } + + inline uint get_tmr2on() + { + return(value.get() & TMR2ON); + } + + inline uint get_post_scale() + { + return( ((value.get() & (TOUTPS0 | TOUTPS1 | TOUTPS2 | TOUTPS3)) >> 3)); + } + + virtual uint get_pre_scale() + { + // ps1:ps0 prescale + // 0 0 1 + // 0 1 4 + // 1 x 16 + + if(value.get() & T2CKPS1) return 16; + else if(value.get() & T2CKPS0) return 4; + else return 1; + } + void put(uint new_value); +}; + +//--------------------------------------------------------- +// T2CON_64 - Timer 2 control register with prescale including 64 + +class T2CON_64 : public T2CON +{ + public: + T2CON_64(Processor *pCpu, const char *pName, const char *pDesc=0) + : T2CON(pCpu, pName, pDesc) + { + } + virtual uint get_pre_scale() + { + // ps1:ps0 prescale + // 0 0 1 + // 0 1 4 + // 1 0 16 + // 1 1 64 + + switch(value.get() & ( T2CKPS1 | T2CKPS0)) + { + case 0: + return 1; + break; + + case 1: + return 4; + break; + + case 2: + return 16; + break; + + case 3: + return 64; + break; + } + return 1; // just to shutup compiler + } +}; +#define MAX_PWM_CHANS 5 +class TMR2_Interface; + +//--------------------------------------------------------- +// TMR2 - Timer +class TMR2 : public sfr_register, public TriggerObject +{ + protected: + CCPCON * ccp[MAX_PWM_CHANS]; + + public: + /* Define the way in which the tmr2 callback function may be updated. */ + enum TMR2_UPDATE_TYPES + { + TMR2_WRAP = 1<<0, // wrap TMR2 + TMR2_PR2_UPDATE = 1<<1, // update pr2 match + TMR2_PWM1_UPDATE = 1<<2, // wrt ccp1 + // TMR2_PWM2_UPDATE = 1<<3, // wrt ccp2 + // PWM must be last as a variable number of channels follows + TMR2_ANY_PWM_UPDATE = 0xfc, // up to six PWM channels + TMR2_DONTCARE_UPDATE = 0xff // whatever comes next + }; + + int pwm_mode; + int update_state; + int last_update; + + uint + prescale, + prescale_counter, + break_value, + duty_cycle[MAX_PWM_CHANS]; /* for ccp channels */ + int post_scale; + uint64_t last_cycle; + uint64_t future_cycle; + + PR2 *pr2; + PIR_SET *pir_set; + T2CON *t2con; + SSP_MODULE *ssp_module[2]; + T1GCON *m_txgcon; + CLC *m_clc[4]; + + virtual void callback(); + virtual void callback_print(); + TMR2(Processor *pCpu, const char *pName, const char *pDesc=0); + ~TMR2(); + + virtual uint max_counts() {return 256;}; + void put(uint new_value); + uint get(); + void on_or_off(int new_state); + void start(); + void new_pre_post_scale(); + void new_pr2(uint new_value); + void current_value(); + void update(int ut = TMR2_DONTCARE_UPDATE); + void pwm_dc(uint dc, uint ccp_address); + void stop_pwm(uint ccp_address); + virtual uint get_value(); + virtual void setInterruptSource(InterruptSource * _int) + { m_Interrupt = _int;} + virtual InterruptSource * getInterruptSource() { return m_Interrupt; } + + bool add_ccp ( CCPCON * _ccp ); + bool rm_ccp(CCPCON *_ccp); + InterruptSource *m_Interrupt; + TMR2_Interface *tmr2_interface; +}; + + +//--------------------------------------------------------- +// +// TMR2_MODULE +// +class TMR2_MODULE +{ + public: + + _14bit_processor *cpu; + char * name_str; + + + T2CON *t2con; + PR2 *pr2; + TMR2 *tmr2; + + TMR2_MODULE(); + void initialize(T2CON *t2con, PR2 *pr2, TMR2 *tmr2); +}; + +//--------------------------------------------------------- +// +// TMR1_MODULE +// +class TMR1_MODULE +{ + public: + + _14bit_processor *cpu; + char * name_str; + + T1CON *t1con; + PIR_SET *pir_set; + + TMR1_MODULE(); + void initialize(T1CON *t1con, PIR_SET *pir_set); +}; + +class CCPTMRS14 : public sfr_register +{ + public: + + enum + { + C1TSEL0 = 1<<0, // CCP1 (pwm1) + C1TSEL1 = 1<<1, + C2TSEL0 = 1<<2, // CCP2 (pwm2) + C2TSEL1 = 1<<3, + P3TSEL0 = 1<<4, // PWM3 + P3TSEL1 = 1<<5, + P4TSEL0 = 1<<6, // PWM4 + P4TSEL1 = 1<<7, + }; + CCPTMRS14(Processor *pCpu, const char *pName, const char *pDesc=0); + void set_tmr246(TMR2 *_t2, TMR2 *_t4, TMR2 *_t6) + { t2 = _t2; t4 = _t4; t6 = _t6;} + void set_ccp(CCPCON *_c1, CCPCON *_c2, CCPCON *_c3, CCPCON *_c4) + { ccp[0] = _c1; ccp[1] = _c2; ccp[2] = _c3; ccp[3] = _c4;} + void put(unsigned int value); + + + TMR2 *t2, *t4, *t6; + CCPCON *ccp[4]; +}; +#endif diff --git a/src/gpsim/modules/16bit-tmrs.cc b/src/gpsim/modules/16bit-tmrs.cc new file mode 100644 index 0000000..9756f50 --- /dev/null +++ b/src/gpsim/modules/16bit-tmrs.cc @@ -0,0 +1,182 @@ +/* + Copyright (C) 2000 T. Scott Dattalo + Copyright (C) 2015 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include +#include +#include +#include + +#include "config.h" +#include "16bit-tmrs.h" +#include "stimuli.h" + + +// +// 16bit-tmrs.cc +// +// Timer 1&2 modules for the 16bit core pic processors. +// +//-------------------------------------------------- +// T5CON +//-------------------------------------------------- +T5CON::T5CON(Processor *pCpu, const char *pName, const char *pDesc) + : T1CON(pCpu, pName, pDesc), t1gcon(nullptr) +{ +} + +T5CON::~T5CON() +{ +} + +void T5CON::put(uint new_value) +{ + uint diff = value.get() ^ new_value; + value.put(new_value); + if (!tmrl) + return; + // First, check the tmr1 clock source bit to see if we are changing from + // internal to external (or vice versa) clocks. + if( diff & (TMRxCS0 | TMRxCS1 | TxSOSCEN)) + tmrl->new_clock_source(); + + if( diff & TMRxON) + tmrl->on_or_off(value.get() & TMRxON); + else if( diff & (TxCKPS0 | TxCKPS1 )) + tmrl->update(); + +} + +CCPTMRS0::CCPTMRS0(CCPTMRS *_ccptmrs, Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), bit_mask(0xdb), ccptmrs(_ccptmrs) +{} +CCPTMRS0::~CCPTMRS0() +{ +} + +void CCPTMRS0::put(uint reg_value) +{ + uint new_value = reg_value & bit_mask; + + uint diff = value.get() ^ new_value; + value.put(new_value); + + if (diff) ccptmrs->update0(new_value); +} + +CCPTMRS1::CCPTMRS1(CCPTMRS *_ccptmrs, Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), bit_mask(0x0f), ccptmrs(_ccptmrs) +{} +CCPTMRS1::~CCPTMRS1() +{ +} + +void CCPTMRS1::put(uint reg_value) +{ + uint new_value = reg_value & bit_mask; + + uint diff = value.get() ^ new_value; + value.put(new_value); + + if (diff) ccptmrs->update1(new_value); +} + +CCPTMRS::CCPTMRS(Processor *pCpu) + : ccptmrs0(this, pCpu, "ccptmrs0", "PWM Timer Selection Control Register 0"), + ccptmrs1(this, pCpu, "ccptmrs1", "PWM Timer Selection Control Register 1"), + t2(0), t4(0), t6(0), + ccp1(0), ccp2(0), ccp3(0), ccp4(0), ccp5(0), + last_value0(0), last_value1(0) +{ +} +CCPTMRS::~CCPTMRS() +{ +} + +void CCPTMRS::change(CCPCON *ccp, uint old, uint val) +{ + switch (old) + { + case 0: + t2->rm_ccp(ccp); + break; + + case 1: + t4->rm_ccp(ccp); + break; + + case 2: + t6->rm_ccp(ccp); + break; + }; + switch (val) + { + case 0: + t2->add_ccp(ccp); + ccp->set_tmr2(t2); + break; + + case 1: + ccp->set_tmr2(t4); + t4->add_ccp(ccp); + break; + + case 2: + ccp->set_tmr2(t6); + t6->add_ccp(ccp); + break; + }; +} +void CCPTMRS::update0(uint reg_value) +{ + uint diff = last_value0 ^ reg_value; + if (diff & (C1TSEL0 | C1TSEL1)) + { + change(ccp1, last_value0 & (C1TSEL0 | C1TSEL1), reg_value & (C1TSEL0 | C1TSEL1)); + } + if (diff & (C2TSEL0 | C2TSEL1)) + { + change(ccp2, (last_value0 & (C2TSEL0 | C2TSEL1))>>3, + (reg_value & (C2TSEL0 | C2TSEL1))>>3); + } + if (diff & (C3TSEL0 | C3TSEL1)) + { + change(ccp3, (last_value0 & (C3TSEL0 | C3TSEL1))>>6, + (reg_value & (C3TSEL0 | C3TSEL1))>>6); + } + last_value0 = reg_value; +} +void CCPTMRS::update1(uint reg_value) +{ +} +void CCPTMRS::set_ccp(CCPCON *_c1, CCPCON *_c2, CCPCON *_c3, CCPCON *_c4, CCPCON *_c5) +{ + ccp1 = _c1; + ccp2 = _c2; + ccp3 = _c3; + ccp4 = _c4; + ccp5 = _c5; +} +void CCPTMRS::set_tmr246(TMR2 *_t2, TMR2 *_t4, TMR2 *_t6) +{ + t2 = _t2; + t4 = _t4; + t6 = _t6; +} diff --git a/src/gpsim/modules/16bit-tmrs.h b/src/gpsim/modules/16bit-tmrs.h new file mode 100644 index 0000000..9cb398f --- /dev/null +++ b/src/gpsim/modules/16bit-tmrs.h @@ -0,0 +1,156 @@ +/* + Copyright (C) 2000 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __16_BIT_TMRS_H__ +#define __16_BIT_TMRS_H__ + +#include "14bit-tmrs.h" + +//--------------------------------------------------------- +// T5CON - Timer 1,3,5 control register + +class T5CON : public T1CON +{ +public: + +enum +{ + TMRxON = 1<<0, + TxRD16 = 1<<1, + TxSYNC = 1<<2, + TxSOSCEN = 1<<3, + TxCKPS0 = 1<<4, + TxCKPS1 = 1<<5, + TMRxCS0 = 1<<6, + TMRxCS1 = 1<<7, +}; + + + T5CON(Processor *pCpu, const char *pName, const char *pDesc=0); + ~T5CON(); + + //RRR uint get(); + + // For (at least) the 18f family, there's a 4X PLL that effects the + // the relative timing between gpsim's cycle counter (which is equivalent + // to the cumulative instruction count) and the external oscillator. In + // all parts, the clock source for the timer is fosc, the external oscillator. + // However, for the 18f parts, the instructions execute 4 times faster when + // the PLL is selected. + + virtual uint get_prescale() + { + return(((value.get() &(TxCKPS0 | TxCKPS1)) >> 4) ); + } + + virtual uint get_tmr1cs() + { + return((value.get() & (TMRxCS0 | TMRxCS1)) >> 6); + } + virtual bool get_tmr1on() + { + return(value.get() & TMRxON); + } + virtual bool get_t1oscen() + { + return(value.get() & TxSOSCEN); + } + virtual bool get_tmr1GE() + { + return t1gcon->get_tmr1GE(); + } + virtual bool get_t1sync() + { + return(value.get() & TxSYNC); + } + virtual void put(uint new_value); + + virtual bool get_t1GINV() {return true;} + + T1GCON *t1gcon; + +}; + +class CCPTMRS; + +class CCPTMRS0 : public sfr_register +{ + +public: + + CCPTMRS0(CCPTMRS *_ccptmrs, Processor *pCpu, const char *pName, const char *pDesc=0); + ~CCPTMRS0(); + + virtual void put(uint new_value); + + uint bit_mask; + CCPTMRS *ccptmrs; +}; +class CCPTMRS1 : public sfr_register +{ +public: + + CCPTMRS1(CCPTMRS * _ccptmrs, Processor *pCpu, const char *pName, const char *pDesc=0); + ~CCPTMRS1(); + + virtual void put(uint new_value); + + uint bit_mask; + CCPTMRS *ccptmrs; +}; + +class CCPTMRS +{ +public: + + enum + { + C1TSEL0 = 1<<0, + C1TSEL1 = 1<<1, + C2TSEL0 = 1<<3, + C2TSEL1 = 1<<4, + C3TSEL0 = 1<<6, + C3TSEL1 = 1<<7, + C4TSEL0 = 1<<0, + C4TSEL1 = 1<<1, + C5TSEL0 = 1<<2, + C5TSEL1 = 1<<3, + }; + CCPTMRS(Processor *pCpu); + ~CCPTMRS(); + + void update0(uint reg_value); + void update1(uint reg_value); + //void set_tmr135(TMR5 *t1, TMR5 *t3, TMR5 *t5); + void set_tmr246(TMR2 *t2, TMR2 *t4, TMR2 *t6); + void set_ccp(CCPCON *_c1, CCPCON *_c2, CCPCON *_c3, CCPCON *_c4, CCPCON *_c5); + void change(CCPCON *c, uint old, uint val); + + CCPTMRS0 ccptmrs0; + CCPTMRS1 ccptmrs1; + + //TMR5 *t1, *t3, *t5; + TMR2 *t2, *t4, *t6; + CCPCON *ccp1, *ccp2, *ccp3, *ccp4, *ccp5; + uint last_value0; + uint last_value1; + +}; +#endif // __16_BIT_TMRS_H__ diff --git a/src/gpsim/modules/a2d_v2.cc b/src/gpsim/modules/a2d_v2.cc new file mode 100644 index 0000000..1fdf6c6 --- /dev/null +++ b/src/gpsim/modules/a2d_v2.cc @@ -0,0 +1,960 @@ +/* + Copyright (C) 2008,2015 Roy R Rankin + Copyright (C) 2006 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include "ioports.h" +//#include "trace.h" +#include "gpsim_time.h" +//#include "ui.h" +#include "pic-processor.h" +#include "a2d_v2.h" + +#define p_cpu ((Processor *)cpu) + +static PinModule AnInvalidAnalogInput; + +//#define DEBUG +#if defined(DEBUG) +#include "config.h" +#define Dprintf(arg) {printf("%s:%d ",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + + +//------------------------------------------------------ +// ADCON0 +// +ADCON0_V2::ADCON0_V2(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + adres(0), adresl(0), adcon1(0), adcon2(0), intcon(0), pir1v2(0), + ad_state(AD_IDLE), channel_mask(15), ctmu_stim(0), + active_stim(-1) +{ +} + +/* + * Link PIC register for High Byte A/D result + */ +void ADCON0_V2::setAdres(sfr_register *new_adres) +{ + adres = new_adres; +} +/* + * Link PIC register for Low Byte A/D result + */ +void ADCON0_V2::setAdresLow(sfr_register *new_adresl) +{ + adresl = new_adresl; +} +/* + * Link PIC register for ADCON1 + */ +void ADCON0_V2::setAdcon1(ADCON1_V2 *new_adcon1) +{ + adcon1 = new_adcon1; +} +/* + * Link PIC register for ADCON2 + */ +void ADCON0_V2::setAdcon2(ADCON2_V2 *new_adcon2) +{ + adcon2 = new_adcon2; +} +/* + * Link PIC register for PIR1 + */ +void ADCON0_V2::setPir(PIR1v2 *new_pir1) +{ + pir1v2 = new_pir1; +} +/* + * Link PIC register for INTCON + */ +void ADCON0_V2::setIntcon(INTCON *new_intcon) +{ + intcon = new_intcon; +} +/* + * Set Tad time for RC source + */ +void ADCON0_V2::setRCtime(double time) +{ + m_RCtime = time; +} + +/* + * Set resolution of A2D converter + */ +void ADCON0_V2::setA2DBits(uint nBits) +{ + m_A2DScale = (1<get_tad(); + Tacq = adcon2->get_nacq(); + + Dprintf(("\tTad = %u Tacq = %u\n", Tad, Tacq)); + + if (Tad == 0) // RC time source + { + if (cpu) + { + Tad = (m_RCtime * p_cpu->get_frequency()); + Tad = Tad < 2 ? 2 : Tad; + } + else + Tad = 6; + } + + if (Tacq == 0) + fc += 1; // if Tacq is 0, go to acqusition on next clock cycle + else + fc += (Tacq * Tad) / p_cpu->get_ClockCycles_per_Instruction(); + + if(ad_state != AD_IDLE) + { + // The A/D converter is either 'converting' or 'acquiring' + // in either case, there is callback break that needs to be moved. + + stop_conversion(); + get_cycles().reassign_break(future_cycle, fc, this); + } + else + get_cycles().set_break(fc, this); + + future_cycle = fc; + ad_state = AD_ACQUIRING; + +} + +void ADCON0_V2::stop_conversion(void) +{ + + Dprintf(("stopping A/D conversion\n")); + + ad_state = AD_IDLE; + +} + + + +void ADCON0_V2::put(uint new_value) +{ + uint old_value=value.get(); + // SET: Reflect it first! + value.put(new_value); + if(new_value & ADON) { + // The A/D converter is being turned on (or maybe left on) + if (ctmu_stim) + { + // deal with ctmu stimulus for channel change or ON/OFF + if ((old_value ^ new_value) & (ADON|CHS0|CHS1|CHS2|CHS3)) + { + if (new_value & ADON) // A/D is on + attach_ctmu_stim(); + else if(!(new_value & ADON)) // A/D is off + detach_ctmu_stim(); + } + } + if((new_value & ~old_value) & GO) + { + // The 'GO' bit is being turned on, which is request to initiate + // and A/D conversion + start_conversion(); + } + } + else stop_conversion(); +} +void ADCON0_V2::set_ctmu_stim(stimulus *_ctmu_stim) +{ + ctmu_stim = _ctmu_stim; + if (value.get() & ADON) + attach_ctmu_stim(); +} + +void ADCON0_V2::put_conversion(void) +{ + double dRefSep = m_dSampledVrefHi - m_dSampledVrefLo; + double dNormalizedVoltage; + + dNormalizedVoltage = (dRefSep>0.0) ? + (m_dSampledVoltage - m_dSampledVrefLo)/dRefSep : 0.0; + dNormalizedVoltage = dNormalizedVoltage>1.0 ? 1.0 : dNormalizedVoltage; + + uint converted = (uint)(m_A2DScale*dNormalizedVoltage + 0.5); + + Dprintf(("put_conversion: Vrefhi:%g Vreflo:%g conversion:%u normV:%g\n", + m_dSampledVrefHi,m_dSampledVrefLo,converted,dNormalizedVoltage)); + + Dprintf(("%u-bit result 0x%x\n", m_nBits, converted)); + + if(adresl) { // non-null for more than 8 bit conversion + + if(adcon2->value.get() & ADCON2_V2::ADFM) { + adresl->put(converted & 0xff); + adres->put( (converted >> 8) & 0x3); + } else { + adresl->put((converted << 6) & 0xc0); + adres->put( (converted >> 2) & 0xff); + } + + } else { + + adres->put((converted ) & 0xff); + + } + +} + +// ADCON0_V2 callback is called when the cycle counter hits the break point that +// was set in ADCON0_V2::put. + +void ADCON0_V2::callback(void) +{ + int channel; + + Dprintf((" ADCON0_V2 Callback: 0x%" PRINTF_GINT64_MODIFIER "x\n",get_cycles().get())); + + // + // The a/d converter is simulated with a state machine. + // + + switch(ad_state) + { + case AD_IDLE: + Dprintf(("ignoring ad callback since ad_state is idle\n")); + break; + + case AD_ACQUIRING: + channel = (value.get() >> 2) & channel_mask; + + m_dSampledVoltage = adcon1->getChannelVoltage(channel); + m_dSampledVrefHi = adcon1->getVrefHi(); + m_dSampledVrefLo = adcon1->getVrefLo(); + + Dprintf(("Acquiring channel:%d V=%g reflo=%g refhi=%g\n", + channel,m_dSampledVoltage,m_dSampledVrefLo,m_dSampledVrefHi)); + + future_cycle = get_cycles().get() + ((m_nBits + 1) * Tad)/p_cpu->get_ClockCycles_per_Instruction(); + get_cycles().set_break(future_cycle, this); + ad_state = AD_CONVERTING; + break; + + case AD_CONVERTING: + put_conversion(); + + // Clear the GO/!DONE flag. + value.put(value.get() & (~GO)); + set_interrupt(); + ad_state = AD_IDLE; + } +} + +//------------------------------------------------------ +// +void ADCON0_V2::set_interrupt(void) +{ + pir1v2->set_adif(); + intcon->peripheral_interrupt(); + +} + +void ADCON0_V2::detach_ctmu_stim() +{ + if (active_stim >=0 && ctmu_stim) + { + PinModule *pm=adcon1->get_A2Dpin(active_stim); + if (pm && pm->getPin().snode && ctmu_stim) + { + pm->getPin().snode->detach_stimulus(ctmu_stim); + pm->getPin().snode->update(); + } + } + active_stim = -1; +} +/* Move ctmu_stim onto currently selected A/D channel input pin. + if channel has not changed, just return. + Stimulus can only be attached if pin is connected to a node. +*/ +void ADCON0_V2::attach_ctmu_stim() +{ + int channel = (value.get() >> 2) & channel_mask; + if (channel == active_stim) + return; + else if (active_stim >= 0) + detach_ctmu_stim(); + + PinModule *pm=adcon1->get_A2Dpin(channel); + + if (pm) + { + if (!(pm->getPin().snode)) + { + printf("Warning ADCON0_V2::attach_ctmu_stim %s has no node attached CTMU will not work properly\n", pm->getPin().name().c_str()); + } + else if (ctmu_stim) + { + pm->getPin().snode->attach_stimulus(ctmu_stim); + pm->getPin().snode->update(); + active_stim = channel; + } + } +} + + +//------------------------------------------------------ +// ADCON1 +// +ADCON1_V2::ADCON1_V2(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + m_AnalogPins(0), m_nAnalogChannels(0), + mValidCfgBits(0), mCfgBitShift(0), m_vrefHiChan(-1), + m_vrefLoChan(-1), mIoMask(0), m_adcon0(0) + + +{ + for (int i=0; i<(int)cMaxConfigurations; i++) { + setChannelConfiguration(i, 0); + } +} +ADCON1_V2::~ADCON1_V2() +{ + delete [] m_AnalogPins; +} + + +void ADCON1_V2::put(uint new_value) +{ + uint new_mask = get_adc_configmask(new_value); + uint diff = mIoMask ^ new_mask; + + Dprintf (( "ADCON1_V2::put ( %02X ) - new_mask %02X\n", new_value, new_mask )); + + char newname[20]; + + for(uint i = 0; i < m_nAnalogChannels; i++) + { + if ((diff & (1 << i)) && m_AnalogPins[i] != &AnInvalidAnalogInput) + { + + if (new_mask & (1<AnalogReq(this, true, newname); + } + else + { + m_AnalogPins[i]->AnalogReq(this, false, m_AnalogPins[i]->getPin().name().c_str()); + } + } + } + mIoMask = new_mask; + value.put(new_value); +} +/* + * Set the channel used for Vref+ when VCFG0 is set + */ +void ADCON1_V2::setVrefHiChannel(uint channel) +{ + m_vrefHiChan = channel; +} + +/* + * Set the channel used for Vref- when VCFG1 is set + */ +void ADCON1_V2::setVrefLoChannel(uint channel) +{ + m_vrefLoChan = channel; +} + +/* + * If A2D uses PCFG, call for each PCFG value (cfg 0 to 15) with + * each set bit of bitMask indicating port is an analog port + * (either A2D input port or Vref). Processors which use an A2D + * method that uses ANSEL register will not call this. + * + * As an example, for the following Port Configuration Control bit: + * PCFG AN7 AN6 AN5 AN4 AN3 AN2 AN1 AN0 + * ---- ---- ----- ----- ----- ----- ----- ----- ----- + * 1100 D D D A Vref+ Vref- A A + * + * then call setChannelConfiguration with cfg = 12 , bitMask = 0x1f + * */ +void ADCON1_V2::setChannelConfiguration(uint cfg, uint bitMask) +{ + if (cfg < cMaxConfigurations) + m_configuration_bits[cfg] = bitMask; +} + +/* + * Performs same function as setChannelConfiguration, but defines + * all entiries in configuration table in one call. + */ + +void ADCON1_V2::setChanTable( + uint m0, uint m1, uint m2, uint m3, + uint m4, uint m5, uint m6, uint m7, + uint m8, uint m9, uint m10, uint m11, + uint m12, uint m13, uint m14, uint m15) +{ + m_configuration_bits[0] = m0; + m_configuration_bits[1] = m1; + m_configuration_bits[2] = m2; + m_configuration_bits[3] = m3; + m_configuration_bits[4] = m4; + m_configuration_bits[5] = m5; + m_configuration_bits[6] = m6; + m_configuration_bits[7] = m7; + m_configuration_bits[8] = m8; + m_configuration_bits[9] = m9; + m_configuration_bits[10] = m10; + m_configuration_bits[11] = m11; + m_configuration_bits[12] = m12; + m_configuration_bits[13] = m13; + m_configuration_bits[14] = m14; + m_configuration_bits[15] = m15; +} + + + + + +/* + * Number of A2D channels processor supports + */ +void ADCON1_V2::setNumberOfChannels(uint nChannels) +{ + PinModule **save = NULL; + + if (!nChannels || nChannels <= m_nAnalogChannels) + return; + + if (m_nAnalogChannels && nChannels > m_nAnalogChannels ) + save = m_AnalogPins; + + m_AnalogPins = new PinModule *[nChannels]; + + for (uint i=0; i> mCfgBitShift) & mValidCfgBits]); + } + else // register directly gives Analog ports (18f1220) + { + return (~(reg >> mCfgBitShift) & mValidCfgBits); + } +} + +/* + * Associate a processor I/O pin with an A2D channel + */ +void ADCON1_V2::setIOPin(uint channel, PinModule *newPin) +{ + + if (channel < m_nAnalogChannels && + m_AnalogPins[channel] == &AnInvalidAnalogInput && newPin!=0) { + m_AnalogPins[channel] = newPin; + } else { + printf("WARNING %s channel %u, cannot set IOpin\n",__FUNCTION__, channel); + if (m_AnalogPins[channel] != &AnInvalidAnalogInput) + printf("Pin Already assigned\n"); + else if (channel > m_nAnalogChannels) + printf("channel %u >= number of channels %u\n", channel, m_nAnalogChannels); + } +} + + +//------------------------------------------------------ +PinModule *ADCON1_V2::get_A2Dpin(uint channel) +{ + if ( (1<getPin().snode) pm->getPin().snode->update(); + voltage = pm->getPin().get_nodeVoltage(); + } + else + { + cout << "ADCON1_V2::getChannelVoltage channel " << channel << + " not a valid pin\n"; + voltage = 0.; + } + } + else + { + cout << "ADCON1_V2::getChannelVoltage channel " << channel << + " > m_nAnalogChannels " << m_nAnalogChannels << "\n"; + } + + return voltage; +} + +double ADCON1_V2::getVrefHi() +{ + + assert(m_vrefHiChan >= 0); // m_vrefHiChan has not been set + if ( (m_adcon0 && (m_adcon0->value.data & ADCON0_V2::VCFG0)) || + ( !m_adcon0 && (value.data & VCFG0))) // Use Vref+ + return(getChannelVoltage(m_vrefHiChan)); + + return ((Processor *)cpu)->get_Vdd(); +} + +double ADCON1_V2::getVrefLo() +{ + + assert(m_vrefLoChan >= 0); // m_vrefLoChan has not been set + if ( (m_adcon0 && (m_adcon0->value.data & ADCON0_V2::VCFG1)) || + ( !m_adcon0 && (value.data & VCFG1))) // Use Vref- + return getChannelVoltage(m_vrefLoChan); + + return 0.0; +} + + + +//------------------------------------------------------ +// ADCON2_V2 +// +ADCON2_V2::ADCON2_V2(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ +} +char ADCON2_V2::get_nacq() +{ + static char acq_tab[8] = { 0, 2, 4, 6, 8, 12, 16, 20}; + return(acq_tab[((value.get() & (ACQT2 | ACQT1 | ACQT0)) >> 3) ]); +} +char ADCON2_V2::get_tad() +{ + static char adcs_tab[8] = { 2, 8, 32, 0, 4, 16, 64, 0}; + return(adcs_tab[(value.get() & (ADCS2 | ADCS1 | ADCS0)) ]); +} +bool ADCON2_V2::get_adfm() +{ + return((value.get() & ADFM) == ADFM); +} + +ADCON1_2B::ADCON1_2B(Processor *pCpu, const char *pName, const char *pDesc) : + ADCON1_V2(pCpu, pName, pDesc), Vctmu(0.0), Vdac(0.0), Vfvr_buf2(0) +{ +} + +//------------------------------------------------------ +PinModule *ADCON1_2B::get_A2Dpin(uint channel) +{ + if(channel <= m_nAnalogChannels) + { + PinModule *pm = m_AnalogPins[channel]; + if (pm != &AnInvalidAnalogInput) + return pm; + cout << "ADCON1_V2::getChannelVoltage channel " << channel << + " not analog\n"; + } + return 0; +} +double ADCON1_2B::getChannelVoltage(uint channel) +{ + double voltage=0.0; + + if(channel <= m_nAnalogChannels) + { + PinModule *pm = get_A2Dpin(channel); + if (pm) + voltage = pm->getPin().get_nodeVoltage(); + else + { + cout << "ADCON1_2B::getChannelVoltage channel " << channel << + " not valid for A2D\n"; + } + } + else if (channel == CTMU) + voltage = Vctmu; + else if (channel == DAC) + { + voltage = Vdac; + } + else if (channel == FVR_BUF2) + voltage = Vfvr_buf2; + else + { + cout << "ADCON1_2B::getChannelVoltage channel " << channel << + " not valid for A2D\n"; + } + return voltage; +} +double ADCON1_2B::getVrefHi() +{ + assert(m_vrefHiChan >= 0); // m_vrefHiChan has not been set + + switch (value.data & (PVCFG1 | PVCFG0)) + { + case 0: // use Vdd + case (PVCFG1 | PVCFG0): // reserved use Vdd + return ((Processor *)cpu)->get_Vdd(); + break; + + case PVCFG0: // use external pin Vref+ + return(getChannelVoltage(m_vrefHiChan)); + break; + + case PVCFG1: // use FVR buf2 + return Vfvr_buf2; + break; + } + return 0.0; +} +double ADCON1_2B::getVrefLo() +{ + assert(m_vrefLoChan >= 0); // m_vrefLoChan has not been set + + // external pin Vref- ? + if ((value.data & (NVCFG1 | NVCFG0)) == NVCFG1) + return getChannelVoltage(m_vrefLoChan); + + // else AVss (0) + return 0.0; +} + +void ADCON1_2B::put(uint new_value) +{ + value.put(new_value); +} + +// Special trigger from ctmu module +void ADCON1_2B::ctmu_trigger() +{ + if (value.data & TRIGSEL) // special trigger from CTMU active? + { + assert(m_adcon0); + uint value = m_adcon0->value.data; + if ((value & ADCON0_V2::ADON)) + { + value |= ADCON0_V2::GO; + m_adcon0->put(value); + } + } +} +// Special trigger from cpp module +void ADCON1_2B::ccp_trigger() +{ + if (!(value.data & TRIGSEL)) // special trigger from ccp active? + { + uint value = m_adcon0->value.data; + if ((value & ADCON0_V2::ADON)) + { + value |= ADCON0_V2::GO; + m_adcon0->put(value); + } + } +} +ANSEL_2B::ANSEL_2B(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), mask(0) +{ + for(int i=0; i<8; i++) + { + analog_channel[i] = -1; + m_AnalogPins[i] = &AnInvalidAnalogInput; + } +} + +void ANSEL_2B::put(uint new_value) +{ + put_value(new_value); +} + +void ANSEL_2B::put_value(uint new_value) +{ + char newname[20]; + new_value &= mask; + uint diff = value.get() ^ new_value; + + value.put(new_value); + + for(int i = 0; i < 8; i++) + { + if (((1<AnalogReq(this, true, newname); + } + else + { + m_AnalogPins[i]->AnalogReq(this, false, m_AnalogPins[i]->getPin().name().c_str()); + + } + } + } +} +void ANSEL_2B::setIOPin(uint channel, PinModule *port, ADCON1_2B *adcon1) +{ + char newname[20]; + uint pin = port->getPinNumber(); + m_AnalogPins[pin] = port; + analog_channel[pin] = channel; + adcon1->setIOPin(channel, port); + mask |= 1<AnalogReq(this, true, newname); + } +} +ANSEL_2A::ANSEL_2A(Processor *pCpu, const char *pName, const char *pDesc) + : ANSEL_2B(pCpu, pName, pDesc) +{ +} +void ANSEL_2A::setIOPin(uint channel, PinModule *port, ADCON1_2B *adcon1) +{ + char newname[20]; + uint bit = channel & 7; + m_AnalogPins[bit] = port; + analog_channel[bit] = channel; + adcon1->setIOPin(channel, port); + mask |= 1<AnalogReq(this, true, newname); + } +} +// +//-------------------------------------------------- +// member functions for the FVRCON_V2 class +// with one set of gains and FVRST set after delay +//-------------------------------------------------- +// +FVRCON_V2::FVRCON_V2(Processor *pCpu, const char *pName, const char *pDesc, uint bitMask) + : sfr_register(pCpu, pName, pDesc), future_cycle(0), + adcon1(0), daccon0(0), cmModule(0), cpscon0(0) +{ + mask_writable = bitMask; +} + +void FVRCON_V2::put(uint new_value) +{ + uint masked_value = (new_value & mask_writable); + put_value(masked_value); +} + +void FVRCON_V2::put_value(uint new_value) +{ + uint diff = value.get() ^ new_value; + + if (diff) + { + if (diff & FVREN) + new_value &= ~FVRRDY; // Clear FVRRDY regardless of ON or OFF + if (new_value & FVREN) // Enable ON? + { + future_cycle = get_cycles().get() + 25e-6 /get_cycles().seconds_per_cycle(); + get_cycles().set_break(future_cycle, this); + } + else if (future_cycle) + { + get_cycles().clear_break(this); + future_cycle = 0; + } + } + value.put(new_value); + compute_FVR(new_value); + + update(); +} + +// Set FVRRDY bit after timeout +void FVRCON_V2::callback() +{ + future_cycle = 0; + put_value(value.get() | FVRRDY); +} + + + +double FVRCON_V2::compute_FVR(uint fvrcon) +{ + double ret = -1.; + + if (fvrcon & FVRRDY) + { + + switch(fvrcon & (FVRS0 | FVRS1)) + { + case 0: // output is off + ret = 0.0; + break; + + case FVRS0: // Gain = 1 + ret = 1.024; + break; + + case FVRS1: // Gain = 2 + ret = 2.048; + break; + + case (FVRS0|FVRS1): // Gain = 4 + ret = 4.096; + break; + } + } + if (ret > ((Processor *)cpu)->get_Vdd()) + { + cerr << "warning FVRCON FVRAD("<< ret <<") > Vdd(" + <<((Processor *)cpu)->get_Vdd() << ")\n"; + ret = -1.; + } + for (uint i= 0; i < daccon0_list.size(); i++) + { + daccon0_list[i]->set_FVR_CDA_volt(ret); + } + if(adcon1)adcon1->setVoltRef(ret); + if(cmModule) cmModule->set_FVR_volt(ret); + if(cpscon0) cpscon0->set_FVR_volt(ret); + return ret; +} + +void DACCON0_V2::compute_dac(uint value) +{ + double Vhigh = get_Vhigh(value); + double Vlow = 0.; + double Vout; + + if(value & DACEN) // DAC is enabled + { + Dprintf(("DACCON0_V2::compute_dac Vhigh %.2f daccon1_reg %x\n", Vhigh, daccon1_reg)); + Vout = (Vhigh - Vlow) * daccon1_reg/bit_resolution - Vlow; + } + else if (value & DACLPS) + Vout = Vhigh; + else + Vout = Vlow; + Dprintf(("DACCON0_V2::compute_dac value=%x Vout=%.2f adcon1 %p\n", value, Vout, adcon1)); + + set_dacoutpin(value & DACOE, 0, Vout); + + if(adcon1) adcon1->update_dac(Vout); + if(cmModule) cmModule->set_DAC_volt(Vout); + if(cpscon0) cpscon0->set_DAC_volt(Vout); +} +double DACCON0_V2::get_Vhigh(uint value) +{ + uint mode = (value & (DACPSS0|DACPSS1)) >> 2; + switch(mode) + { + case 0: // Vdd + return ((Processor *)cpu)->get_Vdd(); + + case 1: // Vref+ pin, get is from A2D setup + if(adcon1) + return(adcon1->getChannelVoltage(adcon1->getVrefHiChan())); + cerr << "ERROR DACCON0 DACPSS=01b adcon1 not set\n"; + return 0.; + + case 2: // Fixed Voltage Reference + return FVR_CDA_volt; + + case 3: // Reserved value + cerr << "ERROR DACCON0 DACPSS=11b is reserved value\n"; + return 0.; + + } + return 0.; // cant get here +} diff --git a/src/gpsim/modules/a2d_v2.h b/src/gpsim/modules/a2d_v2.h new file mode 100644 index 0000000..f3efb12 --- /dev/null +++ b/src/gpsim/modules/a2d_v2.h @@ -0,0 +1,325 @@ +/* + Copyright (C) 2006 T. Scott Dattalo + Copyright (C) 2008,2015 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +// For A2D modules which have ADCON0, ADCON1 and ADCON2 registers + +#ifndef __A2D_V2_H__ +#define __A2D_v2_H__ + +#include "comparator.h" +#include "a2dconverter.h" +#include "registers.h" +#include "trigger.h" +#include "intcon.h" +#include "pir.h" + +class PinModule; +class pic_processor; + +class ADCON0_V2; +//--------------------------------------------------------- +// ADCON1 +// + +class ADCON1_V2 : public sfr_register +{ +public: + + enum PCFG_bits + { + PCFG0 = 1<<0, + PCFG1 = 1<<1, + PCFG2 = 1<<2, + PCFG3 = 1<<3, + VCFG0 = 1<<4, + VCFG1 = 1<<5, + }; + + ADCON1_V2(Processor *pCpu, const char *pName, const char *pDesc); + ~ADCON1_V2(); + virtual void put(uint new_value); + + void setChanTable( + uint m0, uint m1, uint m2, uint m3, + uint m4, uint m5, uint m6, uint m7, + uint m8, uint m9, uint m10, uint m11, + uint m12, uint m13, uint m14, uint m15); + + void setChannelConfiguration(uint cfg, uint bitMask); + + virtual PinModule *get_A2Dpin(uint channel); + virtual double getChannelVoltage(uint channel); + virtual double getVrefHi(); + virtual double getVrefLo(); + void setVrefHiChannel(uint channel); + void setVrefLoChannel(uint channel); + + void setValidCfgBits(uint m, uint s); + void setNumberOfChannels(uint); + void setIOPin(uint, PinModule *); + void setAdcon0(ADCON0_V2 *adcon0){ m_adcon0 = adcon0;} + virtual uint get_adc_configmask(uint); + virtual void setVoltRef(double x) {;} + virtual int getVrefHiChan() { return m_vrefHiChan;} + virtual int getVrefLoChan() { return m_vrefLoChan;} + +private: +protected: + PinModule **m_AnalogPins; + uint m_nAnalogChannels; + uint mValidCfgBits; + uint mCfgBitShift; + int m_vrefHiChan; + int m_vrefLoChan; + uint mIoMask; + ADCON0_V2 *m_adcon0; // if set use to get VCFG0 and VCFG1 + + static const uint cMaxConfigurations=16; + + + /* configuration bits is an array of 8-bit masks definining whether or not + * a given channel is analog or digital + */ + uint m_configuration_bits[cMaxConfigurations]; + +}; +//--------------------------------------------------------- +// ADCON2 +// + +class ADCON2_V2 : public sfr_register, public TriggerObject +{ +public: + + enum + { + ADCS0 = 1<<0, + ADCS1 = 1<<1, + ADCS2 = 1<<2, + ACQT0 = 1<<3, + ACQT1 = 1<<4, + ACQT2 = 1<<5, + ADFM = 1<<7 + }; + + + ADCON2_V2(Processor *pCpu, const char *pName, const char *pDesc); + + + char get_nacq(); + char get_tad(); + bool get_adfm(); + +private: + + +}; +//--------------------------------------------------------- +// ADCON0 +// + +class ADCON0_V2 : public sfr_register, public TriggerObject +{ +public: + + enum + { + ADON = 1<<0, + GO = 1<<1, + CHS0 = 1<<2, + CHS1 = 1<<3, + CHS2 = 1<<4, + CHS3 = 1<<5, + + VCFG0 = 1<<6, // for 18f1220 + VCFG1 = 1<<7, // for 18f1220 + }; + + enum AD_states + { + AD_IDLE, + AD_ACQUIRING, + AD_CONVERTING + }; + + ADCON0_V2(Processor *pCpu, const char *pName, const char *pDesc); + + + void start_conversion(); + void stop_conversion(); + virtual void set_interrupt(); + virtual void callback(); + virtual void callback_print() {cout << name() << " has callback, ID = " << CallBackID << '\n';} + void put(uint new_value); + void put_conversion(); + + void setAdres(sfr_register *); + void setAdresLow(sfr_register *); + void setAdcon1(ADCON1_V2 *); + void setAdcon2(ADCON2_V2 *); + void setIntcon(INTCON *); + void setPir(PIR1v2 *); + void setA2DBits(uint); + void setChannel_Mask(uint ch_mask) { channel_mask = ch_mask; } + void setRCtime(double); + void set_ctmu_stim(stimulus *_ctmu_stim); + void attach_ctmu_stim(); + void detach_ctmu_stim(); + +private: + + sfr_register *adres; + sfr_register *adresl; + ADCON1_V2 *adcon1; + ADCON2_V2 *adcon2; + INTCON *intcon; + PIR1v2 *pir1v2; + + double m_dSampledVoltage; + double m_dSampledVrefHi; + double m_dSampledVrefLo; + double m_RCtime; + uint m_A2DScale; + uint m_nBits; + uint64_t future_cycle; + uint ad_state; + uint Tad; + uint Tacq; + uint channel_mask; + stimulus *ctmu_stim; + int active_stim; // channel with active stimulus +}; + +// Channels defined in ANSEL rather than ADCON1 +class ADCON1_2B : public ADCON1_V2 +{ +public: + + enum + { + NVCFG0 = 1<<0, // Negative Voltage Reference Configuration bits + NVCFG1 = 1<<1, + PVCFG0 = 1<<2, // Positive Voltage Reference Configuration bits + PVCFG1 = 1<<3, + TRIGSEL = 1<<7, // Special Trigger Select bit + + // the following are special A/D channels + CTMU = 0x1d, + DAC = 0x1e, + FVR_BUF2 = 0x1f + }; + + ADCON1_2B(Processor *pCpu, const char *pName, const char *pDesc); + virtual double getChannelVoltage(uint channel); + virtual void put(uint new_value); + virtual double getVrefHi(); + virtual double getVrefLo(); + void update_ctmu(double _Vctmu) { Vctmu = _Vctmu;} + void update_dac(double _Vdac) { Vdac = _Vdac;} + virtual void setVoltRef(double _Vfvr_buf2) { Vfvr_buf2 = _Vfvr_buf2;} + virtual PinModule *get_A2Dpin(uint channel); + virtual void ctmu_trigger(); + virtual void ccp_trigger(); + +private: + double Vctmu; + double Vdac; + double Vfvr_buf2; + +}; + +// ANSEL register for ADCv2B with an ANSEL per I/O port +class ANSEL_2B : public sfr_register +{ + +public: + + ANSEL_2B(Processor *pCpu, const char *pName, const char *pDesc); + void put(uint new_value); + void put_value(uint new_value); + void setIOPin(uint channel, PinModule *port, ADCON1_2B *adcon1); + +protected: + PinModule *m_AnalogPins[8]; + int analog_channel[8]; + uint mask; +}; + +// ANSEL register for ADCv2 on devices where the ANSEL is mapped by ADC chan +class ANSEL_2A : public ANSEL_2B +{ +public: + + ANSEL_2A(Processor *pCpu, const char *pName, const char *pDesc); + void setIOPin(uint channel, PinModule *port, ADCON1_2B *adcon1); +}; + +class FVRCON_V2 : public sfr_register, public TriggerObject +{ +public: + + enum + { + FVRS0 = 1<<4, + FVRS1 = 1<<5, + FVRRDY = 1<<6, + FVREN = 1<<7, + }; + FVRCON_V2(Processor *, const char *pName, const char *pDesc=0, uint bitMask= 0xf0); + virtual void put(uint new_value); + virtual void put_value(uint new_value); + void set_adcon1(ADCON1_V2 *_adcon1) { adcon1 = _adcon1;} + void set_cmModule(ComparatorModule2 *_cmModule) { cmModule = _cmModule;} + void set_daccon0(DACCON0 *_daccon0) { daccon0_list.push_back(_daccon0);} + void set_cpscon0(CPSCON0 *_cpscon0) { cpscon0 = _cpscon0;} +private: + uint mask_writable; + virtual void callback(); + virtual void callback_print() {cout << name() << " has callback, ID = " << CallBackID << '\n';} + uint64_t future_cycle; + double compute_FVR(uint); + ADCON1_V2 *adcon1; + DACCON0 *daccon0; + vector daccon0_list; + ComparatorModule2 *cmModule; + CPSCON0 *cpscon0; +}; + + +class DACCON0_V2 : public DACCON0 +{ + +public: + + DACCON0_V2(Processor *pCpu, const char *pName, const char *pDesc=0, + uint bitMask= 0xe6, uint bit_res = 32) : + DACCON0(pCpu, pName, pDesc, bitMask, bit_res) + { adcon1 = 0;} + + + virtual void set_adcon1(ADCON1_2B *_adcon1) { adcon1 = _adcon1;} + virtual void compute_dac(uint value); + virtual double get_Vhigh(uint value); + +private: + ADCON1_2B *adcon1; +}; +#endif // __A2D_V2_H__ diff --git a/src/gpsim/modules/a2dconverter.cc b/src/gpsim/modules/a2dconverter.cc new file mode 100644 index 0000000..36c4041 --- /dev/null +++ b/src/gpsim/modules/a2dconverter.cc @@ -0,0 +1,1402 @@ +/* + Copyright (C) 2006 T. Scott Dattalo + Copyright (C) 2009, 2013, 2017 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include "ioports.h" +#include "gpsim_time.h" +#include "pic-processor.h" +#include "a2dconverter.h" +#include "14bit-processors.h" + +#define p_cpu ((Processor *)cpu) + +static PinModule AnInvalidAnalogInput; + +//#define DEBUG +#if defined(DEBUG) +#include "config.h" +#define Dprintf(arg) {printf("%s:%d ",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +//------------------------------------------------------ +// ADRES +// +/* +void ADRES::put(int new_value) +{ + + trace.raw(write_trace.get() | value.get()); + + if(new_value > 255) + value.put(255); + else if (new_value < 0) + value.put(0); + else + value.put(new_value); +} + +*/ +//------------------------------------------------------ +ADCON0::ADCON0(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + adres(0), adresl(0), adcon1(0), intcon(0), m_pPir(0), ad_state(AD_IDLE), + channel_mask(7), channel_shift(3), GO_bit(GO) +{ +} + +/* + * Link PIC register for High Byte A/D result + */ +void ADCON0::setAdres(sfr_register *new_adres) +{ + adres = new_adres; +} +/* + * Link PIC register for Low Byte A/D result + */ +void ADCON0::setAdresLow(sfr_register *new_adresl) +{ + adresl = new_adresl; +} +/* + * Link PIC register for ADCON1 + */ +void ADCON0::setAdcon1(ADCON1 *new_adcon1) +{ + adcon1 = new_adcon1; +} +/* + * Link PIC register for INTCON + */ +void ADCON0::setIntcon(INTCON *new_intcon) +{ + intcon = new_intcon; +} +/* + * Link PIC register for PIR + * If set ADIF in PIR otherwise ADIF in ADCON0 + */ +void ADCON0::setPir(PIR *pPir) +{ + m_pPir = pPir; +} + +/* + * Set resolution of A2D converter + */ +void ADCON0::setA2DBits(uint nBits) +{ + m_A2DScale = (1<get_ClockCycles_per_Instruction(); + + + Dprintf(("ad_state %u fc %" PRINTF_GINT64_MODIFIER "x now %" PRINTF_GINT64_MODIFIER "x\n", ad_state, fc, get_cycles().get())) + if(ad_state != AD_IDLE) + { + // The A/D converter is either 'converting' or 'acquiring' + // in either case, there is callback break that needs to be moved. + + stop_conversion(); + get_cycles().reassign_break(future_cycle, fc, this); + } + else get_cycles().set_break(fc, this); + + future_cycle = fc; + ad_state = AD_ACQUIRING; +} + +void ADCON0::stop_conversion(void) +{ + Dprintf(("stopping A/D conversion\n")); + ad_state = AD_IDLE; +} + +void ADCON0::set_Tad(uint new_value) +{ + // Get the A/D Conversion Clock Select bits + // + // This switch case will get the ADCS bits and set the Tad, or The A/D + // converter clock period. Tad is the number of the oscillator periods + // rather instruction cycle periods. ADCS2 only exists on some processors, + // but should be 0 where it is not used. + + switch(new_value & (ADCS0 | ADCS1)) + { + + case 0: + Tad = (adcon1->value.get() & ADCON1::ADCS2) ? 4 : 2; + break; + + case ADCS0: + Tad = (adcon1->value.get() & ADCON1::ADCS2) ? 16 : 8; + break; + + case ADCS1: + Tad = (adcon1->value.get() & ADCON1::ADCS2) ? 64 : 32; + break; + + case (ADCS0|ADCS1): // typical 4 usec, convert to osc cycles + if (cpu) + { + Tad = (uint)(4.e-6 * p_cpu->get_frequency()); + Tad = Tad < 2? 2 : Tad; + } + else + Tad = 6; + break; + } +} + +void ADCON0::put(uint new_value) +{ + set_Tad(new_value); + + uint old_value=value.get(); + // SET: Reflect it first! + value.put(new_value); + if(new_value & ADON) + { + // The A/D converter is being turned on (or maybe left on) + + if((new_value & ~old_value) & GO_bit) + { + Dprintf(("starting A2D conversion\n")); + // The 'GO' bit is being turned on, which is request to initiate + // and A/D conversion + start_conversion(); + } + } + else stop_conversion(); +} + +void ADCON0::put_conversion(void) +{ + double dRefSep = m_dSampledVrefHi - m_dSampledVrefLo; + double dNormalizedVoltage; + + dNormalizedVoltage = (dRefSep>0.0) ? + (m_dSampledVoltage - m_dSampledVrefLo)/dRefSep : 0.0; + dNormalizedVoltage = dNormalizedVoltage>1.0 ? 1.0 : dNormalizedVoltage; + + uint converted = (uint)(m_A2DScale*dNormalizedVoltage + 0.5); + + + Dprintf(("put_conversion: Vrefhi:%.4f Vreflo:%.4f conversion:%u normV:%f\n", + m_dSampledVrefHi,m_dSampledVrefLo,converted,dNormalizedVoltage)); + + Dprintf(("%u-bit result 0x%x ADFM %d\n", m_nBits, converted, get_ADFM())); + + if(adresl) // non-null for more than 8 bit conversion + { + if(get_ADFM()) + { + adresl->put(converted & 0xff); + adres->put( (converted >> 8) & 0x3); + } + else + { + adresl->put((converted << 6) & 0xc0); + adres->put( (converted >> 2) & 0xff); + } + } + else adres->put((converted ) & 0xff); +} + +// ADCON0 callback is called when the cycle counter hits the break point that +// was set in ADCON0::put. + +void ADCON0::callback(void) +{ + int channel; + + Dprintf((" ADCON0 Callback: 0x%" PRINTF_GINT64_MODIFIER "x ad_state=0x%x\n",get_cycles().get(), ad_state)); + + switch(ad_state) // The a/d converter is simulated with a state machine. + { + case AD_IDLE: + Dprintf(("ignoring ad callback since ad_state is idle\n")); + break; + + case AD_ACQUIRING: + channel = (value.get() >> channel_shift) & channel_mask; + + m_dSampledVoltage = getChannelVoltage(channel); + m_dSampledVrefHi = getVrefHi(); + m_dSampledVrefLo = getVrefLo(); + + Dprintf(("Acquiring channel:%d V=%g reflo=%g refhi=%g\n", + channel,m_dSampledVoltage,m_dSampledVrefLo,m_dSampledVrefHi)); + + future_cycle = get_cycles().get() + (m_nBits * Tad)/p_cpu->get_ClockCycles_per_Instruction(); + get_cycles().set_break(future_cycle, this); + + ad_state = AD_CONVERTING; + + break; + + case AD_CONVERTING: + + put_conversion(); + + // Clear the GO/!DONE flag. + value.put(value.get() & (~GO_bit)); + set_interrupt(); + + ad_state = AD_IDLE; + } +} + +//------------------------------------------------------ +// If the ADIF bit is in the PIR1 register, call setPir() +// in the ADC setup. Otherwise, ADIF is assumed to be in +// the ADCON0 register +// +// Chips like 10f220 do not have interupt and intcon is not defined. +// Thus no interrupt needs be generated +// +void ADCON0::set_interrupt(void) +{ + if (m_pPir) m_pPir->set_adif(); + + else if (intcon) + { + value.put(value.get() | ADIF); + intcon->peripheral_interrupt(); + } +} + +double ADCON0_91X::getVrefHi() +{ + if (value.get() & VCFG0) return getChannelVoltage(Vrefhi_position); + else return ((Processor *)cpu)->get_Vdd(); +} + +double ADCON0_91X::getVrefLo() +{ + if (value.get() & VCFG1) return getChannelVoltage(Vreflo_position); + else return 0.; +} + +//------------------------------------------------------ +// ADCON0 +// +ADCON0_DIF::ADCON0_DIF(Processor *pCpu, const char *pName, const char *pDesc) + : ADCON0(pCpu, pName, pDesc) +{ +} +void ADCON0_DIF::put(uint new_value) +{ + if (new_value & ADRMD) setA2DBits(10); // 10 Bit + else setA2DBits(12); + + set_Tad(new_value); + + uint old_value=value.get(); + // SET: Reflect it first! + value.put(new_value); + + if(new_value & ADON) // The A/D converter is being turned on (or maybe left on) + { + if((new_value & ~old_value) & GO_bit) + { + Dprintf(("starting A2D conversion\n")); + // The 'GO' bit is being turned on, which is request to initiate + // and A/D conversion + start_conversion(); + } + } + else stop_conversion(); +} +void ADCON0_DIF::put_conversion(void) +{ + + int channel = adcon2->value.get() & 0x0f; + double dRefSep = m_dSampledVrefHi - m_dSampledVrefLo; + double dNormalizedVoltage; + double m_dSampledVLo; + + if (channel == 0x0e) channel = 0x15; // shift AN21 to adcon0 channel + if (channel == 0x0f) m_dSampledVLo = getVrefLo(); // use ADNREF for V- + else m_dSampledVLo = getChannelVoltage(channel); + + dNormalizedVoltage = (m_dSampledVoltage - m_dSampledVLo)/dRefSep; + dNormalizedVoltage = dNormalizedVoltage>1.0 ? 1.0 : dNormalizedVoltage; + + int converted = (int)(m_A2DScale*dNormalizedVoltage + 0.5); + + Dprintf(("put_conversion: V+:%g V-:%g Vrefhi:%g Vreflo:%g conversion:%d normV:%g\n", + m_dSampledVoltage, m_dSampledVLo, + m_dSampledVrefHi,m_dSampledVrefLo,converted,dNormalizedVoltage)); + + Dprintf(("%u-bit result 0x%x ADFM %d\n", m_nBits, converted, get_ADFM())); + + if(!get_ADFM()) // signed + { + int sign = 0; + if (converted < 0) + { + sign = 1; + converted = -converted; + } + converted = ((converted << (16-m_nBits)) % 0xffff) | sign; + } + adresl->put(converted & 0xff); + adres->put((converted >> 8) & 0xff); +} + +ADCON1_16F::ADCON1_16F(Processor *pCpu, const char *pName, const char *pDesc) + : ADCON1(pCpu, pName, pDesc), FVR_chan(99) +{ + valid_bits = 0x70; +} + +void ADCON1_16F::put_value(uint new_value) +{ + uint masked_value = new_value & valid_bits; + uint Tad = 6; + setADCnames(); + + switch(masked_value & (ADCS0 | ADCS1)) + { + case 0: + Tad = (new_value & ADCS2) ? 4 : 2; + break; + + case ADCS0: + Tad = (new_value & ADCS2) ? 16 : 8; + break; + + case ADCS1: + Tad = (new_value & ADCS2) ? 64 : 32; + break; + + case (ADCS0|ADCS1): // typical 4 usec, convert to osc cycles + if (cpu) + { + Tad = (uint)(4.e-6 * p_cpu->get_frequency()); + Tad = Tad < 2? 2 : Tad; + } + else + Tad = 6; + break; + } + adcon0->set_Tad(Tad); + if (ADFM & valid_bits) adfm = ADFM & masked_value; + + //RRR FIXME handle ADPREF + value.put(new_value & valid_bits); +} +double ADCON1_16F::getVrefLo() +{ + if (ADNREF & value.get()) + { + + if (Vreflo_position[cfg_index] < m_nAnalogChannels) + return getChannelVoltage(Vreflo_position[cfg_index]); + cerr << "WARNING Vreflo pin not configured\n"; + return -1.; + } + return 0.; //Vss +} + +double ADCON1_16F::getVrefHi() +{ + if (ADPREF0 & valid_bits) + { + uint mode = value.get() & (ADPREF1 | ADPREF0); + switch(mode) + { + case 0: + return ((Processor *)cpu)->get_Vdd(); + + case 1: + cerr << "WARNING reserved value for ADPREF\n"; + return -1.; + + case 2: + if (Vrefhi_position[cfg_index] < m_nAnalogChannels) + return getChannelVoltage(Vrefhi_position[cfg_index]); + cerr << "WARNING Vrefhi pin not configured\n"; + return -1.; + + case 3: + if (FVR_chan < m_nAnalogChannels) + return getChannelVoltage(FVR_chan); + cerr << "WARNING FVR_chan not set\n"; + return -1.; + }; + } + if (Vrefhi_position[cfg_index] < m_nAnalogChannels) + return getChannelVoltage(Vrefhi_position[cfg_index]); + + return ((Processor *)cpu)->get_Vdd(); +} +//------------------------------------------------------ +// ADCON1 +// +ADCON1::ADCON1(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + valid_bits(0xff), adfm(false), + m_AnalogPins(0), m_voltageRef(0), m_nAnalogChannels(0), + mValidCfgBits(0), mCfgBitShift(0), mIoMask(0), cfg_index(0), + m_ad_in_ctl(0) +{ + for (int i=0; i<(int)cMaxConfigurations; i++) + { + setChannelConfiguration(i, 0); + setVrefLoConfiguration(i, 0xffff); + setVrefHiConfiguration(i, 0xffff); + } +} + +ADCON1::~ADCON1() +{ + if (m_voltageRef) delete [] m_voltageRef; + if (m_AnalogPins) + { + if (m_ad_in_ctl) + { + for (uint i = 0; i < m_nAnalogChannels; i++) + m_AnalogPins[i]->setControl(0); + delete m_ad_in_ctl; + } + + delete [] m_AnalogPins; + } +} + +void ADCON1::put(uint new_value) +{ + uint masked_value = new_value & valid_bits; + put_value(masked_value); +} + +void ADCON1::put_value(uint new_value) +{ + uint masked_value = new_value & valid_bits; + cfg_index = get_cfg(masked_value); + setADCnames(); + adfm = masked_value & ADFM; + value.put(masked_value); +} + +// Obtain new mIoMask and set pin names as per function +void ADCON1::setADCnames() +{ + uint new_mask = m_configuration_bits[cfg_index]; + uint diff = mIoMask ^ new_mask; + + Dprintf (( "ADCON1::setADCnames - cfg_index=%u new_mask %02X channels %u\n", + cfg_index, new_mask, m_nAnalogChannels )); + + char newname[20]; + + for(uint i = 0; i < m_nAnalogChannels; i++) + { + if ((diff & (1 << i)) && m_AnalogPins[i] != &AnInvalidAnalogInput) + { + + if (new_mask & (1<AnalogReq(this, true, newname); + } + else m_AnalogPins[i]->AnalogReq(this, false, m_AnalogPins[i]->getPin().name().c_str()); + } + } + mIoMask = new_mask; +} +/* + * If A2D uses PCFG, call for each PCFG value (cfg 0 to 15) with + * each set bit of bitMask indicating port is an analog port + * (either A2D input port or Vref). Processors which use an A2D + * method that uses ANSEL register will not call this. + * + * As an example, for the following Port Configuration Control bit: + * PCFG AN7 AN6 AN5 AN4 AN3 AN2 AN1 AN0 + * ---- ---- ----- ----- ----- ----- ----- ----- ----- + * 1100 D D D A Vref+ Vref- A A + * + * then call setChannelConfiguration with cfg = 12 , bitMask = 0x1f + * */ +void ADCON1::setChannelConfiguration(uint cfg, uint bitMask) +{ + if (cfg < cMaxConfigurations) + m_configuration_bits[cfg] = bitMask; +} + +uint ADCON1::getVrefLoChannel(uint cfg) +{ + if (cfg < cMaxConfigurations) return(Vreflo_position[cfg]); + return(0xffff); +} + +uint ADCON1::getVrefHiChannel(uint cfg) +{ + Dprintf(("ADCON1::getVrefHiChannel cfg=%u %u\n", cfg, Vrefhi_position[cfg])); + if (cfg < cMaxConfigurations) return(Vrefhi_position[cfg]); + return(0xffff); +} + +/* + * Call for each configuration mode that uses an І/O pin as Vref- + * to declare which port is being used for this. + */ +void ADCON1::setVrefLoConfiguration(uint cfg, uint channel) +{ + if (cfg < cMaxConfigurations) Vreflo_position[cfg] = channel; +} + +/* + * Call for each configuration mode that uses an І/O pin as Vref+ + * to declare which port is being used for this. + */ +void ADCON1::setVrefHiConfiguration(uint cfg, uint channel) +{ + if (cfg < cMaxConfigurations) Vrefhi_position[cfg] = channel; +} + +/* + * Number of A2D channels processor supports + */ +void ADCON1::setNumberOfChannels(uint nChannels) +{ + PinModule **save = NULL; // save existing pins when nChannels increases + + if (!nChannels || nChannels <= m_nAnalogChannels) + return; // do nothing if NChannels decreases + + if (m_nAnalogChannels && nChannels > m_nAnalogChannels ) + save = m_AnalogPins; + + if (m_voltageRef) delete [] m_voltageRef; + + m_voltageRef = new float [nChannels]; + m_AnalogPins = new PinModule *[nChannels]; + + for (uint i=0; i> mCfgBitShift); +} + +/* + * Associate a processor I/O pin with an A2D channel + */ +void ADCON1::setIOPin(uint channel, PinModule *newPin) +{ + if (channel < m_nAnalogChannels && + m_AnalogPins[channel] == &AnInvalidAnalogInput && newPin!=0) + { + m_AnalogPins[channel] = newPin; + } + else printf("%s:%d WARNING invalid channel number config for ADCON1 %u num %u\n",__FILE__,__LINE__, channel, m_nAnalogChannels); +} + + +void ADCON1::setVoltRef(uint channel, float value) +{ + if (channel < m_nAnalogChannels ) m_voltageRef[channel] = value; + + else printf("ADCON1::%s invalid channel number %u\n", __FUNCTION__, channel); +} + +//------------------------------------------------------ +double ADCON1::getChannelVoltage(uint channel) +{ + double voltage = 0.0; + + if( channel < m_nAnalogChannels ) + { + if( (1<getPin().get_nodeVoltage(); + else + { + cerr << "ADCON1::getChannelVoltage channel " << channel << + " not valid analog input\n"; + cerr << "Please raise a Gpsim bug report\n"; + } + } + else // use voltage reference + { + Dprintf(("ADCON1::getChannelVoltage channel=%u voltage %f\n", \ + channel, m_voltageRef[channel])); + voltage = m_voltageRef[channel]; + + if (voltage < 0.0) + { + cout << "ADCON1::getChannelVoltage channel " << channel << + " not a configured input\n"; + voltage = 0.0; + } + } + } + else + { + cerr << "ADCON1::getChannelVoltage channel " << channel << " >= " + << m_nAnalogChannels << " (number of channels)\n"; + cerr << "Please raise a Gpsim bug report\n"; + } + return voltage; +} + +double ADCON1::getVrefHi() +{ + if (Vrefhi_position[cfg_index] < m_nAnalogChannels) + return getChannelVoltage(Vrefhi_position[cfg_index]); + + return ((Processor *)cpu)->get_Vdd(); +} + +double ADCON1::getVrefLo() +{ + if (Vreflo_position[cfg_index] < m_nAnalogChannels) + return getChannelVoltage(Vreflo_position[cfg_index]); + + return 0.0; +} + +// if on is true, set pin as input regardless of TRIS state +// else restore TRIS control +// +void ADCON1::set_channel_in(uint channel, bool on) +{ + Dprintf(("channel=%u on=%d m_ad_in_ctl=%p\n", channel, on, m_ad_in_ctl)); + + if (on && (m_ad_in_ctl == NULL)) + m_ad_in_ctl = new AD_IN_SignalControl(); + + if (on) m_AnalogPins[channel]->setControl(m_ad_in_ctl); + else m_AnalogPins[channel]->setControl(0); + + m_AnalogPins[channel]->updatePinModule(); +} + +ANSEL::ANSEL(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + adcon1(0), anselh(0), valid_bits(0x7f) +{ +} + +void ANSEL::setAdcon1(ADCON1 *new_adcon1) +{ + adcon1 = new_adcon1; +} + +void ANSEL::put(uint new_value) +{ + uint cfgmax = adcon1->getNumberOfChannels(); + uint i; + uint mask = (new_value & valid_bits); + + if (anselh) mask |= anselh->value.get() << 8; + + //Generate ChannelConfiguration from ansel register + for(i=0; i < cfgmax; i++) + adcon1->setChannelConfiguration(i, mask); + + value.put(new_value & valid_bits); + adcon1->setADCnames(); +} + +ANSEL_H::ANSEL_H(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + adcon1(0), ansel(0), valid_bits(0x3f) +{ +} + +void ANSEL_H::setAdcon1(ADCON1 *new_adcon1) +{ + adcon1 = new_adcon1; +} + +void ANSEL_H::put(uint new_value) +{ + uint cfgmax = adcon1->getNumberOfChannels(); + uint i; + uint mask = ((new_value & valid_bits) << 8) ; + + if (ansel) mask |= ansel->value.get(); + + for(i=0; i < cfgmax; i++)//Generate ChannelConfiguration from ansel register + { + adcon1->setChannelConfiguration(i, mask); + } + value.put(new_value & valid_bits); + adcon1->setADCnames(); +} + +ANSEL_P::ANSEL_P(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + adcon1(0), ansel(0), valid_bits(0x3f), cfg_mask(0) +{ +} + +void ANSEL_P::setAdcon1(ADCON1 *new_adcon1) +{ + adcon1 = new_adcon1; +} + +void ANSEL_P::put(uint new_value) +{ + uint cfgmax = adcon1->getMaxCfg(); + uint i; + uint mask; + uint chan = first_channel; + + new_value &= valid_bits; + value.put(new_value); + + cfg_mask = 0; + for(i=0; i< 8; i++) + { + if ((1<get_mask(); + + if (!adcon1) return; + //Generate ChannelConfiguration from ansel register + for(i=0; i < cfgmax; i++) + adcon1->setChannelConfiguration(i, mask); + + adcon1->setADCnames(); +} + +//------------------------------------------------------ +// ADCON0_10 +// +ADCON0_10::ADCON0_10(Processor *pCpu, const char *pName, const char *pDesc) + : ADCON0(pCpu, pName, pDesc) +{ + GO_bit = GO; //ADCON0 and ADCON0_10 have GO flag at different bit + // It should take 13 CPU instructions to complete conversion + // Tad of 6 completes in 15 + Tad = 6; +} + +void ADCON0_10::put(uint new_value) +{ + uint old_value=value.get(); + /* On first call of this function old_value has already been set to + * it's default value, but we want to call set_channel_in. First + * gives us a way to do this. + */ + static bool first = true; + + Dprintf(("ADCON0_10::put new_value=0x%02x old_value=0x%02x\n", new_value, old_value)); + + if ((new_value ^ old_value) & ANS0 || first) + adcon1->set_channel_in(0, (new_value & ANS0) == ANS0); + if ((new_value ^ old_value) & ANS1 || first ) + adcon1->set_channel_in(1, (new_value & ANS1) == ANS1); + + first = false; + + // If ADON is clear GO cannot be set + if ((new_value & ADON) != ADON) new_value &= ~GO_bit; + + // SET: Reflect it first! + value.put(new_value); + if(new_value & ADON) + { + // The A/D converter is being turned on (or maybe left on) + + if((new_value & ~old_value) & GO_bit) + { + // The 'GO' bit is being turned on, which is request to initiate + // and A/D conversion + start_conversion(); + } + } + else stop_conversion(); +} +//------------------------------------------------------ +// ADCON0_12F used in 12f675. Uses ADCON1 as virtual rather than physical +// register +// +ADCON0_12F::ADCON0_12F(Processor *pCpu, const char *pName, const char *pDesc) + : ADCON0(pCpu, pName, pDesc) +{ + GO_bit = GO; //ADCON0 and ADCON0_10 have GO flag at different bit + valid_bits = 0xdf; +} + +void ADCON0_12F::put(uint new_value) +{ + uint old_value=value.get(); + new_value &= valid_bits; // clear unused bits + /* On first call of this function old_value has already been set to + * it's default value, but we want to call set_channel_in. First + * gives us a way to do this. + */ + Dprintf(("ADCON0_12F::put new_value=0x%02x old_value=0x%02x\n", new_value, old_value)); + // tell adcon1 to use Vref + adcon1->set_cfg_index((new_value & VCFG) ? 2: 0); + + // If ADON is clear GO cannot be set + if ((new_value & ADON) != ADON) new_value &= ~GO_bit; + + // SET: Reflect it first! + value.put(new_value); + if(new_value & ADON) + { + // The A/D converter is being turned on (or maybe left on) + + if((new_value & ~old_value) & GO_bit) + { + // The 'GO' bit is being turned on, which is request to initiate + // and A/D conversion + start_conversion(); + } + } + else stop_conversion(); +} +ANSEL_12F::ANSEL_12F(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + adcon1(0) +{ +} + +void ANSEL_12F::set_tad(uint new_value) +{ + uint Tad = 6; + + switch(new_value & (ADCS0 | ADCS1)) + { + + case 0: + Tad = (new_value & ADCS2) ? 4 : 2; + break; + + case ADCS0: + Tad = (new_value & ADCS2) ? 16 : 8; + break; + + case ADCS1: + Tad = (new_value & ADCS2) ? 64 : 32; + break; + + case (ADCS0|ADCS1): // typical 4 usec, convert to osc cycles + if (cpu) + { + Tad = (uint)(4.e-6 * p_cpu->get_frequency()); + Tad = Tad < 2? 2 : Tad; + } + else + Tad = 6; + break; + } + Dprintf(("ANSEL_12F::set_tad %x Tad=%u\n", new_value, Tad)); + adcon0->set_Tad(Tad); + +} +void ANSEL_12F::put(uint new_value) +{ + uint cfgmax = adcon1->getNumberOfChannels(); + uint i; + uint mask; + + Dprintf(("ANSEL_12F::put %x cfgmax %u\n", new_value, cfgmax)); + //Generate ChannelConfiguration from ansel register + for(i=0; i < cfgmax; i++) + { + mask = new_value & 0x0f; + adcon1->setChannelConfiguration(i, mask); + } + //Convert A2D conversion times and set in adcon + set_tad(new_value & ( ADCS2 | ADCS1 | ADCS0)); + value.put(new_value & 0x7f); + adcon1->setADCnames(); +} + +//------------------------------------------------------ +// ADCON0_32X used in 10f32x. Uses ADCON1 as virtual rather than physical +// register +// +ADCON0_32X::ADCON0_32X(Processor *pCpu, const char *pName, const char *pDesc) + : ADCON0(pCpu, pName, pDesc) +{ + GO_bit = GO; //ADCON0 and ADCON0_10 have GO flag at different bit + valid_bits = 0xff; +} + +void ADCON0_32X::put(uint new_value) +{ + uint old_value=value.get(); + new_value &= valid_bits; // clear unused bits + /* On first call of this function old_value has already been set to + * it's default value, but we want to call set_channel_in. First + * gives us a way to do this. + */ + Dprintf(("ADCON0_32X::put new_value=0x%02x old_value=0x%02x\n", new_value, old_value)); + // tell adcon1 to use Vref + //RRR adcon1->set_cfg_index((new_value & VCFG) ? 2: 0); + + switch(new_value & (ADCS0|ADCS1|ADCS2)) + { + case (ADCS0|ADCS1): + case 0: + Tad = 2; + break; + + case ADCS0: + Tad = 8; + break; + + case ADCS1: + Tad = 32; + break; + } + if (new_value & ADCS2) Tad *= 2; + + // If ADON is clear GO cannot be set + if ((new_value & ADON) != ADON) new_value &= ~GO_bit; + + // SET: Reflect it first! + value.put(new_value); + if(new_value & ADON) { + // The A/D converter is being turned on (or maybe left on) + + if((new_value & ~old_value) & GO_bit) + { + // The 'GO' bit is being turned on, which is request to initiate + // and A/D conversion + start_conversion(); + } + } + else stop_conversion(); +} +// catch stimulus and set channel voltage +// +a2d_stimulus::a2d_stimulus(ADCON1 * arg, int chan, const char *cPname,double _Vth, double _Zth) + : stimulus(cPname, _Vth, _Zth) +{ + _adcon1 = arg; + channel = chan; +} + +void a2d_stimulus::set_nodeVoltage(double v) +{ + Dprintf(("nodeVoltage =%.1f\n", v)); + nodeVoltage = v; + _adcon1->setVoltRef(channel, v); +} +// +//-------------------------------------------------- +// member functions for the FVRCON class +//-------------------------------------------------- +// +FVRCON::FVRCON(Processor *pCpu, const char *pName, const char *pDesc, uint bitMask, uint alwaysOne) + : sfr_register(pCpu, pName, pDesc), + adcon1(0), daccon0(0), cmModule(0), cpscon0(0) +{ + mask_writable = bitMask; + always_one = alwaysOne; +} + +void FVRCON::put(uint new_value) +{ + uint masked_value = (new_value & mask_writable) | always_one; + + value.put(masked_value); + compute_VTemp(masked_value); + compute_FVR_AD(masked_value); + compute_FVR_CDA(masked_value); +} + +void FVRCON::put_value(uint new_value) +{ + uint masked_value = (new_value & mask_writable) | always_one; + put(masked_value); + + update(); +} + + +double FVRCON::compute_VTemp(uint fvrcon) +{ + double ret = -1.; + double Vt; //Transister junction threshold voltage at core temperature + + if((fvrcon & TSEN) && cpu14->m_cpu_temp) + { + Vt = 0.659 - ( cpu14->m_cpu_temp->getVal() + 40.) * 0.00132; + ret = ((Processor *)cpu)->get_Vdd() - ((fvrcon&TSRNG)?4.:2.) * Vt; + if (ret < 0.0) + { + ret = -1.; + cerr << "Warning FVRCON Vdd too low for temperature range\n"; + } + } + if(adcon1) adcon1->setVoltRef(VTemp_AD_chan, ret); + return ret; +} + +double FVRCON::compute_FVR_AD(uint fvrcon) +{ + double ret = -1.; + uint gain = (fvrcon & (ADFVR0|ADFVR1)); + + if ((fvrcon & FVREN) && gain) + ret = 1.024 * (1 << (gain - 1)); + if (ret > ((Processor *)cpu)->get_Vdd()) + { + cerr << "warning FVRCON FVRAD > Vdd\n"; + ret = -1.0; + } + if(adcon1)adcon1->setVoltRef(FVRAD_AD_chan, ret); + return ret; +} + +double FVRCON::compute_FVR_CDA(uint fvrcon) +{ + double ret = 0.0; + uint gain = (fvrcon & (CDAFVR0|CDAFVR1))>>2; + + if ((fvrcon & FVREN) && gain) ret = 1.024 * (1 << (gain - 1)); + + for (uint i= 0; i < daccon0_list.size(); i++) + daccon0_list[i]->set_FVR_CDA_volt(ret); + + if(cmModule) cmModule->set_FVR_volt(ret); + if(cpscon0) cpscon0->set_FVR_volt(ret); + return ret; +} +// +//-------------------------------------------------- +// member functions for the DAC classes +//-------------------------------------------------- +// +DACCON0::DACCON0(Processor *pCpu, const char *pName, const char *pDesc, uint bitMask, uint bit_res) + : sfr_register(pCpu, pName, pDesc), + adcon1(0), cmModule(0), cpscon0(0), + bit_mask(bitMask), bit_resolution(bit_res), + FVR_CDA_volt(0.) +{ + Pin_Active[0] = false; + Pin_Active[1] = false; +} + +void DACCON0::put(uint new_value) +{ + uint masked_value = (new_value & bit_mask); + + value.put(masked_value); + compute_dac(masked_value); +} + +void DACCON0::put_value(uint new_value) +{ + uint masked_value = (new_value & bit_mask); + value.put(masked_value); + compute_dac(masked_value); + + update(); +} + +void DACCON0::set_dcaccon1_reg(uint reg) +{ + daccon1_reg = reg; + compute_dac(value.get()); +} + +void DACCON0::compute_dac(uint value) +{ + double Vhigh = get_Vhigh(value); + double Vlow = 0.; + double Vout; + + if(value & DACEN) // DAC is enabled + { + // Max Vout will be 1 step below Vhigh. + Vout = (Vhigh - Vlow) * daccon1_reg/bit_resolution + Vlow; + } + else if (value & DACLPS) Vout = Vhigh; + else Vout = Vlow; + + set_dacoutpin(value & DACOE, 0, Vout); + set_dacoutpin(value & DACOE2, 1, Vout); + + Dprintf(("DAC DACEN %d output %.2f adcon1=%p Vhigh %.2f bit_res %u daccon1_reg %u\n", (bool)(value & DACEN), Vout, adcon1, Vhigh, bit_resolution, daccon1_reg)); + if(adcon1) adcon1->setVoltRef(FVRCDA_AD_chan, Vout); + if(cmModule) cmModule->set_DAC_volt(Vout); + if(cpscon0) cpscon0->set_DAC_volt(Vout); +} + +void DACCON0::set_dacoutpin(bool output_enabled, int chan, double Vout) +{ + IO_bi_directional_pu *out_pin; + + if (output_pin[chan]) + out_pin = (IO_bi_directional_pu *) &(output_pin[chan]->getPin()); + else + return; + + if (output_enabled) + { + if (!Pin_Active[chan]) // DACOUT going to active + { + std::string pin_name = name().substr(0, 4); + + if (pin_name == "dacc") pin_name = "dacout"; + else if (chan == 0) pin_name += "-1"; + else pin_name += "-2"; + + output_pin[chan]->AnalogReq(this, true, pin_name.c_str()); + Pin_Active[chan] = true; + Vth[chan] = out_pin->get_VthIn(); + Zth[chan] = out_pin->get_ZthIn(); + driving[chan] = out_pin->getDriving(); + out_pin->set_ZthIn(150e3); + out_pin->setDriving(false); + } + out_pin->set_VthIn(Vout); + out_pin->updateNode(); + } + else if (Pin_Active[chan]) // DACOUT leaving active + { + output_pin[chan]->AnalogReq(this, false, output_pin[chan]->getPin().name().c_str()); + Pin_Active[chan] = false; + out_pin->set_VthIn(Vth[chan]); + out_pin->set_ZthIn(Zth[chan]); + out_pin->setDriving(driving[chan]); + out_pin->updateNode(); + } +} + +double DACCON0::get_Vhigh(uint value) +{ + uint mode = (value & (DACPSS0|DACPSS1)) >> 2; + switch(mode) + { + case 0: // Vdd + return ((Processor *)cpu)->get_Vdd(); + + case 1: // Vref+ pin, get is from A2D setup + if(adcon1) + return(adcon1->getChannelVoltage(adcon1->getVrefHiChannel(0))); + cerr << "ERROR DACCON0 DACPSS=01b adcon1 not set\n"; + return 0.; + + case 2: // Fixed Voltage Reference + return FVR_CDA_volt; + + case 3: // Reserved value + cerr << "ERROR DACCON0 DACPSS=11b is reserved value\n"; + return 0.; + } + return 0.; // cant get here +} + +DACCON1::DACCON1(Processor *pCpu, const char *pName, const char *pDesc, uint bitMask, DACCON0 *_daccon0) + : sfr_register(pCpu, pName, pDesc), + bit_mask(bitMask), daccon0(_daccon0) +{ +} + +void DACCON1::put(uint new_value) +{ + put_value(new_value); +} + +void DACCON1::put_value(uint new_value) +{ + uint masked_value = (new_value & bit_mask); + value.put(masked_value); + Dprintf(("DAC daccon0=%p new_value 0x%x bit_mask 0x%x\n", daccon0, new_value, bit_mask)); + if (daccon0) daccon0->set_dcaccon1_reg(masked_value); + + update(); +} + +//------------------------------------------------------ +// ADCON2_diff for A2D with differential input ie 16f178* +// +ADCON2_DIF::ADCON2_DIF(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ +} + +#ifdef RRR +//------------------------------------------------------ +// ADCON0 +// +ADCON0_32::ADCON0_32(Processor *pCpu, const char *pName, const char *pDesc) + : ADCON0(pCpu, pName, pDesc) +{ +} + +void ADCON0_32::put(uint new_value) +{ + set_Tad(new_value); + + uint old_value=value.get(); + // SET: Reflect it first! + value.put(new_value); + if(new_value & ADON) + { + // The A/D converter is being turned on (or maybe left on) + + if((new_value & ~old_value) & GO_bit) + { + if (verbose) printf("starting A2D conversion\n"); + Dprintf(("starting A2D conversion\n")); + // The 'GO' bit is being turned on, which is request to initiate + // and A/D conversion + start_conversion(); + } + } + else stop_conversion(); + +} +void ADCON0_32::put_conversion(void) +{ + + double dRefSep = m_dSampledVrefHi - m_dSampledVrefLo; + double dNormalizedVoltage; + double m_dSampledVLo; + + if (channel == 0x0e) // shift AN21 to adcon0 channel + channel = 0x15; + if (channel == 0x0f) // use ADNREF for V- + m_dSampledVLo = getVrefLo(); + else + m_dSampledVLo = getChannelVoltage(channel); + + dNormalizedVoltage = (m_dSampledVoltage - m_dSampledVLo)/dRefSep; + dNormalizedVoltage = dNormalizedVoltage>1.0 ? 1.0 : dNormalizedVoltage; + + int converted = (int)(m_A2DScale*dNormalizedVoltage + 0.5); + + Dprintf(("put_conversion: V+:%g V-:%g Vrefhi:%g Vreflo:%g conversion:%d normV:%g\n", + m_dSampledVoltage, m_dSampledVLo, + m_dSampledVrefHi,m_dSampledVrefLo,converted,dNormalizedVoltage)); + + if (verbose) printf ("result=0x%02x\n", converted); + + Dprintf(("%u-bit result 0x%x ADFM %d\n", m_nBits, converted, get_ADFM())); + + if(!get_ADFM()) // signed + { + int sign = 0; + if (converted < 0) + { + sign = 1; + converted = -converted; + } + converted = ((converted << (16-m_nBits)) % 0xffff) | sign; + } + adresl->put(converted & 0xff); + adres->put((converted >> 8) & 0xff); +} +#endif //RRR +//------------------------------------------------------ +// ADCON2_TRIG for A2D with start trigger ie 16f1503 +// +ADCON2_TRIG::ADCON2_TRIG(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), valid_bits(0xf0), m_adcon0(0) +{ +} + +void ADCON2_TRIG::put(uint new_value) +{ + new_value &= valid_bits; + put_value(new_value); +} + +void ADCON2_TRIG::setCMxsync(uint cm, bool output) +{ + uint select = value.get() >> 4; + printf("setCMxsync() %s cm=%u output=%d\n", name().c_str(), cm, output); + if (select) { } + assert(cm < 4); + CMxsync[cm] = output; +} + +void ADCON2_TRIG::t0_overflow() +{ + uint select = value.get() >> 4; + + if (select == 0x02) + { + if (m_adcon0 && (m_adcon0->value.get() & ADCON0::ADON)) + { + Dprintf(("trigger from timer 0\n")); + m_adcon0->start_conversion(); + } + } +} diff --git a/src/gpsim/modules/a2dconverter.h b/src/gpsim/modules/a2dconverter.h new file mode 100644 index 0000000..967c300 --- /dev/null +++ b/src/gpsim/modules/a2dconverter.h @@ -0,0 +1,712 @@ +/* + Copyright (C) 2006 T. Scott Dattalo + Copyright (C) 2009, 2013, 2015 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __A2DCONVERTER_H__ +#define __A2DCONVERTER_H__ + +#include "registers.h" +#include "trigger.h" +#include "intcon.h" +#include "pir.h" +#include "comparator.h" + + +class DACCON0; +class PinModule; +class pic_processor; + +//--------------------------------------------------------- +// ADRES +// +/* +class ADRES : public sfr_register +{ +public: + + void put(int new_value); +}; +*/ + +/* + AD_IN_SignalControl is used to set an ADC pin as input + regardless of the setting to the TRIS register +*/ +class AD_IN_SignalControl : public SignalControl +{ +public: + AD_IN_SignalControl(){} + ~AD_IN_SignalControl(){} + char getState() { return '1'; } + void release() { } +}; +//--------------------------------------------------------- +// ADCON1 +// + +class ADCON1 : public sfr_register +{ +public: + + enum PCFG_bits + { + PCFG0 = 1<<0, + PCFG1 = 1<<1, + PCFG2 = 1<<2, + PCFG3 = 1<<3, // 16f87x etc. + VCFG0 = 1<<4, // 16f88 + VCFG1 = 1<<5, // 16f88 + ADCS2 = 1<<6, + ADFM = 1<<7 // Format Result select bit + }; + + ADCON1(Processor *pCpu, const char *pName, const char *pDesc); + ~ADCON1(); + + virtual void put(uint new_value); + virtual void put_value(uint new_value); + void setChannelConfiguration(uint cfg, uint bitMask); + void setVrefLoConfiguration(uint cfg, uint channel); + void setVrefHiConfiguration(uint cfg, uint channel); + uint getVrefHiChannel(uint cfg); + uint getVrefLoChannel(uint cfg); + + double getChannelVoltage(uint channel); + virtual double getVrefHi(); + virtual double getVrefLo(); + + void setValidCfgBits(uint m, uint s); + void setNumberOfChannels(uint); + uint getNumberOfChannels() { return(m_nAnalogChannels);} + void setIOPin(uint, PinModule *); + void setVoltRef(uint, float); + int get_cfg(uint); + virtual uint get_adc_configmask(uint); + virtual void set_cfg_index(uint index) { cfg_index = index;} + + void set_channel_in(uint channel, bool on); + void setADCnames(); + void setValidBits(uint mask) { valid_bits = mask;} + bool getADFM() { return adfm;} + uint getMaxCfg() { return cMaxConfigurations;} + + + + +protected: + + uint valid_bits; + bool adfm; + PinModule **m_AnalogPins; + float *m_voltageRef; + uint m_nAnalogChannels; + uint mValidCfgBits; + uint mCfgBitShift; + uint mIoMask; + uint cfg_index; + + static const uint cMaxConfigurations=16; + + /* Vrefhi/lo_position - this is an array that tells which + * channel the A/D converter's voltage reference(s) are located. + * The index into the array is formed from the PCFG bits. + * The encoding is as follows: + * 0-7: analog channel containing Vref(s) + * 8: The reference is internal (i.e. Vdd) + * 0xff: The analog inputs are configured as digital inputs + */ + uint Vrefhi_position[cMaxConfigurations]; + uint Vreflo_position[cMaxConfigurations]; + + /* configuration bits is an array of 8-bit masks definining whether or not + * a given channel is analog or digital + */ + uint m_configuration_bits[cMaxConfigurations]; + + // used bt setControl to set pin direction as input + AD_IN_SignalControl *m_ad_in_ctl; +}; + +class ADCON0; +//--------------------------------------------------------- +// ADCON1_16F +// + +class ADCON1_16F : public ADCON1 +{ +public: + + enum + { + ADPREF0 = (1<<0), + ADPREF1 = (1<<1), + ADNREF = (1<<2), + ADCS0 = (1<<4), + ADCS1 = (1<<5), + ADCS2 = (1<<6), + ADFM = (1<<7) + }; + + ADCON1_16F(Processor *pCpu, const char *pName, const char *pDesc); + virtual void put_value(uint new_value); + void setAdcon0 (ADCON0 *_adcon0) {adcon0 = _adcon0;} + virtual double getVrefHi(); + virtual double getVrefLo(); + void set_FVR_chan(uint chan) { FVR_chan = chan;} + +private: + ADCON0 *adcon0; + uint FVR_chan; +}; + + +//--------------------------------------------------------- +// ADCON0 +// + +class ADCON0 : public sfr_register, public TriggerObject +{ +public: + + enum + { + ADON = 1<<0, + ADIF = 1<<1, + GO = 1<<2, + CHS0 = 1<<3, + CHS1 = 1<<4, + CHS2 = 1<<5, + ADCS0 = 1<<6, + ADCS1 = 1<<7, + + }; + + enum AD_states + { + AD_IDLE, + AD_ACQUIRING, + AD_CONVERTING + }; + + ADCON0(Processor *pCpu, const char *pName, const char *pDesc); + + void start_conversion(); + void stop_conversion(); + virtual void set_interrupt(); + virtual void callback(); + void put(uint new_value); + virtual void put_conversion(); + + bool getADIF() { return (value.get() & ADIF) != 0; } + void setAdres(sfr_register *); + void setAdresLow(sfr_register *); + void setAdcon1(ADCON1 *); + void setIntcon(INTCON *); + virtual void setPir(PIR *); + void setA2DBits(uint); + void setChannel_Mask(uint ch_mask) { channel_mask = ch_mask; } + void setChannel_shift(uint ch_shift) { channel_shift = ch_shift; } + void setGo(uint go) { GO_bit = (1 << go); } + virtual bool get_ADFM() { return adcon1->getADFM(); } + virtual void set_Tad(uint); + + virtual double getChannelVoltage(uint channel) + { return( adcon1->getChannelVoltage(channel)); } + + virtual double getVrefHi() + {return(m_dSampledVrefHi = adcon1->getVrefHi());} + + virtual double getVrefLo() + { return (m_dSampledVrefLo = adcon1->getVrefLo());} + + void setValidBits(uint mask) { valid_bits = mask;} + + +private: + + friend class ADCON0_10; + friend class ADCON0_12F; + friend class ADCON0_32X; + friend class ADCON0_DIF; + + sfr_register *adres; + sfr_register *adresl; + ADCON1 *adcon1; + INTCON *intcon; + PIR *m_pPir; + + double m_dSampledVoltage; + double m_dSampledVrefHi; + double m_dSampledVrefLo; + uint m_A2DScale; + uint m_nBits; + uint64_t future_cycle; + uint ad_state; + uint Tad; + uint channel_mask; + uint channel_shift; + uint GO_bit; + uint valid_bits; +}; + + +class ADCON0_91X : public ADCON0 +{ +public: + enum + { + ADON = 1<<0, + GO = 1<<1, + CHS0 = 1<<2, + CHS1 = 1<<3, + CHS2 = 1<<4, + VCFG0 = 1<<5, // P16f91x + VCFG1 = 1<<6, // P16f91x + ADFM = 1<<7, // P16f91x + + }; + + ADCON0_91X(Processor *pCpu, const char *pName, const char *pDesc) : ADCON0(pCpu, pName, pDesc){}; + virtual bool get_ADFM() { return value.get() & ADFM; } + virtual double getVrefHi(); + virtual double getVrefLo(); + + uint Vrefhi_position = 0; + uint Vreflo_position = 0; +}; + +class ADCON2_DIF; +/* A/D converter with 12 or 10 bit differential input with ADCON2 + 32 possible input channels + */ + +class ADCON0_DIF : public ADCON0 +{ + enum + { + ADON = 1<<0, + GO = 1<<1, + CHS0 = 1<<2, + CHS1 = 1<<3, + CHS2 = 1<<4, + CHS3 = 1<<5, + CHS4 = 1<<6, + ADRMD = 1<<7 + }; +public: + ADCON0_DIF(Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + virtual void put_conversion(void); + void setAdcon2(ADCON2_DIF * _adcon2) { adcon2 = _adcon2;} + +private: + ADCON2_DIF *adcon2; + +}; +//--------------------------------------------------------- +// ADCON0_10 register for 10f22x A2D +// + +class ADCON0_10 : public ADCON0 +{ +public: + + enum + { + ADON = 1<<0, + GO = 1<<1, + CHS0 = 1<<2, + CHS1 = 1<<3, + ANS0 = 1<<6, + ANS1 = 1<<7 + }; + void put(uint new_value); + ADCON0_10(Processor *pCpu, const char *pName, const char *pDesc); +private: + AD_IN_SignalControl ad_pin_input; +}; +//--------------------------------------------------------- +// ANSEL +// + +class ANSEL_H; + +class ANSEL : public sfr_register +{ +public: + enum + { + ANS0 = 1 << 0, + ANS1 = 1 << 1, + ANS2 = 1 << 2, + ANS3 = 1 << 3, + ANS4 = 1 << 4, + ANS5 = 1 << 5, + ANS6 = 1 << 6, + ANS7 = 1 << 7 + }; + + ANSEL(Processor *pCpu, const char *pName, const char *pDesc); + + void setAdcon1(ADCON1 *new_adcon1); + void setAnselh(ANSEL_H *new_anselh) { anselh = new_anselh;} + void put(uint new_val); + void setValidBits(uint mask) { valid_bits = mask;} + +private: + ADCON1 *adcon1; + ANSEL_H *anselh; + uint valid_bits; +}; +//--------------------------------------------------------- +// ANSEL_H +// + +class ANSEL_H : public sfr_register +{ +public: + enum + { + ANS8 = 1 << 0, + ANS9 = 1 << 1, + ANS10 = 1 << 2, + ANS11 = 1 << 3, + ANS12 = 1 << 4, + ANS13 = 1 << 5, + }; + + ANSEL_H(Processor *pCpu, const char *pName, const char *pDesc); + + void setAdcon1(ADCON1 *new_adcon1); + void setAnsel(ANSEL *new_ansel) { ansel = new_ansel;} + void put(uint new_val); + void setValidBits(uint mask) { valid_bits = mask;} + +private: + ADCON1 *adcon1; + ANSEL *ansel; + uint valid_bits; +}; + +// +// ANSEL_P is an analog select register associated +// with a port. +class ANSEL_P : public sfr_register +{ +public: + ANSEL_P(Processor *pCpu, const char *pName, const char *pDesc); + void setAdcon1(ADCON1 *new_adcon1); + void setAnsel(ANSEL_P *new_ansel) { ansel = new_ansel;} + void put(uint new_val); + void setValidBits(uint mask) { valid_bits = mask;} + void config(uint pins, uint first_chan) + { analog_pins = pins; first_channel = first_chan;} + uint get_mask() { return cfg_mask;} + +private: + ADCON1 *adcon1; + ANSEL_P *ansel; + uint valid_bits; // register bit mask + uint analog_pins; // bit map of analog port pins + uint first_channel; // channel number for LSB of analog_pins + uint cfg_mask; // A2D mask this port only +}; +//--------------------------------------------------------- +// ADCON0_12F register for 12f675 A2D +// + +class ADCON0_12F : public ADCON0 +{ +public: + + enum + { + ADON = 1<<0, + GO = 1<<1, + CHS0 = 1<<2, + CHS1 = 1<<3, + CHS2 = 1<<4, + VCFG = 1<<6, + ADFM = 1<<7 + }; + void put(uint new_value); + virtual bool get_ADFM() { return(value.get() & ADFM); } + virtual void set_Tad(uint _tad) { Tad = _tad; } + ADCON0_12F(Processor *pCpu, const char *pName, const char *pDesc); +private: + AD_IN_SignalControl ad_pin_input; +}; +//--------------------------------------------------------- +// ADCON0_32X register for 10f320 A2D +// + +class ADCON0_32X : public ADCON0 +{ +public: + + enum + { + ADON = 1<<0, + GO = 1<<1, + CHS0 = 1<<2, + CHS1 = 1<<3, + CHS2 = 1<<4, + ADCS0 = 1<<5, + ADCS1 = 1<<6, + ADCS2 = 1<<7, + }; + void put(uint new_value); + ADCON0_32X(Processor *pCpu, const char *pName, const char *pDesc); +private: + AD_IN_SignalControl ad_pin_input; +}; +//--------------------------------------------------------- +// ANSEL_12F +// + +class ANSEL_12F : public sfr_register +{ +public: + enum + { + ANS0 = 1 << 0, + ANS1 = 1 << 1, + ANS2 = 1 << 2, + ANS3 = 1 << 3, + ADCS0 = 1 << 4, + ADCS1 = 1 << 5, + ADCS2 = 1 << 6 + }; + + ANSEL_12F(Processor *pCpu, const char *pName, const char *pDesc); + + void setAdcon0(ADCON0_12F *new_adcon0) { adcon0 = new_adcon0; } + void setAdcon1(ADCON1 *new_adcon1) { adcon1 = new_adcon1; } + void put(uint new_val); + void set_tad(uint); + +private: + ADCON1 *adcon1; + ADCON0_12F *adcon0; +}; +// set voltage from stimulus +class a2d_stimulus : public stimulus +{ + public: + + a2d_stimulus(ADCON1 *arg, int chan, const char *n=0, + double _Vth=0.0, double _Zth=1e12 + ); + + ADCON1 *_adcon1; + int channel; + + virtual void set_nodeVoltage(double v); + +}; + + +//--------------------------------------------------------- +// FVRCON register for Fixed Voltage Reference +// + + +class FVRCON : public sfr_register +{ +public: + + enum + { + ADFVR0 = 1<<0, + ADFVR1 = 1<<1, + CDAFVR0 = 1<<2, + CDAFVR1 = 1<<3, + TSRNG = 1<<4, + TSEN = 1<<5, + FVRRDY = 1<<6, + FVREN = 1<<7, + }; + FVRCON(Processor *, const char *pName, const char *pDesc=0, uint bitMask= 0xff, uint alwaysOne = 0); + virtual void put(uint new_value); + virtual void put_value(uint new_value); + void set_adcon1(ADCON1 *_adcon1) { adcon1 = _adcon1;} + void set_cmModule(ComparatorModule2 *_cmModule) { cmModule = _cmModule;} + void set_daccon0(DACCON0 *_daccon0) { daccon0_list.push_back(_daccon0);} + void set_cpscon0(CPSCON0 *_cpscon0) { cpscon0 = _cpscon0;} + void set_VTemp_AD_chan(uint _chan) {VTemp_AD_chan = _chan;} + void set_FVRAD_AD_chan(uint _chan) {FVRAD_AD_chan = _chan;} +private: + double compute_VTemp(uint); //Voltage of core temperature setting + double compute_FVR_AD(uint); //Voltage reference for ADC + double compute_FVR_CDA(uint); //Voltage reference for Comparators, DAC, CPS + ADCON1 *adcon1; + DACCON0 *daccon0; + vector daccon0_list; + ComparatorModule2 *cmModule; + CPSCON0 *cpscon0; + uint VTemp_AD_chan; + uint FVRAD_AD_chan; + uint mask_writable; + uint always_one; // bits in register that are always 1 +}; + + +// +// DAC module +// + +class DACCON1; +class DACCON0 : public sfr_register +{ +public: + enum + { + DACNSS = (1<<0), // Negative source select bit (18f26k22) + DACPSS0 = (1<<2), + DACPSS1 = (1<<3), + DACOE2 = (1<<4), + DACOE = (1<<5), + DACLPS = (1<<6), + DACEN = (1<<7), + }; + + DACCON0(Processor *, const char *pName, const char *pDesc=0, uint bitMask= 0xe6, uint bit_res = 32); + virtual void put(uint new_value); + virtual void put_value(uint new_value); + virtual void set_adcon1(ADCON1 *_adcon1) { adcon1 = _adcon1;} + void set_cpscon0(CPSCON0 *_cpscon0) { cpscon0 = _cpscon0;} + void set_cmModule(ComparatorModule2 *_cmModule) { cmModule = _cmModule;} + void set_FVRCDA_AD_chan(uint _chan) {FVRCDA_AD_chan = _chan;} + void set_dcaccon1_reg(uint reg); + void set_FVR_CDA_volt(double volt) { FVR_CDA_volt = volt;} + void setDACOUT(PinModule *pin1, PinModule *pin2 = NULL) + { output_pin[0] = pin1; output_pin[1] = pin2;} + virtual void compute_dac(uint value); + virtual double get_Vhigh(uint value); + +protected: + void set_dacoutpin(bool output_enabled, int chan, double Vout); + ADCON1 *adcon1; + ComparatorModule2 *cmModule; + vector cmModule_list; + CPSCON0 *cpscon0; + uint FVRCDA_AD_chan; + uint bit_mask; + uint bit_resolution; + uint daccon1_reg; + double FVR_CDA_volt; + bool Pin_Active[2]; + double Vth[2]; + double Zth[2]; + bool driving[2]; + PinModule *output_pin[2]; + IOPIN *pin; + +}; + +class DACCON1 : public sfr_register +{ +public: + DACCON1(Processor *, const char *pName, const char *pDesc=0, uint bitMask= 0x1f, DACCON0 *_daccon0 = 0); + virtual void put(uint new_value); + virtual void put_value(uint new_value); + void set_daccon0(DACCON0 *_daccon0) { daccon0 = _daccon0;} + +private: + uint bit_mask; + DACCON0 *daccon0; +}; +// Differential input and trigger conversion start +class ADCON2_DIF : public sfr_register, public TriggerObject +{ +public: + + enum + { + CHSNS0 = 1<<0, + CHSNS1 = 1<<1, + CHSNS2 = 1<<2, + CHSNS3 = 1<<3, + TRIGSEL0 = 1<<4, + TRIGSEL1 = 1<<5, + TRIGSEL2 = 1<<6, + TRIGSEL3 = 1<<7, + }; + + + ADCON2_DIF(Processor *pCpu, const char *pName, const char *pDesc); + +private: + + +}; + +#ifdef RRR +// A2D up to 32 channels +class ADCON0_32 : public ADCON0 +{ + enum + { + ADON = 1<<0, + GO = 1<<1, + CHS0 = 1<<2, + CHS1 = 1<<3, + CHS2 = 1<<4, + CHS3 = 1<<5, + CHS4 = 1<<6, + }; +public: + ADCON0_32(Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + virtual void put_conversion(void); + +private: + +}; +#endif //RRR +// Trigger conversion start (16f1503) +class ADCON2_TRIG : public sfr_register +{ +public: + + enum + { + TRIGSEL0 = 1<<4, + TRIGSEL1 = 1<<5, + TRIGSEL2 = 1<<6, + TRIGSEL3 = 1<<7, + }; + + + ADCON2_TRIG(Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + void setValidBits(uint mask) { valid_bits = mask;} + void setAdcon0(ADCON0 *_adcon0) { m_adcon0 = _adcon0; } + void setCMxsync(uint cm, bool output); + void t0_overflow(); + +private: + uint valid_bits; + bool CMxsync[4]; + ADCON0 *m_adcon0; + + +}; +#endif // __A2DCONVERTER_H__ diff --git a/src/gpsim/modules/clc.cc b/src/gpsim/modules/clc.cc new file mode 100644 index 0000000..2ce1143 --- /dev/null +++ b/src/gpsim/modules/clc.cc @@ -0,0 +1,1325 @@ +/* + Copyright (C) 2017 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +// CONFIGURABLE LOGIC CELL (CLC) + +//#define DEBUG +#if defined(DEBUG) +#include "config.h" +#define Dprintf(arg) {printf("%s:%d ",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +#include "pic-processor.h" +#include "clc.h" +#include "nco.h" + + // Report state changes on incoming INx pins +class INxSignalSink:public SignalSink +{ + public: + INxSignalSink (CLC * _clc, int _index):m_clc (_clc), index (_index) + { + } + + virtual void setSinkState (char new3State) + { + m_clc->setState (new3State, index); + } + virtual void release () + { + delete this; + } + private: + CLC * m_clc; + int index; +}; + +class CLCSigSource:public SignalControl +{ + public: + CLCSigSource (CLC * _clc, PinModule * _pin):m_clc (_clc), + m_state ('?'), m_pin (_pin) + { + assert (m_clc); + } + virtual ~ CLCSigSource () + { + } + + void setState (char _state) + { + m_state = _state; + } + virtual char getState () + { + return m_state; + } + virtual void release () + { + m_clc->releasePinSource (m_pin); + } + + private: + CLC * m_clc; + char m_state; + PinModule *m_pin; +}; + + +void CLCxCON::put (uint new_value) +{ + new_value &= write_mask; + new_value |= (value.get () & ~write_mask); + uint diff = new_value ^ value.get (); + + value.put (new_value); + if (!diff) + return; + m_clc->update_clccon (diff); +} + +void CLCxPOL::put (uint new_value) +{ + new_value &= write_mask; + uint diff = new_value ^ value.get (); + + value.put (new_value); + if (!diff) + return; + m_clc->compute_gates (); +} + +CLCxSEL0::CLCxSEL0 (CLC * _clc, Processor * pCpu, const char *pName, + const char *pDesc): + sfr_register (pCpu, pName, pDesc), m_clc (_clc), write_mask (0x77) +{ + m_clc->D1S (0); + m_clc->D2S (0); +} + +void CLCxSEL0::put (uint new_value) +{ + new_value &= write_mask; + + uint diff = new_value ^ value.get (); + value.put (new_value); + if (diff & 0xf) + m_clc->D1S (new_value & 0xf); + if (diff & 0xf0) + m_clc->D2S ((new_value & 0xf0) >> 4); + if (diff && m_clc->CLCenabled ()) + m_clc->config_inputs (true); +} + +CLCxSEL1::CLCxSEL1 (CLC * _clc, Processor * pCpu, const char *pName, + const char *pDesc): + sfr_register (pCpu, pName, pDesc), m_clc (_clc), write_mask (0x77) +{ + m_clc->D3S (0); + m_clc->D4S (0); +} + +void CLCxSEL1::put (uint new_value) +{ + new_value &= write_mask; + + uint diff = new_value ^ value.get (); + value.put (new_value); + if (diff & 0xf) + m_clc->D3S (new_value & 0xf); + if (diff & 0xf0) + m_clc->D4S ((new_value & 0xf0) >> 4); + if (diff && m_clc->CLCenabled ()) + m_clc->config_inputs (true); +} + +void CLCxGLS0::put (uint new_value) +{ + uint diff = new_value ^ value.get (); + + value.put (new_value); + if (!diff) + return; + if (m_clc->CLCenabled ()) + m_clc->config_inputs (true); + m_clc->compute_gates (); +} + +void CLCxGLS1::put (uint new_value) +{ + uint diff = new_value ^ value.get (); + + value.put (new_value); + if (!diff) + return; + if (m_clc->CLCenabled ()) + m_clc->config_inputs (true); + m_clc->compute_gates (); +} + +void CLCxGLS2::put (uint new_value) +{ + uint diff = new_value ^ value.get (); + + value.put (new_value); + if (!diff) return; + if (m_clc->CLCenabled ()) + m_clc->config_inputs (true); + m_clc->compute_gates (); +} + +void CLCxGLS3::put (uint new_value) +{ + uint diff = new_value ^ value.get (); + + value.put (new_value); + if (!diff) return; + + if (m_clc->CLCenabled ()) + m_clc->config_inputs (true); + m_clc->compute_gates (); +} + +// CLCx calls to set it's LCx_OUT bit, result shared with +// all CLCx instances. +void CLCDATA::set_bit (bool bit_val, uint pos) +{ + Dprintf (("set_bit LC%u_OUT %d\n", pos + 1, bit_val)); + + if (bit_val) value.put (value.get () | (1 << pos)); + else value.put (value.get () & ~(1 << pos)); + + for (int i = 0; i < 4; i++) + if (m_clc[i]) m_clc[i]->lcxupdate (bit_val, pos);; +} + + +CLC::CLC (Processor * cpu, uint _index, CLCDATA * _clcdata): + index (_index), + clcxcon (this, cpu, "clcxcon", "Configurable Logic Cell Control Register"), + clcxpol (this, cpu, "clcxpol", "Configurable Logic Cell Signal Polarity"), + clcxsel0 (this, cpu, "clcxsel0", "Multiplexer Data 1 and 2 Select Register"), + clcxsel1 (this, cpu, "clcxsel1", "Multiplexer Data 3 and 4 Select Register"), + clcxgls0 (this, cpu, "clcxgls0", "Gate 1 Logic Select Register"), + clcxgls1 (this, cpu, "clcxgls1", "Gate 2 Logic Select Register"), + clcxgls2 (this, cpu, "clcxgls2", "Gate 3 Logic Select Register"), + clcxgls3 (this, cpu, "clcxgls3", "Gate 4 Logic Select Register"), + clcdata (_clcdata), + p_nco (0), pinCLCx (0), CLCxsrc (0), srcCLCxactive (false), + frc_level (false), NCO_level (false), m_Interrupt (0), Doutput (false), + Dclock (false), FRCactive (false), LFINTOSCactive (false), + HFINTOSCactive (false) +{ + for (int i = 0; i < 2; i++) + { + INxsink[i] = 0; + INxactive[i] = 0; + INxstate[i] = false; + } + for (int i = 0; i < 4; i++) + { + CMxOUT_level[i] = false; + pwmx_level[i] = false; + lcxdT[i] = false; + lcxg[i] = false; + } +} + +CLC::~CLC () +{ + if (CLCxsrc) + { + delete CLCxsrc; + CLCxsrc = 0; + } +} + +void CLC::setIOpin(int data, PinModule *pin) +{ + if (data == CLCout_PIN) setCLCxPin(pin); + else fprintf(stderr, "CLC::setIOpin data=%d not supported\n", data); +} + +// Handle output pin multiplexing +void CLC::setCLCxPin (PinModule * alt_pin) +{ + if (alt_pin != pinCLCx) + { + oeCLCx (false); + pinCLCx = alt_pin; + oeCLCx (true); + } +} + +void CLC::D1S (int select) +{ + switch (select) + { + case 0: + DxS_data[0] = CLCxIN0; + break; + + case 1: + DxS_data[0] = CLCxIN1; + break; + + case 2: + DxS_data[0] = C1OUT; + break; + + case 3: + DxS_data[0] = C2OUT; + break; + + case 4: + DxS_data[0] = FOSCLK; + break; + + case 5: + DxS_data[0] = T0_OVER; + break; + + case 6: + DxS_data[0] = T1_OVER; + break; + + case 7: + DxS_data[0] = T2_MATCH; + break; + } +} + +void CLC::D2S (int select) +{ + switch (select) + { + case 0: + DxS_data[1] = FOSCLK; + break; + + case 1: + DxS_data[1] = T0_OVER; + break; + + case 2: + DxS_data[1] = T1_OVER; + break; + + case 3: + DxS_data[1] = T2_MATCH; + break; + + case 4: + DxS_data[1] = LC1; + break; + + case 5: + DxS_data[1] = LC2; + break; + + case 6: + DxS_data[1] = UNUSED; + break; + + case 7: + DxS_data[1] = UNUSED; + break; + + } +} + +void CLC::D3S (int select) +{ + switch (select) + { + case 0: + DxS_data[2] = LC1; + break; + + case 1: + DxS_data[2] = LC2; + break; + + case 2: + DxS_data[2] = UNUSED; + break; + + case 3: + DxS_data[2] = UNUSED; + break; + + case 4: + DxS_data[2] = (index) ? LFINTOSC : NCOx; + break; + + case 5: + DxS_data[2] = (index) ? FRC_IN : HFINTOSC; + break; + + case 6: + DxS_data[2] = (index) ? PWM1 : PWM3; + break; + + case 7: + DxS_data[2] = (index) ? PWM2 : PWM4; + break; + } +} + +void CLC::D4S (int select) +{ + switch (select) + { + case 0: + DxS_data[3] = (index) ? LFINTOSC : NCOx; + break; + + case 1: + DxS_data[3] = (index) ? FRC_IN : HFINTOSC; + break; + + case 2: + DxS_data[3] = (index) ? PWM1 : PWM3; + break; + + case 3: + DxS_data[3] = (index) ? PWM2 : PWM4; + break; + + case 4: + DxS_data[3] = CLCxIN0; + break; + + case 5: + DxS_data[3] = CLCxIN1; + break; + + case 6: + DxS_data[3] = C1OUT; + break; + + case 7: + DxS_data[3] = C2OUT; + break; + + } +} + +// Handle T0 overflow notification +void CLC::t0_overflow () +{ + bool gate_change = false; + for (int i = 0; i < 4; i++) + { + if (DxS_data[i] == T0_OVER) + { + lcxdT[i] = true; + gate_change = true; + } + } + if (gate_change) + { + Dprintf (("CLC%u t0_overflow() enable=%d\n", index + 1, + CLCenabled ())); + compute_gates (); + for (int i = 0; i < 4; i++) + { + if (DxS_data[i] == T0_OVER) + lcxdT[i] = false; + } + compute_gates (); + } +} + +// Handle T1 overflow notification +void CLC::t1_overflow () +{ + bool gate_change = false; + for (int i = 0; i < 4; i++) + { + if (DxS_data[i] == T1_OVER) + { + lcxdT[i] = true; + gate_change = true; + } + } + if (gate_change) + { + Dprintf (("CLC%u t1_overflow() enable=%d\n", index + 1, + CLCenabled ())); + compute_gates (); + for (int i = 0; i < 4; i++) + { + if (DxS_data[i] == T1_OVER) + lcxdT[i] = false; + } + compute_gates (); + } +} + +// Handle T2 match notification +void CLC::t2_match () +{ + bool gate_change = false; + for (int i = 0; i < 4; i++) + { + if (DxS_data[i] == T2_MATCH) + { + lcxdT[i] = true; + gate_change = true; + } + } + if (gate_change) + { + Dprintf (("CLC%u t2_match() enable=%d\n", index + 1, CLCenabled ())); + compute_gates (); + for (int i = 0; i < 4; i++) + { + if (DxS_data[i] == T2_MATCH) + lcxdT[i] = false; + } + compute_gates (); + } +} + +// Handle updates for frc or lfintosc +void CLC::osc_out (bool level, int kind) +{ + bool gate_change = false; + + for (int i = 0; i < 4; i++) + { + if (DxS_data[i] == kind && lcxdT[i] != level) + { + lcxdT[i] = level; + gate_change = true; + } + } + if (gate_change) + { + Dprintf (("CLC%u osc_out() kind=%d level=%d enable=%d\n", index + 1, + kind, level, CLCenabled ())); + compute_gates (); + } +} + +// Handle updates for NCO module +void CLC::NCO_out (bool level) +{ + if (NCO_level != level) + { + bool gate_change = false; + NCO_level = level; + + for (int i = 0; i < 4; i++) + { + if (DxS_data[i] == NCOx) + { + lcxdT[i] = level; + gate_change = true; + } + } + if (gate_change) + { + Dprintf (("CLC%u NCO_out() level=%d enable=%d\n", index + 1, + level, CLCenabled ())); + compute_gates (); + } + } +} + +// Handle updates from comparator module +void CLC::CxOUT_sync (bool level, int cm) +{ + if (CMxOUT_level[cm] != level) + { + bool gate_change = false; + CMxOUT_level[cm] = level; + for (int i = 0; i < 4; i++) + { + if ((DxS_data[i] == C1OUT && cm == 0) || + (DxS_data[i] == C2OUT && cm == 1)) + { + lcxdT[i] = level; + gate_change = true; + } + } + + if (gate_change) + { + Dprintf (("CLC%u C%dOUT_sync() level=%d enable=%d\n", index + 1, + cm + 1, level, CLCenabled ())); + compute_gates (); + } + } +} + +// Handle updates from pwm module +void CLC::out_pwm (bool level, int id) +{ + Dprintf (("CLC%u out_pwm() pwm%d level=%d enable=%d\n", index + 1, id + 1, + level, CLCenabled ())); + if (pwmx_level[id] != level) + { + bool gate_change = false; + pwmx_level[id] = level; + for (int i = 0; i < 4; i++) + { + if ((DxS_data[i] == PWM1 && id == 0) || + (DxS_data[i] == PWM2 && id == 1) || + (DxS_data[i] == PWM3 && id == 2) || + (DxS_data[i] == PWM4 && id == 3)) + { + lcxdT[i] = level; + gate_change = true; + } + } + if (gate_change) + { + Dprintf (("CLC%u out_pwm() pwm%d level=%d enable=%d\n", + index + 1, id + 1, level, CLCenabled ())); + compute_gates (); + } + } +} + +// notification on CLCxIN[12] +void CLC::setState (char new3State, int id) +{ + bool state = (new3State == '1' || new3State == 'W'); + if (state != INxstate[id]) + { + bool gate_change = false; + INxstate[id] = state; + for (int i = 0; i < 4; i++) + { + if ((DxS_data[i] == CLCxIN0 && id == 0) || + (DxS_data[i] == CLCxIN1 && id == 1)) + { + lcxdT[i] = state; + gate_change = true; + } + } + + if (gate_change) + { + Dprintf (("CLC%u setState() IN%d level=%d enable=%d\n", + index + 1, id, state, CLCenabled ())); + compute_gates (); + } + } +} + +// Enable/Disable input pin i +void CLC::enableINxpin (int i, bool on) +{ + if (on) + { + if (!INxactive[i]) + { + if( !INxsink[i]) INxsink[i] = new INxSignalSink (this, i); + + pinCLCxIN[i]->addSink (INxsink[i]); + setState (pinCLCxIN[i]->getPin ().getState ()? '1' : '0', i); + } + INxactive[i]++; + } + else if (!--INxactive[i]) + { + if (INxsink[i]) pinCLCxIN[i]->removeSink (INxsink[i]); + } +} + +// Enable/disable output pin +void CLC::oeCLCx (bool on) +{ + if (on) + { + if (!srcCLCxactive) + { + if (!CLCxsrc) CLCxsrc = new CLCSigSource (this, pinCLCx); + pinCLCx->setSource (CLCxsrc); + srcCLCxactive = true; + CLCxsrc->setState ((clcxcon.value.get () & LCxOE) ? '1' : '0'); + pinCLCx->updatePinModule (); + } + } + else if (srcCLCxactive) + { + pinCLCx->setSource (0); + if (CLCxsrc) + { + delete CLCxsrc; + CLCxsrc = 0; + } + srcCLCxactive = false; + pinCLCx->updatePinModule (); + } +} + +// Update the output value of each of the 4 Data Gates +// taking into account both input and output polarity +void CLC::compute_gates () +{ + bool gate_out; + uint glsx[] = + { clcxgls0.value.get (), clcxgls1.value.get (), + clcxgls2.value.get (), clcxgls3.value.get () }; + int mask; + uint pol = clcxpol.value.get (); + + for (int j = 0; j < 4; j++) + { + gate_out = false; + mask = 1; + for (int i = 0; i < 4; i++) + { + if (glsx[j] & mask) + { + gate_out = !lcxdT[i]; + } + mask <<= 1; + if (glsx[j] & mask) + { + gate_out = lcxdT[i]; + } + mask <<= 1; + } + gate_out = (pol & (1 << j)) ? !gate_out : gate_out; + lcxg[j] = gate_out; + } + if (CLCenabled ()) + Dprintf (("CLC::compute_gates CLC%u lcxdT = {%d %d %d %d} lcxg={%d %d %d %d}\n", index + 1, lcxdT[0], lcxdT[1], lcxdT[2], lcxdT[3], lcxg[0], lcxg[1], lcxg[2], lcxg[3])); + cell_function (); +} + +// Select and execute cell functions +void CLC::cell_function () +{ + bool out = false; + uint con = clcxcon.value.get (); + uint pol = clcxpol.value.get (); + switch (con & 0x7) + { + case 0: // AND-OR + out = (lcxg[0] && lcxg[1]) || (lcxg[2] && lcxg[3]); + break; + + case 1: // OR-XOR + out = (lcxg[0] || lcxg[1]) ^ (lcxg[2] || lcxg[3]); + break; + + case 2: // 4 input AND + out = lcxg[0] && lcxg[1] && lcxg[2] && lcxg[3]; + break; + + case 3: + out = cell_sr_latch (); + break; + + case 4: + out = cell_1_in_flipflop (); + break; + + case 5: + out = cell_2_in_flipflop (); + break; + + case 6: + out = JKflipflop (); + break; + + case 7: + out = transparent_D_latch (); + break; + + } + if (pol & LCxPOL) + out = !out; + + if (CLCenabled ()) + outputCLC (out); + +} + +// Send output to required consumers +void CLC::outputCLC (bool out) +{ + uint con = clcxcon.value.get (); + bool old_out = con & LCxOUT; + + Dprintf (("outputCLC CLC%u out=%d old_out=%d clcdata=0x%x\n", index, out, + old_out, clcdata->value.get ())); + + if (out) + con |= LCxOUT; + else + con &= ~LCxOUT; + + clcxcon.value.put (con); + + assert (m_Interrupt); + Dprintf (("CLC::outputCLC CLC%u old_out %d out %d int 0x%x \n", index + 1, + old_out, out, con & LCxINTP)); + if (!old_out && out && (con & LCxINTP)) //Positive edge interrupt + m_Interrupt->Trigger (); + if (old_out && !out && (con & LCxINTN)) //Negative edge interrupt + m_Interrupt->Trigger (); + + assert (clcdata); + clcdata->set_bit (out, index); + if (p_nco) + p_nco->link_nco (out, index); + + if (CLCenabled ()) + { + CLCxsrc->setState (out ? '1' : '0'); + pinCLCx->updatePinModule (); + } +} + + + +bool CLC::cell_sr_latch () +{ + bool set = lcxg[0] || lcxg[1]; + bool reset = lcxg[2] || lcxg[3]; + + if (set) + Doutput = true; + else if (reset) + Doutput = false; + + return Doutput; +} + +bool CLC::cell_1_in_flipflop () +{ + bool set = lcxg[3]; + bool reset = lcxg[2]; + bool clock = lcxg[0]; + bool D = lcxg[1]; + + if (set) + { + Doutput = true; + } + else if (reset) + { + Doutput = false; + } + else if (!Dclock && clock) + { + Doutput = D; + } + Dclock = clock; + return Doutput; +} + +bool CLC::cell_2_in_flipflop () +{ + bool reset = lcxg[2]; + bool clock = lcxg[0]; + bool D = lcxg[1] || lcxg[3]; + + if (reset) + { + Doutput = false; + } + else if (!Dclock && clock) + { + Doutput = D; + } + Dclock = clock; + return Doutput; +} + +bool CLC::JKflipflop () +{ + bool J = lcxg[1]; + bool K = lcxg[3]; + bool reset = lcxg[2]; + bool clock = lcxg[0]; + + if (reset) + { + Doutput = false; + } + else if (!Dclock && clock) // Clock + edge + { + if (J && K) // Toggle output + Doutput = !Doutput; + else if (J && !K) // Set output + Doutput = true; + else if (!J && K) // clear output + Doutput = false; + /*else if (!J && !K) // no change + ;*/ + } + Dclock = clock; + return Doutput; +} + +bool CLC::transparent_D_latch () +{ + bool reset = lcxg[0]; + bool D = lcxg[1]; + bool LE = lcxg[2]; + bool set = lcxg[3]; + + if (set) + Doutput = true; + else if (reset) + Doutput = false; + else if (!LE) + Doutput = D; + + return Doutput; +} + + + +void CLC::releasePinSource (PinModule * pin) +{ + if (pin == pinCLCx) + srcCLCxactive = false; +} + +// Called from clcdata, process LCx_OUT updates where x = pos +void CLC::lcxupdate (bool bit_val, uint pos) +{ + bool update = false; + for (int i = 0; i < 4; i++) + { + if ((lcxdT[i] != bit_val) && + ((DxS_data[i] == LC1 && pos == 0) || + (DxS_data[i] == LC2 && pos == 1) || + (DxS_data[i] == LC3 && pos == 2) || + (DxS_data[i] == LC4 && pos == 3))) + { + update = true; + lcxdT[i] = bit_val; + } + } + + if (update) + { + if (CLCenabled ()) + Dprintf (("CLC%u lcxupdate LC%u_OUT=%d\n", index + 1, pos + 1, + bit_val)); + compute_gates (); + } +} + +// CLCCON register has changed +void CLC::update_clccon (uint diff) +{ + uint val = clcxcon.value.get (); + if (diff & LCxOE) + { + if ((val & (LCxOE | LCxEN)) == (LCxOE | LCxEN)) + oeCLCx (true); + if ((val & (LCxOE | LCxEN)) == (LCxEN)) + oeCLCx (false); + } + if (diff & LCxEN) // clc off or on + { + if (val & LCxEN) // CLC on + { + config_inputs (true); + } + else // CLC off + { + config_inputs (false); + oeCLCx (false); + } + } + +} + +// Initialize inputs as required, called when CLC is enabled or disabled +// or changes in clcxselx clcxglsx while clc enabled +void CLC::config_inputs (bool on) +{ + uint active_gates = clcxgls0.value.get () | + clcxgls1.value.get () | clcxgls2.value.get () | clcxgls3.value.get (); + Dprintf (("config_inputs CLC%u on=%d active_gates=0x%x\n", index + 1, on, + active_gates)); + + bool haveIN0 = false; + bool haveIN1 = false; + bool haveFRC = false; + bool haveLFINTOSC = false; + bool haveHFINTOSC = false; + int mask = 3; + for (int i = 0; i < 4; i++) + { + if (active_gates & mask) // data input used + { + if (DxS_data[i] == CLCxIN0) + haveIN0 = true; + else if (DxS_data[i] == CLCxIN1) + haveIN1 = true; + else if (DxS_data[i] == FRC_IN) + haveFRC = true; + else if (DxS_data[i] == LFINTOSC) + haveLFINTOSC = true; + else if (DxS_data[i] == HFINTOSC) + haveHFINTOSC = true; + } + mask <<= 2; + } + + // If on==true and inactive, turn on + // if on==false and active. turn off + if (haveIN0 && (INxactive[0] ^ on)) + { + Dprintf (("config_inputs CLC%u IN0 on=%d\n", index + 1, on)); + enableINxpin (0, on); + } + else if (!haveIN0 && INxactive[0]) + { + Dprintf (("config_inputs CLC%u IN0 OFF on=%d\n", index + 1, on)); + enableINxpin (0, false); + } + if (haveIN1 && (INxactive[1] ^ on)) + { + Dprintf (("config_inputs CLC%u IN1 on=%d\n", index + 1, on)); + enableINxpin (1, on); + } + else if (!haveIN1 && INxactive[1]) + { + Dprintf (("config_inputs CLC%u IN1 OFF on=%d\n", index + 1, on)); + enableINxpin (0, false); + } + + if (haveFRC && (FRCactive ^ on)) + { + Dprintf (("config_inputs CLC%u FRC FRCactive=%d on=%d\n", index + 1, + FRCactive, on)); + FRCactive = on; + frc->start_osc_sim (on); + } + else if (!haveFRC && FRCactive) + { + Dprintf (("config_inputs CLC%u FRC OFF on=%d\n", index + 1, on)); + FRCactive = false; + frc->start_osc_sim (false); + } + if (haveLFINTOSC && (LFINTOSCactive ^ on)) + { + Dprintf (("config_inputs CLC%u LFINTOSC LFINTOSCactive=%d on=%d\n", + index + 1, LFINTOSCactive, on)); + LFINTOSCactive = on; + lfintosc->start_osc_sim (on); + } + else if (!haveLFINTOSC && LFINTOSCactive) + { + Dprintf (("config_inputs CLC%u LFINTOSC OFF on=%d\n", index + 1, + on)); + LFINTOSCactive = false; + lfintosc->start_osc_sim (false); + } + if (haveHFINTOSC && (HFINTOSCactive ^ on)) + { + Dprintf (("config_inputs CLC%u HFINTOSC HFINTOSCactive=%d on=%d\n", + index + 1, HFINTOSCactive, on)); + HFINTOSCactive = on; + hfintosc->start_osc_sim (on); + } + else if (!haveHFINTOSC && HFINTOSCactive) + { + Dprintf (("config_inputs CLC%u HFINTOSC OFF on=%d\n", index + 1, + on)); + HFINTOSCactive = false; + hfintosc->start_osc_sim (false); + } + if (on) + compute_gates (); +} + + +// Inputs for p10f32x +CLC1::CLC1 (Processor * cpu, uint _index, CLCDATA * _clcdata): + CLC (cpu, _index, _clcdata) +{ +} + +void CLC1::D1S (int select) +{ + switch (select) + { + case 0: + DxS_data[0] = LC1; + break; + + case 1: + DxS_data[0] = CLCxIN0; + break; + + case 2: + DxS_data[0] = CLCxIN1; + break; + + case 3: + DxS_data[0] = PWM1; + break; + + case 4: + DxS_data[0] = PWM2; + break; + + case 5: + DxS_data[0] = NCOx; + break; + + case 6: + DxS_data[0] = FOSCLK; + break; + + case 7: + DxS_data[0] = LFINTOSC; + break; + } +} + +void CLC1::D2S (int select) +{ + switch (select) + { + case 0: + DxS_data[1] = LC1; + break; + + case 1: + DxS_data[1] = CLCxIN0; + break; + + case 2: + DxS_data[1] = CLCxIN1; + break; + + case 3: + DxS_data[1] = PWM1; + break; + + case 4: + DxS_data[1] = PWM2; + break; + + case 5: + DxS_data[1] = NCOx; + break; + + case 6: + DxS_data[1] = FOSCLK; + break; + + case 7: + DxS_data[1] = LFINTOSC; + break; + } +} + +void CLC1::D3S (int select) +{ + switch (select) + { + case 0: + DxS_data[2] = LC1; + break; + + case 1: + DxS_data[2] = CLCxIN0; + break; + + case 2: + DxS_data[2] = CLCxIN1; + break; + + case 3: + DxS_data[2] = PWM1; + break; + + case 4: + DxS_data[2] = PWM2; + break; + + case 5: + DxS_data[2] = NCOx; + break; + + case 6: + DxS_data[2] = FOSCLK; + break; + + case 7: + DxS_data[2] = LFINTOSC; + break; + } +} + +void CLC1::D4S (int select) +{ + switch (select) + { + case 0: + DxS_data[3] = LC1; + break; + + case 1: + DxS_data[3] = CLCxIN0; + break; + + case 2: + DxS_data[3] = CLCxIN1; + break; + + case 3: + DxS_data[3] = PWM1; + break; + + case 4: + DxS_data[3] = PWM2; + break; + + case 5: + DxS_data[3] = NCOx; + break; + + case 6: + DxS_data[3] = FOSCLK; + break; + + case 7: + DxS_data[3] = LFINTOSC; + break; + } +} + +// OSC_SIM simulates clock inputs for CLC. +// If the requested frequency > FOSC/4, OSC_SIM will generate pulses at +// a frequency of FOSC/4. +// If the requested frequency is not a whole fraction of FOSC/4, the +// simulated clock will have jitter to approximate the requested frequency. +// The duty cycle of the simulated frequency will only be 50% when +// the requested frequency is a whole fraction of FOSC/8. +OSC_SIM::OSC_SIM (double _freq, int _data_in): + frequency (_freq), data_in (_data_in), active (0), future_cycle (0) +{ + for (int i = 0; i < 4; i++) + { + m_clc[i] = 0; + } +} + +void OSC_SIM::start_osc_sim (bool on) +{ + if (on) + { + Dprintf (("OSC_SIM::start_osc_sim freq=%.0f kHz active %d\n", + frequency / 1000., active)); + if (!active) + { + int cycles = get_cycles ().instruction_cps () / frequency + 0.5; + + if (cycles < 2) + { + fprintf (stderr, + "OSC_SIM %.1f kHz not simulated at current CPU frequency\n", + frequency / 1000.); + fprintf (stderr, "Using pulses at %.1f kHz\n", + get_cycles ().instruction_cps () / 1000.); + cycles = 1; + } + adjust_cycles = + frequency - get_cycles ().instruction_cps () / cycles; + next_cycle = cycles / 2; + level = true; + for (int i = 0; i < 4; i++) + { + if (m_clc[i]) + m_clc[i]->osc_out (level, data_in); + } + if (future_cycle) + get_cycles ().clear_break (this); + future_cycle = get_cycles ().get () + cycles - next_cycle; + get_cycles ().set_break (future_cycle, this); + Dprintf (("OSC_SIM::start_osc_sim cycles=%d adj_cycles=%ld freq=%.1f kHz inst_cps=%e\n", cycles, adjust_cycles, frequency / 1000., get_cycles ().instruction_cps ())); + } + active++; + } + else if (--active == 0) + { + Dprintf (("OSC_SIM::start_osc_sim stop freq=%.0f\n", + frequency / 1000.)); + if (future_cycle) + { + get_cycles ().clear_break (this); + future_cycle = 0; + } + } +} + +void OSC_SIM::callback () +{ + for (int i = 0; i < 4; i++) + { + if (m_clc[i]) + m_clc[i]->osc_out (!level, data_in); + } + if (!next_cycle && level) // Sending a pulse + { + for (int i = 0; i < 4; i++) + { + if (m_clc[i]) + m_clc[i]->osc_out (level, data_in); + } + } + if (next_cycle) + { + future_cycle = get_cycles ().get () + next_cycle; + next_cycle = 0; + level = false; + } + else + { + adjust_cycles += frequency; + int cycles = get_cycles ().instruction_cps () / adjust_cycles + 0.5; + if (cycles < 2) + { + cycles = 1; + adjust_cycles = 0; + } + else + adjust_cycles -= get_cycles ().instruction_cps () / cycles; + next_cycle = cycles / 2; + level = true; + future_cycle = get_cycles ().get () + cycles - next_cycle; + } + get_cycles ().set_break (future_cycle, this); +} diff --git a/src/gpsim/modules/clc.h b/src/gpsim/modules/clc.h new file mode 100644 index 0000000..b4d0448 --- /dev/null +++ b/src/gpsim/modules/clc.h @@ -0,0 +1,334 @@ +/* + Copyright (C) 2017 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +// CONFIGURABLE LOGIC CELL (CLC) + +#ifndef __CLC_h__ +#define __CLC_h__ + +#include "registers.h" +#include "apfcon.h" + +class CLC; +class OSC_SIM; +class NCO; +class INxSignalSink; +class CLCSigSource; + +class CLCxCON : public sfr_register +{ + public: + CLCxCON(CLC *_clc, Processor *pCpu, const char *pName, const char *pDesc) : + sfr_register(pCpu, pName, pDesc), m_clc(_clc), write_mask(0xdf) + { + } + void put(uint); + + private: + CLC *m_clc; + uint write_mask; +}; + +class CLCxPOL : public sfr_register +{ + public: + CLCxPOL(CLC *_clc, Processor *pCpu, const char *pName, const char *pDesc) : + sfr_register(pCpu, pName, pDesc), m_clc(_clc), write_mask(0x8f) + + { + } + + void put(uint); + + private: + CLC *m_clc; + uint write_mask; +}; + +class CLCxSEL0 : public sfr_register +{ + public: + CLCxSEL0(CLC *_clc, Processor *pCpu, const char *pName, const char *pDesc); + + void put(uint); + + private: + CLC *m_clc; + uint write_mask; + +}; + +class CLCxSEL1 : public sfr_register +{ + public: + CLCxSEL1(CLC *_clc, Processor *pCpu, const char *pName, const char *pDesc); + void put(uint); + + private: + CLC *m_clc; + uint write_mask; +}; + +class CLCxGLS0 : public sfr_register +{ + public: + CLCxGLS0(CLC *_clc, Processor *pCpu, const char *pName, const char *pDesc) : + sfr_register(pCpu, pName, pDesc), m_clc(_clc) + { + } + + void put(uint); + + private: + CLC *m_clc; +}; + +class CLCxGLS1 : public sfr_register +{ + public: + CLCxGLS1(CLC *_clc, Processor *pCpu, const char *pName, const char *pDesc) : + sfr_register(pCpu, pName, pDesc), m_clc(_clc) + + { + } + + void put(uint); + + private: + CLC *m_clc; +}; + +class CLCxGLS2 : public sfr_register +{ + public: + CLCxGLS2(CLC *_clc, Processor *pCpu, const char *pName, const char *pDesc) : + sfr_register(pCpu, pName, pDesc), m_clc(_clc) + + { + } + + void put(uint); + + private: + CLC *m_clc; +}; + +class CLCxGLS3 : public sfr_register +{ + public: + CLCxGLS3(CLC *_clc, Processor *pCpu, const char *pName, const char *pDesc) : + sfr_register(pCpu, pName, pDesc), m_clc(_clc) + + { + } + + void put(uint); + + private: + CLC *m_clc; +}; + +class CLCDATA : public sfr_register +{ + public: + CLCDATA(Processor *pCpu, const char *pName = 0, const char *pDesc = 0) : + sfr_register(pCpu, pName, pDesc) + { + for(int i = 0; i < 4; i++) + m_clc[i] = 0; + } + + + void put(uint val){;} + void set_bit(bool bit_val, uint pos); + void set_clc(CLC *clc1, CLC *clc2=0, CLC *clc3=0, CLC *clc4 = 0) + { + m_clc[0] = clc1; + m_clc[1] = clc2; + m_clc[2] = clc3; + m_clc[3] = clc4; + } + + private: + CLC *m_clc[4]; +}; + +class CLC : public apfpin +{ + public: + enum { + // CLCxCON + LCxEN = (1<<7), + LCxOE = (1<<6), + LCxOUT = (1<<5), + LCxINTP = (1<<4), + LCxINTN = (1<<3), + LCxMODE = 0x7, + + // CLCxPOL + LCxPOL = (1<<7), + }; + enum data_in { + UNUSED = 0, + LC1, + LC2, + LC3, + LC4, + CLCxIN0, // 5 + CLCxIN1, + PWM1, + PWM2, + PWM3, + PWM4, //10 + NCOx, + FOSCLK, + LFINTOSC, + HFINTOSC, + FRC_IN, //15 + T0_OVER, + T1_OVER, + T2_MATCH, + C1OUT, + C2OUT, //20 + }; + + enum { + CLCout_PIN=0, + CLCin1_PIN, + CLCin2_PIN + }; + + CLC(Processor *_cpu, uint _index, CLCDATA *_clcdata); + ~CLC(); + + bool CLCenabled() { return clcxcon.value.get() & LCxEN; } + void setCLCxPin( PinModule *alt_pin ); + void enableINxpin( int, bool ); + virtual void setIOpin( int data, PinModule *pin ); + virtual void D1S( int select ); + virtual void D2S( int select ); + virtual void D3S( int select ); + virtual void D4S( int select ); + void t0_overflow(); + void t1_overflow(); + void t2_match(); + void osc_out( bool level, int kind ); + void out_pwm( bool level, int id ); + void NCO_out( bool level ); + void CxOUT_sync(bool output, int cm); + void set_clcPins(PinModule *IN0, PinModule *IN1, PinModule *_CLCx) + { pinCLCxIN[0] = IN0; pinCLCxIN[1] = IN1, pinCLCx = _CLCx;} + void setState(char new3State, int index); + void releasePinSource(PinModule *pin); + void oeCLCx(bool on); + void update_clccon(uint diff); + void config_inputs(bool on); + void compute_gates(); + void cell_function(); + bool cell_1_in_flipflop(); + bool cell_2_in_flipflop(); + bool cell_sr_latch(); + bool JKflipflop(); + bool transparent_D_latch(); + void lcxupdate(bool bit_val, uint pos); + virtual void setInterruptSource(InterruptSource * _int) + { m_Interrupt = _int;} + void outputCLC(bool out); + + + uint index; + CLCxCON clcxcon; + CLCxPOL clcxpol; + CLCxSEL0 clcxsel0; + CLCxSEL1 clcxsel1; + CLCxGLS0 clcxgls0; + CLCxGLS1 clcxgls1; + CLCxGLS2 clcxgls2; + CLCxGLS3 clcxgls3; + CLCDATA *clcdata; + OSC_SIM *frc; + OSC_SIM *lfintosc; + OSC_SIM *hfintosc; + NCO *p_nco; + data_in DxS_data[4]; + + private: + PinModule *pinCLCx; + CLCSigSource *CLCxsrc; + string CLCxgui; + bool srcCLCxactive; + INxSignalSink *INxsink[2]; + int INxactive[2]; + bool INxstate[2]; + PinModule *pinCLCxIN[2]; + string INxgui[2]; + bool pwmx_level[4]; + bool CMxOUT_level[4]; + bool frc_level; + bool NCO_level; + bool lcxdT[4]; // incoming data + bool lcxg[4]; // Data gate output + InterruptSource *m_Interrupt; + bool Doutput; + bool Dclock; + bool FRCactive; + bool LFINTOSCactive; + bool HFINTOSCactive; +}; + +class CLC1 : public CLC +{ + public: + CLC1(Processor *_cpu, uint _index, CLCDATA *_clcdata); + virtual void D1S(int select); + virtual void D2S(int select); + virtual void D3S(int select); + virtual void D4S(int select); +}; + +// RC clock 600KHz used with ADC, CLC +class OSC_SIM : public TriggerObject +{ +public: + OSC_SIM(double _freq, int _data_in ); + + void start_osc_sim(bool on); + + void set_clc(CLC *clc1, CLC *clc2=0, CLC *clc3=0, CLC *clc4 = 0) + { + m_clc[0] = clc1; m_clc[1] = clc2; m_clc[2] = clc3; m_clc[3] = clc4; + } + void callback(); +private: + double frequency; + int data_in; + int active; + CLC *m_clc[4]; + bool level; + int next_cycle; + uint64_t future_cycle; + int64_t adjust_cycles; +}; +#endif // __CLC_h__ diff --git a/src/gpsim/modules/comparator.cc b/src/gpsim/modules/comparator.cc new file mode 100644 index 0000000..150da4a --- /dev/null +++ b/src/gpsim/modules/comparator.cc @@ -0,0 +1,1393 @@ +/* + + Copyright (C) 1998 T. Scott Dattalo + Copyright (C) 2006,2010,2013,2015 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include +#include +#include +#include + +#include "config.h" +#include "pic-ioports.h" +#include "processor.h" +#include "p16f88x.h" +#include "pir.h" +#include "stimuli.h" +#include "14bit-tmrs.h" +#include "comparator.h" +#include "a2d_v2.h" +#include "ctmu.h" +#include "clc.h" + +//#define DEBUG +#if defined(DEBUG) +#include "config.h" +#define Dprintf(arg) {printf("%s:%d ",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +ComparatorModule::ComparatorModule(Processor *pCpu) + : cmcon(pCpu,"cmcon", "Comparator Module Control"), + cmcon1(pCpu,"cmcon1", "Comparator Configure Register"), + vrcon(pCpu,"vrcon", "Voltage Reference Control") +{ +} + +void ComparatorModule::initialize( PIR_SET *pir_set, + PinModule *pin_vr0, PinModule *pin_cm0, + PinModule *pin_cm1, PinModule *pin_cm2, PinModule *pin_cm3, + PinModule *pin_cm4, PinModule *pin_cm5) +{ + // cmcon = new CMCON; + cmcon.assign_pir_set(pir_set); + cmcon.setINpin(0, pin_cm0, "an0"); + cmcon.setINpin(1, pin_cm1, "an1"); + cmcon.setINpin(2, pin_cm2, "an2"); + cmcon.setINpin(3, pin_cm3, "an3"); + cmcon.setOUTpin(0, pin_cm4); + cmcon.setOUTpin(1, pin_cm5); + vrcon.setIOpin(pin_vr0); + cmcon._vrcon = &vrcon; + vrcon._cmcon = &cmcon; +} + +//-------------------------------------------------- + +class CMSignalSource : public SignalControl +{ + public: + CMSignalSource(CMCON *_cmcon, int _index) + : m_state('0'), m_cmcon(_cmcon), index(_index) { } + ~CMSignalSource() { } + + virtual void release() { m_cmcon->releasePin(index); } + virtual char getState() { return m_state; } + void putState(bool new_val) { m_state = new_val?'1':'0'; } + + private: + char m_state; + CMCON * m_cmcon; + int index; +}; +//-------------------------------------------------- + +class CMxSignalSource : public PeripheralSignalSource +{ + public: + CMxSignalSource(PinModule *_pin, CMxCON0_base *_cmcon) + : PeripheralSignalSource(_pin), m_cmcon(_cmcon) { } + + ~CMxSignalSource() { } + virtual void release() { m_cmcon->releasePin(); } + + private: + CMxCON0_base * m_cmcon; +}; +//-------------------------------------------------- + +CM_stimulus::CM_stimulus(CMCON * arg, const char *cPname,double _Vth, double _Zth) + : stimulus(cPname, _Vth, _Zth) +{ + _cmcon = arg; +} + +CM_stimulus::~CM_stimulus() +{ +} + +void CM_stimulus::set_nodeVoltage(double v) +{ + if (nodeVoltage != v) + { + nodeVoltage = v; + Dprintf(("set_nodeVoltage %s _cmcon %p %s v=%.2f\n", name().c_str(), _cmcon, _cmcon->name().c_str(), v)); + _cmcon->get(); // recalculate comparator values + } +} + +/* + Setup the configuration for the comparators. Must be called + for each comparator and each mode(CN2:CM0) that can be used. + il1 = input Vin- when CIS == 0 + ih1 = input Vin+ when CIS == 0 + il2 = input Vin- when CIS == 1 + ih2 = input Vin+ when CIS == 1 + + if input == VREF, reference voltage is used. +*/ +void CMCON::set_configuration( int comp, int mode, int il1, int ih1, int il2, int ih2, int out ) +{ + if (comp > cMaxComparators || comp < 1 ) + { + cout << "CMCON::set_configuration comp=" << comp << " out of range\n"; + return; + } + if (mode > cMaxConfigurations) + { + cout << "CMCON::set_configuration mode too large\n"; + return; + } + m_configuration_bits[comp-1][mode] = + (il1 << CFG_SHIFT*4) | + (ih1 << CFG_SHIFT*3) | + (il2 << CFG_SHIFT*2) | + (ih2 << CFG_SHIFT) | + out; +} + +//------------------------------------------------------------------------ +CMCON::CMCON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), _vrcon(0), + pir_set(0), m_tmrl(0), m_eccpas(0) +{ + value.put(0); + cm_input[0]=cm_input[1]=cm_input[2]=cm_input[3]=0; + cm_output[0] = cm_output[1] = 0; + cm_input_pin[0]=cm_input_pin[1]=cm_input_pin[2]=cm_input_pin[3]=0; + cm_an[0] = cm_an[1] = cm_an[2] = cm_an[3] = 0; + cm_output_pin[0]=cm_output_pin[1]=0; + cm_source[0]=cm_source[1]=0; + cm_stimulus[0]=cm_stimulus[1]=cm_stimulus[2]=cm_stimulus[3]=0; + cm_source_active[0]=cm_source_active[1] = false; +} + +CMCON::~CMCON() +{ + uint mode = value.get() & 0x07; + + for( int i = 0; i <2; i++ ) + { + if (cm_source[i]) + { + int cfg = m_configuration_bits[i][mode] & CFG_MASK; + + // Our Source active so port still defined if cm_output defined, + // set default source. + if (cfg == i && cm_output[i] && cm_source_active[i]) + cm_output[i]->setSource(0); + delete cm_source[i]; + } + } + for (int i = 0; i < 4; i++) + { + if (cm_stimulus[i]) delete cm_stimulus[i]; + if (cm_input_pin[i]) free(cm_input_pin[i]); + if (cm_an[i]) free(cm_an[i]); + } + if (cm_output_pin[0]) free(cm_output_pin[0]); + if (cm_output_pin[1]) free(cm_output_pin[1]); +} + + +void CMCON::releasePin(int i) +{ + cm_source_active[i] = false; +} + +void CMCON::setINpin(int i, PinModule *newPinModule, const char *an) +{ + if (newPinModule == NULL) return; + cm_input[i] = newPinModule; + cm_input_pin[i] = strdup(newPinModule->getPin().name().c_str()); + cm_an[i] = strdup(an); +} + +void CMCON::setOUTpin(int i, PinModule *newPinModule) +{ + if (newPinModule == NULL) return; + cm_output[i] = newPinModule; + cm_output_pin[i] = strdup(newPinModule->getPin().name().c_str()); +} + +void CMCON::assign_pir_set(PIR_SET *new_pir_set) +{ + pir_set = new_pir_set; +} + +double CMCON::comp_voltage(int ind, int invert) +{ + double Voltage; + const char *name; + + switch(ind) + { + case V06: + Voltage = 0.6; + name = "V0.6"; + break; + + case VREF: + Voltage = _vrcon->get_Vref(); + name = "Vref"; + break; + + case NO_IN: + Voltage = invert ? cpu->get_Vdd() : 0.; + name = "No_IN"; + break; + + default: + Voltage = cm_input[ind]->getPin().get_nodeVoltage(); + name = cm_input[ind]->getPin().name().c_str(); + break; + } + if (name) // this is just to avoid a compiler warning + { + Dprintf(("CMCON::comp_voltage ind=%d IN%c %.2f %s\n", ind, invert?'-':'+', Voltage, name)); + } + return Voltage; +} +/* +** get() +** read the comparator inputs and set C2OUT and C1OUT +** as required. Also drive output pins if required. +*/ +uint CMCON::get() +{ + uint cmcon_val = value.get(); + int mode = cmcon_val & 0x07; + int i; + + for (i = 0; i < 2; i++) + { + double Vhigh; + double Vlow; + bool out_true; + int out; + int invert_bit = (i == 0) ? C1INV : C2INV; + int output_bit = (i == 0) ? C1OUT : C2OUT; + int shift = (cmcon_val & CIS) ? CFG_SHIFT : CFG_SHIFT*3; + + + if ((m_configuration_bits[i][mode] & CFG_MASK) != ZERO) + { + Vhigh = comp_voltage( + (m_configuration_bits[i][mode] >> shift) & CFG_MASK, + cmcon_val & invert_bit); + Vlow = comp_voltage( + (m_configuration_bits[i][mode] >> (shift + CFG_SHIFT)) & CFG_MASK, + (cmcon_val & invert_bit) == 0); + + if (Vhigh > Vlow) + out_true = (cmcon_val & invert_bit)?false:true; + else + out_true = (cmcon_val & invert_bit)?true:false; + + + if (out_true) + cmcon_val |= output_bit; + else + cmcon_val &= ~output_bit; + + if ( (out = m_configuration_bits[i][mode] & CFG_MASK) < 2) + { + cm_source[out]->putState(out_true); + cm_output[out]->updatePinModule(); + update(); + } + } + else // Don't care about inputs, register value 0 + cmcon_val &= ~output_bit; + } + + if (value.get() ^ cmcon_val) // change of state + { + int diff = value.get() ^ cmcon_val; + + // Signal ECCPAS ? + if (m_eccpas) + { + if (diff & C1OUT) + m_eccpas->c1_output(cmcon_val & C1OUT); + if (diff & C2OUT) + m_eccpas->c2_output(cmcon_val & C2OUT); + } + // Generate interupt ? + if (pir_set) + { + if (diff & C1OUT) + pir_set->set_c1if(); + + if (diff & C2OUT) + pir_set->set_c2if(); + } + } + if (m_tmrl) + m_tmrl->compare_gate((cmcon_val & C1OUT) == C1OUT); + value.put(cmcon_val); + return(cmcon_val); +} + +void CMCON::put(uint new_value) +{ + uint mode = new_value & 0x7; + uint in_mask = 0; + uint out_mask = 0; + uint configuration; + int i; + + // Determine used input and output pins + for(i = 0; i < 2; i++) + { + configuration = m_configuration_bits[i][mode]; + if ((configuration & CFG_MASK) < 2) + out_mask |= (1 << (configuration & CFG_MASK)); + for(int j = 0; j < 4; j++) + { + configuration >>= CFG_SHIFT; + if ((configuration & CFG_MASK) < 6) + in_mask |= (1 << (configuration & CFG_MASK)); + } + } + + if ((mode != 0) && (mode != 7) && ! cm_stimulus[0]) // initialize stimulus + { + cm_stimulus[0] = new CM_stimulus(this, "cm_stimulus_1", 0, 1e12); + cm_stimulus[1] = new CM_stimulus(this, "cm_stimulus_2", 0, 1e12); + cm_stimulus[2] = new CM_stimulus(this, "cm_stimulus_3", 0, 1e12); + cm_stimulus[3] = new CM_stimulus(this, "cm_stimulus_4", 0, 1e12); + } + // + // setup outputs + // + for( i = 0; i < 2 && cm_output[i]; i++) + { + if (out_mask & (1<setSource(cm_source[i]); + cm_source_active[i] = true; + } + else if (cm_source_active[i]) + { + cm_output[i]->setSource(0); + } + } + // + // setup inputs + for(i = 0; i < 4 ; i++) + { + if (cm_input[i]) + { + //const char *name = cm_input[i]->getPin().GUIname().c_str(); ???? + + if (cm_input[i]->getPin().snode) + { + if (in_mask & (1 << i)) (cm_input[i]->getPin().snode)->attach_stimulus(cm_stimulus[i]); + else (cm_input[i]->getPin().snode)->detach_stimulus(cm_stimulus[i]); + } + // rewrite GUI name as required + if (in_mask & (1 << i) ) cm_input[i]->AnalogReq(this, true, cm_an[i]); + else + { + + //if (!strncmp(name, "an", 2)) ???? + cm_input[i]->AnalogReq(this, false, cm_input[i]->getPin().name().c_str()); + } + } + } + // if only one comparator, mask C2INV + if (!cm_output[1]) new_value &= 0x1f; + value.put(new_value); + + get(); // update comparator values +} +//------------------------------------------------------------------------ +CMCON1::CMCON1(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), m_tmrl(0), valid_bits(0x3) +{ +} +CMCON1::~CMCON1() {} +void CMCON1::put(uint new_value) +{ + assert(m_tmrl); + m_tmrl->set_T1GSS(new_value & T1GSS); + + value.put(new_value & valid_bits); +} +//------------------------------------------------------------------------ +SRCON::SRCON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ + writable_bits = SR1 | SR0 | C1SEN | C2REN | FVREN; + SR_Q = FALSE; +} +void SRCON::put(uint new_value) +{ + // PULSR and PULSS should be only settable using bsf + // it is not clear if these bits read anything other than 0, + // but this is what I am assuming RRR + if (new_value & PULSR) SR_Q = FALSE; + else if (new_value & PULSS && ! reset) SR_Q = TRUE; + + value.put(new_value & writable_bits); +} + +CMxCON0_base::CMxCON0_base(Processor *pCpu, const char *pName, + const char *pDesc, uint _cm, ComparatorModule2 *cmModule) + : sfr_register(pCpu, pName, pDesc), + cm_output(0), + m_cm2con1(0), m_srcon(0), + IntSrc(0), + cm(_cm), m_cmModule(cmModule), cm_source(0), cm_source_active(false) +{ + value.put(0); + cm_input[0]=cm_input[1]=cm_input[2]=cm_input[3]=cm_input[4]=0; + cm_stimulus[0]=cm_stimulus[1]=0; + cm_snode[0]=cm_snode[1]=0; +} + +CMxCON0_base::~CMxCON0_base() +{ + + + if (cm_source_active && cm_output) cm_output->setSource(0); + if (cm_source) delete cm_source; + if ((!cm_snode[0]) && cm_stimulus[0]) delete cm_stimulus[0]; + if ((!cm_snode[1]) && cm_stimulus[1]) delete cm_stimulus[1]; + if (IntSrc) delete IntSrc; + +} + + +// +// evaluate inputs and determine output +// +uint CMxCON0_base::get() +{ + bool output; + + if (! is_on()) + { + // need to test what happens in a real device RRR + //output = out_invert()?true:false; + output = false; + } + else + { + double Vpos = get_Vpos(); + double Vneg = get_Vneg(); + output = output_high(); + if (fabs(Vpos - Vneg) > get_hysteresis()) + { + output = Vpos > Vneg; + if (out_invert()) output = !output; + } + Dprintf(("%s ON Vpos %.2f Vneg %.2f output %d invert %d\n", name().c_str(), Vpos, Vneg, output, out_invert())); + } + set_output(output); + return(value.get()); +} + +//-------------------------------------------------- +// Voltage reference +//-------------------------------------------------- + +VRCON::VRCON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + vr_PinModule(0), vr_pu(0), vr_pd(0), + pin_name(0) +{ + valid_bits = VR0|VR1|VR2|VR3|VRR|VROE|VREN; + value.put(0); +} + +VRCON::~VRCON() +{ + free(pin_name); +} + +void VRCON::setIOpin(PinModule *newPinModule) +{ + if (newPinModule == NULL) return; + vr_PinModule = newPinModule; + pin_name = strdup(newPinModule->getPin().name().c_str()); +} + +double VRCON::get_Vref() +{ + uint new_value = value.get(); + Vref_high = ((Processor*)cpu)->get_Vdd(); + Vref_low = 0.0; + vr_Rhigh = (8 + (16 - (new_value & 0x0f))) * 2000.; + vr_Rlow = (new_value & 0x0f) * 2000.; + + if( !(new_value & VRR)) vr_Rlow += 16000.; // High range ? + + vr_Vref = (Vref_high - Vref_low) * vr_Rlow / (vr_Rhigh + vr_Rlow) + Vref_low; + + return(vr_Vref); +} + +void VRCON::put(uint new_value) +{ + new_value &= valid_bits; + uint old_value = value.get(); + uint diff = new_value ^ old_value; + + if (!diff) return; + + // if no PinModule clear VROE bit + if (!vr_PinModule) new_value &= ~VROE; + value.put(new_value); + + if (new_value & VREN) // Vreference enable set + { + get_Vref(); + if (new_value & VROE) // output voltage to pin + { + if (! vr_pu) vr_pu = new stimulus("vref_pu", Vref_high, vr_Rhigh); + if (! vr_pd) vr_pd = new stimulus("vref_pd", Vref_low, vr_Rlow); + + if (vr_PinModule->getPin().snode) + { + vr_pu->set_Zth(vr_Rhigh); + vr_pd->set_Zth(vr_Rlow); + vr_PinModule->getPin().snode->attach_stimulus(vr_pu); + vr_PinModule->getPin().snode->attach_stimulus(vr_pd); + vr_PinModule->getPin().snode->update(); + } + } + else if (vr_PinModule) // not outputing voltage to pin + { + if (diff & 0x2f) _cmcon->get(); // did value of vreference change ? + + if(vr_PinModule && vr_PinModule->getPin().snode) + { + vr_PinModule->getPin().snode->detach_stimulus(vr_pu); + vr_PinModule->getPin().snode->detach_stimulus(vr_pd); + vr_PinModule->getPin().snode->update(); + } + } + else // output pin not defined + { + if (diff & 0x2f) // did value of vreference change ? + _cmcon->get(); + } + } + else // vref disable + { + if(vr_PinModule && vr_PinModule->getPin().snode) + { + vr_PinModule->getPin().snode->detach_stimulus(vr_pu); + vr_PinModule->getPin().snode->detach_stimulus(vr_pd); + vr_PinModule->getPin().snode->update(); + } + } +} + + +//-------------------------------------------------- +// Voltage reference +//-------------------------------------------------- +class P16F631; + +VRCON_2::VRCON_2( Processor *pCpu, const char *pName, const char *pDesc ) + : sfr_register( pCpu, pName, pDesc ) +{ + value.put(0); + + vr_06v = new stimulus("vref_06v", 0.0, 100.); + vr_pu = new stimulus("Cvref_pu", 0.0 , 48000.); + vr_pd = new stimulus("Cvref_pd", 0.0, 0.0); + + ((Processor*)cpu)->CVREF = new Stimulus_Node("CVREF"); + ((Processor*)cpu)->V06REF = new Stimulus_Node("V0.6REF"); + + ((Processor*)cpu)->CVREF->attach_stimulus(vr_pu); + ((Processor*)cpu)->CVREF->attach_stimulus(vr_pd); + ((Processor*)cpu)->V06REF->attach_stimulus(vr_06v); +} + +VRCON_2::~VRCON_2() +{ + delete vr_06v; + delete vr_pu; + delete vr_pd; + delete ((Processor *)cpu)->CVREF; + delete ((Processor *)cpu)->V06REF; +} + +void VRCON_2::put(uint new_value) +{ + uint old_value = value.get(); + uint diff = new_value ^ old_value; + + if (!diff) return; + + value.put(new_value); + + if (diff & VP6EN) // Turn 0.6 V reference on or off ? + { + if (new_value & VP6EN) vr_06v->set_Vth(0.6); + else vr_06v->set_Vth(0.0); + + ((Processor *)cpu)->V06REF->update(); + } + + if(diff & (C1VREN | C2VREN | VRR | VR3 | VR2 | VR1 | VR0)) + { + double vr_Rhigh, vr_Rlow; + if(new_value & (C1VREN | C2VREN)) + vr_pu->set_Vth(((Processor *)cpu)->get_Vdd()); + else vr_pu->set_Vth(0.0); + + vr_Rhigh = (8 + (16 - (new_value & 0x0f))) * 2000.; + vr_pu->set_Zth(vr_Rhigh); + vr_Rlow = (new_value & 0x0f) * 2000.; + + if (! (new_value & VRR)) vr_Rlow += 16000.; // High range ? + + vr_pd->set_Zth(vr_Rlow); + ((Processor *)cpu)->CVREF->update(); + ((Processor *)cpu)->CVREF->update(); + } +} + +CMxCON0::CMxCON0(Processor *pCpu, const char *pName, + const char *pDesc, uint _cm, ComparatorModule2 *cmModule) + : CMxCON0_base(pCpu, pName, pDesc, _cm, cmModule) +{ +} +CMxCON0::~CMxCON0() +{ +} + +void CMxCON0::put(uint new_value) +{ + uint old_value = value.get(); + uint diff = (new_value ^ old_value) & mValidBits; + + // assume masked bits are read-only + new_value = (new_value & mValidBits) | (old_value & ~mValidBits); + + value.put(new_value); + + if (diff == 0) + { + get(); + return; + } + + if (diff & CxOE) + { + cm_output = m_cmModule->cmxcon1[cm]->output_pin(); + if(new_value & CxOE) + { + char name[20]; + if ( ! cm_source) + cm_source = new CMxSignalSource(cm_output, this); + + snprintf(name, sizeof(name), "c%uout", cm + 1); + assert(cm_output); + + cm_output->setSource(cm_source); + cm_source_active = true; + } + else if (cm_source_active) // Enable output enable turned off + { + cm_output->setSource(0); + } + } + get(); +} +double CMxCON0::get_hysteresis() +{ + double ret = 0.; + if( value.get() & CxHYS ) ret = 0.05; + + return ret; +} + +double CMxCON0::get_Vpos() { return m_cmModule->cmxcon1[cm]->get_Vpos(); } +double CMxCON0::get_Vneg() { return m_cmModule->cmxcon1[cm]->get_Vneg(); } + +void CMxCON0::set_output(bool output) +{ + uint cmxcon0 = value.get(); + bool old_out = cmxcon0 & CxOUT; + + if(output) cmxcon0 |= CxOUT; + else cmxcon0 &= ~CxOUT; + + Dprintf(("cm%u POL %d output %d cmxcon0=%x old_out %d\n", cm+1, (bool)(cmxcon0 & CxPOL), output, cmxcon0, old_out)); + value.put(cmxcon0); + m_cmModule->set_cmout(cm, output); + + if (cmxcon0 & CxOE) + { + cm_source->putState(output?'1':'0'); + m_cmModule->cmxcon1[cm]->output_pin()->updatePinModule(); + } + if (old_out != output) // state change + { + // Positive going edge, set interrupt ? + if (output && (m_cmModule->cmxcon1[cm]->value.get() & CMxCON1::CxINTP)) + IntSrc->Trigger(); + + // Negative going edge, set interrupt ? + if (!output && (m_cmModule->cmxcon1[cm]->value.get() & CMxCON1::CxINTN)) + IntSrc->Trigger(); + } +} + +void CMxCON0_V2::put(uint new_value) +{ + uint old_value = value.get(); + uint diff = (new_value ^ old_value) & mValidBits; + + value.put(new_value); + + // assume masked bits are read-only + if (diff == 0) + { + get(); + return; + } + if ((diff & CxON) && !(new_value & CxON)) // turning off + { + cm_output = m_cmModule->cmxcon1[cm]->output_pin(cm); + + cm_output->setSource(0); + // remove stimulus from input pins + m_cmModule->cmxcon1[0]->setPinStimulus(0, POS+cm*2); + m_cmModule->cmxcon1[0]->setPinStimulus(0, NEG+cm*2); + return; + } + + if (diff & CxOE) + { + cm_output = m_cmModule->cmxcon1[cm]->output_pin(cm); + if(new_value & CxOE) + { + char name[20]; + if ( ! cm_source) cm_source = new CMxSignalSource(cm_output, this); + + snprintf(name, sizeof(name), "c%uout", cm + 1); + assert(cm_output); + + cm_output->setSource(cm_source); + cm_source_active = true; + } + else if (cm_source_active) // Enable output enable turned off + { + cm_output->setSource(0); + } + } + get(); +} +void CMxCON0_V2::set_output(bool output) +{ + uint cmxcon0 = value.get(); + uint cmxcon1 = m_cmModule->cmxcon1[cm]->value.get(); + bool old_out = cmxcon0 & CxOUT; + + if(output) + { + cmxcon0 |= CxOUT; + cmxcon1 |= ((cm==0)? CM2CON1_V2::MC1OUT : CM2CON1_V2::MC2OUT); + } + else + { + cmxcon0 &= ~CxOUT; + cmxcon1 &= ~((cm==0)? CM2CON1_V2::MC1OUT : CM2CON1_V2::MC2OUT); + } + Dprintf(("cm%u POL %d output %d cmxcon0=%x old_out %d\n", cm+1, (bool)(cmxcon0 & CxPOL), output, cmxcon0, old_out)); + value.put(cmxcon0); + m_cmModule->cmxcon1[cm]->value.put(cmxcon1); + m_cmModule->set_cmout(cm, output); + if (cmxcon0 & CxOE) + { + cm_source->putState(output?'1':'0'); + m_cmModule->cmxcon1[cm]->output_pin(cm)->updatePinModule(); + } + if (old_out != output) // state change + { + m_cmModule->cmxcon1[cm]->tmr_gate(cm, output); + // Positive going edge, set interrupt ? + if (output) + IntSrc->Trigger(); + } +} + +double CMxCON0_V2::get_hysteresis() +{ + double hyst_volt = 0.; + + if ( m_cmModule->cmxcon1[cm]->hyst_active(cm)) + { + hyst_volt = 0.05; // assume 50 mv hysteresis + } + + return hyst_volt; +} +CMxCON0_V2::CMxCON0_V2(Processor *pCpu, const char *pName, + const char *pDesc, uint _cm, ComparatorModule2 *cmModule) + : CMxCON0_base(pCpu, pName, pDesc, _cm, cmModule) +{ +} + +CMxCON0_V2::~CMxCON0_V2() +{ +} + +double CMxCON0_V2::get_Vpos() +{ + return m_cmModule->cmxcon1[cm]->get_Vpos(cm, value.get()); +} + +double CMxCON0_V2::get_Vneg() +{ + return m_cmModule->cmxcon1[cm]->get_Vneg(cm, value.get()); +} + +void CM2CON1_V4::put(uint new_value) +{ + value.put(new_value & mValidBits); + + if (m_cmModule->tmr1l[0]) + m_cmModule->tmr1l[0]->set_T1GSS((new_value & T1GSS) == T1GSS); +} + +double CM2CON1_V4::get_Vpos(uint cm, uint cmxcon0) +{ + double Voltage = 0.0; + + assert(m_vrcon); + if (cmxcon0 & CMxCON0_V2::CxR) // use Vref defined in cm2con1 + { + if ((cm == 0 && (m_vrcon->value.get() & VRCON_2::C1VREN)) || + (cm == 1 && (m_vrcon->value.get() & VRCON_2::C2VREN))) + { + Voltage = ((Processor *)cpu)->CVREF->get_nodeVoltage(); + Dprintf(("%s CVref %.2f\n", __FUNCTION__, Voltage)); + } + else + { + Voltage = ((Processor *)cpu)->V06REF->get_nodeVoltage(); + Dprintf(("%s cm%u V06ref %.2f\n", __FUNCTION__, cm+1, Voltage)); + } + } + else // use CM1IN+ or CM2IN+ + { + if (!stimulus_pin[POS]) + setPinStimulus(cm_inputPos[cm], POS); + Voltage = cm_inputPos[cm]->getPin().get_nodeVoltage(); + Dprintf(("%s cm%u %s %.2f\n", __FUNCTION__, cm+1, cm_inputPos[cm]->getPin().name().c_str(), Voltage)); + } + return Voltage; +} + CM2CON1_V4::CM2CON1_V4(Processor *pCpu, const char *pName, const char *pDesc, + uint _cm, ComparatorModule2 * cmModule) : + CM2CON1_V3(pCpu, pName, pDesc, _cm, cmModule), + m_vrcon(0) + { + cm1_cvref = new CM_stimulus((CMCON *)m_cmModule->cmxcon0[0], "cm1_cvref", 0, 1e12); + cm1_v06ref = new CM_stimulus((CMCON *)m_cmModule->cmxcon0[0], "cm1_v06ref", 0, 1e12); + cm2_cvref = new CM_stimulus((CMCON *)m_cmModule->cmxcon0[1], "cm2_cvref", 0, 1e12); + cm2_v06ref = new CM_stimulus((CMCON *)m_cmModule->cmxcon0[1], "cm2_v06ref", 0, 1e12); + ((Processor *)cpu)->CVREF->attach_stimulus(cm1_cvref); + ((Processor *)cpu)->V06REF->attach_stimulus(cm1_v06ref); + ((Processor *)cpu)->CVREF->attach_stimulus(cm2_cvref); + ((Processor *)cpu)->V06REF->attach_stimulus(cm2_v06ref); + } + CM2CON1_V4::~CM2CON1_V4() + { + ((Processor *)cpu)->CVREF->detach_stimulus(cm1_cvref); + ((Processor *)cpu)->V06REF->detach_stimulus(cm1_v06ref); + ((Processor *)cpu)->CVREF->detach_stimulus(cm2_cvref); + ((Processor *)cpu)->V06REF->detach_stimulus(cm2_v06ref); + delete cm1_cvref; + delete cm1_v06ref; + delete cm2_cvref; + delete cm2_v06ref; + } + +void CM2CON1_V3::put(uint new_value) +{ + uint old_value = value.get(); + + value.put(new_value & mValidBits); + if ((new_value ^ old_value) & C1RSEL) + m_cmModule->cmxcon0[0]->get(); + if ((new_value ^ old_value) & C2RSEL) + m_cmModule->cmxcon0[1]->get(); + + if (m_cmModule->tmr1l[0]) + m_cmModule->tmr1l[0]->set_T1GSS((new_value & T1GSS) == T1GSS); +} +double CM2CON1_V3::get_Vpos(uint cm, uint cmxcon0) +{ + double Voltage = 0.0; + uint cmxcon1 = value.get(); + + assert(m_vrcon); + if (cmxcon0 & CMxCON0_V2::CxR) // use Vref defined in cm2con1 + { + if ((cm == 0 && (cmxcon1 & C1RSEL)) | + (cm == 1 && (cmxcon1 & C2RSEL))) + { + Voltage = m_vrcon->get_Vref(); + Dprintf(("%s cm%u Vref %.2f\n", __FUNCTION__, cm+1, Voltage)); + } + else + { + Voltage = 0.6; + Dprintf(("%s cm%u Absref %.2f\n", __FUNCTION__, cm+1, Voltage)); + } + } + else // use CM1IN+ or CM2IN+ + { + if (stimulus_pin[POS] != cm_inputPos[cm]) + setPinStimulus(cm_inputPos[cm], POS); + Voltage = cm_inputPos[cm]->getPin().get_nodeVoltage(); + Dprintf(("%s cm%u %s %.2f\n", __FUNCTION__, cm+1, cm_inputPos[cm]->getPin().name().c_str(), Voltage)); + } + return Voltage; +} + +double CM2CON1_V3::get_Vneg(uint cm, uint cmxcon0) +{ + uint cxNchan = cmxcon0 & (CMxCON0_V2::CxCH0 | CMxCON0_V2::CxCH1); + if (stimulus_pin[NEG] != cm_inputNeg[cxNchan]) + setPinStimulus(cm_inputNeg[cxNchan], NEG); + Dprintf(("%s cm%u pin %u %s %.2f\n", __FUNCTION__, cm+1, cxNchan, cm_inputNeg[cxNchan]->getPin().name().c_str(), cm_inputNeg[cxNchan]->getPin().get_nodeVoltage())); + return cm_inputNeg[cxNchan]->getPin().get_nodeVoltage(); +} +//************************************************************* +// CM2CON1_V2 + +void CM2CON1_V2::put(uint new_value) +{ + uint old_value = value.get(); + new_value &= mValidBits; + uint diff = old_value ^ new_value; + + value.put(new_value); + if (diff & (C1RSEL | C1HYS)) + m_cmModule->cmxcon0[0]->get(); + if (diff & (C2RSEL | C2HYS)) + m_cmModule->cmxcon0[1]->get(); +} +void CM2CON1_V3::tmr_gate(uint cm, bool output) +{ + if (cm == 1 && m_cmModule->tmr1l[0]) //CM2 + { + Dprintf(("CM2CON1_V3::tmr_gate cm%u output=%d\n", cm+1, output)); + m_cmModule->tmr1l[0]->compare_gate(output); + } +} + +CM2CON1_V2::CM2CON1_V2(Processor *pCpu, const char *pName, + const char *pDesc, ComparatorModule2 * cmModule): + CMxCON1_base(pCpu, pName, pDesc, 0, cmModule), + ctmu_stim(0), ctmu_attached(false) +{ + assert(m_cmModule->cmxcon0[1]); + cm_stimulus[2] = new CM_stimulus((CMCON *)m_cmModule->cmxcon0[1], "cm_stimulus_2-", 0, 1e12); + cm_stimulus[3] = new CM_stimulus((CMCON *)m_cmModule->cmxcon0[1], "cm_stimulus_2+", 0, 1e12); + + ctmu_stimulus_pin = 0; +} + +CM2CON1_V2::~CM2CON1_V2() +{ + delete cm_stimulus[2]; + delete cm_stimulus[3]; +} + +double CM2CON1_V2::get_Vpos(uint cm, uint cmxcon0) +{ + double Voltage = 0.0; + uint cmxcon1 = value.get(); + + if (cmxcon0 & CMxCON0_V2::CxR) // use Vref defined in cm2con1 + { + if( (cm == 0 && (cmxcon1 & C1RSEL)) + | (cm == 1 && (cmxcon1 & C2RSEL))) + { + Voltage = m_cmModule->FVR_voltage; + Dprintf(("%s cm%u FVR %.2f\n", __FUNCTION__, cm+1, Voltage)); + } + else + { + Voltage = m_cmModule->DAC_voltage; + Dprintf(("%s cm%u DAC %.2f\n", __FUNCTION__, cm+1, Voltage)); + } + } + else // use CM1IN+ or CM2IN+ + { + if (stimulus_pin[POS+cm*2] != cm_inputPos[cm]) + setPinStimulus(cm_inputPos[cm], POS+cm*2); + + Voltage = cm_inputPos[cm]->getPin().get_nodeVoltage(); + Dprintf(("%s cm%u %s %.2f\n", __FUNCTION__, cm+1, cm_inputPos[cm]->getPin().name().c_str(), Voltage)); + } + return Voltage; +} + +double CM2CON1_V2::get_Vneg(uint cm, uint cmxcon0) +{ + uint cxNchan = cmxcon0 & (CMxCON0_V2::CxCH0 | CMxCON0_V2::CxCH1); + if (stimulus_pin[NEG+cm*2] != cm_inputNeg[cxNchan]) + setPinStimulus(cm_inputNeg[cxNchan], NEG+cm*2); + + if (cm_inputNeg[cxNchan]->getPin().snode) + cm_inputNeg[cxNchan]->getPin().snode->update(); + + Dprintf(("%s cm%u pin %u %s %.2f\n", __FUNCTION__, cm+1, cxNchan, cm_inputNeg[cxNchan]->getPin().name().c_str(), cm_inputNeg[cxNchan]->getPin().get_nodeVoltage())); + return cm_inputNeg[cxNchan]->getPin().get_nodeVoltage(); +} + +bool CM2CON1_V2::hyst_active(uint cm) +{ + bool hyst = false; + + if (cm == 0) hyst = value.get() & C1HYS; + else if (cm == 1) hyst = value.get() & C2HYS; + + return hyst; +} +void CM2CON1_V2::tmr_gate(uint cm, bool output) +{ + Dprintf(("CM2CON1_V2::tmr_gate cm%u output %d\n", cm+1, output)); + for( int i=0; i<3; i++ ) + { + if (m_cmModule->t1gcon[i]) + { + if (cm == 0) // CM1 + m_cmModule->t1gcon[i]->CM1_gate(output); + + else if (cm == 1) //CM2 + m_cmModule->t1gcon[i]->CM2_gate(output); + } + } +} + +void CM2CON1_V2::set_ctmu_stim(stimulus *_ctmu_stim, CTMU *_ctmu_module) +{ + if (_ctmu_stim) + { + if (!m_cmModule->ctmu_module) + m_cmModule->ctmu_module = _ctmu_module; + ctmu_stim = _ctmu_stim; + attach_ctmu_stim(); + } + else + { + detach_ctmu_stim(); + ctmu_stim = 0; + } +} + +void CM2CON1_V2::attach_ctmu_stim() +{ + if (!cm_inputNeg[1]) + { + fprintf(stderr, "ERROR CM2CON1_V2::attach_ctmu_stim C12IN1- not defined\n"); + return; + } + if (!(cm_inputNeg[1]->getPin().snode)) + { + printf("Warning CM2CON1_V2::attach_ctmu_stim %s has no node attached CTMU will not work properly\n", cm_inputNeg[1]->getPin().name().c_str()); + return; + } + if (ctmu_stim) + { + cm_inputNeg[1]->getPin().snode->attach_stimulus(ctmu_stim); + cm_inputNeg[1]->getPin().snode->update(); + ctmu_attached = true; + } +} + +void CM2CON1_V2::detach_ctmu_stim() +{ + if (ctmu_attached) + { + cm_inputNeg[1]->getPin().snode->detach_stimulus(ctmu_stim); + cm_inputNeg[1]->getPin().snode->update(); + ctmu_attached = false; + } +} + +CMxCON1::CMxCON1(Processor *pCpu, const char *pName, const char *pDesc, uint _cm, ComparatorModule2 *cmModule) + : CMxCON1_base(pCpu, pName, pDesc, _cm, cmModule) +{ +} + +CMxCON1::~CMxCON1() +{ +} + +CMxCON1_base::CMxCON1_base(Processor *pCpu, const char *pName, + const char *pDesc, uint _cm, ComparatorModule2 *cmModule) + : sfr_register(pCpu, pName, pDesc), + cm(_cm), m_cmModule(cmModule) +{ + + assert(m_cmModule->cmxcon0[cm]); + cm_stimulus[NEG] = new CM_stimulus((CMCON *)m_cmModule->cmxcon0[cm], "cm_stimulus_-", 0, 1e12); + cm_stimulus[POS] = new CM_stimulus((CMCON *)m_cmModule->cmxcon0[cm], "cm_stimulus_+", 0, 1e12); + + for(int i = 0; i<5; i++) cm_inputNeg[i] = 0; + + for(int i = 0; i<2; i++) + { + stimulus_pin[i] = 0; + stimulus_pin[i+2] = 0; + cm_inputPos[i] = 0; + cm_output[i] = 0; + } + ctmu_stimulus_pin = 0; +} + +CMxCON1_base::~CMxCON1_base() +{ + delete cm_stimulus[NEG]; + delete cm_stimulus[POS]; +} + +double CMxCON1::get_Vneg(uint arg, uint arg2) +{ + uint cxNchan = value.get() & CxNMASK; + if (!stimulus_pin[NEG]) + setPinStimulus(cm_inputNeg[cxNchan], NEG); + if (cm_inputNeg[cxNchan]->getPin().snode) + cm_inputNeg[cxNchan]->getPin().snode->update(); + Dprintf(("%s pin %u %s %.2f\n", __FUNCTION__, cxNchan, cm_inputNeg[cxNchan]->getPin().name().c_str(), cm_inputNeg[cxNchan]->getPin().get_nodeVoltage())); + return cm_inputNeg[cxNchan]->getPin().get_nodeVoltage(); +} + +double CMxCON1::get_Vpos(uint arg, uint arg2) +{ + uint cxPchan = (value.get() & CxPMASK) >> 3; + double Voltage; + + switch(cxPchan) + { + case 0: + if (stimulus_pin[POS] != cm_inputPos[cxPchan]) + setPinStimulus(cm_inputPos[cxPchan], POS); + Voltage = cm_inputPos[cxPchan]->getPin().get_nodeVoltage(); + Dprintf(("%s %s %s v=%.2f\n", name().c_str(), __FUNCTION__, cm_inputPos[cxPchan]->getPin().name().c_str(), Voltage)); + break; + + case 2: + Voltage = m_cmModule->DAC_voltage; + Dprintf(("%s %s %s v=%.2f\n", name().c_str(), __FUNCTION__, "DAC", Voltage)); + break; + + case 4: + Voltage = m_cmModule->FVR_voltage; + Dprintf(("%s %s %s v=%.2f\n", name().c_str(), __FUNCTION__, "FVR", Voltage)); + break; + + default: + printf("CMxCON1::get_Vpos unexpected Pchan %x\n", cxPchan); + case 6: + Voltage = 0.; + Dprintf(("%s %s %s v=%.2f\n", name().c_str(), __FUNCTION__, "AGND", Voltage)); + break; + } + return Voltage; + +} + +// Attach a stimulus to an input pin so that changes +// in the pin voltage can be reflected in the comparator output. +// +// pin may be 0 in which case a current stimulus, if any, will be detached +// pol is either the enum POS or NEG +// +void CMxCON1_base::setPinStimulus(PinModule *pin, int pol) +{ + if (pin == stimulus_pin[pol]) return; + + if (stimulus_pin[pol]) + { + (stimulus_pin[pol]->getPin().snode)->detach_stimulus(cm_stimulus[pol]); + stimulus_pin[pol] = 0; + } + if (pin && pin->getPin().snode) + { + stimulus_pin[pol] = pin; + (stimulus_pin[pol]->getPin().snode)->attach_stimulus(cm_stimulus[pol]); + } +} +void CMxCON1::put(uint new_value) +{ + uint old_value = value.get(); + new_value &= mValidBits; + uint diff = old_value ^ new_value; + + value.put(new_value); + + if ((diff & CxNMASK) || !stimulus_pin[NEG]) + { + uint cxNchan = new_value & CxNMASK; + + setPinStimulus(cm_inputNeg[cxNchan], NEG); + + } + if ((diff & CxPMASK) || !stimulus_pin[POS]) + { + uint cxPchan = (new_value & CxPMASK) >> 3; + + if (cxPchan == 0) setPinStimulus(cm_inputPos[cxPchan], POS); + else if (stimulus_pin[POS]) setPinStimulus(0, POS); + } + m_cmModule->run_get(cm); +} + +void CMxCON1_base::set_OUTpin(PinModule *pin_cm0, PinModule *pin_cm1) +{ + cm_output[0] = pin_cm0; + cm_output[1] = pin_cm1; +} + +void CMxCON1_base::set_INpinNeg(PinModule *pin_cm0, PinModule *pin_cm1, PinModule *pin_cm2, PinModule *pin_cm3, PinModule *pin_cm4) +{ + cm_inputNeg[0] = pin_cm0; + cm_inputNeg[1] = pin_cm1; + cm_inputNeg[2] = pin_cm2; + cm_inputNeg[3] = pin_cm3; + cm_inputNeg[4] = pin_cm4; +} +void CMxCON1_base::set_INpinPos(PinModule *pin_cm0, PinModule *pin_cm1) +{ + cm_inputPos[0] = pin_cm0; + cm_inputPos[1] = pin_cm1; +} + +ComparatorModule2::ComparatorModule2(Processor *pCpu) +{ + for(int i = 0; i < 4; i++) + { + cmxcon0[i] = 0; + cmxcon1[i] = 0; + } + cmout = 0; + t1gcon[0] = t1gcon[1] = t1gcon[2] = 0; + tmr1l[0] = tmr1l[1] = tmr1l[2] = 0; + eccpas[0] = eccpas[1] = eccpas[2] = 0; + sr_module = 0; + ctmu_module = 0; + for( int i=0; i<4; i++ ) m_clc[i] = 0; +} +ComparatorModule2::~ComparatorModule2() +{ + for( int i = 0; i < 4; i++ ) + { + if (cmxcon0[i]) delete cmxcon0[i]; + if (cmxcon1[i]) delete cmxcon1[i]; + + if (i < 3 && cmxcon1[i] == cmxcon1[i+1]) + cmxcon1[i+1] = 0; + } + if (cmout) delete cmout; +} + +// this function sets the bits in the CMOUT register and also +// sends the state to the T1GCON class if t1gcon is defined +// +void ComparatorModule2::set_cmout(uint bit, bool value) +{ + int i; + + if (cmout) + { + if( value ) cmout->value.put(cmout->value.get() | (1<value.put(cmout->value.get() &~(1<CxOUT_sync(value, bit); + + switch(bit) + { + case 0: //CM1 + for(i=0; i < 3; i++) + { + if (t1gcon[i]) t1gcon[i]->CM1_gate(value); + if (eccpas[i]) eccpas[i]->c1_output(value); + } + if (sr_module) sr_module->syncC1out(value); + break; + + case 1: //CM2 + for(i=0; i < 3; i++) + { + if (t1gcon[i]) t1gcon[i]->CM2_gate(value); + if (eccpas[i]) eccpas[i]->c2_output(value); + } + if (sr_module) sr_module->syncC2out(value); + if (ctmu_module) ctmu_module->syncC2out(value); + break; + + default: //Do nothing other CMs + break; + } +} + +void ComparatorModule2::set_DAC_volt(double _volt) +{ + DAC_voltage = _volt; + for (int i=0; i < 4; i++) + { + if (cmxcon0[i]) cmxcon0[i]->get(); + } +} +void ComparatorModule2::set_FVR_volt(double _volt) +{ + FVR_voltage = _volt; + Dprintf(("ComparatorModule2::set_FVR_volt %.2f\n", FVR_voltage)); + for (int i=0; i < 4; i++) + { + if (cmxcon0[i]) cmxcon0[i]->get(); + } +} +// set interrupt for comparator cm +void ComparatorModule2::set_if(uint cm) +{ + switch(cm) + { + case 0: + pir_set->set_c1if(); + break; + + case 1: + pir_set->set_c2if(); + break; + + case 2: + pir_set->set_c3if(); + break; + + case 3: + pir_set->set_c4if(); + break; + } +} diff --git a/src/gpsim/modules/comparator.h b/src/gpsim/modules/comparator.h new file mode 100644 index 0000000..4c1f173 --- /dev/null +++ b/src/gpsim/modules/comparator.h @@ -0,0 +1,682 @@ +/* + Copyright (C) 1998-2002 T. Scott Dattalo + Copyright (C) 2006,2010,2013 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __COMPARATOR_H__ +#define __COMPARATOR_H__ + +#include "14bit-tmrs.h" +#include +#include + +/*************************************************************************** + * + * Include file for: Processors with dual comparators and Voltage Refarence + * + * + * + ***************************************************************************/ + +#define CFG_MASK 0xf +#define CFG_SHIFT 4 + +class CMSignalSource; +class CMxSignalSource; +class VRSignalSource; +class CMCON; +class TMRL; +class ADCON2_TRIG; +class CLC; + + enum compare_inputs + { + AN0 = 0, + AN1, + AN2, + AN3, + AN4, + AN5, + VREF = 6, // use reference voltage + NO_IN = 7, // no input port + V06 = 8 // Reference voltage 0.6 + }; + enum compare_outputs + { + OUT0 = 0, + OUT1, + ZERO = 6, // register value == 0 + NO_OUT = 7 // no ouput port + }; + +class VRCON : public sfr_register +{ + public: + + CMCON *_cmcon; + + enum VRCON_bits + { + VR0 = 1<<0, // VR0-3 Value selection + VR1 = 1<<1, + VR2 = 1<<2, + VR3 = 1<<3, + VRSS = 1<<4, // Use external references (16f88x) + VRR = 1<<5, // Range select + VROE = 1<<6, // Output Reference to external pin + VREN = 1<<7 // Enable Vref + }; + + VRCON(Processor *pCpu, const char *pName, const char *pDesc); + ~VRCON(); + + virtual void put(uint new_value); + virtual void setIOpin(PinModule *); + virtual double get_Vref(); + void setValidBits(uint mask) { valid_bits = mask;} + +protected: + uint valid_bits; + PinModule *vr_PinModule; + double vr_Vref; + stimulus *vr_pu; + stimulus *vr_pd; + stimulus *vr_06v; + double vr_Rhigh; + double vr_Rlow; + double Vref_high; // usually VDD + double Vref_low; // usually VSS + char *pin_name; // original name of pin + +}; + +// VSCOM class with two comparators as per 16f690 +// +class VRCON_2 : public sfr_register +{ + public: + + CMCON *_cmcon; + + enum VRCON_bits + { + VR0 = 1<<0, // VR0-3 Value selection + VR1 = 1<<1, + VR2 = 1<<2, + VR3 = 1<<3, + VP6EN = 1<<4, // 0.6V reference enable + VRR = 1<<5, // Range select + C2VREN = 1<<6, // Comparator 2 Reference enable + C1VREN = 1<<7 // Comparator 1 Reference enable + }; + + VRCON_2(Processor *pCpu, const char *pName, const char *pDesc); + ~VRCON_2(); + + virtual void put(uint new_value); + +protected: + uint valid_bits; + PinModule *vr_PinModule; + double vr_Vref; + stimulus *vr_pu; + stimulus *vr_pd; + stimulus *vr_06v; + char *pin_name; // original name of pin + +}; + +class CM_stimulus : public stimulus +{ + public: + + CM_stimulus(CMCON *arg, const char *n=0, + double _Vth=0.0, double _Zth=1e12 + ); + ~CM_stimulus(); + + CMCON *_cmcon; + + virtual void set_nodeVoltage(double v); + +}; +class CM2CON1_V2; + +class CMv2_stimulus : public stimulus +{ + public: + + CMv2_stimulus(CM2CON1_V2 *arg, const char *n=0, + double _Vth=0.0, double _Zth=1e12 + ); + ~CMv2_stimulus(); + + CM2CON1_V2 *_cm2con1; + + virtual void set_nodeVoltage(double v); + +}; +class CMCON1 : public sfr_register +{ + public: + enum CMCON1_bits + { + CMSYNC = 1<<0, + T1GSS = 1<<1 + }; + + virtual void put(uint); + void set_tmrl(TMRL *arg) { m_tmrl = arg; } + CMCON1(Processor *pCpu, const char *pName, const char *pDesc); + ~CMCON1(); + + private: + TMRL *m_tmrl; + uint valid_bits; + +}; + +class CMCON : public sfr_register +{ + public: + + + VRCON *_vrcon; + enum CMCON_bits + { + CM0 = 1<<0, + CM1 = 1<<1, + CM2 = 1<<2, + CIS = 1<<3, + C1INV = 1<<4, + C2INV = 1<<5, + C1OUT = 1<<6, + C2OUT = 1<<7, + }; + + + virtual void setINpin(int i, PinModule *, const char *an); + virtual void setOUTpin(int i, PinModule *); + virtual void assign_pir_set(PIR_SET *new_pir_set); + virtual uint get(); + virtual void rename_pins(uint) { puts("CMCON::rename_pins() should not be called");} + virtual void put(uint); + virtual void set_configuration(int comp, int mode, int il1, int ih1, int il2, int ih2, int out); + virtual double comp_voltage(int ind, int invert); + + void releasePin(int); + + + + void set_tmrl(TMRL *arg) { m_tmrl = arg; } + void set_eccpas(ECCPAS *_eccpas) { m_eccpas = _eccpas; } + CMCON(Processor *pCpu, const char *pName, const char *pDesc); + ~CMCON(); + +protected: + PinModule *cm_input[4]; + PinModule *cm_output[2]; + char *cm_input_pin[4]; + char *cm_an[4]; + char *cm_output_pin[2]; + CMSignalSource *cm_source[2]; + bool cm_source_active[2]; + uint m_CMval[2]; + PIR_SET *pir_set; + TMRL *m_tmrl; + CM_stimulus *cm_stimulus[6]; + ECCPAS *m_eccpas; + + static const int cMaxConfigurations=8; + static const int cMaxComparators=2; + + uint32_t m_configuration_bits[cMaxComparators][cMaxConfigurations]; + +}; + +class ComparatorModule +{ + public: + + ComparatorModule(Processor *); + void initialize( PIR_SET *pir_set, PinModule *pin_vr0, PinModule *pin_cm0, + PinModule *pin_cm1, PinModule *pin_cm2, + PinModule *pin_cm3, PinModule *pin_cm4, PinModule *pin_cm5); + //protected: + CMCON cmcon; + CMCON1 cmcon1; + VRCON vrcon; + +}; + +/* + * Compare module for 16f88x processors + */ + +class CM1CON0; +class CM1CON0_2; +class CM2CON0; + +/* + * SRCON SR Latch Control Register + */ +class SRCON : public sfr_register +{ + public: + + + enum SRCON_bits + { + FVREN = 1<<0, // Fixed Voltage Reference Enable + PULSR = 1<<2, // Pulse Reset of SR latch + PULSS = 1<<3, // Pulse set of SR Latch + C2REN = 1<<4, // C2OUT resets SR latch + C1SEN = 1<<5, // C1OUT sets SR latch + SR0 = 1<<6, // MUX SR Q out and C1OUT + SR1 = 1<<7 // MUX SR -Q out and C2OUT + }; + int writable_bits; + bool SR_Q; + bool set; + bool reset; + + virtual void put(uint new_value); + + SRCON(Processor *pCpu, const char *pName, const char *pDesc); + ~SRCON(){} +}; + +/* + * CM2CON1 Comparator control register 1 + */ +class CM2CON1 : public sfr_register +{ + public: + + + enum CM2CON1_bits + { + C2SYNC = 1<<0, //C2 Output sync bit + T1GSS = 1<<1, // Timer1 Gate Source Select bit + C2RSEL = 1<<4, // C2 Reference Select bit + C1RSEL = 1<<5, // C1 Reference Select bit + MC2OUT = 1<<6, // Mirror C2OUT bit + MC1OUT = 1<<7 // Mirror C1OUT bit + }; + int writable_bits; + CM1CON0 *m_cm1con0; + CM2CON0 *m_cm2con0; + + virtual void put(uint new_value); + void link_cm12con0(CM1CON0 *_cm1con0, CM2CON0 *_cm2con0); + + CM2CON1(Processor *pCpu, const char *pName, const char *pDesc); + ~CM2CON1(){} +}; + +class CM12SignalSource; + +// The following classes are for comparators which have 3 registers +// +class CMxCON1; +class ComparatorModule2; + +class CMxCON0_base : public sfr_register +{ +public: + + enum { + ON = 1<<7, + OE = 1<<5 + }; + virtual uint get(); + virtual double get_Vpos(){return 0.;} + virtual double get_Vneg(){return 0.;} + virtual void put(uint) { puts("Help");} +// virtual int get(){return 0;} + virtual void setBitMask(uint bm) { mValidBits = bm; } + virtual void setIntSrc(InterruptSource *_IntSrc) { IntSrc = _IntSrc;} + virtual double CVref(){return 0.;} + virtual void notify(){;} + virtual bool output_active() { return value.get() & (ON | OE); } + virtual double get_hysteresis(){ return 0.;} + virtual bool output_high() { return false;} + virtual void set_output(bool output) { ;} + virtual bool is_on(){return false;} + virtual bool out_invert(){ return true;} + virtual void releasePin(){ cm_source_active = false;} + + CMxCON0_base(Processor *pCpu, const char *pName, const char *pDesc, + uint _cm, ComparatorModule2 *cmModule); + ~CMxCON0_base(); + + + uint mValidBits; + PinModule *cm_input[5]; + PinModule *cm_output; + CM2CON1 *m_cm2con1; + SRCON *m_srcon; +// PIR_SET *pir_set; + InterruptSource *IntSrc; +// TMRL *m_tmrl; + CM_stimulus *cm_stimulus[2]; + Stimulus_Node *cm_snode[2]; + ECCPAS *m_eccpas; + uint cm; // comparator number + CMxCON1 *m_cmxcon1; + ComparatorModule2 *m_cmModule; + CMxSignalSource *cm_source; + bool cm_source_active; + +}; + +class CMxCON0 : public CMxCON0_base +{ + public: + + enum + { + CxSYNC = 1<<0, // Output Synchronous Mode bit + CxHYS = 1<<1, // Hysteresis Enable bit + CxSP = 1<<2, // Speed/Power Select bit + CxZLF = 1<<3, // Zero Latency Filter Enable bit + CxPOL = 1<<4, // Output polarity select bit + CxOE = 1<<5, // Output enable + CxOUT = 1<<6, // Output bit + CxON = 1<<7, // Enable bit + }; + + CMxCON0(Processor *pCpu, const char *pName, const char *pDesc, uint x, ComparatorModule2 *); + ~CMxCON0(); + void put(uint); + virtual double get_Vpos(); + virtual double get_Vneg(); + void setBitMask(uint bm) { mValidBits = bm; } + virtual bool is_on() { return (value.get() & CxON);} + virtual bool out_invert() { return value.get() & CxPOL;} + virtual double get_hysteresis(); + virtual void set_output(bool output); + virtual bool output_high() { return value.get() & CxOUT; } +}; + +class CMxCON0_V2 : public CMxCON0_base +{ + public: + + enum + { + CxCH0 = 1<<0, // Channel select bit 0 + CxCH1 = 1<<1, // Channel select bit 1 + CxR = 1<<2, // Reference select bit (non-inverting input) + CxPOL = 1<<4, // Output polarity select bit + CxOE = 1<<5, // Output enable + CxOUT = 1<<6, // Output bit + CxON = 1<<7, // Enable bit + NEG = 0, + POS = 1, + }; + + CMxCON0_V2(Processor *pCpu, const char *pName, const char *pDesc, + uint _cm, ComparatorModule2 *cmModule); + ~CMxCON0_V2(); + virtual void put(uint); + virtual double get_Vpos(); + virtual double get_Vneg(); + void setBitMask(uint bm) { mValidBits = bm; } + virtual bool is_on() { return (value.get() & CxON);} + virtual bool out_invert() { return value.get() & CxPOL;} + virtual double get_hysteresis(); + virtual void set_output(bool output); + virtual bool output_high() { return value.get() & CxOUT; } + + PinModule *stimulus_pin[2]; +}; + +class CMxCON1_base : public sfr_register +{ + public: + + enum { + NEG = 0, + POS = 1 + + }; + CMxCON1_base(Processor *pCpu, const char *pName, const char *pDesc, uint _cm, ComparatorModule2 *); + ~CMxCON1_base(); + + void setBitMask(uint bm) { mValidBits = bm; } + PinModule *output_pin(int cm=0) { return cm_output[cm]; } + virtual void put(uint new_value){} + virtual double get_Vpos(uint arg=0, uint arg2=0){ return 0.;} + virtual double get_Vneg(uint arg=0, uint arg2=0){ return 0.;} + virtual void setPinStimulus(PinModule *, int); + virtual void set_INpinNeg(PinModule *pin_cm0, PinModule *pin_cm1, + PinModule *pin_cm2=0, PinModule *pin_cm3=0, + PinModule *pin_cm4=0); + virtual void set_OUTpin(PinModule *pin_cm0, PinModule *pin_cm1=0); + virtual void set_INpinPos(PinModule *pin_cm0, PinModule *pin_cm1=0); + virtual bool hyst_active(uint cm) { return false;} + virtual void set_vrcon(VRCON *vrcon) {;} + virtual void set_vrcon(VRCON_2 *vrcon) {;} + virtual void tmr_gate(uint cm, bool output) {;} + +protected: + + uint cm; // comparator number + CM_stimulus *cm_stimulus[4]; // stimuli to monitor input pin + PinModule *stimulus_pin[4]; // monitor stimulus loaded on this pin + PinModule *ctmu_stimulus_pin; // ctmu stimulus pin + ComparatorModule2 *m_cmModule; + PinModule *cm_inputNeg[5]; + PinModule *cm_inputPos[2]; + PinModule *cm_output[2]; +}; +// CMxCON1 only uses 1 0r 2 of Negative select bits and 2 Positive select bits +class CMxCON1 : public CMxCON1_base +{ + public: + + enum + { + CxNCH0 = 1<<0, // Negative Input Channel Select bits + CxNCH1 = 1<<1, // Negative Input Channel Select bits + CxNCH2 = 1<<2, // Negative Input Channel Select bits + CxPCH0 = 1<<3, // Positive Input Channel Select bits + CxPCH1 = 1<<4, // Positive Input Channel Select bits + CxPCH2 = 1<<5, // Positive Input Channel Select bits + CxINTN = 1<<6, // Interrupt on Negative Going Edge Enable bits + CxINTP = 1<<7, // Interrupt on Positive Going Edge Enable bits + CxNMASK = (CxNCH0 | CxNCH1 | CxNCH2), + CxPMASK = (CxPCH0 | CxPCH1 | CxPCH2) + }; + CMxCON1(Processor *pCpu, const char *pName, const char *pDesc, uint _x, ComparatorModule2 *); + ~CMxCON1(); + + virtual void put(uint new_value); + virtual double get_Vpos(uint arg=0, uint arg2=0); + virtual double get_Vneg(uint arg=0, uint arg2 = 0); + +}; + +class CTMU; +/* two comparators with common CM2CON1 and no COUT register, hyteresis, + C1, C2 possible T1,3,5 gate, FVR or DAC for voltage reference, + used by 18f26k22. +*/ +class CM2CON1_V2 : public CMxCON1_base +{ + public: + + enum + { + C2SYNC = 1<<0, + C1SYNC = 1<<1, + C2HYS = 1<<2, + C1HYS = 1<<3, + C2RSEL = 1<<4, + C1RSEL = 1<<5, + MC2OUT = 1<<6, + MC1OUT = 1<<7 + }; + + + CM2CON1_V2(Processor *pCpu, const char *pName, const char *pDesc, + ComparatorModule2 * cmModule); + ~CM2CON1_V2(); + + virtual void put(uint new_value); + virtual double get_Vpos(uint cm, uint cmxcon0); + virtual double get_Vneg(uint cm, uint cmxcon0); + virtual bool hyst_active(uint cm); + virtual void tmr_gate(uint cm, bool output); + void set_ctmu_stim(stimulus *_ctmu_stim, CTMU *_ctmu_module); + void attach_ctmu_stim(); + void detach_ctmu_stim(); + +private: + stimulus *ctmu_stim; + stimulus *comp_input_cap; + bool ctmu_attached; +}; +/* two comparators, no hyteresis, cm2con1 controls t1 gate, + C2 possible T1 gate, vrcon for voltage reference + used by 16f882. +*/ + +class CM2CON1_V3 : public CMxCON1_base +{ + public: + + enum + { + C2SYNC = 1<<0, + T1GSS = 1<<1, + C2RSEL = 1<<4, + C1RSEL = 1<<5, + MC2OUT = 1<<6, + MC1OUT = 1<<7 + }; + + + CM2CON1_V3(Processor *pCpu, const char *pName, const char *pDesc, + uint _cm, ComparatorModule2 * cmModule) : + CMxCON1_base(pCpu, pName, pDesc, _cm, cmModule), m_vrcon(0){} + ~CM2CON1_V3(){} + virtual void put(uint new_value); + virtual double get_Vpos(uint cm, uint cmxcon0); + virtual double get_Vneg(uint cm, uint cmxcon0); + virtual bool hyst_active(uint cm) { return false;} + void set_vrcon(VRCON * _vrcon) { m_vrcon = _vrcon; } + virtual void tmr_gate(uint cm, bool output); + +protected: + VRCON *m_vrcon; + +}; +/* two comparators, no hyteresis, cm2con1 controls t1 gate, + C2 possible T1 gate, VRCON for voltage reference + Like CM2CON1_V3 without C1RSEL, C2RSEL + used by 16f690. +*/ + +class CM2CON1_V4 : public CM2CON1_V3 +{ + public: + + + CM2CON1_V4(Processor *pCpu, const char *pName, const char *pDesc, + uint _cm, ComparatorModule2 * cmModule) ; + ~CM2CON1_V4(); + virtual void put(uint new_value); + virtual double get_Vpos(uint cm, uint cmxcon0); + void set_vrcon(VRCON_2 * _vrcon) { m_vrcon = _vrcon; } + +protected: + VRCON_2 *m_vrcon; + CM_stimulus *cm1_cvref; + CM_stimulus *cm1_v06ref; + CM_stimulus *cm2_cvref; + CM_stimulus *cm2_v06ref; +}; +class CMOUT : public sfr_register +{ + public: + + void put(uint val) { return;} // Read only by user + + CMOUT(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) {} + +}; + +// uses CMxCON0, CMxCON1, CMOUT +class ComparatorModule2 +{ + public: + + ComparatorModule2(Processor *); + ~ComparatorModule2(); + + void run_get(uint comp) { cmxcon0[comp]->get();} + + + void set_DAC_volt(double); + void set_FVR_volt(double); + void set_cmout(uint bit, bool value); + void set_if(uint); + void assign_pir_set(PIR_SET *new_pir_set){ pir_set = new_pir_set;} + void assign_tmr1l(TMRL *t1, TMRL *t3 = 0, TMRL *t5 = 0) + { + tmr1l[0] = t1; + tmr1l[1] = t3; + tmr1l[2] = t5; + } + void assign_t1gcon(T1GCON *t1g, T1GCON *t3g = 0, T1GCON *t5g = 0) + { + t1gcon[0] = t1g; + t1gcon[1] = t3g; + t1gcon[2] = t5g; + } + void assign_sr_module(SR_MODULE *_sr_module) { sr_module = _sr_module;} + + void assign_eccpsas(ECCPAS *a1, ECCPAS *a2=0, ECCPAS *a3=0) + { + eccpas[0] = a1; + eccpas[1] = a2; + eccpas[2] = a3; + } + + + CMxCON0_base *cmxcon0[4]; + CMxCON1_base *cmxcon1[4]; + CMOUT *cmout; + +//protected: + double DAC_voltage; + double FVR_voltage; + PIR_SET *pir_set; + TMRL *tmr1l[3]; + T1GCON *t1gcon[3]; + SR_MODULE *sr_module; + CTMU *ctmu_module; + ECCPAS *eccpas[3]; + ADCON2_TRIG *m_adcon2; + CLC *m_clc[4]; +}; +#endif // __COMPARATOR_H__ diff --git a/src/gpsim/modules/ctmu.cc b/src/gpsim/modules/ctmu.cc new file mode 100644 index 0000000..733924a --- /dev/null +++ b/src/gpsim/modules/ctmu.cc @@ -0,0 +1,356 @@ +/* + Copyright (C) 2015 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include "config.h" +#include "14bit-processors.h" +#include "14bit-registers.h" +#include "a2d_v2.h" +#include "ctmu.h" + +//#define DEBUG +#if defined(DEBUG) +#include "config.h" +#define Dprintf(arg) {printf("%s:%d ",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + + +CTMUCONH::CTMUCONH(Processor *pCpu, const char *pName, + const char *pDesc, CTMU *_ctmu) + : sfr_register(pCpu,pName,pDesc), + ctmu(_ctmu) +{ + ctmu->ctmuconh = this; +} + + +void CTMUCONH::put(uint new_value) +{ + uint diff = value.get() ^ new_value; + + value.put(new_value); + if (diff & CTMUEN) // on or off + { + if (new_value & CTMUEN) // enable CTMU + ctmu->enable(new_value); + else + ctmu->disable(); // disable CTMU + } + if ((diff & TGEN) || (diff & CTMUEN)) // Pulse generation + { + if ((new_value & TGEN) && (new_value & CTMUEN)) + ctmu->tgen_on(); + else + ctmu->tgen_off(); + } + if (diff & IDISSEN) + ctmu->idissen(new_value & IDISSEN); +} + +CTMUCONL::CTMUCONL(Processor *pCpu, const char *pName, + const char *pDesc, CTMU *_ctmu) + : sfr_register(pCpu,pName,pDesc), + ctmu(_ctmu) +{ + ctmu->ctmuconl = this; +} + + +void CTMUCONL::put(uint new_value) +{ + uint diff = value.get() ^ new_value; + + value.put(new_value); + if (diff) + ctmu->stat_change(); +} + +CTMUICON::CTMUICON(Processor *pCpu, const char *pName, + const char *pDesc, CTMU *_ctmu) + : sfr_register(pCpu,pName,pDesc), + ctmu(_ctmu) +{ + ctmu->ctmuicon = this; +} + +void CTMUICON::put(uint new_value) +{ + uint diff = value.get() ^ new_value; + int adj= ((new_value & 0xfc) >>2); + double I; + + value.put(new_value); + + if (!diff) return; + + if (new_value & ITRIM5) adj -= 0x40; + + switch(new_value & (IRNG0|IRNG1)) + { + case 0: // Current off + I = 0.; + break; + + case 1: // Base current + I = 0.55e-6; // 0.55 uA + break; + + case 2: // 10x Range + I = 5.5e-6; //5.5 uA + break; + + case 3: // 100x Range + I = 55e-6; // 55 uA + } + // AN1250 page 4 says adjustment steps 2%, no value found in 18f26k22 + // spec sheet + I += I * adj * 0.02; + + ctmu->new_current(I); +} + + +class CTMU_SignalSink : public SignalSink +{ + public: + CTMU_SignalSink(CTMU *_ctmu) + : m_state(false), m_ctmu(_ctmu) + { + assert(_ctmu); + } + + virtual void setSinkState(char new3State) + { + m_state = ((new3State == '0') | (new3State == 'w'))?false:true; + m_ctmu->new_edge(); + } + virtual void release() { delete this; } + bool get_state() { return m_state;} + + private: + bool m_state; + CTMU *m_ctmu; +}; + + +CTMU::CTMU(Processor *pCpu): cted1_state(false), cted2_state(false), + ctmu_stim(0), m_cted1(0), m_cted2(0), + ctmu_cted1_sink(0),ctmu_cted2_sink(0), + ctpls_source(0), cpu(pCpu) +{ +} +void CTMU::enable(uint value) +{ + if (!ctmu_cted1_sink) + { + ctmu_cted1_sink = new CTMU_SignalSink(this); + ctmu_cted2_sink = new CTMU_SignalSink(this); + } + m_cted1->addSink(ctmu_cted1_sink); + m_cted2->addSink(ctmu_cted2_sink); + + idissen(value & CTMUCONH::IDISSEN); + stat_change(); +} + + +void CTMU::disable() +{ + current_off(); + if (ctmu_cted1_sink) + { + m_cted1->removeSink(ctmu_cted1_sink); + m_cted2->removeSink(ctmu_cted2_sink); + delete ctmu_cted1_sink; ctmu_cted1_sink = 0; + delete ctmu_cted2_sink; ctmu_cted2_sink = 0; + } +} +void CTMU::current_off() +{ + ctmu_stim->set_Vth(cpu->get_Vdd()); + ctmu_stim->set_Zth(1e12); + ctmu_stim->updateNode(); +} +void CTMU::new_current(double I) +{ + current = I; + if (I) + resistance = Vsrc / I; + else + resistance = 1e12; +} + +void CTMU::stat_change() +{ + uint value = ctmuconl->value.get(); + bool edg1 = value & CTMUCONL::EDG1STAT; + bool edg2 = value & CTMUCONL::EDG2STAT; + + // Don't do anything is CTMU not enables + if (! (ctmuconh->value.get() & CTMUCONH::CTMUEN)) + return; + + /* either edg1 or edg2 set, but not both */ + if(edg1 ^ edg2) + { + ctmu_stim->set_Vth(Vsrc); + ctmu_stim->set_Zth(resistance); + ctmu_stim->updateNode(); + if (ctmuconh->value.get() & CTMUCONH::TGEN) + ctpls_source->putState('1'); + } + else + { + current_off(); + if (ctmuconh->value.get() & CTMUCONH::TGEN) + ctpls_source->putState('0'); + if (ctmuconh->value.get() & CTMUCONH::CTTRIG) + { + adcon1->ctmu_trigger(); + } + } +} +#define EDG1_SEL(x) ((x) & (CTMUCONL::EDG1SEL0 | CTMUCONL::EDG1SEL1)) +#define EDG2_SEL(x) ((x) & (CTMUCONL::EDG2SEL0 | CTMUCONL::EDG2SEL1)) +void CTMU::new_edge() +{ + uint value = ctmuconl->value.get(); + bool state1 = ctmu_cted1_sink->get_state(); + bool state2 = ctmu_cted2_sink->get_state(); + + + // return if edges are blocked + if (!(ctmuconh->value.get() & CTMUCONH::EDGEN)) + { + cted1_state = state1; + cted2_state = state2; + return; + } + if (state1 != cted1_state) // state change on cted1 + { + //using CTED1 + if (EDG1_SEL(value) == (CTMUCONL::EDG1SEL0 | CTMUCONL::EDG1SEL1)) + { + // positive edge active + if (value & CTMUCONL::EDG1POL) + { + if (state1) value |= CTMUCONL::EDG1STAT; + } + // negative edge + else + { + if (!state1) value |= CTMUCONL::EDG1STAT; + } + ctmuconl->put(value); + } + //using CTED1 + if (EDG2_SEL(value) == (CTMUCONL::EDG2SEL0 | CTMUCONL::EDG2SEL1)) + { + // positive edge active + if (value & CTMUCONL::EDG2POL) + { + if (state1) value |= CTMUCONL::EDG2STAT; + } + // negative edge + else + { + if (!state1) value |= CTMUCONL::EDG2STAT; + } + ctmuconl->put(value); + } + cted1_state = state1; + } + if (state2 != cted2_state) // state change on cted2 + { + //using CTED2 + if (EDG1_SEL(value) == (CTMUCONL::EDG1SEL1)) + { + // positive edge active + if (value & CTMUCONL::EDG1POL) + { + if (state2) value |= CTMUCONL::EDG1STAT; + } + // negative edge + else + { + if (!state2) value |= CTMUCONL::EDG1STAT; + } + ctmuconl->put(value); + } + //using CTED2 + if (EDG2_SEL(value) == (CTMUCONL::EDG2SEL1)) + { + // positive edge active + if (value & CTMUCONL::EDG2POL) + { + if (state2) value |= CTMUCONL::EDG2STAT; + } + // negative edge + else + { + if (!state2) value |= CTMUCONL::EDG2STAT; + } + ctmuconl->put(value); + } + cted2_state = state2; + } +} + +//Status from comparator module for C2 +void CTMU::syncC2out(bool high) +{ + if ((ctmuconh->value.get() & CTMUCONH::TGEN) && high) + { + uint value = ctmuconl->value.get(); + value |= CTMUCONL::EDG2STAT; + ctmuconl->put(value); + } +} + +void CTMU::tgen_on() +{ + cm2con1->set_ctmu_stim(ctmu_stim, this); + + if (!ctpls_source) ctpls_source = new PeripheralSignalSource(m_ctpls); + m_ctpls->setSource(ctpls_source); +} + +void CTMU::tgen_off() +{ + cm2con1->set_ctmu_stim(0, 0); + + if (ctpls_source) m_ctpls->setSource(0); +} + +void CTMU::idissen(bool ground) +{ + // Don't do anything is CTMU not enables + if (! (ctmuconh->value.get() & CTMUCONH::CTMUEN)) return; + + if (ground) + { + ctmu_stim->set_Vth(0.); + ctmu_stim->set_Zth(300.0); + ctmu_stim->updateNode(); + } + else stat_change(); +} + diff --git a/src/gpsim/modules/ctmu.h b/src/gpsim/modules/ctmu.h new file mode 100644 index 0000000..c89a797 --- /dev/null +++ b/src/gpsim/modules/ctmu.h @@ -0,0 +1,168 @@ +/* + Copyright (C) 2015 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __CTMU_H__ +#define __CTMU_H__ + +//#include "trace.h" + + +class CTMU; + + +class CTMUCONH : public sfr_register +{ +public: + CTMUCONH(Processor *pCpu, const char *pName, const char *pDesc=0, CTMU *_ctmu=0); + + enum + { + CTTRIG = 1<<0, // CTMU Special Event Trigger Control Bit + IDISSEN = 1<<1, // Analog Current Source Control bit + EDGSEQEN = 1<<2, // Edge Sequence Enable bit + EDGEN = 1<<3, // Edge Enable bit + TGEN = 1<<4, // Time Generation Enable bit + CTMUSIDL = 1<<5, // Stop in Idle Mode bit + CTMUEN = 1<<7 // CTMU Enable bit + }; + + + void put(uint new_value); + + CTMU *ctmu; + +}; + +class CTMUCONL : public sfr_register +{ +public: + + CTMUCONL(Processor *pCpu, const char *pName, const char *pDesc=0, CTMU *_ctmu=0); + enum + { + EDG1STAT = 1<<0, // Edge 1 Status bit + EDG2STAT = 1<<1, // Edge 2 Status bit + EDG1SEL0 = 1<<2, // Edge 1 Source Select bit 0 + EDG1SEL1 = 1<<3, // Edge 1 Source Select bit 1 + EDG1POL = 1<<4, // Edge 1 Polarity Select bit + EDG2SEL0 = 1<<5, // Edge 2 Source Select bit 0 + EDG2SEL1 = 1<<6, // Edge 2 Source Select bit 1 + EDG2POL = 1<<7 // Edge 2 Polarity Select bit + }; + + void put(uint new_value); + + CTMU *ctmu; +}; + +class CTMUICON : public sfr_register +{ +public: + + CTMUICON(Processor *pCpu, const char *pName, const char *pDesc=0, CTMU *_ctmu=0); + + void put(uint new_value); + enum + { + IRNG0 = 1<<0, // Current Source Range Select bit 0 + IRNG1 = 1<<1, // Current Source Range Select bit 1 + ITRIM0 = 1<<2, // Current Source Trim bit 0 + ITRIM1 = 1<<3, // Current Source Trim bit 1 + ITRIM2 = 1<<4, // Current Source Trim bit 2 + ITRIM3 = 1<<5, // Current Source Trim bit 3 + ITRIM4 = 1<<6, // Current Source Trim bit 4 + ITRIM5 = 1<<7 // Current Source Trim bit 5 + }; + CTMU *ctmu; +}; +class ctmu_stimulus : public stimulus +{ +public: + + ctmu_stimulus(Processor *pCpu, const char *n=0, double _Vth=5.0, + double _Zth=1e3) : stimulus(n, _Vth, _Zth), cpu(pCpu) + { + } + + /* A current source is simulated by using a 200 V source so + between 0-5 V the current should change < 2%. + The maximum voltage to a pin is clamped to be below Vdd-0.5 volts. + Thus when the node voltage >= Vdd-0.6 we drop the drive voltage + is reduced to Vdd-0.6. This can cause an overshoot to the node voltage. + */ + virtual double get_Vth() + { + double max_volt = cpu->get_Vdd() - 0.6; + if (get_nodeVoltage() >= max_volt) + return max_volt; + return Vth; + } +private: + Processor *cpu; +}; + +#define Vsrc 200. +class CTMU_SignalSink; + +class CTMU +{ +public: + + CTMU(Processor *pCpu); + void new_current(double I); + void enable(uint value); + void disable(); + void current_off(); + void stat_change(); + void idissen(bool ground); + void set_eepas(ECCPAS *_e1, ECCPAS *_e2) { m_eccpas1 = _e1; m_eccpas2=_e2;} + void set_IOpins(PinModule *_pm1, PinModule *_pm2, PinModule *_pout) + {m_cted1 = _pm1; m_cted2 = _pm2; m_ctpls = _pout;} + void new_edge(); + void tgen_on(); + void tgen_off(); + void syncC2out(bool high); + + + + double current; + double resistance; + bool cted1_state; + bool cted2_state; + ctmu_stimulus *ctmu_stim; + PinModule *m_cted1; + PinModule *m_cted2; + PinModule *m_ctpls; + ECCPAS *m_eccpas1; + ECCPAS *m_eccpas2; + CTMU_SignalSink *ctmu_cted1_sink; + CTMU_SignalSink *ctmu_cted2_sink; + PeripheralSignalSource *ctpls_source; + + CTMUCONH *ctmuconh; + CTMUCONL *ctmuconl; + CTMUICON *ctmuicon; + ADCON0_V2 *adcon0; + ADCON1_2B *adcon1; + CM2CON1_V2 *cm2con1; + Processor *cpu; + +}; +#endif // __CTMU_H__ diff --git a/src/gpsim/modules/cwg.cc b/src/gpsim/modules/cwg.cc new file mode 100644 index 0000000..4c05e8f --- /dev/null +++ b/src/gpsim/modules/cwg.cc @@ -0,0 +1,601 @@ +/* + Copyright (C) 2017 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +// Complimentry Waveform Generated (CWG) module + +//#define DEBUG +#if defined(DEBUG) +#include "config.h" +#define Dprintf(arg) {printf("%s:%d ",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +#include "pic-processor.h" +#include "cwg.h" + +// Set pin direction +class TristateControl : public SignalControl +{ + public: + TristateControl(CWG *_cwg, PinModule *_pin) : m_cwg(_cwg), m_pin(_pin){ } + ~TristateControl() { } + + void set_pin_direction(char _direction) { direction = _direction;} + virtual char getState() { return direction; } + virtual void release() { m_cwg->releasePin(m_pin); } + + private: + CWG *m_cwg; + PinModule *m_pin; + char direction; +}; + +class CWGSignalSource : public SignalControl +{ + public: + CWGSignalSource(CWG *_cwg, PinModule *_pin) + : m_cwg(_cwg), + m_state('?'), m_pin(_pin) + { + assert(m_cwg); + } + virtual ~CWGSignalSource() { } + + void setState(char _state) { m_state = _state; } + virtual char getState() { return m_state; } + virtual void release() { + Dprintf(("CWGSignalSource release\n")); + m_cwg->releasePinSource(m_pin); } + + private: + CWG *m_cwg; + char m_state; + PinModule *m_pin; +}; + +// Report state changes on incoming FLT pin +class FLTSignalSink : public SignalSink +{ + public: + FLTSignalSink(CWG *_cwg) + : m_cwg(_cwg) { } + + virtual void setSinkState(char new3State) {m_cwg->setState(new3State); } + virtual void release() {delete this; } + + private: + CWG *m_cwg; +}; + +CWG::CWG(Processor *pCpu) : + cwg1con0(this, pCpu, "cwg1con0", "CWG Control Register 0"), + cwg1con1(this, pCpu, "cwg1con1", "CWG Control Register 1"), + cwg1con2(this, pCpu, "cwg1con2", "CWG Control Register 2"), + cwg1dbf(this, pCpu, "cwg1dbf", "CWG Falling Dead-Band Count Register"), + cwg1dbr(this, pCpu, "cwg1dbr", "CWG Rising Dead-Band Count Register"), + con0_value(0), con1_value(0), con2_value(0), shutdown_active(false), + cpu(pCpu), + pinA(0), pinB(0), Atri(0), Btri(0), Asrc(0), Bsrc(0), FLTsink(0), + pinAactive(false), pinBactive(false), + srcAactive(false), srcBactive(false), + active_next_edge(false), + FLTstate(false) + { + nco_state = false; + for(int i = 0; i<4; i++) + { + pwm_state[i] = false; + clc_state[i] = false; + } + } + +CWG::~CWG() +{ + if (Atri) + { + if (pinAactive) releasePin(pinA); + + delete Atri; + delete Asrc; + Atri = 0; + Asrc = 0; + } + if (Btri) + { + if (pinBactive) releasePin(pinB); + + delete Btri; + delete Bsrc; + Btri = 0; + Bsrc = 0; + } +} + + +void CWG::setState(char state) +{ + Dprintf(("CWG::setState state=%c\n", state)); + if (state == '0' && FLTstate) // new low edge + { + con2_value |= GxASE; + cwg1con2.put_value(con2_value); + autoShutEvent(true); + active_next_edge = false; + } + else if (state == '1' && !FLTstate) + { + con2_value &= ~GxASE; + cwg1con2.put_value(con2_value); + active_next_edge = true; + } + FLTstate = (state != '0'); +} + +void CWG::set_IOpins(PinModule *p1, PinModule *p2, PinModule *_pinFLT) +{ + pinA = p1; + pinB = p2; + pinFLT = _pinFLT; + if (Atri) + { + delete Atri; + delete Asrc; + } + Atri = new TristateControl(this, pinA); + Asrc = new CWGSignalSource (this, pinA); + if (Btri) + { + delete Btri; + delete Bsrc; + } + Btri = new TristateControl(this, pinB); + Bsrc = new CWGSignalSource (this, pinB); +} +void CWG::oeA() +{ + Dprintf(("CWG::oeA() %u %u\n", (con0_value & GxEN), (con0_value & GxOEA))); + if ((con0_value & GxEN) && (con0_value & GxOEA)) + { + if (!pinAactive) + { + Atri->set_pin_direction('0'); + pinA->setControl(Atri); + pinA->setSource(Asrc); + pinA->updatePinModule(); + pinAactive = true; + srcAactive = true; + } + } + else if (pinAactive) + { + pinA->setControl(0); + pinA->setSource(0); + pinA->updatePinModule(); + pinAactive = false; + srcAactive = false; + } +} + +void CWG::oeB() +{ + if ((con0_value & GxEN) && (con0_value & GxOEB)) + { + if (!pinBactive) + { + Btri->set_pin_direction('0'); + pinB->setControl(Btri); + pinB->setSource(Bsrc); + pinB->updatePinModule(); + pinBactive = true; + srcBactive = true; + } + } + else if (pinBactive) + { + pinB->setControl(0); + pinB->setSource(0); + pinB->updatePinModule(); + pinBactive = false; + srcBactive = false; + } +} + +void CWG::cwg_con0(uint value) +{ + uint diff = con0_value ^ value; + con0_value = value; + if (diff & (GxEN | GxOEA)) oeA(); + if (diff & (GxEN | GxOEB)) oeB(); +} + +void CWG::cwg_con1(uint value) +{ + con1_value = value; +} + +void CWG::cwg_con2(uint value) +{ + uint diff = value ^ con2_value; + con2_value = value; + if (diff & GxASE) + { + if (value & GxASE) + { + if (value & GxARSEN) + active_next_edge = true; + autoShutEvent(true); + } + else + { + if (shutdown_active) + { + active_next_edge = true; + autoShutEvent(false); + } + } + } + if (diff & GxASDFLT) enableAutoShutPin(value & GxASDFLT); +} + +void CWG::autoShutEvent(bool on) +{ + if (on) + { + Dprintf(("CWG::autoShutEvent on A 0x%x\n", con1_value & (GxASDLA0|GxASDLA1))); + switch(con1_value & (GxASDLA0|GxASDLA1)) + { + case 0: // to inactive state + cwg1dbr.new_edge(false, 0.); + break; + + case GxASDLA0: // pin tristated + cwg1dbr.kill_callback(); + Atri->set_pin_direction('1'); + pinA->updatePinModule(); + break; + + case GxASDLA1: // pin to 0 + cwg1dbr.kill_callback(); + Asrc->setState('0'); + pinA->updatePinModule(); + break; + + case GxASDLA0|GxASDLA1: // pin to 1 + cwg1dbr.kill_callback(); + Asrc->setState('1'); + pinA->updatePinModule(); + break; + } + Dprintf(("CWG::autoShutEvent on B 0x%x\n", con1_value & (GxASDLB0|GxASDLB1))); + switch(con1_value & (GxASDLB0|GxASDLB1)) + { + case 0: // to inactive state + cwg1dbf.new_edge(true, 0.); + break; + + case GxASDLB0: // pin tristated + cwg1dbf.kill_callback(); + Btri->set_pin_direction('1'); + pinB->updatePinModule(); + break; + + case GxASDLB1: // pin to 0 + cwg1dbf.kill_callback(); + Bsrc->setState('0'); + pinB->updatePinModule(); + break; + + case GxASDLB0|GxASDLB1: // pin to 1 + cwg1dbf.kill_callback(); + Bsrc->setState('1'); + pinB->updatePinModule(); + break; + } + shutdown_active = true; + } + else + { + shutdown_active = false; + Atri->set_pin_direction('0'); + pinA->updatePinModule(); + Btri->set_pin_direction('0'); + pinB->updatePinModule(); + } +} + +void CWG::enableAutoShutPin(bool on) +{ + if (on) + { + if (!FLTsink) + { + FLTsink = new FLTSignalSink(this); + pinFLT->addSink(FLTsink); + FLTstate = pinFLT->getPin().getState(); + Dprintf(("CWG::enableAutoShutPin FLTstate=%x\n", FLTstate)); + } + } + else + { + if (FLTsink) + { + pinFLT->removeSink(FLTsink); + FLTsink->release(); + FLTsink = 0; + } + } +} + +void CWG::releasePin(PinModule *pin) +{ + if (pin) + { + Dprintf(("CWG::releasePin %s pinAactive %d pinBactive %d\n", pin->getPin().name().c_str(), pinAactive, pinBactive)); + pin->setControl(0); + if (pin == pinA) pinAactive = false; + if (pin == pinB) pinBactive = false; + } +} +void CWG::releasePinSource(PinModule *pin) +{ + Dprintf(("CWG::releasePinSource %p\n", pin)); + if (pin) + { + if (pin == pinA) srcAactive = false; + if (pin == pinB) srcBactive = false; + //pin->setSource(0); + } +} +void CWG::input_source(bool level) +{ + if (level && active_next_edge) + { + con2_value &= ~GxASE; + cwg1con2.put_value(con2_value); + autoShutEvent(false); + active_next_edge = false; + } + if (!shutdown_active) + { + double mult = (con0_value & GxCS0) ? 16e6/cpu->get_frequency() : 1; + cwg1dbr.new_edge(level, mult); + cwg1dbf.new_edge(!level, mult); + } +} +void CWG::out_pwm(bool level, char index) +{ + if (index >= 2) return; + if ((level != pwm_state[index-1]) + && (con0_value & GxEN) + && ((int)(con1_value & (GxIS0|GxIS1)) == index-1)) + { + Dprintf(("CWG::out_pwm level=%d shutdown_active=%d con2=0x%x\n", level, shutdown_active, con2_value)); + input_source(level); + } + pwm_state[index-1] = level; +} + +void CWG::out_CLC(bool level, char index) +{ + assert(index > 1); + if ((level != clc_state[index-1]) + && (con0_value & GxEN) + && ((int)(con1_value & (GxIS0|GxIS1)) == 3)) + { + Dprintf(("CWG::out_clc level=%d shutdown_active=%d con2=0x%x\n", level, shutdown_active, con2_value)); + input_source(level); + } + clc_state[index-1] = level; +} + +void CWG::out_NCO(bool level) +{ + if ((level != nco_state) + && (con0_value & GxEN) + && ((int)(con1_value & (GxIS0|GxIS1)) == 2)) + { + Dprintf(("CWG::out_NCO level=%d shutdown_active=%d con2=0x%x\n", level, shutdown_active, con2_value)); + input_source(level); + } + nco_state = level; +} + +void CWG::set_outA(bool level) +{ + bool invert = con0_value & GxPOLA; + Dprintf(("CWG::set_outA now=%" PRINTF_GINT64_MODIFIER "d level=%d invert=%d out=%d\n", get_cycles().get(), level, invert, level^invert)); + Asrc->setState((level^invert)?'1':'0'); + pinA->updatePinModule(); +} + +void CWG::set_outB(bool level) +{ + bool invert = con0_value & GxPOLB; + Dprintf(("CWG::set_outB now=%" PRINTF_GINT64_MODIFIER "d level=%d invert=%d out=%d\n", get_cycles().get(), level, invert, level^invert)); + Bsrc->setState(level^invert?'1':'0'); + pinB->updatePinModule(); +} + +CWG4::CWG4(Processor *pCpu) : CWG(pCpu) +{ + cwg1con1.set_con1_mask(0xf7); +} + +void CWG4::out_pwm(bool level, char index) +{ + if (index >= 4) return; + if ((level != pwm_state[index-1]) + && (con0_value & GxEN) + && ((int)(con1_value & (GxIS0|GxIS1|GxIS2)) == index-1)) + { + Dprintf(("CWG4::out_pwm level=%d shutdown_active=%d con2=0x%x\n", level, shutdown_active, con2_value)); + input_source(level); + } + pwm_state[index-1] = level; +} + +void CWG4::out_NCO(bool level) +{ + if ((level != nco_state) + && (con0_value & GxEN) + && ((int)(con1_value & (GxIS0|GxIS1|GxIS2)) == 6)) + { + Dprintf(("CWG4::out_NCO level=%d shutdown_active=%d con2=0x%x\n", level, shutdown_active, con2_value)); + input_source(level); + } + nco_state = level; +} + +CWGxCON0::CWGxCON0(CWG* pt, Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), pt_cwg(pt), con0_mask(0xf9) + {} + +void CWGxCON0::put(uint new_value) +{ + new_value &= con0_mask; + if (!(new_value ^ value.get())) return; + + value.put(new_value); + pt_cwg->cwg_con0(new_value); +} + +CWGxCON1::CWGxCON1(CWG *pt, Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), pt_cwg(pt), con1_mask(0xf3) + {} + +void CWGxCON1::put(uint new_value) +{ + new_value &= con1_mask; + uint diff = new_value ^ value.get(); + if (!diff) return; + + value.put(new_value); + pt_cwg->cwg_con1(new_value); +} + +CWGxCON2::CWGxCON2(CWG *pt, Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), pt_cwg(pt), con2_mask(0xc3) + {} + +void CWGxCON2::put(uint new_value) +{ + new_value &= con2_mask; + uint diff = new_value ^ value.get(); + if (!diff) return; + + value.put(new_value); + pt_cwg->cwg_con2(new_value); +} + +CWGxDBF::CWGxDBF(CWG *pt, Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), pt_cwg(pt), future_cycle(0), + next_level(false) + {} +void CWGxDBF::callback() +{ + Dprintf(("CWGxDBF::callback() %" PRINTF_GINT64_MODIFIER "d\n", get_cycles().get())); + pt_cwg->set_outB(next_level); + future_cycle = 0; +} +void CWGxDBF::callback_print() +{ + cout << "CWGxDBF " << name() << " CallBack ID " << CallBackID << '\n'; +} +void CWGxDBF::kill_callback() +{ + if (future_cycle) + { + Dprintf(("CWGxDBF::kill_callback() clear future_cycle=%" PRINTF_GINT64_MODIFIER "d\n", future_cycle)); + get_cycles().clear_break(future_cycle); + future_cycle = 0; + } +} + +void CWGxDBF::new_edge(bool level, double multi) +{ + /* gpsim delay increment is Fosc/4 which is 1/4 + resolution of deadband, so deadband is approximate + */ + int delay = (value.get() * multi + 2)/4; + next_level = level; + Dprintf(("CWGxDBF::new_edge now=%" PRINTF_GINT64_MODIFIER "d f=%.0f level=%d delay=%d\n", get_cycles().get(), ((Processor *)cpu)->get_frequency(), level, delay)); + if (future_cycle) + { + Dprintf(("\t clear future_cycle=%" PRINTF_GINT64_MODIFIER "d\n", future_cycle)); + get_cycles().clear_break(future_cycle); + future_cycle = 0; + } + if (!delay || !level) pt_cwg->set_outB(next_level); + else + { + future_cycle = get_cycles().get() + delay; + get_cycles().set_break(future_cycle, this); + } +} + +CWGxDBR::CWGxDBR(CWG *pt, Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), pt_cwg(pt), future_cycle(0), + next_level(false) + {} + +void CWGxDBR::kill_callback() +{ + if (future_cycle) + { + Dprintf(("CWGxDBR::kill_callback() clear future_cycle=%" PRINTF_GINT64_MODIFIER "d\n", future_cycle)); + get_cycles().clear_break(future_cycle); + future_cycle = 0; + } +} +void CWGxDBR::new_edge(bool level, double multi) +{ + /* gpsim delay increment is Fosc/4 which is 1/4 + resolution of deadband, so deadband is approximate + */ + int delay = (value.get() * multi + 2)/4; + next_level = level; + Dprintf(("CWGxDBR::new_edge now=%" PRINTF_GINT64_MODIFIER "d f=%.0f level=%d delay=%d\n", get_cycles().get(), ((Processor *)cpu)->get_frequency(), level, delay)); + if (future_cycle) + { + Dprintf(("clear future_cycle=%" PRINTF_GINT64_MODIFIER "d\n", future_cycle)); + get_cycles().clear_break(future_cycle); + future_cycle = 0; + } + if (!delay || !level) pt_cwg->set_outA(next_level); + else + { + future_cycle = get_cycles().get() + delay; + get_cycles().set_break(future_cycle, this); + } +} + +void CWGxDBR::callback() +{ + Dprintf(("CWGxDBR::callback() %" PRINTF_GINT64_MODIFIER "d\n", get_cycles().get())); + pt_cwg->set_outA(next_level); + future_cycle = 0; +} + +void CWGxDBR::callback_print() +{ + cout << "CWGxDBR " << name() << " CallBack ID " << CallBackID << '\n'; +} + diff --git a/src/gpsim/modules/cwg.h b/src/gpsim/modules/cwg.h new file mode 100644 index 0000000..f93948f --- /dev/null +++ b/src/gpsim/modules/cwg.h @@ -0,0 +1,203 @@ +/* + Copyright (C) 2017 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. + +COMPLEMENTARY WAVEFORM GENERATOR (CWG) MODULE + +*/ + +#ifndef __CWG_h__ +#define __CWG_h__ +#include "registers.h" + +class CWG; +class TristateControl; +class CWGSignalSource; +class FLTSignalSink; + +class CWGxCON0 : public sfr_register +{ +public: + CWGxCON0(CWG *pt, Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + void set_con0_mask(uint mask) { con0_mask = mask; } +private: + CWG *pt_cwg; + uint con0_mask; +}; + +class CWGxCON1 : public sfr_register +{ +public: + CWGxCON1(CWG *pt, Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + void set_con1_mask(uint mask) { con1_mask = mask; } +private: + CWG *pt_cwg; + uint con1_mask; +}; + +class CWGxCON2 : public sfr_register +{ +public: + CWGxCON2(CWG *pt, Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); +private: + CWG *pt_cwg; + uint con2_mask; +}; + +class CWGxDBR : public sfr_register, public TriggerObject + +{ +public: + enum { + CWGxDBR0 = 1<<0, + CWGxDBR1 = 1<<1, + CWGxDBR2 = 1<<2, + CWGxDBR3 = 1<<3, + CWGxDBR4 = 1<<4, + CWGxDBR5 = 1<<5 + }; + CWGxDBR(CWG *pt, Processor *pCpu, const char *pName, const char *pDesc); + virtual void callback(); + virtual void callback_print(); + void new_edge(bool level, double mult); + void kill_callback(); + +private: + CWG *pt_cwg; + uint64_t future_cycle; + bool next_level; +}; +class CWGxDBF : public sfr_register, public TriggerObject +{ +public: + enum { + CWGxDBF0 = 1<<0, + CWGxDBF1 = 1<<1, + CWGxDBF2 = 1<<2, + CWGxDBF3 = 1<<3, + CWGxDBF4 = 1<<4, + CWGxDBF5 = 1<<5 + }; + CWGxDBF(CWG *pt, Processor *pCpu, const char *pName, const char *pDesc); + virtual void callback(); + virtual void callback_print(); + void new_edge(bool level, double mult); + void kill_callback(); +private: + CWG *pt_cwg; + uint64_t future_cycle; + bool next_level; +}; + +// Complementary waveform generator - 4 clock inputs +class CWG +{ +public: + enum { + //CWG1CON0 + GxCS0 = 1<<0, + GxPOLA = 1<<3, + GxPOLB = 1<<4, + GxOEA = 1<<5, + GxOEB = 1<<6, + GxEN = 1<<7, + //CWG1CON1 + GxIS0 = 1<<0, + GxIS1 = 1<<1, + GxIS2 = 1<<2, + GxASDLA0 = 1<<4, + GxASDLA1 = 1<<5, + GxASDLB0 = 1<<6, + GxASDLB1 = 1<<7, + //CWG1CON2 + GxASDFLT = 1<<0, + GxASDCLC1 = 1<<1, + GxARSEN = 1<<6, + GxASE = 1<<7 + }; + + CWGxCON0 cwg1con0; + CWGxCON1 cwg1con1; + CWGxCON2 cwg1con2; + CWGxDBF cwg1dbf; + CWGxDBR cwg1dbr; + CWG(Processor *pCpu); + ~CWG(); + void set_IOpins(PinModule *, PinModule *, PinModule *); + void oeA(); + void oeB(); + void cwg_con0(uint); + void cwg_con1(uint); + void cwg_con2(uint); + void releasePin(PinModule *pin); + void releasePinSource(PinModule *pin); + virtual void out_pwm(bool level, char index); + virtual void out_NCO(bool level); + virtual void out_CLC(bool level, char index=1); + void input_source(bool level); + void set_outA(bool level); + void set_outB(bool level); + void autoShutEvent(bool on); + void enableAutoShutPin(bool on); + virtual void setState(char); + +protected: + bool pwm_state[4]; + bool clc_state[4]; + bool nco_state; + uint con0_value; + uint con1_value; + uint con2_value; + bool shutdown_active; + +private: + Processor *cpu; + PinModule *pinA; + PinModule *pinB; + PinModule *pinFLT; + TristateControl *Atri; + TristateControl *Btri; + CWGSignalSource *Asrc; + CWGSignalSource *Bsrc; + FLTSignalSink *FLTsink; + bool pinAactive; + bool pinBactive; + bool srcAactive; + bool srcBactive; + bool cwg_enabled; + bool OEA_state; + bool OEB_state; + string Agui; + string Bgui; + string FLTgui; + bool active_next_edge; + bool FLTstate; +}; + +class CWG4 : public CWG +{ +public: + CWG4(Processor *pCpu); + virtual void out_pwm(bool level, char index); + virtual void out_NCO(bool level); +}; +#endif //__CWG_h__ + diff --git a/src/gpsim/modules/dsm_module.cc b/src/gpsim/modules/dsm_module.cc new file mode 100644 index 0000000..c42338c --- /dev/null +++ b/src/gpsim/modules/dsm_module.cc @@ -0,0 +1,496 @@ +#include "dsm_module.h" + + +class minSink : public SignalSink +{ +public: + minSink(DSM_MODULE *dsm) : m_dsm(dsm) {} + virtual void setSinkState(char new3State) + { m_dsm->minEdge(new3State);} + virtual void release() {} +private: + DSM_MODULE *m_dsm; +}; + +class carhSink : public SignalSink +{ +public: + carhSink(DSM_MODULE *dsm) : m_dsm(dsm) {} + virtual void setSinkState(char new3State) + { m_dsm->carhEdge(new3State);} + virtual void release() { delete this;} +private: + DSM_MODULE *m_dsm; +}; + +class carlSink : public SignalSink +{ +public: + carlSink(DSM_MODULE *dsm) : m_dsm(dsm) {} + virtual void setSinkState(char new3State) + { m_dsm->carlEdge(new3State);} + virtual void release() { delete this;} +private: + DSM_MODULE *m_dsm; +}; + +class MDoutSignalSource : public SignalControl +{ +public: + MDoutSignalSource(DSM_MODULE *dsm) : m_dsm(dsm) {} + virtual char getState() { return m_dsm->mdout; } + virtual void release() {} +private: + DSM_MODULE *m_dsm; + +}; + + +DSM_MODULE::DSM_MODULE(Processor *pCpu) : + mdcon(pCpu, "mdcon", "Modulation Control Register", this), + mdsrc(pCpu, "mdsrc", "Modulation Source Control Register", this), + mdcarh(pCpu, "mdcarh", "Modulation High Carrier Control Register", this), + mdcarl(pCpu, "mdcarl", "Modulation Low Carrier Control Register", this), + m_mdout(0), m_mdmin(0), m_minSink(0), + m_mdcin1(0), cin1Sink_cnt(0), m_carlSink(0), + m_mdcin2(0), m_carhSink(0), out_source(0), mdout('?'), + usart_mod(0), ssp_mod1(0), ssp_mod2(0), + mdmin_state(false), mdcarl_state(false), mdcarh_state(false), + dflipflopH(false), dflipflopL(false), dsmSrc_pin(0), monitor_pin(0), + monitor_mod(0) +{ +} + + +DSM_MODULE::~DSM_MODULE() +{ + if (monitor_pin) + { + delete monitor_mod; + delete monitor_pin; + monitor_pin = 0; + if (m_carhSink) + { +/*RRR + if (m_mdcin1) + { + m_mdcin1->removeSink(m_carhSink); + } + if (m_mdcin2) + { + m_mdcin2->removeSink(m_carhSink); + } +RRR */ + delete m_carhSink; + } + } +} +void DSM_MODULE::dsm_logic(bool carl_neg_edge, bool carh_neg_edge) +{ + bool out, outh, outl; + uint con_reg = mdcon.get_value(); + + if (carl_neg_edge && carl_neg_edge) + { + dflipflopL = !mdmin_state & !mdcarh_state; + dflipflopH = mdmin_state & !mdcarl_state; + } + else if (carl_neg_edge) + { + dflipflopL = !mdmin_state & !dflipflopH; + } + else if (carh_neg_edge) + { + dflipflopH = mdmin_state & !dflipflopL; + } + + if (mdcarl.get_value() & MDCLSYNC) + { + outl = mdcarl_state && dflipflopL; + } + else + { + outl = !mdmin_state && mdcarl_state; + } + if (mdcarh.get_value() & MDCHSYNC) + { + outh = mdcarh_state && dflipflopH; + } + else + { + outh = mdmin_state && mdcarh_state; + } + + out = outl || outh; + out = (con_reg & MDOPOL)? !out : out; + if (out) + { + con_reg |= MDOUT; + } + else + { + con_reg &= ~MDOUT; + } + mdcon.put_value(con_reg); + putMDout(out); +} + +void DSM_MODULE::putMDout(bool out) +{ + mdout = out? '1' : '0'; + m_mdout->updatePinModule(); +} + +void DSM_MODULE::releaseMDout() +{ + if (out_source) + { + // m_mdout->setSource(0); + delete out_source; + out_source = 0; + } + +} +void DSM_MODULE::new_mdcon(uint old_value, uint new_value) +{ + + if (((old_value ^ new_value) & MDOE) && m_mdout) + { + if (new_value & MDOE) + { + if (!out_source) out_source = new MDoutSignalSource(this); + + m_mdout->setSource(out_source); + } + else + { + m_mdout->setSource(0); + out_source = 0; + } + } + if (((old_value ^ new_value) & MDBIT) && (mdsrc.get_value() & 0x0f) == 0) + { + mdmin_state = new_value & MDBIT; + if (new_value & MDEN) + dsm_logic(false, false); + } + else if (((old_value ^ new_value) & MDOPOL)) + dsm_logic(false, false); + +} +// remove Old modulator source +void DSM_MODULE::rmModSrc(uint old_value) +{ + switch (old_value & 0x0f) + { + case 1: // MDMIN port pin + if (m_minSink) m_mdmin->removeSink(m_minSink); + break; + + case 0x8: //MSSP1 + if (m_minSink && dsmSrc_pin) dsmSrc_pin->removeSink(m_minSink); + break; + + case 0xa: // USART + if (m_minSink && dsmSrc_pin) dsmSrc_pin->removeSink(m_minSink); + break; + + default: + break; + } +} +// set new modulator source +void DSM_MODULE::setModSrc(uint new_value, uint diff) +{ + bool old = mdmin_state; + switch (new_value & 0x0f) + { + case 0: + mdmin_state = mdcon.get_value() & MDBIT; + break; + + case 1: // MDMIN port pin + if (!m_minSink) m_minSink = new minSink(this); + m_mdmin->addSink(m_minSink); + + mdmin_state = m_mdmin->getPin().getState(); + break; + + case 0x8: // MSSP1 + if (ssp_mod1) + { + } + else + //printf("%s MSSP1 not defined\n", name().c_str(); + break; + + case 0x9: // MSSP2 + if (ssp_mod2) + { + } + else + //printf("%s MSSP2 not defined\n", name().c_str(); + break; + + case 0xa: // USART TX + if (usart_mod) + { + if (diff & MDMSODIS) + { + if (new_value & MDMSODIS) + { + if (!dsmSrc_pin) dsmSrc_pin = usart_mod->txsta.getIOpin(); + if (!monitor_pin) + { + monitor_mod = new PinModule(); + monitor_pin = new IOPIN("mds"); + monitor_mod->setPin(monitor_pin); + } + if (!m_minSink) m_minSink = new minSink(this); + monitor_mod->addSink(m_minSink); + usart_mod->txsta.setIOpin(monitor_mod); + //mdmin_state = monitor_mod->getPin().getState(); + } + else + { + if (m_minSink && monitor_mod) + monitor_mod->removeSink(m_minSink); + usart_mod->txsta.setIOpin(dsmSrc_pin); + } + + } + if (new_value & MDMSODIS) + { + } + else + { + dsmSrc_pin = usart_mod->txsta.getIOpin(); + if (!m_minSink) m_minSink = new minSink(this); + dsmSrc_pin->addSink(m_minSink); + mdmin_state = dsmSrc_pin->getPin().getState(); + } + } + break; + + default: + break; + } + if (old != mdmin_state) + dsm_logic(false, false); +} +void DSM_MODULE::minEdge(char new3State) +{ + bool old = mdmin_state; + mdmin_state = (new3State == '1' || new3State == 'W'); + if (old != mdmin_state) + dsm_logic(false, false); + +} +void DSM_MODULE::new_mdsrc(uint old_value, uint new_value) +{ + uint diff = new_value ^ old_value; + if (!diff) return; + if (diff & 0x0f) + { + // change modulator source, first remove old source + rmModSrc(old_value); + // change modulator source, new source + setModSrc(new_value, diff); + } + else // Change Source Output Disable bit + { + // handle output disable bit TODO + setModSrc(new_value, diff); + } +} +void DSM_MODULE::new_mdcarh(uint old_value, uint new_value) +{ + uint diff = new_value ^ old_value; + bool old = mdcarh_state; + if (!diff) return; + if (diff & 0x0f) + { // change carrier high source, first remove old source + switch (old_value & 0x0f) + { + case 1: // MDCIN1 port pin + if (m_carhSink) m_mdcin1->removeSink(m_carhSink); + + break; + + case 2: // MDCIN2 port pin + if (m_carhSink) m_mdcin2->removeSink(m_carhSink); + break; + + default: + break; + } + // change carrier high source, new source + switch (new_value & 0x0f) + { + case 0: // Vss + mdcarh_state = false; + break; + + case 1: // MDCIN1 port pin + if (!m_carhSink) m_carhSink = new carhSink(this); + m_mdcin1->addSink(m_carhSink); + mdcarh_state = m_mdcin1->getPin().getState(); + break; + + + case 2: // MDCIN2 port pin + if (!m_carhSink) m_carhSink = new carhSink(this); + m_mdcin2->addSink(m_carhSink); + mdcarh_state = m_mdcin2->getPin().getState(); + break; + + default: + break; + } + mdcarh_state = (new_value & MDCHPOL) ? ! mdcarh_state : mdcarh_state; + } + else if (diff & MDCHPOL) + { + mdcarh_state = ! mdcarh_state; + } + if (diff & MDCHODIS) // Change Source Output Disable bit + { + // handle output disable bit TODO + } + if (old != mdcarh_state ) + { + dsm_logic(false, old); + } + +} +void DSM_MODULE::carhEdge(char new3State) +{ + uint old_state = mdcarh_state; + mdcarh_state = (new3State == '1' || new3State == 'W'); + mdcarh_state = (mdcarh.get_value() & MDCHPOL) ? ! mdcarh_state : mdcarh_state; + if (old_state != mdcarh_state) + dsm_logic(old_state, false); // Old_state == true on falling edge +} +void DSM_MODULE::new_mdcarl(uint old_value, uint new_value) +{ + uint diff = new_value ^ old_value; + bool old = mdcarl_state; + if (diff & 0x0f) + { + // change carrier low source, first remove old source + switch (old_value & 0x0f) + { + case 1: // MDCIN1 port pin + if (m_carlSink) m_mdcin1->removeSink(m_carlSink); + break; + + default: + break; + } + // change carrier low source, new source + switch (new_value & 0x0f) + { + case 0: // Vss + mdcarl_state = false; + break; + + case 1: // MDCIN1 port pin + if (!m_carlSink) m_carlSink = new carlSink(this); + m_mdcin1->addSink(m_carlSink); + mdcarl_state = m_mdcin1->getPin().getState(); + break; + + default: + break; + } + mdcarl_state = (new_value & MDCLPOL) ? ! mdcarl_state : mdcarl_state; + } + else if (diff & MDCLPOL) + { + mdcarl_state = ! mdcarl_state; + } + else // Change Source Output Disable bit + { + // handle output disable bit TODO + } + if (mdcarl_state != old) + dsm_logic(old, false); +} +void DSM_MODULE::carlEdge(char new3State) +{ + bool old_state = mdcarl_state; + mdcarl_state = (new3State == '1' || new3State == 'W'); + mdcarl_state = (mdcarl.get_value() & MDCLPOL) ? ! mdcarl_state : mdcarl_state; + if (old_state != mdcarl_state) + dsm_logic(false, old_state); // old_state true on falling edge +} + +_MDCON::_MDCON(Processor *pCpu, const char *pName, const char *pDesc, DSM_MODULE *_mDSM): + sfr_register(pCpu, pName, pDesc), mask(0xf1), + mDSM(_mDSM) +{ +} +void _MDCON::put(uint new_value) +{ + new_value &= mask; + put_value(new_value); +} +void _MDCON::put_value(uint new_value) +{ + uint old_value = value.get(); + new_value &= (mask | DSM_MODULE::MDOUT); + value.put(new_value); + mDSM->new_mdcon(old_value, new_value); + +} + +_MDSRC::_MDSRC(Processor *pCpu, const char *pName, const char *pDesc, DSM_MODULE *_mDSM): + sfr_register(pCpu, pName, pDesc),mask(0x8f), + mDSM(_mDSM) +{ +} +void _MDSRC::put(uint new_value) +{ + new_value &= mask; + put_value(new_value); +} +void _MDSRC::put_value(uint new_value) +{ + uint old_value = value.get(); + value.put(new_value); + mDSM->new_mdsrc(old_value, new_value); +} + +_MDCARH::_MDCARH(Processor *pCpu, const char *pName, const char *pDesc, DSM_MODULE *_mDSM): + sfr_register(pCpu, pName, pDesc), mask(0xef), + mDSM(_mDSM) +{ +} + +void _MDCARH::put(uint new_value) +{ + new_value &= mask; + put_value(new_value); +} +void _MDCARH::put_value(uint new_value) +{ + uint old_value = value.get(); + value.put(new_value); + mDSM->new_mdcarh(old_value, new_value); +} +_MDCARL::_MDCARL(Processor *pCpu, const char *pName, const char *pDesc, DSM_MODULE *_mDSM): + sfr_register(pCpu, pName, pDesc), mask(0xef), + mDSM(_mDSM) +{ +} +void _MDCARL::put(uint new_value) +{ + new_value &= mask; + put_value(new_value); +} +void _MDCARL::put_value(uint new_value) +{ + uint old_value = value.get(); + value.put(new_value); + mDSM->new_mdcarl(old_value, new_value); +} diff --git a/src/gpsim/modules/dsm_module.h b/src/gpsim/modules/dsm_module.h new file mode 100644 index 0000000..00e8226 --- /dev/null +++ b/src/gpsim/modules/dsm_module.h @@ -0,0 +1,155 @@ +#ifndef __DSM_MODULE_H__ +#define __DSM_MODULE_H__ + +#include "pic-processor.h" +#include "14bit-registers.h" +#include "uart.h" +#include "ssp.h" + +class _MDCON; +class _MDSRC; +class _MDCARH; +class _MDCARL; +class DSM_MODULE; +class minSink; +class carhSink; +class carlSink; +class MDoutSignalSource; + + + +//_MDCON: MODULATION CONTROL REGISTER +class _MDCON : public sfr_register +{ + public: + _MDCON(Processor *pCpu, const char *pName, const char *pDesc, DSM_MODULE *); + virtual void put(uint); + virtual void put_value(uint); + + uint mask; + + + private: + + DSM_MODULE *mDSM; +}; + + +// MODULATION SOURCE CONTROL REGISTER +class _MDSRC : public sfr_register +{ + public: + _MDSRC(Processor *pCpu, const char *pName, const char *pDesc, DSM_MODULE *); + virtual void put(uint); + virtual void put_value(uint); + + + uint mask; + + private: + + DSM_MODULE *mDSM; +}; + +// _MDCARH: MODULATION HIGH CARRIER CONTROL REGISTER +class _MDCARH : public sfr_register +{ + public: + _MDCARH(Processor *pCpu, const char *pName, const char *pDesc, DSM_MODULE *); + virtual void put(uint); + virtual void put_value(uint); + + uint mask; + + private: + + DSM_MODULE *mDSM; +}; + +// _MDCARL: MODULATION LOW CARRIER CONTROL REGISTER +class _MDCARL : public sfr_register +{ + public: + + _MDCARL(Processor *pCpu, const char *pName, const char *pDesc, DSM_MODULE *); + virtual void put(uint); + virtual void put_value(uint); + + uint mask; + + private: + + DSM_MODULE *mDSM; +}; + +class DSM_MODULE +{ + public: + enum { + MDBIT = 1<<0, // Allows software to manually set modulation source input to module + MDOUT = 1<<3, // Modulator Output bit (read only) + MDOPOL = 1<<4, // Modulator Output Polarity Select bit + MDSLR = 1<<5, // MDOUT Pin Slew Rate Limiting bit + MDOE = 1<<6, // Modulator Module Pin Output Enable bit + MDEN = 1<<7, // Modulator Module Enable bit + + MDCHSYNC = 1<<5, // Modulator High Carrier Synchronization Enable bit + MDCHPOL = 1<<6, // Modulator High Carrier Polarity Select bit + MDCHODIS = 1<<7, //Modulator High Carrier Output Disable bit + MDCLSYNC = 1<<5, // Modulator Low Carrier Synchronization Enable bit + MDCLPOL = 1<<6, // Modulator Low Carrier Polarity Select bit + MDCLODIS = 1<<7, //Modulator Low Carrier Output Disable bit + + MDMSODIS = 1<<7, // Modulation Source Output Disable bit + }; + DSM_MODULE(Processor *pCpu); + ~DSM_MODULE(); + _MDCON mdcon; + _MDSRC mdsrc; + _MDCARH mdcarh; + _MDCARL mdcarl; + + virtual void setOUTpin(PinModule *pm) {m_mdout = pm;} + virtual void setMINpin(PinModule *pm) {m_mdmin = pm;} + virtual void setCIN1pin(PinModule *pm) {m_mdcin1 = pm;} + virtual void setCIN2pin(PinModule *pm) {m_mdcin2 = pm;} + virtual void rmModSrc(uint); + virtual void setModSrc(uint, uint); + virtual void minEdge(char new3State); + virtual void carhEdge(char new3State); + virtual void carlEdge(char new3State); + virtual void releaseMDout(); + void new_mdcon(uint, uint); + void new_mdsrc(uint, uint); + void new_mdcarh(uint, uint); + void new_mdcarl(uint, uint); + void dsm_logic(bool carl_neg_edge, bool carh_new_edge); + void putMDout(bool); + + PinModule *m_mdout; + PinModule *m_mdmin; + minSink *m_minSink; + PinModule *m_mdcin1; + int cin1Sink_cnt; + carlSink *m_carlSink; + PinModule *m_mdcin2; + carhSink *m_carhSink; + MDoutSignalSource *out_source; + char mdout; + USART_MODULE *usart_mod; + SSP1_MODULE *ssp_mod1; + SSP1_MODULE *ssp_mod2; + +private: + + bool mdmin_state; //value of min + bool mdcarl_state; //value of carl + bool mdcarh_state; //value of carh + + bool dflipflopH; + bool dflipflopL; + PinModule *dsmSrc_pin; + IOPIN *monitor_pin; + PinModule *monitor_mod; +}; +#endif diff --git a/src/gpsim/modules/eeprom.cc b/src/gpsim/modules/eeprom.cc new file mode 100644 index 0000000..c886c47 --- /dev/null +++ b/src/gpsim/modules/eeprom.cc @@ -0,0 +1,922 @@ +/* + Copyright (C) 1998-2003 Scott Dattalo + 2003 Mike Durian + 2006,2013 Roy Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include + +#include +#include +using namespace std; + +//#include + +#include "config.h" +#include "pic-processor.h" +#include "eeprom.h" +#include "pir.h" +#include "intcon.h" + + +// EEPROM - Peripheral +// +// This object emulates the 14-bit core's EEPROM/FLASH peripheral +// (such as the 16c84). +// +// It's main purpose is to provide a means by which the control +// registers may communicate. +// + +//------------------------------------------------------------------------ +// +// EEPROM related registers + +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("%s:%d-%s() ",__FILE__,__LINE__,__FUNCTION__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + + +void EECON1::put(uint new_value) +{ + put_value(new_value); +} + +void EECON1::put_value(uint new_value) +{ + new_value &= valid_bits; + new_value |= always_on_bits; + + //cout << "EECON1::put new_value " << hex << new_value << " valid_bits " << valid_bits << '\n'; + Dprintf(("new_value %x valid_bits %x\n", new_value, valid_bits)); + if(new_value & WREN) + { + if(eeprom->get_reg_eecon2()->is_unarmed()) + { + eeprom->get_reg_eecon2()->unready(); + value.put(value.get() | WREN); + } + // WREN is true and EECON2 is armed (which means that we've passed through here + // once before with WREN true). Initiate an eeprom write only if WR is true and + // RD is false AND EECON2 is ready + + else if( (new_value & WR) && !(new_value & RD) && + (eeprom->get_reg_eecon2()->is_ready_for_write())) + { + value.put(value.get() | WR); + eeprom->start_write(); + } + else if( (new_value & WR) && (new_value & RD)) + { + cout << "\n*** EECON1: write ignored " <get_reg_eecon2()->is_writing() ) + { + eeprom->get_reg_eecon2()->unarm(); + } + //cout << "EECON1: write is disabled\n"; + + } + + value.put((value.get() & (RD | WR)) | new_value); + + if ( (value.get() & RD) && !( value.get() & WR) ) + { + Dprintf(("RD true WR false EEPGD|CFFS %x\n", value.get() & (EEPGD|CFGS))); + if(value.get() & (EEPGD|CFGS)) { + eeprom->get_reg_eecon2()->read(); + eeprom->start_program_memory_read(); + //cout << "eestate " << eeprom->eecon2->eestate << '\n'; + // read program memory + } + else + { + //eeprom->eedata->value = eeprom->rom[eeprom->eeadr->value]->get(); + eeprom->get_reg_eecon2()->read(); + eeprom->callback(); + value.put(value.get() & ~RD); + } + } +} + +uint EECON1::get() +{ + return(value.get()); +} + +EECON1::EECON1(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc) +{ + valid_bits = EECON1_VALID_BITS; + always_on_bits = 0; +} + +void EECON2::put(uint new_value) +{ + value.put(new_value); + + if( (eestate == EENOT_READY) && (0x55 == new_value)) + { + eestate = EEHAVE_0x55; + } + else if ( (eestate == EEHAVE_0x55) && (0xaa == new_value)) + { + eestate = EEREADY_FOR_WRITE; + } + else if ((eestate == EEHAVE_0x55) || (eestate == EEREADY_FOR_WRITE)) + { + eestate = EENOT_READY; + } +} + +uint EECON2::get() +{ + return(0); +} + +EECON2::EECON2(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc) +{ + ee_reset(); +} + +uint EEDATA::get() +{ + return(value.get()); +} + +void EEDATA::put(uint new_value) +{ + value.put(new_value); + +} + +EEDATA::EEDATA(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc) +{ +} + +uint EEADR::get() +{ + return(value.get()); +} + +void EEADR::put(uint new_value) +{ + value.put(new_value); +} + + +EEADR::EEADR(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc) +{ +} + + +//------------------------------------------------------------------------ +EEPROM_PIR::EEPROM_PIR(Processor *pCpu, PIR *pPir) + : EEPROM(pCpu),m_pir(pPir), + eeadrh(pCpu, "eeadrh", "EE Address High byte") +{ +} + +EEPROM_PIR::~EEPROM_PIR() +{ + pic_processor *pCpu = dynamic_cast(cpu); + if (pCpu) + pCpu->remove_sfr_register(&eeadrh); +} + +void EEPROM_PIR::start_write() +{ + + get_cycles().set_break(get_cycles().get() + EPROM_WRITE_TIME, this); + + if ( rom_size > 256 ) + wr_adr = eeadr.value.get() + (eeadrh.value.get() << 8); + else + wr_adr = eeadr.value.get(); + wr_data = eedata.value.get(); + + eecon2.start_write(); +} + + +//------------------------------------------------------------------------ +// Set the EEIF and clear the WR bits. + +void EEPROM_PIR::write_is_complete() +{ + + assert(m_pir != 0); + + eecon1.value.put( eecon1.value.get() & (~eecon1.WR)); + + Dprintf(("eecon1 0x%x\n", eecon1.value.get())); + m_pir->set_eeif(); +} + + +void EEPROM_PIR::initialize(uint new_rom_size) +{ + + eeadrh.set_eeprom(this); + + EEPROM::initialize(new_rom_size); +} + + +//---------------------------------------------------------- +// +// EE PROM +// +// There are many conditions that need to be verified against a real part: +// 1) what happens if RD and WR are set at the same time? +// > the simulator ignores both the read and the write. +// 2) what happens if a RD is initiated while data is being written? +// > the simulator ignores the read +// 3) what happens if EEADR or EEDATA are changed while data is being written? +// > the simulator will update these registers with the new values that +// are written to them, however the write operation will be unaffected. +// 4) if WRERR is set, will this prevent a valid write sequence from being initiated? +// > the simulator views WRERR as a status bit +// 5) if a RD is attempted after the eeprom has been prepared for a write +// will this affect the RD or write? +// > The simulator will proceed with the read and leave the write-enable state alone. +// 6) what happens if WREN goes low while a write is happening? +// > The simulator will complete the write and WREN will be cleared. + +EEPROM::EEPROM(Processor *pCpu) + : name_str(0), + cpu(pCpu), + intcon(0), + eecon1(pCpu,"eecon1","EE Control 1"), + eecon2(pCpu,"eecon2","EE Control 2"), + eedata(pCpu,"eedata","EE Data"), + eeadr(pCpu,"eeadr", "EE Address"), + rom(0), + //m_UiAccessOfRom(0), + rom_data_size(1), + rom_size(0) +{ +} + +EEPROM::~EEPROM() +{ + pic_processor *pCpu = dynamic_cast(cpu); + if (pCpu) { + pCpu->remove_sfr_register(&eedata); + pCpu->remove_sfr_register(&eeadr); + pCpu->remove_sfr_register(&eecon1); + pCpu->remove_sfr_register(&eecon2); + } + + for (uint i = 0; i < rom_size; i++) + delete rom[i]; + + delete [] rom; + + //delete m_UiAccessOfRom; +} + +Register *EEPROM::get_register(uint address) +{ + if(addressperipheral_interrupt(); +} + +void EEPROM::start_program_memory_read() +{ + cout << "ERROR: program memory flash should not be accessible\n"; + + bp.halt(); +} + +void EEPROM::callback() +{ + switch(eecon2.get_eestate()) + { + case EECON2::EEREAD: + //cout << "eeread\n"; + + eecon2.unarm(); + if ( get_address() < rom_size ) + eedata.value.put(rom[get_address()]->get()); + else + { + cout << "EEPROM read address is out of range " << hex << eeadr.value.get() << endl; + bp.halt(); + } + eecon1.value.put(eecon1.value.get() & (~EECON1::RD)); + break; + case EECON2::EEWRITE_IN_PROGRESS: + //cout << "eewrite\n"; + + if(wr_adr < rom_size) + rom[wr_adr]->value.put(wr_data); + else + { + cout << "EEPROM write address is out of range " << hex << wr_adr << '\n'; + bp.halt(); + } + + write_is_complete(); + + if (eecon1.value.get() & eecon1.WREN) + eecon2.unready(); + else + eecon2.unarm(); + break; + + eecon1.value.put(eecon1.value.get() & (~EECON1::WR)); + default: + cout << "EEPROM::callback() bad eeprom state " << + eecon2.get_eestate() << '\n'; + bp.halt(); + } +} + + +void EEPROM::reset(RESET_TYPE by) +{ + switch(by) + { + case POR_RESET: + eecon1.value.put(0); // eedata & eeadr are undefined at power up + eecon2.unarm(); + break; + default: + break; + } +} + +void EEPROM::initialize(uint new_rom_size) +{ + + rom_size = new_rom_size; + + // Let the control registers have a pointer to the peripheral in + // which they belong. + + eecon1.set_eeprom(this); + eecon2.set_eeprom(this); + eedata.set_eeprom(this); + eeadr.set_eeprom(this); + + // Create the rom + + rom = (Register **) new char[sizeof (Register *) * rom_size]; + assert(rom != 0); + + // Initialize the rom + + char str[100]; + for (uint i = 0; i < rom_size; i++) { + + snprintf (str, sizeof(str), "eereg 0x%02x", i); + rom[i] = new Register(cpu,str); + rom[i]->address = i; + rom[i]->value.put(0); + rom[i]->alias_mask = 0; + } + + if(cpu) { + //cpu->ema.set_cpu(cpu); + cpu->ema.set_Registers(rom, rom_size); + /*m_UiAccessOfRom = new RegisterCollection(cpu, + "eeData", + rom, + rom_size);*/ + } + +} + +//---------------------------------------- +// Save the current state of the eeprom. This is used to reconstitute +// the trace buffer. + +void EEPROM::save_state() +{ +} + +void EEPROM::set_intcon(INTCON *ic) +{ + intcon = ic; +} + +void EEPROM::dump() +{ + uint i, j, reg_num,v; + + cout << " " << hex; + + // Column labels + for (i = 0; i < 16; i++) + cout << setw(2) << setfill('0') << i << ' '; + + cout << '\n'; + + for (i = 0; i < rom_size/16; i++) + { + cout << setw(2) << setfill('0') << i << ": "; + + for (j = 0; j < 16; j++) + { + reg_num = i * 16 + j; + if(reg_num < rom_size) + { + v = rom[reg_num]->get_value(); + cout << setw(2) << setfill('0') << v << ' '; + } + else + cout << "-- "; + } + cout << " "; + + for (j = 0; j < 16; j++) + { + reg_num = i * 16 + j; + + if(reg_num < rom_size) + { + v = rom[reg_num]->get_value(); + if( (v >= ' ') && (v <= 'z')) cout.put(v); + else cout.put('.'); + } + } + cout << '\n'; + } +} + + +//------------------------------------------------------------------------ +EEPROM_WIDE::EEPROM_WIDE(Processor *pCpu, PIR *pPir) + : EEPROM_PIR(pCpu,pPir), + eedatah(pCpu,"eedatah", "EE Data High byte") +{ +} + +EEPROM_WIDE::~EEPROM_WIDE() +{ + pic_processor *pCpu = dynamic_cast(cpu); + pCpu->remove_sfr_register(&eedatah); + +} + +void EEPROM_WIDE::start_write() +{ + + get_cycles().set_break(get_cycles().get() + EPROM_WRITE_TIME, this); + + wr_adr = eeadr.value.get() + (eeadrh.value.get() << 8); + wr_data = eedata.value.get() + (eedatah.value.get() << 8); + + eecon2.start_write(); +} + +void EEPROM_WIDE::start_program_memory_read() +{ + + rd_adr = eeadr.value.get() | (eeadrh.value.get() << 8); + + get_cycles().set_break(get_cycles().get() + 2, this); + +} + +void EEPROM_WIDE::callback() +{ + //cout << "eeprom call back\n"; + + Dprintf(("state 0x%x\n", eecon2.get_eestate())); + + switch(eecon2.get_eestate()) { + case EECON2::EEREAD: + //cout << "eeread\n"; + + eecon2.unarm(); + if(eecon1.value.get() & EECON1::EEPGD) { + // read program memory + + int opcode = cpu->pma->get_opcode(rd_adr); + eedata.value.put(opcode & 0xff); + eedatah.value.put((opcode>>8) & 0xff); + + } else { + if (eeadr.value.get() < rom_size) + eedata.value.put(rom[eeadr.value.get()]->get()); + else + { + cout << "WIDE_EEPROM read address is out of range " << hex << eeadr.value.get() << '\n'; + bp.halt(); + } + } + + eecon1.value.put(eecon1.value.get() & (~EECON1::RD)); + break; + + case EECON2::EEWRITE_IN_PROGRESS: + //cout << "eewrite\n"; + + Dprintf(("EEWRITE_IN_PROGRESS eecon1 %x\n", eecon1.value.get())); + if(eecon1.value.get() & EECON1::EEPGD) // write program memory + { + cpu->init_program_memory_at_index(wr_adr, wr_data); + } + else // write eeprom memory + { + Dprintf(("wr_adr 0x%x rom_size 0x%x data 0x%x\n", wr_adr, rom_size, wr_data)); + if(wr_adr < rom_size) + { + rom[wr_adr]->value.put(wr_data); + } + else + { + cout << "WIDE_EEPROM write address is out of range " << hex << wr_adr << '\n'; + bp.halt(); + } + } + + write_is_complete(); + + if (eecon1.value.get() & eecon1.WREN) + eecon2.unready(); + else + eecon2.unarm(); + break; + + default: + cout << "EEPROM_WIDE::callback() bad eeprom state " << eecon2.get_eestate() << '\n'; + bp.halt(); + } +} + +void EEPROM_WIDE::initialize(uint new_rom_size) +{ + + eedatah.set_eeprom(this); + eeadrh.set_eeprom(this); + + EEPROM::initialize(new_rom_size); +} + + +void EEPROM_PIR::callback() +{ + + switch(eecon2.get_eestate()) { + case EECON2::EEREAD: + //cout << "eeread\n"; + + eecon2.unarm(); + if(eecon1.value.get() & EECON1::EEPGD) { + cout << "Should not be possible to get here\n"; + } else { + if ( get_address() < rom_size ) + eedata.value.put(rom[get_address()]->get()); + else + { + cout << "LONG_EEPROM read address is out of range " << hex << eeadr.value.get() + (eeadrh.value.get() << 8) << '\n'; + bp.halt(); + } + } + + eecon1.value.put(eecon1.value.get() & (~EECON1::RD)); + break; + + case EECON2::EEWRITE_IN_PROGRESS: + //cout << "eewrite\n"; + + if(eecon1.value.get() & EECON1::EEPGD) // write program memory + { + cout << "EEPROM_PIR can't do program writes\n"; + } + else // read eeprom memory + { + if(wr_adr < rom_size) + { + rom[wr_adr]->value.put(wr_data); + } + else + { + cout << "LONG_EEPROM write address is out of range " << hex << wr_adr << '\n'; + bp.halt(); + } + } + + write_is_complete(); + + if (eecon1.value.get() & eecon1.WREN) + eecon2.unready(); + else + eecon2.unarm(); + break; + + default: + cout << "EEPROM_LONG::callback() bad eeprom state " << eecon2.get_eestate() << '\n'; + bp.halt(); + } +} + +//------------------------------------------------------------------------ +// EEPROM_EXTND is based on data sheets for 16F193X and +// 12(L)F1822/PIC16(L)F1823. It has the following features +// +// read/write with 16 bit data path +// performs I/O to eeprom, program and configuration memory +// supports data latches for writing to program and Configuration memory +// Performs block erase of program and Configuration memory +// Supports write protect of program memory +// +EEPROM_EXTND::EEPROM_EXTND(Processor *pCpu, PIR *pPir) + : EEPROM_WIDE(pCpu,pPir), write_latches(NULL), prog_wp(0) +{ +} +EEPROM_EXTND::~EEPROM_EXTND() +{ + if (write_latches != NULL) + delete[] write_latches; +} + +void EEPROM_EXTND::initialize( + uint new_rom_size, + int block_size, + int num_latches, + uint cfg_word_base, + bool _has_eeadrh) + +{ + EEPROM_WIDE::initialize(new_rom_size); + erase_block_size = block_size; + num_write_latches = num_latches; + if (write_latches != NULL) + delete[] write_latches; + write_latches = new uint [num_latches]; + for(int i = 0; i < num_latches; i++) + write_latches[i] = LATCH_MT; + + config_word_base = cfg_word_base; + has_eeadrh = _has_eeadrh; +} + +void EEPROM_EXTND::start_program_memory_read() +{ + + rd_adr = eeadr.value.get() | (eeadrh.value.get() << 8); + get_cycles().set_break(get_cycles().get() + 2, this); + cpu_pic->pc->increment(); + +} +void EEPROM_EXTND::start_write() +{ + eecon1.value.put( eecon1.value.get() | eecon1.WRERR); + wr_adr = eeadr.value.get() + (eeadrh.value.get() << 8); + wr_data = eedata.value.get() + (eedatah.value.get() << 8); + + eecon2.start_write(); + + if (eecon1.value.get() & (EECON1::EEPGD|EECON1::CFGS)) + { + // stop execution fo 2 ms + get_cycles().set_break(get_cycles().get() + (uint64_t)(.002*get_cycles().instruction_cps()), this); + cpu_pic->pc->increment(); + bp.set_pm_write(); + cpu_pic->pm_write(); + + } + else + get_cycles().set_break(get_cycles().get() + EPROM_WRITE_TIME, this); + +} + + +void EEPROM_EXTND::callback() +{ + int index; + bool write_error = false; + //cout << "eeprom call back\n"; + + bp.clear_pm_write(); + + switch(eecon2.get_eestate()) { + case EECON2::EEREAD: + //cout << "eeread\n"; + + eecon2.unarm(); + if (eecon1.value.get() & EECON1::CFGS) // Read Config data + { + uint read_data; + read_data = cpu->get_config_word(config_word_base | rd_adr); + + Dprintf(("read_data=0x%x config_word_base=0x%x rd_adr=0x%x\n", read_data, config_word_base, rd_adr)); + if (read_data == 0xffffffff) read_data = 0; + eedata.value.put(read_data & 0xff); + eedatah.value.put((read_data>>8) & 0xff); + } + else if(eecon1.value.get() & EECON1::EEPGD) // read program memory + { + int opcode = cpu->pma->get_opcode(rd_adr); + eedata.value.put(opcode & 0xff); + eedatah.value.put((opcode>>8) & 0xff); + } + else // read eeprom data + { + if (eeadr.value.get() < rom_size) + eedata.value.put(rom[eeadr.value.get()]->get()); + else + { + cout << "EXTND_EEPROM read address is out of range " << hex << eeadr.value.get() << '\n'; + bp.halt(); + } + } + eecon1.value.put(eecon1.value.get() & (~EECON1::RD)); + break; + + case EECON2::EEWRITE_IN_PROGRESS: + //cout << "eewrite\n"; + + switch(eecon1.value.get() & (EECON1::EEPGD|EECON1::CFGS|EECON1::LWLO|EECON1::FREE)) + { + case EECON1::EEPGD: // write program memory + bp.clear_pm_write(); + index = wr_adr & (num_write_latches - 1); + wr_adr &= ~(num_write_latches - 1); + write_latches[index] = wr_data; + if (wr_adr >= prog_wp) + { + for(int i = 0; i < num_write_latches; i++) + { + if (write_latches[i] != LATCH_MT) + { + cpu->init_program_memory(cpu->map_pm_index2address(wr_adr+i), write_latches[i]); + write_latches[i] = LATCH_MT; + } + } + } + else + { + printf("Warning: attempt to Write protected Program memory 0x%x\n", + wr_adr); + write_error = true; + bp.halt(); + //gi.simulation_has_stopped(); + } + break; + + case EECON1::EEPGD|EECON1::LWLO: // write to latches + case EECON1::CFGS|EECON1::LWLO: // write to latches + index = wr_adr & (num_write_latches - 1); + write_latches[index] = wr_data; + break; + + case EECON1::CFGS: // write config word memory + case EECON1::CFGS|EECON1::EEPGD: + index = wr_adr & (num_write_latches - 1); + wr_adr &= ~(num_write_latches - 1); + write_latches[index] = wr_data; + for(int i = 0; i < num_write_latches; i++) + { + if (write_latches[i] != LATCH_MT) // was latch modified? + { + uint cfg_add = config_word_base | (wr_adr+i); + index = cpu->get_config_index(cfg_add); + if (index < 0) + { + printf("EEWRITE No config word at 0x%x\n", cfg_add); + write_error = true; + } + else if (!cpu_pic->getConfigMemory()->getConfigWord(index)->isEEWritable()) + { + printf("EEWRITE config word at 0x%x write protected\n", cfg_add); + write_error = true; + } + else + { + Dprintf(("write config data cfg_add %x wr_data %x\n", cfg_add, wr_data)); + if(!cpu->set_config_word(cfg_add, wr_data)) + { + printf("EEWRITE unknown failure to write %x to 0x%x\n", wr_data, cfg_add); + write_error = true; + } + + } + + write_latches[i] = LATCH_MT; + } + } + + break; + + case EECON1::CFGS|EECON1::FREE: // free Configuration memory row + // This row erase simply skips non-existant or write protected + // configuration words + wr_adr &= ~(erase_block_size-1); + for(int i = 0; i < erase_block_size; i++) + { + uint cfg_add = config_word_base | (wr_adr+i); + index = cpu->get_config_index(cfg_add); + if (index >= 0 && + cpu_pic->getConfigMemory()->getConfigWord(index)->isEEWritable()) + { + cpu->set_config_word(cfg_add, 0); + } + } + break; + + case EECON1::EEPGD|EECON1::FREE: // free program memory row + wr_adr &= ~(erase_block_size-1); + if (wr_adr >= prog_wp) + { + for(int i = 0; i < erase_block_size; i++) + //cpu->erase_program_memory(cpu->map_pm_index2address(wr_adr+i)); + cpu->init_program_memory(cpu->map_pm_index2address(wr_adr+i), 0); + } + else + { + printf("Warning: attempt to row erase protected Program memory\n"); + write_error = true; + bp.halt(); + //gi.simulation_has_stopped(); + } + break; + + case EECON1::LWLO: // LWLO ignored to eeprom + default: // write to eeprom + if(wr_adr < rom_size) + { + rom[wr_adr]->value.put(wr_data); + } + else + { + cout << "EXTND_EEPROM write address is out of range " << hex << wr_adr << '\n'; + write_error = true; + bp.halt(); + } + + break; + } + + if (!write_error) + eecon1.value.put( eecon1.value.get() & ~ eecon1.WRERR); + write_is_complete(); + + if (eecon1.value.get() & eecon1.WREN) + eecon2.unready(); + else + eecon2.unarm(); + break; + + default: + cout << "EEPROM_EXTND::callback() bad eeprom state " << eecon2.get_eestate() << '\n'; + bp.halt(); + } +} + diff --git a/src/gpsim/modules/eeprom.h b/src/gpsim/modules/eeprom.h new file mode 100644 index 0000000..1c29ca3 --- /dev/null +++ b/src/gpsim/modules/eeprom.h @@ -0,0 +1,311 @@ +/* + Copyright (C) 1998-2003 Scott Dattalo + 2003 Mike Durian + 2013 Roy Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef EEPROM_H +#define EEPROM_H + +#include + +#include "gpsim_classes.h" +#include "registers.h" +#include "breakpoints.h" + +#include + +class pic_processor; +class EEPROM; +class PIR_SET; +class INTCON; +class PIR; + +//--------------------------------------------------------- +// EECON1 - EE control register 1 +// + +class EECON1 : public sfr_register +{ + public: + enum + { + RD = (1<<0), + WR = (1<<1), + WREN = (1<<2), + WRERR = (1<<3), + EEIF = (1<<4), + FREE = (1<<4), // 14 bit Extended + LWLO = (1<<5), // "" + CFGS = (1<<6), // "" + EEPGD = (1<<7) + }; + + EECON1(Processor *pCpu, const char *pName, const char *pDesc); + + void put(uint new_value); + virtual void put_value(uint new_value); + uint get(); + + inline void set_eeprom(EEPROM *ee) { eeprom = ee; } + inline void set_valid_bits(uint vb) { valid_bits = vb; } + inline uint get_valid_bits() { return (valid_bits); } + inline void set_bits(uint b) { valid_bits |= b; } + inline void clear_bits(uint b) { valid_bits &= ~b; } + inline void set_always_on(uint b) { always_on_bits = b; } + + //private: + uint valid_bits; + uint always_on_bits; + EEPROM *eeprom; +}; + +const uint EECON1_VALID_BITS = (EECON1::RD | EECON1::WR | + EECON1::WREN | EECON1::EEIF); + +// +// EECON2 - EE control register 2 +// + +class EECON2 : public sfr_register +{ + public: + + enum EE_STATES + { + EENOT_READY, + EEHAVE_0x55, + EEREADY_FOR_WRITE, + EEWRITE_IN_PROGRESS, + EEUNARMED, + EEREAD + }; + + EECON2(Processor *pCpu, const char *pName, const char *pDesc); + + void put(uint new_value); + uint get(); + void ee_reset() { eestate = EENOT_READY;}; + + inline virtual void set_eeprom(EEPROM *ee) { eeprom = ee; } + inline enum EE_STATES get_eestate() { return (eestate); } + inline void unarm() { eestate = EEUNARMED; } + inline void unready() { eestate = EENOT_READY; } + inline void read() { eestate = EEREAD; } + inline void start_write() { eestate = EEWRITE_IN_PROGRESS; } + + inline bool is_unarmed() { return (eestate == EEUNARMED); } + inline bool is_not_ready() { return (eestate == EENOT_READY); } + inline bool is_ready_for_write() { return (eestate == EEREADY_FOR_WRITE); } + inline bool is_writing() { return (eestate == EEWRITE_IN_PROGRESS); } + + //private: + EEPROM *eeprom; + enum EE_STATES eestate; +}; + +// +// EEDATA - EE data register +// + +class EEDATA : public sfr_register +{ + public: + + EEDATA(Processor *pCpu, const char *pName, const char *pDesc); + + void put(uint new_value); + uint get(); + virtual void set_eeprom(EEPROM *ee) { eeprom = ee; } + + //private: + EEPROM *eeprom; +}; + +// +// EEADR - EE address register +// + +class EEADR : public sfr_register +{ + public: + + EEADR(Processor *pCpu, const char *pName, const char *pDesc); + + void put(uint new_value); + uint get(); + + virtual void set_eeprom(EEPROM *ee) { eeprom = ee; } + + //private: + EEPROM *eeprom; +}; + + +//------------------------------------------------------------------------ +//------------------------------------------------------------------------ + +const int EPROM_WRITE_TIME = 20; + +class EEPROM : public TriggerObject +{ + public: + + EEPROM(Processor *pCpu); + ~EEPROM(); + void reset(RESET_TYPE); + virtual void set_intcon(INTCON *ic); + + virtual void callback(); + virtual void callback_print(){ puts(" EEPROM");} + virtual void start_write(); + virtual void write_is_complete(); + virtual void start_program_memory_read(); + virtual void initialize(uint new_rom_size); + virtual Register *get_register(uint address); + virtual void save_state(); + + inline virtual void change_rom(uint offset, uint val) { + assert(offset < rom_size); + rom[offset]->value.put(val); + } + + inline int register_size() { return (rom_data_size); } + inline void set_resister_size(int bytes) { rom_data_size = bytes; } + inline virtual uint get_rom_size() { return (rom_size); } + // XXX might want to make get_rom a friend only to cli_dump + inline virtual Register **get_rom() { return (rom); } + + inline virtual EECON1 *get_reg_eecon1() { return (&eecon1); } + inline virtual EECON2 *get_reg_eecon2() { return (&eecon2); } + inline virtual EEDATA *get_reg_eedata() { return (&eedata); } + inline virtual EEADR *get_reg_eeadr() { return (&eeadr); } + inline virtual EEADR *get_reg_eeadrh() { return 0; } // No eeadrh on basic EEPROM + + void dump(); + + //protected: + char *name_str; + Processor *cpu; + INTCON *intcon; + + EECON1 eecon1; // The EEPROM consists of 4 control registers + EECON2 eecon2; // on the F84 and 6 on the F877 + EEDATA eedata; + EEADR eeadr; + + Register **rom; // and the data area. + //RegisterCollection *m_UiAccessOfRom; // User access to the rom. + + int rom_data_size; // data width in bytes + uint rom_size; + uint wr_adr,wr_data; // latched adr and data for eewrites. + uint rd_adr; // latched adr for eereads. + uint abp; // break point number that's set during eewrites + + protected: + virtual uint get_address(void) { return eeadr.value.get(); }; +}; + +/** + * A class for the EEPROM in later devices with PIR-mapped status. Some of + * these devices (e.g. 18F4620) have more than 256 bytes of EEPROM so this + * class implements the eeadrh register too. This will not be used if the + * EEPROM size is 256 or less. + */ +class EEPROM_PIR : public EEPROM +{ +public: + + EEPROM_PIR(Processor *pCpu, PIR *); + ~EEPROM_PIR(); + + // the 16f628 eeprom is identical to the 16f84 eeprom except + // for the size and the location of EEIF. The size is taken + // care of when the '628 is constructed, the EEIF is taken + // care of here: + + virtual void start_write(); + virtual void write_is_complete(); + virtual void callback(); + virtual void set_pir(PIR *pir) {m_pir = pir;} + + inline virtual EEADR *get_reg_eeadrh() { return (rom_size>256) ? (&eeadrh) : 0; } + virtual void initialize(uint new_rom_size); + virtual void callback_print(){ puts(" EEPROM_PIR");} + +protected: + PIR *m_pir; + + EEADR eeadrh; + + virtual uint get_address(void) + { return (rom_size <= 256 ) ? eeadr.value.get() + : (eeadrh.value.get()<<8)+eeadr.value.get(); }; +}; + + +class EEPROM_WIDE : public EEPROM_PIR +{ +public: + EEPROM_WIDE(Processor *pCpu, PIR *); + ~EEPROM_WIDE(); + + virtual void start_write(); + virtual void callback(); + virtual void callback_print(){ puts(" EEPROM_WIDE");} + virtual void start_program_memory_read(); + virtual void initialize(uint new_rom_size); + + inline virtual EEADR *get_reg_eeadrh() { return (&eeadrh); } + inline virtual EEDATA *get_reg_eedatah() { return (&eedatah); } + + //protected: + EEDATA eedatah; +}; + +class EEPROM_EXTND : public EEPROM_WIDE +{ +public: + EEPROM_EXTND(Processor *pCpu, PIR *); + ~EEPROM_EXTND(); + + inline virtual EEADR *get_reg_eeadrh() { return (has_eeadrh) ? (&eeadrh) : 0; } + virtual void start_write(); + virtual void start_program_memory_read(); + virtual void callback(); + virtual void callback_print(){ puts(" EEPROM_EXTND");} + void initialize(uint new_rom_size, int block_size, int num_latches, uint cfg_word_base, bool _has_eeadrh = true); + void set_prog_wp(uint adr) { prog_wp = adr;} + +#define LATCH_MT 0x7fff + +protected: + int erase_block_size; + int num_write_latches; + uint *write_latches; + uint config_word_base; + uint prog_wp; // program memory below this address is write protected + bool has_eeadrh; + +}; + + + +#endif /* EEPROM_H */ diff --git a/src/gpsim/modules/i2c-ee.cc b/src/gpsim/modules/i2c-ee.cc new file mode 100644 index 0000000..2123ef1 --- /dev/null +++ b/src/gpsim/modules/i2c-ee.cc @@ -0,0 +1,639 @@ +/* + Copyright (C) 1998-2003 Scott Dattalo + 2004 Rob Pearce + 2006,2015 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include + +#include +#include +using namespace std; + +//#include + +#include "config.h" + +//#include "trace.h" +#include "pic-processor.h" +#include "stimuli.h" +#include "i2c-ee.h" +#include "registers.h" + +//#define DEBUG +#if defined(DEBUG) +#include "config.h" +#define Dprintf(arg) {printf("%s:%d ",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +// I2C EEPROM Peripheral +// +// This object emulates the I2C EEPROM peripheral on the 12CE51x +// +// It's main purpose is to provide a means by which the port pins +// may communicate. +// + + +//-------------------------------------------------------------- +// +// + +PromAddress::PromAddress(I2C_EE *eeprom, const char *_name, const char * desc) + : Value(_name,desc) +{ + m_eeprom = eeprom; +} +void PromAddress::get(char *buffer, int buf_size) +{ + snprintf(buffer, buf_size, "%p", m_eeprom); +} + +class I2C_SLAVE_SDA : public IO_open_collector +{ + public: + i2c_slave *pEE; + + I2C_SLAVE_SDA(i2c_slave *_pEE, const char *_name) : + IO_open_collector(_name), pEE(_pEE) + { + bDrivingState = true; + bDrivenState = true; + + // Make the pin an output. + update_direction( IO_bi_directional::DIR_OUTPUT, true ); + + }; + + void setDrivenState(bool new_dstate) + { + bool diff = new_dstate ^ bDrivenState; + + Dprintf(("i2c_slave sda setDrivenState %d\n", new_dstate)); + if( pEE && diff ) + { + bDrivenState = new_dstate; + pEE->new_sda_edge(new_dstate); + } + } + void setDrivingState(bool new_state) + { + bDrivingState = new_state; + bDrivenState = new_state; + + if (!new_state) update_direction( IO_bi_directional::DIR_OUTPUT,true ); + else update_direction( IO_bi_directional::DIR_INPUT,true ); + + if(snode) snode->update(); + } +}; + + +class I2C_SLAVE_SCL : public IO_open_collector +{ + public: + i2c_slave *pEE; + + I2C_SLAVE_SCL(i2c_slave *_pEE, const char *_name) : + IO_open_collector(_name), pEE(_pEE) + { + bDrivingState = true; + bDrivenState = true; + + // Make the pin an output. + update_direction(IO_bi_directional::DIR_INPUT,true); + + }; + + void setDrivenState(bool new_state) + { + + bool diff = new_state ^ bDrivenState; + + Dprintf(("i2c_slave scl setDrivenState %d\n", new_state)); + if( pEE && diff ) + { + bDrivenState = new_state; + pEE->new_scl_edge(bDrivenState); + } + } + void setDrivingState(bool new_state) + { + bDrivingState = new_state; + bDrivenState = new_state; + + if(snode) snode->update(); + } +}; + +i2c_slave::i2c_slave() +{ + scl = new I2C_SLAVE_SCL(this, "SCL"); + sda = new I2C_SLAVE_SDA(this, "SDA"); + + bus_state = IDLE; + bit_count = 0; + xfr_data = 0; +} + +i2c_slave::~i2c_slave() +{ + if (sda) delete sda; + if (scl) delete scl; +} +void i2c_slave::new_scl_edge(bool level) +{ + scl_high = level; + get_cycles().set_break(get_cycles().get() + 1, this); + if (!level) //SCL goes low + { + if (bus_state == RX_DATA && bit_count == 0) + { + sda->setDrivingState (true); // Master drives bus + } + } +} + +void i2c_slave::callback() +{ + if (scl_high) // read data from master + { + switch ( bus_state ) + { + case RX_I2C_ADD : // Read address, send ACK to master if us + if ( shift_read_bit ( sda->getDrivenState() ) ) + { + if (match_address()) + { + bus_state = ACK_I2C_ADD; + r_w = xfr_data & 1; + } + else + { + // not for us + bus_state = IDLE; + } + } + break; + + case RX_DATA : // read data from master, send ACK when complete + if ( shift_read_bit ( sda->getDrivenState() ) ) + { + //start_write(); + put_data(xfr_data); + bus_state = ACK_RX; + } + break; + + case ACK_RD : // read ACK/NACK from master + if ( sda->getDrivenState() == false ) // ACK + { + // The master has asserted ACK, so we send another byte + bus_state = TX_DATA; + bit_count = 8; + xfr_data = get_data(); + } + else // NACK + { + bus_state = IDLE; // Terminate writes to master + } + break; + + case ACK_WR : // slave sent ACK/NACK + if (r_w) + { + // master is reading, we transmit + bus_state = TX_DATA; + bit_count = 8; + xfr_data = get_data(); + } + else + { + // master is writing, we read + bus_state = RX_DATA; + bit_count = 0; + xfr_data = 0; + } + break; + + case ACK_RX : // ACK being read by master + bus_state = RX_DATA; + bit_count = 0; + xfr_data = 0; + break; + + default: + break; + + } + } + else // SCL low, put data on bus for master (if required) + { + switch ( bus_state ) + { + case ACK_I2C_ADD : // after address ACK start to send data + sda->setDrivingState ( false ); // send ACK + bus_state = ACK_WR; + // Check the R/W bit of the address byte + + if ( xfr_data & 0x01 ) slave_transmit(true); + else slave_transmit(false); + break; + + case TX_DATA : // send data to master + if ( bit_count == 0 ) + { + sda->setDrivingState ( true ); // Release the bus + bus_state = ACK_RD; + } + else sda->setDrivingState ( shift_write_bit() ); + + break; + + case ACK_RX : // Send ACK read data + sda->setDrivingState (false); + break; + + default: + break; + } + } +} + +void i2c_slave::new_sda_edge(bool direction) +{ + // Vprintf(("i2c_slave::new_sda_edge direction:%d\n", direction)); + if (scl->getDrivenState()) // SCL high + { + if ( direction ) // SDA high + { + /* stop bit */ + if ( bus_state == WRPEND ) + { + bus_state = IDLE; // Should be busy + } + else bus_state = IDLE; + } + else + { + /* start bit */ + if (bus_state == IDLE) + bus_state = RX_I2C_ADD; + else + bus_state = START; + bit_count = 0; + xfr_data = 0; + } + } + +} + +bool i2c_slave::shift_read_bit ( bool x ) +{ + xfr_data = ( xfr_data << 1 ) | ( x != 0 ); + bit_count++; + if ( bit_count == 8 ) + return true; + else + return false; +} + +bool i2c_slave::shift_write_bit () +{ + bool bit; + + bit_count--; + bit = ( xfr_data >> bit_count ) & 1; + Dprintf(("I2c_slave : send bit %u = %c\n", bit_count, + bit ? '1' : '0')); + + return bit; +} + +bool i2c_slave::match_address() +{ + if((xfr_data & 0xfe) == i2c_slave_address) + { + r_w = xfr_data & 1; + return true; + } + return false; +} +const char * i2c_slave::state_name() +{ + switch (bus_state) { + case IDLE: + return "IDLE"; + break; + case START: + return "START"; + break; + case RX_I2C_ADD: + return "RX_I2C_ADD"; + break; + case ACK_I2C_ADD: + return "ACK_I2C_ADD"; + break; + case RX_DATA: + return "RX_DATA"; + break; + case ACK_WR: + return "ACK_WR"; + break; + case ACK_RX: + return "ACK_RX"; + break; + case WRPEND: + return "WRPEND"; + break; + case ACK_RD: + return "ACK_RD"; + break; + case TX_DATA: + return "TX_DATA"; + break; + } + return "UNKNOWN"; +} +//---------------------------------------------------------- +// +// I2C EE PROM +// +// There are many conditions that need to be verified against a real part: +// 1) what happens if +// > the simulator +// 2) what happens if a RD is initiated while data is being written? +// > the simulator ignores the read +// 3) what happens if +// > the simulator + +I2C_EE::I2C_EE(Processor *pCpu, uint _rom_size, uint _write_page_size, + uint _addr_bytes, uint _CSmask, + uint _BSmask, uint _BSshift) + : i2c_slave(), + rom(0), + rom_size(_rom_size), // size of eeprom in bytes + rom_data_size(1), + xfr_addr(0), + write_page_off(0), + write_page_size(_write_page_size), // Page size for writes + bit_count(0), m_command(0), + m_chipselect(0), + m_CSmask(_CSmask), // mask for chip select in command + m_BSmask(_BSmask), // mask for bank select in command + m_BSshift(_BSshift), // right shift bank select to bit 0 + m_addr_bytes(_addr_bytes), // number of address bytes + m_write_protect(false), + ee_busy(false) +{ + + // Create the rom + + rom = (Register **) new char[sizeof (Register *) * rom_size]; + assert(rom != 0); + + // Initialize the rom + + char str[100]; + for (uint i = 0; i < rom_size; i++) { + snprintf (str,sizeof(str),"ee0x%02x", i); + rom[i] = new Register(pCpu,str,""); + rom[i]->address = i; + rom[i]->value.put(0); + rom[i]->alias_mask = 0; + } +} + +I2C_EE::~I2C_EE() +{ + for (uint i = 0; i < rom_size; i++) delete rom[i]; + delete [] rom; +} + +void I2C_EE::slave_transmit(bool yes) +{ + if (yes) // prepare to output eeprom data + { + io_state = TX_EE_DATA; + xfr_addr += write_page_off; + write_page_off = 0; + } + else // getting eeprom address + { + io_state = RX_EE_ADDR; + xfr_addr = (m_command & m_BSmask) >> m_BSshift; + m_addr_cnt = m_addr_bytes; + } +} + +// data written by master device +void I2C_EE::put_data(uint data) +{ + switch(io_state) + { + case RX_EE_ADDR: + // convert xfr_data to base and page offset to allow + // sequencel writes to wrap around page + xfr_addr = ((xfr_addr << 8) | data ) % rom_size; + if (--m_addr_cnt == 0) + { + + write_page_off = xfr_addr % write_page_size; + xfr_addr -= write_page_off; + + io_state = RX_EE_DATA; + } + break; + + case RX_EE_DATA: + if (! m_write_protect) + { + rom[xfr_addr + write_page_off]->value.put( data ); + write_page_off = (write_page_off+1) % write_page_size; + } + else + cout << "I2c_EE start_write- write protect\n"; + break; + + case TX_EE_DATA: + cout << "I2C_EE put_data in output state\n"; + break; + + default: + cout << "I2c_EE unexpected state\n"; + break; + } +} + +uint I2C_EE::get_data() +{ + + uint data = rom[xfr_addr]->get(); + + xfr_addr = (xfr_addr + 1) % rom_size; + return (data); +} + + + +// Bit 0 is write protect, 1-3 is A0 - A2 +void I2C_EE::set_chipselect(uint _cs) +{ + m_write_protect = (_cs & 1) == 1; + m_chipselect = (_cs & m_CSmask); +} + +void I2C_EE::debug() +{ + if (!scl || !sda || !rom) return; + + cout << "I2C EEPROM: current state="<value.put(val); +} + +// write data to eeprom unles write protect is active +void I2C_EE::start_write() +{ + uint addr = xfr_addr + write_page_off; + if (! m_write_protect) rom[addr]->put ( xfr_data ); + + else cout << "I2c_EE start_write- write protect\n"; +} + +// allow 5 msec after last write +void I2C_EE::write_busy() +{ + uint64_t fc; + + if (! ee_busy && ! m_write_protect) + { + fc = (uint64_t)(get_cycles().instruction_cps() * 0.005); + get_cycles().set_break(get_cycles().get() + fc, this); + ee_busy = true; + } +} + +void I2C_EE::write_is_complete() +{ +} + +void I2C_EE::callback_print() +{ + cout << "Internal I2C-EEPROM\n"; +} + +bool I2C_EE::match_address() +{ + if ((xfr_data & 0xf0) == 0xa0 && ((xfr_data & m_CSmask) == m_chipselect)) + { + m_command = xfr_data; + return true; + } + return false; +} + +void I2C_EE::reset(RESET_TYPE by) +{ + switch(by) + { + case POR_RESET: + bus_state = IDLE; + ee_busy = false; + break; + default: + break; + } +} + +void I2C_EE::attach ( Stimulus_Node *_scl, Stimulus_Node *_sda ) +{ + _scl->attach_stimulus ( scl ); + _sda->attach_stimulus ( sda ); +} + + +void I2C_EE::dump() +{ + uint i, j, reg_num,v; + + cout << " " << hex; + + // Column labels + for (i = 0; i < 16; i++) + cout << setw(2) << setfill('0') << i << ' '; + + cout << '\n'; + + for (i = 0; i < rom_size/16; i++) + { + cout << setw(2) << setfill('0') << i << ": "; + + for (j = 0; j < 16; j++) + { + reg_num = i * 16 + j; + if(reg_num < rom_size) + { + v = rom[reg_num]->get_value(); + cout << setw(2) << setfill('0') << v << ' '; + } + else cout << "-- "; + } + cout << " "; + + for (j = 0; j < 16; j++) + { + reg_num = i * 16 + j; + if(reg_num < rom_size) + { + v = rom[reg_num]->get_value(); + if( (v >= ' ') && (v <= 'z')) cout.put(v); + else cout.put('.'); + } + } + cout << '\n'; + } +} diff --git a/src/gpsim/modules/i2c-ee.h b/src/gpsim/modules/i2c-ee.h new file mode 100644 index 0000000..cf8d516 --- /dev/null +++ b/src/gpsim/modules/i2c-ee.h @@ -0,0 +1,167 @@ +/* + Copyright (C) 1998-2003 Scott Dattalo + 2003 Mike Durian + 2006 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef I2C_EE_H +#define I2C_EE_H + +#include "trigger.h" +#include "gpsim_classes.h" +//#include "value.h" + +class Register; +class pic_processor; +class I2C_EE; +class I2C_SLAVE_SCL; +class I2C_SLAVE_SDA; +class Stimulus_Node; + +//------------------------------------------------------------------------ +//------------------------------------------------------------------------ + +class PromAddress : public Value +{ + public: + PromAddress(I2C_EE *eeprom, const char *_name, const char * desc); + void get(I2C_EE *&eeprom) { eeprom = m_eeprom;} + void get(char *buffer, int buf_size); + + private: + I2C_EE *m_eeprom; +}; + + +class i2c_slave : public TriggerObject +{ + + public: + i2c_slave(); + ~i2c_slave(); + void new_sda_edge(bool direction); + void new_scl_edge(bool direction); + bool shift_read_bit ( bool x ); + bool shift_write_bit (); + virtual bool match_address(); + virtual void put_data(uint data){} + virtual uint get_data(){return 0;} + virtual void slave_transmit(bool yes){} + const char * state_name(); + + I2C_SLAVE_SCL *scl; // I2C clock + I2C_SLAVE_SDA *sda; // I2C data + uint i2c_slave_address; + virtual void callback(); + + protected: + + bool scl_high; + bool nxtbit; + bool r_w; + uint bit_count; // Current bit number for either Tx or Rx + uint xfr_data; // latched data from I2C. + + + enum { + IDLE=0, + START, + RX_I2C_ADD, + ACK_I2C_ADD, + RX_DATA, + ACK_RX, + ACK_WR, + WRPEND, + ACK_RD, + TX_DATA + } bus_state; + + +}; +class I2C_EE : public i2c_slave//RRR, public TriggerObject +{ + public: + + I2C_EE(Processor *pCpu, + uint _rom_size, uint _write_page_size = 1, + uint _addr_bytes = 1, uint _CSmask = 0, + uint _BSmask = 0, uint _BSshift = 0 + ); + virtual ~I2C_EE(); + void reset(RESET_TYPE); + void debug(); + + // virtual void callback(); + virtual void callback_print(); + virtual void start_write(); + virtual void write_busy(); + virtual void write_is_complete(); + virtual void put_data(uint data); + virtual uint get_data(); + virtual void slave_transmit(bool); + virtual bool match_address(); + + virtual Register *get_register(uint address); + inline int register_size() {return rom_data_size; } + inline void set_register_size(int bytes) { rom_data_size = bytes; } + + virtual void attach ( Stimulus_Node *_scl, Stimulus_Node *_sda ); + virtual void set_chipselect(uint _chipselect); + + inline virtual uint get_rom_size() { return (rom_size); } + // XXX might want to make get_rom a friend only to cli_dump + inline virtual Register **get_rom() { return (rom); } + + void dump(); + + protected: + Register **rom; // The data area. + + uint rom_size; + int rom_data_size; // width of data in bytes + uint xfr_addr; // latched adr from I2C. + uint write_page_off; // offset into current write page + uint write_page_size; // max number of writes in one block + uint bit_count; // Current bit number for either Tx or Rx + uint m_command; // Most recent command received from I2C host + uint m_chipselect; // Chip select bits, A0 = bit 1, A1 = bit 2, A2 = bit 3 + uint m_CSmask; // Which chip select bits in command are active + uint m_BSmask; // Which block select bits are active in command + uint m_BSshift; // right shift for block select bits + uint m_addr_bytes; // number of address bytes in write command + uint m_addr_cnt; // # 0f address bytes yet to get + bool m_write_protect; // chip is write protected + bool ee_busy; // true if a write is in progress. + bool nxtbit; + + enum { + RX_EE_ADDR = 1, + RX_EE_DATA, + TX_EE_DATA + } io_state; + + private: + // Is this even used? + virtual void change_rom(uint offset, uint val); +}; + + + + +#endif /* I2C_EE_H */ diff --git a/src/gpsim/modules/lcd_module.cc b/src/gpsim/modules/lcd_module.cc new file mode 100644 index 0000000..3209f3c --- /dev/null +++ b/src/gpsim/modules/lcd_module.cc @@ -0,0 +1,652 @@ +/* + Copyright (C) 2017 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include "config.h" +#include "14bit-processors.h" +#include "14bit-registers.h" +#include "a2d_v2.h" + + +#include "lcd_module.h" + +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("%s:%d ",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + + +LCD_MODULE::LCD_MODULE(Processor *pCpu, bool p16f917) + : cpu(pCpu), IntSrc(0) +{ + char lcdsex[] = "lcdsex"; + char lcddataX[10]; + int i; + + Vlcd1 = Vlcd2 = Vlcd3 = 0; + Vlcd1_on = Vlcd2_on = Vlcd3_on = false; + bias_now = 0; + future_cycle = 0; + is_sleeping = false; + + lcdcon = new LCDCON(pCpu, "lcdcon", "LCD control register", this); + lcdps = new LCDPS(pCpu, "lcdps", "LCD prescaler select register", this, 0xcf); + for (i = 0; i < 3 ; i++) + { + lcdsex[5] = '0' + i; + if ( i < 2 || p16f917) + lcdSEn[i] = new LCDSEn(pCpu, (const char *)lcdsex, "LCD Segment register", this, i); + else + lcdSEn[i] = 0; + } + printf("\n"); + for (i=0; i < 12; i++) + { + snprintf(lcddataX, sizeof(lcddataX), "lcddata%d", i); + if (((i+1)%3 != 0) || p16f917) + { + lcddatax[i] = new LCDDATAx(pCpu, (const char *)lcddataX, "LCD Data register", this, i); + } + else + { + lcddatax[i] = 0; + } + } + for(i=0; i < 24; i++) + LCDsegn[i] = 0; + for(i=0; i<4; i++) + LCDcom[i] = 0; +} +// set LCD bias pins +void LCD_MODULE::set_Vlcd(PinModule *_Vlcd1, PinModule *_Vlcd2, PinModule *_Vlcd3) +{ + Vlcd1 = _Vlcd1; + Vlcd2 = _Vlcd2; + Vlcd3 = _Vlcd3; +} +// set LCD common pins +void LCD_MODULE::set_LCDcom(PinModule *c0, PinModule *c1, PinModule *c2, PinModule *c3) +{ + LCDcom[0] = c0; + LCDcom[1] = c1; + LCDcom[2] = c2; + LCDcom[3] = c3; +} + +// set 4 LCD segment pins (at a time) +void LCD_MODULE::set_LCDsegn(uint i, PinModule *c0, PinModule *c1, PinModule *c2, PinModule *c3) +{ + assert(i <= 20); + LCDsegn[i+0] = c0; + LCDsegn[i+1] = c1; + LCDsegn[i+2] = c2; + LCDsegn[i+3] = c3; +} + +void LCD_MODULE::clear_bias() +{ + Dprintf(("LCD_MODULE::clear_bias()\n")); + bias_now = 0; + if (Vlcd1_on) + { + Vlcd1->AnalogReq(lcdps, false, Vlcd1->getPin().name().c_str()); + Vlcd1_on = false; + } + if (Vlcd2_on) + { + Vlcd2->AnalogReq(lcdps, false, Vlcd2->getPin().name().c_str()); + Vlcd2_on = false; + } + if (Vlcd3_on) + { + Vlcd3->AnalogReq(lcdps, false, Vlcd3->getPin().name().c_str()); + Vlcd3_on = false; + } +} + +void LCD_MODULE::set_bias(uint lmux) +{ + bool biasmode = (lcdps->value.get() & LCDPS::BIASMD); + unsigned char bias = 0; + + Dprintf(("LCD_MODULE::set_bias Vlcd1=%p\n", Vlcd1)); + + switch(lmux) + { + case 0: + bias = 1; + break; + + case 1: + bias = biasmode ? 2 : 3; + break; + + case 2: + bias = biasmode ? 2 : 3; + break; + + case 3: + bias = 3; + break; + } + if (bias == bias_now) + return; + + switch(bias) + { + case 1: //Static bias + if (lcdcon->value.get() & LCDCON::VLCDEN) + { + if (Vlcd1_on) + { + Vlcd1->AnalogReq(lcdps, false, Vlcd1->getPin().name().c_str()); + Vlcd1_on = false; + } + if (Vlcd2_on) + { + Vlcd2->AnalogReq(lcdps, false, Vlcd2->getPin().name().c_str()); + Vlcd2_on = false; + } + if (!Vlcd3_on) + { + Vlcd3->AnalogReq(lcdps, true, "vlcd3"); + Vlcd3_on = true; + } + + } + break; + + case 2: // 1/2 bias + case 3: // 1>/3 bias + if (!Vlcd1_on) + { + Vlcd1->AnalogReq(lcdps, true, "vlcd1"); + Vlcd1_on = true; + } + if (!Vlcd2_on) + { + Vlcd2->AnalogReq(lcdps, true, "vlcd2"); + Vlcd2_on = true; + } + if (!Vlcd3_on) + { + Vlcd3->AnalogReq(lcdps, true, "vlcd3"); + Vlcd3_on = true; + } + break; + } + + + bias_now = bias; +} + + +void LCD_MODULE::lcd_on_off(bool lcdOn) +{ + uint i; + if (lcdOn) + { + for (i=0; i < 3; i++) + { + if (lcdSEn[i]) + lcd_set_segPins(i, lcdSEn[i]->value.get(), lcdSEn[i]->value.get()^0); + } + lcd_set_com(lcdOn, lcdcon->value.get() & (LCDCON::LMUX0| LCDCON::LMUX1)); + start_clock(); + } + else + { + } +} +void LCD_MODULE::lcd_set_com(bool lcdOn, uint lmux) +{ + uint i; + + Dprintf(("LCD_MODULE::lcd_set_com on %d lmux %u\n", lcdOn, lmux)); + if (lcdOn) + { + for(i=0; i < 4; i++) + { + mux_now = lmux; + if (i <= lmux) + { + char name[5]; + snprintf(name, sizeof(name), "COM%u", i); + + if (LCDcom[i]->getPin().get_direction()) + LCDcomDirection |= (1<getPin().update_direction(1,true); + } + else + { + LCDcom[i]->getPin().update_direction(LCDcomDirection & (1<getPin().update_direction(LCDcomDirection & (1<value.get(); + Dprintf(("LCD_MODULE::sleep()\n")); + if (!(lcdps->value.get() & LCDPS::LCDA)) + return; + + // Stop during sleep + if ((con_reg & LCDCON::SLPEN) || !(con_reg & (LCDCON::CS0 | LCDCON::CS1))) + { + Dprintf(("LCD_MODULE::sleep() stop during sleep fc=%" PRINTF_GINT64_MODIFIER "d now=%" PRINTF_GINT64_MODIFIER "d\n", future_cycle, get_cycles().get())); + if (future_cycle >= get_cycles().get()) + { + get_cycles().clear_break(future_cycle); + future_cycle = 0; + phase = 0; + } + is_sleeping = true; + // Set all LCD outputs to zero + for(int l=0; l <= mux_now; l++) // scan across com related output + { + LCDcom[l]->getPin().putState(0.); + } + for(int k = 0; (k < 3) && lcdSEn[k]; k++) + { + uint enable = lcdSEn[k]->value.get(); + if (enable) + { + for(int i=0; i< 8; i++) + { + if (enable & (1<getPin().putState(0.); + } + } + } + + } +} +void LCD_MODULE::wake() +{ + uint con_reg = lcdcon->value.get(); + if (!(lcdps->value.get() & LCDPS::LCDA) || !is_sleeping) + return; + + is_sleeping = false; + + Dprintf(("LCD_MODULE::wake() fc=%" PRINTF_GINT64_MODIFIER "d\n", future_cycle)); + // Stop during sleep + if ((con_reg & LCDCON::SLPEN) || !(con_reg & (LCDCON::CS0 | LCDCON::CS1))) + { + Dprintf(("LCD_MODULE::wake() restart after sleep\n")); + start_clock(); + } +} + +void LCD_MODULE::lcd_set_segPins(uint regno, uint new_value, uint diff) +{ + unsigned char *pt = &LCDsegDirection[regno]; + + for (int i = 0; i < 8; i++) + { + uint mask = 1<getPin().get_direction()) *pt |= mask; + else *pt &= ~mask; + + port->getPin().update_direction(1,true); + } + else port->getPin().update_direction(*pt&mask, true); + } + } +} + +void LCD_MODULE::start_clock() +{ + uint prescale = (lcdps->value.get() & (LCDPS::LPMASK)) +1; + uint clock_source, frame_rate; + double freq; + + clock_source = 0; + Dprintf(("LCD_MODULE::start_clock() mux_now %x lmux %x\n", mux_now, lcdcon->value.get() & 0x3)); + + switch((lcdcon->value.get() & (LCDCON::CS0 | LCDCON::CS1)) >> 2) + { + case 0: // Fosc/8102 or instruction/sec / 2048; + clock_source = 2048; + break; + + case 1: //T1OSC(32kHz) (Timer1)/32 + freq = t1con->t1osc(); + if (freq > 1.) + clock_source = get_cycles().instruction_cps() * 32 /freq; + else + { + fprintf(stderr, "LCD_MODULE::start_clock() t1osc not enabled\n"); + return; + } + break; + + case 2: //LFINTOSC (31 kHz) /32 + case 3: + clock_source = get_cycles().instruction_cps() * 32 /31e3; + Dprintf(("LFINTOSC %u \n", clock_source)); + break; + } + if (mux_now != 3) + frame_rate = clock_source * (4 * prescale); + else + frame_rate = clock_source * (3 * prescale); + + num_phases = 2 * (mux_now + 1); + phase = 0; + + if (typeB()) // Type B wave form + { + clock_tick = frame_rate / (mux_now + 1); + start_typeB(); + } + else + { + clock_tick = frame_rate / num_phases; + start_typeA(); + } + Dprintf(("frame rate %u clock_tick %u %.1f\n", frame_rate, clock_tick, get_cycles().instruction_cps()/frame_rate)); + if (future_cycle >= get_cycles().get()) + { + get_cycles().clear_break(future_cycle); + future_cycle = 0; + } + save_hold_data(); + lcdps->value.put(lcdps->value.get() | LCDPS::LCDA); + if ((lcdps->value.get() & LCDPS::WFT) == 0) + lcdps->value.put(lcdps->value.get() | LCDPS::WA); + callback(); +} + +void LCD_MODULE::start_typeA() +{ + switch(mux_now) + { + case 0: // static + map_com[0] = 003; + map_on = 030; + map_off = 003; + break; + + case 1: // 1/2 + map_com[0] = 00321; + map_com[1] = 02103; + map_on = 03030; + map_off = 01212; + break; + + case 2: // 1/3 + map_com[0] = 0032121; + map_com[1] = 0210321; + map_com[2] = 0212103; + map_on = 0303030; + map_off = 0121212; + break; + + case 3: // 1/4 + map_com[0] = 003212121; + map_com[1] = 021032121; + map_com[2] = 021210321; + map_com[3] = 021212103; + map_on = 030303030; + map_off = 012121212;; + break; + + }; +} +void LCD_MODULE::start_typeB() +{ + switch(mux_now) + { + case 0: // static - use type A for this + break; + + case 1: // 1/2 + map_com[0] = 00231; + map_com[1] = 02013; + map_on = 030; + map_off = 012; + break; + + case 2: // 1/3 + map_com[0] = 0122311; + map_com[1] = 0202131; + map_com[2] = 0220113; + map_on = 003; + map_off = 021; + break; + + case 3: // 1/4 + map_com[0] = 002223111; + map_com[1] = 020221311; + map_com[2] = 022021131; + map_com[3] = 022201113; + map_on = 033330000; + map_off = 011112222;; + break; + + }; +} +// shutdown LCD +void LCD_MODULE::stop_clock() +{ + for (int i=0; i < 3; i++) + { + if (lcdSEn[i]) + lcd_set_segPins(i, 0, lcdSEn[i]->value.get()); + } + lcd_set_com(false, lcdcon->value.get() & (LCDCON::LMUX0| LCDCON::LMUX1)); + + lcdps->value.put(lcdps->value.get() & ~LCDPS::LCDA); +} +void LCD_MODULE::callback() +{ + Dprintf(("LCD_MODULE::callback() %" PRINTF_GINT64_MODIFIER "d phase=%d bias_now=%d\n", future_cycle, phase, bias_now)); + + drive_lcd(); + + if (typeB() && (phase == (mux_now + 1))) + { + IntSrc->Trigger(); + lcdps->value.put(lcdps->value.get() | LCDPS::WA); + } + phase++; + if (phase == num_phases) + { + phase = 0; + save_hold_data(); + if (!(lcdcon->value.get() & LCDCON::LCDEN)) + stop_clock(); + if (typeB()) + lcdps->value.put(lcdps->value.get() & ~LCDPS::WA); + } + if (lcdps->value.get() & LCDPS::LCDA) + { + future_cycle = get_cycles().get() + clock_tick; + get_cycles().set_break(future_cycle, this); + } +} +void LCD_MODULE::save_hold_data() +{ + for(int i = 0; i < 12; i++) + { + if (lcddatax[i]) + hold_data[i] = lcddatax[i]->value.get(); + } +} +void LCD_MODULE::drive_lcd() +{ + + double vlcd[4]; + double com_volt[4]; + uint subphase; + uint shift = 3 * (num_phases - phase - 1); + uint64_t mask = 07 << shift; + + vlcd[0] = 0; + vlcd[3] = Vlcd3->getPin().get_nodeVoltage(); + if (bias_now != 1) + { + vlcd[1] = Vlcd1->getPin().get_nodeVoltage(); + vlcd[2] = Vlcd2->getPin().get_nodeVoltage(); + } + + for(int l=0; l <= mux_now; l++) // scan across com related output + { + + uint index= (map_com[l] & mask)>> shift; + com_volt[l] = vlcd[index]; + Dprintf(("com%d mask %" PRINTF_GINT64_MODIFIER "o index %u %.1f\n", l, mask, index, com_volt[l])); + LCDcom[l]->getPin().putState(com_volt[l]); + } + + if (typeB()) + subphase = phase % (mux_now + 1); + else + subphase = phase / 2; + double Von = vlcd[(map_on & mask) >> shift]; + double Voff = vlcd[(map_off & mask) >> shift]; + Dprintf(("phase %d mask %" PRINTF_GINT64_MODIFIER "o subphase %u\n",phase, mask, subphase)); + for(int k = 0; (k < 3) && lcdSEn[k]; k++) + { + uint enable = lcdSEn[k]->value.get(); + uint data = hold_data[k+3*subphase]; + + if (enable) + { +#ifdef DEBUG + printf("\t0x%x", data); +#endif + for(int i=0; i< 8; i++) + { + bool bit = (1<getPin().putState(seg_volt); + } + } +#ifdef DEBUG + printf("\n"); +#endif + } + + } +} + +LCDCON::LCDCON(Processor *pCpu, const char *pName, const char *pDesc, LCD_MODULE *_lcd_module) : + sfr_register(pCpu, pName, pDesc) +{ + lcd_module = _lcd_module; +} +void LCDCON::put_value(uint new_value) +{ + uint diff = value.get() ^ new_value; + Dprintf(("LCDCON::put_value new=0x%x old=0x%x \n", new_value, value.get())); + value.put(new_value); + + // Are LCD Bias Voltage Pins Enabled + if (new_value & VLCDEN) + { + lcd_module->set_bias(new_value & (LMUX0 | LMUX1)); + } + else if (diff & VLCDEN) // disable Vlcd + { + lcd_module->clear_bias(); + } + // LCD on/off + if (diff & LCDEN) + lcd_module->lcd_on_off(new_value & LCDEN); +} +void LCDCON::put(uint new_value) +{ + Dprintf(("LCDCON::put 0x%x\n", new_value)); + + put_value(new_value); +} + + +LCDPS::LCDPS(Processor *pCpu, const char *pName, const char *pDesc, LCD_MODULE *_lcd_module, uint bitmask) : + sfr_register(pCpu, pName, pDesc), lcd_module(_lcd_module), + mask_writeable(bitmask) +{ +} +void LCDPS::put(uint new_value) +{ + put_value(new_value & mask_writeable); +} +LCDSEn::LCDSEn(Processor *pCpu, const char *pName, const char *pDesc, LCD_MODULE *_lcd_module, uint _n) : + sfr_register(pCpu, pName, pDesc) +{ + lcd_module = _lcd_module; + n = _n; +} +void LCDSEn::put(uint new_value) +{ + uint diff = new_value ^ value.get(); + + put_value(new_value); + + if (lcd_module->get_lcdcon_lcden()) + lcd_module->lcd_set_segPins(n, new_value, diff); + +} +LCDDATAx::LCDDATAx(Processor *pCpu, const char *pName, const char *pDesc, LCD_MODULE *_lcd_module, uint _n) : + sfr_register(pCpu, pName, pDesc) +{ + lcd_module = _lcd_module; + n =_n; +} +void LCDDATAx::put(uint new_value) +{ + // set error if lcdps:WA not set + if (!lcd_module->get_lcdps_wa()) + { + fprintf(stderr, "%s ERROR write with WA == 0\n", name().c_str()); + lcd_module->set_lcdcon_werr(); + return; + } + + put_value(new_value); +} diff --git a/src/gpsim/modules/lcd_module.h b/src/gpsim/modules/lcd_module.h new file mode 100644 index 0000000..c17f8d4 --- /dev/null +++ b/src/gpsim/modules/lcd_module.h @@ -0,0 +1,164 @@ +/* + Copyright (C) 2017 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +#ifndef __LCD_H__ +#define __LCD_H__ + +class LCD_MODULE; +class pic_processor; + + +// LCDCON - LIQUID CRYSTAL DISPLAY CONTROL REGISTER + +class LCDCON : public sfr_register +{ +public: + + enum + { + LMUX0 = 1<<0, //LMUX<1:0> Commons Select bits + LMUX1 = 1<<1, + CS0 = 1<<2, //CS<1:0> Clock Source Select bits + CS1 = 1<<3, + VLCDEN = 1<<4, // LCD Bias Voltage Pins Enable bit + WERR = 1<<5, // LCD Write Failed Error bit + SLPEN = 1<<6, // LCD Driver Enable in Sleep mode bit + LCDEN = 1<<7 // LCD Driver Enable bit + }; + + LCDCON(Processor *pCpu, const char *pName, const char *pDesc, LCD_MODULE *); + virtual void put(uint new_value); + virtual void put_value(uint new_value); + + LCD_MODULE *lcd_module; +}; + +// LCDPS - LCD PRESCALER SELECT REGISTER +class LCDPS : public sfr_register +{ +public: + + enum + { + LP0 = 1<<0, //LP<3:0>: LCD Prescaler Select bits + LP1 = 1<<1, + LP2 = 1<<2, + LP3 = 1<<3, + WA = 1<<4, // LCD Write Allow Status bit + LCDA = 1<<5, // LCD Active Status bit + BIASMD = 1<<6, // Bias Mode Select bit + WFT = 1<<7, // Waveform Type Select bit + + LPMASK = (LP0 | LP1 | LP2 | LP3) + }; + LCDPS(Processor *pCpu, const char *pName, const char *pDesc, LCD_MODULE *, uint); + virtual void put(uint new_value); + LCD_MODULE *lcd_module; + uint mask_writeable; +}; + +// LCDSEn - LCD SEGMENT REGISTERS + +class LCDSEn : public sfr_register +{ +public: + + LCDSEn(Processor *pCpu, const char *pName, const char *pDesc, LCD_MODULE *, uint _n); + virtual void put(uint new_value); + LCD_MODULE *lcd_module; + uint n; +}; + +// LCDDATAx - LCD DATA REGISTERS +class LCDDATAx : public sfr_register +{ +public: + + LCDDATAx(Processor *pCpu, const char *pName, const char *pDesc, LCD_MODULE *, uint _n); + virtual void put(uint new_value); + LCD_MODULE *lcd_module; + uint n; + // bypass put for Power On Reset so WERR flag not set + virtual void putRV(RegisterValue rv) + { + value.init = rv.init; + value.put(rv.data); + } + +}; + +class LCD_MODULE: public TriggerObject +{ +public: + LCD_MODULE(Processor *pCpu, bool p16f917); + void set_Vlcd(PinModule *, PinModule *, PinModule *); + void set_LCDcom(PinModule *, PinModule *, PinModule *, PinModule *); + void set_LCDsegn(uint, PinModule *, PinModule *, PinModule *, PinModule *); + void set_t1con(T1CON *t1c) {t1con = t1c;} + void lcd_on_off(bool lcdOn); + void set_bias(uint lmux); + void lcd_set_com(bool lcdOn, uint lmux); + void lcd_set_segPins(uint regno, uint old, uint diff); + void clear_bias(); + void set_lcdcon_werr() { lcdcon->value.put(lcdcon->value.get() | LCDCON::WERR); } + bool get_lcdps_wa() { return lcdps->value.get() & LCDPS::WA; } + bool get_lcdcon_lcden() { return lcdcon->value.get() & LCDCON::LCDEN;} + bool typeB() {return (lcdps->value.get() & LCDPS::WFT) && mux_now;} + virtual void callback(); + virtual void setIntSrc(InterruptSource *_IntSrc) { IntSrc = _IntSrc;} + void start_clock(); + void stop_clock(); + void drive_lcd(); + void save_hold_data(); + void start_typeA(); + void start_typeB(); + virtual void sleep(); + virtual void wake(); + + + + Processor *cpu; + InterruptSource *IntSrc; + bool Vlcd1_on, Vlcd2_on, Vlcd3_on; + bool is_sleeping; + PinModule *Vlcd1, *Vlcd2, *Vlcd3; + PinModule *LCDsegn[24]; + PinModule *LCDcom[4]; + unsigned char LCDsegDirection[3]; + unsigned char LCDcomDirection; + unsigned char hold_data[12]; + unsigned char bias_now; + unsigned char mux_now; + unsigned char phase; + unsigned char num_phases; + uint clock_tick; + uint64_t future_cycle; + uint64_t map_com[4]; + uint64_t map_on; + uint64_t map_off; + + LCDCON *lcdcon; + LCDPS *lcdps; + LCDSEn *lcdSEn[3]; + LCDDATAx *lcddatax[12]; + T1CON *t1con; + +}; + +#endif // __LCD_H__ diff --git a/src/gpsim/modules/nco.cc b/src/gpsim/modules/nco.cc new file mode 100644 index 0000000..ae7381f --- /dev/null +++ b/src/gpsim/modules/nco.cc @@ -0,0 +1,744 @@ +/* + Copyright (C) 2017,2018 Roy R. Rankin +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +// NUMERICALLY CONTROLLED OSCILLATOR (NCO) MODULE + + +//#define DEBUG +#if defined(DEBUG) +#include "config.h" +#define Dprintf(arg) {printf("%s:%d ",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +#include "pic-processor.h" +#include "packages.h" +#include "apfcon.h" +#include "nco.h" +#include "clc.h" +#include "cwg.h" + +class NCOSigSource:public SignalControl +{ + public: + NCOSigSource (NCO * _nco, PinModule * _pin):m_nco (_nco), + m_state ('?'), m_pin (_pin) + { + assert (m_nco); + } + virtual ~ NCOSigSource () + { + } + + void setState (char _state) + { + m_state = _state; + } + virtual char getState () + { + return m_state; + } + virtual void release () + { + m_nco->releasePinSource (m_pin); + } + + private: + NCO * m_nco; + char m_state; + PinModule *m_pin; +}; + +// Report state changes on incoming CLK pin +class ncoCLKSignalSink:public SignalSink +{ + public: + ncoCLKSignalSink (NCO * _nco):m_nco (_nco) + { + } + + virtual void setSinkState (char new3State) + { + m_nco->setState (new3State); + } + virtual void release () + { + delete this; + } + private: + NCO * m_nco; +}; + + +NCO::NCO (Processor * pCpu): + nco1con (this, pCpu, "nco1con", "NCOx Control Register"), + nco1clk (this, pCpu, "nco1clk", "NCOx Input Clock Control Register"), + nco1acch (this, pCpu, "nco1acch", "NCOx Accumulator Register-High Byte"), + nco1accl (this, pCpu, "nco1accl", "NCOx Accumulator Register-Low Byte"), + nco1accu (this, pCpu, "nco1accu", "NCOx Accumulator Register-Upper Byte"), + nco1inch (this, pCpu, "nco1inch", "NCOx Increment Register-High Byte"), + nco1incl (this, pCpu, "nco1incl", "NCOx Increment Register-Low Byte"), + pir (0), m_NCOif (0), + cpu (pCpu), pinNCOclk (0), pinNCO1 (0), NCO1src (0), srcNCO1active (false), + inc_load (0), inc (1), acc (0), future_cycle (0), last_cycle (0), + CLKsink (0), CLKstate (false), NCOoverflow (false), + accFlag (false), pulseWidth (0), m_cwg(0) +{ + acc_hold[0] = acc_hold[1] = acc_hold[2] = 0; + for (int i = 0; i < 4; i++) + m_clc[i] = 0; +} + +NCO::~NCO () +{ + if (NCO1src) + { + delete NCO1src; + NCO1src = 0; + } +} + +// Process change in nconcon register +void NCO::update_ncocon (uint diff) +{ + uint value = nco1con.value.get (); + Dprintf (("NCO::update_ncocon diff=0x%x value=0x%x\n", diff, value)); + if ((diff & NxEN) && (value & NxEN)) //NCO turning on + { + Dprintf (("NCO::update_ncocon ON nco1con=0x%x nco1clk=0x%x\n", value, + nco1clk.value.get ())); + pulseWidth = 0; + /*if (!nco_interface) + { + nco_interface = new NCO_Interface (this); + get_interface ().prepend_interface (nco_interface); + }*/ + if (value & NxOE) + oeNCO1 (true); + + // force clock to current state + update_ncoclk (NxCLKS_mask); + } + else if ((diff & NxEN) && !(value & NxEN)) //NCO turning off + { + Dprintf (("NCO::update_ncocon OFF nco1con=0x%x nco1clk=0x%x acc=0x%x\n", value, + nco1clk.value.get (), acc)); + pulseWidth = 0; + oeNCO1 (false); + current_value (); + if (future_cycle) + { + get_cycles ().clear_break (future_cycle); + future_cycle = 0; + } + if (acc >= (1 << 20)) + acc -= (1 << 20); + } + else if (value & NxEN) // currently running + { + if ((diff & NxOE)) + oeNCO1 (value & NxOE); + + if (diff & NxPOL) + outputNCO1 (value & NxOUT); + } +} + +/* this does a manual update of the accumulator register + and is used when the LCx_out or NCO1CLK are used as the + clock source +*/ +void NCO::NCOincrement () +{ + uint value; + + // Load nco1inc on second + clock edge + if (inc_load && !--inc_load) + { + set_inc_buf (); + Dprintf (("NCO::NCOincrement() loading inc with 0x%x\n", inc)); + } + // Turn off output if pulsewidth goes to zero + if (pulseWidth && !--pulseWidth) + { + nco1con.value.put (nco1con.value.get () & ~NxOUT); + outputNCO1 (false); + } + + // Overflow was on last edge + if (NCOoverflow) + { + value = nco1con.value.get (); + if (!(value & NxPFM)) // Fixed duty cycle + value = (value & NxOUT) ? value & ~NxOUT : value | NxOUT; + else + { + pulseWidth = 1 << ((nco1clk.value.get () & NxPW_mask) >> 5); + value = value | NxOUT; + } + nco1con.value.put (value); + NCOoverflow = false; + outputNCO1 (value & NxOUT); + Dprintf(("m_NCOif=%p pir=%p\n", m_NCOif,pir)); + if (m_NCOif) + m_NCOif->Trigger (); + else if (pir) + pir->set_nco1if (); + else + fprintf (stderr, "NCO interrupt method not configured\n"); + } + acc += inc; + Dprintf (("NCO::NCOincrement() acc=0x%x inc=0x%x\n", acc, inc)); + if (acc >= (1 << 20)) // overflow + { + Dprintf (("NCO::NCOincrement() acc overflow acc=0x%x\n", acc)); + acc -= (1 << 20); + NCOoverflow = true; + } +} + +void NCO::callback () +{ + + current_value (); + future_cycle = 0; + uint value = nco1con.value.get (); + + if (acc >= (1 << 20)) + { + acc -= (1 << 20); + uint value = nco1con.value.get (); + if (!(value & NxPFM)) // Fixed duty cycle + { + value = (value & NxOUT) ? value & ~NxOUT : value | NxOUT; + Dprintf (("call simulate_clock\n")); + simulate_clock (true); + } + else + { + uint cps = cpu->get_ClockCycles_per_Instruction (); + pulseWidth = 1 << ((nco1clk.value.get () & NxPW_mask) >> 5); + Dprintf (("NCO::callback raw pulseWidth=%u ", pulseWidth)); + value = value | NxOUT; + if (clock_src () == HFINTOSC) + pulseWidth *= cpu->get_frequency () / (16e6); + int rem = pulseWidth % cps; + pulseWidth /= cps; + if (!pulseWidth || rem) + pulseWidth++; + Dprintf (("pulseWidth=%u rem = %d value=0x%x\n", pulseWidth, rem, + value)); + last_cycle = get_cycles ().get (); + future_cycle = last_cycle + pulseWidth; + get_cycles ().set_break (future_cycle, this); + } + nco1con.value.put (value); + outputNCO1 (value & NxOUT); + Dprintf(("m_NCOif=%p pir=%p\n", m_NCOif,pir)); + if (m_NCOif) + m_NCOif->Trigger (); + else if (pir) + pir->set_nco1if (); + else + fprintf (stderr, "NCO interrupt method not configured\n"); + } + else if (pulseWidth) + { + value &= ~NxOUT; + nco1con.value.put (value); + outputNCO1 (value & NxOUT); + + Dprintf (("call simulate_clock\n")); + simulate_clock (true); + } + else + { + Dprintf (("call simulate_clock\n")); + simulate_clock (true); + } +} + +// Use callback to simulate NCO driven by internal clock +void NCO::simulate_clock (bool on) +{ + Dprintf(("on=%d inc=%u clock=%s\n", on, inc, clock_src() ? "Fosc" : "HFINTOSC")); + if (on && inc) + { + int64_t delta; + uint cps = cpu->get_ClockCycles_per_Instruction (); + uint rem = 0; + + if (future_cycle) + { + current_value (); + get_cycles ().clear_break (future_cycle); + } + delta = ((1 << 20) - acc) / inc; + if (delta <= 0) + delta = 1; + else + rem = ((1 << 20) - acc) % inc; + if (rem) + delta++; + + if (clock_src () == HFINTOSC) + { + delta *= cpu->get_frequency() / (16e6); + Dprintf(("delta=%ld cpu=%.3fMHz HFINTOC=%.3fMHz\n", delta, cpu->get_frequency()/1e6, 16e6/1e6)); + } + + rem = delta % cps; // if rem != 0 timing is approximate + delta /= cps; + if ((delta <= 0) || rem > 0) + delta++; + Dprintf (("NCO::simulate_clock clock=%.2e acc=0x%x delta = %" + PRINTF_GINT64_MODIFIER "d rem=%u\n", + (clock_src () == HFINTOSC) ? 16e6 : cpu->get_frequency (), + acc, delta, rem)); + + + last_cycle = get_cycles ().get (); + future_cycle = last_cycle + delta; + get_cycles ().set_break (future_cycle, this); + } + else // clock off + { + current_value (); + if (future_cycle) + { + current_value (); + get_cycles ().clear_break (future_cycle); + future_cycle = 0; + } + + } +} + +// Set output value for output pin +void NCO::outputNCO1 (bool level) +{ + level = (nco1con.value.get () & NxPOL) ? !level : level; + Dprintf (("NCO::outputNCO1 level=%d\n", level)); + for (int i = 0; i < 4; i++) + if (m_clc[i]) + m_clc[i]->NCO_out (level); + + if (m_cwg) + m_cwg->out_NCO(level); + + if (NCO1src) + { + NCO1src->setState (level ? '1' : '0'); + pinNCO1->updatePinModule (); + } +} + +// Enable/disable output pin +void NCO::oeNCO1 (bool on) +{ + if (on) + { + if (!srcNCO1active) + { + if (!NCO1src) NCO1src = new NCOSigSource (this, pinNCO1); + + pinNCO1->setSource (NCO1src); + srcNCO1active = true; + NCO1src->setState ((nco1con.value.get () & NxOUT) ? '1' : '0'); + pinNCO1->updatePinModule (); + } + } + else if (srcNCO1active) + { + pinNCO1->setSource (0); + srcNCO1active = false; + pinNCO1->updatePinModule (); + } +} + +void NCO::enableCLKpin (bool on) +{ + if (on) + { + if (!CLKsink) CLKsink = new ncoCLKSignalSink (this); + + pinNCOclk->addSink (CLKsink); + CLKstate = pinNCOclk->getPin ().getState (); + } + else + { + if (CLKsink) pinNCOclk->removeSink (CLKsink); + } +} + +// new value for NCO1CLK register +void NCO::update_ncoclk (uint diff) +{ + Dprintf(("nco1con=0x%x diff=0x%x\n", nco1con.value.get(), diff)); + if ((nco1con.value.get () & NxEN) && (diff & NxCLKS_mask)) + { + enableCLKpin (false); + if (future_cycle) + { + simulate_clock (false); + } + Dprintf(("clk=%d\n", clock_src())); + switch (clock_src ()) + { + case HFINTOSC: + simulate_clock (true); + break; + + case FOSC: + simulate_clock (true); //FIXME FOSC different HFINTOSC + break; + + case LC1_OUT: + break; + + case NCO1CLK: + enableCLKpin (true); + break; + } + } +} + +// return pseudo clock codes (this for 16f1503) +int NCO::clock_src () +{ + switch (nco1clk.value.get () & NxCLKS_mask) + { + case 0: //HFINTOSC + return HFINTOSC; + break; + + case 1: //FOSC + return FOSC; + break; + + case 2: // LC1_OUT + return LC1_OUT; + break; + + case 3: // NCO1CLK pin + return NCO1CLK; + break; + } + return -1; +} + +void NCO::setIOpins (PinModule * pIN, PinModule * pOUT) +{ + pinNCOclk = pIN; + pinNCO1 = pOUT; +} + +void NCO::setIOpin(int data, PinModule *pin) +{ + if (data == NCOout_PIN) setNCOxPin(pin); + else fprintf(stderr, "NCO::setIOpin unexpected data=%d\n", data); +} + +// remap NCO1 pin, called from APFCON +void NCO::setNCOxPin (PinModule * pNCOx) +{ + if (pNCOx == pinNCO1) + return; + if (srcNCO1active) // old pin active disconnect + { + oeNCO1 (false); + if (NCO1src) + delete NCO1src; + NCO1src = 0; + } + pinNCO1 = pNCOx; + if (nco1con.value.get () & NxOE) + oeNCO1 (true); +} + +// link from Configurable Logic Cell +void NCO::link_nco (bool level, char index) +{ + // Active? + if (clock_src () == LC1_OUT) + { + Dprintf (("NCO::link_nco level=%d index=%d edge=%d\n", level, index, + (bool) (level & !CLKstate))); + if (level & !CLKstate) // new edge + NCOincrement (); + CLKstate = level; + } +} + +// Save acc buffer into accx registers, +// but if clock is simulated, first compute value of acc buffer. +void NCO::current_value () +{ + if (future_cycle && (get_cycles ().get () - last_cycle)) + { + uint cps = cpu->get_ClockCycles_per_Instruction (); + uint32_t delta_acc = (get_cycles ().get () - last_cycle) * inc * cps; + if (clock_src () == HFINTOSC) + delta_acc *= 16e6 / cpu->get_frequency (); + acc += delta_acc; + last_cycle = get_cycles ().get (); + } + nco1accu.value.put ((acc >> 16) & 0x0f); + nco1acch.value.put ((acc >> 8) & 0xff); + nco1accl.value.put (acc & 0xff); +} + +// transfer accx registers to acc buffer +void NCO::set_acc_buf () +{ + acc = ((acc_hold[2] & 0x0f) << 16) | (acc_hold[1] << 8) | acc_hold[0]; + + NCOoverflow = false; + + if ((clock_src () == FOSC || clock_src () == HFINTOSC) && + (nco1con.value.get () & NxEN)) + { + set_inc_buf (); + Dprintf (("call simulate_clock\n")); + simulate_clock (true); + } +} + +/* + Documentation indicates the increment buffer is loaded + on second rising edge of the source clock; +*/ +void NCO::newINCL () +{ + Dprintf(("newINCL clock=%d\n", clock_src())); + // If NCO is not enables, inc buffer loaded immediately + if (!(nco1con.value.get () & NxEN)) + set_inc_buf (); + // If simulating clock, load will be too early or late, + // so do it now (to simplify code) + else if (clock_src () == FOSC || clock_src () == HFINTOSC) + { + current_value (); + set_inc_buf (); + Dprintf (("call simulate_clock\n")); + simulate_clock (true); + } + else + inc_load = 2; +} + +// load inc buffer from registers +void NCO::set_inc_buf () +{ + inc = (nco1inch.value.get () << 8) | nco1incl.value.get (); + Dprintf (("NCO::set_inc_buf inc=0x%x\n", inc)); +} + +// process input from clock pin +void NCO::setState (char new3State) +{ + if (clock_src () == NCO1CLK) + { + if (new3State == '1' && !CLKstate) //new edge + { + CLKstate = true; + NCOincrement (); + } + else if (new3State == '0' && CLKstate) + { + CLKstate = false; + } + } +} + +void NCO::sleep(bool on) +{ + if (clock_src() == FOSC) + { + // pause FOSC on sleep, restart on wakeup + simulate_clock(!on); + } +} + +void NCO::releasePinSource (PinModule * pin) +{ + if (pin) + { + + if (pin == pinNCO1) + srcNCO1active = false; + } +} + + +NCOxCON::NCOxCON (NCO * pt, Processor * pCpu, const char *pName, + const char *pDesc): + sfr_register (pCpu, pName, pDesc), con_mask (0xd1), pt_nco (pt) +{ +} + +void NCOxCON::put (uint new_value) +{ + new_value &= con_mask; + uint diff = new_value ^ value.get (); + if (!diff) return; + + value.put (new_value); + pt_nco->update_ncocon (diff); +} +// make sure acc reset after con +void NCOxCON::reset(RESET_TYPE r) +{ + putRV(por_value); + pt_nco->nco1accu.reset(r); + pt_nco->nco1acch.reset(r); + pt_nco->nco1accl.reset(r); +} + + +NCOxCLK::NCOxCLK (NCO * pt, Processor * pCpu, const char *pName, + const char *pDesc): + sfr_register (pCpu, pName, pDesc), clk_mask (0xe3), pt_nco (pt) +{ +} + +void NCOxCLK::put (uint new_value) +{ + new_value &= clk_mask; + uint diff = new_value ^ value.get (); + if (!diff) return; + + value.put (new_value); + pt_nco->update_ncoclk (diff); +} + +NCOxACCH::NCOxACCH (NCO * pt, Processor * pCpu, const char *pName, + const char *pDesc): + sfr_register (pCpu, pName, pDesc), pt_nco (pt) +{ +} + +void NCOxACCH::put (uint new_value) +{ + uint diff = new_value ^ value.get (); + + pt_nco->set_hold_acc (new_value, 1); + pt_nco->set_accFlag (true); + if (!diff) return; + + value.put (new_value); +} + +NCOxACCL::NCOxACCL (NCO * pt, Processor * pCpu, const char *pName, + const char *pDesc): + sfr_register (pCpu, pName, pDesc), pt_nco (pt) +{ +} + +void NCOxACCL::put (uint new_value) +{ + uint diff = new_value ^ value.get (); + pt_nco->set_hold_acc (new_value, 0); + pt_nco->set_accFlag (true); + + if (diff) value.put (new_value); + + if (pt_nco->get_accFlag ()) + { + pt_nco->set_acc_buf (); + pt_nco->set_accFlag (false); + } +} + +NCOxACCU::NCOxACCU (NCO * pt, Processor * pCpu, const char *pName, + const char *pDesc): + sfr_register (pCpu, pName, pDesc), pt_nco (pt) +{ +} + +void NCOxACCU::put (uint new_value) +{ + uint diff = new_value ^ value.get (); + pt_nco->set_hold_acc (new_value, 2); + pt_nco->set_accFlag (true); + + if (!diff) return; + + value.put (new_value); +} + +NCOxINCH::NCOxINCH (NCO * pt, Processor * pCpu, const char *pName, + const char *pDesc): + sfr_register (pCpu, pName, pDesc), pt_nco (pt) +{ +} + +void NCOxINCH::put (uint new_value) +{ + uint diff = new_value ^ value.get (); + if (!diff) return; + + value.put (new_value); +} + +NCOxINCL::NCOxINCL (NCO * pt, Processor * pCpu, const char *pName, + const char *pDesc): + sfr_register (pCpu, pName, pDesc), pt_nco (pt) +{ +} + +void NCOxINCL::put (uint new_value) +{ + value.put (new_value); + pt_nco->newINCL (); +} + +NCO2::NCO2 (Processor * pCpu):NCO (pCpu) +{ +} + +// return pseudo clock codes (this for 10f320) +int NCO2::clock_src () +{ + switch (nco1clk.value.get () & NxCLKS_mask) + { + case 2: //HFINTOSC + return HFINTOSC; + break; + + case 1: //FOSC + return FOSC; + break; + + case 3: // LC1_OUT + return LC1_OUT; + break; + + case 0: // NCO1CLK pin + return NCO1CLK; + break; + } + return -1; +} diff --git a/src/gpsim/modules/nco.h b/src/gpsim/modules/nco.h new file mode 100644 index 0000000..caeb0c9 --- /dev/null +++ b/src/gpsim/modules/nco.h @@ -0,0 +1,198 @@ +/* + Copyright (C) 2017 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. + +NUMERICALLY CONTROLLED OSCILLATOR (NCO) MODULE + +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +#ifndef __NCO_h__ +#define __NCO_h__ + +#include "registers.h" + +class NCO; +class ncoCLKSignalSink; +class NCOSigSource; +class PIR; +class CLC; +class CWG; + +class NCOxCON : public sfr_register +{ + public: + NCOxCON(NCO *pt, Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + uint con_mask; + virtual void reset(RESET_TYPE r); + + private: + NCO *pt_nco; +}; + +class NCOxCLK : public sfr_register +{ + public: + NCOxCLK(NCO *pt, Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + uint clk_mask; + private: + NCO *pt_nco; +}; + +class NCOxACCL : public sfr_register +{ + public: + NCOxACCL(NCO *pt, Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + private: + NCO *pt_nco; +}; + +class NCOxACCH : public sfr_register +{ + public: + NCOxACCH(NCO *pt, Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + private: + NCO *pt_nco; +}; + +class NCOxACCU : public sfr_register +{ + public: + NCOxACCU(NCO *pt, Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + private: + NCO *pt_nco; +}; + +class NCOxINCH : public sfr_register +{ + public: + NCOxINCH(NCO *pt, Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + private: + NCO *pt_nco; +}; + +class NCOxINCL : public sfr_register +{ + public: + NCOxINCL(NCO *pt, Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + private: + NCO *pt_nco; +}; + +class NCO : public TriggerObject, public apfpin +{ + public: + enum { + // NCOxCON + NxEN = 1<<7, + NxOE = 1<<6, + NxOUT = 1<<5, + NxPOL = 1<<4, + NxPFM = 1<<0, + // NCOxCLK + NxPW_mask = 0xe0, + NxCLKS_mask = 0x03, + // the follow are pseudo values returned from clock_src() + HFINTOSC = 0, + FOSC = 1, + LC1_OUT = 2, + NCO1CLK = 3, + NCOout_PIN = 0 + }; + + NCOxCON nco1con; + NCOxCLK nco1clk; + NCOxACCH nco1acch; + NCOxACCL nco1accl; + NCOxACCU nco1accu; + NCOxINCH nco1inch; + NCOxINCL nco1incl; + NCO(Processor *pCpu); + ~NCO(); + virtual int clock_src(); + void sleep(bool on); + void current_value(); + void set_acc_buf(); + void set_inc_buf(); + void update_ncocon(uint); + void update_ncoclk(uint); + virtual void setIOpin(int data, PinModule *pin); + void setIOpins(PinModule *pIN, PinModule *pOUT); + void setNCOxPin(PinModule *pNCOx); + void link_nco(bool level, char index); + void setState(char new3State); + void oeNCO1(bool on); + void outputNCO1(bool level); + void enableCLKpin(bool on); + void releasePinSource(PinModule *pin); + void newINCL(); + void NCOincrement(); + void simulate_clock(bool on); + void callback(); + void set_hold_acc(uint acc_val, int index) { acc_hold[index] = acc_val; } + void set_accFlag(bool newValue) { accFlag = newValue;} + bool get_accFlag() { return accFlag;} + void set_clc(CLC *_clc, int i) { m_clc[i] = _clc; } + void set_cwg(CWG *_cwg) { m_cwg = _cwg;} + PIR *pir; + InterruptSource *m_NCOif; + private: + Processor *cpu; + PinModule *pinNCOclk; + string CLKgui; + PinModule *pinNCO1; + string NCO1gui; + NCOSigSource *NCO1src; + bool srcNCO1active; + int inc_load; + uint inc; + int32_t acc; + uint acc_hold[3]; + uint64_t future_cycle; + uint64_t last_cycle; // Time of last acc update + //NCO_Interface *nco_interface; + ncoCLKSignalSink *CLKsink; + bool CLKstate; + bool NCOoverflow; + bool accFlag; // acc buffer needs updating + uint pulseWidth; + CLC *m_clc[4]; + CWG *m_cwg; +}; + +// NCO with clock layout ala 10f320 +class NCO2 : public NCO +{ + public: + NCO2(Processor *pCpu); + virtual int clock_src(); +}; + +#endif //__NCO_h__ + diff --git a/src/gpsim/modules/spp.cc b/src/gpsim/modules/spp.cc new file mode 100644 index 0000000..e7d5d4a --- /dev/null +++ b/src/gpsim/modules/spp.cc @@ -0,0 +1,438 @@ +/* + Copyright (C) 2014 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include +#include + +#include "config.h" +#include "stimuli.h" +#include "spp.h" + +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("%s:%d-%s() ",__FILE__,__LINE__,__FUNCTION__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +/* + * Streaming Parallel Port + */ +//-------------------------------------------------- +// +//-------------------------------------------------- +class SppSignalSource : public SignalControl +{ +public: + SppSignalSource() + { + state = '?'; + } + ~SppSignalSource() { } + virtual char getState() + { + return state; + } + void setState(char _state){ state = _state;} + virtual void release() + { + delete this; + } +private: + char state; +}; +//-------------------------------------------------- +// +//-------------------------------------------------- + + +SPPCON::SPPCON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ +} +void SPPCON::put(uint new_value) +{ + uint mask = (SPP::SPPOWN | SPP::SPPEN ); + uint old = value.data; + + value.data = (new_value & mask); + if ((old ^ value.data) && value.data == mask) + cout << "Warning USB functionality of SPP not supported\n"; + else + spp->enabled(value.data & SPP::SPPEN); +} + +void SPPCON::put_value(uint new_value) +{ + value.data = new_value; +} + +SPPCFG::SPPCFG(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ +} +void SPPCFG::put(uint new_value) +{ + value.data = new_value; + if (spp) spp->cfg_write(value.data); +} + +void SPPCFG::put_value(uint new_value) +{ + value.data = new_value; +} +SPPEPS::SPPEPS(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ +} +void SPPEPS::put(uint new_value) +{ + uint mask = 0x0f; + uint fixed = value.data & 0xd0; // Read only part of register + + value.data = ((new_value & mask) | fixed); + + if (spp) spp->eps_write(value.data); +} + +void SPPEPS::put_value(uint new_value) +{ + value.data = new_value; + if (spp) spp->eps_write(new_value); +} +SPPDATA::SPPDATA(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ + spp = 0; +} +void SPPDATA::put(uint new_value) +{ + value.data = new_value; + if (spp) spp->data_write(new_value); +} + +void SPPDATA::put_value(uint new_value) +{ + value.data = new_value; +} +uint SPPDATA::get() +{ + value.data = spp->data_read(); + return(value.data); +} +void SPP::initialize( PIR_SET *_pir_set, PicPSP_PortRegister *_port_set, + PicTrisRegister *_port_tris, + SPPCON *_sppcon, SPPCFG *_sppcfg, SPPEPS *_sppeps, + SPPDATA *_sppdata, PinModule *_clk1spp, PinModule *_clk2spp, + PinModule *_oespp, PinModule *_csspp ) +{ + pir_set = _pir_set; + parallel_port = _port_set; + parallel_tris = _port_tris; + + sppcon = _sppcon; + sppcfg = _sppcfg; + sppeps = _sppeps; + sppdata= _sppdata; + sppdata->set_spp(this); + sppeps->set_spp(this); + sppcfg->set_spp(this); + sppcon->set_spp(this); + pin_clk1spp = _clk1spp; + pin_clk2spp = _clk2spp; + pin_oespp = _oespp; + pin_csspp = _csspp; +} + +SPP::~SPP() +{ + if (active_sig_oe) pin_oespp->setSource(0); + if (active_sig_cs) pin_csspp->setSource(0); + if (active_sig_clk2) pin_clk2spp->setSource(0); + if (active_sig_clk1) pin_clk1spp->setSource(0); + + delete sig_oespp; + delete sig_csspp; + delete sig_clk2spp; + delete sig_clk1spp; +} + +// SSPDATA register has been written to +void SPP::data_write(uint data) +{ + if((sppcon->get_value() & SPPEN) == 0) return; + + parallel_tris->put(0); // set port for write + data_value = data; + parallel_port->put_value(data); + eps_value |= SPPBUSY; + sppeps->put_value(eps_value); + cycle_state = ST_CYCLE1; + io_operation = DATA_WRITE; + sig_oespp->setState('0'); + pin_oespp->updatePinModule(); + + if (cfg_value & CSEN) + { + sig_csspp->setState('1'); + pin_csspp->updatePinModule(); + } + get_cycles().set_break(get_cycles().get() + (cfg_value & 0x0f) + 1 , this); +} + +// SPPEPS register has been written to +void SPP::eps_write(uint data) +{ + uint old = eps_value; + eps_value = data; + if((sppcon->get_value() & SPPEN) == 0 || !(old ^ eps_value)) + return; + + parallel_tris->put(0); // set port for write + parallel_port->put_value(data & 0x0f); + eps_value |= SPPBUSY; + sppeps->put_value(eps_value); + cycle_state = ST_CYCLE1; + io_operation = ADDR_WRITE; + sig_oespp->setState('0'); + pin_oespp->updatePinModule(); + + if (cfg_value & CSEN) + { + sig_csspp->setState('1'); + pin_csspp->updatePinModule(); + } + get_cycles().set_break(get_cycles().get() + (cfg_value & 0x0f) + 1 , this); +} + +// SPPCFG register has been written to +void SPP::cfg_write(uint data) +{ + uint diff = cfg_value ^ data; + cfg_value = data; + + if((sppcon->get_value() & SPPEN) == 0) return; + + if (diff & CLK1EN) // CLK1EN state change + { + if (cfg_value & CLK1EN) + { + if (!sig_clk1spp) sig_clk1spp = new SppSignalSource(); + pin_clk1spp->setSource(sig_clk1spp); + active_sig_clk1 = true; + sig_clk1spp->setState('0'); + pin_clk1spp->updatePinModule(); + } + else + { + pin_clk1spp->setSource(0); + active_sig_clk1 = false; + } + } + if (diff & CSEN) // CSEN state change + { + if (cfg_value & CSEN) + { + if (!sig_csspp) sig_csspp = new SppSignalSource(); + pin_csspp->setSource(sig_csspp); + active_sig_cs = true; + sig_csspp->setState('0'); + pin_csspp->updatePinModule(); + } + else + { + active_sig_cs = false; + pin_csspp->setSource(0); + } + } +} + +// SPPDATA register has been read from +uint SPP::data_read() +{ + if((sppcon->get_value() & SPPEN) == 0) return(0); + + parallel_tris->put(0xff); // set port for read + eps_value |= SPPBUSY; + sppeps->put_value(eps_value); + cycle_state = ST_CYCLE1; + io_operation = DATA_READ; + sig_oespp->setState('1'); + pin_oespp->updatePinModule(); + if (cfg_value & CSEN) + { + sig_csspp->setState('1'); + pin_csspp->updatePinModule(); + } + get_cycles().set_break(get_cycles().get() + (cfg_value & 0x0f) + 1 , this); + return data_value; +} +void SPP::enabled(bool _enabled) +{ + if (state_enabled ^ _enabled) + { + state_enabled = _enabled; + if (state_enabled) + { + if (!sig_oespp) sig_oespp = new SppSignalSource(); + pin_oespp->setSource(sig_oespp); + active_sig_oe = true; + sig_oespp->setState('1'); + pin_oespp->updatePinModule(); + + if (!sig_clk2spp) sig_clk2spp = new SppSignalSource(); + pin_clk2spp->setSource(sig_clk2spp); + active_sig_clk2 = true; + sig_clk2spp->setState('0'); + pin_clk2spp->updatePinModule(); + + if (cfg_value & CLK1EN) + { + if (!sig_clk1spp) sig_clk1spp = new SppSignalSource(); + pin_clk1spp->setSource(sig_clk1spp); + active_sig_clk1 = true; + sig_clk1spp->setState('0'); + pin_clk1spp->updatePinModule(); + } + if (cfg_value & CSEN) + { + + if (!sig_csspp) sig_csspp = new SppSignalSource(); + pin_csspp->setSource(sig_csspp); + active_sig_cs = true; + sig_csspp->setState('0'); + pin_csspp->updatePinModule(); + } + cycle_state = ST_IDLE; + } + else + { + if (active_sig_oe) + { + pin_oespp->setSource(0); + active_sig_oe = false; + } + if (active_sig_clk2) + { + pin_clk2spp->setSource(0); + active_sig_clk2 = false; + } + if (active_sig_clk1) + { + pin_clk1spp->setSource(0); + active_sig_clk1 = false; + } + + if (active_sig_cs) + { + pin_csspp->setSource(0); + active_sig_cs = false; + } + } + } +} +void SPP::callback() +{ + switch(cycle_state) + { + case ST_CYCLE1: + cycle_state = ST_CYCLE2; + if(io_operation == DATA_READ) + data_value = parallel_port->get(); + switch ((cfg_value & (CLKCFG1|CLKCFG0)) >> 6) + { + case 3: + case 2: + if (eps_value & ADDR0) // odd address + { + if (cfg_value & CLK1EN) + { + sig_clk1spp->setState('1'); + pin_clk1spp->updatePinModule(); + } + } + else + { + sig_clk2spp->setState('1'); + pin_clk2spp->updatePinModule(); + } + break; + + case 1: + if (io_operation == ADDR_WRITE || io_operation == DATA_WRITE) + { + if (cfg_value & CLK1EN) + { + sig_clk1spp->setState('1'); + pin_clk1spp->updatePinModule(); + } + } + else if (io_operation == DATA_READ) + { + sig_clk2spp->setState('1'); + pin_clk2spp->updatePinModule(); + } + + break; + + case 0: + if ((cfg_value & CLK1EN) && io_operation == ADDR_WRITE) + { + sig_clk1spp->setState('1'); + pin_clk1spp->updatePinModule(); + } + if (io_operation == DATA_WRITE || io_operation == DATA_READ) + { + sig_clk2spp->setState('1'); + pin_clk2spp->updatePinModule(); + } + break; + } + get_cycles().set_break(get_cycles().get() + (cfg_value & 0x0f) + 1 , this); + break; + + case ST_CYCLE2: + cycle_state = ST_IDLE; + eps_value &= ~SPPBUSY; + sppeps->put_value(eps_value); + sig_oespp->setState('1'); + pin_oespp->updatePinModule(); + sig_clk2spp->setState('0'); + pin_clk2spp->updatePinModule(); + if (cfg_value & CSEN) + { + sig_csspp->setState('0'); + pin_csspp->updatePinModule(); + } + if (cfg_value & CLK1EN) + { + sig_clk1spp->setState('0'); + pin_clk1spp->updatePinModule(); + } + if (!(sppcon->get_value() & SPPOWN)) + pir_set->set_sppif(); + break; + + case ST_IDLE: + default: + printf("SPP::callback unexpected callback state=%d\n", cycle_state); + break; + } +} diff --git a/src/gpsim/modules/spp.h b/src/gpsim/modules/spp.h new file mode 100644 index 0000000..41032ec --- /dev/null +++ b/src/gpsim/modules/spp.h @@ -0,0 +1,170 @@ +/* + Copyright (C) 2014 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __SPP_H__ +#define __SPP_H__ + +#include "pic-processor.h" +#include "14bit-registers.h" +#include "pic-ioports.h" +#include "pir.h" + +class SPP; +class SppSignalSource; +class PicPSP_PortRegister; +class PicTrisRegister; + +class SPPCON : public sfr_register, public TriggerObject +{ + public: + SPPCON(Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + virtual void put_value(uint new_value); + void set_spp(SPP *_spp) { spp = _spp; } + + private: + SPP *spp; +}; + +class SPPCFG : public sfr_register, public TriggerObject +{ + public: + SPPCFG(Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + virtual void put_value(uint new_value); + void set_spp(SPP *_spp) { spp = _spp; } + + private: + SPP *spp; +}; + +class SPPEPS : public sfr_register, public TriggerObject +{ + public: + SPPEPS(Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + virtual void put_value(uint new_value); + void set_spp(SPP *_spp) { spp = _spp; } + + private: + SPP *spp; +}; + +class SPPDATA : public sfr_register, public TriggerObject +{ + public: + SPPDATA(Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + virtual uint get(); + virtual void put_value(uint new_value); + void set_spp(SPP *_spp) { spp = _spp; } + + private: + SPP *spp; +}; + +class SPP : public TriggerObject +{ + public: + + void initialize( PIR_SET *pir_set, PicPSP_PortRegister *port_set, + PicTrisRegister *port_tris, + SPPCON *_sppcon, SPPCFG *_sppcfg, SPPEPS *_sppeps, + SPPDATA *_sppdata, PinModule *pin_clk1spp, PinModule *pin_clk2spp, + PinModule *pin_oespp, PinModule *pin_csspp + ); + void data_write(uint data); + uint data_read(); + void eps_write(uint data); + void cfg_write(uint data); + void enabled(bool state); + virtual void callback(); + + SPP() { } + ~SPP(); + + enum { + SPPEN = 1<<0, // SPPCON + SPPOWN = 1<<1, + WS0 = 1<<0, // SPPCFG + WS1 = 1<<1, + WS2 = 1<<2, + WS3 = 1<<3, + CLK1EN = 1<<4, + CSEN = 1<<5, + CLKCFG0 = 1<<6, + CLKCFG1 = 1<<7, + ADDR0 = 1<<0, //SPPEPS + ADDR1 = 1<<1, + ADDR2 = 1<<2, + ADDR3 = 1<<3, + SPPBUSY = 1<<4, + WRSPP = 1<<6, + RDSPP = 1<<7 + }; + protected: + + // cycle States + enum { + ST_IDLE = 0, + ST_CYCLE1, + ST_CYCLE2, + }; + // I/O operatiom + enum { + ADDR_WRITE = 1, + DATA_WRITE, + DATA_READ + }; + + SPPCON *sppcon = nullptr; + SPPCFG *sppcfg = nullptr; + SPPEPS *sppeps = nullptr; + SPPDATA *sppdata = nullptr; + bool state_enabled = false; + + uint cfg_value = 0; + uint eps_value = 0; + uint data_value = 0; + + PinModule *pin_clk1spp = nullptr; + PinModule *pin_clk2spp = nullptr; + PinModule *pin_oespp = nullptr; + PinModule *pin_csspp = nullptr; + + int cycle_state = 0; + uint io_operation = 0; + + SppSignalSource *sig_oespp = nullptr; + SppSignalSource *sig_csspp = nullptr; + SppSignalSource *sig_clk1spp = nullptr; + SppSignalSource *sig_clk2spp = nullptr; + + bool active_sig_oe = false; + bool active_sig_cs = false; + bool active_sig_clk1 = false; + bool active_sig_clk2 = false; + + PIR_SET *pir_set = nullptr; + PicPSP_PortRegister *parallel_port = nullptr; + PicTrisRegister *parallel_tris = nullptr; +}; + +#endif // __SPP_H__ diff --git a/src/gpsim/modules/ssp.cc b/src/gpsim/modules/ssp.cc new file mode 100644 index 0000000..9b81dad --- /dev/null +++ b/src/gpsim/modules/ssp.cc @@ -0,0 +1,2805 @@ +/* + Copyright (C) 1998,1999,2000,2001,2002 Scott Dattalo + 2006,2011 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +#include +#include + +#include "config.h" +#include "ssp.h" +#include "pic-ioports.h" +#include "stimuli.h" +#include "14bit-processors.h" +#include "14bit-tmrs.h" + +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("%s:%d-%s() %s ",__FILE__,__LINE__,__FUNCTION__,cpu->name().c_str()); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +//#define I2C_PROTO +#if defined(I2C_PROTO) +#define I2Cproto(arg) {printf("I2C %s %d ",cpu->name().c_str(), __LINE__); printf arg;} +#else +#define I2Cproto(arg) {} +#endif + +//#define SPI_PROTO +#if defined(SPI_PROTO) +#define SPIproto(arg) {printf("SPI %s %d ", cpu->name().c_str(), __LINE__); printf arg;} +#else +#define SPIproto(arg) {} +#endif + +//#warning only supports SPI mode. +//----------------------------------------------------------- +// SSPSTAT - Synchronous Serial Port Status register. + + +_SSPSTAT::_SSPSTAT(Processor *pCpu, SSP_MODULE *pSSP) + : sfr_register(pCpu, "sspstat","Synchronous Serial Port Status"), + m_sspmod(pSSP) +{ +} + +/* + only CKE and SMP is writable +*/ +void _SSPSTAT::put(uint new_value) +{ + uint old6 = value.get() & ~(CKE|SMP); + + // For BSSP register is read only otherwise + // only CKE and SMP are writable + + if (!m_sspmod || m_sspmod->ssp_type() == SSP_TYPE_BSSP) + return; + + put_value(old6 | (new_value & (CKE|SMP))); +} + +void _SSPSTAT::put_value(uint new_value) +{ + value.put(new_value); +} + +class SCK_SignalSource : public SignalControl +{ + public: + SCK_SignalSource(SSP_MODULE *_ssp_mod, PinModule *_pin) + : m_pin(_pin), m_ssp_mod(_ssp_mod), m_cState('?') + {} + ~SCK_SignalSource(){} + virtual void release(){m_ssp_mod->releaseSCKpin();} + + virtual char getState() { return m_cState;} + + virtual void putState(const char new3State) + { + if (new3State != m_cState) { + m_cState = new3State; + m_pin->updatePinModule(); + } + } + + virtual void toggle() + { + switch (m_cState) + { + case '1': + case 'W': + putState('0'); + break; + case '0': + case 'w': + putState('1'); + break; + } + } + + private: + PinModule *m_pin; + SSP_MODULE *m_ssp_mod; + char m_cState; +}; + +class SDO_SignalSource : public SignalControl +{ + public: + SDO_SignalSource(SSP_MODULE *_ssp_mod, PinModule *_pin) + : m_pin(_pin), m_ssp_mod(_ssp_mod), m_cState('?') + {} + virtual void release(){m_ssp_mod->releaseSDOpin();} + + virtual char getState() { return m_cState;} + + virtual void putState(const char new3State) + { + if (new3State != m_cState) { + m_cState = new3State; + m_pin->updatePinModule(); + } + } + + private: + PinModule *m_pin; + SSP_MODULE *m_ssp_mod; + char m_cState; +}; + +class SDI_SignalSource : public SignalControl +{ + public: + SDI_SignalSource(SSP_MODULE *_ssp_mod, PinModule *_pin) + : m_pin(_pin), m_ssp_mod(_ssp_mod), m_cState('?') + {} + virtual void release(){m_ssp_mod->releaseSDIpin();} + + virtual char getState() { return m_cState;} + + virtual void putState(const char new3State) + { + if (new3State != m_cState) { + m_cState = new3State; + m_pin->updatePinModule(); + } + } + + private: + PinModule *m_pin; + SSP_MODULE *m_ssp_mod; + char m_cState; +}; + +class SDI_SignalSink : public SignalSink +{ + public: + SDI_SignalSink(SSP_MODULE *_ssp_mod) + : m_ssp_mod(_ssp_mod) + { + assert(_ssp_mod); + } + virtual ~SDI_SignalSink(){} + virtual void release(){delete this;} + + void setSinkState(char new3State) + { + m_ssp_mod->SDI_SinkState(new3State); + } + private: + SSP_MODULE *m_ssp_mod; +}; + +class SCL_SignalSink : public SignalSink +{ + public: + SCL_SignalSink(SSP_MODULE *_ssp_mod) + : m_ssp_mod(_ssp_mod) + { + assert(_ssp_mod); + } + virtual ~SCL_SignalSink(){} + virtual void release(){delete this; } + + void setSinkState(char new3State) + { + m_ssp_mod->SCL_SinkState(new3State); + } + private: + SSP_MODULE *m_ssp_mod; +}; + +class SS_SignalSink : public SignalSink +{ + public: + SS_SignalSink(SSP_MODULE *_ssp_mod) + : m_ssp_mod(_ssp_mod) + { + assert(_ssp_mod); + } + virtual ~SS_SignalSink(){} + virtual void release(){delete this; } + + void setSinkState(char new3State) + { + m_ssp_mod->SS_SinkState(new3State); + } + private: + SSP_MODULE *m_ssp_mod; +}; + + +//----------------------------------------------------------- +// SSPCON - Synchronous Serial Port Control register. +//----------------------------------------------------------- + +_SSPCON::_SSPCON(Processor *pCpu, SSP_MODULE *pSSP) + : sfr_register(pCpu, "sspcon","Synchronous Serial Port Control"), + m_sspmod(pSSP) +{ +} +bool _SSPCON::isSPIActive(uint value) +{ + if (value & SSPEN) + { + switch(value & SSPM_mask) + { + case SSPM_SPImaster4: + case SSPM_SPImaster16: + case SSPM_SPImaster64: + case SSPM_SPImasterTMR2: + case SSPM_SPIslaveSS: + case SSPM_SPIslave: + return(true); + + case SSPM_SPImasterAdd: + if ((m_sspmod->ssp_type() == SSP_TYPE_MSSP1)) + return(true); + } + } + return(false); +} +bool _SSPCON::isSPIMaster() +{ + uint reg_value = value.get(); + if (reg_value & SSPEN) + { + switch(reg_value & SSPM_mask) + { + case SSPM_SPImaster4: + case SSPM_SPImaster16: + case SSPM_SPImaster64: + case SSPM_SPImasterTMR2: + return(true); + + case SSPM_SPImasterAdd: + if ((m_sspmod->ssp_type() == SSP_TYPE_MSSP1)) + return(true); + break; + } + } + return(false); +} +/* + process write to SSPCON +*/ +void _SSPCON::put(uint new_value) +{ + uint old_value = value.get(); + + put_value(new_value); + + Dprintf(("SSPCON new %x old %x\n", new_value, old_value)); + if ((new_value & SSPEN) && ! (old_value & SSPEN)) // Turn on SSP + m_sspmod->startSSP(new_value); + else if (!(new_value & SSPEN) && (old_value & SSPEN)) // Turn off SSP + m_sspmod->stopSSP(old_value); + else if (new_value != old_value ) // change while active + m_sspmod->changeSSP(new_value, old_value); +} + +/* + update SSPCON without action +*/ +void _SSPCON::put_value(uint new_value) +{ + value.put(new_value & 0xff); +} + +/* + Set WCOL bit of SSPCON +*/ +void _SSPCON::setWCOL() +{ + if (value.get() & WCOL) return; + put_value(value.get() | WCOL); +} +/* + return true if a I2C mode is enabled in SSPCON +*/ + +bool _SSPCON::isI2CActive(uint val) +{ + if ( (val & SSPEN) != SSPEN) return(false); + switch(val & SSPM_mask) + { + case SSPM_I2Cslave_7bitaddr: + case SSPM_I2Cslave_10bitaddr: + case SSPM_MSSPI2Cmaster: + case SSPM_I2Cfirmwaremaster: + case SSPM_I2Cslave_7bitaddr_ints: + case SSPM_I2Cslave_10bitaddr_ints: + return(true); + break; + } + return(false); +} +bool _SSPCON::isI2CMaster(uint val) +{ + if ( (val & SSPEN) != SSPEN) + return(false); + switch(val & SSPM_mask) + { + case SSPM_MSSPI2Cmaster: + case SSPM_I2Cfirmwaremaster: + return(true); + break; + } + return(false); +} +/* + return true if an I2C slave mode is enabled in SSPCON +*/ +bool _SSPCON::isI2CSlave(uint val) +{ + if ( (val & SSPEN) != SSPEN) + return(false); + switch(val & SSPM_mask) + { + case SSPM_I2Cslave_7bitaddr: + case SSPM_I2Cslave_10bitaddr: + case SSPM_I2Cslave_7bitaddr_ints: + case SSPM_I2Cslave_10bitaddr_ints: + return(true); + break; + } + return(false); +} + +//----------------------------------------------------------- +// SSPBUF - Synchronous Serial Port Control register. +//----------------------------------------------------------- + +_SSPBUF::_SSPBUF(Processor *pCpu, SSP_MODULE *pSSP) + : sfr_register(pCpu, "sspbuf","Synchronous Serial Port Buffer"), + m_sspmod(pSSP), m_bIsFull(false) +{ +} + +/* + process write to SSPBUF +*/ +void _SSPBUF::put(uint new_value) +{ + put_value(new_value); + m_sspmod->newSSPBUF(value.get()); + m_bIsFull = false; +} + +/* + update SSPBUF without processing data +*/ +void _SSPBUF::put_value(uint new_value) +{ + value.put(new_value & 0xff); +} + +uint _SSPBUF::get() +{ + if( m_sspmod ) m_sspmod->rdSSPBUF(); + + m_bIsFull = false; + + return value.get(); +} + +uint _SSPBUF::get_value() +{ + return value.get(); +} + + +//----------------------------------------------------------- +// SSPMSK - Synchronous Serial Port Address mask(for I2C) +//----------------------------------------------------------- +_SSPMSK::_SSPMSK(Processor *pCpu, const char *_name) + : sfr_register(pCpu, _name,"Synchronous I2C Address mask") +{ + put_value(0xff); +} +void _SSPMSK::put(uint new_value) +{ + put_value(new_value); +} +//----------------------------------------------------------- +// SSPADD - Synchronous Serial Port Address (for I2C) +//----------------------------------------------------------- +_SSPADD::_SSPADD(Processor *pCpu, SSP_MODULE *pSSP) + : sfr_register(pCpu, "sspadd","Synchronous Serial Port Address (I2C)"), + m_sspmod(pSSP) +{ +} + +/* + On some processors SSPMSK is accessed through SSPADD + lt is assummed that SSPM_LoadMaskFunction bits of SSPCON + are reserved on those processors which have seperate addresses + for SSPMSK and SSPADD + +*/ +void _SSPADD::put(uint new_value) +{ + + if (m_sspmod && m_sspmod->sspmsk && + ((m_sspmod->sspcon.value.get() & _SSPCON::SSPM_mask) == + _SSPCON::SSPM_LoadMaskFunction)) + { + m_sspmod->sspmsk->put(new_value); + return; + } + + put_value(new_value); + + if( m_sspmod ) + { + if (m_sspmod->sspmsk) + { + m_sspmod->newSSPADD(m_sspmod->sspmsk->value.get() &new_value); + } + else + m_sspmod->newSSPADD(new_value); + } +} + +void _SSPADD::put_value(uint new_value) +{ + value.put(new_value & 0xff); +} +uint _SSPADD::get() +{ + uint val = value.get(); + if (m_sspmod->sspmsk) + { + uint con_val = m_sspmod->sspcon.value.get() & _SSPCON::SSPM_mask; + if (con_val == _SSPCON::SSPM_LoadMaskFunction) + return m_sspmod->sspmsk->value.get(); + } + + return val; +} + + + +SPI::SPI(SSP_MODULE *_ssp_mod, _SSPCON *_sspcon, _SSPSTAT *_sspstat, _SSPBUF *_sspbuf) + : m_state(eIDLE) +{ + m_sspmod = _ssp_mod; + m_sspcon = _sspcon; + m_sspstat = _sspstat; + m_sspbuf = _sspbuf; + cpu = m_sspmod->cpu; +} + +void SPI::clock( bool ClockState ) +{ + // A clock has happened. Either we sent one or we recieved one. + bool onbeat; + bool allDone = false; + if( !m_sspstat || ! m_sspcon) + return; + uint sspstat_val = m_sspstat->value.get(); + uint sspcon_val = m_sspcon->value.get(); + + //cout << "SPi clock " << ClockState << " m_state=" << m_state << endl; + + if( ClockState ) // rising edge + { + if( ( (sspcon_val & _SSPCON::CKP) && !(sspstat_val & _SSPSTAT::CKE) ) + || ( !(sspcon_val & _SSPCON::CKP) && (sspstat_val & _SSPSTAT::CKE) ) ) + onbeat = true; + else + onbeat = false; + } + else // falling edge + { + if( ( !(sspcon_val & _SSPCON::CKP) && !(sspstat_val & _SSPSTAT::CKE) ) + || ( (sspcon_val & _SSPCON::CKP) && (sspstat_val & _SSPSTAT::CKE))) + onbeat = true; + else + onbeat = false; + } + + if( m_state == eIDLE ){ + SPIproto(("Idle clock %d CKE %d CKP %d onbeat %d\n", ClockState, (sspstat_val & _SSPSTAT::CKE), (sspcon_val & _SSPCON::CKP), onbeat)); + if( sspstat_val & _SSPSTAT::CKE ) + { + // FIX: I have NOT verified that PICs actually behave like this. + cout << "SSP: I can't handle a non-started transfer with CKE = 1." << endl; + return; + } + else if( onbeat ) + { + // FIX: I have NOT verified that PICs actually behave like this. + cout << "SSP: " << cpu->name() << " Ignoring clock transition to neutral in state IDLE." << endl; + return; + } + else + { + // RP: This is only relevant in slave mode? I think clock is never called + // while idle in master mode. + + SPIproto(("Clock called start transfer\n")); + start_transfer(); + } + } + if (!m_sspmod) return; + + if( onbeat ) { + // on beat: data is read in if SMP = 0 + if( !(sspstat_val & _SSPSTAT::SMP) ) { + m_SSPsr <<= 1; + if (m_sspmod->get_SDI_State()) + m_SSPsr |= 1; + + SPIproto(("In Bit %u byte count=%d onbeat m_SSPsr=0x%02x\n", (m_SSPsr & 1), bits_transfered+1, m_SSPsr)); + } + } else { + // off beat: data is shifted out, data is read in if SMP = 1 + + if( sspstat_val & _SSPSTAT::SMP ) { + m_SSPsr <<= 1; + if (m_sspmod->get_SDI_State()) + m_SSPsr |= 1; + + SPIproto(("In Bit %u byte count=%d offbeat\n", (m_SSPsr & 1), bits_transfered+1)); + } + + char nextSDO = (m_SSPsr&(1<<7)) ? '1' : '0'; + m_sspmod->putStateSDO(nextSDO); + + SPIproto(("\tSent bit %c m_SSPsr 0x%x\n", nextSDO, m_SSPsr)); + } + + bool bSSPCONValue = (sspcon_val & _SSPCON::CKP) ? true : false; + if(bSSPCONValue == ClockState) { + bits_transfered++; + if( bits_transfered == 8 ) + { + if( (sspstat_val & _SSPSTAT::SMP) && !(sspstat_val & _SSPSTAT::CKE) ) + { + m_state = eWAITING_FOR_LAST_SMP; + } + else + { + stop_transfer(); + allDone = true; + } + } + } + if ( !allDone && m_sspcon->isSPIMaster() ) + set_halfclock_break(); +} + +void SPI::set_halfclock_break() +{ + int clock_in_cycles = 1; + + if( !m_sspstat || ! m_sspcon) + return; + + uint sspcon_val = m_sspcon->value.get(); + + switch( sspcon_val & _SSPCON::SSPM_mask ) { + // Simulation requires Fosc/4 to be run at Fosc/8 + case _SSPCON::SSPM_SPImaster4: + clock_in_cycles = 1; + break; + case _SSPCON::SSPM_SPImaster16: + clock_in_cycles = 2; + break; + case _SSPCON::SSPM_SPImaster64: + clock_in_cycles = 8; + break; + case _SSPCON::SSPM_SPImasterTMR2: + break; + } + + get_cycles().set_break(get_cycles().get() + clock_in_cycles, this); +} +void SPI::callback() +{ + if (!m_sspmod) + return; + + SPIproto(("callback m_state=%d\n", m_state)); + + switch( m_state ) { + case eIDLE: + break; + case eACTIVE: + m_sspmod->Sck_toggle(); + clock( m_sspmod->get_SCL_State() ); + break; + case eWAITING_FOR_LAST_SMP: + if( m_sspstat && m_sspstat->value.get() & _SSPSTAT::SMP ) { + m_SSPsr <<= 1; + if (m_sspmod->get_SDI_State()) + m_SSPsr |= 1; + } + m_state = eACTIVE; + stop_transfer(); + break; + } +} +//----------------------------------------------------------- + +void SPI::startSPI() +{ + m_state = eIDLE; + bits_transfered = 0; +} + +SPI_1::SPI_1(SSP1_MODULE *_ssp_mod, _SSPCON *_sspcon, _SSPSTAT *_sspstat, + _SSPBUF *_sspbuf, _SSP1CON3 *_ssp1con3, _SSPADD *_sspadd) : + SPI(_ssp_mod, _sspcon, _sspstat, _sspbuf) +{ + m_ssp1con3 = _ssp1con3; + m_sspadd = _sspadd; +} +void SPI_1::set_halfclock_break() +{ + int clock_in_cycles = 1; + + if( !m_sspstat || ! m_sspcon) + return; + + uint sspcon_val = m_sspcon->value.get(); + + switch( sspcon_val & _SSPCON::SSPM_mask ) { + // Simulation requires Fosc/4 to be run at Fosc/8 + case _SSPCON::SSPM_SPImaster4: + clock_in_cycles = 1; + break; + case _SSPCON::SSPM_SPImaster16: + clock_in_cycles = 2; + break; + case _SSPCON::SSPM_SPImaster64: + clock_in_cycles = 8; + break; + case _SSPCON::SSPM_SPImasterAdd: + // Note, this will be low by 1 cycle/clock when sspadd is even + clock_in_cycles = (m_sspadd->get() + 1)>>1; + if (clock_in_cycles < 2) + { + cout << "WARNING for SPI sspadd must be >= 3\n"; + clock_in_cycles = 2; + } + break; + case _SSPCON::SSPM_SPImasterTMR2: + break; + } + + get_cycles().set_break(get_cycles().get() + clock_in_cycles, this); +} +void SPI_1::stop_transfer() +{ + + Dprintf(("stop_transfer SPI_1\n")); + if (!m_sspcon || !m_sspstat || !m_sspbuf || !m_sspmod || !m_ssp1con3) + return; + + if( m_state == eACTIVE ) { + if (bits_transfered == 8 ) Dprintf(("BOEN %x\n", m_ssp1con3->value.get() & _SSP1CON3::BOEN)); + if( bits_transfered == 8 && m_ssp1con3->value.get() & _SSP1CON3::BOEN) + { + m_sspbuf->put_value(m_SSPsr & 0xff); + m_sspmod->set_sspif(); + } + else if( bits_transfered == 8 && !m_sspbuf->isFull() ) + { + m_sspbuf->put_value(m_SSPsr & 0xff); + m_sspbuf->setFullFlag(true); + m_sspmod->set_sspif(); + m_sspstat->put_value(m_sspstat->value.get() | _SSPSTAT::BF); + } else if( bits_transfered == 8 && m_sspbuf->isFull() ) { + m_sspcon->setSSPOV(); + m_sspmod->set_sspif(); // The real PIC sets sspif even with overflow + } else { + cout << "SPI: Stopping transfer. Cancel finish." << endl; + // The transfer was canceled in some way + } + } + m_state = eIDLE; +} + +SSP_MODULE::SSP_MODULE(Processor *pCpu) + : sspbuf(pCpu,this), + sspcon(pCpu,this), + sspstat(pCpu,this), + sspcon2(pCpu,this), + sspadd(pCpu,this), + sspmsk(0), + cpu(pCpu), + m_ssp_if(0), + m_bcl_if(0), + m_pirset(0), + m_spi(0), + m_i2c(0), + m_sck(0), + m_ss(0), + m_sdo(0), + m_sdi(0), + m_i2c_tris(0), + m_SDI_State(false), + m_SCL_State(false), + m_SS_State(false), + m_SckSource(0), + m_SdoSource(0), + m_SdiSource(0), + m_SDI_Sink(0), + m_SCL_Sink(0), + m_SS_Sink(0), + m_sink_set(false), + m_sdo_active(false), + m_sdi_active(false), + m_sck_active(false) +{ +} + +SSP_MODULE::~SSP_MODULE() +{ + if (!m_sink_set) + { + delete m_SDI_Sink; + delete m_SCL_Sink; + delete m_SS_Sink; + } + + if (m_sdi_active && m_sdi) + m_sdi->setSource(0); + if (m_SdiSource) + delete m_SdiSource; + + if (m_sdo_active && m_sdo) m_sdo->setSource(0); + if (m_SdoSource) delete m_SdoSource; + + + if (m_sck_active && m_sck) + m_sck->setSource(0); + if (m_SckSource) delete m_SckSource; + if (m_spi) + { + delete m_spi; + delete m_i2c; + } + if (m_ssp_if) delete m_ssp_if; + if (m_bcl_if) delete m_bcl_if; +} + +/* + SSP1_MODULE adds SSPCON3 and SSPMSK to SSP_MODULE +*/ +SSP1_MODULE::SSP1_MODULE(Processor *pCpu) + : SSP_MODULE(pCpu) + , ssp1con3(pCpu, this) +{ + sspmsk = new _SSPMSK(pCpu, "ssp1msk"); +} + +SSP1_MODULE::~SSP1_MODULE() +{ + delete sspmsk; +} + +void SSP1_MODULE::setIOpin( int data, PinModule* pin ) +{ + switch(data) + { + case SCK_PIN: + set_sckPin(pin); + break; + + case SDI_PIN: + set_sdiPin(pin); + break; + + case SDO_PIN: + set_sdoPin(pin); + break; + + case SS_PIN: + set_ssPin(pin); + break; + }; +} + +void SSP1_MODULE::set_sckPin( PinModule *_sckPin ) +{ + if (m_sck == _sckPin) return; // No change, do nothing + m_sck = _sckPin; + if(m_SckSource) delete m_SckSource; + m_SckSource = new SCK_SignalSource(this, m_sck); +} + +void SSP1_MODULE::set_sdoPin(PinModule *_sdoPin) +{ + if (m_sdo == _sdoPin) return; // No change, do nothing + m_sdo = _sdoPin; + + if(m_SdoSource) delete m_SdoSource; + m_SdoSource = new SDO_SignalSource(this, m_sdo); +} + +void SSP1_MODULE::set_sdiPin(PinModule *_sdiPin) +{ + if (m_sdi == _sdiPin) return; // No change, do nothing + m_sdi = _sdiPin; + if(m_SdiSource) delete m_SdiSource; + m_SdiSource = new SDI_SignalSource(this, m_sdi); +} + +void SSP1_MODULE::set_ssPin(PinModule *_ssPin) +{ + if (m_ss == _ssPin) return; // No change, do nothing + m_ss = _ssPin; + +} + +void SSP1_MODULE::initialize( + PIR_SET *ps, + PinModule *SckPin, + PinModule *SsPin, + PinModule *SdoPin, + PinModule *SdiPin, + PicTrisRegister *_i2ctris, + SSP_TYPE _ssptype + ) +{ + m_pirset = ps; + m_sck = SckPin; + m_ss = SsPin; + m_sdo = SdoPin; + m_sdi = SdiPin; + m_i2c_tris = _i2ctris; + m_ssptype = _ssptype; + m_SckSource = new SCK_SignalSource(this, m_sck); + m_SdoSource = new SDO_SignalSource(this, m_sdo); + m_SdiSource = new SDI_SignalSource(this, m_sdi); + if (! m_spi) + { + m_spi = new SPI_1(this, &sspcon, &sspstat, &sspbuf, &ssp1con3, &sspadd); + m_i2c = new I2C_1(this, &sspcon, &sspstat, &sspbuf, &sspcon2, &sspadd, &ssp1con3); + m_SDI_Sink = new SDI_SignalSink(this); + m_SCL_Sink = new SCL_SignalSink(this); + m_SS_Sink = new SS_SignalSink(this); + } + + +} +void SPI::newSSPBUF(uint newTxByte) +{ + Dprintf(("enabled %d state %d\n", m_sspcon->isSSPEnabled(), m_state)); + if (m_sspcon->isSSPEnabled()) { + if (m_state == eIDLE || bits_transfered == 0) { + m_SSPsr = newTxByte; + SPIproto(("newSSPBUF send 0x%02x\n", m_SSPsr)); + start_transfer(); + } else { + // Collision + SPIproto(("newSSPBUF 0x%02x collision\n", m_SSPsr)); + m_sspcon->setWCOL(); + } + } + else + { + SPIproto(("newSSPBUF !SSPenabled m_SSPsr 0x%02x\n", m_SSPsr)); + } +} +void SPI::start_transfer() +{ + if (!m_sspcon || !m_sspstat) + return; + + // load the shift register + m_state = eACTIVE; + bits_transfered = 0; + uint sspcon_val = m_sspcon->value.get(); + uint sspstat_val = m_sspstat->value.get(); + + switch( sspcon_val & _SSPCON::SSPM_mask ) { + case _SSPCON::SSPM_SPImaster4: + case _SSPCON::SSPM_SPImaster16: + case _SSPCON::SSPM_SPImaster64: + case _SSPCON::SSPM_SPImasterAdd: + // In master mode, the SDO line is always set at the start of the transfer + m_sspmod->putStateSDO((m_SSPsr &(1<<7)) ? '1' : '0'); + // Setup callbacks for clocks + set_halfclock_break(); + break; + case _SSPCON::SSPM_SPImasterTMR2: + m_sspmod->putStateSDO((m_SSPsr &(1<<7)) ? '1' : '0'); + break; + case _SSPCON::SSPM_SPIslaveSS: + // The SS pin was pulled low + if( sspstat_val & _SSPSTAT::CKE ) + m_sspmod->putStateSDO((m_SSPsr &(1<<7)) ? '1' : '0'); + break; + case _SSPCON::SSPM_SPIslave: + // I don't do any thing until first clock edge + SPIproto(("SSPM_SPIslave start_transfer 0x%02x\n", m_SSPsr)); + if( sspstat_val & _SSPSTAT::CKE ) + m_sspmod->putStateSDO((m_SSPsr &(1<<7)) ? '1' : '0'); + break; + default: + cout << "start_transfer: The selected SPI mode is unimplemented. mode=" << hex + <<(sspcon_val & _SSPCON::SSPM_mask) << endl; + } + +} +void SPI::stop_transfer() +{ + if (!m_sspcon || !m_sspstat || !m_sspbuf || !m_sspmod) + return; + + if( m_state == eACTIVE ) { + if( bits_transfered == 8 && !m_sspbuf->isFull() ) + { + m_SSPsr &= 0xff; + SPIproto(("Stoping transfer. Normal finish. Setting sspif and BF got=0x%02x\n" , (m_SSPsr & 0xff))); + m_sspbuf->put_value(m_SSPsr & 0xff); + m_sspbuf->setFullFlag(true); + m_sspmod->set_sspif(); + m_sspstat->put_value(m_sspstat->value.get() | _SSPSTAT::BF); + } else if( bits_transfered == 8 && m_sspbuf->isFull() ) { + SPIproto(("Stopping transfer. SSPBUF Overflow setting SSPOV.\n")); + m_sspcon->setSSPOV(); + m_sspmod->set_sspif(); // The real PIC sets sspif even with overflow + } else { + cout << "SPI: Stopping transfer. Cancel finish." << endl; + // The transfer was canceled in some way + } + } else { + SPIproto(("Stopping transfer. State != ACTIVE.")); + } + + m_state = eIDLE; + +} + +I2C::I2C(SSP_MODULE *_ssp_mod, _SSPCON *_sspcon, _SSPSTAT *_sspstat, + _SSPBUF *_sspbuf, _SSPCON2 *_sspcon2, _SSPADD *_sspadd) + : i2c_state(eIDLE) +{ + m_sspmod = _ssp_mod; + m_sspcon = _sspcon; + m_sspstat = _sspstat; + m_sspbuf = _sspbuf; + m_sspcon2 = _sspcon2; + m_sspadd = _sspadd; + future_cycle = 0; + + cpu = m_sspmod->cpu; +} + +I2C_1::I2C_1(SSP_MODULE *_ssp_mod, _SSPCON *_sspcon, _SSPSTAT *_sspstat, + _SSPBUF *_sspbuf, _SSPCON2 *_sspcon2, _SSPADD *_sspadd, + _SSP1CON3 *_ssp1con3) : + I2C(_ssp_mod, _sspcon, _sspstat, _sspbuf, _sspcon2, _sspadd) +{ + m_sspmod = _ssp_mod; + m_sspcon3 = _ssp1con3; +} + +void I2C::set_idle() +{ + i2c_state = eIDLE; + I2Cproto(("%s i2c_state = eIDLE\n", __FUNCTION__)); +} +bool I2C::isIdle() +{ + if (i2c_state == eIDLE) return true; + if( + (m_sspstat->value.get() & _SSPSTAT::RW) == 0 && + (m_sspcon2->value.get() & + ( + _SSPCON2::ACKEN | + _SSPCON2::RCEN | + _SSPCON2::PEN | + _SSPCON2::RSEN | + _SSPCON2::SEN + )) == 0 + ) + { + set_idle(); + } + return(i2c_state == eIDLE); +} +bool I2C::rx_byte() +{ + m_SSPsr = ( m_SSPsr << 1 ) | (m_sspmod->get_SDI_State()?1:0); + bits_transfered++; + if (bits_transfered == 8) + { + m_sspcon2->put_value(m_sspcon2->value.get() & ~_SSPCON2::RCEN); + + m_sspmod->SaveSSPsr(m_SSPsr & 0xff); + m_sspmod->set_sspif(); + set_idle(); + return(true); + } + return(false); +} +/* + Called during phase 0 + SCL goes high +*/ +bool I2C::scl_pos_tran() +{ + + return true; +} +/* + Called during phase 1 + SCL is high, data can be read and STOP, START transitions +*/ +bool I2C::scl_clock_high() +{ + if (i2c_state == CLK_STOP) + { + setBRG(); + m_sspmod->setSDA(true); + return false; + } + else if (i2c_state == CLK_RSTART) + { + m_sspmod->setSDA(true); + } + else if (i2c_state == CLK_START) + { + m_sspmod->setSDA(false); + } + else if (i2c_state == CLK_RX_ACK) + { + bool n_ack = m_sspmod->get_SDI_State(); + + if (n_ack) + m_sspcon2->put_value(m_sspcon2->value.get() | _SSPCON2::ACKSTAT); + else + m_sspcon2->put_value(m_sspcon2->value.get() & ~_SSPCON2::ACKSTAT); + } + else if (i2c_state == CLK_RX_BYTE) + { + if (bits_transfered < 8) + { + m_SSPsr = (m_SSPsr << 1) | (m_sspmod->get_SDI_State()?1:0); + bits_transfered++; + } + } + return true; +} +/* + Called during phase 2 + SCL is going low +*/ + +bool I2C::scl_neg_tran() +{ + if (i2c_state == CLK_STOP) + { + // Check SCL and SDI still high + if (m_sspmod->get_SCL_State() && m_sspmod->get_SDI_State()) + { + uint sspstat = m_sspstat->value.get() & (_SSPSTAT::SMP | _SSPSTAT::CKE); + sspstat |= _SSPSTAT::P; + m_sspstat->value.put(sspstat); + m_sspmod->set_sspif(); + } + else + { + m_sspmod->set_bclif(); + } + set_idle(); + m_sspcon2->value.put(m_sspcon2->value.get() & ~_SSPCON2::PEN ); + return false; + } + else if (i2c_state == CLK_START) + { + m_sspcon2->value.put(m_sspcon2->value.get() & + ~(_SSPCON2::SEN | _SSPCON2::RSEN)); + if (m_sspmod->get_SCL_State() && !m_sspmod->get_SDI_State()) + { + m_sspmod->setSCL(false); + m_sspmod->set_sspif(); + } + else + { + m_sspmod->setSDA(true); + m_sspmod->set_bclif(); + } + set_idle(); + return false; + } + return true; +} +/* + Called during phase 3 + SCL is low, data should be put on the bus in this phase +*/ +bool I2C::scl_clock_low() +{ + if (i2c_state == CLK_RSTART) + { + i2c_state = CLK_START; + } + else if (i2c_state == CLK_ACKEN) + { + m_sspcon2->value.put( m_sspcon2->value.get() & ~(_SSPCON2::ACKEN )); + m_sspmod->set_sspif(); + set_idle(); + return false; + } + else if (i2c_state == CLK_RX_ACK) + { + m_sspstat->put_value(m_sspstat->value.get() & ~_SSPSTAT::RW); + m_sspmod->set_sspif(); + set_idle(); + return false; + } + else if (i2c_state == CLK_TX_BYTE) + { + bits_transfered++; + if (bits_transfered < 8) + { + m_SSPsr <<= 1; + m_sspmod->setSDA((m_SSPsr & 0x80) == 0x80); + } + else if(bits_transfered == 8) + { + m_sspstat->put_value(m_sspstat->value.get() & ~_SSPSTAT::BF); + i2c_state = CLK_RX_ACK; + } + } + else if (i2c_state == CLK_RX_BYTE) + { + if(bits_transfered == 8) + { + m_sspstat->put_value(m_sspstat->value.get() & ~_SSPSTAT::RW); + m_sspcon2->put_value(m_sspcon2->value.get() & ~_SSPCON2::RCEN); + m_sspmod->SaveSSPsr(m_SSPsr & 0xff); + + m_sspmod->set_sspif(); + set_idle(); + return false; + } + } + + return true; +} +void I2C::callback() +{ + if (future_cycle != get_cycles().get()) + { + cout << "I2C callback - program error future_cycle=" << future_cycle << " now=" + << get_cycles().get() << " i2c_state=" << i2c_state << endl; + } + + future_cycle = 0; + if (i2c_state == eIDLE) return; + switch (phase) + { + case 0: // SCL goes high + if(scl_pos_tran()) + { + setBRG(); + m_sspmod->setSCL(true); + } + break; + + case 1: // SCL low get data (or STOP, START) from SDA bus + if(scl_clock_high()) + setBRG(); + break; + + case 2: // SCL goes low + if(scl_neg_tran()) + { + setBRG(); + m_sspmod->setSCL(false); + } + break; + + case 3: // put data on SDA bus + if(scl_clock_low()) + setBRG(); + break; + } + phase = (phase + 1) % 4; + return; + + switch(i2c_state) + { + case CLK_ACKEN: + if (phase == 1) + { + m_sspmod->setSCL(true); + } + else if (phase == 2) + { + m_sspmod->setSCL(false); + m_sspcon2->value.put( m_sspcon2->value.get() & ~(_SSPCON2::ACKEN )); + m_sspmod->set_sspif(); + } + else + { + cout << "CLK_ACKEN unexpected phase " << phase << endl; + } + break; + + case CLK_START: + if (phase == 0) + { + phase++; + m_sspmod->setSDA(false); + setBRG(); + } + else + { + m_sspcon2->value.put(m_sspcon2->value.get() & + ~(_SSPCON2::SEN | _SSPCON2::RSEN)); + m_sspmod->setSCL(false); + m_sspmod->set_sspif(); + set_idle(); + } + break; + + case CLK_RSTART: + if (phase == 0) + { + m_sspmod->setSCL(true); + } + break; + + case CLK_STOP: + if (phase == 0) + { + phase++; + if (m_sspmod->get_SCL_State()) + { + setBRG(); + } + m_sspmod->setSCL(true); + } + else if (phase == 1) + { + phase++; + setBRG(); + m_sspmod->setSDA(true); + } + else + { + if (m_sspstat->value.get() & _SSPSTAT::P) + { + m_sspmod->set_sspif(); + } + else + { + m_sspmod->set_bclif(); + } + set_idle(); + m_sspcon2->value.put(m_sspcon2->value.get() & ~_SSPCON2::PEN ); + } + break; + + + case CLK_TX_BYTE: + if(m_sspmod->get_SCL_State()) + { + bool n_ack = m_sspmod->get_SDI_State(); + bits_transfered++; + if (bits_transfered < 8) + { + m_SSPsr <<= 1; + m_sspmod->setSCL(false); + m_sspmod->setSDA((m_SSPsr & 0x80) == 0x80); + } + else if(bits_transfered == 8) + { + m_sspmod->setSCL(false); + m_sspmod->setSDA(true); + m_sspstat->put_value(m_sspstat->value.get() & ~_SSPSTAT::BF); + } + else + { + if (n_ack) + { + m_sspcon2->put_value(m_sspcon2->value.get() | _SSPCON2::ACKSTAT); + I2Cproto(("NACK\n")); + } + else + { + m_sspcon2->put_value(m_sspcon2->value.get() & ~_SSPCON2::ACKSTAT); + I2Cproto(("ACK\n")); + } + m_sspstat->put_value(m_sspstat->value.get() & ~_SSPSTAT::RW); + m_sspmod->set_sspif(); + set_idle(); + m_sspmod->setSCL(false); + } + } + else + m_sspmod->setSCL(true); + break; + + case CLK_RX_BYTE: + if(m_sspmod->get_SCL_State()) + { + rx_byte(); + m_sspmod->setSCL(false); + } + else + m_sspmod->setSCL(true); + break; + + + default: + cout << "I2C::callback unxpected i2c_state=" << dec << i2c_state << endl; + break; + + } +} +void I2C::clock(bool clock_state) +{ + uint sspcon_val = m_sspcon->value.get(); + uint sspstat_val = m_sspstat->value.get(); + + if ((sspcon_val & _SSPCON::SSPM_mask) == _SSPCON::SSPM_MSSPI2Cmaster) + return; + + if (clock_state) // Do read on clock high transition + { + switch(i2c_state) + { + case CLK_STOP: + if (phase == 1) + setBRG(); + break; + + case CLK_ACKEN: + if (phase == 1) + { + phase++; + setBRG(); + } + break; + +/*RRR + case CLK_RSTART: + if (phase == 0) + { + if (!m_sspmod->get_SDI_State()) + { + if (verbose) + cout << "I2C::clock CLK_RSTART bus collision\n"; + bus_collide(); + m_sspmod->setSDA(true); + } + else + { + clrBRG(); + start_bit(); + } + } + else if (phase == 1) + { + setBRG(); + } + break; +*/ + + case RX_CMD: + case RX_CMD2: + case RX_DATA: + if (bits_transfered < 8) + { + m_SSPsr = (m_SSPsr << 1) | (m_sspmod->get_SDI_State()?1:0); + bits_transfered++; + } + break; + + + case CLK_TX_BYTE: + case CLK_RX_BYTE: + setBRG(); + break; + + default: + break; + } + } + else // Do writes of clock low transition + { + switch(i2c_state) + { + case CLK_ACKEN: + clrBRG(); + if (phase) + { + m_sspmod->setSCL(false); + m_sspcon2->value.put( + m_sspcon2->value.get() & ~(_SSPCON2::ACKEN )); + m_sspmod->set_sspif(); + set_idle(); + } + break; + + case CLK_START: + case CLK_RSTART: + clrBRG(); + if (phase == 0 ) + { + bus_collide(); + } + else if (phase == 1) + { + m_sspcon2->value.put(m_sspcon2->value.get() & + ~(_SSPCON2::SEN | _SSPCON2::RSEN)); + } + break; + +/* RRR + case CLK_RSTART: + if (phase == 0) + m_sspmod->setSDA(true); + break; +*/ + + case RX_CMD: + case RX_CMD2: + if (bits_transfered == 8) + { + if ( ( m_SSPsr == 0 && + (m_sspcon2->value.get() & _SSPCON2::GCEN) + ) + || match_address(m_SSPsr)) + { + I2Cproto(("got address sspsr=0x%2x\n", m_SSPsr)); + } + else + { + I2Cproto(("address not a match sspsr=0x%02x\n",m_SSPsr)); + set_idle(); + return; + } + } + else if (bits_transfered == 9) + { + I2Cproto(("9 bits RXCMD\n")); + if(end_ack()) + { + m_sspstat->put_value(sspstat_val & ~_SSPSTAT::DA); + slave_command(); + } + return; + } + // Fall Through + case RX_DATA: + if (bits_transfered == 8) + { + I2Cproto(("RX_DATA 0x%02x\n", m_SSPsr&0xff)); + + if (m_sspmod->SaveSSPsr(m_SSPsr & 0xff) ) // ACK ? + { + m_sspmod->setSDA(false); + } + else + { + m_sspmod->setSDA(true); + } + bits_transfered++; + } + else if (bits_transfered == 9) + { + end_ack(); + m_sspstat->put_value(sspstat_val | _SSPSTAT::DA); + } + break; + + + case CLK_TX_BYTE: + case CLK_RX_BYTE: + setBRG(); + break; + + case TX_DATA: + bits_transfered++; + if (bits_transfered < 8) + { + m_SSPsr <<= 1; + m_sspmod->setSDA((m_SSPsr & 0x80) == 0x80); + } + else if(bits_transfered == 8) + { + m_sspmod->setSDA(true); + m_sspstat->put_value(sspstat_val & ~_SSPSTAT::BF); + } + else if(bits_transfered == 9) + { + m_sspmod->set_sspif(); + if (m_sspmod->get_SDI_State()) // NACK + { + m_sspstat->put_value(sspstat_val & _SSPSTAT::BF); + set_idle(); + return; + } + m_sspstat->put_value(sspstat_val | _SSPSTAT::DA); + if (sspstat_val & _SSPSTAT::RW) + { + sspcon_val &= ~ _SSPCON::CKP; + m_sspcon->put_value(sspcon_val); + m_sspmod->setSCL(false); + } + } + break; + + default: + break; + } + } +} + +bool I2C::match_address(uint sspsr) +{ + uint mask = 0xfe; + uint sspm = m_sspcon->value.get() & _SSPCON::SSPM_mask; + bool slave_10 = (sspm == _SSPCON::SSPM_I2Cslave_10bitaddr) || + (sspm == _SSPCON::SSPM_I2Cslave_10bitaddr_ints); + + if (slave_10) + { + uint ret = (sspsr & 0xff) ^ m_sspadd->get(); + if ((sspsr & 0xf9) == 0xf0) // 1st byte 10 bit address + { + mask = 0x6; + } + else + { + mask = (m_sspmod->sspmsk) ? m_sspmod->sspmsk->value.get() : 0xff; + } + + ret &= mask; + return !(bool)ret; + } + if (m_sspmod->sspmsk) + mask &= m_sspmod->sspmsk->value.get(); + + return !((sspsr ^ m_sspadd->get()) & mask); +} +void I2C_1::clock(bool clock_state) +{ + uint sspcon_val = m_sspcon->value.get(); + uint sspstat_val = m_sspstat->value.get(); + + if ((sspcon_val & _SSPCON::SSPM_mask) == _SSPCON::SSPM_MSSPI2Cmaster) + return; + + if (clock_state) // Do read on clock high transition + { + switch(i2c_state) + { + case CLK_STOP: + if (phase == 1) + setBRG(); + break; + + case CLK_ACKEN: + if (phase == 1) + { + phase++; + setBRG(); + } + break; + +/* RRR + case CLK_RSTART: + if (phase == 0) + { + if (!m_sspmod->get_SDI_State()) + { + if (verbose) + cout << "I2c_1::clock CLK_RSTART bus collision\n"; + bus_collide(); + m_sspmod->setSDA(true); + } + else + { + clrBRG(); + start_bit(); + } + } + else if (phase == 1) + { + setBRG(); + } + break; +*/ + + + case RX_CMD: + case RX_CMD2: + case RX_DATA: + if (bits_transfered < 8) + { + m_SSPsr = (m_SSPsr << 1) | (m_sspmod->get_SDI_State()?1:0); + bits_transfered++; + } + else if (bits_transfered == 9 && + m_sspcon3->value.get() & (_SSP1CON3::AHEN | _SSP1CON3::DHEN)) + { + m_sspcon3->put(m_sspcon3->value.get() & ~_SSP1CON3::ACKTIM); + } + + break; + + case TX_DATA: + if (bits_transfered == 9 && + m_sspcon3->value.get() & (_SSP1CON3::AHEN | _SSP1CON3::DHEN)) + { + m_sspcon3->put(m_sspcon3->value.get() & ~_SSP1CON3::ACKTIM); + } + + break; + + + + case CLK_TX_BYTE: + case CLK_RX_BYTE: + setBRG(); + break; + + default: + break; + } + } + else // Do writes of clock low transition + { + switch(i2c_state) + { + case CLK_ACKEN: + clrBRG(); + if (phase) + { + m_sspmod->setSCL(false); + m_sspcon2->value.put( + m_sspcon2->value.get() & ~(_SSPCON2::ACKEN )); + m_sspmod->set_sspif(); + set_idle(); + } + break; + + case CLK_START: + case CLK_RSTART: + clrBRG(); + if (phase == 0 ) + { + bus_collide(); + } + else if (phase == 1) + { + m_sspcon2->value.put(m_sspcon2->value.get() & + ~(_SSPCON2::SEN | _SSPCON2::RSEN)); + } + break; + +/* RRR + case CLK_RSTART: + if (phase == 0) + m_sspmod->setSDA(true); + break; +*/ + + case RX_CMD: + case RX_CMD2: + if (bits_transfered == 8) + { + if ( ( m_SSPsr == 0 && + (m_sspcon2->value.get() & _SSPCON2::GCEN) + ) + || match_address(m_SSPsr)) + { + } + else + { + cout << "READ_CMD address missmatch " << hex << m_SSPsr << + " != " << m_sspadd->get() << endl; + set_idle(); + return; + } + } + else if (bits_transfered == 9) + { + if(end_ack()) + { + m_sspstat->put_value(sspstat_val & ~_SSPSTAT::DA); + slave_command(); + } + return; + } + // Fall Through + case RX_DATA: + if (bits_transfered == 8) + { + if (m_sspcon->isI2CSlave(m_sspcon->value.get()) && + ( + (m_sspcon3->value.get() & _SSP1CON3::DHEN && i2c_state == RX_DATA) + || + (m_sspcon3->value.get() & _SSP1CON3::AHEN && + (i2c_state == RX_CMD || i2c_state == RX_CMD2)) + )) + { + uint sspcon3_val = m_sspcon3->value.get(); + + + m_sspmod->SaveSSPsr(m_SSPsr & 0xff); + m_sspcon->value.put(m_sspcon->value.get() & ~_SSPCON::CKP); + m_sspcon3->value.put(sspcon3_val | _SSP1CON3::ACKTIM); + m_sspmod->setSCL(false); // clock low + m_sspmod->set_sspif(); + } + else if (m_sspmod->SaveSSPsr(m_SSPsr & 0xff) ) // ACK ? + { + m_sspmod->setSDA(false); + } + else + { + m_sspmod->setSDA(true); + } + bits_transfered++; + } + else if (bits_transfered == 9) + { + m_sspstat->put_value(sspstat_val | _SSPSTAT::DA); + if(end_ack() + && m_sspmod->isI2CSlave() + && (m_sspcon2->value.get() & _SSPCON2::SEN)) + { + m_sspcon->put(m_sspcon->value.get() & ~_SSPCON::CKP); + } + } + break; + + + case CLK_TX_BYTE: + case CLK_RX_BYTE: + setBRG(); + break; + + case TX_DATA: + bits_transfered++; + if (bits_transfered < 8) + { + m_SSPsr <<= 1; + m_sspmod->setSDA((m_SSPsr & 0x80) == 0x80); + } + else if(bits_transfered == 8) + { + m_sspmod->setSDA(true); + m_sspstat->put_value(sspstat_val & ~_SSPSTAT::BF); + + if(m_sspcon3->value.get() & _SSP1CON3::AHEN) + { + m_sspcon3->value.put(m_sspcon3->value.get() | _SSP1CON3::ACKTIM); + } + } + else if(bits_transfered == 9) + { + m_sspmod->set_sspif(); + if (m_sspmod->get_SDI_State()) // NACK + { + m_sspcon2->put(m_sspcon2->value.get() | _SSPCON2::ACKSTAT); + m_sspstat->put_value(sspstat_val & _SSPSTAT::BF); + set_idle(); + return; + } + m_sspstat->put_value(sspstat_val | _SSPSTAT::DA); + if (sspstat_val & _SSPSTAT::RW) + { + m_sspcon2->put(m_sspcon2->value.get() & ~_SSPCON2::ACKSTAT); + sspcon_val &= ~ _SSPCON::CKP; + m_sspcon->put_value(sspcon_val); + m_sspmod->setSCL(false); + } + } + break; + + default: + break; + } + } +} + +void I2C::slave_command() +{ + uint sspcon_val = m_sspcon->value.get(); + uint sspstat_val = m_sspstat->value.get(); + + if ( m_SSPsr == 0 && (m_sspcon2->value.get() & _SSPCON2::GCEN)) + { + i2c_state = RX_DATA; + I2Cproto(("slave_command i2c_state = RX_DATA\n")); + } + else + { + switch( sspcon_val & _SSPCON::SSPM_mask ) + { + case _SSPCON::SSPM_I2Cslave_10bitaddr_ints: + case _SSPCON::SSPM_I2Cslave_10bitaddr: + if (i2c_state == RX_CMD && (m_SSPsr & 1)) + { + sspstat_val |= _SSPSTAT::RW; + i2c_state = TX_DATA; + I2Cproto(("slave_command i2c_state = TX_DATA\n")); + m_sspmod->setSCL(false); // clock low + sspcon_val &= ~ _SSPCON::CKP; + m_sspcon->put_value(sspcon_val); + } + else + { + sspstat_val |= _SSPSTAT::UA; + i2c_state = (i2c_state == RX_CMD2) ? + RX_DATA : RX_CMD2; + I2Cproto(("slave_command i2c_state = %s\n", i2c_state ==RX_DATA?"RX_DATA":"RX_CMD2")); + } + break; + + case _SSPCON::SSPM_I2Cslave_7bitaddr: + case _SSPCON::SSPM_I2Cslave_7bitaddr_ints: + if (i2c_state == RX_CMD && (m_SSPsr & 1)) + { + sspstat_val |= _SSPSTAT::RW; + sspstat_val &= ~_SSPSTAT::BF; + i2c_state = TX_DATA; + I2Cproto(("slave_command i2c_state = TX_DATA\n")); + sspcon_val &= ~ _SSPCON::CKP; + m_sspcon->put_value(sspcon_val); + m_sspmod->setSCL(false); // clock low + } + else + { + i2c_state = RX_DATA; + I2Cproto(("slave_command i2c_state = RX_DATA\n")); + } + break; + } + m_sspstat->put_value(sspstat_val); + } +} +bool I2C::end_ack() +{ + + m_sspmod->set_sspif(); + bits_transfered = 0; + if (m_sspmod->get_SDI_State()) // NACK + { + I2Cproto(("end_ack NACK\n")); + set_idle(); + return(false); + } + else + { + m_sspmod->setSDA(true); + I2Cproto(("end_ack ACK\n")); + return(true); + } +} +void I2C::bus_collide() +{ + m_sspcon2->value.put(m_sspcon2->value.get() & + ~ (_SSPCON2::SEN | _SSPCON2::RSEN | _SSPCON2::PEN | + _SSPCON2::RCEN | _SSPCON2::ACKEN)); + m_sspmod->set_bclif(); + set_idle(); + +} +void I2C_1::bus_collide() +{ + if (m_sspmod->isI2CMaster()) + { + m_sspcon2->value.put(m_sspcon2->value.get() & + ~ (_SSPCON2::SEN | _SSPCON2::RSEN | _SSPCON2::PEN | + _SSPCON2::RCEN | _SSPCON2::ACKEN)); + m_sspmod->set_bclif(); + } + else if (m_sspmod->isI2CSlave() && (m_sspcon3->value.get() & _SSP1CON3::SBCDE)) + m_sspmod->set_bclif(); + set_idle(); + +} +void I2C::newSSPADD(uint newTxByte) +{ + uint sspstat_val = m_sspstat->value.get(); + + if (sspstat_val & _SSPSTAT::UA) + { + m_sspstat->put_value(sspstat_val & ~_SSPSTAT::UA); + m_sspmod->setSCL(true); // turn off clock stretch + } +} +void I2C::setBRG() +{ + if (future_cycle) + cout << "ERROR I2C::setBRG called with future_cycle=" << future_cycle << endl; + future_cycle = get_cycles().get() + + ((m_sspadd->get() &0x7f)/ 4) + 1; + get_cycles().set_break(future_cycle, this); +} + +void I2C::clrBRG() +{ + if (future_cycle) + { + get_cycles().clear_break(this); + future_cycle = 0; + } +} +void I2C::newSSPBUF(uint newTxByte) +{ + + if (!m_sspstat || !m_sspcon) + return; + uint sspstat_val = m_sspstat->value.get(); + uint sspcon_val = m_sspcon->value.get(); + + if (m_sspcon2 && (sspcon_val & _SSPCON::SSPM_mask) == _SSPCON::SSPM_MSSPI2Cmaster) + { + if (isIdle()) + { + m_sspstat->put_value(sspstat_val | _SSPSTAT::BF | _SSPSTAT::RW); + m_SSPsr = newTxByte; + m_sspmod->setSDA((m_SSPsr & 0x80) == 0x80); + bits_transfered = 0; + phase = 0; + i2c_state = CLK_TX_BYTE; + I2Cproto(("%s i2c_state = CLK_TX_BYTE data %x\n", __FUNCTION__, newTxByte)); + setBRG(); + } + else + { + cout << "I2C::newSSPBUF I2C not idle on write data=" << hex << + newTxByte << endl; + // Collision + m_sspcon->setWCOL(); + } + } + else + { + if (sspstat_val & _SSPSTAT::RW) + { + if (!(sspstat_val & _SSPSTAT::BF)) + { + m_SSPsr = newTxByte; + m_sspstat->put_value(sspstat_val | _SSPSTAT::BF); + m_sspmod->setSDA((m_SSPsr & 0x80) == 0x80); + bits_transfered = 0; + I2Cproto(("%s TX 0x%x\n", __FUNCTION__, newTxByte)); + } + else // Collision + { + cout << "I2C::newSSPBUF I2C not idle on write data=" << hex << + newTxByte << endl; + m_sspcon->setWCOL(); + } + } + else + cout << "I2C::newSSPBUF write SSPSTAT::RW not set\n"; + } +} +void I2C::sda(bool data_val) +{ + if ((i2c_state == CLK_TX_BYTE) || (i2c_state == CLK_RX_BYTE) || + (i2c_state == CLK_ACKEN) || (i2c_state == CLK_RSTART)) + { + return; + } + if (m_sspmod->get_SCL_State()) // Clock is high + { + uint stat_val = m_sspstat->value.get(); + uint sspm = (m_sspcon->value.get() & _SSPCON::SSPM_mask); + if (data_val) // Data going high - STOP + { + if (do_stop_sspif()) m_sspmod->set_sspif(); + stat_val = (stat_val & _SSPSTAT::BF) | _SSPSTAT::P; + if (! future_cycle && i2c_state != eIDLE) + set_idle(); + + I2Cproto(("I2C::sda got STOP i2c_state=%d\n", i2c_state)); + } + else // Data going low - START + { + I2Cproto(("I2C::sda got START i2c_state=%d\n", i2c_state)); + switch (i2c_state) + { + case CLK_STOP: + break; + + case CLK_START: + if (phase == 0) + { + uint64_t fc = get_cycles().get() + ((m_sspadd->get() &0x7f)/ 2) + 1; + + if (future_cycle) + { + phase++; + get_cycles().reassign_break(future_cycle, fc, this); + future_cycle = fc; + } + else + { + get_cycles().set_break(fc, this); + future_cycle = fc; + } + } + break; + + default: + I2Cproto(("%s i2c_state was %d now RX_CMD\n", __FUNCTION__, i2c_state)); + i2c_state = RX_CMD; + break; + } + stat_val = (stat_val & _SSPSTAT::BF) | _SSPSTAT::S; + bits_transfered = 0; + m_SSPsr = 0; + } + m_sspstat->put_value(stat_val); + + // interrupt ? + if (sspm == _SSPCON::SSPM_I2Cslave_7bitaddr_ints || + sspm == _SSPCON::SSPM_I2Cslave_10bitaddr_ints) + { + m_sspmod->set_sspif(); + } + } + else // clock low + { + if (i2c_state == CLK_STOP) + { +// setBRG(); + } + } +} +bool I2C::do_stop_sspif() +{ + return (false); +} +bool I2C_1::do_stop_sspif() +{ + return ( (m_sspcon3->value.get() &_SSP1CON3::PCIE)); +} +/* + master mode, begin reading a byte +*/ +void I2C::master_rx() +{ +// m_sspmod->setSCL(false); + m_sspmod->setSDA(true); // SDA controlled by slave + bits_transfered = 0; + m_SSPsr = 0; + i2c_state = CLK_RX_BYTE; + setBRG(); +} +/* + master, begin start sequence + SCL and SDA must be high, then force SDA low +*/ +void I2C::start_bit() +{ + + if (m_sspmod->get_SCL_State() && m_sspmod->get_SDI_State()) + { + + i2c_state = CLK_START; + I2Cproto(("%s i2c_state = CLK_START\n", __FUNCTION__)); + phase = 0; + setBRG(); + + } + else + { + I2Cproto(("%s i2c_state = CLK_START bus_collide\n", __FUNCTION__)); + bus_collide(); + } +} +/* + Master mode, begin rstart sequence + bring SDA and SCL high, then SDA low with SCL high (start) +*/ +void I2C::rstart_bit() +{ + i2c_state = CLK_RSTART; + I2Cproto(("%s i2c_state = CLK_RSTART\n", __FUNCTION__)); + phase = 0; + setBRG(); + m_sspmod->setSDA(false); +/*RRR + m_sspmod->setSCL(false); + + if (!m_sspmod->get_SCL_State()) + { + setBRG(); + m_sspmod->setSDA(true); + } + else + bus_collide(); +*/ + +} +/* + master, begin stop sequence + drop SDA (might cause start if SCL high) + when SCL high, raise SDA (stop condition) + +*/ +void I2C::stop_bit() +{ + i2c_state = CLK_STOP; + I2Cproto(("%s i2c_state = CLK_STOP\n", __FUNCTION__)); + phase = 0; + + // Make sure SDA is low + m_sspmod->setSDA(false); + + + if (!m_sspmod->get_SDI_State()) + { + setBRG(); + } + else + bus_collide(); + +} + +/* + master, begin ack sequence + clock SCL low, set SDA as per ACKDT, + clock SCL high +*/ +void I2C::ack_bit() +{ + i2c_state = CLK_ACKEN; + I2Cproto(("%s i2c_state = CLK_ACKEN\n", __FUNCTION__)); + phase = 0; + m_sspmod->setSCL(false); + if (!m_sspmod->get_SCL_State()) + { + setBRG(); + m_sspmod->setSDA((m_sspcon2->value.get() & _SSPCON2::ACKDT) ? true : false); + } + else + bus_collide(); + + +} +void SSP_MODULE::initialize( + PIR_SET *ps, + PinModule *SckPin, + PinModule *SsPin, + PinModule *SdoPin, + PinModule *SdiPin, + PicTrisRegister *_i2ctris, + SSP_TYPE _ssptype + ) +{ + m_pirset = ps; + m_sck = SckPin; + m_ss = SsPin; + m_sdo = SdoPin; + m_sdi = SdiPin; + m_i2c_tris = _i2ctris; + m_ssptype = _ssptype; + if (! m_spi) + { + m_spi = new SPI(this, &sspcon, &sspstat, &sspbuf); + m_i2c = new I2C(this, &sspcon, &sspstat, &sspbuf, &sspcon2, &sspadd); + m_SDI_Sink = new SDI_SignalSink(this); + m_SCL_Sink = new SCL_SignalSink(this); + m_SS_Sink = new SS_SignalSink(this); + m_SckSource = new SCK_SignalSource(this, m_sck); + m_SdoSource = new SDO_SignalSource(this, m_sdo); + m_SdiSource = new SDI_SignalSource(this, m_sdi); + } + + +} +// this allows backward compatibility +void SSP_MODULE::set_sspif() +{ + if (m_ssp_if) m_ssp_if->Trigger(); + else m_pirset->set_sspif(); +} +// this allows backward compatibility +void SSP_MODULE::set_bclif() +{ + if (m_bcl_if) m_bcl_if->Trigger(); + else m_pirset->set_bclif(); +} +void SSP_MODULE::ckpSPI(uint value) +{ + if(m_spi && !m_spi->isIdle()) + cout << "SPI: You just changed CKP in the middle of a transfer." << endl; + + switch( value & _SSPCON::SSPM_mask ) { + case _SSPCON::SSPM_SPImaster4: + case _SSPCON::SSPM_SPImaster16: + case _SSPCON::SSPM_SPImaster64: + case _SSPCON::SSPM_SPImasterAdd: + if (m_SckSource) m_SckSource->putState( (value & _SSPCON::CKP) ? '1' : '0' ); + break; + case _SSPCON::SSPM_SPImasterTMR2: + break; + } +} + +/* + drive SCL by changing pin direction (with data low) +*/ +void SSP_MODULE::setSCL(bool direction) +{ + if (!m_sck || !m_i2c_tris) + return; + + uint pin = m_sck->getPinNumber(); + uint tris_val = m_i2c_tris->get_value(); + if (!direction) + tris_val &= ~(1<put(tris_val); +} +/* + drive SDA by changing pin direction (with data low) +*/ +void SSP_MODULE::setSDA(bool direction) +{ + uint pin = m_sdi->getPinNumber(); + uint tris_val = m_i2c_tris->get_value(); + if (!direction) + tris_val &= ~(1<put(tris_val); +} +/* + deactivate SPI and I2C mode +*/ +void SSP_MODULE::stopSSP(uint old_value) +{ + if (sspcon.isSPIActive(old_value)) + { + m_spi->stop_transfer(); + m_sck->setSource(0); + m_sdo->setSource(0); + } + else if (sspcon.isI2CActive(old_value)) + { + m_i2c->set_idle(); + m_sck->setSource(0); + m_sdi->setSource(0); + m_sck_active = false; + m_sdi_active = false; + } +} +void SSP_MODULE::putStateSDO(char _state) +{ + m_SdoSource->putState(_state); +} +void SSP_MODULE::putStateSCK(char _state) +{ + m_SckSource->putState(_state); +} +/* + activate SPI module +*/ +void SSP_MODULE::startSSP(uint value) +{ + Dprintf(("SSP_MODULE cmd %x\n", value & _SSPCON::SSPM_mask )); + SPIproto(("SSP_MODULE cmd %x\n", value & _SSPCON::SSPM_mask )); + sspbuf.setFullFlag(false); + if (! m_sink_set) + { + if (m_sdi) + { + m_sdi->addSink(m_SDI_Sink); + m_SDI_State = m_sdi->getPin().getState(); + } + if (m_sck) + { + m_sck->addSink(m_SCL_Sink); + m_SCL_State = m_sck->getPin().getState(); + } + if (m_ss) + { + m_ss->addSink(m_SS_Sink); + m_SS_State = m_ss->getPin().getState(); + } + m_sink_set = true; + } + switch( value & _SSPCON::SSPM_mask ) + { + case _SSPCON::SSPM_SPImasterTMR2: + case _SSPCON::SSPM_SPImaster4: + case _SSPCON::SSPM_SPImaster16: + case _SSPCON::SSPM_SPImaster64: + case _SSPCON::SSPM_SPImasterAdd: + Dprintf(("SSP_MODULE case cmd %x\n", value & _SSPCON::SSPM_mask )); + if (m_sck) + { + m_sck->setSource(m_SckSource); + m_sck_active = true; + } + if (m_sdo) + { + m_sdo->setSource(m_SdoSource); + m_sdo_active = true; + } + if (m_SckSource) m_SckSource->putState( (value & _SSPCON::CKP) ? '1' : '0' ); + if (m_SdoSource) m_SdoSource->putState('0'); // BUG, required to put SDO in know state + break; + + case _SSPCON::SSPM_SPIslave: + case _SSPCON::SSPM_SPIslaveSS: + if (m_sdo) + { + m_sdo->setSource(m_SdoSource); + m_sdo_active = true; + } + if (m_SdoSource) m_SdoSource->putState('0'); // BUG, required to put SDO in know state + newSSPBUF(sspbuf.get_value()); + break; + + case _SSPCON::SSPM_I2Cslave_7bitaddr: + case _SSPCON::SSPM_I2Cslave_10bitaddr: + case _SSPCON::SSPM_MSSPI2Cmaster: + case _SSPCON::SSPM_I2Cfirmwaremaster: + case _SSPCON::SSPM_I2Cslave_7bitaddr_ints: + case _SSPCON::SSPM_I2Cslave_10bitaddr_ints: + + m_i2c->set_idle(); + m_sck->setSource(m_SckSource); + m_sdi->setSource(m_SdiSource); + m_sck_active = true; + m_sdi_active = true; + m_sck->refreshPinOnUpdate(true); + m_sdi->refreshPinOnUpdate(true); + m_SdiSource->putState('0'); + m_SckSource->putState('0'); + m_sck->refreshPinOnUpdate(false); + m_sdi->refreshPinOnUpdate(false); + break; + + case _SSPCON::SSPM_LoadMaskFunction: + break; + + default: + cout << "SSP: start, unexpected SSPM select bits SSPM=" + << hex << (value & _SSPCON::SSPM_mask) << endl;; + break; + } +} +/* + process mode change or clock edge due to write to SSPCON +*/ +void SSP_MODULE::changeSSP(uint new_value, uint old_value) +{ + uint diff = new_value ^ old_value; + + if (diff & _SSPCON::SSPM_mask) // mode changed + { + Dprintf(("SSP_MODULE stop %x start %x\n", old_value, new_value)); + stopSSP(old_value); + startSSP(new_value); + } + else if (diff & _SSPCON::CKP) + { + if (sspcon.isSPIActive(new_value)) + ckpSPI(new_value); + else if (sspcon.isI2CActive(new_value) && new_value & _SSPCON::CKP) + { + setSCL(true); + } + } +} + +void SSP_MODULE::releaseSDIpin() +{ + m_sdi_active = false; +} + +void SSP_MODULE::releaseSDOpin() +{ + m_sdo_active = false; +} +void SSP_MODULE::releaseSCKpin() +{ + m_sck_active = false; +} + + + + +void SSP_MODULE::releaseSCLpin() +{ + if (m_sck) + { + m_sck->setSource(0); + m_sck_active = false; + } + m_sck = 0; +} + + +void SSP_MODULE::releaseSSpin() +{ + if (m_SS_Sink) + { + delete m_SS_Sink; + m_SS_Sink = 0; + } + m_ss = 0; +} + +void SSP_MODULE::Sck_toggle() { m_SckSource->toggle();} +/* + process mode change or clock edge due to write to SSPCON +*/ +void SSP1_MODULE::changeSSP(uint new_value, uint old_value) +{ + uint diff = new_value ^ old_value; + + if (diff & _SSPCON::SSPM_mask) // mode changed + { + Dprintf(("SSP_MODULE stop %x start %x\n", old_value, new_value)); + stopSSP(old_value); + startSSP(new_value); + } + else if (diff & _SSPCON::CKP) + { + if (sspcon.isSPIActive(new_value)) + ckpSPI(new_value); + else if (sspcon.isI2CActive(new_value) && (new_value & _SSPCON::CKP)) + { + if(ssp1con3.value.get() & (_SSP1CON3::AHEN | _SSP1CON3::DHEN)) + { + // set ack(yes = 0) if writing and release clock + if ((sspstat.value.get() & _SSPSTAT::RW) == 0) + setSDA(sspcon2.value.get() & _SSPCON2::ACKDT); + setSCL(true); + } + else // RRRif(sspcon2.value.get() & _SSPCON2::SEN) + { + // release clock + setSCL(true); + } + } + } +} + +//------------------------------------------------------------ +// Called whenever the SDI/SDA input changes states. +// +void SSP_MODULE::SDI_SinkState(char new3State) +{ + bool new_SDI_State = (new3State == '1' || new3State == 'W'); + + if (new_SDI_State == m_SDI_State) + return; + + m_SDI_State = new_SDI_State; + + if(sspcon.isI2CActive(sspcon.value.get())) + { + if(m_i2c) m_i2c->sda(m_SDI_State); + } +} + +// Called when the SCK/SDI input changes state +void SSP_MODULE::SCL_SinkState(char new3State) +{ + bool new_SCL_State = (new3State == '1' || new3State == 'W'); + + SPIproto(("SCL_SinkState new %d old %d enabled %d m_SS_State %d\n", new_SCL_State, m_SCL_State, sspcon.isSSPEnabled(), m_SS_State)); + + if (new_SCL_State == m_SCL_State) + return; + + m_SCL_State = new_SCL_State; + + if (!sspcon.isSSPEnabled() ) + return; + + switch( sspcon.value.get() & _SSPCON::SSPM_mask ) + { + case _SSPCON::SSPM_SPIslaveSS: + /* + SS high during transfer for BSSP, suspends transfers which + continues when SS goes low. + + None BSSP interfaces handled when SS goes high + */ + if (m_SS_State) + return; // suspend transfer + // Fall through + case _SSPCON::SSPM_SPIslave: + if (m_spi) m_spi->clock(m_SCL_State); + break; + + case _SSPCON::SSPM_I2Cslave_7bitaddr: + case _SSPCON::SSPM_I2Cslave_10bitaddr: + case _SSPCON::SSPM_MSSPI2Cmaster: + case _SSPCON::SSPM_I2Cfirmwaremaster: + case _SSPCON::SSPM_I2Cslave_7bitaddr_ints: + case _SSPCON::SSPM_I2Cslave_10bitaddr_ints: + m_i2c->clock(m_SCL_State); + } + + +} +/* + on write to SSPBUF, pass on to either SPI or I2C if active +*/ +void SSP_MODULE::newSSPBUF(uint value) +{ + if (!m_spi) + { + cout << "Warning bug, SPI initialization error " << __FILE__ << ":" << dec << __LINE__<newSSPBUF(value); + else if(sspcon.isI2CActive(sspcon.value.get())) + m_i2c->newSSPBUF(value); +} + +/* + on write to SSPADD, pass onto I2C if active +*/ +void SSP_MODULE::newSSPADD(uint value) +{ + if(sspcon.isI2CActive(sspcon.value.get())) + m_i2c->newSSPADD(value); +} +// clear BF flag + +void SSP_MODULE::rdSSPBUF() +{ + sspstat.put_value(sspstat.value.get() & ~_SSPSTAT::BF); +} + +void SSP_MODULE::SS_SinkState(char new3State) +{ + m_SS_State = (new3State == '1' || new3State == 'W'); + + // If SS goes high in the middle of an SPI transfer while in slave_SS mode, + // transfer is aborted unless BSSP which streches the clocking + +#ifdef SPI_PROTO + + if (sspcon.isSSPEnabled() && + ((sspcon.value.get() & _SSPCON::SSPM_mask) == _SSPCON::SSPM_SPIslaveSS) + ) + { + SPIproto(("SS State change to %d\n", m_SS_State)); + } +#endif + if (!sspcon.isSSPEnabled() || + ! m_SS_State || + (sspcon.value.get() & _SSPCON::SSPM_mask) != _SSPCON::SSPM_SPIslaveSS || + ! m_spi->isIdle() || + ssp_type() == SSP_TYPE_BSSP) + return; + + m_spi->stop_transfer(); +} + +void SSP_MODULE::tmr2_clock() +{ + uint sspcon_val = sspcon.value.get(); + if (! (sspcon_val & _SSPCON::SSPEN) || + ((sspcon_val & _SSPCON::SSPM_mask) != _SSPCON::SSPM_SPImasterTMR2) || + (m_spi && m_spi->isIdle())) + return; + + Sck_toggle(); + if (m_spi) m_spi->clock( get_SCL_State() ); +} +/* + on write to SSPCON2 select master operation to initiate +*/ +void SSP_MODULE::newSSPCON2(uint value) +{ + if (!m_i2c) + return; + + if(value & _SSPCON2::SEN) + m_i2c->start_bit(); + else if(value & _SSPCON2::RSEN) + m_i2c->rstart_bit(); + else if (value & _SSPCON2::PEN) + m_i2c->stop_bit(); + else if (value & _SSPCON2::RCEN) + m_i2c->master_rx(); + else if (value & _SSPCON2::ACKEN) + m_i2c->ack_bit(); + + +} +/* + Process a received data byte + if BF == 0 and SSPOV == 0 return true otherwise false + if BF == 0 transfer data to SSPBUF and set BF + if BF == 1 set SSPOV + set SSPIF +*/ +bool SSP_MODULE::SaveSSPsr(uint value) +{ + bool ret = false; + uint stat_val = sspstat.value.get(); + uint con_val = sspcon.value.get(); + + if ((stat_val & _SSPSTAT::BF) == 0) + { + sspbuf.put_value(value); + sspstat.put_value(stat_val | _SSPSTAT::BF); + if ((con_val & _SSPCON::SSPOV) == 0) + ret = true; + } + else + { + sspcon.put_value(con_val | _SSPCON::SSPOV); + cout << "SSP receive overflow\n"; + } + + return(ret); +} +/* + Process a received data byte + if BF == 0 and SSPOV == 0 return true otherwise false + if BF == 0 transfer data to SSPBUF and set BF + if BF == 1 set SSPOV + set SSPIF +*/ +bool SSP1_MODULE::SaveSSPsr(uint value) +{ + bool ret = false; + uint stat_val = sspstat.value.get(); + uint con_val = sspcon.value.get(); + + if ((stat_val & _SSPSTAT::BF) == 0) + { + if ((con_val & _SSPCON::SSPOV) == 0 || + (isI2CSlave() && ssp1con3.value.get() & _SSP1CON3::BOEN)) + { + sspstat.put_value(stat_val | _SSPSTAT::BF); + sspbuf.put_value(value); + ret = true; + } + } + else + { + sspcon.put_value(con_val | _SSPCON::SSPOV); + cout << "SSP receive overflow\n"; + } + + return(ret); +} +//----------------------------------------------------------- +//------------------------------------------------------------------- +_SSPCON2::_SSPCON2(Processor *pCpu, SSP_MODULE *pSSP) + : sfr_register(pCpu, "sspcon2","Synchronous Serial Port Control"), + m_sspmod(pSSP) +{ +} + +/* + write to SSPCON2 without processing data +*/ +void _SSPCON2::put_value(uint new_value) +{ + value.put(new_value); +} +/* + If a command is currently active, + lower 5 bits of register cannot be changed + if no command is currently active, + activate command and write data +*/ +void _SSPCON2::put(uint new_value) +{ + uint old_value = value.get(); + uint diff = old_value ^ new_value; + uint mask = (ACKEN|RCEN|PEN|RSEN|SEN); + uint old_active; + + //Allow SEN to change unless I2CMaster (required for slave) + if (!m_sspmod->isI2CMaster()) mask &= ~SEN; + + old_active = old_value & mask; + + if (!diff) return; // nothing to do + + // if I2C not idle, do not change bits in mask + if (!m_sspmod->isI2CIdle() && (diff & mask)) + { + cout << "Warrning SSPCON::put I2C not idle and new value " + << hex << new_value << " changes one of following bits " + << mask << endl; + + put_value((new_value & ~mask) | old_active); + } + // Master and only a new command bit to process + else if (!old_active && m_sspmod->isI2CMaster()) + { + switch (new_value & (ACKEN|RCEN|PEN|RSEN|SEN)) + { + case ACKEN: + case RCEN: + case PEN: + case RSEN: + case SEN: + put_value(new_value); + m_sspmod->newSSPCON2(new_value); + break; + + case 0: // just write value + put_value(new_value); + break; + + default: + cout << "SSPCON2 cannot select more than one function at a time\n"; + break; + } + } + else + put_value(new_value); +} + +//----------------------------------------------------------- +//------------------------------------------------------------------- +_SSP1CON3::_SSP1CON3(Processor *pCpu, SSP1_MODULE *pSSP) + : sfr_register(pCpu, "ssp1con3","Synchronous Serial Port Control 3"), + m_sspmod(pSSP) +{ +} + +/* + write to SSP1CON3 without processing data +*/ +void _SSP1CON3::put_value(uint new_value) +{ + value.put(new_value); +} + +void _SSP1CON3::put(uint new_value) +{ + put_value(new_value & ~ACKTIM); // ACKTIM not writable by user +} diff --git a/src/gpsim/modules/ssp.h b/src/gpsim/modules/ssp.h new file mode 100644 index 0000000..ada70a1 --- /dev/null +++ b/src/gpsim/modules/ssp.h @@ -0,0 +1,502 @@ +/* + Copyright (C) 1998,1999 T. Scott Dattalo + 2006,2015 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +#include + + +class InvalidRegister; // Forward reference + + +#ifndef __SSP_H__ +#define __SSP_H__ + +#include "pic-processor.h" +#include "14bit-registers.h" +#include "ioports.h" +#include "pir.h" +#include "packages.h" +#include "apfcon.h" + +class PinModule; + +class PIR1; +class PIR_SET; +class _14bit_processor; +class PicTrisRegister; + +class _SSPBUF; +class _SSPSTAT; +class SDI_SignalSink; +class SCL_SignalSink; +class SS_SignalSink; +class SDO_SignalSource; +class SDI_SignalSource; +class SCK_SignalSource; + +enum SSP_TYPE { + SSP_TYPE_BSSP = 1, + SSP_TYPE_SSP, + SSP_TYPE_MSSP, + SSP_TYPE_MSSP1 +}; + +class SSP_MODULE; +class SSP1_MODULE; + +class _SSPCON : public sfr_register, public TriggerObject +{ + + +public: + + enum { + SSPM_SPImaster4 = 0x0, // SPI master mode, clock = FOSC/4 + SSPM_SPImaster16 = 0x1, // SPI master mode, clock = FOSC/16 + SSPM_SPImaster64 = 0x2, // SPI master mode, clock = FOSC/64 + SSPM_SPImasterTMR2 = 0x3, // SPI master mode, clock = TMR2/2 + SSPM_SPIslaveSS = 0x4, // SPI slave mode, clock = SCK, /SS controlled + SSPM_SPIslave = 0x5, // SPI slave mode, clock = SCK, not /SS controlled + SSPM_SPImasterAdd = 0xa, // SPI master mode, clock = FOSC/4*(sspadd+1) + + SSPM_I2Cslave_7bitaddr = 0x6, + SSPM_I2Cslave_10bitaddr = 0x7, + SSPM_MSSPI2Cmaster = 0x8, + SSPM_LoadMaskFunction = 0x9, + SSPM_I2Cfirmwaremaster = 0xb, + SSPM_I2Cslave_7bitaddr_ints = 0xe, + SSPM_I2Cslave_10bitaddr_ints = 0xf, + + /* None of the documentation I have seen show these, but Scott? thought + they were the good name RRR + SSPM_I2Cfirmwaremultimaster_7bitaddr_ints = 0xe, + SSPM_I2Cfirmwaremaster_10bitaddr_ints = 0xf, + */ + }; + + + + _SSPCON(Processor *pCpu, SSP_MODULE *); + + // Register bit definitions + + enum { + SSPM0 = 1<<0, + SSPM1 = 1<<1, + SSPM2 = 1<<2, + SSPM3 = 1<<3, + CKP = 1<<4, + SSPEN = 1<<5, + SSPOV = 1<<6, + WCOL = 1<<7 + }; + + + static const uint SSPM_mask = (SSPM0|SSPM1|SSPM2|SSPM3); + + virtual void put(uint); + virtual void put_value(uint); + + bool isSSPEnabled() { return (value.get() & SSPEN) == SSPEN; } + bool isI2CActive(uint); + bool isI2CSlave(uint); + bool isI2CMaster(uint); + bool isSPIActive(uint); + + bool isSPIMaster(); + void setWCOL(); + void setSSPOV() { put_value(value.get() | SSPOV);} + void setSSPMODULE(SSP_MODULE *); + + +private: + SSP_MODULE *m_sspmod; + +}; +class _SSPCON2 : public sfr_register +{ + public: + + enum { + SEN = 1<<0, // Start or Stretch enable + RSEN = 1<<1, // Repeated Start + PEN = 1<<2, // Stop condition enable + RCEN = 1<<3, // Receive enable bit + ACKEN = 1<<4, // Acknowledge Sequence enable bit + ACKDT = 1<<5, // Acknowledge Data bit + ACKSTAT = 1<<6, // Acknowledge status bit + GCEN = 1<<7 // General call enable + }; + + void put(uint new_value); + void put_value(uint new_value); + _SSPCON2(Processor *pCpu, SSP_MODULE *); + +private: + SSP_MODULE *m_sspmod; +}; + +class _SSP1CON3 : public sfr_register +{ + public: + + enum { + DHEN = 1<<0, // Data hold enable + AHEN = 1<<1, // Address hold enable + SBCDE = 1<<2, // Slave Mode Bus Collision Detect Enable bit + SDAHT = 1<<3, // SDA Hold Time Selection bit + BOEN = 1<<4, // Buffer Overwrite Enable bit + SCIE = 1<<5, // Start Condition Interrupt Enable bit + PCIE = 1<<6, // Stop Condition Interrupt Enable bit + ACKTIM = 1<<7 // Acknowledge Time Status bit + }; + + void put(uint new_value); + void put_value(uint new_value); + _SSP1CON3(Processor *pCpu, SSP1_MODULE *); + +private: + SSP1_MODULE *m_sspmod; +}; + +class _SSPSTAT : public sfr_register +{ + public: + + // Register bit definitions + + enum { + BF = 1<<0, // Buffer Full + UA = 1<<1, // Update Address + RW = 1<<2, // Read/Write info + S = 1<<3, // Start bit (I2C mode) + P = 1<<4, // Stop bit (I2C mode) + DA = 1<<5, // Data/Address bit (I2C mode) + + // below are SSP and MSSP only. This class will force them to + // always be 0 if ssptype == SSP_TYPE_BSSP. This will give the + // corrent behavior. + CKE = 1<<6, // SPI clock edge select + SMP = 1<<7 // SPI data input sample phase + }; + + _SSPSTAT(Processor *pCpu, SSP_MODULE *); + + virtual void put(uint new_value); + virtual void put_value(uint new_value); + +private: + SSP_MODULE *m_sspmod; +}; + + +class _SSPBUF : public sfr_register +{ +public: + + SSP_TYPE ssptype; + + _SSPBUF(Processor *pCpu, SSP_MODULE *); + + + virtual void put(uint new_value); + virtual void put_value(uint new_value); + virtual uint get(); + virtual uint get_value(); + + bool isFull() { return m_bIsFull; } + void setFullFlag(bool bNewFull) { m_bIsFull = bNewFull; } +private: + SSP_MODULE *m_sspmod; + bool m_bIsFull; +}; + +class _SSPMSK : public sfr_register +{ + public: + _SSPMSK(Processor *pCpu, const char *_name); + + virtual void put(uint new_value); +}; + +class _SSPADD : public sfr_register +{ + public: + _SSPADD(Processor *pCpu, SSP_MODULE *); + + virtual void put(uint new_value); + virtual void put_value(uint new_value); + virtual uint get(); +private: + SSP_MODULE *m_sspmod; +}; + + +class SPI: public TriggerObject +{ + public: + SSP_MODULE *m_sspmod; + _SSPBUF *m_sspbuf; + _SSPCON *m_sspcon; + _SSPSTAT *m_sspstat; + + SPI(SSP_MODULE *, _SSPCON *, _SSPSTAT *, _SSPBUF *); + bool isIdle() { return m_state==eIDLE;} + virtual void clock(bool); + virtual void start_transfer(); + virtual void stop_transfer(); + virtual void set_halfclock_break(); + virtual void callback(); + void newSSPBUF(uint); + virtual void startSPI(); + + +protected: + uint m_SSPsr; // internal Shift Register + enum SSPStateMachine { + eIDLE, + eACTIVE, + eWAITING_FOR_LAST_SMP + } m_state; + + + int bits_transfered; + Processor *cpu; +}; + +class SPI_1: public SPI +{ + public: + + _SSP1CON3 *m_ssp1con3; + _SSPADD *m_sspadd; + + SPI_1(SSP1_MODULE *, _SSPCON *, _SSPSTAT *, _SSPBUF *, _SSP1CON3 *, _SSPADD *); + virtual void stop_transfer(); + virtual void set_halfclock_break(); +}; + +class I2C: public TriggerObject +{ + public: + SSP_MODULE *m_sspmod; + _SSPBUF *m_sspbuf; + _SSPCON *m_sspcon; + _SSPSTAT *m_sspstat; + _SSPCON2 *m_sspcon2; + _SSPADD *m_sspadd; + + I2C(SSP_MODULE *, _SSPCON *, _SSPSTAT *, _SSPBUF *, _SSPCON2 *, _SSPADD *); + virtual void clock(bool); + virtual void sda(bool); + virtual void callback(); + virtual void set_idle(); + virtual void newSSPBUF(uint value); + virtual void newSSPADD(uint value); + virtual void start_bit(); + virtual void rstart_bit(); + virtual void stop_bit(); + virtual void master_rx(); + virtual void ack_bit(); + virtual bool isIdle(); + virtual void setBRG(); + virtual void clrBRG(); + virtual bool rx_byte(); + virtual void bus_collide(); + virtual void slave_command(); + virtual bool end_ack(); + virtual bool match_address(uint sspsr); + virtual bool do_stop_sspif(); + bool scl_clock_high(); + bool scl_neg_tran(); + bool scl_pos_tran(); + bool scl_clock_low(); + + +protected: + uint m_SSPsr; // internal Shift Register + + enum I2CStateMachine { + eIDLE, + RX_CMD, + RX_CMD2, + RX_DATA, + TX_DATA, + CLK_TX_BYTE, + CLK_RX_BYTE, + CLK_ACKEN, + CLK_RSTART, + CLK_STOP, + CLK_START, + CLK_RX_ACK + } i2c_state; + + + int bits_transfered; + int phase; + uint64_t future_cycle; + Processor *cpu; +}; + +class I2C_1: public I2C +{ + public: + SSP_MODULE *m_sspmod; + _SSP1CON3 *m_sspcon3; + + + virtual void clock(bool); + virtual void bus_collide(); + virtual bool do_stop_sspif(); + + + I2C_1(SSP_MODULE *, _SSPCON *, _SSPSTAT *, _SSPBUF *, _SSPCON2 *, _SSPADD *, _SSP1CON3 *); +}; +class SSP_MODULE +{ + public: + _SSPBUF sspbuf; + _SSPCON sspcon; + _SSPSTAT sspstat; + _SSPCON2 sspcon2; // MSSP + + // set to NULL for BSSP (It doesn't have this register) + _SSPADD sspadd; + _SSPMSK *sspmsk; + + SSP_MODULE(Processor *); + virtual ~SSP_MODULE(); + + virtual void initialize(PIR_SET *ps, + PinModule *_SckPin, + PinModule *_SdiPin, + PinModule *_SdoPin, + PinModule *_SsPin, + PicTrisRegister *_i2ctris, + SSP_TYPE ssptype = SSP_TYPE_BSSP); + + + + virtual void SDI_SinkState(char); + virtual void SS_SinkState(char); + virtual void SCL_SinkState(char); + virtual bool get_SDI_State() { return m_SDI_State;} + virtual bool get_SCL_State() { return m_SCL_State;} + virtual bool get_SS_State() { return m_SS_State;} + virtual void Sck_toggle(); + virtual void putStateSDO(char _state); + virtual void putStateSCK(char _state); + virtual void mk_ssp_int(PIR *reg, uint bit) + { m_ssp_if = new InterruptSource(reg, bit);} + virtual void mk_bcl_int(PIR *reg, uint bit) + { m_bcl_if = new InterruptSource(reg, bit);} + virtual void set_sspif(); + virtual void set_bclif(); + virtual void startSSP(uint value); + virtual void stopSSP(uint value); + virtual void changeSSP(uint new_value, uint old_value); + virtual void ckpSPI(uint value); + virtual void newSSPBUF(uint value); + virtual void newSSPADD(uint value); + virtual void newSSPCON2(uint value); + virtual void rdSSPBUF(); + virtual void tmr2_clock(); + virtual SSP_TYPE ssp_type() { return m_ssptype; } + virtual void setSCL(bool); + virtual void setSDA(bool); + virtual bool SaveSSPsr(uint value); + virtual bool isI2CIdle() { return m_i2c->isIdle();} + virtual bool isI2CMaster() { return sspcon.isI2CMaster(sspcon.value.get());} + virtual bool isI2CSlave() { return sspcon.isI2CSlave(sspcon.value.get());} + virtual void releaseSDIpin(); + virtual void releaseSDOpin(); + virtual void releaseSCLpin(); + virtual void releaseSSpin(); + virtual void releaseSCKpin(); + + Processor *cpu; +protected: + InterruptSource *m_ssp_if; + InterruptSource *m_bcl_if; + PIR_SET *m_pirset; + SPI *m_spi; + I2C *m_i2c; + PinModule *m_sck; + PinModule *m_ss; + PinModule *m_sdo; + PinModule *m_sdi; + PicTrisRegister *m_i2c_tris; + SSP_TYPE m_ssptype; + + bool m_SDI_State; + bool m_SCL_State; + bool m_SS_State; + + SCK_SignalSource *m_SckSource; + SDO_SignalSource *m_SdoSource; + SDI_SignalSource *m_SdiSource; + SDI_SignalSink *m_SDI_Sink; + SCL_SignalSink *m_SCL_Sink; + SS_SignalSink *m_SS_Sink; + bool m_sink_set; + bool m_sdo_active; + bool m_sdi_active; + bool m_sck_active; +}; + +class SSP1_MODULE : public SSP_MODULE, public apfpin //MSSP1 +{ + public: + SSP1_MODULE(Processor *); + ~SSP1_MODULE(); + + enum { + SCK_PIN = 0, + SDI_PIN, + SDO_PIN, + SS_PIN, + }; + + _SSP1CON3 ssp1con3; + + virtual void initialize(PIR_SET *ps, + PinModule *_SckPin, + PinModule *_SdiPin, + PinModule *_SdoPin, + PinModule *_SsPin, + PicTrisRegister *_i2ctris, + SSP_TYPE ssptype = SSP_TYPE_MSSP1); + + void setIOpin( int data, PinModule *pin ); + void set_sckPin( PinModule *_sckPin ); + void set_sdiPin( PinModule *_sdiPin ); + void set_sdoPin( PinModule *_sdoPin ); + PinModule *get_sdoPin() { return m_sdo;} + void set_ssPin( PinModule *_ssPin); + void set_tris( PicTrisRegister *_i2ctris ) { m_i2c_tris = _i2ctris;} + virtual void changeSSP( uint new_value, uint old_value ); + virtual bool SaveSSPsr( uint value ); +}; +#endif // __SSP_H__ diff --git a/src/gpsim/modules/tmr0.cc b/src/gpsim/modules/tmr0.cc new file mode 100644 index 0000000..8227e08 --- /dev/null +++ b/src/gpsim/modules/tmr0.cc @@ -0,0 +1,450 @@ +/* + Copyright (C) 1998 Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include +#include +#include +#include +#include + +#include "config.h" +#include "14bit-processors.h" +#include "14bit-tmrs.h" +#include "stimuli.h" +#include "a2dconverter.h" +#include "clc.h" + + +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("%s:%d-%s() ",__FILE__,__LINE__,__FUNCTION__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +//-------------------------------------------------- +// member functions for the TMR0 base class +//-------------------------------------------------- +TMR0::TMR0(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc), + prescale(1), prescale_counter(0), old_option(0), + state(STOPPED), synchronized_cycle(0), + future_cycle(0), last_cycle(0), + m_pOptionReg(0), m_t1gcon(0), m_adcon2(0), + m_bLastClockedState(false), t0xcs(false) +{ + value.put(0); + + new_name("tmr0"); + for (int i = 0; i < 4; i++) + m_clc[i] = 0; +} + +//------------------------------------------------------------------------ +void TMR0::release() +{ +} +//------------------------------------------------------------------------ +// setSinkState +// +// Called when the I/O pin driving TMR0 changes states. + +void TMR0::setSinkState(char new3State) +{ + bool bNewState = new3State == '1'; + + if (m_bLastClockedState != bNewState) { + m_bLastClockedState = bNewState; + + if (get_t0cs() && !get_t0xcs() && bNewState != get_t0se()) + increment(); + } +} + +void TMR0::set_cpu(Processor *new_cpu, PortRegister *reg, uint pin, OPTION_REG *pOption) +{ + cpu = new_cpu; + m_pOptionReg = pOption; + reg->addSink(this,pin); +} + +// RCP - add an alternate way to connect to a CPU +void TMR0::set_cpu(Processor *new_cpu, PinModule *pin,OPTION_REG *pOption) +{ + cpu = new_cpu; + m_pOptionReg = pOption; + pin->addSink(this); +} + +//------------------------------------------------------------ +// Stop the tmr. +// +void TMR0::stop() +{ + + Dprintf(("\n")); + + // If tmr0 is running, then stop it: + if (state & RUNNING) { + + // refresh the current value. + get_value(); + + state &= (~RUNNING); // the timer is disabled. + clear_trigger(); + + } +} + +void TMR0::start(int restart_value, int sync) +{ + + Dprintf(("restart_value=%d(0x%x) sync=%d\n",restart_value, restart_value, sync)); + + state |= RUNNING; // the timer is on + + value.put(restart_value&0xff); + + //old_option = cpu_pic->option_reg.value.get(); + old_option = m_pOptionReg->get_value(); + + prescale = 1 << get_prescale(); + prescale_counter = prescale; + + if(get_t0cs()) { + Dprintf(("External clock\n")); + + } + else + { + synchronized_cycle = get_cycles().get() + sync; + + last_cycle = (restart_value % max_counts()) * prescale; + last_cycle = synchronized_cycle - last_cycle; + + uint64_t fc = last_cycle + max_counts() * prescale; + + if(future_cycle) get_cycles().reassign_break(future_cycle, fc, this); + else get_cycles().set_break(fc, this); + + future_cycle = fc; + + Dprintf(("last_cycle:0x%" PRINTF_GINT64_MODIFIER "x future_cycle:0x%" PRINTF_GINT64_MODIFIER "x\n",last_cycle,future_cycle)); + } +} + +void TMR0::clear_trigger() +{ + Dprintf(("\n")); + + if (future_cycle) { + future_cycle = 0; + get_cycles().clear_break(this); + } + last_cycle = 0; +} + +uint TMR0::get_prescale() +{ + Dprintf(("OPTION::PSA=%u\n", m_pOptionReg->get_psa())); + + //return (cpu_pic->option_reg.get_psa() ? 0 : (1+cpu_pic->option_reg.get_prescale())); + return (m_pOptionReg->get_psa() ? 0 : (1+m_pOptionReg->get_prescale())); +} + +// This is used to drive timer ias counter of IO port if T0CS is true +// +void TMR0::increment() +{ + Dprintf(("\n")); + + if((state & RUNNING) == 0) + return; + + if(--prescale_counter == 0) + { + prescale_counter = prescale; + if(value.get() >= (max_counts()-1)) + { + //cout << "TMR0 rollover because of external clock "; + value.put(0); + set_t0if(); + + } + else + value.put(value.get() + 1); + } + // cout << "TMR0 value ="<= (int)max_counts()) + { + cout << "TMR0: bug TMR0 is larger than " << max_counts() - 1 << "...\n"; + cout << "cycles.value = " << get_cycles().get() << + " last_cycle = " << last_cycle << + " prescale = " << prescale << + " calculated value = " << new_value << '\n'; + + // cop out. tmr0 has a bug. So rather than annoy + // the user with an infinite number of messages, + // let's just go ahead and reset the logic. + new_value &= 0xff; + last_cycle = new_value*prescale; + last_cycle = get_cycles().get() - last_cycle; + synchronized_cycle = last_cycle; + } + + value.put(new_value); + return(value.get()); + +} + +uint TMR0::get() +{ + value.put(get_value()); + return value.get(); +} +void TMR0::new_prescale() +{ + Dprintf(("\n")); + + uint new_value; + + int option_diff = old_option ^ m_pOptionReg->get_value(); + + old_option ^= option_diff; // save old option value. ( (a^b) ^b = a) + + if(option_diff & OPTION_REG::T0CS) + { + // TMR0's clock source has changed. + + if(m_pOptionReg->get_t0cs()) + { + // External clock + if (future_cycle) + { + future_cycle = 0; + get_cycles().clear_break(this); + } + } + start(value.get()); + + } + else + { + // Refresh the current tmr0 value. The current tmr0 value is used + // below to recompute the value for 'last_cycle' + get_value(); + + if(get_t0cs() || ((state & RUNNING)==0)) + { + prescale = 1 << get_prescale(); + prescale_counter = prescale; + } + else + { + if(last_cycle < (int64_t)get_cycles().get()) + new_value = (uint)((get_cycles().get() - last_cycle)/prescale); + else + new_value = 0; + + if(new_value>=max_counts()) + { + cout << "TMR0 bug (new_prescale): exceeded max count"<< max_counts() <<'\n'; + cout << " last_cycle = 0x" << hex << last_cycle << endl; + cout << " cpu cycle = 0x" << hex << (get_cycles().get()) << endl; + + cout << " prescale = 0x" << hex << prescale << endl; + } + // Get the current value of TMR0 + // cout << "cycles " << cycles.value << " old prescale " << prescale; + + prescale = 1 << get_prescale(); + prescale_counter = prescale; + + last_cycle = value.get() * prescale; + last_cycle = get_cycles().get() - last_cycle; + synchronized_cycle = last_cycle; + + uint64_t fc = last_cycle + max_counts() * prescale; + + get_cycles().reassign_break(future_cycle, fc, this); + + future_cycle = fc; + } + } +} + +bool TMR0::get_t0cs() +{ + + //return cpu_pic->option_reg.get_t0cs() != 0; + return m_pOptionReg->get_t0cs() != 0; +} +bool TMR0::get_t0se() +{ + //return cpu_pic->option_reg.get_t0se() != 0; + return m_pOptionReg->get_t0se() != 0; +} + +void TMR0::set_t0if() +{ + if(cpu_pic->base_isa() == _14BIT_PROCESSOR_ || + cpu_pic->base_isa() == _14BIT_E_PROCESSOR_) + { + cpu14->intcon->set_t0if(); + } + if (m_t1gcon) + { + m_t1gcon->T0_gate(true); + // Spec sheet does not indicate when the overflow signal + // is cleared, so I am assuming it is just a pulse. RRR + m_t1gcon->T0_gate(false); + } + if (m_adcon2) m_adcon2->t0_overflow(); + + for(int i =0; i < 4; i++) + if (m_clc[i]) m_clc[i]->t0_overflow(); +} + +void TMR0::set_clc( CLC *_clc, int index ) +{ + qDebug()<<"TMR0::set_clc"<. +*/ + +#ifndef __TMR0_H__ +#define __TMR0_H__ + +#include "ioports.h" + +class T1GCON; +class ADCON2_TRIG; +class CLC; + +//--------------------------------------------------------- +// TMR0 - Timer +class TMR0 : public sfr_register, public TriggerObject, public SignalSink +{ +public: + uint + prescale, + prescale_counter, + old_option, // Save option register contents here. + state; // Either on or off right now. + uint64_t + synchronized_cycle, + future_cycle; + int64_t + last_cycle; // can be negative ... + + OPTION_REG *m_pOptionReg; + + + virtual void callback(); + + TMR0(Processor *, const char *pName, const char *pDesc=0); + + virtual void release(); + + virtual void put(uint new_value); + virtual void put_value(uint new_value); + virtual uint get(); + virtual uint get_value(); + virtual void start(int new_value,int sync=0); + virtual void stop(); + virtual void increment(); // Used when tmr0 is attached to an external clock + virtual void new_prescale(); + virtual uint get_prescale(); + virtual uint max_counts() {return 256;}; + virtual bool get_t0cs(); + virtual bool get_t0se(); + virtual void set_t0if(); + virtual void set_t0xcs(bool _t0xcs){t0xcs = _t0xcs;} + virtual bool get_t0xcs() {return t0xcs;} + virtual void reset(RESET_TYPE r); + virtual void callback_print(); + virtual void clear_trigger(); + + virtual void set_cpu(Processor *, PortRegister *, uint pin,OPTION_REG *); + virtual void set_cpu(Processor *new_cpu, PinModule *pin,OPTION_REG *); + virtual void setSinkState(char); + virtual void sleep(); + virtual void wake(); + void set_t1gcon(T1GCON *_t1gcon) { m_t1gcon = _t1gcon; } + void set_adcon2(ADCON2_TRIG *_adcon2) { m_adcon2 = _adcon2; } + void set_clc(CLC *_clc, int index); + + enum { + STOPPED = 0, + RUNNING = 1, + SLEEPING = 2 + }; + +protected: + T1GCON *m_t1gcon; + ADCON2_TRIG *m_adcon2; + CLC *m_clc[4]; + +private: + bool m_bLastClockedState; + bool t0xcs; // clock source is the capacitive sensing oscillator +}; + +#endif diff --git a/src/gpsim/modules/uart.cc b/src/gpsim/modules/uart.cc new file mode 100644 index 0000000..93a8d7b --- /dev/null +++ b/src/gpsim/modules/uart.cc @@ -0,0 +1,1626 @@ +/* + Copyright (C) 1998,1999 Scott Dattalo + Copyright (C) 2014 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + + +#include +#include + +#include "config.h" +#include "stimuli.h" +#include "uart.h" +#include "14bit-processors.h" +#include "14bit-tmrs.h" +#include "baseprocessor.h" + +#define p_cpu ((Processor *)cpu) + +// defining EUSART_PIN causes TX pin direction to be set for EUSART devices +//#define EUSART_PIN +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("%s:%d-%s() ",__FILE__,__LINE__,__FUNCTION__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +//-------------------------------------------------- +// +//-------------------------------------------------- +// Drive output for TX pin +class TXSignalSource : public SignalControl +{ + public: + TXSignalSource(_TXSTA *_txsta) : m_txsta(_txsta) + { + assert(m_txsta); + } + ~TXSignalSource() { } + + virtual char getState() { return m_txsta->getState(); } + virtual void release() { m_txsta->releasePin(); } + + private: + _TXSTA *m_txsta; +}; + +// Set TX pin to output +class TXSignalControl : public SignalControl +{ + public: + TXSignalControl(_TXSTA *_txsta) : m_txsta(_txsta) { } + ~TXSignalControl() { } + + virtual char getState() { return '0'; } + virtual void release() { m_txsta->releasePin(); } + + private: + _TXSTA *m_txsta; +}; + +// set Synchronous DT pin direction +class RCSignalControl : public SignalControl +{ + public: + RCSignalControl(_RCSTA *_rcsta) : m_rcsta(_rcsta) { } + ~RCSignalControl() { } + + virtual char getState() { return '0'; } + //virtual char getState() { return m_rcsta->getDir(); } + virtual void release() + { + m_rcsta->releasePin(); + } + + private: + _RCSTA *m_rcsta; +}; +// Drive date of DT pin when transmitting +class RCSignalSource : public SignalControl +{ + public: + RCSignalSource(_RCSTA *_rcsta) : m_rcsta(_rcsta) + { + assert(m_rcsta); + } + ~RCSignalSource() { } + virtual char getState() + { + return m_rcsta->getState(); + } + virtual void release() + { + m_rcsta->releasePin(); + } + + private: + _RCSTA *m_rcsta; +}; + +//-------------------------------------------------- +// +//-------------------------------------------------- + +// Report state changes on incoming RX pin +class RXSignalSink : public SignalSink +{ + public: + RXSignalSink(_RCSTA *_rcsta) : m_rcsta(_rcsta) + { + assert(_rcsta); + } + + virtual void setSinkState(char new3State) { m_rcsta->setState(new3State); } + virtual void release() {delete this; } + + private: + _RCSTA *m_rcsta; +}; + +//-------------------------------------------------- +// +//-------------------------------------------------- + +// Report state changes on incoming Clock pin for Synchronous slave mode +class CLKSignalSink : public SignalSink +{ + public: + CLKSignalSink(_RCSTA *_rcsta) : m_rcsta(_rcsta) + { assert(_rcsta); } + + virtual void setSinkState(char new3State) { m_rcsta->clock_edge(new3State); } + // virtual void release() { delete this; } + virtual void release() {delete this; } + + private: + _RCSTA *m_rcsta; +}; + +//----------------------------------------------------------- +_RCSTA::_RCSTA(Processor *pCpu, const char *pName, const char *pDesc, USART_MODULE *pUSART) + : sfr_register(pCpu, pName, pDesc), + rcreg(0), spbrg(0), + txsta(0), txreg(nullptr), sync_next_clock_edge_high(false), + rsr(0), bit_count(0), rx_bit(0), sample(0), + state(_RCSTA::RCSTA_DISABLED), sample_state(0), + future_cycle(0), last_cycle(0), + mUSART(pUSART), + m_PinModule(0), m_sink(0), m_cRxState('?'), + SourceActive(false), m_control(0), m_source(0), m_cTxState('\0'), + m_DTdirection('0'), bInvertPin(false), + old_clock_state(true) +{ + assert(mUSART); + dataInQueue = false; +} + +_RCSTA::~_RCSTA() +{ + if( SourceActive && m_PinModule ) + { + m_PinModule->setSource(0); + m_PinModule->setControl(0); + } + delete m_source; + delete m_control; +} + +//----------------------------------------------------------- +_TXSTA::_TXSTA(Processor *pCpu, const char *pName, const char *pDesc, USART_MODULE *pUSART) + : sfr_register(pCpu, pName, pDesc), txreg(0), spbrg(0), + mUSART(pUSART), + m_PinModule(0), + m_source(0), + m_control(0), + m_clkSink(0), + SourceActive(false), + m_cTxState('?'), + bInvertPin(0) +{ + assert(mUSART); +} + +_TXSTA::~_TXSTA() +{ + if (SourceActive && m_PinModule) + { + m_PinModule->setSource(0); + m_PinModule->setControl(0); + } + + if (m_control) + { + delete m_source; + delete m_control; + } +} + +//----------------------------------------------------------- +_RCREG::_RCREG(Processor *pCpu, const char *pName, const char *pDesc, USART_MODULE *pUSART) + : sfr_register(pCpu, pName, pDesc), fifo_sp(0), mUSART(pUSART), m_rcsta(0) +{ + assert(mUSART); +} + +_TXREG::_TXREG(Processor *pCpu, const char *pName, const char *pDesc, USART_MODULE *pUSART) + : sfr_register(pCpu, pName, pDesc), m_txsta(0), mUSART(pUSART) +{ + assert(mUSART); +} + +_BAUDCON::_BAUDCON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ +} + +_SPBRG::_SPBRG(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), + txsta(0), rcsta(0), brgh(0), baudcon(0), start_cycle(0), last_cycle(0), + future_cycle(0), running(false), skip(0) +{ +} + +_SPBRGH::_SPBRGH(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), m_spbrg(0) +{ +} + +//----------------------------------------------------------- +// TXREG - USART Transmit Register +// +// writing to this register causes the PIR1::TXIF bit to clear. +// my reading of the spec is this happens at the end of the next pic +// instruction. If the shift register is empty the bit will then be set +// one pic instruction later. Otherwise the bit is set when the shift +// register empties. RRR 10/2014 + + +void _TXREG::put(uint new_value) +{ + value.put(new_value & 0xff); + + assert(m_txsta); + assert(m_rcsta); + + // The transmit register has data, + // so clear the TXIF flag + + full = true; + get_cycles().set_break(get_cycles().get() + 1, this); + + if(m_txsta->bTRMT() && m_txsta->bTXEN()) + { + // If the transmit buffer is empty and the transmitter is enabled + // then transmit this new data now... + + get_cycles().set_break(get_cycles().get() + 2, this); + + if (m_txsta->bSYNC()) m_rcsta->sync_start_transmitting(); + else m_txsta->start_transmitting(); + } + else if(m_txsta->bTRMT() && m_txsta->bSYNC()) + { + m_txsta->value.put(m_txsta->value.get() & ~ _TXSTA::TRMT); + } + BaseProcessor::self()->uartOut( new_value ); +} + +void _TXREG::put_value(uint new_value) +{ + put(new_value); + update(); +} + +void _TXREG::callback() +{ + Dprintf(("TXREG callback - time:%" PRINTF_GINT64_MODIFIER "x full %d\n",get_cycles().get(), full)); + if (full) + { + mUSART->full(); + full = false; + } + else mUSART->emptyTX(); + +} +void _TXREG::callback_print() +{ + cout << "TXREG " << name() << " CallBack ID " << CallBackID << '\n'; +} + +//----------------------------------------------------------- +// TXSTA - setIOpin - assign the I/O pin associated with the +// the transmitter. + +void _TXSTA::setIOpin(PinModule *newPinModule) +{ + if (!m_source) + { + m_source = new TXSignalSource(this); + m_control = new TXSignalControl(this); + } + else if (m_PinModule) // disconnect old pin + { + disableTXPin(); + } + m_PinModule = newPinModule; + if(bTXEN() && rcsta->bSPEN()) + { + enableTXPin(); + } +} + +void _TXSTA::disableTXPin() +{ + if (m_PinModule) + { + m_PinModule->setSource(0); + m_PinModule->setControl(0); + + if (m_clkSink) + { + m_PinModule->removeSink(m_clkSink); + m_clkSink->release(); + m_clkSink = 0; + } + } +} +void _TXSTA::enableTXPin() +{ + char out; + assert(m_PinModule); + + if (m_PinModule && !SourceActive) + { + if (bSYNC()) + { + out = '0'; + if (!bCSRC()) // slave clock + { + if (!m_clkSink) + { + m_clkSink = new CLKSignalSink(rcsta); + m_PinModule->addSink(m_clkSink); + rcsta->set_old_clock_state(m_PinModule->getPin().getState()); + } + mUSART->emptyTX(); + return; + } + } + else out = '1'; + + m_PinModule->setSource(m_source); +#ifdef EUSART_PIN + if(mUSART->IsEUSART()) m_PinModule->setControl(m_control); +#else + m_PinModule->setControl(m_control); +#endif + putTXState(out); + SourceActive = true; + } + mUSART->emptyTX(); +} + +void _TXSTA::releasePin() +{ + if (m_PinModule && SourceActive) + { + m_PinModule->setControl(0); + SourceActive = false; + } +} +//----------------------------------------------------------- +// TXSTA - putTXState - update the state of the TX output pin +// + +void _TXSTA::putTXState(char newTXState) +{ + m_cTxState = bInvertPin ? newTXState ^ 1 : newTXState; + + if (m_PinModule) m_PinModule->updatePinModule(); +} + +//----------------------------------------------------------- +// TXSTA - Transmit Register Status and Control + +void _TXSTA::put_value(uint new_value) +{ + put(new_value); + update(); +} + +void _TXSTA::put(uint new_value) +{ + uint old_value = value.get(); + + if ( ! mUSART->IsEUSART() ) new_value &= ~SENDB; // send break only supported on EUSART + + // The TRMT bit is controlled entirely by hardware. + // It is high if the TSR has any data. + + //RRRvalue.put((new_value & ~TRMT) | ( (bit_count) ? 0 : TRMT)); + value.put((new_value & ~TRMT) | (old_value & TRMT)); + + if( (old_value ^ value.get()) & TXEN) + { + // The TXEN bit has changed states. + // + // If transmitter is being enabled and the transmit register + // has some data that needs to be sent, then start a + // transmission. + // If the transmitter is being disabled, then abort any + // transmission. + + if(value.get() & TXEN) + { + if (rcsta->bSPEN()) + { + if (bSYNC() && ! bTRMT() && !rcsta->bSREN() && !rcsta->bCREN()) + { + // need to check bTRMT before calling enableTXPin + enableTXPin(); + rcsta->sync_start_transmitting(); + } + else enableTXPin(); + } + } + else + { + stop_transmitting(); + mUSART->full(); // Turn off TXIF + disableTXPin(); + + } + } +} +//------------------------------------------------------------ +// +char _TXSTA::getState() +{ + return m_cTxState; +} + +// _TXSTA::stop_transmitting() +// +void _TXSTA::stop_transmitting() +{ + Dprintf(("stopping a USART transmission\n")); + + bit_count = 0; + value.put(value.get() | TRMT); + + // It's not clear from the documentation as to what happens + // to the TXIF when we are aborting a transmission. According + // to the documentation, the TXIF is set when the TXEN bit + // is set. In other words, when the Transmitter is enabled + // the txreg is emptied (and hence TXIF set). But what happens + // when TXEN is cleared? Should we clear TXIF too? + // + // There is one sentence that says when the transmitter is + // disabled that the whole transmitter is reset. So I interpret + // this to mean that the TXIF gets cleared. I could be wrong + // (and I don't have a way to test it on a real device). + // + // Another interpretation is that TXIF retains it state + // through changing TXEN. However, when SPEN (serial port) is + // set then the whole usart is reinitialized and TXIF will + // get set. + // + // txreg->full(); // Clear TXIF +} + +void _TXSTA::start_transmitting() +{ + Dprintf(("starting a USART transmission\n")); + + // Build the serial byte that's about to be transmitted. + // I doubt the pic really does this way, but gpsim builds + // the entire bit stream including the start bit, 8 data + // bits, optional 9th data bit and the stop, and places + // this into the tsr register. But since the contents of + // the tsr are inaccessible, I guess we'll never know. + // + // (BTW, if you look carefully you may puzzle over why + // there appear to be 2 stop bits in the packet built + // below. Well, it's because the way gpsim implements + // the transmit logic. The second stop bit doesn't + // actually get transmitted - it merely causes the first + // stop bit to get transmitted before the TRMT bit is set. + // + // RRR I believe the above paragraph is a mis-understanding + // The tsr register becomes empty, and the TRMT flag goes high, + // when we start to transmit the stop bit. Note that transmision + // is synchronous with the baud clock, so the start of transmision + // of a new character waits for the next callback. This delay maybe, + // in fact, the stop bit of the previous transmision, + // + // [Recall that the TRMT bit indicates when the tsr + // {transmit shift register} is empty. It's not tied to + // an interrupt pin, so the pic application software + // most poll this bit. + // + // RRR Also The following is wrong: + // This bit is set after the STOP + // bit is transmitted.] This is a cheap trick that saves + // one comparison in the callback code.) + + // The start bit, which is always low, occupies bit position + // zero. The next 8 bits come from the txreg. + assert(txreg); + if(!txreg) return; + + if (value.get() & SENDB) + { + transmit_break(); + return; + } + tsr = txreg->value.get() << 1; + + // Is this a 9-bit data transmission? + if(value.get() & TX9) + { + // Copy the stop bit and the 9th data bit to the tsr. + // (See note above for the reason why two stop bits + // are appended to the packet.) + + tsr |= ( (value.get() & TX9D) ? (3<<9) : (2<<9)); + bit_count = 11; // 1 start, 9 data, 1 stop + } + else + { + // The stop bit is always high. (See note above + // for the reason why two stop bits are appended to + // the packet.) + tsr |= (1<<9); + bit_count = 10; // 1 start, 8 data, 1 stop + } + + // Set a callback breakpoint at the next SPBRG edge + if(cpu) get_cycles().set_break(spbrg->get_cpu_cycle(1), this); + + // The TSR now has data, so clear the Transmit Shift + // Register Status bit. + value.put(value.get() & ~TRMT); +} + +void _TXSTA::transmit_break() +{ + // A sync-break is 13 consecutive low bits and one stop bit. Use the + // standard transmit logic to achieve this + + if(!txreg) return; + + tsr = 1<<13; + + bit_count = 14; // 13 break, 1 stop + + // The TSR now has data, so clear the Transmit Shift + // Register Status bit. + value.put(value.get() & ~TRMT); + + callback(); // sent start bit +} + +void _TXSTA::transmit_a_bit() +{ + if(bit_count) + { + putTXState((tsr & 1) ? '1' : '0'); + tsr >>= 1; + --bit_count; + } +} + +void _TXSTA::callback() +{ + + transmit_a_bit(); + + if(!bit_count) + { + value.put(value.get() & ~SENDB); + + // tsr is empty. + // If there is any more data in the TXREG, then move it to + // the tsr and continue transmitting other wise set the TRMT bit + + // (See the note above about the 'extra' stop bit that was stuffed + // into the tsr register. + + if(mUSART->bIsTXempty()) value.put(value.get() | TRMT); + else + { + start_transmitting(); + mUSART->emptyTX(); + } + } + else + { + // bit_count is non zero which means there is still + // data in the tsr that needs to be sent. + + if(cpu) get_cycles().set_break(spbrg->get_cpu_cycle(1),this); + } +} + +void _TXSTA::callback_print() +{ + cout << "TXSTA " << name() << " CallBack ID " << CallBackID << '\n'; +} + +//----------------------------------------------------------- +// Receiver portion of the USART +//----------------------------------------------------------- +// +// First RCSTA -- Receiver Control and Status +// The RCSTA class controls the usart reception. The PIC usarts have +// two modes: synchronous and asynchronous. +// Asynchronous reception: +// Asynchronous reception means that there is no external clock +// available for telling the usart when to sample the data. Sampling +// timing is all based upon the PIC's oscillator. The SPBRG divides +// this clock down to a frequency that's appropriate to the data +// being received. (e.g. 9600 baud defines the rate at which data +// will be sent to the pic - 9600 bits per second.) The start bit, +// which is a high to low transition on the receive line, defines +// when the usart should start sampling the incoming data. +// The pic usarts sample asynchronous data three times in "approximately +// the middle" of each bit. The data sheet is not exactly specific +// on what's the middle. Consequently, gpsim takes a stab/ educated +// guess on when these three samples are to be taken. Once the +// three samples are taken, then simple majority summing determines +// the sample e.g. if two out of three of the samples are high, then +// then the data bit is considered high. +// +//----------------------------------------------------------- +// RCSTA::put +// +void _RCSTA::put(uint new_value) +{ + uint diff; + uint readonly = value.get() & (RX9D | OERR | FERR); + + diff = new_value ^ value.get(); + + assert(txsta); + assert(txsta->txreg); + assert(rcreg); + // If SPEN being turned off, clear all readonly bits + if (diff & SPEN && !(new_value & SPEN)) + { + readonly = 0; + // clear receive stack (and rxif) + rcreg->pop(); + rcreg->pop(); + } + // if CREN is being cleared, make sure OERR is clear + else if (diff & CREN && !(new_value & CREN)) + readonly &= (RX9D | FERR); + value.put( readonly | (new_value & ~(RX9D | OERR | FERR))); + + if (!txsta->bSYNC()) // Asynchronous case + { + if (diff & (SPEN | CREN)) // RX status change + { + if ((value.get() & (SPEN | CREN)) == SPEN ) + { + if (txsta->bTXEN()) txsta->enableTXPin(); + spbrg->start(); + } + else if ((value.get() & (SPEN | CREN)) == (SPEN | CREN)) + { + enableRCPin(); + if (txsta->bTXEN()) txsta->enableTXPin(); + spbrg->start(); + start_receiving(); + // If the rx line is low, then go ahead and start receiving now. + if (m_cRxState == '0' || m_cRxState == 'w') + receive_start_bit(); + // Clear overrun error when turning on RX + value.put( value.get() & (~OERR) ); + } + else // RX off, check TX + { + stop_receiving(); + state = RCSTA_DISABLED; + + if (bSPEN()) // RX off but TX may still be active + { + if (txsta->bTXEN()) //TX output active + txsta->enableTXPin(); + else // TX off + txsta->disableTXPin(); + } + return; + } + } + } + else // synchronous case + { + if (diff & RX9) + { + if (bRX9()) + bit_count = 9; + else + bit_count = 8; + } + if (diff & (SPEN | CREN | SREN )) // RX status change + { + // Synchronous transmit (SREN & CREN == 0) + if ((value.get() & (SPEN | SREN | CREN)) == SPEN) + { + enableRCPin(DIR_OUT); + if (txsta->bTXEN()) txsta->enableTXPin(); + return; + } + // Synchronous receive (SREN | CREN != 0) + else if (value.get() & (SPEN)) + { + enableRCPin(DIR_IN); + txsta->enableTXPin(); + rsr = 0; + if (bRX9()) + bit_count = 9; + else + bit_count = 8; + if (txsta->bCSRC()) // Master mode + { + sync_next_clock_edge_high = true; + txsta->putTXState('0'); // clock low + callback(); + } + + return; + } + else // turn off UART + { + if (m_PinModule) + { + if (m_sink) + { + m_PinModule->removeSink(m_sink); + m_sink->release(); + m_sink = 0; + } + } + txsta->disableTXPin(); + } + } + } +} + +void _RCSTA::enableRCPin(char direction) +{ + if (m_PinModule) + { + if (txsta->bSYNC()) // Synchronous case + { + if (!m_source) + { + m_source = new RCSignalSource(this); + m_control = new RCSignalControl(this); + } + if (direction == DIR_OUT) + { + m_DTdirection = '0'; + if (SourceActive == false) + { + m_PinModule->setSource(m_source); + m_PinModule->setControl(m_control); + SourceActive = true; + } + putRCState('0'); + } + else + { + m_DTdirection = '1'; + if (SourceActive == true) + { + m_PinModule->setSource(0); + m_PinModule->setControl(0); + m_PinModule->updatePinModule(); + } + } + } + } +} +void _RCSTA::disableRCPin() +{ +} + +void _RCSTA::releasePin() +{ + if (m_PinModule && SourceActive) + { + m_PinModule->setControl(0); + SourceActive = false; + } +} +void _RCSTA::put_value(uint new_value) +{ + put(new_value); + update(); +} + +//----------------------------------------------------------- +// RCSTA - putRCState - update the state of the DTx output pin +// only used for Synchronous mode +// +void _RCSTA::putRCState(char newRCState) +{ + bInvertPin = mUSART->baudcon.rxdtp(); + m_cTxState = bInvertPin ? newRCState ^ 1 : newRCState; + + if (m_PinModule) m_PinModule->updatePinModule(); +} + +//----------------------------------------------------------- +// RCSTA - setIOpin - assign the I/O pin associated with the +// the receiver. + +void _RCSTA::setIOpin(PinModule *newPinModule) +{ + if (m_sink) + { + if (m_PinModule) m_PinModule->removeSink(m_sink); + } + else m_sink = new RXSignalSink(this); + + m_PinModule = newPinModule; + if (m_PinModule) + { + m_PinModule->addSink(m_sink); + old_clock_state = m_PinModule->getPin().getState(); + } +} + +//----------------------------------------------------------- +// RCSTA - setState +// This gets called whenever there's a change detected on the RX pin. +// The usart is only interested in those changes when it is waiting +// for the start bit. Otherwise, the rcsta callback function will sample +// the rx pin (if we're receiving). + + +void _RCSTA::setState(char new_RxState) +{ + Dprintf((" %s setState:%c\n",name().c_str(), new_RxState)); + + m_cRxState = new_RxState; + + if( (state == RCSTA_WAITING_FOR_START) && (m_cRxState =='0' || m_cRxState=='w')) + receive_start_bit(); + +} +// Transmit in synchronous mode +// +void _RCSTA::sync_start_transmitting() +{ + assert(txreg); + + rsr = txreg->value.get(); + if (txsta->bTX9()) + { + rsr |= (txsta->bTX9D() << 8); + bit_count = 9; + } + else + bit_count = 8; + txsta->value.put(txsta->value.get() & ~ _TXSTA::TRMT); + if (txsta->bCSRC()) + { + sync_next_clock_edge_high = true; + txsta->putTXState('0'); // clock low + callback(); + } +} +void _RCSTA::set_old_clock_state(char new3State) +{ + bool state = (new3State == '1' || new3State == 'W'); + state = mUSART->baudcon.txckp() ? !state : state; + old_clock_state = state; +} +void _RCSTA::clock_edge(char new3State) +{ + bool state = (new3State == '1' || new3State == 'W'); + + // invert clock, if requested + state = mUSART->baudcon.txckp() ? !state : state; + if (old_clock_state == state) return; + old_clock_state = state; + if (value.get() & SPEN) + { + // Transmitting ? + if ((value.get() & ( CREN | SREN)) == 0) + { + if (state) // clock high, output data + { + if (bit_count) + { + putRCState((rsr & 1) ? '1' : '0'); + rsr >>= 1; + bit_count--; + } + } + else + { + if(mUSART->bIsTXempty()) + { + txsta->value.put(txsta->value.get() | _TXSTA::TRMT); + } + else + { + sync_start_transmitting(); + mUSART->emptyTX(); + } + } + } + else // receiving + { + if (!state) // read data as clock goes low + { + bool data = m_PinModule->getPin().getState(); + data = mUSART->baudcon.rxdtp() ? !data : data; + + if (bRX9()) rsr |= data << 9; + else rsr |= data << 8; + + rsr >>= 1; + if (--bit_count == 0) + { + rcreg->push(rsr); + if (bRX9()) bit_count = 9; + else bit_count = 8; + rsr = 0; + } + } + } + } +} +//----------------------------------------------------------- +// RCSTA::receive_a_bit(uint bit) +// +// A new bit needs to be copied to the the Receive Shift Register. +// If the receiver is receiving data, then this routine will copy +// the incoming bit to the rsr. If this is the last bit, then a +// check will be made to see if we need to set up for the next +// serial byte. +// If this is not the last bit, then the receive state machine. + +void _RCSTA::receive_a_bit(uint bit) +{ + // If we're waiting for the start bit and this isn't it then + // we don't need to look any further + Dprintf(("%s receive_a_bit state:%u bit:%u time:0x%" PRINTF_GINT64_MODIFIER "x\n", + name().c_str(), state, bit, get_cycles().get())); + + if( state == RCSTA_MAYBE_START) + { + if (bit) state = RCSTA_WAITING_FOR_START; + else state = RCSTA_RECEIVING; + return; + } + if (bit_count == 0) + { + // we should now have the stop bit + if (bit) + { + // got the stop bit + // If the rxreg has data from a previous reception then + // we have a receiver overrun error. + // cout << "rcsta.rsr is full\n"; + + if((value.get() & RX9) == 0) rsr >>= 1; + + value.put(value.get() & (~FERR) ); // Clear any framing error + + if(rcreg) rcreg->push( rsr & 0x1ff); // copy the rsr to the fifo + + Dprintf(("%s _RCSTA::receive_a_bit received 0x%02X\n",name().c_str(), rsr & 0x1ff)); + } + else + { + value.put(value.get() | FERR); //no stop bit; framing error + + if(rcreg) rcreg->push( rsr & 0x1ff); // copy the rsr to the fifo + } + // If we're continuously receiving, then set up for the next byte. + // FIXME -- may want to set a half bit delay before re-starting... + if(value.get() & CREN) start_receiving(); + else state = RCSTA_DISABLED; + return; + } + + if(bit) rsr |= 1<<9; // Copy the bit into the Receive Shift Register + + //cout << "Receive bit #" << bit_count << ": " << (rsr&(1<<9)) << '\n'; + + rsr >>= 1; + bit_count--; +} + +void _RCSTA::stop_receiving() +{ + rsr = 0; + bit_count = 0; + state = RCSTA_DISABLED; +} + +void _RCSTA::start_receiving() +{ + Dprintf(("%s The USART is starting to receive data\n", name().c_str())); + + rsr = 0; + sample = 0; + + // Is this a 9-bit data reception? + bit_count = (value.get() & RX9) ? 9 : 8; + + state = RCSTA_WAITING_FOR_START; + +} +void _RCSTA::overrun() +{ + value.put(value.get() | _RCSTA::OERR); +} + +void _RCSTA::set_callback_break(uint spbrg_edge) +{ + uint time_to_event; + + if(cpu && spbrg) + { + time_to_event = ( spbrg->get_cycles_per_tick() * spbrg_edge ) / TOTAL_SAMPLE_STATES; + get_cycles().set_break(get_cycles().get() + time_to_event, this); + } +} +void _RCSTA::receive_start_bit() +{ + Dprintf(("%s USART received a start bit\n", name().c_str())); + + if((value.get() & (CREN | SREN)) == 0) { + Dprintf((" but not enabled\n")); + return; + } + + if(txsta && (txsta->value.get() & _TXSTA::BRGH)) + set_callback_break(BRGH_FIRST_MID_SAMPLE); + else + set_callback_break(BRGL_FIRST_MID_SAMPLE); + + sample = 0; + sample_state = RCSTA_WAITING_MID1; + state = RCSTA_MAYBE_START; +} + +void _RCSTA::queueData( uint32_t value ) // Used by Simulide +{ + //qDebug()<< "_RCSTA::queueData"<get_cycles_per_tick()*9 ); + dataInQueue = true; +} + +//------------------------------------------------------------ +void _RCSTA::callback() +{ + Dprintf(("RCSTA callback. %s time:0x%" PRINTF_GINT64_MODIFIER "x\n", name().c_str(), get_cycles().get())); + + if( !m_dataQueue.isEmpty() ) + { + rcreg->push( m_dataQueue.takeFirst() ); + + if( !m_dataQueue.isEmpty() ) set_callback_break( spbrg->get_cycles_per_tick()*9 ); + else dataInQueue = false; + + return; + } + + if (txsta->bSYNC()) // Synchronous mode RX/DT is data, TX/CK is clock + { + if (sync_next_clock_edge_high) // + edge of clock + { + sync_next_clock_edge_high = false; + txsta->putTXState('1'); // Clock high + // Transmit + if ((value.get() & (SPEN | SREN | CREN)) == SPEN) + { + if (bit_count) + { + putRCState((rsr & 1) ? '1' : '0'); + rsr >>= 1; + bit_count--; + } + } + } + else // - clock edge + { + sync_next_clock_edge_high = true; + txsta->putTXState('0'); //clock low + // Receive Master mode + if ((value.get() & (SPEN | SREN | CREN)) != SPEN) + { + + if (value.get() & OERR) + return; + bool data = m_PinModule->getPin().getState(); + data = mUSART->baudcon.rxdtp() ? !data : data; + if (bRX9()) + rsr |= data << 9; + else + rsr |= data << 8; + rsr >>= 1; + if (--bit_count == 0) + { + rcreg->push(rsr); + if (bRX9()) bit_count = 9; + else bit_count = 8; + rsr = 0; + value.put(value.get() & ~SREN); + if ((value.get() & (SPEN | SREN | CREN)) == SPEN ) + { + enableRCPin(DIR_OUT); + return; + } + } + } + else // Transmit, clock low + { + if (bit_count == 0 && !mUSART->bIsTXempty()) + { + sync_start_transmitting(); + mUSART->emptyTX(); + return; + } + else if(bit_count == 0 && mUSART->bIsTXempty()) + { + txsta->value.put(txsta->value.get() | _TXSTA::TRMT); + putRCState('0'); + return; + } + } + } + if (cpu && (value.get() & SPEN)) + { + future_cycle = get_cycles().get() + spbrg->get_cycles_per_tick(); + get_cycles().set_break(future_cycle, this); + } + } + else + { + // A bit is sampled 3 times. + switch(sample_state) + { + case RCSTA_WAITING_MID1: + if (m_cRxState == '1' || m_cRxState == 'W') + sample++; + + if(txsta && (txsta->value.get() & _TXSTA::BRGH)) + set_callback_break(BRGH_SECOND_MID_SAMPLE - BRGH_FIRST_MID_SAMPLE); + else + set_callback_break(BRGL_SECOND_MID_SAMPLE - BRGL_FIRST_MID_SAMPLE); + + sample_state = RCSTA_WAITING_MID2; + + break; + + case RCSTA_WAITING_MID2: + if (m_cRxState == '1' || m_cRxState == 'W') + sample++; + + if(txsta && (txsta->value.get() & _TXSTA::BRGH)) + set_callback_break(BRGH_THIRD_MID_SAMPLE - BRGH_SECOND_MID_SAMPLE); + else + set_callback_break(BRGL_THIRD_MID_SAMPLE - BRGL_SECOND_MID_SAMPLE); + + sample_state = RCSTA_WAITING_MID3; + + break; + + case RCSTA_WAITING_MID3: + if (m_cRxState == '1' || m_cRxState == 'W') + sample++; + + receive_a_bit( (sample>=2)); + sample = 0; + + // If this wasn't the last bit then go ahead and set a break for the next bit. + if(state==RCSTA_RECEIVING) { + if(txsta && (txsta->value.get() & _TXSTA::BRGH)) + set_callback_break(TOTAL_SAMPLE_STATES -(BRGH_THIRD_MID_SAMPLE - BRGH_FIRST_MID_SAMPLE)); + else + set_callback_break(TOTAL_SAMPLE_STATES -(BRGL_THIRD_MID_SAMPLE - BRGL_FIRST_MID_SAMPLE)); + + sample_state = RCSTA_WAITING_MID1; + } + + break; + + default: + //cout << "Error RCSTA callback with bad state\n"; + // The receiver was probably disabled in the middle of a reception. + ; + } + } +} + +//----------------------------------------------------------- +void _RCSTA::callback_print() +{ + cout << "RCSTA " << name() << " CallBack ID " << CallBackID << '\n'; +} + +//----------------------------------------------------------- +// RCREG +// +void _RCREG::push(uint new_value) +{ + //qDebug()<<"RCREG::push"<= 2) + { + if (m_rcsta) m_rcsta->overrun(); + } + else + { + fifo_sp++; + oldest_value = value.get(); + value.put(new_value & 0xff); + if (m_rcsta) + { + uint rcsta = m_rcsta->value.get(); + + if (new_value & 0x100) rcsta |= _RCSTA::RX9D; + else rcsta &= ~ _RCSTA::RX9D; + m_rcsta->value.put(rcsta); + } + } + mUSART->set_rcif(); +} + +void _RCREG::pop() +{ + if(fifo_sp == 0) return; + + if(--fifo_sp == 1) + { + value.put(oldest_value & 0xff); + if (m_rcsta) + { + uint rcsta = m_rcsta->value.get(); + if (oldest_value & 0x100) + rcsta |= _RCSTA::RX9D; + else + rcsta &= ~ _RCSTA::RX9D; + m_rcsta->value.put(rcsta); + } + } + if(fifo_sp == 0) mUSART->clear_rcif(); +} + +uint _RCREG::get_value() +{ + return value.get(); +} + +uint _RCREG::get() +{ + pop(); + return value.get(); +} + +//----------------------------------------------------------- +// SPBRG - Serial Port Baud Rate Generator +// +// The SPBRG is essentially a continuously running programmable +// clock. (Note that this will slow the simulation down if the +// serial port is not used. Perhaps gpsim needs some kind of +// pragma type thing to disable cpu intensive peripherals...) + +void _SPBRG::get_next_cycle_break() +{ + future_cycle = last_cycle + get_cycles_per_tick(); + + if(cpu) + { + if (future_cycle <= get_cycles().get()) + { + last_cycle = get_cycles().get(); + future_cycle = last_cycle + get_cycles_per_tick(); + } + get_cycles().set_break(future_cycle, this); + } +} + +uint _SPBRG::get_cycles_per_tick() +{ + uint cpi = (cpu) ? p_cpu->get_ClockCycles_per_Instruction() : 4; + uint brgval, cpt, ret; + + if ( baudcon && baudcon->brg16() ) + { + brgval = ( brgh ? brgh->value.get() * 256 : 0 ) + value.get(); + cpt = 4; // hi-speed divisor in 16-bit mode is 4 + } + else + { + brgval = value.get(); + cpt = 16; // hi-speed divisor in 8-bit mode is 16 + } + + if ( txsta && (txsta->value.get() & _TXSTA::SYNC) ) + { + // Synchronous mode - divisor is always 4 + // However, code wants two transitions per bit + // to generate clock for master mode, so use 2 + cpt = 2; + } + else // Asynchronous mode + { + if(txsta && !(txsta->value.get() & _TXSTA::BRGH)) + { + cpt *= 4; // lo-speed divisor is 4 times hi-speed + } + } + ret = ((brgval+1)*cpt)/cpi; + ret = ret ? ret : 1; + return ret; +} + +void _SPBRG::start() +{ + if (running) return; + + if(! skip || get_cycles().get() >= skip) + { + if(cpu) last_cycle = get_cycles().get(); + skip = 0; + } + running = true; + + start_cycle = last_cycle; + + get_next_cycle_break(); + + Dprintf((" SPBRG::start last_cycle:0x%" PRINTF_GINT64_MODIFIER "x: future_cycle:0x%" PRINTF_GINT64_MODIFIER "x\n",last_cycle,future_cycle)); +} + +void _SPBRG::put(uint new_value) +{ + value.put(new_value); + + //Prevent updating last_cycle until all current breakpoints have expired + //Otherwise we see that rx/tx periods get screwed up from now until future_cycle + future_cycle = last_cycle + get_cycles_per_tick(); + skip = future_cycle; +} + +void _SPBRG::put_value(uint new_value) +{ + put(new_value); + update(); +} + +void _SPBRGH::put(uint new_value) +{ + value.put(new_value); + if(m_spbrg) m_spbrg->set_start_cycle(); +} + +void _SPBRG::set_start_cycle() +{ + //Prevent updating last_cycle until all current breakpoints have expired + //Otherwise we see that rx/tx persiods get screwed up from now until future_cycle + future_cycle = last_cycle + get_cycles_per_tick(); + skip = future_cycle; +} + +void _SPBRGH::put_value(uint new_value) +{ + put(new_value); + update(); +} + +// +// Get the cpu cycle corresponding to the last edge of the SPBRG +// +uint64_t _SPBRG::get_last_cycle() +{ + // There's a chance that a SPBRG break point exists on the current + // cpu cycle, but has not yet been serviced. + if(cpu) + return( (get_cycles().get() == future_cycle) ? future_cycle : last_cycle); + else + return 0; +} +//-------------------------- +//uint64_t _SPBRG::get_cpu_cycle(uint edges_from_now) +// +// When the SPBRG is enabled, it becomes a free running counter +// that's synchronous with the cpu clock. The frequency of the +// counter depends on the mode of the usart: +// +// Synchronous mode: +// baud = cpu frequency / 4 / (spbrg.value + 1) +// +// Asynchronous mode: +// high frequency: +// baud = cpu frequency / 16 / (spbrg.value + 1) +// low frequency: +// baud = cpu frequency / 64 / (spbrg.value + 1) +// +// What this routine will do is return the cpu cycle corresponding +// to a (rising) edge of the spbrg clock. + +uint64_t _SPBRG::get_cpu_cycle(uint edges_from_now) +{ + // There's a chance that a SPBRG break point exists on the current + // cpu cycle, but has not yet been serviced. + uint64_t cycle = (get_cycles().get() == future_cycle) ? future_cycle : last_cycle; + + return ( edges_from_now * get_cycles_per_tick() + cycle ); +} + +void _SPBRG::callback() +{ + if (skip) + { + Dprintf((" SPBRG skip=0x%" PRINTF_GINT64_MODIFIER "x, cycle=0x%" PRINTF_GINT64_MODIFIER "x\n", skip, get_cycles().get())); + } + if(! skip || get_cycles().get() >= skip) + { + last_cycle = get_cycles().get(); + skip = 0; + } + //Dprintf(("SPBRG rollover at cycle:0x%" PRINTF_GINT64_MODIFIER "x\n",last_cycle)); + + if((rcsta && rcsta->bSPEN()) || (txsta && txsta->bTXEN())) + { + + // If the serial port is enabled, then set another + // break point for the next clock edge. + get_next_cycle_break(); + + } + else running = false; +} + +//----------------------------------------------------------- +// TXSTA - Transmit Register Status and Control + +void _BAUDCON::put_value(uint new_value) +{ + put(new_value); + update(); +} + +void _BAUDCON::put(uint new_value) +{ + uint old_value = value.get(); + + // The RCIDL bit is controlled entirely by hardware. + new_value &= ~RCIDL; + if ( rcsta->rc_is_idle() ) new_value |= RCIDL; + + value.put(new_value); + + if( (old_value ^ value.get()) & TXCKP) { + // The TXCKP bit has changed states. + txsta->set_pin_pol ((value.get() & TXCKP) ? true : false); + } +} + +//-------------------------------------------------- +// member functions for the USART +//-------------------------------------------------- +void USART_MODULE::initialize(PIR *_pir, + PinModule *tx_pin, PinModule *rx_pin, + _TXREG *_txreg, _RCREG *_rcreg) +{ + assert(_txreg && _rcreg); + + pir = _pir; + + spbrg.txsta = &txsta; + spbrg.rcsta = &rcsta; + + txreg = _txreg; + + txreg->assign_rcsta(&rcsta); + txreg->assign_txsta(&txsta); + + rcreg = _rcreg; + rcreg->assign_rcsta(&rcsta); + + txsta.txreg = txreg; + txsta.rcsta = &rcsta; + txsta.spbrg = &spbrg; + txsta.bit_count = 0; + txsta.setIOpin(tx_pin); + + rcsta.rcreg = rcreg; + rcsta.spbrg = &spbrg; + rcsta.txsta = &txsta; + rcsta.txreg = txreg; + rcsta.setIOpin(rx_pin); +} + +void USART_MODULE::setIOpin( int data, PinModule* pin ) +{ + if (data == TX_PIN) set_TXpin( pin ); + else set_RXpin( pin ); +} + +void USART_MODULE::set_TXpin(PinModule *tx_pin) +{ + txsta.setIOpin(tx_pin); +} +void USART_MODULE::set_RXpin(PinModule *rx_pin) +{ + rcsta.setIOpin(rx_pin); +} +bool USART_MODULE::bIsTXempty() +{ + if (m_txif) return m_txif->Get(); + return pir ? pir->get_txif() : true; +} +void USART_MODULE::emptyTX() +{ + Dprintf(("usart::empty - setting TXIF %s\n", txsta.name().c_str())); + + if (txsta.bTXEN()) + { + if (m_txif) m_txif->Trigger(); + else if (pir) + { + pir->set_txif(); + } + else assert(pir); + } + +} + +void USART_MODULE::full() +{ + Dprintf((" txreg::full - clearing TXIF\n")); + if (m_txif) m_txif->Clear(); + else if(pir) pir->clear_txif(); + else assert(pir); +} + +void USART_MODULE::set_rcif() +{ + Dprintf((" - setting RCIF\n")); + if (m_rcif) + m_rcif->Trigger(); + else if(pir) + pir->set_rcif(); +} + +void USART_MODULE::clear_rcif() +{ + Dprintf((" - clearing RCIF\n")); + if (m_rcif) + m_rcif->Clear(); + else if(pir) + pir->clear_rcif(); +} + +//-------------------------------------------------- +USART_MODULE::USART_MODULE(Processor *pCpu) + : txsta(pCpu,"","USART Transmit Status",this), // Don't set names incase there are two UARTS + rcsta(pCpu,"","USART Receive Status",this), + spbrg(pCpu,"","Serial Port Baud Rate Generator"), + spbrgh(pCpu,"spbrgh","Serial Port Baud Rate high byte"), + baudcon(pCpu,"baudcon","Serial Port Baud Rate Control"), + is_eusart(false), m_rcif(0), m_txif(0) +{ + baudcon.txsta = &txsta; + baudcon.rcsta = &rcsta; +} + +USART_MODULE::~USART_MODULE() +{ + if (m_rcif) delete m_rcif; + if (m_txif) delete m_txif; +} + +//-------------------------------------------------- +void USART_MODULE::set_eusart ( bool is_it ) +{ + if ( is_it ) + { + spbrgh.assign_spbrg ( &spbrg ); + spbrg.baudcon = &baudcon; + spbrg.brgh = &spbrgh; + is_eusart = true; + } + else + { + spbrgh.assign_spbrg ( 0 ); + spbrg.baudcon = 0; + spbrg.brgh = 0; + is_eusart = false; + } +} + diff --git a/src/gpsim/modules/uart.h b/src/gpsim/modules/uart.h new file mode 100644 index 0000000..a30f910 --- /dev/null +++ b/src/gpsim/modules/uart.h @@ -0,0 +1,400 @@ +/* + Copyright (C) 1998,1999 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +#include +#include +#include + +class InvalidRegister; // Forward reference + + +#ifndef __USART_H__ +#define __USART_H__ + +#include "pic-processor.h" +#include "14bit-registers.h" +#include "pir.h" +#include "apfcon.h" + +class _TXSTA; // Forward references +class _SPBRG; +class _RCSTA; +class _SPBRGH; +class _BAUDCON; +class _14bit_processor; + +class RXSignalSink; +class CLKSignalSink; +class TXSignalSource; +class TXSignalControl; +class RCSignalSource; +class RCSignalControl; +class USART_MODULE; + + +// USART Data Transmit Register +class _TXREG : public sfr_register, public TriggerObject +{ + public: + + _TXREG(Processor *pCpu, const char *pName, const char *pDesc,USART_MODULE *); + virtual void put(uint); + virtual void put_value(uint); + virtual void assign_txsta(_TXSTA *new_txsta) { m_txsta = new_txsta; }; + virtual void assign_rcsta(_RCSTA *new_rcsta) { m_rcsta = new_rcsta; }; + virtual void callback(); + virtual void callback_print(); + + private: + _TXSTA *m_txsta; + _RCSTA *m_rcsta; + USART_MODULE *mUSART; + bool full; +}; + +// Transmit Status and Control register +class _TXSTA : public sfr_register, public TriggerObject +{ + public: + _TXREG *txreg; + _SPBRG *spbrg; + _RCSTA *rcsta; + + uint tsr; + uint bit_count; + + enum { + TX9D = 1<<0, + TRMT = 1<<1, + BRGH = 1<<2, + SENDB = 1<<3, + SYNC = 1<<4, + TXEN = 1<<5, + TX9 = 1<<6, + CSRC = 1<<7 + }; + + _TXSTA(Processor *pCpu, const char *pName, const char *pDesc,USART_MODULE *); + ~_TXSTA(); + + virtual void put(uint new_value); + virtual void put_value(uint new_value); + + virtual void transmit_a_bit(); + virtual void start_transmitting(); + virtual void stop_transmitting(); + virtual void transmit_break(); + virtual void callback(); + virtual void callback_print(); + virtual char getState(); + + virtual void enableTXPin(); + virtual void disableTXPin(); + virtual void setIOpin(PinModule *); + virtual PinModule *getIOpin() { return m_PinModule; } + virtual void putTXState(char newTXState); + + bool bTXEN() { return (value.get() & TXEN) != 0; } + bool bSYNC() { return (value.get() & SYNC) != 0; } + bool bTRMT() { return (value.get() & TRMT) != 0; } + bool bCSRC() { return (value.get() & CSRC) != 0; } + bool bTX9() { return (value.get() & TX9) != 0; } + int bTX9D() { return (value.get() & TX9D) ? 1 : 0; } + + void set_pin_pol ( bool invert ) { bInvertPin = invert; }; + void releasePin(); + + protected: + USART_MODULE *mUSART; + PinModule *m_PinModule; + TXSignalSource *m_source; + TXSignalControl *m_control; + CLKSignalSink *m_clkSink; + bool SourceActive; + char m_cTxState; + bool bInvertPin; +}; + +// USART Data Receive Register +class _RCREG : public sfr_register +{ + public: + uint oldest_value; /* rcreg has a 2-deep fifo. The oldest received + * value is stored here, while the most recent + * is stored in sfr_register.value . */ + + uint fifo_sp; /* fifo stack pointer */ + + _RCREG(Processor *pCpu, const char *pName, const char *pDesc,USART_MODULE *); + virtual uint get(); + virtual uint get_value(); + virtual void push(uint); + virtual void pop(); + + virtual void assign_rcsta(_RCSTA *new_rcsta) { m_rcsta = new_rcsta; }; + + private: + USART_MODULE *mUSART; + _RCSTA *m_rcsta; +}; + +// Receive Status and Control Register +class _RCSTA : public sfr_register, public TriggerObject +{ + public: + enum { + RX9D = 1<<0, + OERR = 1<<1, + FERR = 1<<2, + ADDEN = 1<<3, + CREN = 1<<4, + SREN = 1<<5, + RX9 = 1<<6, + SPEN = 1<<7 + }; + + enum { + RCSTA_DISABLED, + RCSTA_WAITING_FOR_START, + RCSTA_MAYBE_START, + RCSTA_WAITING_MID1, + RCSTA_WAITING_MID2, + RCSTA_WAITING_MID3, + RCSTA_RECEIVING + }; + + // The usart samples the middle of the bit three times and + // produces a sample based on majority averaging. + // + + #define TOTAL_SAMPLE_STATES 16 + + #define BRGH_FIRST_MID_SAMPLE 4 + #define BRGH_SECOND_MID_SAMPLE 8 + #define BRGH_THIRD_MID_SAMPLE 12 + + #define BRGL_FIRST_MID_SAMPLE 7 + #define BRGL_SECOND_MID_SAMPLE 8 + #define BRGL_THIRD_MID_SAMPLE 9 + + _RCREG *rcreg; + _SPBRG *spbrg; + _TXSTA *txsta; + _TXREG *txreg; + + bool sync_next_clock_edge_high; + uint rsr; + uint bit_count; + uint rx_bit; + uint sample,state, sample_state; + uint64_t future_cycle, last_cycle; + + _RCSTA(Processor *pCpu, const char *pName, const char *pDesc, USART_MODULE *); + ~_RCSTA(); + + virtual void put(uint new_value); + virtual void put_value(uint new_value); + void receive_a_bit(unsigned); + void receive_start_bit(); + virtual void start_receiving(); + virtual void stop_receiving(); + virtual void overrun(); + virtual void callback(); + virtual void callback_print(); + void setState(char new_RxState); + //RRR char getDir() { return m_DTdirection;} + bool bSPEN() { return (value.get() & SPEN); } + bool bSREN() { return (value.get() & SREN); } + bool bCREN() { return (value.get() & CREN); } + bool bRX9() { return (value.get() & RX9); } + virtual void setIOpin(PinModule *); + bool rc_is_idle(void) { return ( state <= RCSTA_WAITING_FOR_START ); }; + virtual void enableRCPin(char direction = DIR_OUT); + virtual void disableRCPin(); + void releasePin(); + virtual char getState() { return m_cTxState;} + virtual void putRCState(char newRCState); + virtual void sync_start_transmitting(); + virtual void clock_edge(char new3State); + void set_old_clock_state(char new3State); + + void queueData( uint32_t value ); + + protected: + enum { + DIR_OUT, + DIR_IN + }; + void set_callback_break(uint spbrg_edge); + + USART_MODULE *mUSART; + PinModule *m_PinModule; + RXSignalSink *m_sink; + char m_cRxState; + bool SourceActive; + RCSignalControl *m_control; + RCSignalSource *m_source; + char m_cTxState; + char m_DTdirection; + + QList m_dataQueue; + + bool bInvertPin; + bool old_clock_state; + bool dataInQueue; +}; + + +// BAUD Rate Control Register +class _BAUDCON : public sfr_register +{ + public: + enum { + ABDEN = 1<<0, + WUE = 1<<1, + BRG16 = 1<<3, + TXCKP = 1<<4, + SCKP = 1<<4, // synchronous clock polarity Select bit (16f88x) + RXDTP = 1<<5, + RCIDL = 1<<6, + ABDOVF = 1<<7 + }; + + _TXSTA *txsta; + _RCSTA *rcsta; + + _BAUDCON(Processor *pCpu, const char *pName, const char *pDesc); + + virtual void put(uint); + virtual void put_value(uint); + bool brg16(void) { return ( value.get() & BRG16 ) != 0; }; + bool txckp() { return ( value.get() & TXCKP) != 0; } + bool rxdtp() { return ( value.get() & RXDTP) != 0; } + + // private: +}; + +// USART Baud Rate Generator, High Byte +class _SPBRGH : public sfr_register +{ + public: + _SPBRGH(Processor *pCpu, const char *pName, const char *pDesc); + virtual void assign_spbrg(_SPBRG *new_spbrg) { m_spbrg = new_spbrg; }; + virtual void put(uint); + virtual void put_value(uint); + + private: + _SPBRG *m_spbrg; +}; + +// USART Baud Rate Generator, Low Byte +class _SPBRG : public sfr_register, public TriggerObject +{ + public: + _TXSTA *txsta; + _RCSTA *rcsta; + _SPBRGH *brgh; + _BAUDCON *baudcon; + + uint64_t + start_cycle, // The cycle the SPBRG was started + last_cycle, // The cycle when the spbrg clock last changed + future_cycle; // The next cycle spbrg is predicted to change + + bool running; + + _SPBRG(Processor *pCpu, const char *pName, const char *pDesc); + + virtual void callback(); + virtual void callback_print() { + cout << "_SPBRG " << name() << " CallBack ID " << CallBackID << '\n'; + } + virtual void start(); + virtual void get_next_cycle_break(); + virtual uint64_t get_cpu_cycle(uint edges_from_now); + virtual uint64_t get_last_cycle(); + + virtual void put(uint); + virtual void put_value(uint); + void set_start_cycle(); + // protected: + virtual uint get_cycles_per_tick(); + + private: + uint64_t skip; +}; + +//--------------------------------------------------------------- +//--------------------------------------------------------------- +class USART_MODULE: public apfpin +{ + public: + enum + { + TX_PIN = 0, + RX_PIN = 1, + }; + + _TXSTA txsta; + _RCSTA rcsta; + _SPBRG spbrg; + + _TXREG *txreg; + _RCREG *rcreg; + PIR *pir; + + // Extra registers for when it's an EUSART + _SPBRGH spbrgh; + _BAUDCON baudcon; + + USART_MODULE(Processor *pCpu); + ~USART_MODULE(); + + void initialize(PIR *, + PinModule *tx_pin, PinModule *rx_pin, + _TXREG *, _RCREG *); + + virtual void setIOpin(int data, PinModule *pin); + void set_TXpin(PinModule *tx_pin); + void set_RXpin(PinModule *rx_pin); + bool bIsTXempty(); + void emptyTX(); + void full(); + void set_rcif(); + void clear_rcif(); + void mk_rcif_int(PIR *reg, uint bit) + { m_rcif = new InterruptSource(reg, bit);} + void mk_txif_int(PIR *reg, uint bit) + { m_txif = new InterruptSource(reg, bit);} + bool IsEUSART ( void ) { return is_eusart; }; + void set_eusart ( bool is_it ); + + private: + bool is_eusart; + InterruptSource *m_rcif; + InterruptSource *m_txif; +}; + +#endif diff --git a/src/gpsim/packages.cc b/src/gpsim/packages.cc new file mode 100644 index 0000000..f887793 --- /dev/null +++ b/src/gpsim/packages.cc @@ -0,0 +1,140 @@ +/* + Copyright (C) 1998,1999 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include + +#include "config.h" +#include "pic-processor.h" +#include "stimuli.h" +#include "packages.h" +#include + +Package::Package(void) +{ + + pins = 0; + number_of_pins = 0; +} + +Package::Package(uint _number_of_pins) +{ + number_of_pins = 0; + create_pkg(_number_of_pins); +} + +Package::~Package() +{ + if (pins) + destroy_pin(0); // delete all of the pins + delete [] pins; +} +void Package::create_pkg(uint _number_of_pins) +{ + if(number_of_pins) + { + cout << "error: Package::create_pkg. Package appears to already exist.\n"; + return; + } + number_of_pins = _number_of_pins; + + pins = new IOPIN *[number_of_pins]; + + for(uint i=0; i number_of_pins) || (pin_number == 0)) + { + cout << "error: Package::assign_pin. Pin number is out of range.\n"; + cout << "Max pins " << number_of_pins << ". Trying to add " << pin_number <<".\n"; + return E_PIN_OUT_OF_RANGE; + } + + if(pins[pin_number-1]) return E_PIN_EXISTS; + + return E_NO_PIN; +} + +IOPIN *Package::get_pin(uint pin_number) +{ + if(E_PIN_EXISTS == pin_existance(pin_number)) + return pins[pin_number-1]; + else + return 0; + +} + +void Package::assign_pin(uint pin_number, IOPIN *pin, bool warn) +{ + switch(pin_existance(pin_number)) { + + case E_PIN_EXISTS: + if(pins[pin_number-1] && warn) + cout << "warning: Package::assign_pin. Pin number " << pin_number << " already exists.\n"; + + case E_NO_PIN: + pins[pin_number-1] = pin; + break; + } +} + +void Package::destroy_pin(uint pin_number, IOPIN *pin) +{ + if (pin_number) + { + if(pin_number <= number_of_pins) + { + IOPIN *pPin = pins[pin_number-1]; + if (pPin) + delete pPin; + pins[pin_number-1] = 0; + } + + } + else + { + // Delete all pins + for (pin_number=1; pin_number <= number_of_pins; pin_number++) + destroy_pin(pin_number); + number_of_pins = 0; + } +} + +void Package::create_iopin_map(void) +{ +} + diff --git a/src/gpsim/packages.h b/src/gpsim/packages.h new file mode 100644 index 0000000..1177837 --- /dev/null +++ b/src/gpsim/packages.h @@ -0,0 +1,69 @@ +/* + Copyright (C) 1998,1999 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#ifndef __PACKAGES_H__ +#define __PACKAGES_H__ + +typedef unsigned int uint; + +#include +using namespace std; + +#include "gpsim_classes.h" + +class IOPIN; // forward reference + + +enum PACKAGE_PIN_ERRORS +{ + E_NO_PIN, + E_NO_PACKAGE, + E_PIN_OUT_OF_RANGE, + E_PIN_EXISTS +}; + +class Package +{ + public: + uint number_of_pins; + + Package(); + explicit Package(uint number_of_pins); + virtual ~Package(); + + void assign_pin(uint pin_number, IOPIN *pin, bool warn=true); + void destroy_pin(uint pin_number, IOPIN *pin=0); + void create_pkg(uint _number_of_pins); + + uint isa(void){ return 0; }; + virtual void create_iopin_map(void); + + virtual int get_pin_count(void) {return number_of_pins;}; + + int pin_existance(uint pin_number); + IOPIN *get_pin(uint pin_number); + + protected: + + IOPIN **pins; +}; + +#endif // __PACKAGES_H__ diff --git a/src/gpsim/pic-instructions.cc b/src/gpsim/pic-instructions.cc new file mode 100644 index 0000000..b7e8997 --- /dev/null +++ b/src/gpsim/pic-instructions.cc @@ -0,0 +1,1537 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include +#include +#include +#include + +#include "config.h" +#include "pic-processor.h" +#include "14bit-instructions.h" +#include "registers.h" + +instruction::instruction(Processor *pProcessor, + uint uOpCode, + uint uAddrOfInstr) + : Value("","",pProcessor), + m_bIsModified(false), + cycle_count(0), + opcode(uOpCode), + m_uAddrOfInstr(uAddrOfInstr) +{ +} + +instruction::~instruction() +{ +} + +void instruction::decode(Processor *new_cpu, uint new_opcode) +{ + cpu = new_cpu; + opcode = new_opcode; +} + +void instruction::addLabel(string &rLabel) +{ + if (cpu) addName(rLabel); +} + +//------------------------------------------------------------------------ +invalid_instruction::invalid_instruction(Processor *new_cpu,uint new_opcode, uint address) + : instruction(new_cpu,new_opcode,address) +{ + new_name("INVALID"); +} + +void invalid_instruction::execute() +{ + //cout << "*** INVALID INSTRUCTION ***\n"; +#ifdef __DEBUG_VERBOSE__ + debug(); +#endif + + /* Don't know what to do, so just plow through like nothing happened */ + if(cpu_pic) cpu_pic->pc->increment(); +}; + +void invalid_instruction::addLabel(string &rLabel) +{ + cout << "*** WARNING: adding label '"<(cpu)->bad_instruction; +} + +void AliasedInstruction::execute() +{ + getReplaced()->execute(); +} +void AliasedInstruction::debug() +{ + getReplaced()->debug(); +} + +int AliasedInstruction::instruction_size() +{ + return getReplaced()->instruction_size(); +} + +uint AliasedInstruction::get_opcode() +{ + return getReplaced()->get_opcode(); +} + +uint AliasedInstruction::get_value() +{ + return getReplaced()->get_value(); +} + +void AliasedInstruction::put_value(uint new_value) +{ + getReplaced()->put_value(new_value); +} + +enum instruction::INSTRUCTION_TYPES AliasedInstruction::isa() +{ + return getReplaced()->isa(); +} + +void AliasedInstruction::initialize(bool init_state) +{ + getReplaced()->initialize(init_state); +} + +char *AliasedInstruction::name(char *cPtr,int len) +{ + return getReplaced()->name(cPtr,len); +} + +void AliasedInstruction::update() +{ + getReplaced()->update(); +} + +bool AliasedInstruction::isBase() +{ + return getReplaced()->isBase(); +} + +//------------------------------------------------------------------------ +Literal_op::Literal_op(Processor *pProcessor, + uint uOpCode, + uint uAddrOfInstr) + : instruction(pProcessor, uOpCode, uAddrOfInstr), + L(uOpCode&0xff) +{ +} +char *Literal_op::name(char *return_str,int len) +{ + snprintf(return_str,len,"%s\t0x%02x", + gpsimObject::name().c_str(),L); + + return(return_str); +} + +void Literal_op::decode(Processor *new_cpu, uint new_opcode) +{ + opcode = new_opcode; + cpu = new_cpu; + L = opcode & 0xff; +} + +Bit_op::Bit_op(Processor *pProcessor, + uint uOpCode, + uint uAddrOfInstr) + : instruction(pProcessor, uOpCode, uAddrOfInstr), + mask(0),register_address(0), + access(false), + reg(0) +{ +} + +void Bit_op::decode(Processor *new_cpu, uint new_opcode) +{ + opcode = new_opcode; + + cpu = new_cpu; + switch(cpu_pic->base_isa()) + { + case _PIC17_PROCESSOR_: + mask = 1 << ((opcode >> 8) & 7); + register_address = opcode & REG_MASK_16BIT; + access = 0; + break; + + case _PIC18_PROCESSOR_: + mask = 1 << ((opcode >> 9) & 7); + register_address = opcode & REG_MASK_16BIT; + access = (opcode & ACCESS_MASK_16BIT) ? true : false; + if((!access) && (register_address >= cpu_pic->access_gprs())) // some 18f devices split at 0x60 + register_address |= 0xf00; + break; + + case _14BIT_PROCESSOR_: + case _14BIT_E_PROCESSOR_: + mask = 1 << ((opcode >> 7) & 7); + register_address = opcode & REG_MASK_14BIT; + access = 1; + break; + + case _12BIT_PROCESSOR_: + mask = 1 << ((opcode >> 5) & 7); + register_address = opcode & REG_MASK_12BIT; + access = 1; + break; + default: + cout << "ERROR: (Bit_op) the processor has a bad base type\n"; + } +} + +char * Bit_op::name(char *return_str,int len) +{ + // %%% FIX ME %%% Actually just a slight dilemma - the source register will always be in + // the lower bank of memory... + + reg = get_cpu()->registers[register_address]; + + uint bit; + + switch(cpu_pic->base_isa()) + { + case _PIC17_PROCESSOR_: + cout << "Bit_op::name %%% FIX ME %%% treating 17x as 18x\n"; + case _PIC18_PROCESSOR_: + bit = ((opcode >> 9) & 7); + snprintf(return_str,len,"%s\t%s,%u,%c", + gpsimObject::name().c_str(), + reg->name().c_str(), + bit, + access ? '1' : '0'); + + return(return_str); + break; + + case _14BIT_E_PROCESSOR_: + case _14BIT_PROCESSOR_: + if(access) + reg = get_cpu()->register_bank[register_address]; + bit = ((opcode >> 7) & 7); + break; + + case _12BIT_PROCESSOR_: + bit = ((opcode >> 5) & 7); + break; + default: + bit = 0; + } + + snprintf(return_str,len,"%s\t%s,%u", + gpsimObject::name().c_str(), + reg->name().c_str(), + bit); + + return(return_str); +} + + +//---------------------------------------------------------------- +Register_op::Register_op(Processor *pProcessor, + uint uOpCode, + uint uAddrOfInstr) + : instruction(pProcessor, uOpCode, uAddrOfInstr), + register_address(0), + destination(false), access(false) +{ +} +char * Register_op::name(char *return_str,int len) +{ + // %%% FIX ME %%% Actually just a slight dilemma - the source register will always be in + // the lower bank of memory (for the 12 and 14 bit cores). + + source = get_cpu()->registers[register_address]; + + if ( cpu_pic->base_isa() == _14BIT_E_PROCESSOR_ || + cpu_pic->base_isa() == _14BIT_PROCESSOR_ ) + { + if (access) + source = cpu_pic->register_bank[register_address]; + snprintf(return_str,len,"%s\t%s,%c", + gpsimObject::name().c_str(), + source->name().c_str(), + destination ? 'f' : 'w'); + } + else if ( cpu_pic->base_isa() != _PIC18_PROCESSOR_ ) + { + snprintf(return_str,len,"%s\t%s,%c", + gpsimObject::name().c_str(), + source->name().c_str(), + destination ? 'f' : 'w'); + } + else + snprintf(return_str,len,"%s\t%s,%c,%c", + gpsimObject::name().c_str(), + source->name().c_str(), + destination ? 'f' : 'w', + access ? '1' : '0'); + + return(return_str); +} + +//---------------------------------------------------------------- +// +// Register_op::decode +// +// Base class to decode all 'register' type instructions. The main thing +// it does is obtains the register's address from the opcode. Note that this +// is processor dependent: in the 12-bit core processors, the register address +// is the lower 5 bits while in the 14-bit core it's the lower 7. + +void Register_op::decode(Processor *new_cpu, uint new_opcode) +{ + opcode = new_opcode; + cpu = new_cpu; + + switch(cpu_pic->base_isa()) + { + case _PIC17_PROCESSOR_: + cout << "Register_op::decode %%% FIXME %%% - PIC17 core is not the same as PIC18\n"; + case _PIC18_PROCESSOR_: + destination = (opcode & DESTINATION_MASK_16BIT) ? true : false; + access = (opcode & ACCESS_MASK_16BIT) ? true : false; + register_address = opcode & REG_MASK_16BIT; + if((!access) && (register_address >= cpu_pic->access_gprs())) // some 18f devices split at 0x60 + register_address |= 0xf00; + + break; + + case _14BIT_PROCESSOR_: + case _14BIT_E_PROCESSOR_: + register_address = opcode & REG_MASK_14BIT; + destination = (opcode & DESTINATION_MASK_14BIT) ? true : false; + access = 1; + break; + + case _12BIT_PROCESSOR_: + register_address = opcode & REG_MASK_12BIT; + destination = (opcode & DESTINATION_MASK_12BIT) ? true : false; + access = 1; + break; + + default: + cout << "ERROR: (Register_op) the processor has a bad base type\n"; + } + +} +Register * Register_op::source = 0; + +//-------------------------------------------------- + +ADDWF::ADDWF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("addwf"); +} + +void ADDWF::execute() +{ + uint new_value,src_value,w_value; + + if(!access) source = cpu_pic->registers[register_address]; + else source = cpu_pic->register_bank[register_address]; + + new_value = (src_value = source->get()) + (w_value = cpu_pic->Wget()); + + if(destination) source->put(new_value & 0xff); // Result goes to source + else cpu_pic->Wput(new_value & 0xff); + + cpu_pic->status->put_Z_C_DC(new_value, src_value, w_value); + cpu_pic->pc->increment(); +} + + +//-------------------------------------------------- + +ADDWFC::ADDWFC (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("addwfc"); +} + +void ADDWFC::execute() +{ + uint new_value,src_value,w_value; + + source = ((!access) ? + cpu_pic->registers[register_address] + : + cpu_pic->register_bank[register_address] ); + + new_value = (src_value = source->get()) + + (w_value = cpu_pic->Wget()) + + ((cpu_pic->status->value.get() & STATUS_C) ? 1 : 0); + + // Store the result + + if(destination) source->put(new_value & 0xff); // Result goes to source + else cpu_pic->Wput(new_value & 0xff); + + cpu_pic->status->put_Z_C_DC(new_value, src_value, w_value); + cpu_pic->pc->increment(); +} +//-------------------------------------------------- + +ANDLW::ANDLW (Processor *new_cpu, uint new_opcode, uint address) + : Literal_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("andlw"); +} + +void ANDLW::execute() +{ + uint new_value; + + new_value = cpu_pic->Wget() & L; + + cpu_pic->Wput(new_value); + cpu_pic->status->put_Z(0==new_value); + + cpu_pic->pc->increment(); + +} + +//-------------------------------------------------- + +ANDWF::ANDWF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + + decode(new_cpu, new_opcode); + new_name("andwf"); + +} + +void ANDWF::execute() +{ + uint new_value; + + if(!access) + source = cpu_pic->registers[register_address]; + else + source = cpu_pic->register_bank[register_address]; + + new_value = source->get() & cpu_pic->Wget(); + + if(destination) + source->put(new_value); // Result goes to source + else + cpu_pic->Wput(new_value); + + cpu_pic->status->put_Z(0==new_value); + + cpu_pic->pc->increment(); + +} + + +//-------------------------------------------------- + +ASRF::ASRF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("asrf"); +} + +void ASRF::execute() +{ + uint new_value,src_value, carry, msb; + + source = ((!access) ? + cpu_pic->registers[register_address] + : + cpu_pic->register_bank[register_address] ); + + carry = (src_value = source->get()) & 1; + msb = src_value & 0x80; + new_value = ((src_value & 0xff) >> 1) | msb; + + // Store the result + + if(destination) + source->put(new_value); // Result goes to source + else + cpu_pic->Wput(new_value); + + cpu_pic->status->put_Z(new_value==0); + cpu_pic->status->put_C(carry); + + cpu_pic->pc->increment(); + +} +//-------------------------------------------------- + +BCF::BCF (Processor *new_cpu, uint new_opcode, uint address) + : Bit_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + mask ^= 0xff; // decode initializes the mask to 1<registers[register_address]; + else reg = cpu_pic->register_bank[register_address]; + + reg->put(reg->get_value() & mask); // Must not use reg->value.get() as it breaks indirects + + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- +BRA::BRA (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + destination_index = (new_opcode & 0x1ff)+1; + absolute_destination_index = (address + destination_index) & 0xfffff; + + if(new_opcode & 0x100) + { + absolute_destination_index -= 0x200; + destination_index = 0x200 - destination_index; + } + + new_name("bra"); +} + +void BRA::execute() +{ + cpu_pic->pc->jump(absolute_destination_index); + +} + +char * BRA::name(char *return_str, int len) +{ + snprintf(return_str, len, "%s\t$%c0x%x\t;(0x%05x)", + gpsimObject::name().c_str(), + (opcode & 0x100) ? '-' : '+', + (destination_index & 0x1ff)<<1, + absolute_destination_index<<1); + + return return_str; +} + +//-------------------------------------------------- +BRW::BRW (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + current_address = address; + + new_name("brw"); +} + +void BRW::execute() +{ + destination_index = cpu_pic->Wget(); + cpu_pic->pc->jump(current_address + destination_index +1); + +} + +char * BRW::name(char *return_str, int len) +{ + snprintf(return_str, len, "%s\t$%c0x%x\t;(0x%05x)", + gpsimObject::name().c_str(), + (opcode & 0x100) ? '-' : '+', + (destination_index & 0x1ff), + current_address + destination_index +1); + + return return_str; +} + +//-------------------------------------------------- + +BSF::BSF (Processor *new_cpu, uint new_opcode, uint address) + : Bit_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("bsf"); +} + +void BSF::execute() +{ + + if(!access) + reg = cpu_pic->registers[register_address]; + else + reg = cpu_pic->register_bank[register_address]; + + reg->put(reg->get_value() | mask); // Must not use reg->value.get() as it breaks indirects + + + cpu_pic->pc->increment(); + +} + +//-------------------------------------------------- + +BTFSC::BTFSC (Processor *new_cpu, uint new_opcode, uint address) + : Bit_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("btfsc"); +} + +void BTFSC::execute() +{ + + if(!access) + reg = cpu_pic->registers[register_address]; + else + reg = cpu_pic->register_bank[register_address]; + + uint result = mask & reg->get(); + + if(!result) + cpu_pic->pc->skip(); // Skip next instruction + else + cpu_pic->pc->increment(); + +} + +//-------------------------------------------------- + +BTFSS::BTFSS (Processor *new_cpu, uint new_opcode, uint address) + : Bit_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("btfss"); +} + +void BTFSS::execute() +{ + + if(!access) + reg = cpu_pic->registers[register_address]; + else + reg = cpu_pic->register_bank[register_address]; + + uint result = mask & reg->get(); + + if(result) + cpu_pic->pc->skip(); // Skip next instruction + else + cpu_pic->pc->increment(); + +} + +//-------------------------------------------------- +CALL::CALL (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + + switch(cpu_pic->base_isa()) + { + case _14BIT_PROCESSOR_: + case _14BIT_E_PROCESSOR_: + destination = opcode&0x7ff; + break; + + case _12BIT_PROCESSOR_: + destination = opcode&0xff; + break; + default: + cout << "ERROR: (Bit_op) the processor has a bad base type\n"; + } + + new_name("call"); +} + +void CALL::execute() +{ + + // do not jump if the push fails + if (cpu_pic->stack->push(cpu_pic->pc->get_next())) + cpu_pic->pc->jump(cpu_pic->get_pclath_branching_jump() | destination); + +} + +char * CALL::name(char *return_str,int len) +{ + + snprintf(return_str,len,"%s\t0x%04x", + gpsimObject::name().c_str(), + destination); + + return(return_str); +} + + +//-------------------------------------------------- +CALLW::CALLW(Processor *new_cpu, uint new_opcode, uint address) + :instruction (new_cpu, new_opcode, address) +{ + new_name("callw"); +} +char *CALLW::name(char *return_str,int len) +{ + + snprintf(return_str,len,"%s", + gpsimObject::name().c_str()); + return(return_str); +} +void CALLW::execute() +{ + if (cpu_pic->stack->push(cpu_pic->pc->get_next())) + { + cpu_pic->pcl->put(cpu_pic->Wget()); + cpu_pic->pc->increment(); + } +} + +//-------------------------------------------------- +CLRF::CLRF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + + new_name("clrf"); +} + +void CLRF::execute() +{ + if(!access) cpu_pic->registers[register_address]->put(0); + else cpu_pic->register_bank[register_address]->put(0); + + cpu_pic->status->put_Z(1); + cpu_pic->pc->increment(); +} + +char * CLRF::name(char *return_str,int len) +{ + + source = get_cpu()->registers[register_address]; + if (access) source = cpu_pic->register_bank[register_address]; + + snprintf(return_str,len,"%s\t%s", + gpsimObject::name().c_str(), + source->name().c_str()); + + return(return_str); +} + +//-------------------------------------------------- + +CLRW::CLRW (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("clrw"); +} + +void CLRW::execute() +{ + cpu_pic->Wput(0); + + cpu_pic->status->put_Z(1); + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +CLRWDT::CLRWDT (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("clrwdt"); +} + +void CLRWDT::execute() +{ + cpu_pic->wdt.clear(); + + cpu_pic->status->put_TO(1); + cpu_pic->status->put_PD(1); + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +COMF::COMF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("comf"); +} + +void COMF::execute() +{ + uint new_value; + + if(!access) + source = cpu_pic->registers[register_address]; + else + source = cpu_pic->register_bank[register_address]; + + new_value = source->get() ^ 0xff; + + if(destination) source->put(new_value); // Result goes to source + else cpu_pic->Wput(new_value); + + cpu_pic->status->put_Z(0==new_value); + + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +DECF::DECF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("decf"); +} + +void DECF::execute() +{ + uint new_value; + + if(!access) + source = cpu_pic->registers[register_address]; + else + source = cpu_pic->register_bank[register_address]; + + new_value = (source->get() - 1)&0xff; + + if(destination) + source->put(new_value); // Result goes to source + else + cpu_pic->Wput(new_value); + + cpu_pic->status->put_Z(0==new_value); + + cpu_pic->pc->increment(); + +} + +//-------------------------------------------------- + +DECFSZ::DECFSZ (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("decfsz"); +} + +void DECFSZ::execute() +{ + uint new_value; + + if(!access) + source = cpu_pic->registers[register_address]; + else + source = cpu_pic->register_bank[register_address]; + + new_value = (source->get() - 1)&0xff; + + if(destination) + source->put(new_value); // Result goes to source + else + cpu_pic->Wput(new_value); + + if(0==new_value) + cpu_pic->pc->skip(); // Skip next instruction + else + cpu_pic->pc->increment(); + +} + +//-------------------------------------------------- +GOTO::GOTO (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + switch(cpu_pic->base_isa()) + { + case _14BIT_PROCESSOR_: + case _14BIT_E_PROCESSOR_: + destination = opcode&0x7ff; + break; + + case _12BIT_PROCESSOR_: + destination = opcode&0x1ff; + break; + default: + cout << "ERROR: (Bit_op) the processor has a bad base type\n"; + } + new_name("goto"); +} + +void GOTO::execute() +{ + cpu_pic->pc->jump(cpu_pic->get_pclath_branching_jump() | destination); +} + +char * GOTO::name(char *return_str,int len) +{ + snprintf(return_str,len,"%s\t0x%04x", gpsimObject::name().c_str(),destination); + + return(return_str); +} + + +//-------------------------------------------------- + +INCF::INCF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("incf"); +} + +void INCF::execute() +{ + uint new_value; + + if(!access) source = cpu_pic->registers[register_address]; + else source = cpu_pic->register_bank[register_address]; + + new_value = (source->get() + 1)&0xff; + + if(destination) source->put(new_value); // Store the result + else cpu_pic->Wput(new_value); + + cpu_pic->status->put_Z(0==new_value); + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +INCFSZ::INCFSZ (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("incfsz"); +} + +void INCFSZ::execute() +{ + uint new_value; + + if(!access) source = cpu_pic->registers[register_address]; + else source = cpu_pic->register_bank[register_address]; + + new_value = (source->get() + 1)&0xff; + + if(destination) source->put(new_value); // Result goes to source + else cpu_pic->Wput(new_value); + + if(0==new_value) cpu_pic->pc->skip(); // Skip next instruction + else cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +IORLW::IORLW (Processor *new_cpu, uint new_opcode, uint address) + : Literal_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("iorlw"); +} + +void IORLW::execute() +{ + uint new_value; + + new_value = cpu_pic->Wget() | L; + + cpu_pic->Wput(new_value); + cpu_pic->status->put_Z(0==new_value); + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +IORWF::IORWF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("iorwf"); +} + +void IORWF::execute() +{ + uint new_value; + + if(!access) source = cpu_pic->registers[register_address]; + else source = cpu_pic->register_bank[register_address]; + + new_value = source->get() | cpu_pic->Wget(); + + if(destination) source->put(new_value); // Result goes to source + else cpu_pic->Wput(new_value); + + cpu_pic->status->put_Z(0==new_value); + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +LSLF::LSLF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("lslf"); +} + +void LSLF::execute() +{ + uint new_value,src_value, carry; + + source = ((!access) ? + cpu_pic->registers[register_address] : + cpu_pic->register_bank[register_address] ); + + carry = (src_value = source->get()) & 0x80; + new_value = (src_value << 1) & 0xff; + + // Store the result + if(destination) source->put(new_value); // Result goes to source + else cpu_pic->Wput(new_value); + + cpu_pic->status->put_Z(new_value==0); + cpu_pic->status->put_C(carry); + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +LSRF::LSRF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("lsrf"); +} + +void LSRF::execute() +{ + uint new_value,src_value, carry; + + source = ((!access) ? + cpu_pic->registers[register_address]: + cpu_pic->register_bank[register_address] ); + + carry = (src_value = source->get()) & 1; + new_value = (src_value & 0xff) >> 1; + + if(destination) source->put(new_value); // Result goes to source + else cpu_pic->Wput(new_value); + + cpu_pic->status->put_Z(new_value==0); + cpu_pic->status->put_C(carry); + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +MOVLP::MOVLP (Processor *new_cpu, uint new_opcode, uint address) + : Literal_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("movlp"); +} + +void MOVLP::execute() +{ + if (cpu_pic->pclath->address) + cpu_pic->registers[cpu_pic->pclath->address]->put(L); + else + cpu_pic->pclath->put(L); + + cpu_pic->pc->increment(); + +} + +char * MOVLP::name(char *return_str, int len) +{ + + + snprintf(return_str, len, "%s\t%u", + gpsimObject::name().c_str(), + L & 0x7f); + + return(return_str); +} +//-------------------------------------------------- + +MOVLW::MOVLW (Processor *new_cpu, uint new_opcode, uint address) + : Literal_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("movlw"); +} + +void MOVLW::execute() +{ + + cpu_pic->Wput(L); + + cpu_pic->pc->increment(); + +} + +//-------------------------------------------------- + +MOVF::MOVF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("movf"); +} + +void MOVF::execute() +{ + uint source_value; + + if(!access) + source = cpu_pic->registers[register_address]; + else + source = cpu_pic->register_bank[register_address]; + + source_value = source->get(); + + // Store the result + + if(destination) + source->put(source_value); + else + cpu_pic->Wput(source_value); + + + cpu_pic->status->put_Z(0==source_value); + + cpu_pic->pc->increment(); + +} + + +void MOVF::debug() +{ + + cout << "MOVF: "; + +} + +//-------------------------------------------------- +MOVWF::MOVWF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("movwf"); +} + +void MOVWF::execute() +{ + + if(!access) + cpu_pic->registers[register_address]->put(cpu_pic->Wget()); + else + cpu_pic->register_bank[register_address]->put(cpu_pic->Wget()); + + cpu_pic->pc->increment(); +} + +char * MOVWF::name(char *return_str, int len) +{ + + + source = get_cpu()->registers[register_address]; + if (access) + source = cpu_pic->register_bank[register_address]; + snprintf(return_str,len,"%s\t%s", + gpsimObject::name().c_str(), + source->name().c_str()); + + return(return_str); +} + + +//-------------------------------------------------- + +NOP::NOP (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu,new_opcode,address) +{ + + decode(new_cpu,new_opcode); + new_name("nop"); + + // For the 18cxxx family, this 'nop' may in fact be the + // 2nd word in a 2-word opcode. So just to be safe, let's + // initialize the cross references to the source file. + // (Subsequent initialization code will overwrite this, + // but there is a chance that this info will be accessed + // before that occurs). + /* + file_id = 0; + src_line = 0; + lst_line = 0; + */ +} + +void NOP::execute() +{ + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +OPTION::OPTION (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu,new_opcode,address) +{ + decode(new_cpu, new_opcode); + new_name("option"); +} + +void OPTION::execute() +{ + + cpu_pic->put_option_reg(cpu_pic->Wget()); + + cpu_pic->pc->increment(); + +} + +//-------------------------------------------------- + +RESET::RESET (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("reset"); +} + +void RESET::execute() +{ + cpu_pic->reset(SOFT_RESET); +} + +//-------------------------------------------------- + +RETLW::RETLW (Processor *new_cpu, uint new_opcode, uint address) + : Literal_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("retlw"); +} + +void RETLW::execute() +{ + + cpu_pic->Wput(L); + + cpu_pic->pc->new_address(cpu_pic->stack->pop()); + +} + +//-------------------------------------------------- + +RLF::RLF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("rlf"); +} + +void RLF::execute() +{ + uint new_value; + + if(!access) + source = cpu_pic->registers[register_address]; + else + source = cpu_pic->register_bank[register_address]; + + new_value = (source->get() << 1) | cpu_pic->status->get_C(); + + if(destination) + source->put(new_value&0xff); // Result goes to source + else + cpu_pic->Wput(new_value&0xff); + + cpu_pic->status->put_C(new_value>0xff); + + cpu_pic->pc->increment(); + +} + +//-------------------------------------------------- + +RRF::RRF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("rrf"); +} + +void RRF::execute() +{ + uint new_value,old_value; + + if(!access) + source = cpu_pic->registers[register_address]; + else + source = cpu_pic->register_bank[register_address]; + + old_value = source->get(); + new_value = (old_value >> 1) | (cpu_pic->status->get_C() ? 0x80 : 0); + + if(destination) + source->put(new_value&0xff); // Result goes to source + else + cpu_pic->Wput(new_value&0xff); + + cpu_pic->status->put_C(old_value&0x01); + + cpu_pic->pc->increment(); + +} + +//-------------------------------------------------- + +SLEEP::SLEEP (Processor *new_cpu, uint new_opcode, uint address) + : instruction(new_cpu,new_opcode,address) +{ + decode(new_cpu, new_opcode); + new_name("sleep"); +} + +void SLEEP::execute() +{ + cpu_pic->enter_sleep(); +} + +//-------------------------------------------------- + +SUBWF::SUBWF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("subwf"); +} + +void SUBWF::execute() +{ + uint new_value,src_value,w_value; + + if(!access) source = cpu_pic->registers[register_address]; + else source = cpu_pic->register_bank[register_address]; + + new_value = (src_value = source->get()) - (w_value = cpu_pic->Wget()); + + if(destination) source->put(new_value & 0xff); // Result goes to source + else cpu_pic->Wput(new_value & 0xff); + + cpu_pic->status->put_Z_C_DC_for_sub(new_value, src_value, w_value); + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +SUBWFB::SUBWFB (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("subwfb"); +} + +void SUBWFB::execute() +{ + uint new_value,src_value,w_value; + + source = ((!access) ? + cpu_pic->registers[register_address] : + cpu_pic->register_bank[register_address] ); + + new_value = (src_value = source->get()) - (w_value = cpu_pic->Wget()) - + (1 - cpu_pic->status->get_C()); + + if(destination) source->put(new_value & 0xff); + else cpu_pic->Wput(new_value & 0xff); + + cpu_pic->status->put_Z_C_DC_for_sub(new_value, src_value, w_value); + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +SWAPF::SWAPF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("swapf"); +} + +void SWAPF::execute() +{ + uint src_value; + + if(!access) source = cpu_pic->registers[register_address]; + else source = cpu_pic->register_bank[register_address]; + + src_value = source->get(); + + if(destination) + source->put( ((src_value >> 4) & 0x0f) | ( (src_value << 4) & 0xf0) ); + else + cpu_pic->Wput( ((src_value >> 4) & 0x0f) | ( (src_value << 4) & 0xf0) ); + + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- +TRIS::TRIS (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + + // The TRIS instruction only uses the lower three bits to determine + // the destination register + + register_address &= 7; + + // Furthermore, those three bits can only be 5,6, or 7 + + if( (register_address > 7) || (register_address < 5)) + { + cout << "Warning: TRIS address '" << register_address << "' is out of range\n"; + + // set the address to a 'bad value' that's + // easy to detect at run time: + register_address = 0; + } + else + { + if(cpu_pic->base_isa() == _14BIT_PROCESSOR_ || + cpu_pic->base_isa() == _14BIT_PROCESSOR_) + register_address |= 0x80; // The destination register is the TRIS + } + new_name("tris"); +} + +void TRIS::execute() +{ + if(register_address) + { + // Execute the instruction only if the register is valid. + if(cpu_pic->base_isa() == _14BIT_PROCESSOR_ || + cpu_pic->base_isa() == _14BIT_PROCESSOR_) + cpu_pic->registers[register_address]->put(cpu_pic->Wget()); + else + cpu_pic->tris_instruction(register_address); + } + cpu_pic->pc->increment(); +} + +char * TRIS::name(char *return_str,int len) +{ + source = get_cpu()->registers[register_address]; + snprintf(return_str,len,"%s\t%s", + gpsimObject::name().c_str(), + source->name().c_str()); + + return(return_str); +} + +//-------------------------------------------------- + +XORLW::XORLW (Processor *new_cpu, uint new_opcode, uint address) + : Literal_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("xorlw"); +} + +void XORLW::execute() +{ + uint new_value; + + new_value = cpu_pic->Wget() ^ L; + + cpu_pic->Wput(new_value); + cpu_pic->status->put_Z(0==new_value); + cpu_pic->pc->increment(); +} + +//-------------------------------------------------- + +XORWF::XORWF (Processor *new_cpu, uint new_opcode, uint address) + : Register_op(new_cpu, new_opcode, address) +{ + decode(new_cpu, new_opcode); + new_name("xorwf"); +} + +void XORWF::execute() +{ + uint new_value; + + if(!access) source = cpu_pic->registers[register_address]; + else source = cpu_pic->register_bank[register_address]; + + new_value = source->get() ^ cpu_pic->Wget(); + + if(destination) source->put(new_value); // Result goes to source + else cpu_pic->Wput(new_value); + + cpu_pic->status->put_Z(0==new_value); + cpu_pic->pc->increment(); +} diff --git a/src/gpsim/pic-instructions.h b/src/gpsim/pic-instructions.h new file mode 100644 index 0000000..6409c9f --- /dev/null +++ b/src/gpsim/pic-instructions.h @@ -0,0 +1,240 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __PIC_INSTRUCTIONS_H__ +#define __PIC_INSTRUCTIONS_H__ + +#include "value.h" + +class Register; + +/* + * base class for an instruction + */ +class instruction : public Value +{ +public: + + enum INSTRUCTION_TYPES + { + NORMAL_INSTRUCTION, + INVALID_INSTRUCTION, + BREAKPOINT_INSTRUCTION, + NOTIFY_INSTRUCTION, + PROFILE_START_INSTRUCTION, + PROFILE_STOP_INSTRUCTION, + MULTIWORD_INSTRUCTION, + ASSERTION_INSTRUCTION + }; + + /* + * Not all instructions derived from the instruction + * class use these constants... + */ + enum + { + REG_MASK_12BIT = 0x1f, + REG_MASK_14BIT = 0x7f, + REG_MASK_16BIT = 0xff, + DESTINATION_MASK_12BIT = 0x20, + DESTINATION_MASK_14BIT = 0x80, + DESTINATION_MASK_16BIT = 0x200, + ACCESS_MASK_16BIT = 0x100, + }; + + instruction(Processor *pProcessor, uint uOpCode, uint uAddrOfInstr); + virtual ~instruction(); + + virtual void execute() = 0; + virtual void debug(){ } + virtual int instruction_size() { return 1;} + virtual uint get_opcode() { return opcode; } + virtual uint get_value() { return opcode; } + virtual void put_value(uint new_value) { } + virtual uint getAddress() { return m_uAddrOfInstr;} + virtual void setAddress(uint addr) { m_uAddrOfInstr = addr;} + + virtual enum INSTRUCTION_TYPES isa() {return NORMAL_INSTRUCTION;} + virtual uint64_t getCyclesUsed() { return cycle_count;} + virtual bool isBase() = 0; + void decode(Processor *new_cpu, uint new_opcode); + + virtual void addLabel(string &rLabel); + + // Some instructions require special initialization after they've + // been instantiated. For those that do, the instruction base class + // provides a way to control the initialization state (see the 16-bit + // PIC instructions). + virtual void initialize(bool init_state) {}; + + bool bIsModified() { return m_bIsModified; } + void setModified(bool b) { m_bIsModified=b; } + +protected: + bool m_bIsModified; // flag indicating if this instruction has + // changed since start. + uint64_t cycle_count; // Nr of cycles used up by this instruction + + uint opcode; + uint m_uAddrOfInstr; +}; + + +//--------------------------------------------------------- +// An AliasedInstruction is a class that is designed to replace an +// instruction in program memory. (E.g. breakpoint instructions are an +// example). +class AliasedInstruction : public instruction +{ + public: + explicit AliasedInstruction(instruction *); + AliasedInstruction(); + AliasedInstruction(Processor *pProcessor, + uint uOpCode, + uint uAddrOfInstr); + ~AliasedInstruction(); + void setReplaced(instruction *); + virtual instruction *getReplaced(); + + virtual void execute(); + virtual void debug(); + virtual int instruction_size(); + virtual uint get_opcode(); + virtual uint get_value(); + virtual void put_value(uint new_value); + + virtual enum INSTRUCTION_TYPES isa(); + virtual void initialize(bool init_state); + virtual char *name(char *,int len); + virtual bool isBase(); + + virtual void update(void); + + protected: + instruction *m_replaced; +}; + +//--------------------------------------------------------- +class invalid_instruction : public instruction +{ + public: + + virtual void execute(); + + virtual void debug() + { + //cout << "*** INVALID INSTRUCTION ***\n"; + }; + + //invalid_instruction(Processor *new_cpu=0,uint new_opcode=0); + invalid_instruction(Processor *new_cpu, uint new_opcode, uint address); + + virtual enum INSTRUCTION_TYPES isa() {return INVALID_INSTRUCTION;}; + + static instruction *construct(Processor *new_cpu, uint new_opcode,uint address) + {return new invalid_instruction(new_cpu,new_opcode,address);} + + virtual void addLabel(string &rLabel); + virtual bool isBase() { return true; } +}; + +//--------------------------------------------------------- +class Literal_op : public instruction +{ + public: + Literal_op(Processor *pProcessor, uint uOpCode, uint uAddrOfInstr); + + uint L; + + virtual void debug(){ }; + virtual char *name(char *,int); + virtual bool isBase() { return true; } + + void decode(Processor *new_cpu, uint new_opcode); +}; + + +//--------------------------------------------------------- +class Bit_op : public instruction +{ + public: + Bit_op(Processor *pProcessor, uint uOpCode, uint uAddrOfInstr); + + uint mask,register_address; + bool access; + Register *reg; + + virtual void debug(){ }; + virtual char *name(char *,int); + virtual bool isBase() { return true; } + + void decode(Processor *new_cpu, uint new_opcode); +}; + + +//--------------------------------------------------------- +class Register_op : public instruction +{ + public: + + Register_op(Processor *pProcessor, uint uOpCode, uint uAddrOfInstr); + + static Register *source; + uint register_address; + bool destination, access; + + /* Register *destination;*/ + + virtual void debug(){ }; + virtual char *name(char *,int); + virtual bool isBase() { return true; } + + void decode(Processor *new_cpu, uint new_opcode); +}; + +//----------------------------------------------------------------- +// +// instruction_constructor - a class used to create the PIC instructions +// +// The way it works is the 'instruction_constructor' structure +// contains three pieces of info for each instruction: +// inst_mask - a bit mask indicating which bits uniquely +// identify an instruction +// opcode - What those unique bits should be +// inst_constructor - A pointer to the static member function +// 'construct' in the instruction class. +// +// An instruction is decoded by finding a matching entry in +// the instruction_constructor array. A match is defined to +// be: +// inst_mask & passed_opcode == opcode +// which means that the opcode that is passed to the decoder +// is ANDed with the instruction mask bits and compared to +// the base bits of the opcode. If this test passes, then the +// 'inst_constructor' will be called. + +struct instruction_constructor { + uint inst_mask; + uint opcode; + instruction * (*inst_constructor) (Processor *cpu, uint inst, uint address); +}; + + +#endif /* __PIC_INSTRUCTIONS_H__ */ diff --git a/src/gpsim/pic-ioports.cc b/src/gpsim/pic-ioports.cc new file mode 100644 index 0000000..df8ff58 --- /dev/null +++ b/src/gpsim/pic-ioports.cc @@ -0,0 +1,609 @@ +/* + Copyright (C) 1998 Scott Dattalo + Copyright (C) 2009 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include +#include +#include +#include + + +#include "config.h" +#include "pic-processor.h" +#include "14bit-processors.h" // %%% FIXME %%% remove the dependencies on this +#include "pic-ioports.h" +//#include "interface.h" +#include "psp.h" + +//#include "xref.h" +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("%s:%d ",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +//------------------------------------------------------------------- +// +// ioports.cc +// +// The ioport infrastructure for gpsim is provided here. The class +// taxonomy for the IOPORT class is: +// +// file_register +// |-> sfr_register +// |-> IOPORT +// |-> PORTA +// |-> PORTB +// |-> PORTC +// |-> PORTD +// |-> PORTE +// |-> PORTF +// +// Each I/O port has an associated array of I/O pins which provide an +// interface to the virtual external world of the stimuli. +// +//------------------------------------------------------------------- + +class PicSignalSource : public SignalControl +{ +public: + PicSignalSource(PortRegister *_reg, uint bitPosition) + : m_register(_reg), m_bitMask(1<getDriving()&m_bitMask)!=0)?'1':'0') : 'Z'; + /**/ + Dprintf(("PicSignalSource::getState() %s bitmask:0x%x state:%c\n", + (m_register?m_register->name().c_str():"NULL"), + m_bitMask,r)); + /**/ + return r; + } + void release() + { + delete this; + } +private: + PortRegister *m_register; + uint m_bitMask; +}; + + + +//------------------------------------------------------------------------ + +PicPortRegister::PicPortRegister(Processor *pCpu, const char *pName, const char *pDesc, + /*const char *port_name,*/ + uint numIopins, + uint enableMask) + : PortRegister(pCpu, pName, pDesc,numIopins, false), m_tris(0) +{ + setEnableMask(enableMask); +} + +class PicSignalControl : public SignalControl +{ +public: + PicSignalControl(PicTrisRegister *_reg, uint bitPosition) + : m_register(_reg), m_bitMask(1<get3StateBit(m_bitMask) : '?'; + } + virtual void release() + { + delete this; + } +private: + PicTrisRegister *m_register; + uint m_bitMask; +}; + +void PicPortRegister::setTris(PicTrisRegister *new_tris) +{ + if (!m_tris) + m_tris = new_tris; + + uint mask = getEnableMask(); + for (uint i=0, m = 1; isetTris(this); +} +void PicTrisRegister::put(uint new_value) +{ + value.put((value.get() & ~m_EnableMask) | (new_value & m_EnableMask)); + + if (m_port)m_port->updatePort(); +} + +void PicTrisRegister::put_value(uint new_value) +{ + value.put(new_value & m_EnableMask); + + if (m_port) m_port->updatePort(); +} + +uint PicTrisRegister::get() +{ + return value.data; +} + +void PicTrisRegister::setEnableMask(uint enableMask) +{ + m_EnableMask = enableMask; +} + +char PicTrisRegister::get3StateBit(uint bitMask) +{ + RegisterValue rv = getRV_notrace(); + uint enabled = bitMask & m_EnableMask; + if (!enabled) return '1'; + + return (rv.init & enabled) ? '?' : ((rv.data & enabled) ? '1': '0'); +} + +void PicTrisRegister::reset(RESET_TYPE r) +{ + if (!(m_bIgnoreWDTResets && r==WDT_RESET)) + putRV(por_value); +} + + +//------------------------------------------------------------------------ + +PicPSP_TrisRegister::PicPSP_TrisRegister(Processor *pCpu, const char *pName, const char *pDesc, + /*const char *tris_name, */ + PicPortRegister *_port, bool bIgnoreWDTResets) + : PicTrisRegister(pCpu, pName, pDesc,_port,bIgnoreWDTResets) +{ +} +// If not in PSPMODE, OBF and IBF are always clear +// When in PSPMODE, OBF and IBF can only be cleared by reading and writing +// to the PSP parallel port and are set by bus transfers. +// +void PicPSP_TrisRegister::put(uint new_value) +{ + uint mask = (PSP::OBF | PSP::IBF); + uint fixed; + + if (! (new_value & PSP::PSPMODE)) + fixed = 0; + else + fixed = value.data & mask; + + value.data = (new_value & ~mask) | fixed; + if (m_port) m_port->updatePort(); +} +// used by gpsim to change register value +void PicPSP_TrisRegister::put_value(uint new_value) +{ + value.data = new_value; + if (m_port) m_port->updatePort(); +} + +uint PicPSP_TrisRegister::get(void) +{ + return value.data; +} + + +//------------------------------------------------------------------------ + + + +PicPortBRegister::PicPortBRegister(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *pIntcon, + uint numIopins, + uint enableMask, + INTCON2 *pIntcon2, + INTCON3 *pIntcon3) + : PicPortRegister(pCpu, pName, pDesc, numIopins, enableMask), + m_bRBPU(false), + m_bIntEdge(true), + m_bsRBPU(0), + m_pIntcon(pIntcon), + m_pIntcon2(pIntcon2), + m_pIntcon3(pIntcon3) +{ + assert(m_pIntcon); +} + +PicPortBRegister::~PicPortBRegister() +{ + delete m_bsRBPU; +} +//------------------------------------------------------------------------ + +void PicPortBRegister::put(uint new_value) +{ +// uint diff = mEnableMask & (new_value ^ value.data); + drivingValue = new_value & mEnableMask; + value.data = drivingValue; + // If no stimuli are connected to the Port pins, then the driving + // value and the driven value are the same. If there are external + // stimuli (or perhaps internal peripherals) overdriving or overriding + // this port, then the call to updatePort() will update 'drivenValue' + // to its proper value. + updatePort(); + lastDrivenValue = rvDrivenValue; +} + +uint PicPortBRegister::get() +{ + lastDrivenValue = rvDrivenValue; + return mOutputMask & rvDrivenValue.data; +} + +//------------------------------------------------------------------------ +// setbit +// FIXME - a sink should be created for the intf and rbif functions. + +void PicPortBRegister::setbit(uint bit_number, char new3State) +{ + Dprintf(("PicPortBRegister::setbit() bit=%u,val=%c bIntEdge=%d\n", + bit_number, new3State, m_bIntEdge)); + + // interrupt bit 0 on specified edge + bool bNewValue = new3State=='1' || new3State=='W'; + lastDrivenValue = rvDrivenValue; + PortRegister::setbit(bit_number, new3State); + + if (m_pIntcon3) + { + bool drive = (lastDrivenValue.data&(1 << bit_number)) ; + bool level; + int intcon2 = m_pIntcon2->value.get(); + int intcon3 = m_pIntcon3->value.get(); + switch(bit_number) + { + case 0: + level = intcon2 & INTCON2::INTEDG0; + if ((drive != level) && (bNewValue == level)) + { + cpu_pic->exit_sleep(); + m_pIntcon->set_intf(true); +// if (((intcon3 & INTCON::INTE) == 0) || +// (m_pIntcon->value.get() & INTCON_16::GIEH) == 0) +// return; // Interrupts are disabled +// ((INTCON_16 *)m_pIntcon)->set_interrupt_vector(INTERRUPT_VECTOR_HI); +// cpu_pic->BP_set_interrupt(); + } + return; + break; + + case 1: + level = intcon2 & INTCON2::INTEDG1; + if ((drive != level) && (bNewValue == level)) + { + cpu_pic->exit_sleep(); + m_pIntcon3->set_int1f(true); + if (((intcon3 & INTCON3::INT1IE) == 0) || + (m_pIntcon->value.get() & INTCON_16::GIEH) == 0) + return; // Interrupts are disabled + if (intcon3 & INTCON3::INT1IP) //priority interrupt + { + ((INTCON_16 *)m_pIntcon)->set_interrupt_vector(INTERRUPT_VECTOR_HI); + cpu_pic->BP_set_interrupt(); + } + else if ((m_pIntcon->value.get() & INTCON_16::GIEL) != 0) + { + ((INTCON_16 *)m_pIntcon)->set_interrupt_vector(INTERRUPT_VECTOR_LO); + cpu_pic->BP_set_interrupt(); + } + } + return; + break; + + case 2: + level = intcon2 & INTCON2::INTEDG2; + if ((drive != level) && (bNewValue == level)) + { + cpu_pic->exit_sleep(); + m_pIntcon3->set_int2f(true); + if (((intcon3 & INTCON3::INT2IE) == 0) || + (m_pIntcon->value.get() & INTCON_16::GIEH) == 0) + return; // Interrupts are disabled + if (intcon3 & INTCON3::INT2IP) //priority interrupt + { + ((INTCON_16 *)m_pIntcon)->set_interrupt_vector(INTERRUPT_VECTOR_HI); + cpu_pic->BP_set_interrupt(); + } + else if ((m_pIntcon->value.get() & INTCON_16::GIEL) != 0) + { + ((INTCON_16 *)m_pIntcon)->set_interrupt_vector(INTERRUPT_VECTOR_LO); + cpu_pic->BP_set_interrupt(); + } + } + return; + break; + + case 3: + level = intcon2 & INTCON2::INTEDG3; + if ((drive != level) && (bNewValue == level)) + { + cpu_pic->exit_sleep(); + m_pIntcon3->set_int3f(true); + if (((intcon3 & INTCON3::INT3IE) == 0) || + (m_pIntcon->value.get() & INTCON_16::GIEH) == 0) + return; // Interrupts are disabled + if (intcon2 & INTCON2::INT3IP) //priority interrupt + { + ((INTCON_16 *)m_pIntcon)->set_interrupt_vector(INTERRUPT_VECTOR_HI); + cpu_pic->BP_set_interrupt(); + } + else if ((m_pIntcon->value.get() & INTCON_16::GIEL) != 0) + { + ((INTCON_16 *)m_pIntcon)->set_interrupt_vector(INTERRUPT_VECTOR_LO); + cpu_pic->BP_set_interrupt(); + } + } + return; + break; + } + } + if (bit_number == 0 && (((lastDrivenValue.data&1)==1)!=m_bIntEdge) + && (bNewValue == m_bIntEdge)) + { + if ((m_pIntcon->get() & (INTCON::GIE | INTCON::INTE)) == INTCON::INTE) + { + cpu_pic->exit_sleep(); + } + m_pIntcon->set_intf(true); + } + + + + // interrupt and exit sleep level change top 4 bits on input + uint bitMask = (1<get_value() & bitMask ) { + + if ((m_pIntcon->get() & (INTCON::GIE | INTCON::RBIE)) == INTCON::RBIE) + cpu_pic->exit_sleep(); + m_pIntcon->set_rbif(true); + } +} + +class RBPUBitSink : public BitSink +{ + PicPortBRegister *m_pPortB; +public: + RBPUBitSink(PicPortBRegister *pPortB) + : m_pPortB(pPortB) + {} + + void setSink(bool b) + { + if (m_pPortB) + m_pPortB->setRBPU(b); + } +}; + +void PicPortBRegister::assignRBPUSink(uint bitPos, sfr_register *pSFR) +{ + if (pSFR && !m_bsRBPU) { + m_bsRBPU = new RBPUBitSink(this); + if (!pSFR->assignBitSink(bitPos, m_bsRBPU)) { + delete m_bsRBPU; + m_bsRBPU = 0; + } + } +} + +void PicPortBRegister::setRBPU(bool bNewRBPU) +{ + m_bRBPU = !bNewRBPU; + + Dprintf(("PicPortBRegister::setRBPU() =%d\n",(m_bRBPU?1:0))); + + uint mask = getEnableMask(); + for (uint i=0, m=1; mask; i++, m<<= 1) + if (mask & m) { + mask ^= m; + operator[](i).getPin().update_pullup(m_bRBPU ? '1' : '0',true); + } + +} + +void PicPortBRegister::setIntEdge(bool bNewIntEdge) +{ + m_bIntEdge = bNewIntEdge; +} + +PicPortGRegister::PicPortGRegister(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *pIntcon, IOC *pIoc, + uint numIopins, uint enableMask) + : PicPortBRegister(pCpu, pName, pDesc, pIntcon, numIopins, enableMask), + m_pIntcon(pIntcon), m_pIoc(pIoc), intf_bit(2) +{ + m_pIntcon->set_portGReg(this); +} +// set_rbif involves RBIF,RBIE in INTCON which are the same bits as GPIF,GPIE +void PicPortGRegister::setIOCif() +{ + // interrupt and exit sleep for level change on bits where IOC set + int bitMask = m_pIoc->get_value(); + + + if ( (lastDrivenValue.data ^ rvDrivenValue.data) & m_tris->get_value() & bitMask ) { + cpu_pic->exit_sleep(); + m_pIntcon->set_rbif(true); + } +} +void PicPortGRegister::setbit(uint bit_number, char new3State) +{ + // interrupt bit intf_bit (default 2) on specified edge + bool bOldValue = (rvDrivenValue.data & (1<set_intf(true); + } + lastDrivenValue = rvDrivenValue; + PortRegister::setbit(bit_number, new3State); + + setIOCif(); +} + + +void PicPortIOCRegister::setbit(uint bit_number, char new3State) +{ + int lastDrivenValue = rvDrivenValue.data & (1 << bit_number); + PortRegister::setbit(bit_number, new3State); + int newDrivenValue = rvDrivenValue.data & (1 << bit_number); + + if ( newDrivenValue > lastDrivenValue) // positive edge + { + if ( m_tris->get_value() & (m_Iocap->get_value() & (1 << bit_number))) + { + cpu_pic->exit_sleep(); + m_pIntcon->set_rbif(true); + if (m_Iocaf) + m_Iocaf->put(m_Iocaf->get_value() | (1 << bit_number)); + } + } + else if ( newDrivenValue < lastDrivenValue) // negative edge + { + if ( m_tris->get_value() & (m_Iocan->get_value() & (1 << bit_number))) + { + cpu_pic->exit_sleep(); + m_pIntcon->set_rbif(true); + if (m_Iocaf) + m_Iocaf->put(m_Iocaf->get_value() | (1 << bit_number)); + } + } +} + +PicPSP_PortRegister::PicPSP_PortRegister(Processor *pCpu, const char *pName, const char *pDesc, + /*const char *port_name,*/ + uint numIopins, + uint enableMask) + : PortRegister(pCpu, pName, pDesc,numIopins, false), m_tris(0), m_psp(0) +{ + setEnableMask(enableMask); +} + +void PicPSP_PortRegister::put(uint new_value) +{ + uint diff = mEnableMask & (new_value ^ value.data); + + if (m_psp && m_psp->pspmode()) + { + m_psp->psp_put(new_value); + } + else if(diff) { + drivingValue = new_value & mEnableMask; + value.data = drivingValue; + // If no stimuli are connected to the Port pins, then the driving + // value and the driven value are the same. If there are external + // stimuli (or perhaps internal peripherals) overdriving or overriding + // this port, then the call to updatePort() will update 'drivenValue' + // to its proper value. + updatePort(); + } + +} +uint PicPSP_PortRegister::get() +{ + + if (m_psp && m_psp->pspmode()) + return(m_psp->psp_get()); + + return rvDrivenValue.data; +} + + +void PicPSP_PortRegister::setTris(PicTrisRegister *new_tris) +{ + if (!m_tris) + m_tris = new_tris; + + uint mask = getEnableMask(); + for (uint i=0, m = 1; iput_value(value.data); +} +void PicLatchRegister::put_value(uint new_value) +{ + value.data = new_value & m_EnableMask; + m_port->put_value(value.data); +} +uint PicLatchRegister::get() +{ + value.data = m_port->getDriving(); + return value.data; +} +void PicLatchRegister::setbit(uint bit_number, char new_value) +{ + printf("PicLatchRegister::setbit() -- shouldn't be called\n"); +} +void PicLatchRegister::setEnableMask(uint nEnableMask) +{ + m_EnableMask = nEnableMask; +} + diff --git a/src/gpsim/pic-ioports.h b/src/gpsim/pic-ioports.h new file mode 100644 index 0000000..3994b35 --- /dev/null +++ b/src/gpsim/pic-ioports.h @@ -0,0 +1,197 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + Copyright (C) 2009 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __PIC_IOPORTS_H__ +#define __PIC_IOPORTS_H__ + +#include "ioports.h" + +///------------------------------------------------------------ +class PicTrisRegister; +class PicPortRegister : public PortRegister +{ +public: + PicPortRegister(Processor *pCpu, const char *pName, const char *pDesc, + /*const char *port_name, */ + uint numIopins, uint enableMask=0xff); + void setTris(PicTrisRegister *new_tris); + Register *getTris(); +protected: + PicTrisRegister *m_tris; +}; + +class PicTrisRegister : public sfr_register +{ + +public: + + PicTrisRegister(Processor *pCpu, const char *pName, const char *pDesc, + /*const char *tris_name, */ + PicPortRegister *,bool bIgnoreWDTResets, uint nEnableMask=0xff); + virtual void put(uint new_value); + virtual void put_value(uint new_value); + virtual uint get(); + virtual char get3StateBit(uint bitMask); + void setEnableMask(uint); + uint getEnableMask() { return m_EnableMask; } + void reset(RESET_TYPE r); +protected: + PicPortRegister *m_port; + uint m_EnableMask; + bool m_bIgnoreWDTResets; +}; + +class INTCON; +class INTCON2; +class INTCON3; +// PicPortBRegister is usually used for portb and interrupts on selected edge +// of bit 0 and sleep wakeup and interrupt on level changes for bits 4-7. +class PicPortBRegister : public PicPortRegister +{ +public: + PicPortBRegister(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *pIntcon, + uint numIopins, + uint enableMask=0xff, + INTCON2 *pIntcon2 = NULL, + INTCON3 *pIntcon3 = NULL + ); + ~PicPortBRegister(); + + virtual void put(uint new_value); + virtual uint get(); + virtual void setbit(uint bit_number, char new_value); + void setRBPU(bool); + void setIntEdge(bool); + void assignRBPUSink(uint bitPos, sfr_register *); +protected: + enum { + eIntEdge = 1<<6, + eRBPU = 1<<7 + }; + bool m_bRBPU; + bool m_bIntEdge; + + BitSink *m_bsRBPU; + INTCON *m_pIntcon; + INTCON2 *m_pIntcon2; + INTCON3 *m_pIntcon3; + RegisterValue lastDrivenValue; +}; + +class IOC; +class IOCxF; +// Like PicPortBRegister, PicPortGRegister allows wakeup from sleep +// and interrupt on pin level change. However, PicPortGRegister +// uses IOC to determine which of any of the bits will do this. +// Note: as GPIF,GPIE are the same bits as RBIF,RBIE in INTCON we can +// use the existing set_rbif function to set the GPIF bit. +// +// +class PicPortGRegister : public PicPortBRegister +{ + +public: + INTCON *m_pIntcon; + IOC *m_pIoc; + uint intf_bit; // port bit that can trigger intf interrupt + + PicPortGRegister(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *pIntcon, IOC *pIoc, + uint numIopins, uint enableMask=0x3f); + + virtual void setbit(uint bit_number, char new3State); + virtual void setIOCif(); + +}; +class PicPortIOCRegister : public PicPortBRegister +{ + +public: + INTCON *m_pIntcon; + IOC *m_Iocap; // pins which can cause interrupts on positive edge + IOC *m_Iocan; // pins which can cause interrupts on negative edge + IOCxF *m_Iocaf; // which pins triggered interrupt + + PicPortIOCRegister(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *pIntcon, IOC *pIocap, IOC *pIocan, IOCxF *pIocaf, + uint numIopins, uint enableMask=0x3f) + : PicPortBRegister(pCpu, pName, pDesc, pIntcon, numIopins, enableMask), + m_pIntcon(pIntcon), m_Iocap(pIocap), m_Iocan(pIocan), m_Iocaf(pIocaf) + { + } + + virtual void setbit(uint bit_number, char new3State); +}; + +class PSP; + +class PicPSP_PortRegister : public PortRegister +{ +public: + PicPSP_PortRegister(Processor *pCpu, const char *pName, const char *pDesc, + /*const char *port_name, */ + uint numIopins, uint enableMask); + virtual void put(uint new_value); + virtual uint get(); + void setPSP(PSP *pspReg) { m_psp = pspReg;} + void setTris(PicTrisRegister *new_tris); + Register *getTris(); +protected: + PicTrisRegister *m_tris; + PSP *m_psp; +}; + +class PicPSP_TrisRegister : public PicTrisRegister +{ + +public: + + PicPSP_TrisRegister(Processor *pCpu, const char *pName, const char *pDesc, + /*const char *tris_name, */ + PicPortRegister *,bool bIgnoreWDTResets); + virtual void put(uint new_value); + virtual void put_value(uint new_value); + virtual uint get(); +}; + +//------------------------------------------------------------------------ +// PicLatchRegister - 16bit-core devices +class PicLatchRegister : public sfr_register +{ +public: + virtual void put(uint new_value); + virtual void put_value(uint new_value); + virtual uint get(); + virtual void setbit(uint bit_number, char new_value); + + virtual void setEnableMask(uint nEnableMask); + + PicLatchRegister(Processor *pCpu, const char *pName, const char *pDesc, + /*const char *, */ + PortRegister *,uint nEnableMask=0xff); + +protected: + PortRegister *m_port; + uint m_EnableMask; +}; + +#endif // __PIC_IOPORTS_H__ diff --git a/src/gpsim/pic-processor.cc b/src/gpsim/pic-processor.cc new file mode 100644 index 0000000..bf63ac0 --- /dev/null +++ b/src/gpsim/pic-processor.cc @@ -0,0 +1,1276 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include +#include +#ifdef _WIN32 +#include "unistd.h" +#else +#include +#endif +#ifndef _MSC_VER +#include +#endif +#include +#include +#include +#include + +#include "config.h" +#include "pic-processor.h" +#include "pic-registers.h" +#include "stimuli.h" + +#include "p16x5x.h" +#include "p16f62x.h" +#include "p16f8x.h" +#include "p16f88x.h" +#include "p16x8x.h" +#include "p16f87x.h" +#include "p16x6x.h" +#include "p16x7x.h" +#include "p16f91x.h" +#include "p12x.h" +#include "p12f6xx.h" +#include "p1xf1xxx.h" +#ifdef P17C7XX // code no longer works +#include "p17c75x.h" +#endif +#include "p18x.h" +#include "p18fk.h" +#include "clock_phase.h" + + +//================================================================================ +// +// pic_processor +// +// This file contains all (most?) of the code that simulates those features +// common to all pic microcontrollers. +// +// + +ProcessorConstructor pP10F200( P10F200::construct , "__10F200", "pic10f200", "p10f200", "10f200"); +ProcessorConstructor pP10F202(P10F202::construct , "__10F202", "pic10f202", "p10f202", "10f202"); +ProcessorConstructor pP10F204(P10F204::construct , "__10F204", "pic10f204", "p10f204", "10f204"); +ProcessorConstructor pP10F220(P10F220::construct , "__10F220", "pic10f220", "p10f220", "10f220"); +ProcessorConstructor pP10F222(P10F222::construct , "__10F222", "pic10f222", "p10f222", "10f222"); +ProcessorConstructor pP10F320(P10F320::construct , "__10F320", "pic10f320", "p10f320", "10f320"); +ProcessorConstructor pP10LF320(P10LF320::construct , "__10LF320", "pic10lf320", "p10lf320", "10lf320"); +ProcessorConstructor pP10F322(P10F322::construct , "__10F322", "pic10f322", "p10f322", "10f322"); +ProcessorConstructor pP10LF322(P10LF322::construct , "__10LF322", "pic10lf322", "p10lf322", "10lf322"); +ProcessorConstructor pP12C508(P12C508::construct , "__12C508", "pic12c508", "p12c508", "12c508"); +ProcessorConstructor pP12C509(P12C509::construct , "__12C509", "pic12c509", "p12c509", "12c509"); +ProcessorConstructor pP12CE518(P12CE518::construct , "__12ce518", "pic12ce518", "p12ce518", "12ce518"); +ProcessorConstructor pP12CE519(P12CE519::construct , "__12ce519", "pic12ce519", "p12ce519", "12ce519"); +ProcessorConstructor pP12F508(P12F508::construct , "__12F508", "pic12f508", "p12f508", "12f508"); +ProcessorConstructor pP12F509(P12F509::construct , "__12F509", "pic12f509", "p12f509", "12f509"); +ProcessorConstructor pP12F510(P12F510::construct , "__12F510", "pic12f510", "p12f510", "12f510"); +ProcessorConstructor pP12F629(P12F629::construct , "__12F629", "pic12f629", "p12f629", "12f629"); +ProcessorConstructor pP12F675(P12F675::construct , "__12F675", "pic12f675", "p12f675", "12f675"); +ProcessorConstructor pP12F683(P12F683::construct , "__12F683", "pic12f683", "p12f683", "12f683"); +ProcessorConstructor pP12F1822(P12F1822::construct , "__12F1822", "pic12f1822", "p12f1822", "12f1822"); +ProcessorConstructor pP12LF1822(P12LF1822::construct , "__12LF1822", "pic12lf1822", "p12lf1822", "12lf1822"); +ProcessorConstructor pP12F1840(P12F1840::construct , "__12F1840", "pic12f1840", "p12f1840", "12f1840"); +ProcessorConstructor pP12LF1840(P12LF1840::construct , "__12LF1840", "pic12lf1840", "p12lf1840", "12lf1840"); +ProcessorConstructor pP16C54(P16C54::construct , "__16C54", "pic16c54", "p16c54", "16c54"); +ProcessorConstructor pP16C55(P16C55::construct , "__16C55", "pic16c55", "p16c55", "16c55"); +ProcessorConstructor pP16C56(P16C56::construct , "__16C56", "pic16c56", "p16c56", "16c56"); +ProcessorConstructor pP16C61(P16C61::construct , "__16C61", "pic16c61", "p16c61", "16c61"); +ProcessorConstructor pP16C62(P16C62::construct , "__16C62", "pic16c62", "p16c62", "16c62"); +ProcessorConstructor pP16C62A(P16C62::construct , "__16C62A", "pic16c62a", "p16c62a", "16c62a"); +ProcessorConstructor pP16CR62(P16C62::construct , "__16CR62", "pic16cr62", "p16cr62", "16cr62"); +ProcessorConstructor pP16C63(P16C63::construct , "__16C63", "pic16c63", "p16c63", "16c63"); +ProcessorConstructor pP16C64(P16C64::construct , "__16C64", "pic16c64", "p16c64", "16c64"); +ProcessorConstructor pP16C65(P16C65::construct , "__16C65", "pic16c65", "p16c65", "16c65"); +ProcessorConstructor pP16C65A(P16C65::construct , "__16C65A", "pic16c65a", "p16c65a", "16c65a"); +ProcessorConstructor pP16C71(P16C71::construct , "__16C71", "pic16c71", "p16c71", "16c71"); +ProcessorConstructor pP16C712(P16C712::construct , "__16C712", "pic16c712", "p16c712", "16c712"); +ProcessorConstructor pP16C716(P16C716::construct , "__16C716", "pic16c716", "p16c716", "16c716"); +ProcessorConstructor pP16C72(P16C72::construct , + "__16C72", "pic16c72", "p16c72", "16c72"); +ProcessorConstructor pP16C73(P16C73::construct , + "__16C73", "pic16c73", "p16c73", "16c73"); +ProcessorConstructor pP16C74(P16C74::construct , + "__16C74", "pic16c74", "p16c74", "16c74"); +ProcessorConstructor pP16C84(P16C84::construct , + "__16C84", "pic16c84", "p16c84", "16c84"); +ProcessorConstructor pP16CR83(P16CR83::construct , + "__16CR83", "pic16cr83", "p16cr83", "16cr83"); +ProcessorConstructor pP16CR84(P16CR84::construct , + "__16CR84", "pic16cr84", "p16cr84", "16cr84"); +ProcessorConstructor pP16F505(P16F505::construct , + "__16F505", "pic16f505", "p16f505", "16f505"); +ProcessorConstructor pP16F73(P16F73::construct , + "__16F73", "pic16f73", "p16f73", "16f73"); +ProcessorConstructor pP16F74(P16F74::construct , + "__16F74", "pic16f74", "p16f74", "16f74"); +ProcessorConstructor pP16F716(P16F716::construct , + "__16F716", "pic16f716", "p16f716", "16f716"); +ProcessorConstructor pP16F83(P16F83::construct , + "__16F83", "pic16f83", "p16f83", "16f83"); +ProcessorConstructor pP16F84(P16F84::construct , + "__16F84", "pic16f84", "p16f84", "16f84"); +ProcessorConstructor pP16F87(P16F87::construct , + "__16F87", "pic16f87", "p16f87", "16f87"); +ProcessorConstructor pP16F88(P16F88::construct , + "__16F88", "pic16f88", "p16f88", "16f88"); +ProcessorConstructor pP16F882(P16F882::construct , + "__16F882", "pic16f882", "p16f882", "16f882"); +ProcessorConstructor pP16F883(P16F883::construct , + "__16F883", "pic16f883", "p16f883", "16f883"); +ProcessorConstructor pP16F884(P16F884::construct , + "__16F884", "pic16f884", "p16f884", "16f884"); +ProcessorConstructor pP16F886(P16F886::construct , + "__16F886", "pic16f886", "p16f886", "16f886"); +ProcessorConstructor pP16F887(P16F887::construct , + "__16F887", "pic16f887", "p16f887", "16f887"); +ProcessorConstructor pP16F627(P16F627::construct , + "__16F627", "pic16f627", "p16f627", "16f627"); +ProcessorConstructor pP16F627A(P16F627::construct , + "__16F627A", "pic16f627a", "p16f627a", "16f627a"); +ProcessorConstructor pP16F628(P16F628::construct , + "__16F628", "pic16f628", "p16f628", "16f628"); +ProcessorConstructor pP16F628A(P16F628::construct , + "__16F628A", "pic16f628a", "p16f628a", "16f628a"); +ProcessorConstructor pP16F630(P16F630::construct , + "__16F630", "pic16f630", "p16f630", "16f630"); +ProcessorConstructor pP16F631(P16F631::construct , + "__16F631", "pic16f631", "p16f631", "16f631"); +ProcessorConstructor pP16F648(P16F648::construct , + "__16F648", "pic16f648", "p16f648", "16f648"); +ProcessorConstructor pP16F648A(P16F648::construct , + "__16F648A", "pic16f648a", "p16f648a", "16f648a"); +ProcessorConstructor pP16F676(P16F676::construct , + "__16F676", "pic16f676", "p16f676", "16f676"); +ProcessorConstructor pP16F677(P16F677::construct , + "__16F677", "pic16f677", "p16f677", "16f677"); +ProcessorConstructor pP16F684(P16F684::construct , + "__16F684", "pic16f684", "p16f684", "16f684"); +ProcessorConstructor pP16F685(P16F685::construct , + "__16F685", "pic16f685", "p16f685", "16f685"); +ProcessorConstructor pP16F687(P16F687::construct , + "__16F687", "pic16f687", "p16f687", "16f687"); +ProcessorConstructor pP16F689(P16F689::construct , + "__16F689", "pic16f689", "p16f689", "16f689"); +ProcessorConstructor pP16F690(P16F690::construct , + "__16F690", "pic16f690", "p16f690", "16f690"); +ProcessorConstructor pP16F818(P16F818::construct , + "__16F818", "pic16f818", "p16f818", "16f818"); +ProcessorConstructor pP16F819(P16F819::construct , + "__16F819", "pic16f819", "p16f819", "16f819"); +ProcessorConstructor pP16F871(P16F871::construct , + "__16F871", "pic16f871", "p16f871", "16f871"); +ProcessorConstructor pP16F873(P16F873::construct , + "__16F873", "pic16f873", "p16f873", "16f873"); +ProcessorConstructor pP16F874(P16F874::construct , + "__16F874", "pic16f874", "p16f874", "16f874"); +ProcessorConstructor pP16F876(P16F876::construct , + "__16F876", "pic16f876", "p16f876", "16f876"); +ProcessorConstructor pP16F877(P16F877::construct , + "__16F877", "pic16f877", "p16f877", "16f877"); +ProcessorConstructor pP16F873A(P16F873A::construct , + "__16F873a", "pic16f873a", "p16f873a", "16f873a"); +ProcessorConstructor pP16F874A(P16F874A::construct , + "__16F874a", "pic16f874a", "p16f874a", "16f874a"); +ProcessorConstructor pP16F876A(P16F876A::construct , + "__16F876a", "pic16f876a", "p16f876a", "16f876a"); +ProcessorConstructor pP16F877A(P16F877A::construct , + "__16F877a", "pic16f877a", "p16f877a", "16f877a"); +ProcessorConstructor pP16F913(P16F913::construct , + "__16F913", "pic16f913", "p16f913", "16f913"); +ProcessorConstructor pP16F914(P16F914::construct , + "__16F914", "pic16f914", "p16f914", "16f914"); +ProcessorConstructor pP16F916(P16F916::construct , + "__16F916", "pic16f916", "p16f916", "16f916"); +ProcessorConstructor pP16F917(P16F917::construct , + "__16F917", "pic16f917", "p16f917", "16f917"); +ProcessorConstructor pP16F1503(P16F1503::construct , + "__16F1503", "pic16f1503", "p16f1503", "16f1503"); +ProcessorConstructor pP16LF1503(P16LF1503::construct , + "__16LF1503", "pic16lf1503", "p16lf1503", "16lf1503"); +ProcessorConstructor pP16F1788(P16F1788::construct , + "__16F1788", "pic16f1788", "p16f1788", "16f1788"); +ProcessorConstructor pP16LF1788(P16LF1788::construct , + "__16LF1788", "pic16lf1788", "p16lf1788", "16lf1788"); +ProcessorConstructor pP16F1823(P16F1823::construct , + "__16F1823", "pic16f1823", "p16f1823", "16f1823"); +ProcessorConstructor pP16LF1823(P16LF1823::construct , + "__16LF1823", "pic16lf1823", "p16lf1823", "16lf1823"); +ProcessorConstructor pP16F1825( P16F1825::construct , + "__16F1825", "pic16f1825", "p16f1825", "16f1825"); +ProcessorConstructor pP16LF1825( P16F1825::construct , "__16LF1825", "pic16lf1825", "p16lf1825", "16lf1825"); +#ifdef P17C7XX // code no longer works +ProcessorConstructor pP17C7xx(P17C7xx::construct , + "__17C7xx", "pic17c7xx", "p17c7xx", "17c7xx"); +ProcessorConstructor pP17C75x(P17C75x::construct , + "__17C75x", "pic17c75x", "p17c75x", "17c75x"); +ProcessorConstructor pP17C752(P17C752::construct , + "__17C752", "pic17c752", "p17c752", "17c752"); +ProcessorConstructor pP17C756(P17C756::construct , + "__17C756", "pic17c756", "p17c756", "17c756"); +ProcessorConstructor pP17C756A(P17C756A::construct , + "__17C756A", "pic17c756a", "p17c756a", "17c756a"); +ProcessorConstructor pP17C762(P17C762::construct , + "__17C762", "pic17c762", "p17c762", "17c762"); +ProcessorConstructor pP17C766(P17C766::construct , + "__17C766", "pic17c766", "p17c766", "17c766"); +#endif // P17C7XX +ProcessorConstructor pP18C242(P18C242::construct , + "__18C242", "pic18c242", "p18c242", "18c242"); +ProcessorConstructor pP18C252(P18C252::construct , + "__18C252", "pic18c252", "p18c252", "18c252"); +ProcessorConstructor pP18C442(P18C442::construct , + "__18C442", "pic18c442", "p18c442", "18c442"); +ProcessorConstructor pP18C452(P18C452::construct , + "__18C452", "pic18c452", "p18c452", "18c452"); +ProcessorConstructor pP18F242(P18F242::construct , + "__18F242", "pic18f242", "p18f242", "18f242"); +ProcessorConstructor pP18F248(P18F248::construct , + "__18F248", "pic18f248", "p18f248", "18f248"); +ProcessorConstructor pP18F258(P18F258::construct , + "__18F258", "pic18f258", "p18f258", "18f258"); +ProcessorConstructor pP18F252(P18F252::construct , + "__18F252", "pic18f252", "p18f252", "18f252"); +ProcessorConstructor pP18F442(P18F442::construct , + "__18F442", "pic18f442", "p18f442", "18f442"); +ProcessorConstructor pP18F448(P18F448::construct , + "__18F448", "pic18f448", "p18f448", "18f448"); +ProcessorConstructor pP18F458(P18F458::construct , + "__18F458", "pic18f458", "p18f458", "18f458"); +ProcessorConstructor pP18F452(P18F452::construct, + "__18F452", "pic18f452", "p18f452", "18f452"); +ProcessorConstructor pP18F1220(P18F1220::construct, + "__18F1220", "pic18f1220", "p18f1220", "18f1220"); +ProcessorConstructor pP18F1320(P18F1320::construct, + "__18F1320", "pic18f1320", "p18f1320", "18f1320"); +ProcessorConstructor pP18F14K22(P18F14K22::construct, + "__18F14K22", "pic18f14k22", "p18f14k22", "18f14k22"); +ProcessorConstructor pP18F2221(P18F2221::construct, + "__18F2221", "pic18f2221", "p18f2221", "18f2221"); +ProcessorConstructor pP18F2321(P18F2321::construct, + "__18F2321", "pic18f2321", "p18f2321", "18f2321"); +ProcessorConstructor pP18F2420(P18F2420::construct, + "__18F2420", "pic18f2420", "p18f2420", "18f2420"); +ProcessorConstructor pP18F2455(P18F2455::construct, + "__18F2455", "pic18f2455", "p18f2455", "18f2455"); +ProcessorConstructor pP18F2520(P18F2520::construct, + "__18F2520", "pic18f2520", "p18f2520", "18f2520"); +ProcessorConstructor pP18F2525(P18F2525::construct, + "__18F2525", "pic18f2525", "p18f2525", "18f2525"); +ProcessorConstructor pP18F2550(P18F2550::construct, + "__18F2550", "pic18f2550", "p18f2550", "18f2550"); +ProcessorConstructor pP18F2620(P18F2620::construct, + "__18F2620", "pic18f2620", "p18f2620", "18f2620"); +ProcessorConstructor pP18F26K22(P18F26K22::construct, + "__18F26K22", "pic18f26k22", "p18f26k22", "18f26k22"); +ProcessorConstructor pP18F4221(P18F4221::construct, + "__18F4221", "pic18f4221", "p18f4221", "18f4221"); +ProcessorConstructor pP18F4321(P18F4321::construct, + "__18F4321", "pic18f4321", "p18f4321", "18f4321"); +ProcessorConstructor pP18F4420(P18F4420::construct, + "__18F4420", "pic18f4420", "p18f4420", "18f4420"); +ProcessorConstructor pP18F4520(P18F4520::construct, + "__18F4520", "pic18f4520", "p18f4520", "18f4520"); +ProcessorConstructor pP18F4550(P18F4550::construct, + "__18F4550", "pic18f4550", "p18f4550", "18f4550"); +ProcessorConstructor pP18F4455(P18F4455::construct, + "__18F4455", "pic18f4455", "p18f4455", "18f4455"); +ProcessorConstructor pP18F4620(P18F4620::construct, + "__18F4620", "pic18f4620", "p18f4620", "18f4620"); +ProcessorConstructor pP18F6520(P18F6520::construct, + "__18F6520", "pic18f6520", "p18f6520", "18f6520"); + + +//======================================================================== + +void pic_processor::set_eeprom( EEPROM *e ) +{ + eeprom = e; + if (e) ema.set_Registers(e->rom, e->rom_size); +} + +void pic_processor::BP_set_interrupt() +{ + mCaptureInterrupt->firstHalf(); +} + +//------------------------------------------------------------------- +// +// sleep - Begin sleeping and stay asleep until something causes a wake +// +void pic_processor::sleep () +{ +} +//------------------------------------------------------------------- +// +// enter_sleep - The processor is about to go to sleep, so update +// the status register. + +void pic_processor::enter_sleep() +{ + status->put_TO(1); + status->put_PD(0); + + sleep_time = get_cycles ().get (); + wdt.update(); + pc->increment(); + save_pNextPhase = mCurrentPhase->getNextPhase(); + save_CurrentPhase = mCurrentPhase; + mCurrentPhase->setNextPhase(mIdle); + mCurrentPhase = mIdle; + mCurrentPhase->setNextPhase(mIdle); + m_ActivityState = ePASleeping; +} + +void pic_processor::exit_sleep() +{ + // If enter and exit sleep at same clock cycle, restore execute state + if (get_cycles ().get () == sleep_time) + { + mCurrentPhase = save_CurrentPhase; + mCurrentPhase->setNextPhase(save_pNextPhase); + } + else + { + mCurrentPhase = mExecute1Cycle; + mCurrentPhase->setNextPhase(mExecute1Cycle); + } + + m_ActivityState = ePAActive; +} + +bool pic_processor::is_sleeping() +{ + return m_ActivityState == ePASleeping; +} + +//------------------------------------------------------------------- +// +// pm_write - program memory write +// +void pic_processor::pm_write () +{ + m_ActivityState = ePAPMWrite; + + do get_cycles().increment(); // burn cycles until we're through writing + while(bp.have_pm_write()); + + simulation_mode = eSM_RUNNING; +} + +void pic_processor::save_state() +{ + Processor::save_state(); + if(eeprom) eeprom->save_state(); +} + +//------------------------------------------------------------------- +// +// step - Simulate one (or more) instructions. If a breakpoint is set +// at the current PC-> 'step' will go right through it. (That's supposed +// to be a feature.) +// +void pic_processor::step (uint steps, bool refresh) +{ + if(!steps) return; + + if(simulation_mode != eSM_STOPPED) return; + + simulation_mode = eSM_SINGLE_STEPPING; + + mCurrentPhase = mCurrentPhase ? mCurrentPhase : mExecute1Cycle; + + do mCurrentPhase = mCurrentPhase->advance(); + while(!bp.have_halt() && --steps>0); + + // complete the step if this is a multi-cycle instruction. + if (mCurrentPhase == mExecute2ndHalf) + while (mCurrentPhase != mExecute1Cycle) + mCurrentPhase = mCurrentPhase->advance(); + + bp.clear_halt(); + simulation_mode = eSM_STOPPED; +} + +//------------------------------------------------------------------- +void pic_processor::step_cycle() +{ + mCurrentPhase = mCurrentPhase->advance(); +} + +// +//------------------------------------------------------------------- +// +// step_over - In most cases, step_over will simulate just one instruction. +// However, if the next instruction is a branching one (e.g. goto, call, +// return, etc.) then a break point will be set after it and gpsim will +// begin 'running'. This is useful for stepping over time-consuming calls. +// +void pic_processor::step_over (bool refresh) +{ +} + +//------------------------------------------------------------------- +// +// finish +// +// this method really only applies to processors with stacks. + +void pic_processor::finish() +{ + if(!stack) return; +} + + +//------------------------------------------------------------------- +// +// reset - reset the pic based on the desired reset type. +// +void pic_processor::reset (RESET_TYPE r) +{ + rma.reset(r); + stack->reset(r); + wdt.reset(r); + pc->reset(); + + bp.clear_global(); + + switch (r) + { + case POR_RESET: + if(config_modes) config_modes->print(); + mCurrentPhase = mCurrentPhase ? mCurrentPhase : mExecute1Cycle; + m_ActivityState = ePAActive; + break; + + case SOFT_RESET: + cout << "Reset due to Software reset instruction\n"; + mCurrentPhase = mExecute1Cycle; + mCurrentPhase->setNextPhase(mExecute1Cycle); + m_ActivityState = ePAActive; + break; + + + case MCLR_RESET: + cout << "MCLR reset\n"; + mCurrentPhase = mIdle; + mCurrentPhase->setNextPhase(mIdle); + m_ActivityState = ePAIdle; + break; + + case IO_RESET: + mCurrentPhase = mExecute1Cycle; + mCurrentPhase->setNextPhase(mExecute1Cycle); + m_ActivityState = ePAActive; + break; + + case WDT_RESET: + cout << "Reset on Watch Dog Timer expire\n"; + mCurrentPhase = mCurrentPhase ? mCurrentPhase : mExecute1Cycle; + mCurrentPhase->setNextPhase(mExecute1Cycle); + m_ActivityState = ePAActive; + break; + + case EXIT_RESET: // MCLR reset has cleared + cout <<"MCLR low, resume execution\n"; + mCurrentPhase = mCurrentPhase ? mCurrentPhase : mExecute1Cycle; + mCurrentPhase->setNextPhase(mExecute1Cycle); + m_ActivityState = ePAActive; + return; + break; + + case STKOVF_RESET: + cout << "Reset on Stack overflow\n"; + mCurrentPhase = mCurrentPhase ? mCurrentPhase : mIdle; + mCurrentPhase->setNextPhase(mIdle); + m_ActivityState = ePAActive; + // mCurrentPhase->setNextPhase(mExecute1Cycle); + // m_ActivityState = ePAActive; + break; + + case STKUNF_RESET: + cout << "Reset on Stack undeflow\n"; + mCurrentPhase = mCurrentPhase ? mCurrentPhase : mIdle; + mCurrentPhase->setNextPhase(mIdle); + m_ActivityState = ePAActive; + break; + + default: + printf("pic_processor::reset unknow reset type %d\n", r); + m_ActivityState = ePAActive; + break; + } +} + +//------------------------------------------------------------------- +// +// pic_processor -- constructor +// +pic_processor::pic_processor(const char *_name, const char *_desc) + : Processor(_name,_desc), + wdt(this, 18.0e-3),indf(0),fsr(0), stack(0), status(0), + Wreg(0), pcl(0), pclath(0),m_PCHelper(0), + tmr0(this,"tmr0","Timer 0"), + m_configMemory(0), + m_MCLR(0), m_MCLR_Save(0), m_MCLRMonitor(0), + PPLx4(false), clksource(0), clkcontrol(0) +{ + mExecute1Cycle = new phaseExecute1Cycle(this); + mExecute2ndHalf = new phaseExecute2ndHalf(this); + mCaptureInterrupt = new phaseCaptureInterrupt(this); + mIdle = new phaseIdle(this); + mCurrentPhase = mExecute1Cycle; + + m_Capabilities = eSTACK | eWATCHDOGTIMER; + + eeprom = 0; + config_modes = create_ConfigMode(); + + pll_factor = 0; + + Integer::setDefaultBitmask(0xff); + + // Test code for logging to disk: + for(int i = 0; i < 4; i++) osc_pin_Number[i] = 254; +} + +pic_processor::~pic_processor() +{ + if (pma) + { + while(!rma.SpecialRegisters.empty()) + rma.SpecialRegisters.pop_back(); + while(!pma->SpecialRegisters.empty()) + pma->SpecialRegisters.pop_back(); + } + delete_sfr_register(Wreg); + delete_sfr_register(pcl); + + delete_sfr_register(pclath); + delete_sfr_register(status); + delete_sfr_register(indf); + delete m_PCHelper; + delete stack; + + delete mExecute1Cycle; + delete mExecute2ndHalf; + delete mCaptureInterrupt; + delete mIdle; + + delete config_modes; + delete m_configMemory; + + if (m_MCLR) m_MCLR->setMonitor(0); + if (m_MCLR_Save) m_MCLR_Save->setMonitor(0); + if (m_MCLRMonitor) delete m_MCLRMonitor; + + if (clksource) delete clksource; + if (clkcontrol) delete clkcontrol; +} + +//------------------------------------------------------------------- +// +// create +// +// The purpose of this member function is to 'create' a pic processor. +// Since this is a base class member function, only those things that +// are common to all pics are created. + +void pic_processor::create () +{ + init_program_memory (program_memory_size()); + init_register_memory (register_memory_size()); + + // Now, initialize the core stuff: + pc->set_cpu(this); + + Wreg = new WREG(this,"W","Working Register"); + + pcl = new PCL(this,"pcl", "Program Counter Low"); + pclath = new PCLATH(this,"pclath", "Program Counter Latch High"); + status = new Status_register(this,"status", "Processor status"); + indf = new INDF(this,"indf","Indirect register"); + + register_bank = ®isters[0]; // Define the active register bank + + if(pma) + { + m_PCHelper = new PCHelper(this,pma); + rma.SpecialRegisters.push_back(m_PCHelper); + rma.SpecialRegisters.push_back(status); + rma.SpecialRegisters.push_back(Wreg); + + pma->SpecialRegisters.push_back(m_PCHelper); + pma->SpecialRegisters.push_back(status); + pma->SpecialRegisters.push_back(Wreg); + } + create_config_memory(); +} + +//------------------------------------------------------------------- +// +// add_sfr_register +// +// The purpose of this routine is to add one special function register +// to the file registers. If the sfr has a physical address (like the +// status or tmr0 registers) then a pointer to that register will be +// placed in the file register map. + +// FIXME It doesn't make any sense to initialize the por_value here! +// FIXME The preferred way is to initialize all member data in their +// FIXME parent's constructor. + +void pic_processor::add_sfr_register(Register *reg, uint addr, + RegisterValue por_value, + const char *new_name, + bool warn_dup) +{ + reg->set_cpu(this); + if(addr < register_memory_size()) + { + if (registers[addr]) + { + if (registers[addr]->isa() == Register::INVALID_REGISTER) + { + delete registers[addr]; + registers[addr] = reg; + } + } + else registers[addr] = reg; + + reg->address = addr; + reg->alias_mask = 0; + + if(new_name) reg->new_name(new_name); + } + reg->value = por_value; + reg->por_value = por_value; /// FIXME why are we doing this? + reg->initialize(); +} + +// Use this function when register is initialized on WDT reset to +// same value as a POR. +void pic_processor::add_sfr_registerR(sfr_register *reg, uint addr, + RegisterValue por_value, + const char *new_name, + bool warn_dup) +{ + add_sfr_register(reg, addr, por_value, new_name, warn_dup); + reg->wdtr_value = por_value; +} +//------------------------------------------------------------------- +// +// delete_sfr_register +// This both deletes the register from the registers array, +// but also deletes the register class. +// +void pic_processor::delete_sfr_register(Register *pReg) +{ + if (pReg) + { + uint a = pReg->getAddress(); + + if (0) cout << __FUNCTION__ << " addr = 0x"<name()<getAddress(); + if (a == AN_INVALID_ADDRESS) return; + if (registers[a] == ppReg) delete_file_registers(a,a,true); + } +} + +//------------------------------------------------------------------- +// +// init_program_memory +// +// The purpose of this member function is to allocate memory for the +// pic's code space. The 'memory_size' parameter tells how much memory +// is to be allocated AND it should be an integer of the form of 2^n. +// If the memory size is not of the form of 2^n, then this routine will +// round up to the next integer that is of the form 2^n. +// Once the memory has been allocated, this routine will initialize +// it with the 'bad_instruction'. The bad_instruction is an instantiation +// of the instruction class that chokes gpsim if it is executed. Note that +// each processor owns its own 'bad_instruction' object. + +void pic_processor::init_program_memory (uint memory_size) +{ + // The memory_size_mask is used by the branching instructions + pc->memory_size = memory_size; + + Processor::init_program_memory(memory_size); +} + +bool pic_processor::set_config_word(uint address,uint cfg_word) +{ + int i = get_config_index(address); + + if( i >= 0) + { + m_configMemory->getConfigWord(i)->set((int)cfg_word); + if (i == 0 && config_modes) + { + config_word = cfg_word; + config_modes->config_mode = (config_modes->config_mode & ~7) | (cfg_word & 7); + } + return true; + } + return false; +} + + +uint pic_processor::get_config_word(uint address) +{ + int i= get_config_index(address); + + if( i >= 0 ) return m_configMemory->getConfigWord(i)->getVal(); + + return 0xffffffff; +} + +int pic_processor::get_config_index(uint address) +{ + if (m_configMemory) + { + for(int i = 0; i < m_configMemory->getnConfigWords(); i++) + { + if (m_configMemory->getConfigWord(i)) + { + if (m_configMemory->getConfigWord(i)->ConfigWordAdd() == address) + { + return i; + } + } + } + } + return -1; +} + +//------------------------------------------------------------------- +//------------------------------------------------------------------- +// ConfigMode +// +void ConfigMode::print() +{ + cout << "\nPic ConfigMode:\n" <<" "; + + if(config_mode & CM_FOSC1x) // Internal Oscillator type processor + switch(config_mode& (CM_FOSC0 | CM_FOSC1)) // Lower two bits are the clock type + { + case 0: cout << "LP"; break; + case CM_FOSC0: cout << "XT"; break; + case CM_FOSC1: cout << "Internal RC"; break; + case (CM_FOSC0|CM_FOSC1): cout << "External RC"; break; + } + else + switch(config_mode& (CM_FOSC0 | CM_FOSC1)) // Lower two bits are the clock type + { + case 0: cout << "LP"; break; + case CM_FOSC0: cout << "XT"; break; + case CM_FOSC1: cout << "HS"; break; + case (CM_FOSC0|CM_FOSC1): cout << "RC"; break; + } + cout << " oscillator\n"; + + if(valid_bits & CM_WDTE) cout <<" "<<"WDT is "<<(get_wdt()?"enabled\n":"disabled\n"); + if(valid_bits & CM_MCLRE) cout <<" "<<"MCLR is "<<(get_mclre()?"enabled\n":"disabled\n"); + if(valid_bits & CM_CP0) + { + if(valid_bits & CM_CP1) + { + cout <<" " <<"CP0 is "<<(get_cp0()?"high\n" : "low\n"); + cout <<" " <<"CP1 is "<<(get_cp1()?"high\n" : "low\n"); + } + else cout <<" "<<"code protection is "<<(get_cp0()?"enabled\n":"disabled\n"); + } + cout << "\n"; +} + +//------------------------------------------------------------------- +//------------------------------------------------------------------- +void ProgramMemoryAccess::callback() +{ + if(_state) + { + _state = 0; + //cout << __FUNCTION__ << " address= " << address << ", opcode= " << opcode << '\n'; + //cpu->program_memory[address]->opcode = opcode; + put_opcode(_address,_opcode); + // FIXME trace.opcode_write(_address,_opcode); + bp.clear_pm_write(); + } +} + +//-------------------------------------------------- +WDT::WDT(pic_processor *p_cpu, double _timeout) + : gpsimObject("WDT","Watch Dog Timer"), + cpu(p_cpu), breakpoint(0),prescale(1), postscale(128), future_cycle(0), + timeout(_timeout), wdte(false), cfgw_enable(false) +{ +} + +//-------------------------------------------------- +void WDT::update() +{ + if( wdte ) + { //cout << "WDT Enabled\n\n"; + // FIXME - the WDT should not be tied to the instruction counter... + uint64_t delta_cycles; + + if( !use_t0_prescale ) postscale = 1; + + delta_cycles = (uint64_t)(postscale*prescale*timeout/get_cycles().seconds_per_cycle()); + + uint64_t fc = get_cycles().get() + delta_cycles ; + + if(future_cycle) get_cycles().reassign_break( future_cycle, fc, this ); + else get_cycles().set_break( fc, this ); + + future_cycle = fc; + } +} + +//-------------------------------------------------- +// WDT::put - shouldn't be called? +// +void WDT::put(uint new_value) +{ + cout << "WDT::put should not be called\n"; +} + +void WDT::set_timeout( double _timeout) +{ + timeout = _timeout; + update(); +} +// TMR0 prescale is WDT postscale +void WDT::set_postscale(uint newPostscale) +{ + uint value = 1<< newPostscale; + + if (value != postscale) + { + postscale = value; + update(); + } +} + +void WDT::swdten( bool enable ) +{ + if (cfgw_enable) return; + + if( wdte != enable ) + { + wdte = enable; + warned = 0; + + if( wdte ) update(); + else + { + if (future_cycle) + { + cout << "Disabling WDT\n"; + get_cycles().clear_break(this); + future_cycle = 0; + } + } + } +} + +// For WDT period select 0-11 +void WDT::set_prescale(uint newPrescale) +{ + uint value = 1<< (5 + newPrescale); + if (value != prescale) + { + prescale = value; + update(); + } +} + +void WDT::initialize( bool enable, bool _use_t0_prescale ) +{ + wdte = enable; + cfgw_enable = enable; + use_t0_prescale = _use_t0_prescale; + warned = 0; + + if( wdte ) update(); + else + { + if (future_cycle) + { + cout << "Disabling WDT\n"; + get_cycles().clear_break( this ); + future_cycle = 0; + } + } +} + +void WDT::reset(RESET_TYPE r) +{ + switch (r) + { + case POR_RESET: + case EXIT_RESET: + update(); + break; + case MCLR_RESET: + if (future_cycle) + get_cycles().clear_break(this); + future_cycle = 0; + break; + default: + ; + } +} + +void WDT::set_breakpoint(uint bpn) +{ + breakpoint = bpn; +} + +void WDT::callback() +{ + if( wdte ) + { + if( breakpoint ) bp.halt(); + + else if (cpu->is_sleeping() && cpu->exit_wdt_sleep()) + { + cout << "WDT expired during sleep\n"; + update(); + cpu->exit_sleep(); + cpu->status->put_TO(0); + } + else // The TO bit gets cleared when the WDT times out. + { + cout << "WDT expired reset\n"; + update(); + cpu->status->put_TO(0); + cpu->reset(WDT_RESET); + } + } +} + +void WDT::clear() +{ + if( wdte ) update(); + + else if(!warned) + { + warned = 1; + cout << "The WDT is not enabled - clrwdt has no effect!\n"; + } +} + +void WDT::callback_print() +{ + cout << name() << " has callback, ID = " << CallBackID << '\n'; +} + + +//------------------------------------------------------------------------ +// ConfigMemory - Base class +ConfigWord::ConfigWord(const char *_name, uint default_val, const char *desc, + pic_processor *pCpu, uint addr, bool EEw) + : Integer(_name, default_val, desc), m_pCpu(pCpu), m_addr(addr), + EEWritable(EEw) +{ + /* + if (m_pCpu) + m_pCpu->addSymbol(this); + */ +} +// this get controls the display format in the symbols window +void ConfigWord::get(char *buffer, int buf_size) +{ + if(buffer) + { + int64_t i; + get(i); + } +} +void ConfigWord::get(int64_t &i) +{ + Integer::get(i); +} + +//------------------------------------------------------------------------ +ConfigMemory::ConfigMemory(pic_processor *pCpu, uint nWords) + : m_pCpu(pCpu), m_nConfigWords(nWords) +{ + if (nWords > 0 && nWords < 100) + { + m_ConfigWords = new ConfigWord *[nWords]; + + for (uint i = 0; i < nWords; i++) + m_ConfigWords[i] = 0; + } +} + +ConfigMemory::~ConfigMemory() +{ + for (uint i = 0; i < m_nConfigWords; i++) + if (m_ConfigWords[i]) +// m_pCpu->deleteSymbol(m_ConfigWords[i]); + + delete [] m_ConfigWords; +} + +int ConfigMemory::addConfigWord(uint addr, ConfigWord *pConfigWord) +{ + if (addr < m_nConfigWords) + { + m_ConfigWords[addr] = pConfigWord; + return 1; + } + delete pConfigWord; + return 0; +} + +ConfigWord *ConfigMemory::getConfigWord(uint addr) +{ + return addr < m_nConfigWords ? m_ConfigWords[addr] : 0; +} +//------------------------------------------------------------------- +class MCLRPinMonitor : public PinMonitor +{ + public: + MCLRPinMonitor(pic_processor *pCpu); + ~MCLRPinMonitor() {} + + virtual void setDrivenState(char); + virtual void setDrivingState(char) {} + virtual void set_nodeVoltage(double) {} + virtual void putState(char) {} + virtual void setDirection() {} + + private: + pic_processor *m_pCpu; + char m_cLastResetState; +}; + +MCLRPinMonitor::MCLRPinMonitor(pic_processor *pCpu) + : m_pCpu(pCpu), + m_cLastResetState('I') // I is not a valid state. It's used here for 'I'nitialization +{ +} + +void MCLRPinMonitor::setDrivenState(char newState) +{ + if (newState =='0' || newState =='w') + { + m_cLastResetState = '0'; + m_pCpu->reset(MCLR_RESET); + } + + if (newState =='1' || newState =='W') + { + if (m_cLastResetState == '0') m_pCpu->reset(EXIT_RESET); + + m_cLastResetState = '1'; + } +} + +//------------------------------------------------------------------- +void pic_processor::createMCLRPin(int pkgPinNumber) +{ + if (m_MCLR) cout << "BUG?: assigning multiple MCLR pins: " << __FILE__ << dec << " " << __LINE__ << endl; + + if(package) + { + m_MCLR = new IO_open_collector("MCLR"); + package->assign_pin(pkgPinNumber,m_MCLR); + + m_MCLRMonitor = new MCLRPinMonitor(this); + m_MCLR->setMonitor(m_MCLRMonitor); + } +} + +//------------------------------------------------------------------- +// This function is called instead of createMCLRPin where the pin +// is already defined, but the configuration word has set the function +// to MCLR + +void pic_processor::assignMCLRPin(int pkgPinNumber) +{ + if (package) + { + if (m_MCLR == NULL) + { + m_MCLR_pin = pkgPinNumber; + m_MCLR = new IO_open_collector("MCLR"); + + m_MCLR_Save = package->get_pin(pkgPinNumber); + package->assign_pin(pkgPinNumber,m_MCLR, false); + + m_MCLRMonitor = new MCLRPinMonitor(this); + m_MCLR->setMonitor(m_MCLRMonitor); + } + else if (m_MCLR != package->get_pin(pkgPinNumber)) + { + cout << "BUG?: assigning multiple MCLR pins: " + << dec << pkgPinNumber << " " << __FILE__ << " " + << __LINE__ << endl; + } + } +} +//------------------------------------------------------------------- +// This function sets the pin currently set as MCLR back to its original function +void pic_processor::unassignMCLRPin() +{ + if (package && m_MCLR_Save) + { + package->assign_pin(m_MCLR_pin,m_MCLR_Save, false); + + if (m_MCLR) + { + m_MCLR->setMonitor(0); + m_MCLR = NULL; + + if (m_MCLRMonitor) + { + delete m_MCLRMonitor; + m_MCLRMonitor = NULL; + } + } + } +} +//-------------------------------------------------- +// +class IO_SignalControl : public SignalControl +{ + public: + IO_SignalControl(char _dir){ direction = _dir; } + ~IO_SignalControl(){} + virtual char getState() { return direction; } + virtual void release() {} + void setState(char _dir) { direction = _dir; } + + private: + char direction; +}; + +// This function sets a label on a pin and if PinMod is defined +// removes its control from it's port register +// +void pic_processor::set_clk_pin(uint pkg_Pin_Number, + PinModule *PinMod, + const char * name, + bool in, + PicPortRegister *m_port, + PicTrisRegister *m_tris, + PicLatchRegister *m_lat) +{ + if (PinMod) + { + if (m_port) + { + uint mask = m_port->getEnableMask(); + mask &= ~(1<< PinMod->getPinNumber()); + m_port->setEnableMask(mask); + + if (m_tris) m_tris->setEnableMask(mask); + if (m_lat) m_lat->setEnableMask(mask); + } + if (!clksource) + { + clksource = new PeripheralSignalSource(PinMod); + clkcontrol = new IO_SignalControl(in ? '1' : '0'); + } + PinMod->setSource(clksource); + PinMod->setControl(clkcontrol); + PinMod->updatePinModule(); + } +} + +// This function reverses the effects of the previous function +void pic_processor::clr_clk_pin(uint pkg_Pin_Number, + PinModule *PinMod, + PicPortRegister *m_port, + PicTrisRegister *m_tris, + PicLatchRegister *m_lat) +{ + if (PinMod) + { + if (m_port) + { + uint mask = m_port->getEnableMask(); + mask |= (1<< PinMod->getPinNumber()); + m_port->setEnableMask(mask); + + if (m_tris) m_tris->setEnableMask(mask); + if (m_lat) m_lat->setEnableMask(mask); + } + PinMod->setSource(0); + PinMod->setControl(0); + PinMod->updatePinModule(); + } +} + +void pic_processor::osc_mode(uint value) +{ + IOPIN *m_pin; + uint pin_Number = get_osc_pin_Number(0); + + if (pin_Number < 253) m_pin = package->get_pin(pin_Number); + + if ( (pin_Number = get_osc_pin_Number(1)) < 253 && + (m_pin = package->get_pin(pin_Number))) + { + pll_factor = 0; + if (value < 5) + { + set_clk_pin(pin_Number, m_osc_Monitor[1], "OSC2", true); + } + else if(value == 6 ) + { + pll_factor = 2; + set_clk_pin(pin_Number, m_osc_Monitor[1], "CLKO", false); + } + else clr_clk_pin(pin_Number, m_osc_Monitor[1]); + } +} + +void pic_processor::Wput(uint value) +{ + Wreg->put(value); +} + +uint pic_processor::Wget() +{ + return Wreg->get(); +} diff --git a/src/gpsim/pic-processor.h b/src/gpsim/pic-processor.h new file mode 100644 index 0000000..4d1dbd0 --- /dev/null +++ b/src/gpsim/pic-processor.h @@ -0,0 +1,532 @@ +/* + Copyright (C) 1998-2000 T. Scott Dattalo + Copyright (C) 2013 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __PIC_PROCESSORS_H__ +#define __PIC_PROCESSORS_H__ +//#include +#include +#include + +#include "gpsim_classes.h" +#include "processor.h" +#include "pic-registers.h" +#include "14bit-registers.h" +#include "trigger.h" + +class EEPROM; +class instruction; +class Register; +class sfr_register; +class pic_register; +class ConfigMemory; + +enum PROCESSOR_TYPE +{ + _PIC_PROCESSOR_, + _14BIT_PROCESSOR_, + _14BIT_E_PROCESSOR_, // 14bit enhanced processor + _12BIT_PROCESSOR_, + _PIC17_PROCESSOR_, + _PIC18_PROCESSOR_, + _P10F200_, + _P10F202_, + _P10F204_, + _P10F206_, + _P10F220_, + _P10F222_, + _P10F320_, + _P10LF320_, + _P10F322_, + _P10LF322_, + _P12C508_, + _P12C509_, + _P12F508_, + _P12F509_, + _P12F510_, + _P12F629_, + _P12F675_, + _P12F683_, + _P12F1822_, + _P12LF1822_, + _P12F1840_, + _P12LF1840_, + _P16C84_, + _P16CR83_, + _P16CR84_, + _P12CE518_, + _P12CE519_, + _P16F83_, + _P16F84_, + _P16C71_, + _P16C712_, + _P16C716_, + _P16C54_, + _P16C55_, + _P16C56_, + _P16C61_, + _P16C62_, + _P16C62A_, + _P16CR62_, + _P16F505_, + _P16F627_, + _P16F628_, + _P16F630_, + _P16F631_, + _P16F648_, + _P16F676_, + _P16F677_, + _P16F684_, + _P16F685_, + _P16F687_, + _P16F689_, + _P16F690_, + _P16C63_, + _P16C64_, + _P16C64A_, + _P16CR64_, + _P16C65_, + _P16C65A_, + _P16C72_, + _P16C73_, + _P16C74_, + _P16F73_, + _P16F74_, + _P16F716_, + _P16F87_, + _P16F88_, + _P16F818_, + _P16F819_, + _P16F871_, + _P16F873_, + _P16F873A_, + _P16F874_, + _P16F874A_, + _P16F876_, + _P16F876A_, + _P16F877_, + _P16F877A_, + _P16F882_, + _P16F883_, + _P16F884_, + _P16F886_, + _P16F887_, + _P16F913_, + _P16F914_, + _P16F916_, + _P16F917_, + _P16F1788_, + _P16F1503_, + _P16LF1503_, + _P16LF1788_, + _P16F1789_, + _P16F1823_, + _P16LF1823_, + _P16F1825_, + _P16LF1825_, + _P17C7xx_, + _P17C75x_, + _P17C752_, + _P17C756_, + _P17C756A_, + _P17C762_, + _P17C766_, + _P18Cxx2_, + _P18C2x2_, + _P18C242_, + _P18F242_, + _P18F248_, + _P18F258_, + _P18F448_, + _P18F458_, + _P18C252_, + _P18F252_, + _P18C442_, + _P18C452_, + _P18F442_, + _P18F452_, + _P18F1220_, + _P18F1320_, + _P18F14K22_, + _P18F2221_, + _P18F2321_, + _P18F2420_, + _P18F2455_, + _P18F2520_, + _P18F2525_, + _P18F2550_, + _P18F26K22_, + _P18F2620_, + _P18F4221_, + _P18F4321_, + _P18F4420_, + _P18F4455_, + _P18F4520_, + _P18F4550_, + _P18F4620_, + _P18F6520_, +}; + +// Configuration modes. DELETE THIS... +// The configuration mode bits are the config word bits remapped. +// The remapping removes processor dependent bit definitions. +class ConfigMode +{ + public: + + enum { + CM_FOSC0 = 1<<0, // FOSC0 and FOSC1 together define the PIC clock + CM_FOSC1 = 1<<1, // All PICs todate have these two bits, but the + // ones with internal oscillators use them differently + CM_WDTE = 1<<2, // Watch dog timer enable + CM_CP0 = 1<<3, // Code Protection + CM_CP1 = 1<<4, + CM_PWRTE = 1<<5, // Power on/Reset timer enable + CM_BODEN = 1<<6, // Brown out detection enable + CM_CPD = 1<<7, + CM_MCLRE = 1<<8, // MCLR enable + + CM_FOSC1x = 1<<31, // Hack for internal oscillators + }; + + int config_mode; + int valid_bits; + + ConfigMode() { + config_mode = 0xffff; + valid_bits = CM_FOSC0 | CM_FOSC1 | CM_WDTE; + }; + + virtual ~ConfigMode(){} + + virtual void set_config_mode(int new_value) { config_mode = new_value & valid_bits;}; + virtual void set_valid_bits(int new_value) { valid_bits = new_value;}; + void set_fosc0(){config_mode |= CM_FOSC0;}; + void clear_fosc0(){config_mode &= ~CM_FOSC0;}; + bool get_fosc0(){return (config_mode & CM_FOSC0);}; + void set_fosc1(){config_mode |= CM_FOSC1;}; + void clear_fosc1(){config_mode &= ~CM_FOSC1;}; + bool get_fosc1(){return (0 != (config_mode & CM_FOSC1));}; + bool get_fosc1x(){return (0 != (config_mode & CM_FOSC1x));}; + void set_fosc01(int v) + { + config_mode = (config_mode & ~(CM_FOSC0 | CM_FOSC1)) | + (v & (CM_FOSC0 | CM_FOSC1)); + } + + void set_cp0() {config_mode |= CM_CP0; valid_bits |= CM_CP0;}; + void clear_cp0(){config_mode &= ~CM_CP0; valid_bits |= CM_CP0;}; + bool get_cp0() {return (0 != (config_mode & CM_CP0));}; + void set_cp1() {config_mode |= CM_CP1; valid_bits |= CM_CP1;}; + void clear_cp1(){config_mode &= ~CM_CP1; valid_bits |= CM_CP1;}; + bool get_cp1() {return (0 != (config_mode & CM_CP1));}; + + void enable_wdt() {config_mode |= CM_WDTE;}; + void disable_wdt() {config_mode &= ~CM_WDTE;}; + void set_wdte(bool b) { config_mode = b ? (config_mode | CM_WDTE) : (config_mode & ~CM_WDTE); } + bool get_wdt() {return (0 != (config_mode & CM_WDTE));}; + + void set_mclre(bool b) { config_mode = b ? (config_mode | CM_MCLRE) : (config_mode & ~CM_MCLRE); } + bool get_mclre() {return (0 != (config_mode & CM_MCLRE));}; + + void enable_pwrte() {config_mode |= CM_PWRTE; valid_bits |= CM_PWRTE;}; + void disable_pwrte() {config_mode &= ~CM_PWRTE; valid_bits |= CM_PWRTE;}; + void set_pwrte(bool b) { config_mode = b ? (config_mode | CM_PWRTE) : (config_mode & ~CM_PWRTE); } + bool get_pwrte() {return (0 != (config_mode & CM_PWRTE));}; + bool is_valid_pwrte() {return (0 != (valid_bits & CM_PWRTE));}; + + virtual void print(); +}; + + +//--------------------------------------------------------- +// Watch Dog Timer +// + +class WDT : public TriggerObject, public gpsimObject +{ + public: + WDT(pic_processor *, double _timeout); + void put(uint new_value); + virtual void initialize(bool enable, bool _use_t0_prescale = true); + virtual void swdten(bool enable); + void set_timeout(double); + virtual void set_prescale(uint); + virtual void set_postscale(uint); + virtual void reset(RESET_TYPE r); + void clear(); + virtual void callback(); + virtual void update(); + virtual void callback_print(); + void set_breakpoint(uint bpn); + bool hasBreak() { return breakpoint != 0;} + + protected: + pic_processor *cpu; // The cpu to which this wdt belongs. + + uint breakpoint, + prescale, + postscale; + + uint64_t future_cycle; + + double timeout; // When no prescaler is assigned + bool wdte; + bool warned; + bool cfgw_enable; // Enabled from Configureation word + bool use_t0_prescale; +}; + + +/*================================================================== + * + * Here are the base class declarations for the pic processors + */ + +/* + * Define a base class processor for the pic processor family + * + * All pic processors are derived from this class. + */ +class PicTrisRegister; +class PicLatchRegister; +class IO_SignalControl; + +class pic_processor : public Processor +{ + public: + uint config_word; // as read from hex or cod file + ConfigMode *config_modes; // processor dependent configuration bits. + + uint pll_factor; // 2^pll_factor is the speed boost the PLL adds + // to the instruction execution rate. + WDT wdt; + INDF *indf; + FSR *fsr; + Stack *stack; + + Status_register *status; + + WREG *Wreg; // Used when W is a normal register + PCL *pcl; + PCLATH *pclath; + PCHelper *m_PCHelper; + TMR0 tmr0; + int num_of_gprs; + + EEPROM* eeprom; // set to NULL for PIC's that don't have a data EEPROM + + void add_sfr_register(Register *reg, uint addr, + RegisterValue por_value=RegisterValue(0,0), + const char *new_name=0, + bool warn_dup = true); + + void add_sfr_registerR(sfr_register *reg, uint addr, + RegisterValue por_value=RegisterValue(0,0), + const char *new_name=0, + bool warn_dup = true); + + void delete_sfr_register(Register *pReg); + void remove_sfr_register(Register *pReg); + + void init_program_memory(uint memory_size); + void build_program_memory(int *memory,int minaddr, int maxaddr); + + virtual instruction * disasm( uint address,uint inst)=0; + virtual void create_config_memory() = 0; + virtual void tris_instruction(uint tris_register) {return;}; + + virtual void finish(); + + void sleep(); + virtual void enter_sleep(); + virtual void exit_sleep(); + virtual bool exit_wdt_sleep() { return true; } // WDT wakes sleep + virtual bool swdten_active() { return true; } // WDTCON can enable WDT + bool is_sleeping(); + + virtual void step(uint steps,bool refresh=true); + virtual void step_over(bool refresh=true); + virtual void step_cycle(); + + virtual void step_one(bool refresh=true) + { + if (pc->value < program_memory_size()) program_memory[pc->value]->execute(); + else + { + cout << "Program counter not valid " << hex << pc->value << endl; + get_bp().halt(); + } + } + virtual void save_state(); // Take a snap shot of the internal state. + + virtual void interrupt() { return; } + //// TEMPORARY - consolidate the various bp.set_interrupt() calls to one function: + void BP_set_interrupt(); + void pm_write(); + + virtual ConfigMemory * getConfigMemory(){ return m_configMemory;} + virtual bool set_config_word(uint address, uint cfg_word); + virtual uint get_config_word(uint address); + virtual int get_config_index(uint address); + virtual uint config_word_address() const {return 0x2007;}; + virtual ConfigMode *create_ConfigMode() { return new ConfigMode; }; + + virtual void reset(RESET_TYPE r); + + virtual void create(); + + virtual PROCESSOR_TYPE isa(){ return _PIC_PROCESSOR_; }; + virtual PROCESSOR_TYPE base_isa(){ return _PIC_PROCESSOR_; }; + virtual uint access_gprs() { return 0; }; + virtual uint bugs() { return 0; }; // default is no errata + + /* The program_counter class calls these two functions to get the upper bits of the PC + * for branching (e.g. goto) or modify PCL instructions (e.g. addwf pcl,f) */ + virtual uint get_pclath_branching_jump()=0; + virtual uint get_pclath_branching_modpcl()=0; + + virtual void option_new_bits_6_7(uint)=0; + virtual void put_option_reg(uint) {} + + virtual void set_eeprom(EEPROM *e); + virtual EEPROM *get_eeprom() { return (eeprom); } + virtual void createMCLRPin(int pkgPinNumber); + virtual void assignMCLRPin(int pkgPinNumber); + virtual void unassignMCLRPin(); + virtual void osc_mode(uint ); + virtual void set_config3h(int64_t x){;} + virtual string string_config3h(int64_t x){return string("fix string_config3h");} + + // Activity States reflect what the processor is currently doing + // (The breakpoint class formally implemented this functionality). + enum eProcessorActivityStates { + ePAActive, // Normal state + ePAIdle, // Processor is held in reset + ePASleeping, // Processor is sleeping + ePAInterrupt, // do we need this? + ePAPMWrite // Processor is busy performing a program memory write + }; + eProcessorActivityStates getActivityState() { return m_ActivityState; } + + pic_processor(const char *_name=0, const char *desc=0); + virtual ~pic_processor(); + + void set_osc_pin_Number(uint i, uint val, PinModule *pm) + {if (i < 4){osc_pin_Number[i] = val; m_osc_Monitor[i] = pm;}} + unsigned char get_osc_pin_Number(uint i) + {return (i<4)?osc_pin_Number[i]:253;} + PinModule * get_osc_PinMonitor(uint i) + { return (i<4)?m_osc_Monitor[i]:0; } + + void set_clk_pin(uint pkg_Pin_Number, + PinModule *PinMod, + const char * name, + bool in, + PicPortRegister *m_port = 0, + PicTrisRegister *m_tris = 0, + PicLatchRegister *m_lat = 0 + ); + void clr_clk_pin(uint pkg_Pin_Number, PinModule *PinMod, + PicPortRegister *m_port = 0, + PicTrisRegister *m_tris = 0, + PicLatchRegister *m_lat = 0 + ); + + virtual void set_int_osc(bool val){ internal_osc = val;} + virtual bool get_int_osc(){ return internal_osc; } + virtual void set_pplx4_osc(bool val){ PPLx4 = val;} + virtual bool get_pplx4_osc(){ return PPLx4; } + + virtual void Wput(uint); + virtual uint Wget(); + + protected: + ConfigMemory *m_configMemory; + eProcessorActivityStates m_ActivityState; + + // Most midrange PIC's have a dedicated MCLR pin. + // For the ones that don't, m_MCLR will be null. + IOPIN *m_MCLR; + IOPIN *m_MCLR_Save; + int m_MCLR_pin; + PinMonitor *m_MCLRMonitor; + string m_mclr_pin_name; + + unsigned char osc_pin_Number[4]; + PinModule *m_osc_Monitor[4]; + bool internal_osc; // internal RC oscilator enabled on Config Word + bool PPLx4; // 4x PPL enabled on Config Word + PeripheralSignalSource *clksource; + SignalControl *clkcontrol; + uint64_t sleep_time; + ClockPhase *save_pNextPhase; + ClockPhase *save_CurrentPhase; +}; + +#define cpu_pic ( (pic_processor *)cpu) + +// Bit field of known silicon bugs +#define BUG_NONE 0 +#define BUG_DAW 0x00000001 + + +//------------------------------------------------------------------------ +// Base Class for configuration memory +// +// The configuration memory is only a tiny portion of the overall processor +// program memory space (only 1-word on the mid range devices). So, explicit +// attributes are created for each memory configuration word. Since the meaning +// of configuration memory varies from processor to processor, it is up to +// each process to derive from this class. + +class ConfigWord : public Integer +{ + public: + ConfigWord(const char *_name, uint default_val, const char *desc, + pic_processor *pCpu, uint addr, bool EEw=true); + + virtual void get(char *buffer, int buf_size); + virtual void get(int64_t &i); + uint ConfigWordAdd() { return m_addr; } + bool isEEWritable() { return EEWritable;} + + protected: + pic_processor *m_pCpu; + uint m_addr; + bool EEWritable; +}; + +class ConfigMemory +{ + public: + ConfigMemory(pic_processor *pCpu, uint nWords); + ~ConfigMemory(); + + int addConfigWord(uint addr, ConfigWord *); + ConfigWord *getConfigWord(uint addr); + int getnConfigWords() { return m_nConfigWords; } + + protected: + pic_processor *m_pCpu; + ConfigWord **m_ConfigWords; + uint m_nConfigWords; +}; +#endif diff --git a/src/gpsim/processor.cc b/src/gpsim/processor.cc new file mode 100644 index 0000000..ea50326 --- /dev/null +++ b/src/gpsim/processor.cc @@ -0,0 +1,1137 @@ +/* + Copyright (C) 1998-2003 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +/* + stuff that needs to be fixed: + + Register aliasing + The "invalid instruction" in program memory. +*/ + +#include +#include +#include +#include +#include +#include +#include + +#include "config.h" +#include "gpsim_classes.h" +#include "processor.h" +#include "pic-processor.h" +#include "clock_phase.h" +#include "errors.h" + + +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("%s:%d-%s() ",__FILE__,__LINE__,__FUNCTION__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +static char pkg_version[] = PACKAGE_VERSION; + +class CPU_Freq : public Float +{ + public: + CPU_Freq(Processor * _cpu, double freq); //const char *_name, double newValue, const char *desc); + + virtual void set(double d); + void set_rc_freq(double d); + virtual void get(double &); + void set_rc_active(bool _use_rc_freq) { use_rc_freq = _use_rc_freq;} + + private: + Processor * cpu; + double RCfreq; + bool use_rc_freq; +}; + +CPU_Freq::CPU_Freq(Processor * _cpu, double freq) + : Float("frequency",freq, " oscillator frequency."), + cpu(_cpu), RCfreq(0.), use_rc_freq(false) +{ +} + +void CPU_Freq::set_rc_freq(double d) +{ + RCfreq = d; +} + +void CPU_Freq::get(double &d) +{ + if (use_rc_freq) d = RCfreq; + else + { + double x; + Float::get(x); + d = x; + } +} + +void CPU_Freq::set(double d) +{ + pic_processor *pCpu = dynamic_cast(cpu); + + Float::set ( d ); + if ( cpu ) cpu->update_cps(); + if ( pCpu ) pCpu->wdt.update(); +} + +CPU_Vdd::CPU_Vdd(Processor * _cpu, double vdd) + : Float("Vdd", vdd , "Processor supply voltage"), + cpu(_cpu) +{ +} + +void CPU_Vdd::set(double d) +{ + Float::set ( d ); + if ( cpu ) cpu->update_vdd(); +} + +//------------------------------------------------------------------------ +// +// Processor - Constructor +// +Processor::Processor(const char *_name, const char *_desc) + : Module(_name, _desc), + pma(0), + rma(this), + ema(this), + pc(0), + bad_instruction(0, 0x3fff, 0), + mFrequency(0) +{ + registers = 0; + + m_pConstructorObject = 0; + m_Capabilities = 0; + m_ProgramMemoryAllocationSize = 0; + + set_ClockCycles_per_Instruction(4); + update_cps(); + + // derived classes need to override these values + m_uPageMask = 0x00; + m_uAddrMask = 0xff; + + // let the processor version number simply be gpsim's version number. + version = &pkg_version[0]; + + m_vdd = new CPU_Vdd(this, 5.0); + + m_pbBreakOnInvalidRegisterRead = new Boolean("BreakOnInvalidRegisterRead", + true, "Halt simulation when an invalid register is read from."); + + m_pbBreakOnInvalidRegisterWrite = new Boolean("BreakOnInvalidRegisterWrite", + true, "Halt simulation when an invalid register is written to."); + + set_Vdd(5.0); +} + +Processor::~Processor() +{ + delete_invalid_registers(); + + delete []registers; + + destroyProgramMemoryAccess(pma); + + for (uint i = 0; i < m_ProgramMemoryAllocationSize; i++) + { + if (program_memory[i] != &bad_instruction) delete program_memory[i]; + } + delete []program_memory; +} + +unsigned long Processor::GetCapabilities() +{ + return m_Capabilities; +} + +//------------------------------------------------------------------------ +// Attributes + +void Processor::set_RCfreq_active(bool state) +{ + if (mFrequency) mFrequency->set_rc_active(state); + update_cps(); +} +void Processor::set_frequency(double f) +{ + if(mFrequency) mFrequency->set(f); + update_cps(); +} +void Processor::set_frequency_rc(double f) +{ + if(mFrequency) mFrequency->set_rc_freq(f); + update_cps(); +} +double Processor::get_frequency() +{ + double d=0.0; + + if(mFrequency) mFrequency->get(d); + return d; +} + +void Processor::update_cps(void) +{ + get_cycles().set_instruction_cps((uint64_t)(get_frequency()/clocks_per_inst)); +} + +double Processor::get_OSCperiod() +{ + double f = get_frequency(); + + if(f>0.0) return 1/f; + else return 0.0; +} + +//------------------------------------------------------------------- +// +// init_register_memory (uint memory_size) +// +// Allocate an array for holding register objects. +// +void Processor::init_register_memory (uint memory_size) +{ + registers = new Register *[memory_size]; + + if (registers == 0) + { + throw new FatalError("Out of memory - PIC register space"); + } + + // For processors with banked memory, the register_bank corresponds to the + // active bank. Let this point to the beginning of the register array for + // now. + + register_bank = registers; + + rma.set_Registers(registers, memory_size); + + // Make all of the file registers 'undefined' (each processor derived from this base + // class defines its own register mapping). + + for (uint i = 0; i < memory_size; i++) registers[i] = 0; +} + +//------------------------------------------------------------------- +// create_invalid_registers +// +// The purpose of this function is to complete the initialization +// of the file register memory by placing an instance of an 'invalid +// file register' at each 'invalid' memory location. Most of PIC's +// do not use the entire address space available, so this routine +// fills the voids. + +void Processor::create_invalid_registers () +{ + uint addr; + + // Now, initialize any undefined register as an 'invalid register' + // Note, each invalid register is given its own object. This enables + // the simulation code to efficiently capture any invalid register + // access. Furthermore, it's possible to set break points on + // individual invalid file registers. By default, gpsim halts whenever + // there is an invalid file register access. + + for (addr = 0; addr < register_memory_size(); addr+=map_rm_index2address(1)) + { + uint index = map_rm_address2index(addr); + + if (!registers[index]) + { + char nameBuff[100]; + snprintf(nameBuff,sizeof(nameBuff), "INVREG_%X",addr); + + registers[index] = new InvalidRegister(this, nameBuff); + registers[index]->setAddress(addr); + } + } +} + +void Processor::delete_invalid_registers () +{ + for( uint i=0; i (registers[i]); + if( pReg ) + { + delete registers[i]; + registers[i]= 0; + } + else if (registers[i]) + { + char reg_name[11]; + cout << __FUNCTION__ << " reg: 0x"<name().c_str(), 10); + reg_name[10] = 0; + cout << " " << reg_name <isa() == Register::INVALID_REGISTER)) + delete registers[j]; + + else if (registers[j]) + cout << __FUNCTION__ << " Already register " << registers[j]->name() << " at 0x" << hex << j <alias_mask = alias_offset; + } + else registers[j]->alias_mask = 0; + + registers[j]->setAddress(j); + } +} + +//------------------------------------------------------------------- +// delete_file_registers +// +// The purpose of this member function is to delete file registers +// +void Processor::delete_file_registers(uint start_address, + uint end_address, + bool bRemoveWithoutDelete) +{ +#define DFR_DEBUG 0 + if (DFR_DEBUG) + cout << __FUNCTION__ + << " start:" << hex << start_address + << " end:" << hex << end_address + << endl; + + // FIXME - this function is bogus. + // The aliased registers do not need to be searched for - the alias mask + // can tell at what addresses a register is aliased. + +#define SMALLEST_ALIAS_DISTANCE 32 +#define ALIAS_MASK (SMALLEST_ALIAS_DISTANCE-1) + + if (start_address != end_address) Dprintf(("from 0x%x to 0x%x\n", start_address, end_address)); + + for( uint j = start_address; j <= end_address; j++) + { + if(registers[j]) + { + Register *thisReg = registers[j]; + Register *replaced = thisReg->getReplaced(); + + if(thisReg->alias_mask) + { + // This register appears in more than one place. Let's find all + // of its aliases. + for( uint i=j&ALIAS_MASK; iname().c_str(), j, j+alias_offset); + else + delete registers[j + alias_offset]; + + } + registers[j + alias_offset] = registers[j]; + + if (registers[j]) registers[j]->alias_mask = alias_offset; + } + } +} + +//------------------------------------------------------------------- +// +// init_program_memory(uint memory_size) +// +// The purpose of this member function is to allocate memory for the +// pic's code space. The 'memory_size' parameter tells how much memory +// is to be allocated +// +// The following is not correct for 18f2455 and 18f4455 processors +// so test has been disabled (RRR) +// +// AND it should be an integer of the form of 2^n. +// If the memory size is not of the form of 2^n, then this routine will +// round up to the next integer that is of the form 2^n. +// +// Once the memory has been allocated, this routine will initialize +// it with the 'bad_instruction'. The bad_instruction is an instantiation +// of the instruction class that chokes gpsim if it is executed. Note that +// each processor owns its own 'bad_instruction' object. + +void Processor::init_program_memory (uint memory_size) +{ +#ifdef RRR + if ((memory_size-1) & memory_size) + { + cout << "*** WARNING *** memory_size should be of the form 2^N\n"; + memory_size = (memory_size + ~memory_size) & MAX_PROGRAM_MEMORY; + cout << "gpsim is rounding up to memory_size = " << memory_size << '\n'; + } +#endif + // Initialize 'program_memory'. 'program_memory' is a pointer to an array of + // pointers of type 'instruction'. This is where the simulated instructions + // are stored. + program_memory = new instruction *[memory_size]; + if (program_memory == 0) { + throw new FatalError("Out of memory for program space"); + } + + m_ProgramMemoryAllocationSize = memory_size; + + bad_instruction.set_cpu(this); + for (uint i = 0; i < memory_size; i++) program_memory[i] = &bad_instruction; + + pma = createProgramMemoryAccess(this); + pma->name(); +} + +ProgramMemoryAccess * Processor::createProgramMemoryAccess(Processor *processor) { + return new ProgramMemoryAccess(processor); +} + +void Processor::destroyProgramMemoryAccess(ProgramMemoryAccess *pma) { + delete pma; +} + +//------------------------------------------------------------------- +// init_program_memory(int address, int value) +// +// The purpose of this member fucntion is to instantiate an Instruction +// object in the program memory. If the opcode is invalid, then a 'bad_instruction' +// is inserted into the program memory instead. If the address is beyond +// the program memory address space, then it may be that the 'opcode' is +// is in fact a configuration word. +// +void Processor::init_program_memory(uint address, uint value) +{ + uint uIndex = map_pm_address2index(address); + + if (!program_memory) + { + std::stringstream buf; + buf << "ERROR: internal bug " << __FILE__ << ":" << __LINE__; + throw new FatalError(buf.str()); + } + + if(uIndex < program_memory_size()) + { + if(program_memory[uIndex] != 0 && program_memory[uIndex]->isa() != instruction::INVALID_INSTRUCTION) + { + delete program_memory[uIndex]; // this should not happen + } + program_memory[uIndex] = disasm(address,value); + if(program_memory[uIndex] == 0) + program_memory[uIndex] = &bad_instruction; + } + else if (set_config_word(address, value)) + { } + else set_out_of_range_pm(address,value); // could be e2prom +} +//------------------------------------------------------------------- +//erase_program_memory(uint address) +// +// Checks if a program memory location contains an instruction +// and deletes it if it does. +// +void Processor::erase_program_memory(uint address) +{ + uint uIndex = map_pm_address2index(address); + + if (!program_memory) + { + std::stringstream buf; + buf << "ERROR: internal bug " << __FILE__ << ":" << __LINE__; + throw new FatalError(buf.str()); + } + if(uIndex < program_memory_size()) + { + if(program_memory[uIndex] != 0 && program_memory[uIndex]->isa() != instruction::INVALID_INSTRUCTION) + { + delete program_memory[uIndex]; + program_memory[uIndex] = &bad_instruction; + } + } + else + { + cout << "Erase Program memory\n"; + cout << "Warning::Out of range address " << hex << address << endl; + cout << "Max allowed address is 0x" << hex << (program_address_limit()-1) << '\n'; + } +} + +void Processor::init_program_memory_at_index(uint uIndex, uint value) +{ + init_program_memory(map_pm_index2address(uIndex), value); +} + +void Processor::init_program_memory_at_index(uint uIndex, + const unsigned char *bytes, int nBytes) +{ + for (int i =0; iget_opcode() + : 0xffffffff; +} + +//------------------------------------------------------------------- +// build_program_memory - given an array of opcodes this function +// will convert them into instructions and insert them into the +// simulated program memory. +// +void Processor::build_program_memory(uint *memory, + uint minaddr, + uint maxaddr) +{ + for (uint i = minaddr; i <= maxaddr; i++) + if(memory[i] != 0xffffffff) + init_program_memory(i, memory[i]); +} + +//------------------------------------------------------------------- +/** @brief Write a word of data into memory outside flash + * + * This method is called when loading data from the COD or HEX file + * and the address is not in the program ROM or normal config space. + * In this base class, there is no such memory. Real processors, + * particularly those with EEPROM, will need to override this method. + * + * @param address Memory address to set. Byte address on 18F + * @param value Word data to write in. + */ +void Processor::set_out_of_range_pm(uint address, uint value) +{ + cout << "Warning::Out of range address " << address << " value " << value << endl; + cout << "Max allowed address is 0x" << hex << (program_address_limit()-1) << '\n'; +} + +void Processor::save_state(FILE *fp) +{ + if(!fp) return; + + fprintf(fp,"PROCESSOR:%s\n",name().c_str()); + + for( uint i=1; iisa() != Register::INVALID_REGISTER) + { + fprintf(fp,"R:%X:%s:(%X,%X)\n", + reg->address, + reg->name().c_str(), + reg->value.get(), + reg->value.geti()); + } + } + if(pc) fprintf(fp,"P:0:PC:%X\n",pc->value); +} + +void Processor::save_state(void) +{ +} + +void Processor::load_state(FILE *fp) +{ + if(!fp) return; + cout << "Not implemented\n"; +} + +/* If Vdd is changed, fix up the digital high low thresholds */ +void Processor::update_vdd() +{ + IOPIN *pin; + for(int i=1; i <= get_pin_count(); i++) + { + pin = get_pin(i); + if (pin) pin->set_digital_threshold(get_Vdd()); + } +} + +Processor * Processor::construct(void) +{ + cout << " Can't create a generic processor\n"; + return 0; +} + +//------------------------------------------------------------------- +// +// step_over - In most cases, step_over will simulate just one instruction. +// However, if the next instruction is a branching one (e.g. goto, call, +// return, etc.) then a break point will be set after it and gpsim will +// begin 'running'. This is useful for stepping over time-consuming calls. +// +void Processor::step_over (bool refresh) +{ + step(1,refresh); // Try one step +} + +//------------------------------------------------------------------- +// create +// +// The purpose of this member function is to 'create' a pic processor. +// Since this is a base class member function, only those things that +// are common to all pics are created. + +void Processor::create (void) +{ + std::stringstream buf; + buf << " a generic processor cannot be created " << __FILE__ << ":" << __LINE__; + throw new FatalError(buf.str()); +} + +void Processor::dump_registers (void) +{ + // parse_string("dump"); +} + +void Processor::Debug() +{ + cout << " === Debug === \n"; + if(pc) cout << "PC=0x"<value << endl; +} + +uint64_t Processor::cycles_used(uint address) +{ + return program_memory[address]->getCyclesUsed(); +} + +MemoryAccess::MemoryAccess(Processor *new_cpu) +{ + cpu = new_cpu; +} + +MemoryAccess::~MemoryAccess() +{ +} + +Processor *MemoryAccess::get_cpu(void) +{ + return cpu; +} + +//------------------------------------------------------------------- +//------------------------------------------------------------------- +// +// ProgramMemoryAccess +// +// The ProgramMemoryAccess class provides an interface to the processor's +// program memory. On Pic processors, this is the memory where instructions +// are stored. +// +ProgramMemoryAccess::ProgramMemoryAccess(Processor *new_cpu) : + MemoryAccess(new_cpu) +{ + init(new_cpu); +} + +ProgramMemoryAccess::~ProgramMemoryAccess() +{ +} + +void ProgramMemoryAccess::init( Processor *new_cpu ) +{ + _address = _opcode = _state = 0; +} + +void ProgramMemoryAccess::putToAddress( uint address, instruction *new_instruction ) +{ + putToIndex(cpu->map_pm_address2index(address), new_instruction); +} + +void ProgramMemoryAccess::putToIndex( uint uIndex, instruction *new_instruction ) +{ + if(!new_instruction) return; + + cpu->program_memory[uIndex] = new_instruction; + + new_instruction->update(); +} + +void ProgramMemoryAccess::remove(uint address, instruction *bp_instruction) +{ +} + +instruction *ProgramMemoryAccess::getFromAddress(uint address) +{ + if(!cpu || !cpu->IsAddressInRange(address)) return &cpu->bad_instruction; + + uint uIndex = cpu->map_pm_address2index(address); + return getFromIndex(uIndex); +} + +instruction *ProgramMemoryAccess::getFromIndex(uint uIndex) +{ + if(uIndex < cpu->program_memory_size()) return cpu->program_memory[uIndex]; + else return 0; +} + +// like get, but will ignore instruction break points +instruction *ProgramMemoryAccess::get_base_instruction(uint uIndex) +{ + instruction *p; + p=getFromIndex(uIndex); + return p; +} + +//---------------------------------------- +// get_rom - return the rom contents from program memory +// If the address is normal program memory, then the opcode +// of the instruction at that address is returned. +// If the address is some other special memory (like configuration +// memory in a PIC) then that data is returned instead. + +uint ProgramMemoryAccess::get_rom(uint addr) +{ + return cpu->get_program_memory_at_address(addr); +} + +//---------------------------------------- +// put_rom - write new data to the program memory. +// If the address is in normal program memory, then a new instruction +// will be generated (if possible). If the address is some other +// special memory (like configuration memory), then that area will +// be updated. +// +void ProgramMemoryAccess::put_rom(uint addr,uint value) +{ + return cpu->init_program_memory(addr,value); +} + +//---------------------------------------- +// get_opcode - return an opcode from program memory. +// If the address is out of range return 0. + +uint ProgramMemoryAccess::get_opcode(uint addr) +{ + instruction * pInstr = getFromAddress(addr); + if(pInstr != 0) return pInstr->get_opcode(); + else return 0; +} + +//---------------------------------------- +// get_opcode_name - return an opcode name from program memory. +// If the address is out of range return 0; + +char *ProgramMemoryAccess::get_opcode_name(uint addr, char *buffer, uint size) +{ + uint uIndex = cpu->map_pm_address2index(addr); + if(uIndex < cpu->program_memory_size()) + return cpu->program_memory[uIndex]->name(buffer,size); + + *buffer = 0; + return 0; +} + +//---------------------------------------- +// Get the current value of the program counter. + +uint ProgramMemoryAccess::get_PC(void) +{ + if(cpu && cpu->pc) return cpu->pc->get_value(); + + return 0; +} + +//---------------------------------------- +// Get the current value of the program counter. +void ProgramMemoryAccess::set_PC(uint new_pc) +{ + if(cpu && cpu->pc) return cpu->pc->put_value(new_pc); +} + +Program_Counter *ProgramMemoryAccess::GetProgramCounter(void) +{ + if(cpu) return cpu->pc; + return 0; +} + +void ProgramMemoryAccess::put_opcode_start(uint addr, uint new_opcode) +{ + + uint uIndex = cpu->map_pm_address2index(addr); + if( (uIndex < cpu->program_memory_size()) && (_state == 0)) + { + _state = 1; + _address = addr; + _opcode = new_opcode; + get_cycles().set_break_delta(40000, this); + bp.set_pm_write(); + } +} + +void ProgramMemoryAccess::put_opcode(uint addr, uint new_opcode) +{ + uint uIndex = cpu->map_pm_address2index(addr); + if(uIndex >= cpu->program_memory_size()) return; + + instruction *old_inst = get_base_instruction(uIndex); + instruction *new_inst = cpu->disasm(addr,new_opcode); + + if(new_inst==0) + { + puts("FIXME, in ProgramMemoryAccess::put_opcode"); + return; + } + if(!old_inst) + { + putToIndex(uIndex,new_inst); + return; + } + if(old_inst->isa() == instruction::INVALID_INSTRUCTION) + { + putToIndex(uIndex,new_inst); + return; + } + // Now we need to make sure that the instruction we are replacing is + // not a multi-word instruction. The 12 and 14 bit cores don't have + // multi-word instructions, but the 16 bit cores do. If we are replacing + // the second word of a multiword instruction, then we only need to + // 'uninitialize' it. + + instruction *prev = get_base_instruction(cpu->map_pm_address2index(addr-1)); + + if(prev) prev->initialize(false); + + cpu->program_memory[uIndex] = new_inst; + cpu->program_memory[uIndex]->setModified(true); + cpu->program_memory[uIndex]->update(); + + delete(old_inst); +} + +bool ProgramMemoryAccess::hasValid_opcode_at_address(uint address) +{ + if(getFromAddress(address)->isa() != instruction::INVALID_INSTRUCTION) + return true; + + return false; +} + +bool ProgramMemoryAccess::hasValid_opcode_at_index(uint uIndex) +{ + if((getFromIndex(uIndex))->isa() != instruction::INVALID_INSTRUCTION) + return true; + + return false; +} +//-------------------------------------------------------------------------- + +bool ProgramMemoryAccess::isModified(uint address) // ***FIXME*** - address or index? +{ + uint uIndex = cpu->map_pm_address2index(address); + + if((uIndex < cpu->program_memory_size()) && cpu->program_memory[uIndex]->bIsModified()) + return true; + + return false; +} + +//======================================================================== +// Register Memory Access + +RegisterMemoryAccess::RegisterMemoryAccess(Processor *new_cpu) : + MemoryAccess(new_cpu) +{ + registers = 0; + nRegisters = 0; +} + +RegisterMemoryAccess::~RegisterMemoryAccess() +{ +} + +Register *RegisterMemoryAccess::get_register(uint address) +{ + if(!cpu || !registers || nRegisters<=address) return 0; + + Register *reg = registers[address]; + + // If there are breakpoints set on the register, then drill down + // through them until we get to the real register. + + return reg ? reg->getReg() : 0; +} + +void RegisterMemoryAccess::set_Registers(Register **_registers, int _nRegisters) +{ + nRegisters = _nRegisters; + registers = _registers; +} +//------------------------------------------------------------------------ +// insertRegister - Each register address may contain a linked list of registers. +// The top most register is the one that is referenced whenever a processor +// accesses the register memory. The primary purpose of the linked list is to +// support register breakpoints. For example, a write breakpoint is implemented +// with a breakpoint class derived from the register class. Setting a write +// breakpoint involves creating the write breakpoint object and placing it +// at the top of the register linked list. Then, when a processor attempts +// to write to this register, the breakpoint object will capture this and +// halt the simulation. + +bool RegisterMemoryAccess::insertRegister(uint address, Register *pReg) +{ + if(!cpu || !registers || nRegisters <= address ||!pReg) return false; + + Register *ptop = registers[address]; + pReg->setReplaced(ptop); + registers[address] = pReg; + + return true; +} + +//------------------------------------------------------------------------ +// removeRegister - see comment on insertRegister. This method removes +// a register object from the breakpoint linked list. + +bool RegisterMemoryAccess::removeRegister(uint address, Register *pReg) +{ + if(!cpu || !registers || nRegisters <= address ||!pReg) return false; + + Register *ptop = registers[address]; + + if (ptop == pReg && pReg->getReplaced()) + registers[address] = pReg->getReplaced(); + else + while (ptop) + { + Register *pNext = ptop->getReplaced(); + if (pNext == pReg) + { + ptop->setReplaced(pNext->getReplaced()); + return true; + } + ptop = pNext; + } + return false; +} + +static InvalidRegister AnInvalidRegister(0,"AnInvalidRegister"); + +Register &RegisterMemoryAccess::operator [] (uint address) +{ + if(!registers || get_size() <= address) return AnInvalidRegister; + + return *registers[address]; +} + +void RegisterMemoryAccess::reset (RESET_TYPE r) +{ + for(uint i=0; i* ProcessorConstructor::processor_list; + +ProcessorConstructor::ProcessorConstructor(tCpuContructor _cpu_constructor, + const char *name1, + const char *name2, + const char *name3, + const char *name4) +{ + cpu_constructor = _cpu_constructor; // Pointer to the processor constructor + names[0] = name1; // First name + names[1] = name2; // and three aliases... + names[2] = name3; + names[3] = name4; + // Add the processor to the list of supported processors: + GetList()->push_back(this); +} + +Processor* ProcessorConstructor::ConstructProcessor(const char *opt_name) +{ + // Instantiate a specific processor. If a name is provided, then that + // will be used. Otherwise, the third name in the list of aliases for + // this processor will be used instead. (Why 3rd?... Before optional + // processor names were allowed, the default name matched what is now + // the third alias; this maintains a backward compatibility). + + if (opt_name && strlen(opt_name)) return cpu_constructor( opt_name ); + + return cpu_constructor( names[2] ); +} + +list* ProcessorConstructor::GetList() +{ + if(processor_list == NULL) processor_list = new list ; + + return processor_list; +} + +//------------------------------------------------------------ +// Search through the list of supported processors for +// the one matching 'name' and construct Processor +Processor* ProcessorConstructor::CreatePic( const char *name ) +{ + list::iterator processor_iterator; + list* pl = GetList(); + + for( processor_iterator = pl->begin(); processor_iterator != pl->end(); ++processor_iterator ) + { + ProcessorConstructor *p = *processor_iterator; + for(int j=0; jnames[j] && strcmp(name,p->names[j]) == 0) + return p->ConstructProcessor( name ); + } + return 0; +} + +//------------------------------------------------------------ +// dump() -- Print out a list of all of the processors +// +string ProcessorConstructor::dump(void) +{ + ostringstream stream; + list ::iterator processor_iterator; + + const int nPerRow = 4; // Number of names to print per row. + + int i,j,k,longest; + + list* pl = GetList(); + ProcessorConstructor *p; + + // loop through all of the processors and find the + // one with the longest name + longest = 0; + + for( processor_iterator = pl->begin(); processor_iterator != pl->end(); ++processor_iterator) + { + p = *processor_iterator; + k = strlen( p->names[1] ); + if( k>longest ) longest = k; + } + + for( processor_iterator = pl->begin(); processor_iterator != pl->end(); ) // Print the name of each processor. + { + for( i=0; iend(); i++ ) + { + p = *processor_iterator++; + stream << p->names[1]; + + if( inames[1]); + for(j=0; j. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +#ifndef __PROCESSOR_H__ +#define __PROCESSOR_H__ + +#include +#include +#include +#include + +#include "gpsim_classes.h" +#include "modules.h" +#include "registers.h" +#include "gpsim_time.h" + +extern void init_attributes(); +extern void destroy_attributes(); + +class Processor; +class ProcessorConstructor; +class ProgramFileType; +class FileContext; +class FileContextList; +class CPU_Freq; +class CPU_Vdd; +class Stimulus_Node; + +//--------------------------------------------------------- +/// MemoryAccess - A base class designed to support +/// access to memory. For the PIC, this class is extended by +/// the ProgramMemoryAccess and RegisterMemoryAccess classes. + +class MemoryAccess : public TriggerObject, public gpsimObject +{ + public: + + explicit MemoryAccess(Processor *new_cpu); + ~MemoryAccess(); + + virtual Processor *get_cpu(void); + + list SpecialRegisters; + + protected: + + Processor *cpu; /// The processor to which this object belongs +}; + + +//--------------------------------------------------------- +/// The ProgramMemoryAccess class is the interface used +/// by objects other than the simulator to manipulate the +/// pic's program memory. For example, the breakpoint class +/// modifies program memory when break points are set or +/// cleared. The modification goes through here. + +class ProgramMemoryAccess : public MemoryAccess +{ + public: + + explicit ProgramMemoryAccess(Processor *new_cpu); + ~ProgramMemoryAccess(); + + virtual void putToAddress(uint addr, instruction *new_instruction); + virtual void putToIndex(uint uIndex, instruction *new_instruction); + + instruction *getFromAddress(uint addr); + instruction *getFromIndex(uint uIndex); + instruction *get_base_instruction(uint addr); + + uint get_rom(uint addr); + void put_rom(uint addr,uint value); + + virtual uint get_PC(void); + virtual void set_PC(uint); + virtual Program_Counter *GetProgramCounter(void); + + void remove(uint address, instruction *bp_instruction); + + uint get_opcode(uint addr); + void put_opcode(uint addr, uint new_opcode); + char *get_opcode_name(uint addr, char *buffer, uint size); + bool hasValid_opcode_at_address(uint address); + bool hasValid_opcode_at_index(uint uIndex); + + // When a pic is replacing one of it's own instructions, this routine is called. + void put_opcode_start(uint addr, uint new_opcode); + + virtual void callback(void); + void init( Processor* ); + + // isModified -- returns true if the program at the address has been modified + // (this is only valid for those processor capable of writing to their own program memory) + bool isModified( uint address ); + + private: + uint + _address, + _opcode, + _state; +}; + + +//--------------------------------------------------------- +/// The RegisterMemoryAccess class is the interface used +/// by objects other than the simulator to manipulate the +/// cpu's register memory. + +class RegisterMemoryAccess : public MemoryAccess +{ + public: + + explicit RegisterMemoryAccess(Processor *pCpu); + virtual ~RegisterMemoryAccess(); + + virtual Register *get_register(uint address); + uint get_size(void) { return nRegisters; } + void set_Registers(Register **_registers, int _nRegisters); + + // The insertRegister and removeRegister methods are used primarily + // to set and clear breakpoints. + bool insertRegister(uint address, Register *); + bool removeRegister(uint address, Register *); + + void reset(RESET_TYPE r); + + Register &operator [] (uint address); + + private: + uint nRegisters; + bool initialized; + Register **registers; // Pointer to the array of registers. +}; + + +class CPU_Vdd : public Float +{ + public: + CPU_Vdd(Processor * _cpu, double freq); //const char *_name, double newValue, const char *desc); + + virtual void set( double d ); + + private: + Processor * cpu; +}; + +//------------------------------------------------------------------------ +// +/// Processor - a generic base class for processors supported by gpsim + +class Processor : public Module +{ + public: + Processor(const char *_name=0, const char *desc=0); + virtual ~Processor(); + + uint clocks_per_inst; /// Oscillator cycles for 1 instruction + + /// Stimulus nodes for CVREF and V06REF + Stimulus_Node *CVREF; + Stimulus_Node *V06REF; + + /// Processor capabilities + unsigned long m_Capabilities; + enum { + eSTACK = 0x00000001, + eWATCHDOGTIMER = 0x00000002, + eBREAKONSTACKOVER = 0x00000004, + eBREAKONSTACKUNDER = 0x00000009, + eBREAKONWATCHDOGTIMER = 0x00000010, + }; + unsigned long GetCapabilities(); + + /// Processor RAM + Register **registers; + Register **register_bank;/// Currently selected RAM bank + + instruction **program_memory;/// Program memory - where instructions are stored. + + /// Program memory interface + ProgramMemoryAccess *pma; + virtual ProgramMemoryAccess * createProgramMemoryAccess(Processor *processor); + virtual void destroyProgramMemoryAccess(ProgramMemoryAccess *pma); + virtual instruction * ConstructInvalidInstruction(Processor *processor, + uint address, uint new_opcode) { return new invalid_instruction(processor,address,new_opcode); } + + /// register memory interface + RegisterMemoryAccess rma; + + /// eeprom memory interface (if present). + RegisterMemoryAccess ema; + uint m_uPageMask; + uint m_uAddrMask; + + /// Program Counter + Program_Counter *pc; + + invalid_instruction bad_instruction; // Processor's 'bad_instruction' object + + // Creation and manipulation of registers + void create_invalid_registers (); + void delete_invalid_registers (); + + void add_file_registers(uint start_address, uint end_address, uint alias_offset); + void delete_file_registers(uint start_address, uint end_address, bool bRemoveWithoutDelete=false); + void alias_file_registers(uint start_address, uint end_address, uint alias_offset); + + virtual void init_register_memory(uint memory_size); + virtual uint register_memory_size () const = 0; + + virtual uint CalcJumpAbsoluteAddress(uint uInstAddr, uint uDestAddr) { return uDestAddr; } + virtual uint CalcCallAbsoluteAddress(uint uInstAddr, uint uDestAddr) { return uDestAddr; } + + // Creation and manipulation of Program Memory + virtual void init_program_memory(uint memory_size); + virtual void init_program_memory(uint address, uint value); + virtual void init_program_memory_at_index(uint address, uint value); + virtual void init_program_memory_at_index(uint address, const unsigned char *, int nBytes); + + virtual uint program_memory_size(void) const {return 0;}; + virtual uint program_address_limit(void) const { return map_pm_index2address(program_memory_size());}; + virtual uint get_program_memory_at_address( uint address ); + void build_program_memory( uint *memory, uint minaddr, uint maxaddr); + virtual void erase_program_memory( uint address ); + + virtual int map_rm_address2index(int address) {return address;}; + virtual int map_rm_index2address(int index) {return index;}; + virtual int map_pm_address2index(int address) const {return address;}; + virtual int map_pm_index2address(int index) const {return index;}; + + virtual void set_out_of_range_pm(uint address, uint value); + + uint64_t cycles_used(uint address); + + virtual bool IsAddressInRange(uint address) { return address < program_address_limit(); } + + virtual int opcode_size() { return 2;}// opcode_size - number of bytes for an opcode. + + // Symbolic debugging + virtual void dump_registers(void); + virtual instruction * disasm( uint address,uint inst)=0; + + // Processor State + virtual void save_state(FILE *); // copy the entire processor state to a file + virtual void save_state();// take an internal snap shot of the current state. + virtual void load_state(FILE *);// restore the processor state + + // Execution control + virtual void finish(void) = 0; + + virtual void sleep(void) {}; + virtual void exit_sleep() {fputs("RRR exit_sleep\n", stderr);} + virtual void step(uint steps,bool refresh=true) = 0; + virtual void step_over(bool refresh=true); + virtual void step_one(bool refresh=true) = 0; + virtual void step_cycle() = 0; + virtual void interrupt(void) = 0 ; + + bool getBreakOnInvalidRegisterRead() { return *m_pbBreakOnInvalidRegisterRead; } + bool getBreakOnInvalidRegisterWrite() { return *m_pbBreakOnInvalidRegisterWrite; } + + // Processor Clock control + // + void set_frequency(double f); + void set_frequency_rc(double f); + void set_RCfreq_active(bool); + virtual double get_frequency(); + + void set_ClockCycles_per_Instruction(uint cpi) { clocks_per_inst = cpi; } + uint get_ClockCycles_per_Instruction(void) { return clocks_per_inst; } + + void update_cps(void); + + virtual double get_OSCperiod(); + virtual double get_InstPeriod() { return get_OSCperiod()* get_ClockCycles_per_Instruction(); } + + // Configuration control + virtual bool set_config_word(uint address, uint cfg_word) {return false;} // fixme - make this a pure virtual function... + virtual uint get_config_word(uint address) = 0; + virtual uint config_word_address(void) {return 0;} + virtual int get_config_index(uint address){return -1;}; + + virtual void reset(RESET_TYPE r) = 0; // Processor reset + + virtual double get_Vdd() { return m_vdd->getVal(); } + virtual void set_Vdd(double v) { m_vdd->set(v); } + virtual void update_vdd(); + + virtual void Debug(); // Debugging - used to view the state of the processor (or whatever). + + virtual void create(void); + static Processor *construct(void); + ProcessorConstructor *m_pConstructorObject; + + CPU_Vdd *m_vdd; + + ClockPhase *mCurrentPhase; + phaseExecute1Cycle *mExecute1Cycle; + phaseExecute2ndHalf *mExecute2ndHalf; // misnomer - should be 2-cycle + phaseCaptureInterrupt *mCaptureInterrupt; + phaseIdle *mIdle; + + private: + CPU_Freq *mFrequency; + uint m_ProgramMemoryAllocationSize; + + Boolean *m_pbBreakOnInvalidRegisterRead; + Boolean *m_pbBreakOnInvalidRegisterWrite; +}; + +//------------------------------------------------------------------- +// +// ProcessorConstructor -- a class to handle all of gpsim's supported +// processors +// +class ProcessorConstructor +{ + public: + typedef Processor* (*tCpuContructor) (const char *_name); + + ProcessorConstructor( tCpuContructor _cpu_constructor, + const char *name1, + const char *name2, + const char *name3=0, + const char *name4=0); + + virtual ~ProcessorConstructor(){} + + virtual Processor* ConstructProcessor( const char *opt_name=0 ); + + static list * GetList(); + + static Processor* CreatePic( const char *type ); + + static string dump(void); + + #define nProcessorNames 4 // The processor name (plus upto three aliases). + const char *names[nProcessorNames]; + + protected: + tCpuContructor cpu_constructor; // A pointer to a function that when called will construct a processor + + static list * processor_list; +}; + +#endif diff --git a/src/gpsim/protocol.cc b/src/gpsim/protocol.cc new file mode 100644 index 0000000..1cb51a4 --- /dev/null +++ b/src/gpsim/protocol.cc @@ -0,0 +1,333 @@ +/* + Copyright (C) 2004 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include +#include +#include + +#include "config.h" + +#include "protocol.h" + +uint a2i( char b ) +{ + if( b>='0' && b<='9') return b-'0'; + if( b>='A' && b<='F') return b-'A'+10; + if( b>='a' && b<='f') return b-'a'+10; + + return 0; +} +char i2a(uint i) +{ + i &= 0x0f; + if(i < 10) return '0' + i; + + return 'A'+ i- 10; +} + +uint ascii2uint(char **buffer, int digits) +{ + uint ret = 0; + char *b = *buffer; + + for(int i=0; i (size - index)) ulen = size-index; + + if(ulen) + { + memcpy(&buffer[index],s, ulen); + index += ulen; + } +} + +void PacketBuffer::advanceIndex(uint amount) +{ + if(index + amount < size) index += amount; + else index = size-1; +} + +void PacketBuffer::terminate() +{ + if(index < size) buffer[index]=0; +} +//======================================================================== +Packet::Packet(uint rxsize, uint txsize) +{ + rxBuffer = new PacketBuffer(rxsize); + txBuffer = new PacketBuffer(txsize); +} + +bool Packet::DecodeHeader() +{ + if(*rxBuffer->buffer == '$') + { + rxBuffer->index = 1; + return true; + } + rxBuffer->index = 0; + + return false; +} + +bool Packet::DecodeChar(char c) +{ + if(*rxBuffer->getBuffer() == c) + { + rxBuffer->index++; + return true; + } + return false; +} + +bool Packet::DecodeUInt32(uint &i) +{ + char *b = rxBuffer->getBuffer(); + + if(ascii2uint(&b,2) == eGPSIM_TYPE_UINT32) + { + i = ascii2uint(b,8); + rxBuffer->index += 2+8; + + return true; + } + return false; +} + +bool Packet::DecodeUInt64(uint64_t &i) +{ + char *b = rxBuffer->getBuffer(); + + if(ascii2uint(&b,2) == eGPSIM_TYPE_UINT64) + { + i = ascii2uint64(b,16); + rxBuffer->index += 2+16; + + return true; + } + return false; +} + +bool Packet::DecodeBool(bool &b) +{ + char *buff = rxBuffer->getBuffer(); + + if(ascii2uint(&buff,2) == eGPSIM_TYPE_BOOLEAN) + { + if(*buff == '0') b = false; + else if(*buff == '1') b = true; + else return false; + + rxBuffer->index += 2+1; + + return true; + } + return false; +} + +bool Packet::DecodeFloat(double &d) +{ + char *b = rxBuffer->getBuffer(); + + if(ascii2uint(&b,2) == eGPSIM_TYPE_FLOAT) + { + double dtry = strtod(b, &b); + uint len = b - rxBuffer->buffer; + if( len < rxBuffer->size - rxBuffer->index) + { + rxBuffer->index += len; + d = dtry; + return true; + } + } + return false; +} + +bool Packet::DecodeObjectType(uint &i) +{ + i = ascii2uint(rxBuffer->getBuffer(),2); + rxBuffer->index += 2; + + return true; +} + +bool Packet::DecodeString(char *retStr, int maxLen) +{ + char *b = rxBuffer->getBuffer(); + + if(ascii2uint(&b,2) == eGPSIM_TYPE_STRING) + { + int length = ascii2uint(&b,2); + + maxLen--; // reserve space for a terminating 0. + + length = (maxLen < length) ? maxLen : length; + + strncpy(retStr, b, length); + retStr[length] = 0; + + //*buffer = b + length; + + rxBuffer->index += 2+2+length; + return true; + } + + return false; +} + +bool Packet::EncodeHeader() +{ + txBuffer->putc('$'); + txBuffer->terminate(); + + return true; +} + +bool Packet::EncodeUInt32(uint i) +{ + txBuffer->putc(i2a(eGPSIM_TYPE_UINT32 /16)); + txBuffer->putc(i2a(eGPSIM_TYPE_UINT32 )); + + for(int j=7; j>=0; j--) txBuffer->putc ( i2a ( i>> (4*j))); + + return true; +} + +bool Packet::EncodeUInt64(uint64_t i) +{ + + txBuffer->putc(i2a(eGPSIM_TYPE_UINT64 /16)); + txBuffer->putc(i2a(eGPSIM_TYPE_UINT64 )); + + for(int j=15; j>=0; j--) txBuffer->putc ( i2a ( i>> (4*j))); + + return true; +} + +bool Packet::EncodeObjectType(uint i) +{ + EncodeHeader(); + + //txBuffer->putc(i2a(eGPSIM_TYPE_OBJECT /16)); + //txBuffer->putc(i2a(eGPSIM_TYPE_OBJECT )); + + txBuffer->putc ( i2a ( i>> (4*1))); + txBuffer->putc ( i2a ( i>> (4*0))); + + return true; +} + +bool Packet::EncodeBool(bool b) +{ + txBuffer->putc(i2a(eGPSIM_TYPE_BOOLEAN /16)); + txBuffer->putc(i2a(eGPSIM_TYPE_BOOLEAN )); + + if(b) txBuffer->putc('1'); + else txBuffer->putc('0'); + + return true; +} + +bool Packet::EncodeFloat(double d) +{ + txBuffer->putc(i2a(eGPSIM_TYPE_FLOAT /16)); + txBuffer->putc(i2a(eGPSIM_TYPE_FLOAT )); + + char buff[256]; + + snprintf(buff,sizeof(buff),"%8E~",d); + + txBuffer->puts(buff,strlen(buff)); + + return true; +} + +bool Packet::EncodeString(const char *str, int len) +{ + if(!str) return false; + + txBuffer->putc(i2a(eGPSIM_TYPE_STRING /16)); + txBuffer->putc(i2a(eGPSIM_TYPE_STRING )); + + if(len < 0) len = strlen(str); + + txBuffer->putc(i2a(len>>4)); + txBuffer->putc(i2a(len)); + + txBuffer->puts(str, len); + + return true; +} + +bool Packet::EncodeCustom(const char *str, int len) +{ + if(!str) return false; + + txBuffer->putc(i2a(eGPSIM_TYPE_CUSTOM /16)); + txBuffer->putc(i2a(eGPSIM_TYPE_CUSTOM )); + + txBuffer->putc(i2a(len>>4)); + txBuffer->putc(i2a(len)); + + txBuffer->puts(str, len); + + return true; +} diff --git a/src/gpsim/protocol.h b/src/gpsim/protocol.h new file mode 100644 index 0000000..47a3453 --- /dev/null +++ b/src/gpsim/protocol.h @@ -0,0 +1,200 @@ +/* + Copyright (C) 2004 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __PROTCOL_H__ +#define __PROTCOL_H__ + +typedef unsigned int uint; + +#ifdef putc +#undef putc +#endif + +#include + +/// gpsim protocol +/// +/// gpsim's protocol interface is designed to provide a way for clients +/// that are not linked with gpsim to interface with gpsim. + +/// Basic types +/// These are the fundamental types the protocol interface +/// supports. + +enum eGPSIMObjectTypes + { + eGPSIM_TYPE_CHAR = 1, + eGPSIM_TYPE_STRING, + eGPSIM_TYPE_UINT32, + eGPSIM_TYPE_UCHAR, + eGPSIM_TYPE_BOOLEAN, + eGPSIM_TYPE_INT32, + eGPSIM_TYPE_INT64, + eGPSIM_TYPE_UINT64, + eGPSIM_TYPE_FLOAT, + eGPSIM_TYPE_DOUBLE, + eGPSIM_TYPE_OBJECT, + eGPSIM_TYPE_CUSTOM, + }; + +/// Socket Commands +/// FIXME - document how these are used. +/// +enum eGPSIMSocketCommands + { + + GPSIM_CMD_CREATE_NOTIFY_LINK = 0xE0, + GPSIM_CMD_CREATE_CALLBACK_LINK = 0xE1, + + GPSIM_CMD_CREATE_SOCKET_LINK = 0xF0, + GPSIM_CMD_REMOVE_SOCKET_LINK = 0xF1, + GPSIM_CMD_QUERY_SOCKET_LINK = 0xF2, + GPSIM_CMD_WRITE_TO_SOCKET_LINK = 0xF3, + + GPSIM_CMD_QUERY_SYMBOL = 0xF4, + GPSIM_CMD_WRITE_TO_SYMBOL = 0xF5, + + GPSIM_CMD_RUN = 0xF6, + GPSIM_CMD_RESET = 0xF7, + + }; + + +/// PacketBuffer +/// A packet buffer is an area of memory that gpsim and a client +/// use to exchange information. The buffer consists of a sequence +/// encoded GPSIMObjectTypes. Member functions for encoding and +/// decoding each type. + +class PacketBuffer +{ +public: + PacketBuffer(uint _size); + ~PacketBuffer(); + + char * getBuffer() + { + return &buffer[index]; + } + + uint getSize() + { + return size-index; + } + + void terminate(); + + void putc(char c) + { + if(index < size) + buffer[index++] = c; + } + void putAt(int pos, char c) + { + if(pos >=0 && pos < (int) size) + buffer[pos] = c; + } + + void puts(const char *, int); + + /// advanceIndex() will move the index pointer forward + + void advanceIndex(uint amount); + + bool bHasData() { return index!=0; } + + //private: + char *buffer; + uint index; + uint size; + +}; + +class Packet +{ +public: + Packet(uint rxsize, uint txsize); + + bool DecodeHeader(); + bool DecodeObjectType(uint &); + bool DecodeChar(char); + bool DecodeUInt32(uint &); + bool DecodeUInt64(uint64_t &); + bool DecodeString(char *, int); + bool DecodeBool(bool &); + bool DecodeFloat(double &); + + bool EncodeHeader(); + bool EncodeUInt32(uint); + bool EncodeUInt64(uint64_t); + bool EncodeObjectType(uint); + bool EncodeString(const char *str, int len=-1); + bool EncodeCustom(const char *str, int len); + bool EncodeBool(bool); + bool EncodeFloat(double); + + char *rxBuff() + { + return rxBuffer->getBuffer(); + } + uint rxSize() + { + return rxBuffer->getSize(); + } + void rxTerminate(int pos) + { + rxBuffer->putAt(pos,0); + } + + void rxAdvance(uint amount) + { + rxBuffer->advanceIndex(amount); + } + bool brxHasData() + { + return rxBuffer->bHasData(); + } + + char *txBuff() + { + return txBuffer->buffer; + } + uint txBytesBuffered() + { + return txBuffer->index; + } + void txTerminate() + { + txBuffer->terminate(); + } + void prepare() + { + rxBuffer->index = 0; + txBuffer->index = 0; + } + +private: + PacketBuffer *rxBuffer; + PacketBuffer *txBuffer; + +}; + + +#endif diff --git a/src/gpsim/registers.cc b/src/gpsim/registers.cc new file mode 100644 index 0000000..5c43bdb --- /dev/null +++ b/src/gpsim/registers.cc @@ -0,0 +1,508 @@ +/* + Copyright (C) 1998-2003 Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +#include +#include +#include + +#include "config.h" +#include "processor.h" +#include "registers.h" + +uint count_bits(uint ui) +{ + uint bits=0; + + while (ui) { + ui &= (ui-1); + bits++; + } + return bits; +} +//======================================================================== +// toString +// +// Convert a RegisterValue type to a string. +// +// A RegisterValue type allows the bits of a register to take on three +// values: High, Low, or undefined. If all of the bits are defined, +// then this routine will convert register value to a hexadecimal string. +// Any undefined bits within a nibble will cause the associated nibble to +// be undefined and will get converted to a question mark. +// + +char * RegisterValue::toString(char *str, int len, int regsize) const +{ + if(str && len) { + RegisterValue rv = *this; + + char hex2ascii[] = "0123456789ABCDEF"; + char undefNibble = '?'; + int i; + + int m = regsize * 2 + 1; + if(len < m) + m = len; + + m--; + + for(i=0; i < m; i++) { + if(rv.init & 0x0f) + str[m-i-1] = undefNibble; + else + str[m-i-1] = hex2ascii[rv.data & 0x0f]; + rv.init >>= 4; + rv.data >>= 4; + } + str[m] = 0; + + } + return str; +} + +//======================================================================== +// SplitBitString +// +// The purpose of this routine is to convert a string of bitnames into +// an array of names. The string is formatted like: +// +// b1.b2.b3 +// +// In other words, a period is the delimeter between the names. +// This gets converted to: +// +// b1 +// b2 +// b2 +// +// INPUTS +// n - number of names +// in - input string formatted as described +// in2 - if 'in' is NULL, then all 'n' names will be 'in2' +// +// OUTPUTS +// out - an array to hold the strings. +// +// Note, the input string 'in' will be modified such that all of the '.'s will +// get turned into string terminating 0's. +// + +static void SplitBitString(int n, const char **out, char *in, const char *in2) +{ + + if(!in) { + for(int i=0; i " << out[i] << endl; + } + } +} + +//======================================================================== +// toBitStr +// +// Convert a RegisterValue type to a bit string +// +// Given a pointer to a string, this function will convert a register +// value into a string of ASCII characters. If no names are given +// for the bits, then the default values of 'H', 'L', and '?' are +// used for high, low and undefined. +// +// The input 'BitPos' is a bit mask that has a bit set for each bit that +// the user wishes to display. +// + +char * RegisterValue::toBitStr(char *s, int len, uint BitPos, + const char *cByteSeparator, + const char *HiBitNames, + const char *LoBitNames, + const char *UndefBitNames) const +{ + uint i,mask,max; + + if(!s || len<=0) + return 0; + + max = 32; + + uint nBits = count_bits(BitPos); + + if(nBits >= max) + nBits = max; + + const char *HiNames[32]; + const char *LoNames[32]; + const char *UndefNames[32]; + + + char *cHi = HiBitNames ? strdup(HiBitNames) : 0; + char *cLo = LoBitNames ? strdup(LoBitNames) : 0; + char *cUn = UndefBitNames ? strdup(UndefBitNames) : 0; + + SplitBitString(nBits, HiNames, cHi, "1"); + SplitBitString(nBits, LoNames, cLo, "0"); + SplitBitString(nBits, UndefNames, cUn, "?"); + + char *dest = s; + + int bitNumber=31; + for(i=0,mask=1<<31; mask; mask>>=1,bitNumber--) { + + if(BitPos & mask) { + + const char *H = HiNames[i]; + const char *L = LoNames[i]; + const char *U = UndefNames[i]; + + const char *c = (init & mask) ? U : + ((data & mask) ? H : L); + + strncpy(dest, c, len); + int l = strlen(c); + len -= l; + dest += l; + *dest = 0; + + if(i++>nBits || len < 0) + break; + + if(cByteSeparator && bitNumber && ((bitNumber%8)==0)) { + strncpy(dest, cByteSeparator, len); + int l = strlen(cByteSeparator); + len -= l; + dest += l; + *dest = 0; + if(len < 0) + break; + } + + } + + } + + free(cHi); + free(cLo); + free(cUn); + + return s; +} + + +//-------------------------------------------------- +// Member functions for the file_register base class +//-------------------------------------------------- +// +// For now, initialize the register with valid data and set that data equal to 0. +// Eventually, the initial value will be marked as 'uninitialized. + +Register::Register(Module *_cpu, const char *pName, const char *pDesc) + : Value(pName,pDesc,_cpu), value(RegisterValue(0, 0)), + address(AN_INVALID_ADDRESS), + alias_mask(0), por_value(RegisterValue(0, 0)), m_replaced(0) +{ + //set_xref(new XrefObject(this)); + read_access_count=0; + write_access_count=0; + mValidBits = 0xFF; + +} +Register::~Register() +{ +/* if (cpu) { + //cout << "Removing register from ST:" << name_str << " addr "<< this << endl; + cpu->removeSymbol(this); + }*/ +} + +int Register::clear_break() +{ + return -1; +} + +//------------------------------------------------------------ +// get() +// +// Return the contents of the file register. +// (note - breakpoints on file register reads +// are not checked here. Instead, a breakpoint +// object replaces those instances of file +// registers for which we wish to monitor. +// So a file_register::get call will invoke +// the breakpoint::get member function. Depending +// on the type of break point, this get() may +// or may not get called). + +uint Register::get() +{ + return(value.get()); +} + +//------------------------------------------------------------ +// put() +// +// Update the contents of the register. +// See the comment above in file_register::get() +// with respect to break points +// + +void Register::put(uint new_value) +{ + value.put(new_value); +} + +bool Register::get_bit(uint bit_number) +{ + return (value.get() & (1<register_size(); +} + +//------------------------------------------------------------ + +char * Register::toString(char *str, int len) +{ + return getRV_notrace().toString(str, len, register_size()*2); +} +char * Register::toBitStr(char *s, int len) +{ + uint bit_length = register_size() * 8; + uint bits = (1<addSymbol(this, &new_name); + } + + } +} +//------------------------------------------------------------------------ +// set -- assgin the value of some other object to this Register +// +// This is used (primarily) during Register stimuli processing. If +// a register stimulus is attached to this register, then it will +// call ::set() and supply a Value pointer. + +void Register::set(Value * pVal) +{ + Register *pReg = dynamic_cast(pVal); + if (pReg) { + putRV(pReg->getRV()); + return; + } + + if (pVal) { + put_value( (uint)*pVal); + } +} + +//------------------------------------------------------------------------ +// copy - create a new Value object that's a 'copy' of this object +// +// We really don't perform a true copy. Instead, an Integer object +// is created containing the same numeric value of this object. +// This code is called during expression parsing. *NOTE* this copied +// object can be assigned a new value, however that value will not +// propagate to the Register! + +Value *Register::copy() +{ + Value *val = new ValueWrapper(this); + return val; +} +void Register::get(int64_t &i) +{ + i = get_value(); +} +//-------------------------------------------------- +//-------------------------------------------------- +//-------------------------------------------------- +sfr_register::sfr_register(Module *pCpu, const char *pName, const char *pDesc) + : Register(pCpu,pName,pDesc), wdtr_value(0,0xff) +{} + +void sfr_register::reset(RESET_TYPE r) +{ + switch (r) { + + case POR_RESET: + putRV(por_value); + break; + + default: + // Most registers simply retain their value across WDT resets. + if (wdtr_value.initialized()) + { + putRV(wdtr_value); + } + break; + } +} + +//-------------------------------------------------- +//-------------------------------------------------- + +//-------------------------------------------------- +// member functions for the InvalidRegister class +//-------------------------------------------------- +void InvalidRegister::put(uint new_value) +{ + cout << "attempt write to invalid file register\n"; + + if (address != AN_INVALID_ADDRESS) + cout << " address 0x" << hex << address << ','; + cout << " value 0x" << hex << new_value << endl; + + if(((Processor*)cpu)->getBreakOnInvalidRegisterWrite()) { + bp.halt(); + } + return; +} + +uint InvalidRegister::get() +{ + cout << "attempt read from invalid file register\n"; + if (address != AN_INVALID_ADDRESS) + cout << " address 0x" << hex << address << endl; + + if(((Processor*)cpu)->getBreakOnInvalidRegisterRead()) { + bp.halt(); + } + return(0); +} + +InvalidRegister::InvalidRegister(Processor *pCpu, const char *pName, const char *pDesc) + : Register(pCpu,pName,pDesc) +{} + + diff --git a/src/gpsim/registers.h b/src/gpsim/registers.h new file mode 100644 index 0000000..d7db6a6 --- /dev/null +++ b/src/gpsim/registers.h @@ -0,0 +1,479 @@ +/* + Copyright (C) 1998-2003 Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __REGISTERS_H__ +#define __REGISTERS_H__ + +class symbol; +class Processor; +class Module; + +#include "gpsim_classes.h" +#include "value.h" +#include "clock_phase.h" + +#define AN_INVALID_ADDRESS 0xffffffff + +//--------------------------------------------------------- +// RegisterValue class +// +// This class is used to represent the value of registers. +// It also defines which bits have been initialized and which +// are valid. +// + +class RegisterValue +{ +public: + + uint data; // The actual numeric value of the register. + uint init; // bit mask of initialized bits. + + RegisterValue() + { + data = 0; + init = 0xff; // assume 8-bit wide, uninitialized registers + } + + RegisterValue(uint d, uint i) : + data(d), init(i) + { + } + + RegisterValue(const RegisterValue &value) : + data(value.data), init(value.init) + { + } + + inline bool initialized() + { + return init == 0; + } + + inline uint get() + { + return data; + } + + inline void put(uint d) + { + data = d; + } + + inline void put(uint d, uint i) + { + data = d; + init = i; + } + + inline uint geti() + { + return init; + } + + inline void puti(uint i) + { + init = i; + } + + inline void operator = (RegisterValue rv) + { + data = rv.data; + init = rv.init; + } + + inline operator uint () + { + return data; + } + + inline operator int () + { + return (int)data; + } + + bool operator == (const RegisterValue &rv) const { + return data == rv.data && init == rv.init; + } + + bool operator != (const RegisterValue &rv) const { + return data != rv.data || init != rv.init; + } + + void operator >>= (uint val) { + data >>= val; + init >>= val; + } + char * toString(char *str, int len, int regsize=2) const; + char * toBitStr(char *s, int len, uint BitPos, + const char *ByteSeparator="_", + const char *HiBitNames=0, + const char *LoBitNames=0, + const char *UndefBitNames=0) const; + +}; + + +//--------------------------------------------------------- +/// Register - base class for gpsim registers. +/// The Register class is used by processors and modules to +/// to create memory maps and special function registers. +/// + +class Register : public Value +{ +public: + + enum REGISTER_TYPES + { + INVALID_REGISTER, + GENERIC_REGISTER, + FILE_REGISTER, + SFR_REGISTER, + BP_REGISTER + }; + + RegisterValue value; + + uint address; + + // If non-zero, the alias_mask describes all address at which + // this file register appears. The assumption (that is true so + // far for all pic architectures) is that the aliased register + // locations differ by one bit. For example, the status register + // appears at addresses 0x03 and 0x83 in the 14-bit core. + // Consequently, alias_mask = 0x80 and address (above) is equal + // to 0x03. + + uint alias_mask; + + RegisterValue por_value; // power on reset value + + uint mValidBits; // = 255 for 8-bit registers, = 65535 for 16-bit registers. + + uint64_t read_access_count; + uint64_t write_access_count; + +public: + Register(Module *, const char *pName, const char *pDesc=0); + virtual ~Register(); + + virtual int clear_break(); + + /// get - method for accessing the register's contents. + virtual uint get(); + + /// put - method for writing a new value to the register. + virtual void put(uint new_value); + + /// put_value - is the same as put(), but some extra stuff like + /// interfacing to the gui is done. (It's more efficient than + /// burdening the run time performance with (unnecessary) gui + /// calls.) + virtual void put_value(uint new_value); + + /// get_value - same as get(), but no trace is performed + virtual uint get_value() { return(value.get()); } + + /// getRV - get the whole register value - including the info + /// of the three-state bits. + virtual RegisterValue getRV() + { + value.data = get(); + return value; + } + + /// putRV - write a new value to the register. + /// \deprecated {use SimPutAsRegisterValue()} + /// + virtual void putRV(RegisterValue rv) + { + value.init = rv.init; + put(rv.data); + } + + /// getRV_notrace and putRV_notrace are analogous to getRV and putRV + /// except that the action (in the derived classes) will not be + /// traced. The primary reason for this is to allow the gui to + /// refresh it's windows without having the side effect of filling + /// up the trace buffer + + virtual RegisterValue getRV_notrace() + { + value.data = value.get(); + return value; + } + virtual void putRV_notrace(RegisterValue rv) + { + value.init = rv.init; + put_value(rv.data); + } + + virtual RegisterValue getRVN() + { + return getRVN_notrace(); + } + virtual RegisterValue getRVN_notrace() + { + return getRV_notrace(); + } + + /// set --- cast another Value object type into a register type + /// this is used primarily by expression and stimuli processing + /// (the put() methods are used by the processors). + /// FIXME -- consolidate the get, set, and put methods + virtual void set(Value *); + + /// copy --- This is used during expression parsing. + virtual Value *copy(); + + /// get(int64_t &i) --- ugh. + virtual void get(int64_t &i); + + virtual void initialize() + { + } + + /// get3StateBit - returns the 3-state value of a bit + /// if a bit is known then a '1' or '0' is returned else, + /// a '?' is returned. No check is performed to ensure + /// that only a single bit is checked, thus it's possible + /// to get the state of a group of bits using this method. + + virtual char get3StateBit(uint bitMask) + { + RegisterValue rv = getRV_notrace(); + return (rv.init & bitMask) ? '?' : ((rv.data & bitMask) ? '1' : '0'); + } + /// In the Register class, the 'Register *get()' returns a + /// pointer to itself. Derived classes may return something + /// else (e.g. a break point may be pointing to the register + /// it replaced and will return that instead). + + virtual Register *getReg() + { + return this; + } + + virtual REGISTER_TYPES isa() {return GENERIC_REGISTER;}; + virtual void reset(RESET_TYPE r) { return; }; + + + /// The setbit function is not really intended for general purpose + /// registers. Instead, it is a place holder which is over-ridden + /// by the IO ports. + + virtual void setbit(uint bit_number, bool new_value); + + + /// like setbit, getbit is used mainly for breakpoints. + + virtual bool get_bit(uint bit_number); + virtual double get_bit_voltage(uint bit_number); + + + /// Breakpoint objects will overload this function and return true. + + virtual bool hasBreak() + { + return false; + } + + + /// register_size returns the number of bytes required to store the register + /// (this is used primarily by the gui to determine how wide to make text fields) + + virtual uint register_size () const; + /* + convert value to a string: + */ + virtual char * toString(char *str, int len); + virtual char * toBitStr(char *s, int len); + virtual string &baseName() + { + return name_str; + } + + virtual uint getAddress() + { + return address; + } + virtual void setAddress(uint addr) + { + address = addr; + } + Register *getReplaced() { return m_replaced; } + void setReplaced(Register *preg) { m_replaced = preg; } + + virtual void new_name(string &); + virtual void new_name(const char *); + +protected: + // A pointer to the register that this register replaces. + // This is used primarily by the breakpoint code. + Register *m_replaced; + +}; + + +//--------------------------------------------------------- +// define a special 'invalid' register class. Accessess to +// to this class' value get 0 + +class InvalidRegister : public Register +{ +public: + + InvalidRegister(Processor *, const char *pName, const char *pDesc=0); + + void put(uint new_value); + uint get(); + virtual REGISTER_TYPES isa() {return INVALID_REGISTER;}; + virtual Register *getReg() {return 0; } +}; + + +//--------------------------------------------------------- +// Base class for a special function register. +class BitSink; + +class sfr_register : public Register +{ +public: + sfr_register(Module *, const char *pName, const char *pDesc=0); + + RegisterValue wdtr_value; // wdt or mclr reset value + + virtual REGISTER_TYPES isa() {return SFR_REGISTER;}; + virtual void initialize() {}; + + virtual void reset(RESET_TYPE r); + + // The assign and release BitSink methods don't do anything + // unless derived classes redefine them. Their intent is to + // provide an interface to the BitSink design - a design that + // allows clients to be notified when bits change states. + + virtual bool assignBitSink(uint bitPosition, BitSink *) {return false;} + virtual bool releaseBitSink(uint bitPosition, BitSink *) {return false;} +}; + + + +//--------------------------------------------------------- +// Program Counter +// +class Program_Counter : public Value +{ +public: + uint value; /* pc's current value */ + uint memory_size; + uint pclath_mask; /* pclath confines PC to banks */ + uint instruction_phase; + + Program_Counter(const char *name, const char *desc, Module *pM); + ~Program_Counter(); + virtual void increment(); + virtual void start_skip(); + virtual void skip(); + virtual void jump(uint new_value); + virtual void interrupt(uint new_value); + virtual void computed_goto(uint new_value); + virtual void new_address(uint new_value); + virtual void put_value(uint new_value); + virtual void update_pcl(); + virtual void get(char *buffer, int buf_size); + virtual uint get_value() + { + return value; + } + virtual uint get_PC() { + return value; + } + + virtual void set_PC(uint new_value) { + value = new_value; + this->update(); + } + + /// set --- cast another Value object type into a program counter register type + /// this is used primarily by expression and stimuli processing + /// (the put() methods are used by the processors). + /// FIXME -- consolidate the get, set, and put methods + virtual void set(Value *); + + /// get_raw_value -- on the 16-bit cores, get_value is multiplied by 2 + /// whereas get_raw_value isn't. The raw value of the program counter + /// is used as an index into the program memory. + virtual uint get_raw_value() + { + return value; + } + + virtual void set_phase(int phase) + { + instruction_phase = phase; + } + virtual int get_phase() + { + return instruction_phase; + } + + void set_reset_address(uint _reset_address) + { + reset_address = _reset_address; + } + uint get_reset_address() + { + return reset_address; + } + + void reset(); + + virtual uint get_next(); + +protected: + uint reset_address; /* Value pc gets at reset */ +}; + + +//------------------------------------------------------------------------ +// BitSink +// +// A BitSink is an object that can direct bit changes in an SFR to some +// place where they're needed. The purpose is to abstract the interface +// between special bits and the various peripherals. +// +// A client wishing to be notified whenever an SFR bit changes states +// will create a BitSink object and pass its pointer to the SFR. The +// client will also tell the SFR which bit this applies to. Now, when +// the bit changes states in the SFR, the SFR will call the setSink() +// method. + +class BitSink +{ +public: + virtual ~BitSink() {} + + virtual void setSink(bool) = 0; +}; + + +#endif // __REGISTERS__ diff --git a/src/gpsim/registers/14bit-registers.cc b/src/gpsim/registers/14bit-registers.cc new file mode 100644 index 0000000..6af5e2b --- /dev/null +++ b/src/gpsim/registers/14bit-registers.cc @@ -0,0 +1,2715 @@ +/* + Copyright (C) 1998-2000 Scott Dattalo + Copyright (C) 2013-2017 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include +#include +#include +#include + + +#include "config.h" +#include "14bit-processors.h" +#include "14bit-registers.h" +#include "psp.h" // needed for operator[] on WPU::wpu_gpio (not sure why) +#include "14bit-tmrs.h" + +#include +#include "stimuli.h" + +//S#include "xref.h" +#define PCLATH_MASK 0x1f + +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("0x%06" PRINTF_GINT64_MODIFIER "X %s() ", cycles.get(), __FUNCTION__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +// Debug OSCCON +//#define CDEBUG +#if defined(CDEBUG) +#define CDprintf(arg) {printf("0x%06" PRINTF_GINT64_MODIFIER "X %s() ", cycles.get(), __FUNCTION__); printf arg; } +#else +#define CDprintf(arg) {} +#endif + +pic_processor *temp_cpu; +// FIXME file_register::put_value has a useful feature... + +// +#if 0 +//----------------------------------------------------------- +// void file_register::put_value(uint new_value) +// +// put_value is used by the gui to change the contents of +// file registers. We could've let the gui use the normal +// 'put' member function to change the contents, however +// there are instances where 'put' has a cascading affect. +// For example, changing the value of an i/o port's tris +// could cause i/o pins to change states. In these cases, +// we'd like the gui to be notified of all of the cascaded +// changes. So rather than burden the real-time simulation +// with notifying the gui, I decided to create the 'put_value' +// function instead. +// Since this is a virtual function, derived classes have +// the option to override the default behavior. +// +// inputs: +// uint new_value - The new value that's to be +// written to this register +// returns: +// nothing +// +//----------------------------------------------------------- + +void file_register::put_value(uint new_value) +{ + + // go ahead and use the regular put to write the data. + // note that this is a 'virtual' function. Consequently, + // all objects derived from a file_register should + // automagically be correctly updated. + + put(new_value); + + // Even though we just wrote a value to this register, + // it's possible that the register did not get fully + // updated (e.g. porta on many pics has only 5 valid + // pins, so the upper three bits of a write are meaningless) + // So we should explicitly tell the gui (if it's + // present) to update its display. + + if(xref) + { + xref->update(); + + if(cpu && address == cpu_pic->fsr->value) + { + if(cpu_pic->indf->xref) + cpu_pic->indf->xref->update(); + } + } +} + +#endif + +//-------------------------------------------------- +// member functions for the BORCON class +// currently does not do anything +//-------------------------------------------------- +// +BORCON::BORCON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc) +{ +} + +void BORCON::put(uint new_value) +{ + value.put(new_value & 0x80); +} + +void BORCON::put_value(uint new_value) +{ + put(new_value&0x80); +} + +//-------------------------------------------------- +// member functions for the BSR class +//-------------------------------------------------- +// +BSR::BSR(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc), + register_page_bits(0) +{ +} + +void BSR::put(uint new_value) +{ + value.put(new_value & 0x01f); + //value.put(new_value & 0x01f); + if(cpu_pic->base_isa() == _14BIT_E_PROCESSOR_) + cpu_pic->register_bank = &cpu_pic->registers[ value.get() << 7 ]; + else + cpu_pic->register_bank = &cpu_pic->registers[ value.get() << 8 ]; +} + +void BSR::put_value(uint new_value) +{ + put(new_value); + + update(); + cpu_pic->indf->update(); +} + +void IOCxF::put(uint new_value) +{ + uint masked_value = new_value & mValidBits; + Dprintf((" %s value %x masked %x\n", name().c_str(), new_value, masked_value)); + + value.put(masked_value); + if (intcon) + { + ((INTCON_14_PIR *)intcon)->set_rbif(masked_value != 0); + ((INTCON_14_PIR *)intcon)->aocxf_val(this, masked_value); + } +} + +// Adjust internal RC oscillator frequency as per 12f675/629 +// Spec sheet does not give range so assume +/- 12.5% as per 16f88 +// The fact that base_freq is not 0. indicates the RC oscillator is being used +// and thus an adjustment should be made. +// +// This will work for any number of adjustment bits in byte but must be left justified +// and 1000000 centre frequency and 11111111 highest frequency +void OSCCAL::put(uint new_value) +{ + int adj = new_value & mValidBits; + float tune; + + value.put(adj); + if (base_freq > 0.) + { + adj = adj - 0x80; + // A hook to honour configured frequency - if we're going to change it now + if(cpu_pic->get_frequency() > base_freq*0.875 && base_freq*1.125 > cpu_pic->get_frequency()) { + base_freq=cpu_pic->get_frequency(); + } + tune = (1. + 0.125 * adj / 0x80) * base_freq; + cpu_pic->set_frequency(tune); + } +} + +void OSCCAL::set_freq(float new_base_freq) +{ + base_freq = new_base_freq; + put(value.get()); +} + +void OSCTUNE::put(uint new_value) +{ + value.put(new_value); + osccon->set_rc_frequency(); +} +// Clock is stable +void OSCCON::callback() +{ + uint new_value = value.get(); + + if (future_cycle <= get_cycles().get()) + future_cycle = 0; + CDprintf(("OSCCON clock_state=%u\n", clock_state)); + switch(clock_state) + { + case OST: + CDprintf(("OSCCON switch clock\n")); + if (has_iofs_bit) + new_value &= ~IOFS; + else + new_value &= ~(HTS|LTS); + new_value |= OSTS; + value.put(new_value); + clock_state = EXCSTABLE; + cpu_pic->set_RCfreq_active(false); + return; + + case LFINTOSC: + if (has_iofs_bit) + new_value |= IOFS; + else + { + new_value &= ~HTS; + new_value |= LTS; + } + value.put(new_value); + CDprintf(("OSCCON HF osccon=0x%x\n", value.get())); + return; + + case HFINTOSC: + if (!has_iofs_bit) new_value &= ~LTS; + new_value |= HTS; + value.put(new_value); + CDprintf(("OSCCON HF osccon=0x%x\n", value.get())); + return; + + case INTOSC: + new_value |= IOFS; + value.put(new_value); + return; + + case EXCSTABLE: + if (!has_iofs_bit) new_value &= ~LTS; + new_value &= ~HTS; + value.put(new_value); + return; + + default: + fprintf(stderr, "OSCCON::callback unexpexted clock state %u\n", clock_state); + return; + } +} + +// Is internal RC clock selected? +bool OSCCON::internal_RC() +{ + uint scs = (value.get() & (SCS0|SCS1)) & write_mask; + bool ret = false; + if (scs == 0 && config_irc) + ret = true; + else if ((SCS1 & write_mask) && scs == 2) // using SCS1 and SCS0 + ret = true; + else if (scs == 1) + ret = true; + + CDprintf(("OSCCON internal_RC ret %d osccon=0x%x\n", ret, value.get())); + return ret; +} + +void OSCCON::reset(RESET_TYPE r) +{ + + switch(r) { + case POR_RESET: + + value.put(por_value.data); + por_wake(); + break; + + default: + // Most registers simply retain their value across WDT resets. + if (wdtr_value.initialized()) + { + putRV(wdtr_value); + } + break; + } +} + +void OSCCON::sleep() +{ + is_sleeping = true; +} + +void OSCCON::wake() +{ + if (!is_sleeping) + return; + is_sleeping = false; + CDprintf(("OSCCON config_ieso %d int RC %d two_speed_clock=%d cpu=%s\n", config_ieso, internal_RC(), (config_xosc && config_ieso), cpu_pic->name().c_str())); + por_wake(); +} + +void OSCCON::por_wake() +{ + bool two_speed_clock = config_xosc && config_ieso; + uint new_value = value.get(); + + CDprintf(("OSCCON config_xosc=%d config_ieso=%d\n", config_xosc,config_ieso)); + + CDprintf(("OSCCON POR two_speed_clock=%d f=%4.1e osccon=0x%x por_value=0x%x\n", two_speed_clock, cpu_pic->get_frequency(), new_value, por_value.data)); + + if (future_cycle) + { + get_cycles().clear_break(future_cycle); + future_cycle = 0; + } + // internal RC osc + if (internal_RC()) + { + if (has_iofs_bit) + { + new_value &= ~IOFS; + clock_state = INTOSC; + } + else if (new_value & (IRCF0 | IRCF1 | IRCF2 )) + { + new_value &= ~(HTS|LTS); + clock_state = HFINTOSC; + } + else + { + new_value &= ~(HTS|LTS); + clock_state = LFINTOSC; + } + new_value |= OSTS; + value.put(new_value); + CDprintf(("OSCCON internal RC clock_state %u osccon %x\n", clock_state, new_value)); +//RRR set_rc_frequency(); + if (future_cycle) + get_cycles().clear_break(future_cycle); + future_cycle = get_cycles().get() + irc_por_time(); + get_cycles().set_break(future_cycle, this); + return; + } + if (two_speed_clock) + { + if (has_iofs_bit) + new_value &= ~(IOFS | OSTS); + else + new_value &= ~( HTS | LTS | OSTS); + value.put(new_value); + set_rc_frequency(true); + CDprintf(("OSCCON 2 speed, set osccon 0x%x \n", value.get())); + clock_state = OST; + future_cycle = 1024 + get_cycles().get(); + get_cycles().set_break(future_cycle, this); + return; + } +} +/* + * + * + */ +bool OSCCON::set_rc_frequency(bool override) +{ + double base_frequency = 31.e3; + uint old_clock_state = clock_state; + + uint new_IRCF = (value.get() & ( IRCF0 | IRCF1 | IRCF2 )) >> 4; + if (!internal_RC() && !override) return false; + + switch (new_IRCF) + { + case 0: + base_frequency = 31.e3; + break; + + case 1: + base_frequency = 125e3; + break; + + case 2: + base_frequency = 250e3; + break; + + case 3: + base_frequency = 500e3; + break; + + case 4: + base_frequency = 1e6; + break; + + case 5: + base_frequency = 2e6; + break; + + case 6: + base_frequency = 4e6; + break; + + case 7: + base_frequency = 8e6; + break; + } + if (osctune) + { + int tune; + uint osctune_value = osctune->value.get(); + tune = osctune_value & (OSCTUNE::TUN5-1); + tune = (OSCTUNE::TUN5 & osctune_value) ? -tune : tune; + base_frequency *= 1. + 0.125 * tune / 31.; + } + cpu_pic->set_RCfreq_active(true); + cpu_pic->set_frequency_rc(base_frequency); + clock_state = new_IRCF ? HFINTOSC : LFINTOSC; + if (old_clock_state != clock_state) + { + if ((old_clock_state == LFINTOSC) && clock_state != LFINTOSC) + { + if (has_iofs_bit) + value.put(value.get() & ~(IOFS)); + else + value.put(value.get() & ~(LTS|HTS)); + if (future_cycle) get_cycles().clear_break(future_cycle); + + future_cycle = get_cycles().get() + irc_lh_time(); + get_cycles().set_break(future_cycle, this); + CDprintf(("OSCCON future_cycle %" PRINTF_GINT64_MODIFIER "d now %" PRINTF_GINT64_MODIFIER "d\n", future_cycle, get_cycles().get())); + } + else + { +/*RRR + uint current = value.get(); + if (clock_state == HFINTOSC) + { + if (has_iofs_bit) current &= ~LTS; + current |= HTS; + value.put(current); + } +*/ + callback(); + } + } + CDprintf(("OSCCON new_ircf %u %4.1f \n", new_IRCF, cpu_pic->get_frequency())); + + return true; +} + +void OSCCON::put(uint new_value) +{ + uint org_value = value.get(); + new_value = (new_value & write_mask) | (org_value & ~write_mask); + value.put(new_value); + uint diff = (new_value ^ org_value); + + value.put(new_value); + CDprintf(("OSCCON org_value=0x%02x new_value=0x%02x diff=0x%02x state %u\n", + org_value, new_value, diff, clock_state)); + if (diff == 0) return; + + if(internal_RC()) + { +#ifdef CDEBUG + uint old_clock_state = clock_state; +#endif + + if ((diff & (IRCF0 | IRCF1 | IRCF2))) // freq change + { + set_rc_frequency(); + CDprintf(("OSCCON change of IRCF old_clock %u new_clock %u\n", old_clock_state, clock_state)); + } + // switching to intrc + else if (diff & (SCS0 | SCS1)) // still OK if SCS1 is non-writtabe LTS + { + set_rc_frequency(true); + CDprintf(("OSCCON diff 0x%x old_clock_state %u clock_state %u\n", (diff & (SCS0 | SCS1)), old_clock_state, clock_state)); + } + } + else // not Internal RC clock + { + clock_state = EXCSTABLE; + cpu_pic->set_RCfreq_active(false); + callback(); + CDprintf(("OSCCON not RC osccon=0x%x\n", new_value)); + } +} + +// Time required for stable clock after transition between high and low +// irc frequencies +uint64_t OSCCON::irc_lh_time() +{ + uint64_t delay = (get_cycles().instruction_cps() * 1e-6) + 1; + return delay; +} +// Time required for stable irc clock after POR +uint64_t OSCCON::irc_por_time() +{ + return (uint64_t) 2; +} + +uint64_t OSCCON_1::irc_lh_time() +{ + uint64_t delay = get_cycles().instruction_cps() * 4e-3; + CDprintf(("OSCCON_1 LH irc time 4ms %" PRINTF_GINT64_MODIFIER "d cycles\n", delay)); + return delay; +} +// Time required for stable irc clock after POR (4 ms) +uint64_t OSCCON_1::irc_por_time() +{ + uint64_t delay = get_cycles().instruction_cps() * 4e-3; + CDprintf(("OSCCON_1 POR irc time 4ms %" PRINTF_GINT64_MODIFIER "d cycles\n", delay)); + return delay; +} + +// Clock is stable +void OSCCON_2::callback() +{ + uint add_bits = 0; + uint val; + + future_cycle = 0; + + if (!oscstat) return; + + val = oscstat->value.get(); + + CDprintf(("OSCCON_2 oscstat = 0x%x\n", val)); + + if (clock_state & PLL) + add_bits = OSCSTAT::PLLR; + + switch(clock_state & ~PLL) + { + case OST: + add_bits = OSCSTAT::OSTS; + cpu_pic->set_RCfreq_active(false); + break; + + case LFINTOSC: + add_bits = OSCSTAT::LFIOFR; + val &= ~(OSCSTAT::HFIOFL | OSCSTAT::HFIOFR | OSCSTAT::HFIOFS | OSCSTAT::MFIOFR); + break; + + case MFINTOSC: + add_bits = OSCSTAT::MFIOFR; + val &= ~(OSCSTAT::HFIOFL | OSCSTAT::HFIOFR | OSCSTAT::HFIOFS | OSCSTAT::LFIOFR); + break; + + case HFINTOSC: + add_bits = OSCSTAT::HFIOFL | OSCSTAT::HFIOFR | OSCSTAT::HFIOFS; + val &= ~(OSCSTAT::MFIOFR | OSCSTAT::LFIOFR); + break; + + case T1OSC: + break; + } + val |= add_bits; + oscstat->value.put(val); +} +bool OSCCON_2::set_rc_frequency(bool override) +{ + double base_frequency = 31.25e3; + uint sys_clock = value.get() & (SCS0 | SCS1); + bool osccon_pplx4 = value.get() & SPLLEN; + bool config_pplx4 = cpu_pic->get_pplx4_osc(); + + CDprintf(("OSCCON_2 new_IRCF 0x%x\n", (value.get() & ( IRCF0 | IRCF1 | IRCF2 |IRCF3)) >> 3)); + + + + if ((sys_clock == 0) && !config_irc) // Not internal oscillator + { + if (!config_xosc ) // always run at full speed + { + + uint oscstat_reg = (oscstat->value.get() & 0x1f); + oscstat->value.put(oscstat_reg | OSCSTAT::OSTS); + clock_state = EC; + } + else if (config_ieso) // internal/external switchover + { + clock_state = OST; + } + } + + if((osccon_pplx4 && !config_pplx4) && sys_clock == 0) + { + clock_state |= PLL; + return true; + } + if (!cpu_pic->get_int_osc() && (sys_clock == 0) && !override) + return false; + + if (sys_clock == 1) // T1OSC + { + base_frequency = 32.e3; + clock_state = T1OSC; + } + else if (sys_clock > 1 || config_irc || override) + { + uint new_IRCF = (value.get() & ( IRCF0 | IRCF1 | IRCF2 |IRCF3)) >> 3; + switch (new_IRCF) + { + case 0: + case 1: + base_frequency = 30.e3; + clock_state = LFINTOSC; + break; + + case 2: + clock_state = MFINTOSC; + base_frequency = 31.25e3; + break; + + case 3: + clock_state = HFINTOSC; + base_frequency = 31.25e3; + break; + + case 4: + clock_state = HFINTOSC; + base_frequency = 62.5e3; + break; + + case 5: + clock_state = HFINTOSC; + base_frequency = 125e3; + break; + + case 6: + clock_state = HFINTOSC; + base_frequency = 250e3; + break; + + case 7: + clock_state = HFINTOSC; + base_frequency = 500e3; + break; + + case 8: + clock_state = HFINTOSC; + base_frequency = 125e3; + break; + + case 9: + clock_state = HFINTOSC; + base_frequency = 250e3; + break; + + case 10: + clock_state = HFINTOSC; + base_frequency = 500e3; + break; + + case 11: + clock_state = HFINTOSC; + base_frequency = 1e6; + break; + + case 12: + clock_state = HFINTOSC; + base_frequency = 2e6; + break; + + case 13: + clock_state = HFINTOSC; + base_frequency = 4e6; + break; + + case 14: + // The treatment for PPL based on Fig 5-1 of P12f1822 ref manual + if (osccon_pplx4 || config_pplx4) + { + clock_state = PLL; + base_frequency = 32e6; + } + else + { + clock_state = HFINTOSC; + base_frequency = 8e6; + } + break; + + case 15: + clock_state = HFINTOSC; + base_frequency = 16e6; + break; + } + } + if (osctune) + { + int tune; + uint osctune_value = osctune->value.get(); + tune = osctune_value & (OSCTUNE::TUN5-1); + tune = (OSCTUNE::TUN5 & osctune_value) ? -tune : tune; + base_frequency *= 1. + 0.125 * tune / 31.; + } + cpu_pic->set_RCfreq_active(true); + cpu_pic->set_frequency_rc(base_frequency); + + return true; +} + +void OSCCON_2::por_wake() +{ + bool two_speed_clock = config_xosc && config_ieso; + + CDprintf(("OSCCON_2 two_speed_clock=%d f=%4.1e\n", two_speed_clock, cpu_pic->get_frequency())); + + if (future_cycle) + { + get_cycles().clear_break(future_cycle); + future_cycle = 0; + clock_state = UNDEF; + } + // internal RC osc + if (internal_RC()) + { + CDprintf(("OSCCON_2 internal RC clock_state %u\n", clock_state)); + oscstat->value.put(OSCSTAT::OSTS); + set_rc_frequency(); + future_cycle = get_cycles().get() + irc_por_time(); + get_cycles().set_break(future_cycle, this); + return; + } + if (two_speed_clock) + { + bool config_pplx4 = cpu_pic->get_pplx4_osc(); + oscstat->value.put(0); + set_rc_frequency(true); + clock_state = OST; + if (config_pplx4) + clock_state |= PLL; + CDprintf(("OSCCON_2 2 speed, set osccon 0x%x \n", value.get())); + future_cycle = 1024 + get_cycles().get(); + get_cycles().set_break(future_cycle, this); + return; + } + oscstat->value.put(0); +} +void OSCCON_2::put_value(uint new_value) +{ + + CDprintf(("OSCCON_2 0x%x\n", new_value)); + value.put(new_value); +} +void OSCCON_2::put(uint new_value) +{ + + uint old_value = value.get(); + new_value = (new_value & write_mask); + uint oscstat_reg = 0; + uint oscstat_new = 0; + + value.put(new_value); + + if (old_value == new_value) return; + + assert(oscstat); + + oscstat_reg = oscstat->value.get(); + oscstat_new = oscstat_reg; + if (((new_value & (SCS0 | SCS1))==0) && !cpu_pic->get_int_osc()) + oscstat_new |= OSCSTAT::OSTS; + else + oscstat_new &= ~OSCSTAT::OSTS; + + CDprintf(("OSCCON_2 0x%x\n", new_value)); + + + if (set_rc_frequency()) // using internal RC Oscillator + set_callback(); +} + +void OSCCON_2::set_callback() +{ + uint oscstat_reg = oscstat->value.get();; + uint oscstat_new = oscstat_reg; + uint64_t settle = 0; + + CDprintf(("OSCCON_2 clock_state 0x%x\n", clock_state)); + + switch(clock_state &~ PLL) + { + case LFINTOSC: + oscstat_new &= ~(OSCSTAT::OSTS | OSCSTAT::PLLR | OSCSTAT::T1OSCR); + settle = get_cycles().get() + 2; + break; + + case MFINTOSC: + oscstat_new &= ~(OSCSTAT::OSTS | OSCSTAT::PLLR | OSCSTAT::T1OSCR); + settle = get_cycles().get(2e-6); // 2us settle time + break; + + case HFINTOSC: + oscstat_new &= ~(OSCSTAT::OSTS | OSCSTAT::PLLR | OSCSTAT::T1OSCR); + settle = get_cycles().get(2e-6); // 2us settle time + CDprintf(("OSCCON_2 settle %" PRINTF_GINT64_MODIFIER "d\n", settle)); + break; + + case T1OSC: + settle = get_cycles().get() + 1024/4; + break; + } + if((clock_state & PLL) && (oscstat_reg & OSCSTAT::PLLR) == 0) + settle = get_cycles().get(2e-3); // 2ms + + if (settle) + { + settle += get_cycles().get(); + if (future_cycle > get_cycles().get()) + get_cycles().clear_break(future_cycle); + + get_cycles().set_break(settle, this); + future_cycle = settle; + } + if(oscstat && (oscstat_new != oscstat_reg)) + oscstat->put(oscstat_new); +} + +void OSCCON2::put(uint new_value) +{ + new_value = (new_value & write_mask) | (new_value & ~write_mask); + value.put(new_value); + assert(osccon); + osccon->set_rc_frequency(); +} + +void OSCCON_HS::callback() +{ + assert(osccon2); + uint val_osccon2 = osccon2->value.get(); + uint val_osccon = value.get(); + + if (future_cycle <= get_cycles().get()) + future_cycle = 0; + CDprintf(("OSCCON_HS clock_state=%u osccon=0x%x osccon2=0x%x\n", clock_state, val_osccon, val_osccon2)); + switch(clock_state) + { + case OST: + val_osccon &= ~ HFIOFS; + val_osccon |= OSTS; + val_osccon2 &= ~(OSCCON2::LFIOFS | OSCCON2::MFIOFS); + cpu_pic->set_RCfreq_active(false); + clock_state = EXCSTABLE; + break; + + case LFINTOSC: + val_osccon &= ~HFIOFS; + val_osccon2 &= ~OSCCON2::MFIOFS; + val_osccon2 |= OSCCON2::LFIOFS; + break; + + case MFINTOSC: + val_osccon &= ~HFIOFS; + val_osccon2 &= ~OSCCON2::LFIOFS; + val_osccon2 |= OSCCON2::MFIOFS; + break; + + case HFINTOSC: + val_osccon |= HFIOFS; + val_osccon2 &= ~(OSCCON2::LFIOFS|OSCCON2::MFIOFS); + break; + + case T1OSC: + break; + + case EXCSTABLE: + val_osccon &= ~HFIOFS; + val_osccon |= OSTS; + val_osccon2 &= ~(OSCCON2::LFIOFS|OSCCON2::MFIOFS); + break; + } + value.put(val_osccon); + CDprintf(("OSCCON_HS osccon 0x%x val_osccon 0x%x\n", value.get(), val_osccon)); + osccon2->value.put(val_osccon2); +} +bool OSCCON_HS::set_rc_frequency(bool override) +{ + double base_frequency = 31.e3; + bool config_pplx4 = cpu_pic->get_pplx4_osc(); + bool osccon_pplx4 = (osctune)?osctune->value.get() & OSCTUNE::PLLEN:0; + bool intsrc = (osctune) ? osctune->value.get() & OSCTUNE::INTSRC : false; + bool mfiosel = (osccon2) ? osccon2->value.get() & OSCCON2::MFIOSEL : false; + + uint old_clock_state = clock_state; + + + CDprintf(("OSCCON_HS override=%d int_osc=%d osccon=0x%x\n", override, cpu_pic->get_int_osc(), value.get())); + if (!cpu_pic->get_int_osc() && !(value.get() & SCS1) && !override) + return false; + + + uint new_IRCF = (value.get() & ( IRCF0 | IRCF1 | IRCF2)) >> 4; + switch (new_IRCF) + { + case 0: + base_frequency = 31.e3; + if (mfiosel) + clock_state = intsrc ? MFINTOSC : LFINTOSC; + else + clock_state = intsrc ? HFINTOSC : LFINTOSC; + break; + + case 1: + clock_state = mfiosel ? MFINTOSC : HFINTOSC; + base_frequency = 125e3; + break; + + case 2: + clock_state = mfiosel ? MFINTOSC : HFINTOSC; + base_frequency = 250e3; + break; + + case 3: + clock_state = HFINTOSC; + base_frequency = 1e6; + break; + + case 4: + clock_state = HFINTOSC; + base_frequency = 2e6; + break; + + case 5: + clock_state = HFINTOSC; + base_frequency = 4e6; + break; + + case 6: + clock_state = HFINTOSC; + base_frequency = 8e6; + break; + + case 7: + clock_state = HFINTOSC; + base_frequency = 16e6; + break; + } + if ( (new_IRCF>=minValPLL) && (osccon_pplx4 || config_pplx4) ) + base_frequency *= 4; + if (osctune) + { + int tune; + uint osctune_value = osctune->value.get(); + tune = osctune_value & (OSCTUNE::TUN5-1); + tune = (OSCTUNE::TUN5 & osctune_value) ? -tune : tune; + base_frequency *= 1. + 0.125 * tune / 31.; + } + cpu_pic->set_frequency_rc(base_frequency); + if (cpu_pic->get_int_osc() || (value.get() & SCS1)) + { + CDprintf(("OSCCON_HS clock_state %u->%u f=%.1e osccon=0x%x\n", old_clock_state, clock_state, base_frequency, value.get())); + cpu_pic->set_RCfreq_active(true); + if (old_clock_state != clock_state) + { + if ((old_clock_state == LFINTOSC) && clock_state != LFINTOSC) + { + if (future_cycle) get_cycles().clear_break(future_cycle); + + future_cycle = get_cycles().get() + irc_lh_time(); + get_cycles().set_break(future_cycle, this); + CDprintf(("OSCCON_HS future_cycle %" PRINTF_GINT64_MODIFIER "d now %" PRINTF_GINT64_MODIFIER "d\n", future_cycle, get_cycles().get())); + } + else + callback(); + } + } + return true; +} +// Is internal RC clock selected? +bool OSCCON_HS::internal_RC() +{ + bool ret = false; + if ((value.get() & SCS1) || config_irc) + ret = true; + + return ret; +} + +void OSCCON_HS::por_wake() +{ + bool two_speed_clock = config_xosc && config_ieso; + uint val_osccon2 = osccon2->value.get(); + uint val_osccon = value.get(); + + CDprintf(("OSCCON_HS config_xosc=%d config_ieso=%d\n", config_xosc,config_ieso)); + + CDprintf(("OSCCON_HS POR two_speed_clock=%d f=%4.1e osccon=0x%x por_value=0x%x\n", two_speed_clock, cpu_pic->get_frequency(), val_osccon, por_value.data)); + + if (future_cycle) + { + get_cycles().clear_break(future_cycle); + future_cycle = 0; + } + // internal RC osc + if (internal_RC()) + { + CDprintf(("OSCCON_HS internal RC clock_state %u osccon %x osccon2 %x\n", clock_state, val_osccon, val_osccon2)); + set_rc_frequency(); + if (future_cycle) + get_cycles().clear_break(future_cycle); + future_cycle = get_cycles().get() + irc_por_time(); + get_cycles().set_break(future_cycle, this); + return; + } + if (two_speed_clock) + { + val_osccon &= ~ (HFIOFS | OSTS); + val_osccon2 &= ~(OSCCON2::LFIOFS | OSCCON2::MFIOFS); + value.put(val_osccon); + osccon2->value.put(val_osccon2); + set_rc_frequency(true); + cpu_pic->set_RCfreq_active(true); + CDprintf(("OSCCON_HS 2 speed, set osccon 0x%x \n", value.get())); + if (future_cycle) + get_cycles().clear_break(future_cycle); + clock_state = OST; + future_cycle = 1024 + get_cycles().get(); + get_cycles().set_break(future_cycle, this); + return; + } +} + +void OSCCON_HS2::put(uint new_value) +{ + uint org_value = value.get(); + new_value = (new_value & write_mask) | (org_value & ~write_mask); + value.put(new_value); + uint diff = (new_value ^ org_value); + + value.put(new_value); + CDprintf(("OSCCON org_value=0x%02x new_value=0x%02x diff=0x%02x state %u\n", + org_value, new_value, diff, clock_state)); + if (diff == 0) return; + + if(internal_RC()) + { +#ifdef CDEBUG + uint old_clock_state = clock_state; +#endif + + if ((diff & (IRCF0 | IRCF1 | IRCF2))) // freq change + { + set_rc_frequency(); + CDprintf(("OSCCON_HS2 change of IRCF old_clock %u new_clock %u\n", old_clock_state, clock_state)); + } + } +} +bool OSCCON_HS2::set_rc_frequency(bool override) +{ + double base_frequency = 31.e3; + + uint old_clock_state = clock_state; + + + CDprintf(("OSCCON_HS2 override=%d int_osc=%d osccon=0x%x\n", override, cpu_pic->get_int_osc(), value.get())); + if (!cpu_pic->get_int_osc() && !override) + return false; + + + uint new_IRCF = (value.get() & ( IRCF0 | IRCF1 | IRCF2)) >> 4; + switch (new_IRCF) + { + case 0: + base_frequency = 31.e3; + clock_state = LFINTOSC; + break; + + case 1: + clock_state = HFINTOSC; + base_frequency = 250e3; + break; + + + case 2: + clock_state = HFINTOSC; + base_frequency = 500e3; + break; + + + case 3: + clock_state = HFINTOSC; + base_frequency = 1e6; + break; + + case 4: + clock_state = HFINTOSC; + base_frequency = 2e6; + break; + + case 5: + clock_state = HFINTOSC; + base_frequency = 4e6; + break; + + case 6: + clock_state = HFINTOSC; + base_frequency = 8e6; + break; + + case 7: + clock_state = HFINTOSC; + base_frequency = 16e6; + break; + } + cpu_pic->set_frequency_rc(base_frequency); + if (cpu_pic->get_int_osc()) + { + CDprintf(("OSCCON_HS2 clock_state %u->%u f=%.1e osccon=0x%x\n", old_clock_state, clock_state, base_frequency, value.get())); + cpu_pic->set_RCfreq_active(true); + if (old_clock_state != clock_state) + { + if ((old_clock_state == LFINTOSC) && clock_state != LFINTOSC) + { + if (future_cycle) get_cycles().clear_break(future_cycle); + + future_cycle = get_cycles().get() + irc_lh_time(); + get_cycles().set_break(future_cycle, this); + CDprintf(("OSCCON_HS2 future_cycle %" PRINTF_GINT64_MODIFIER "d now %" PRINTF_GINT64_MODIFIER "d\n", future_cycle, get_cycles().get())); + } + else + callback(); + } + } + return true; +} +// Is internal RC clock selected? +bool OSCCON_HS2::internal_RC() +{ + return cpu_pic->get_int_osc(); +} + +void OSCCON_HS2::callback() +{ + uint val_osccon = value.get() & write_mask; + + if (future_cycle <= get_cycles().get()) + future_cycle = 0; + CDprintf(("OSCCON_HS2 clock_state=%u osccon=0x%x val_osccon=0x%x\n", clock_state, value.get(), val_osccon)); + switch(clock_state) + { + case LFINTOSC: + val_osccon |= LFIOFR; + break; + + case HFINTOSC: + val_osccon |= HFIOFS|HFIOFR; + break; + + } + value.put(val_osccon); + CDprintf(("OSCCON_HS2 osccon 0x%x val_osccon 0x%x\n", value.get(), val_osccon)); +} +void OSCCON_HS2::por_wake() +{ + + CDprintf(("OSCCON_HS2 config_xosc=%d config_ieso=%d\n", config_xosc,config_ieso)); + + CDprintf(("OSCCON_HS2 POR f=%4.1e osccon=0x%x por_value=0x%x\n", cpu_pic->get_frequency(), value.get(), por_value.data)); + + if (future_cycle) + { + get_cycles().clear_break(future_cycle); + future_cycle = 0; + } + // internal RC osc + if (internal_RC()) + { + CDprintf(("OSCCON_HS2internal RC clock_state %u osccon %x \n", clock_state, val_osccon)); + set_rc_frequency(); + if (future_cycle) + get_cycles().clear_break(future_cycle); + future_cycle = get_cycles().get() + irc_por_time(); + get_cycles().set_break(future_cycle, this); + return; + } +} +void WDTCON::put(uint new_value) +{ + uint masked_value = new_value & valid_bits; + + value.put(masked_value); + + if (valid_bits > 1) + cpu_pic->wdt.set_prescale(masked_value >> 1); + if (cpu_pic->swdten_active()) + cpu_pic->wdt.swdten((masked_value & SWDTEN) == SWDTEN); +} +void WDTCON::reset(RESET_TYPE r) +{ + putRV(por_value); +} +// +//-------------------------------------------------- +// member functions for the FSR class +//-------------------------------------------------- +// +FSR::FSR(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{} + +void FSR::put(uint new_value) +{ + value.put(new_value); +} + +void FSR::put_value(uint new_value) +{ + put(new_value); + + update(); + cpu_pic->indf->update(); +} + + +uint FSR::get() +{ + return(value.get()); +} + +uint FSR::get_value() +{ + return(value.get()); +} + + +// +//-------------------------------------------------- +// member functions for the FSR_12 class +//-------------------------------------------------- +// +FSR_12::FSR_12(Processor *pCpu, const char *pName, uint _rpb, uint _valid_bits) + : FSR(pCpu, pName, ""), + valid_bits(_valid_bits), + register_page_bits(_rpb) +{} + +void FSR_12::put(uint new_value) +{ + value.put(new_value); + + /* The 12-bit core selects the register page using the fsr */ + cpu_pic->register_bank = &cpu_pic->registers[ value.get() & register_page_bits ]; +} + +void FSR_12::put_value(uint new_value) +{ + + put(new_value); + + update(); + cpu_pic->indf->update(); + +} + + +uint FSR_12::get() +{ + uint v = get_value(); + return(v); +} + +uint FSR_12::get_value() +{ + // adjust for missing bits + //cout << "FSR_12:get_value - valid_bits 0x" << hex << valid_bits << endl; + return ((value.get() & valid_bits) | (~valid_bits & 0xff)); + +} + +// +//-------------------------------------------------- +// member functions for the Status_register class +//-------------------------------------------------- +// + +//-------------------------------------------------- + +Status_register::Status_register(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ + rcon = NULL; + break_point = 0; + break_on_z =0; + break_on_c =0; + address = 3; + rp_mask = RP_MASK; + write_mask = 0xff & ~STATUS_TO & ~STATUS_PD; + new_name("status"); +} + +//-------------------------------------------------- +void Status_register::reset(RESET_TYPE r) +{ + switch (r) { + + case POR_RESET: + putRV(por_value); + put_TO(1); + put_PD(1); + break; + + case WDT_RESET: + put_TO(0); + break; + + default: + break; + } + +} + +//-------------------------------------------------- +// put + +void Status_register::put(uint new_value) +{ + value.put((value.get() & ~write_mask) | (new_value & write_mask)); + + if(cpu_pic->base_isa() == _14BIT_PROCESSOR_) + { + cpu_pic->register_bank = &cpu_pic->registers[(value.get() & rp_mask) << 2]; + } + +} + + +//-------------------------------------------------- +// get +//uint Status_register::get() + +//-------------------------------------------------- +// put_Z + +//void Status_register::put_Z(uint new_z) + +//-------------------------------------------------- +// get_Z +//uint Status_register::get_Z() +//-------------------------------------------------- +// put_C + +//void Status_register::put_C(uint new_c) + +//-------------------------------------------------- +// get_C +//uint Status_register::get_C() + +//-------------------------------------------------- +// put_Z_C_DC + +//-------------------------------------------------- +// member functions for the INDF class +//-------------------------------------------------- +INDF::INDF(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ + fsr_mask = 0x7f; // assume a 14bit core + base_address_mask1 = 0; // " " + base_address_mask2 = 0xff; // " " +} + +void INDF::initialize() +{ + + switch(cpu_pic->base_isa()) { + + case _12BIT_PROCESSOR_: + fsr_mask = 0x1f; + base_address_mask1 = 0x0; + base_address_mask2 = 0x1f; + + break; + + case _14BIT_PROCESSOR_: + fsr_mask = 0x7f; + break; + + case _PIC17_PROCESSOR_: + case _PIC18_PROCESSOR_: + cout << "BUG: INDF::"<<__FUNCTION__<<". 16bit core uses a different class for indf."; + break; + default: + cout << " BUG - invalid processor type INDF::initialize\n"; + } + + +} +void INDF::put(uint new_value) +{ + + int reg = (cpu_pic->fsr->get_value() + //cpu_pic->fsr->value + + ((cpu_pic->status->value.get() & base_address_mask1)<<1) ) & base_address_mask2; + + // if the fsr is 0x00 or 0x80, then it points to the indf + if(reg & fsr_mask){ + cpu_pic->registers[reg]->put(new_value); + + //(cpu_pic->fsr->value & base_address_mask2) + ((cpu_pic->status->value & base_address_mask1)<<1) + } + +} + +void INDF::put_value(uint new_value) +{ + + // go ahead and use the regular put to write the data. + // note that this is a 'virtual' function. Consequently, + // all objects derived from a file_register should + // automagically be correctly updated (which isn't + // necessarily true if we just write new_value on top + // of the current register value). + + put(new_value); + + update(); + int r = (cpu_pic->fsr->get_value() + //cpu_pic->fsr->value + + (((cpu_pic->status->value.get() & base_address_mask1)<<1)& base_address_mask2)); + if(r & fsr_mask) + cpu_pic->registers[r]->update(); + +} + + +uint INDF::get() +{ + + int reg = (cpu_pic->fsr->get_value() + + ((cpu_pic->status->value.get() & base_address_mask1)<<1) ) & base_address_mask2; + if(reg & fsr_mask) + return(cpu_pic->registers[reg]->get()); + else + return(0); // avoid infinite loop if fsr points to the indf +} + +uint INDF::get_value() +{ + int reg = (cpu_pic->fsr->get_value() + + ((cpu_pic->status->value.get() & base_address_mask1)<<1) ) & base_address_mask2; + if(reg & fsr_mask) + return(cpu_pic->registers[reg]->get_value()); + else + return(0); // avoid infinite loop if fsr points to the indf +} + + + +//-------------------------------------------------- +// member functions for the PCL base class +//-------------------------------------------------- +PCL::PCL(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ + por_value = RegisterValue(0,0); +} + +// %%% FIX ME %%% breaks are different +void PCL::put(uint new_value) +{ + cpu_pic->pc->computed_goto(new_value); +} + +void PCL::put_value(uint new_value) +{ + + value.put(new_value & 0xff); + cpu_pic->pc->put_value( (cpu_pic->pc->get_value() & 0xffffff00) | value.get()); + + // The gui (if present) will be updated in the pc->put_value call. +} + +uint PCL::get() +{ + return((value.get()+1) & 0xff); +} + +uint PCL::get_value() +{ + value.put(cpu_pic->pc->get_value() & 0xff); + return((value.get()+1) & 0xff); +} +//------------------------------------------------------------ +// PCL reset +// +void PCL::reset(RESET_TYPE r) +{ + putRV_notrace(por_value); +} + +//-------------------------------------------------- +// member functions for the PCLATH base class +//-------------------------------------------------- + +PCLATH::PCLATH(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ + mValidBits = PCLATH_MASK; +} + +void PCLATH::put(uint new_value) +{ + value.put(new_value & mValidBits); +} + +void PCLATH::put_value(uint new_value) +{ + cout << "PCLATH::put_value(" << new_value << ")\n"; + value.put(new_value & mValidBits); + + // RP - I cannot think of a single possible reason I'd want to affect the real PC here! + // cpu_pic->pc->put_value( (cpu_pic->pc->get_value() & 0xffff00ff) | (value.get()<<8) ); + + // The gui (if present) will be updated in the pc->put_value call. +} + +uint PCLATH::get() +{ + return(value.get() & mValidBits); +} + +//-------------------------------------------------- +// member functions for the PCON base class +//-------------------------------------------------- +// +PCON::PCON(Processor *pCpu, const char *pName, const char *pDesc, + uint bitMask) + : sfr_register(pCpu, pName, pDesc) +{ + valid_bits = bitMask; +} + +void PCON::put(uint new_value) +{ + Dprintf((" value %x add %x\n", new_value, new_value&valid_bits)); + + value.put(new_value&valid_bits); +} + + +//------------------------------------------------ + +Indirect_Addressing14::Indirect_Addressing14(pic_processor *pCpu, const string &n) + : fsrl(pCpu, (string("fsrl")+n).c_str(), "FSR Low", this), + fsrh(pCpu, (string("fsrh")+n).c_str(), "FSR High", this), + indf(pCpu, (string("indf")+n).c_str(), "Indirect Register", this) +{ + current_cycle = (uint64_t)(-1); // Not zero! See bug #3311944 + fsr_value = 0; + fsr_state = 0; + fsr_delta = 0; + cpu = pCpu; + +} + +/* + * put - Each of the indirect registers associated with this + * indirect addressing class will call this routine to indirectly + * write data. + */ +void Indirect_Addressing14::put(uint new_value) +{ + uint fsr_adj = fsr_value + fsr_delta; + + if (fsr_adj < 0x1000) // Traditional Data Memory + { + if(is_indirect_register(fsr_adj)) + return; + cpu_pic->registers[fsr_adj]->put(new_value); + } + else if (fsr_adj >= 0x2000 && fsr_adj < 0x29b0) // Linear GPR region + { + uint bank = (fsr_adj & 0xfff) / 0x50; + uint low_bits = ((fsr_adj & 0xfff) % 0x50) + 0x20; + Dprintf(("fsr_adj %x bank %x low_bits %x add %x\n", fsr_adj, bank, low_bits, (bank*0x80 + low_bits))); + cpu_pic->registers[bank * 0x80 + low_bits]->put(new_value); + } + else if (fsr_adj >= 0x8000 && fsr_adj <= 0xffff) // program memory + { + cout << "WARNING cannot write via FSR/INDF to program memory address 0x" + <registers[fsr_adj]->get(); + } + else if (fsr_adj >= 0x2000 && fsr_adj < 0x29b0) // Linear GPR region + { + uint bank = (fsr_adj & 0xfff) / 0x50; + uint low_bits = ((fsr_adj & 0xfff) % 0x50) + 0x20; + return(cpu_pic->registers[bank * 0x80 + low_bits]->get()); + } + else if (fsr_adj >= 0x8000 && fsr_adj <= 0xffff) // program memory + { + uint pm; + unsigned address = fsr_adj - 0x8000; + + if (address <= cpu_pic->program_memory_size()) + { + pm = cpu_pic->get_program_memory_at_address(address); + Dprintf((" address %x max %x value %x\n",address, cpu_pic->program_memory_size(), pm)); + return pm & 0xff; + } + } + return 0; +} + +/* + * get - Each of the indirect registers associated with this + * indirect addressing class will call this routine to indirectly + * retrieve data. + */ +uint Indirect_Addressing14::get_value() +{ + uint fsr_adj = fsr_value + fsr_delta; + if (fsr_adj < 0x1000) // Traditional Data Memory + { + if(is_indirect_register(fsr_adj)) + return 0; + + return cpu_pic->registers[fsr_adj]->get_value(); + } + else if (fsr_adj >= 0x2000 && fsr_adj < 0x29b0) // Linear GPR region + { + uint bank = (fsr_adj & 0xfff) / 0x50; + uint low_bits = ((fsr_adj & 0xfff) % 0x50) + 0x20; + + return(cpu_pic->registers[bank * 0x80 + low_bits]->get_value()); + } + else if (fsr_adj >= 0x8000 && fsr_adj <= 0xffff) // program memory + { + uint pm; + unsigned address = fsr_adj - 0x8000; + + if (address <= cpu_pic->program_memory_size()) + { + pm = cpu_pic->get_program_memory_at_address(address); + return pm & 0xff; + } + } + return 0; +} + +void Indirect_Addressing14::put_fsr(uint new_fsr) +{ + + fsrl.put(new_fsr & 0xff); + fsrh.put((new_fsr>>8) & 0xff); + +} + + +/* + * update_fsr_value - This routine is called by the FSRL and FSRH + * classes. It's purpose is to update the 16-bit + * address formed by the concatenation of FSRL and FSRH. + * + */ + +void Indirect_Addressing14::update_fsr_value() +{ + + if(current_cycle != get_cycles().get()) + { + fsr_value = (fsrh.value.get() << 8) | fsrl.value.get(); + fsr_delta = 0; + } +} +//-------------------------------------------------- +// member functions for the FSR class +//-------------------------------------------------- +// +FSRL14::FSRL14(Processor *pCpu, const char *pName, const char *pDesc, Indirect_Addressing14 *pIAM) + : sfr_register(pCpu,pName,pDesc), + iam(pIAM) +{ +} + +void FSRL14::put(uint new_value) +{ + value.put(new_value & 0xff); + iam->fsr_delta = 0; + iam->update_fsr_value(); +} + +void FSRL14::put_value(uint new_value) +{ + + value.put(new_value & 0xff); + iam->fsr_delta = 0; + iam->update_fsr_value(); + + update(); + cpu14->indf->update(); + +} + +FSRH14::FSRH14(Processor *pCpu, const char *pName, const char *pDesc, Indirect_Addressing14 *pIAM) + : sfr_register(pCpu,pName,pDesc), + iam(pIAM) +{ +} + +void FSRH14::put(uint new_value) +{ + value.put(new_value & 0xff); + + iam->update_fsr_value(); +} + +void FSRH14::put_value(uint new_value) +{ + + value.put(new_value & 0xff); + iam->update_fsr_value(); + + update(); + cpu14->indf->update(); +} + +// INDF14 used by 14bit enhanced indirect addressing +INDF14::INDF14(Processor *pCpu, const char *pName, const char *pDesc, Indirect_Addressing14 *pIAM) + : sfr_register(pCpu,pName,pDesc), + iam(pIAM) +{ +} + +void INDF14::put(uint new_value) +{ + if(iam->fsr_value & 0x8000) // extra cycle for program memory access + get_cycles().increment(); + + iam->put(new_value); + iam->fsr_delta = 0; +} + +void INDF14::put_value(uint new_value) +{ + iam->put(new_value); + iam->fsr_delta = 0; + update(); +} + +uint INDF14::get() +{ + uint ret; + + Dprintf((" get val %x delta %x \n", iam->fsr_value, iam->fsr_delta)); + + if(iam->fsr_value & 0x8000) get_cycles().increment(); + + ret = iam->get(); + iam->fsr_delta = 0; + return ret; +} + +uint INDF14::get_value() +{ + return(iam->get_value()); +} +//-------------------------------------------------- +Stack::Stack(Processor *pCpu) : cpu(pCpu) +{ + + stack_warnings_flag = 0; // Do not display over/under flow stack warnings + break_on_overflow = true; // Do not break if the stack over flows + break_on_underflow = 0; // Do not break if the stack under flows + stack_mask = 7; // Assume a 14 bit core. + pointer = 0; + + for(int i=0; i<31; i++) + contents[i] = 0; + + STVREN = 0; + +} + +// +// Stack::push +// +// push the passed address onto the stack by storing it at the current +// + +bool Stack::push(uint address) +{ + Dprintf(("pointer=%d address 0x%x\n",pointer,address)); + // Write the address at the current point location. Note that the '& stack_mask' + // implicitly handles the stack wrap around. + + + // If the stack pointer is too big, then the stack has definitely over flowed. + // However, some pic programs take advantage of this 'feature', so provide a means + // for them to ignore the warnings. + + if(pointer > (int)stack_mask) { + stack_overflow(); + return false; + } + contents[pointer++ & stack_mask] = address; + + return true; + +} +bool Stack::stack_overflow() +{ + Dprintf(("stack_warnings_flag=%d break_on_overflow=%d\n", stack_warnings_flag,break_on_overflow)); + if(stack_warnings_flag || break_on_overflow) + cout << "stack overflow \n"; + if(break_on_overflow) + bp.halt(); + return true; +} + +// +// Stack::pop +// + +uint Stack::pop() +{ + + // First decrement the stack pointer. + + if(--pointer < 0) { + stack_underflow(); + return 0; + } + + + Dprintf(("pointer=%d address 0x%x\n",pointer,contents[pointer & stack_mask])); + + return(contents[pointer & stack_mask]); +} +bool Stack::stack_underflow() +{ + pointer = 0; + if(stack_warnings_flag || break_on_underflow) + cout << "stack underflow "; + if(break_on_underflow) + bp.halt(); + return true; +} + +// +// bool Stack::set_break_on_overflow(bool clear_or_set) +// +// Set or clear the break on overflow flag + + +bool Stack::set_break_on_overflow(bool clear_or_set) +{ + if(break_on_overflow == clear_or_set) + return 0; + + break_on_overflow = clear_or_set; + + return 1; + +} + +// +// bool Stack::set_break_on_underflow(bool clear_or_set) +// +// Set or clear the break on underflow flag + + +bool Stack::set_break_on_underflow(bool clear_or_set) +{ + if(break_on_underflow == clear_or_set) + return 0; + + break_on_underflow = clear_or_set; + + return 1; + +} + +// Read value at top of stack +// +uint Stack::get_tos() +{ + if (pointer > 0) + return (contents[pointer-1]); + else + return (0); +} + +// Modify value at top of stack; +// +void Stack::put_tos(uint new_tos) +{ + + if (pointer > 0) + contents[pointer-1] = new_tos; + +} + +// Stack14E for extended 14bit processors +// This stack implementation differs from both the other 14bit +// and 16bit stacks as a dummy empty location is used so a +// stack with 16 slots can hold 16 values. The other implementaion +// of the stack hold n-1 values for an n slot stack. +// This stack also supports stkptr, tosl, and tosh like the 16bit +// (p18) processors +Stack14E::Stack14E(Processor *pCpu) : Stack(pCpu), + stkptr(pCpu, "stkptr", "Stack pointer"), + tosl(pCpu, "tosl", "Top of Stack low byte"), + tosh(pCpu, "tosh", "Top of Stack high byte") +{ + stkptr.stack = this; + tosl.stack = this; + tosh.stack = this; + + + STVREN = 1; +} + +Stack14E::~Stack14E() +{ + pic_processor *pCpu = dynamic_cast(cpu); + if (pCpu) + { + pCpu->remove_sfr_register(&stkptr); + pCpu->remove_sfr_register(&tosl); + pCpu->remove_sfr_register(&tosh); + } +} +void Stack14E::reset(RESET_TYPE r) +{ + pointer = NO_ENTRY; + if (STVREN) + contents[stack_mask] = 0; + else + contents[pointer-1] = contents[stack_mask]; + + Dprintf((" pointer 0x%x\n", pointer)); + stkptr.put(pointer-1); +} + +bool Stack14E::push(uint address) +{ + Dprintf(("pointer=%d address 0x%x\n",pointer,address)); + // Write the address at the current point location. Note that the '& stack_mask' + // implicitly handles the stack wrap around. + + if(pointer == NO_ENTRY) + pointer = 0; + + contents[pointer & stack_mask] = address; + + // If the stack pointer is too big, then the stack has definitely over flowed. + // However, some pic programs take advantage of this 'feature', so provide a means + // for them to ignore the warnings. + + if(pointer++ > (int)stack_mask) { + return stack_overflow(); + } + stkptr.put(pointer-1); + return true; + +} +uint Stack14E::pop() +{ + uint ret = 0; + + if (pointer == NO_ENTRY) + { + return stack_underflow(); + } + pointer--; + ret = contents[pointer]; + if (pointer <= 0) + pointer = NO_ENTRY; + + stkptr.put(pointer-1); + return(ret); +} +bool Stack14E::stack_overflow() +{ + cpu14e->pcon.put(cpu14e->pcon.get() | PCON::STKOVF); + if(STVREN) + { + cpu->reset(STKOVF_RESET); + return false; + } + else + { + cout << "Stack overflow\n"; + } + return true; +} +bool Stack14E::stack_underflow() +{ + Dprintf((" cpu %p STVREN %d\n", cpu, STVREN)); + cpu14e->pcon.put(cpu14e->pcon.get() | PCON::STKUNF); + if(STVREN) + { + cpu->reset(STKUNF_RESET); + return false; + } + else + { + cout << "Stack underflow\n"; + } + return true; + +} + +//------------------------------------------------ +// TOSL +TOSL::TOSL(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc) +{} + +uint TOSL::get() +{ + value.put(stack->get_tos() & 0xff); + + return(value.get()); +} + +uint TOSL::get_value() +{ + value.put(stack->get_tos() & 0xff); + return(value.get()); +} + +void TOSL::put(uint new_value) +{ + stack->put_tos( (stack->get_tos() & 0xffffff00) | (new_value & 0xff)); + value.put(new_value & 0xff); +} + +void TOSL::put_value(uint new_value) +{ + stack->put_tos( (stack->get_tos() & 0xffffff00) | (new_value & 0xff)); + value.put(new_value & 0xff); + update(); +} + + +//------------------------------------------------ +// TOSH +TOSH::TOSH(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc) +{} + +uint TOSH::get() +{ + value.put((stack->get_tos() >> 8) & 0xff); + + return(value.get()); +} + +uint TOSH::get_value() +{ + value.put((stack->get_tos() >> 8) & 0xff); + return(value.get()); +} + +void TOSH::put(uint new_value) +{ + stack->put_tos( (stack->get_tos() & 0xffff00ff) | ( (new_value & 0xff) << 8)); + value.put(new_value & 0xff); +} + +void TOSH::put_value(uint new_value) +{ + stack->put_tos( (stack->get_tos() & 0xffff00ff) | ( (new_value & 0xff) << 8)); + value.put(new_value & 0xff); + + update(); +} + +STKPTR::STKPTR(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc) +{} +void STKPTR::put_value(uint new_value) +{ + stack->pointer = (new_value & 0x1f) + 1; + value.put(new_value); + update(); +} + +void STKPTR::put(uint new_value) +{ + put_value(new_value); +} + + + + +WREG::WREG(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc) +{ +} + +WREG::~WREG() +{ +} + +void WPU::put(uint new_value) +{ + uint masked_value = new_value & mValidBits; + int i; + + value.put(masked_value); + for(i = 0; i < 8; i++) + { + if((1<getPin().update_pullup((((1<set_t0xcs(masked_value & T0XCS); + calculate_freq(); +} + +#define p_cpu ((Processor *)cpu) + +void CPSCON0::calculate_freq() +{ + + if (!(value.get() & CPSON)) return;// not active, return + if (!pin[chan] || !pin[chan]->getPin().snode) return; + + double cap = pin[chan]->getPin().snode->Cth; + double current = 0; + double deltat; + + switch((value.get() & (CPSRNG0 | CPSRNG1)) >> 2) + { + case 1: + current = (value.get() & CPSRM) ? 9e-6 : 0.1e-6; + break; + + case 2: + current = (value.get() & CPSRM) ? 30e-6 : 1.2e-6; + break; + + case 3: + current = (value.get() & CPSRM) ? 100e-6 : 18e-6; + break; + }; + + if (current < 1e-12) + return; + // deltat is the time required to charge the capacitance on the pin + // from a constant current source for the specified voltage swing. + // The voltage swing for the internal reference is not specified + // and it is just a guess that it is Vdd - 2 diode drops. + // + // This implimentation does not work if capacitor oscillator + // runs faster than Fosc/4 + // + if (value.get() & CPSRM) + { + deltat = (FVR_voltage - DAC_voltage)*cap/current; + if (deltat <= 0.) + { + cout << "CPSCON FVR must be greater than DAC for high range to work\n"; + return; + } + } + else + { + deltat = (p_cpu->get_Vdd() - 1.2) * cap / current; + } + + period = (p_cpu->get_frequency() * deltat + 2) / 4; + + if (period <= 0) + { + cout << "CPSCON Oscillator > Fosc/4, setting to Fosc/4\n"; + period = 1; + } + uint64_t fc = get_cycles().get() + period; + + if (future_cycle > get_cycles().get()) + { + get_cycles().reassign_break(future_cycle, fc, this); + } + else + get_cycles().set_break(fc, this); + + future_cycle = fc; +} + +void CPSCON0::callback_print() +{ + cout << name() << " has callback, ID = " << CallBackID << '\n'; +} +void CPSCON0::callback() +{ + Dprintf(("now=0x%" PRINTF_GINT64_MODIFIER "x\n",get_cycles().get())); + + if (!(value.get() & CPSON)) + return; + + if (value.get() & CPSOUT) // High to low transition + { + value.put(value.get() & ~CPSOUT); + if (m_tmr0 && (value.get() & T0XCS) && + m_tmr0->get_t0se() && m_tmr0->get_t0cs()) + { + m_tmr0->increment(); + } + + } + else // Low to high transition + { + value.put(value.get() | CPSOUT); + if (m_tmr0 && (value.get() & T0XCS) && + !m_tmr0->get_t0se() && m_tmr0->get_t0cs()) + { + m_tmr0->increment(); + } + if (m_t1con_g) + m_t1con_g->t1_cap_increment(); + } + + + calculate_freq(); +} + +void CPSCON0::set_chan(uint _chan) +{ + if (_chan == chan) + return; + + if (!pin[_chan]) + { + cout << "CPSCON Channel " << _chan << " reserved\n"; + return; + } + if (!pin[_chan]->getPin().snode) + { + cout << "CPSCON Channel " << pin[_chan]->getPin().name() << " requires a node attached\n"; + chan = _chan; + return; + } + if (!cps_stimulus) + cps_stimulus = new CPS_stimulus(this, "cps_stimulus"); + else if (pin[_chan]->getPin().snode) + { + (pin[_chan]->getPin().snode)->detach_stimulus(cps_stimulus); + } + + chan = _chan; + (pin[_chan]->getPin().snode)->attach_stimulus(cps_stimulus); + calculate_freq(); +} + +void CPSCON0::set_DAC_volt(double volt) +{ + DAC_voltage = volt; + if ((value.get() & (CPSON|CPSRM)) == (CPSON|CPSRM)) + calculate_freq(); +} +void CPSCON0::set_FVR_volt(double volt) +{ + FVR_voltage = volt; + if ((value.get() & (CPSON|CPSRM)) == (CPSON|CPSRM)) + calculate_freq(); +} + +CPS_stimulus::CPS_stimulus(CPSCON0 * arg, const char *cPname,double _Vth, double _Zth) + : stimulus(cPname, _Vth, _Zth) +{ + m_cpscon0 = arg; +} + +// Thisvis also called when the capacitance chages, +// not just when the voltage changes +void CPS_stimulus::set_nodeVoltage(double v) +{ + Dprintf(("set_nodeVoltage =%.1f\n", v)); + nodeVoltage = v; + m_cpscon0->calculate_freq(); +} + +void CPSCON1::put(uint new_value) +{ + uint masked_value = new_value & mValidBits; + + value.put(masked_value); + assert(m_cpscon0); + m_cpscon0->set_chan(masked_value); +} + +SRCON0::SRCON0(Processor *pCpu, const char *pName, const char *pDesc, SR_MODULE *_sr_module) + : sfr_register(pCpu, pName, pDesc), + m_sr_module(_sr_module) +{ +} +void SRCON0::put(uint new_value) +{ + uint diff = new_value ^ value.get(); + + if (!diff) return; + + value.put(new_value & ~(SRPR|SRPS)); // SRPR AND SRPS not saved + + if ((diff & SRPS) && (new_value & SRPS)) + m_sr_module->pulse_set(); + if ((diff & SRPR) && (new_value & SRPR)) + m_sr_module->pulse_reset(); + + if (diff & CLKMASK) + m_sr_module->clock_diff((new_value & CLKMASK) >> CLKSHIFT); + + if (diff & (SRQEN | SRLEN)) + m_sr_module->Qoutput(); + if (diff & (SRNQEN | SRLEN)) + m_sr_module->NQoutput(); + + m_sr_module->update(); +} + +SRCON1::SRCON1(Processor *pCpu, const char *pName, const char *pDesc, SR_MODULE *_sr_module) + : sfr_register(pCpu, pName, pDesc), + m_sr_module(_sr_module), mValidBits(0xdd) +{ +} + +void SRCON1::put(uint new_value) +{ + uint masked_value = new_value & mValidBits; + uint diff = masked_value ^ value.get(); + + value.put(masked_value); + + if (!diff) return; + + if (diff & (SRRCKE | SRSCKE)) + { + if (!(new_value & (SRRCKE | SRSCKE))) // all clocks off + m_sr_module->clock_disable(); // turn off clock + else + m_sr_module->clock_enable(); // turn on clock + } + m_sr_module->update(); +} + +class SRinSink : public SignalSink +{ +public: + SRinSink(SR_MODULE *_sr_module) + : sr_module(_sr_module) + {} + + virtual void setSinkState(char new3State) + { + sr_module->setState(new3State); + } + virtual void release() { delete this; } +private: + SR_MODULE *sr_module; +}; + +class SRnSource : public PeripheralSignalSource +{ + +public: + + SRnSource(PinModule *_pin, SR_MODULE *_sr_module, int _index) : + PeripheralSignalSource(_pin), sr_module(_sr_module), + index(_index) + { ;} + virtual void release() { sr_module->releasePin(index); } +private: + SR_MODULE *sr_module; + int index; +}; + +enum { + SRQ = 0, + SRNQ +}; +SR_MODULE::SR_MODULE(Processor *_cpu) : + srcon0(_cpu, "srcon0", "SR Latch Control 0 Register", this), + srcon1(_cpu, "srcon1", "SR Latch Control 1 Register", this), + cpu(_cpu), future_cycle(0), state_set(false), state_reset(false), + state_Q(false), srclk(0), syncc1out(false), syncc2out(false), + SRI_pin(0), SRQ_pin(0), SRNQ_pin(0), m_SRinSink(0), + m_SRQsource(0), m_SRNQsource(0), m_SRQsource_active(false), + m_SRNQsource_active(false) +{ +} +SR_MODULE::~SR_MODULE() +{ + if (m_SRQsource_active) + SRQ_pin->setSource(0); + if ( m_SRQsource) + delete m_SRQsource; + if (m_SRNQsource_active) + SRNQ_pin->setSource(0); + if ( m_SRNQsource) + delete m_SRNQsource; +} + +// determine output state of RS flip-flop +// If both state_set and state_reset are true, Q output is 0 +// SPR[SP] and clocked inputs maybe set outside the update +// function prior to its call. +void SR_MODULE::update() +{ + + if ((srcon1.value.get() & SRCON1::SRSC1E) && syncc1out) + state_set = true; + + if ((srcon1.value.get() & SRCON1::SRSC2E) && syncc2out) + state_set = true; + + if ((srcon1.value.get() & SRCON1::SRSPE) && SRI_pin->getPin().getState()) + state_set = true; + + if ((srcon1.value.get() & SRCON1::SRRC1E) && syncc1out) + state_reset = true; + + if ((srcon1.value.get() & SRCON1::SRRC2E) && syncc2out) + state_reset = true; + + if ((srcon1.value.get() & SRCON1::SRRPE) && SRI_pin->getPin().getState()) + state_reset = true; + if (state_set) + state_Q = true; + + // reset overrides a set + if (state_reset) + state_Q = false; + + + state_set = state_reset = false; + + if (!(srcon0.value.get() & SRCON0::SRLEN)) + return; + + if ((srcon0.value.get() & SRCON0::SRQEN)) + m_SRQsource->putState(state_Q ? '1' : '0'); + + if ((srcon0.value.get() & SRCON0::SRNQEN)) + m_SRNQsource->putState(!state_Q ? '1' : '0'); + +} + +// Stop clock if currently running +void SR_MODULE::clock_disable() +{ + if (future_cycle> get_cycles().get()) + { + get_cycles().clear_break(this); + future_cycle = 0; + } + future_cycle = 0; +} + +// Start clock if not running +// As break works on instruction cycles, clock runs every 1-128 +// instructions which is 1 << srclk +// +void SR_MODULE::clock_enable() +{ + if (!future_cycle) + { + future_cycle = get_cycles().get() + (1 << srclk); + get_cycles().set_break(future_cycle, this); + } +} + +// Called for clock rate change +void SR_MODULE::clock_diff(uint _srclk) +{ + srclk = _srclk; + + clock_disable(); + + if (srcon1.value.get() & (SRCON1::SRSCKE | SRCON1::SRRCKE)) + { + clock_enable(); + } +} + +void SR_MODULE::callback() +{ + bool active = false; + + if (srcon1.value.get() & (SRCON1::SRSCKE)) //Set clock enabled + { + active = true; + pulse_set(); + } + + if (srcon1.value.get() & (SRCON1::SRRCKE)) //Reset clock enabled + { + active = true; + pulse_reset(); + } + if (active) + { + future_cycle = 0; + clock_enable(); + } + update(); + +} +void SR_MODULE::setPins(PinModule *sri, PinModule *srq, PinModule *srnq) +{ + + if(!SRI_pin) + { + m_SRinSink = new SRinSink(this); + sri->addSink(m_SRinSink); + } + else if (SRI_pin != sri) + { + SRI_pin->removeSink(m_SRinSink); + sri->addSink(m_SRinSink); + } + SRI_pin = sri; + SRQ_pin = srq; + SRNQ_pin = srnq; + +} + +// If pin chnages and we are looking at it, call update +void SR_MODULE::setState(char IOin) +{ + if (srcon1.value.get() & (SRCON1::SRSPE | SRCON1::SRRPE)) + update(); +} + +void SR_MODULE::syncC1out(bool val) +{ + if (syncc1out != val) + { + syncc1out = val; + if (srcon1.value.get() & (SRCON1::SRSC1E | SRCON1::SRRC1E)) + { + update(); + } + } +} +void SR_MODULE::syncC2out(bool val) +{ + if (syncc2out != val) + { + syncc2out = val; + if (srcon1.value.get() & (SRCON1::SRSC2E | SRCON1::SRRC2E)) + { + update(); + } + } +} + +// Setup or tear down RSQ output pin +// This is only call if SRLEN OR SRQEN has changed +void SR_MODULE::Qoutput() +{ + if ((srcon0.value.get() & (SRCON0::SRLEN | SRCON0::SRQEN)) == + (SRCON0::SRLEN | SRCON0::SRQEN)) + { + if (!m_SRQsource) + m_SRQsource = new SRnSource(SRQ_pin, this, SRQ); + + SRQ_pin->setSource(m_SRQsource); + + m_SRQsource_active = true; + } + else SRQ_pin->setSource(0); + +} + +// Setup or tear down RSNQ output pin +// This is only call if SRLEN OR SRNQEN has changed +void SR_MODULE::NQoutput() +{ + if ((srcon0.value.get() & (SRCON0::SRLEN | SRCON0::SRNQEN)) == + (SRCON0::SRLEN | SRCON0::SRNQEN)) + { + if (!m_SRNQsource) m_SRNQsource = new SRnSource(SRNQ_pin, this, SRNQ); + + SRNQ_pin->setSource(m_SRNQsource); + + m_SRNQsource_active = true; + } + else SRNQ_pin->setSource(0); + +} + +void SR_MODULE::releasePin(int index) +{ + switch(index) + { + case SRQ: + m_SRQsource_active = false; + break; + + case SRNQ: + m_SRNQsource_active = false; + break; + } +} + +//------------------------------------------------------------------- +LVDCON_14::LVDCON_14(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName,pDesc), + write_mask(0x17), IntSrc(0) +{ +} + +double ldv_volts[] = {1.9, 2.0, 2.1, 2.2, 2.3, 4.0, 4.2, 4.5}; + +void LVDCON_14::check_lvd() +{ + uint reg = value.get(); + if (!(reg & IRVST)) + return; + + double voltage = ldv_volts[reg & (LVDL0|LVDL1|LVDL2)]; + Processor *Cpu = (Processor *)cpu; + if (Cpu->get_Vdd() <= voltage) + IntSrc->Trigger(); +} +void LVDCON_14::callback() +{ + value.put(value.get() | IRVST); + check_lvd(); +} +void LVDCON_14::put(uint new_value) +{ + new_value &= write_mask; + uint diff = value.get() ^ new_value; + if (!diff) return; + + value.put(new_value); + + if ((diff & LVDEN) && (new_value & LVDEN)) // Turning on + { + // wait before doing anything + get_cycles().set_break( + get_cycles().get() + 50e-6 * get_cycles().instruction_cps(), + this); + } + return; +} + diff --git a/src/gpsim/registers/14bit-registers.h b/src/gpsim/registers/14bit-registers.h new file mode 100644 index 0000000..d5c03a1 --- /dev/null +++ b/src/gpsim/registers/14bit-registers.h @@ -0,0 +1,1113 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + Copyright (C) 2013 Roy R. Rankin + + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include + + +class InvalidRegister; // Forward reference + +#ifndef __14_BIT_REGISTERS_H__ +#define __14_BIT_REGISTERS_H__ + + +class _14bit_processor; + +#include "breakpoints.h" + +#include "rcon.h" +#include "intcon.h" +#include "pir.h" + +class stimulus; // forward reference +class IOPIN; +class source_stimulus; +//class Stimulus_Node; +class PORTB; +class pic_processor; + +#include "ioports.h" + +//--------------------------------------------------------- +// BORCON register +// +class BORCON : public sfr_register +{ + public: + BORCON(Processor *, const char *pName, const char *pDesc=0); + + void put(uint new_value); + void put_value(uint new_value); +}; + +//--------------------------------------------------------- +// BSR register +// +class BSR : public sfr_register +{ + public: + BSR(Processor *, const char *pName, const char *pDesc=0); + + uint register_page_bits; + + void put(uint new_value); + void put_value(uint new_value); +}; + +//--------------------------------------------------------- +// FSR register +// +class FSR : public sfr_register +{ + public: + FSR(Processor *, const char *pName, const char *pDesc=0); + virtual void put(uint new_value); + virtual void put_value(uint new_value); + virtual uint get(); + virtual uint get_value(); +}; + +//--------------------------------------------------------- +// FSR_12 register - FSR for the 12-bit core processors. +// +class FSR_12 : public FSR +{ + public: + uint valid_bits; + uint register_page_bits; /* Only used by the 12-bit core to define + the valid paging bits in the FSR. */ + FSR_12(Processor *, const char *pName, + uint _register_page_bits, uint _valid_bits); + + virtual void put(uint new_value); + virtual void put_value(uint new_value); + virtual uint get(); + virtual uint get_value(); +}; + +//--------------------------------------------------------- +// Status register +// +class RCON; + +class Status_register : public sfr_register +{ + public: + + #define STATUS_Z_BIT 2 + #define STATUS_C_BIT 0 + #define STATUS_DC_BIT 1 + #define STATUS_PD_BIT 3 + #define STATUS_TO_BIT 4 + #define STATUS_OV_BIT 3 //18cxxx + #define STATUS_N_BIT 4 //18cxxx + #define STATUS_FSR0_BIT 4 //17c7xx + #define STATUS_FSR1_BIT 6 //17c7xx + #define STATUS_Z (1<put_PD(new_pd); + else + { + value.put((value.get() & ~STATUS_PD) | ((new_pd) ? STATUS_PD : 0)); + } + } + + inline uint get_PD() + { + if (rcon) + return (rcon->get_PD()); + else + { + return( ( (value.get() & STATUS_PD) == 0) ? 0 : 1); + } + } + + inline void put_TO(uint new_to) + { + if (rcon) + rcon->put_TO(new_to); + else + { + value.put((value.get() & ~STATUS_TO) | ((new_to) ? STATUS_TO : 0)); + } + } + + inline uint get_TO() + { + if (rcon) + return(rcon->get_TO()); + else + { + return( ( (value.get() & STATUS_TO) == 0) ? 0 : 1); + } + } + + // Special member function to set Z, C, DC, OV, and N for the 18cxxx family + + // Special member function to control just the N bit + void put_N_Z(uint new_value) + { + value.put((value.get() & ~(STATUS_Z | STATUS_N)) | + ((new_value & 0xff ) ? 0 : STATUS_Z) | + ((new_value & 0x80) ? STATUS_N : 0)); + } + + void put_Z_C_N(uint new_value) + { + value.put((value.get() & ~(STATUS_Z | STATUS_C | STATUS_N)) | + ((new_value & 0xff ) ? 0 : STATUS_Z) | + ((new_value & 0x100) ? STATUS_C : 0) | + ((new_value & 0x80) ? STATUS_N : 0)); + } + + inline void put_Z_C_DC_OV_N(uint new_value, uint src1, uint src2) + { + value.put((value.get() & ~ (STATUS_Z | STATUS_C | STATUS_DC | STATUS_OV | STATUS_N)) | + ((new_value & 0xff ) ? 0 : STATUS_Z) | + ((new_value & 0x100) ? STATUS_C : 0) | + (((new_value ^ src1 ^ src2)&0x10) ? STATUS_DC : 0) | + (((new_value ^ src1) & 0x80) ? STATUS_OV : 0) | + ((new_value & 0x80) ? STATUS_N : 0)); + } + + inline void put_Z_C_DC_OV_N_for_sub(uint new_value, uint src1, uint src2) + { + value.put((value.get() & ~ (STATUS_Z | STATUS_C | STATUS_DC | STATUS_OV | STATUS_N)) | + ((new_value & 0xff) ? 0 : STATUS_Z) | + ((new_value & 0x100) ? 0 : STATUS_C) | + (((new_value ^ src1 ^ src2)&0x10) ? 0 : STATUS_DC) | + ((((src1 & ~src2 & ~new_value) | (new_value & ~src1 & src2)) & 0x80) ? STATUS_OV : 0) | + ((new_value & 0x80) ? STATUS_N : 0)); + } + + // Special member function to control just the FSR mode + void put_FSR0_mode(uint new_value) + { + value.put((value.get() & ~(STATUS_FSR0_MODE)) | + (new_value & 0x03 )); + } + + uint get_FSR0_mode(uint new_value) + { + return( (value.get()>>STATUS_FSR0_BIT) & 0x03); + } + + void put_FSR1_mode(uint new_value) + { + value.put((value.get() & ~(STATUS_FSR1_MODE)) | + (new_value & 0x03 )); + } + + uint get_FSR1_mode(uint new_value) + { + return( (value.get()>>STATUS_FSR1_BIT) & 0x03); + } +}; + + +#include "gpsim_time.h" + +//--------------------------------------------------------- +// Stack +// +class Stack +{ + public: + uint contents[32]; /* the stack array */ + int pointer; /* the stack pointer */ + uint stack_mask; /* 1 for 12bit, 7 for 14bit, 31 for 16bit */ + bool stack_warnings_flag; /* Should over/under flow warnings be printed? */ + bool break_on_overflow; /* Should over flow cause a break? */ + bool break_on_underflow; /* Should under flow cause a break? */ + + explicit Stack(Processor *); + virtual ~Stack() {} + virtual bool push(uint); + virtual bool stack_overflow(); + virtual bool stack_underflow(); + virtual uint pop(); + virtual void reset(RESET_TYPE r) {pointer = 0;}; // %%% FIX ME %%% reset may need to change + // because I'm not sure how the stack is affected by a reset. + virtual bool set_break_on_overflow(bool clear_or_set); + virtual bool set_break_on_underflow(bool clear_or_set); + virtual uint get_tos(); + virtual void put_tos(uint); + + + bool STVREN; + Processor *cpu; +}; + +class STKPTR : public sfr_register +{ + public: + + enum { + STKUNF = 1<<6, + STKOVF = 1<<7 + }; + STKPTR(Processor *, const char *pName, const char *pDesc=0); + + Stack *stack; + void put_value(uint new_value); + void put(uint new_value); +}; + +class TOSL : public sfr_register +{ + public: + TOSL(Processor *, const char *pName, const char *pDesc=0); + + Stack *stack; + + virtual void put(uint new_value); + virtual void put_value(uint new_value); + virtual uint get(); + virtual uint get_value(); +}; + +class TOSH : public sfr_register +{ + public: + TOSH(Processor *, const char *pName, const char *pDesc=0); + + Stack *stack; + + virtual void put(uint new_value); + virtual void put_value(uint new_value); + virtual uint get(); + virtual uint get_value(); +}; + +// Stack for enhanced 14 bit porcessors +// +class Stack14E : public Stack +{ + public: + STKPTR stkptr; + TOSL tosl; + TOSH tosh; + + explicit Stack14E(Processor *); + ~Stack14E(); + + virtual void reset(RESET_TYPE r); + virtual uint pop(); + virtual bool push(uint address); + virtual bool stack_overflow(); + virtual bool stack_underflow(); + + #define NO_ENTRY 0x20 +}; +//--------------------------------------------------------- +// W register + +class WREG : public sfr_register +{ + public: + + WREG(Processor *, const char *pName, const char *pDesc=0); + ~WREG(); +}; + +#include "tmr0.h" + +//--------------------------------------------------------- +// INDF + +class INDF : public sfr_register +{ + public: + uint fsr_mask; + uint base_address_mask1; + uint base_address_mask2; + + INDF(Processor *, const char *pName, const char *pDesc=0); + void put(uint new_value); + virtual void put_value(uint new_value); + uint get(); + uint get_value(); + virtual void initialize(); +}; + +//--------------------------------------------------------- +// +// Indirect_Addressing +// +// This class coordinates the indirect addressing on the 18cxxx +// parts. Each of the registers comprising the indirect addressing +// subsystem: FSRnL,FSRnH, INDFn, POSTINCn, POSTDECn, PREINCn, and +// PLUSWn are each individually defined as sfr_registers AND included +// in the Indirect_Addressing class. So accessing these registers +// is the same as accessing any register: through the core cpu's +// register memory. The only difference for these registers is that +// the + +class Indirect_Addressing14; // Forward reference + +//--------------------------------------------------------- +// FSR registers + +class FSRL14 : public sfr_register +{ + public: + FSRL14(Processor *, const char *pName, const char *pDesc, Indirect_Addressing14 *pIAM); + void put(uint new_value); + void put_value(uint new_value); + + protected: + Indirect_Addressing14 *iam; +}; + +class FSRH14 : public sfr_register +{ + public: + FSRH14(Processor *, const char *pName, const char *pDesc, Indirect_Addressing14 *pIAM); + + void put(uint new_value); + void put_value(uint new_value); + + protected: + Indirect_Addressing14 *iam; +}; + +class INDF14 : public sfr_register +{ + public: + INDF14(Processor *, const char *pName, const char *pDesc, Indirect_Addressing14 *pIAM); + + void put(uint new_value); + void put_value(uint new_value); + uint get(); + uint get_value(); + + protected: + Indirect_Addressing14 *iam; +}; + +class Indirect_Addressing14 +{ + public: + Indirect_Addressing14(pic_processor *cpu, const string &n); + + pic_processor *cpu; + + uint fsr_value; // 16bit concatenation of fsrl and fsrh + uint fsr_state; /* used in conjunction with the pre/post incr + * and decrement. This is mainly needed for + * those instructions that perform read-modify- + * write operations on the indirect registers + * eg. btg POSTINC1,4 . The post increment must + * occur after the bit is toggled and not during + * the read operation that's determining the + * current state. + */ + int fsr_delta; /* If there's a pending update to the fsr register + * pair, then the magnitude of that update is + * stored here. + */ + uint64_t current_cycle; /* Stores the cpu cycle when the fsr was last + * changed. + */ + FSRL14 fsrl; + FSRH14 fsrh; + INDF14 indf; + + //void init(_16bit_processor *new_cpu); + void put(uint new_value); + uint get(); + uint get_value(); + void put_fsr(uint new_fsr); + uint get_fsr_value(){return (fsr_value & 0xfff);}; + void update_fsr_value(); + + /* bool is_indirect_register(uint reg_address) + * + * The purpose of this routine is to determine whether or not the + * 'reg_address' is the address of an indirect register. This is + * used by the 'put' and 'get' functions of the indirect registers. + * Indirect registers are forbidden access to other indirect registers. + * (Although double indirection in a single instruction cycle would + * be powerful!). + */ + + inline bool is_indirect_register(uint reg_address) + { + uint bank_address = reg_address % 0x80; + if(bank_address == 0 || bank_address == 1 || bank_address == 4 || + bank_address == 5 || bank_address == 6 || bank_address == 7) + return 1; + return 0; + } +}; + +//--------------------------------------------------------- +// PCL - Program Counter Low +// +class PCL : public sfr_register +{ + public: + + virtual void put(uint new_value); + virtual void put_value(uint new_value); + virtual uint get(); + virtual uint get_value(); + virtual void reset(RESET_TYPE r); + + PCL(Processor *, const char *pName, const char *pDesc=0); +}; + +//--------------------------------------------------------- +// PCLATH - Program Counter Latch High +// +class PCLATH : public sfr_register +{ + public: + void put(uint new_value); + void put_value(uint new_value); + uint get(); + + + PCLATH(Processor *, const char *pName, const char *pDesc=0); +}; + +//--------------------------------------------------------- +// PCON - Power Control/Status Register +// +class PCON : public sfr_register +{ + public: + + enum { + BOR = 1<<0, // clear on Brown Out Reset + POR = 1<<1, // clear on Power On Reset + RI = 1<<2, // clear on Reset instruction + RMCLR = 1<<3, // clear if hardware MCLR occurs + SBOREN = 1<<4, // Software BOR Enable bit + ULPWUE = 1<<5, // Ultra Low-Power Wake-up Enable bit + STKUNF = 1<<6, // Stack undeflow + STKOVF = 1<<7 // Stack overflow + }; + + uint valid_bits; + + void put(uint new_value); + + PCON(Processor *, const char *pName, const char *pDesc=0, + uint bitMask=0x03); +}; + +class OSCCON; +class OSCTUNE : public sfr_register +{ + public: + + void put(uint new_value); + virtual void set_osccon(OSCCON *new_osccon) { osccon = new_osccon;} + uint valid_bits; + + enum { + TUN0 = 1<<0, + TUN1 = 1<<1, + TUN2 = 1<<2, + TUN3 = 1<<3, + TUN4 = 1<<4, + TUN5 = 1<<5, + PLLEN= 1<<6, + INTSRC=1<<7 + }; + OSCCON *osccon; + + OSCTUNE(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc), valid_bits(6), osccon(0) + { } +}; + +// This class is used to trim the frequency of the internal RC clock +// 111111 - Max freq +// 100000 - no adjustment +// 000000 - mix freq +class OSCCAL : public sfr_register +{ + public: + + void put(uint new_value); + void set_freq(float base_freq); + float base_freq; + + OSCCAL(Processor *pCpu, const char *pName, const char *pDesc, uint bitMask) + : sfr_register(pCpu,pName,pDesc), base_freq(0.) + { + mValidBits=bitMask; // Can't use initialiser for parent class members + } +}; + +class OSCCON : public sfr_register, public TriggerObject +{ + public: + virtual void put(uint new_value); + virtual void callback(); + virtual bool set_rc_frequency(bool override=false); + virtual void set_osctune(OSCTUNE *new_osctune) { osctune = new_osctune;} + virtual void set_config_irc(uint cfg_irc){config_irc = cfg_irc;} + virtual void set_config_xosc(uint cfg_xosc){config_xosc = cfg_xosc;} + virtual void set_config_ieso(uint cfg_ieso){config_ieso = cfg_ieso;} + virtual void reset(RESET_TYPE r); + virtual void sleep(); + virtual void wake(); + virtual void por_wake(); + virtual bool internal_RC(); + virtual void clear_irc_stable_bits() { value.put(value.get() & ~(HTS|LTS));} + virtual uint64_t irc_por_time(); // time to stable intrc after power on reset + virtual uint64_t irc_lh_time(); // time to stable intrc after tran low to high range + uint write_mask; + uint clock_state; + uint64_t future_cycle; + bool config_irc; // FOSC bits select internal RC oscillator + bool config_ieso; //internal/external switchover bit from config word + bool config_xosc; // FOSC bits select crystal/resonator + bool has_iofs_bit; + bool is_sleeping; + + OSCTUNE *osctune; + + enum MODE + { + UNDEF = 0, + EXCSTABLE, // external source + LFINTOSC, // Low Freq RC osc + MFINTOSC, // Med Freq rc osc + HFINTOSC, // High Freq RC osc + INTOSC, // IOFS set + T1OSC, // T1 OSC + EC, // external clock, always stable + OST, // startup + PLL = 0x10 + }; + + enum { + SCS0 = 1<<0, + SCS1 = 1<<1, + LTS = 1<<1, + HTS = 1<<2, + IOFS = 1<<2, + OSTS = 1<<3, + IRCF0 = 1<<4, + IRCF1 = 1<<5, + IRCF2 = 1<<6, + IDLEN = 1<<7 + }; + + OSCCON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc), write_mask(0x71), + clock_state(OST), future_cycle(0), config_irc(false), config_ieso(true), + config_xosc(false), has_iofs_bit(false), is_sleeping(false), osctune(0) + { } +}; + +/* OSCCON_1 IOFS bit takes 4 ms to stablize + */ +class OSCCON_1 : public OSCCON +{ + public: + + // virtual void callback(); + // virtual void put(uint new_value); + virtual uint64_t irc_por_time(); // time to stable intrc after power on reset + virtual uint64_t irc_lh_time(); + + OSCCON_1(Processor *pCpu, const char *pName, const char *pDesc) + : OSCCON(pCpu,pName,pDesc) + { } +}; + +class OSCCON2 : public sfr_register +{ + public: + void put(uint new_value); + void set_osccon(OSCCON *new_osccon) { osccon = new_osccon;} + OSCCON2(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc) , write_mask(0x1c), osccon(0) + {;} + + uint write_mask; + enum + { + LFIOFS = 1<<0, // LFINTOSC Frequency Stable bit + MFIOFS = 1<<1, // MFINTOSC Frequency Stable bit + PRISD = 1<<2, // Primary Oscillator Drive Circuit Shutdown bit + SOSCGO = 1<<3, // Secondary Oscillator Start Control bit + MFIOSEL = 1<<4, // MFINTOSC Select bit + SOSCRUN = 1<<6, // SOSC Run Status bit + PLLRDY = 1<<7 // PLL Run Status bit + }; + + OSCCON *osccon; +}; + +/* RC clock 16Mhz with pll to 64Mhz + */ +class OSCCON_HS : public OSCCON +{ + public: + virtual bool set_rc_frequency(bool override=false); + virtual bool internal_RC(); + virtual void callback(); + virtual void por_wake(); + + OSCCON_HS(Processor *pCpu, const char *pName, const char *pDesc) : + OSCCON(pCpu, pName, pDesc), osccon2(0), minValPLL(5) {} + + OSCCON2 *osccon2; + + enum { + SCS0 = 1<<0, + SCS1 = 1<<1, + HFIOFS = 1<<2, + OSTS = 1<<3, + IRCF0 = 1<<4, + IRCF1 = 1<<5, + IRCF2 = 1<<6, + IDLEN = 1<<7 + }; + + unsigned char minValPLL; +}; + +/* RC clock 16Mhz with no SCS0 or osccon2 + */ +class OSCCON_HS2 : public OSCCON +{ + public: + virtual void put(uint new_value); + virtual bool set_rc_frequency(bool override=false); + virtual bool internal_RC(); + virtual void callback(); + virtual void por_wake(); + + OSCCON_HS2(Processor *pCpu, const char *pName, const char *pDesc) : + OSCCON(pCpu, pName, pDesc) { write_mask = 0x70;} + + + enum { + HFIOFS = 1<<0, + LFIOFR = 1<<1, + HFIOFR = 1<<3, + IRCF0 = 1<<4, + IRCF1 = 1<<5, + IRCF2 = 1<<6, + }; +}; + +class OSCSTAT : public sfr_register +{ + public: + void put(uint new_value){;} + + enum + { + HFIOFS = 1<<0, + LFIOFR = 1<<1, + MFIOFR = 1<<2, + HFIOFL = 1<<3, + HFIOFR = 1<<4, + OSTS = 1<<5, + PLLR = 1<<6, + T1OSCR = 1<<7 + }; + OSCSTAT(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc) {} +}; + +/* + * OSC status in OSCSTAT register + */ +class OSCCON_2 : public OSCCON +{ + public: + virtual void put(uint new_value); + void put_value(uint new_value); + virtual void callback(); + virtual bool set_rc_frequency(bool override = false); + virtual void set_oscstat(OSCSTAT *_oscstat) { oscstat = _oscstat;} + virtual void set_callback(); + virtual void por_wake(); + OSCSTAT *oscstat; + + enum { + SCS0 = 1<<0, + SCS1 = 1<<1, + IRCF0 = 1<<3, + IRCF1 = 1<<4, + IRCF2 = 1<<5, + IRCF3 = 1<<6, + SPLLEN = 1<<7 + }; + + OSCCON_2(Processor *pCpu, const char *pName, const char *pDesc) + : OSCCON(pCpu,pName,pDesc), + oscstat(0) {} +}; + +class WDTCON : public sfr_register +{ + public: + + uint valid_bits; + + enum { + WDTPS3 = 1<<4, + WDTPS2 = 1<<3, + WDTPS1 = 1<<2, + WDTPS0 = 1<<1, + SWDTEN = 1<<0 + }; + + WDTCON(Processor *pCpu, const char *pName, const char *pDesc, uint bits) + : sfr_register(pCpu,pName,pDesc), valid_bits(bits) { } + + virtual void put(uint new_value); + virtual void reset(RESET_TYPE r); +}; + +// Interrupt-On-Change GPIO Register +class IOC : public sfr_register +{ + public: + + IOC(Processor *pCpu, const char *pName, const char *pDesc, uint _valid_bits = 0xff) + : sfr_register(pCpu,pName,pDesc) + { + mValidBits=_valid_bits; + } + + virtual void put(uint new_value) + { + uint masked_value = new_value & mValidBits; + value.put(masked_value); + } +}; + +// Interrupt-On-Change Register +class IOCxF : public IOC +{ + public: + + IOCxF(Processor *pCpu, const char *pName, const char *pDesc, uint _valid_bits = 0xff) + : IOC(pCpu,pName,pDesc, _valid_bits), intcon(0) + { + } + + void set_intcon(INTCON *new_value) { intcon = new_value; } + void put(uint new_value); + + protected: + INTCON *intcon; +}; + +class PicPortRegister; +// WPU set weak pullups on pin by pin basis +// +class WPU : public sfr_register +{ + public: + PicPortRegister *wpu_gpio; + bool wpu_pu; + + void put(uint new_value); + void set_wpu_pu(bool pullup_enable); + + WPU(Processor *pCpu, const char *pName, const char *pDesc, PicPortRegister* gpio, uint mask=0x37) + : sfr_register(pCpu,pName,pDesc), wpu_gpio(gpio), wpu_pu(false) + { + mValidBits=mask; // Can't use initialiser for parent class members + } +}; + +class CPSCON1; +class T1CON_G; +class CPS_stimulus; + +// Capacitance Sensing Control Register 0 +class CPSCON0 : public sfr_register, public TriggerObject +{ + public: + + enum { + T0XCS = 1<<0, // Timer0 External Clock Source Select bit + CPSOUT = 1<<1, // Capacitive Sensing Oscillator Status bit + CPSRNG0 = 1<<2, // Capacitive Sensing Current Range bits + CPSRNG1 = 1<<3, + CPSRM = 1<<6, // Capacitive Sensing Reference Mode bit + CPSON = 1<<7 // CPS Module Enable bit + }; + + void put(uint new_value); + void set_chan(uint _chan); + void calculate_freq(); + void set_pin(uint _chan, PinModule *_pin) { pin[_chan] = _pin;} + void set_DAC_volt(double); + void set_FVR_volt(double); + void callback(); + virtual void callback_print(); + + CPSCON0(Processor *pCpu, const char *pName, const char *pDesc=0); + ~CPSCON0(); + + TMR0 *m_tmr0; + T1CON_G *m_t1con_g; + + private: + uint chan; + PinModule *pin[16]; + double DAC_voltage; + double FVR_voltage; + uint64_t future_cycle; + int period; + CPS_stimulus *cps_stimulus; +}; + +// Capacitance Sensing Control Register 1 +class CPSCON1 : public sfr_register +{ + public: + + void put(uint new_value); + + CPSCON1(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), m_cpscon0(0) + { + mValidBits = 0x03; + } + + CPSCON0 *m_cpscon0; +}; + +class CPS_stimulus : public stimulus +{ + public: + + CPS_stimulus(CPSCON0 *arg, const char *n=0, double _Vth=0.0, double _Zth=1e12 ); + + CPSCON0 *m_cpscon0; + + virtual void set_nodeVoltage(double v); +}; + +class SR_MODULE; + +// SR LATCH CONTROL 0 REGISTER +class SRCON0 : public sfr_register +{ + public: + enum { + SRPR = 1<<0, // Pulse Reset Input of the SR Latch bit + SRPS = 1<<1, // Pulse Set Input of the SR Latch bit + SRNQEN = 1<<2, // Latch Not Q Output Enable bit + SRQEN = 1<<3, // Latch Q Output Enable bit + SRCLK0 = 1<<4, // Latch Clock Divider bits + SRCLK1 = 1<<5, // Latch Clock Divider bits + SRCLK2 = 1<<6, // Latch Clock Divider bits + SRLEN = 1<<7, // Latch Enable bit + CLKMASK = SRCLK0|SRCLK1|SRCLK2, + CLKSHIFT = 4 + + }; + + SRCON0(Processor *pCpu, const char *pName, const char *pDesc, SR_MODULE *_sr_module); + void put(uint new_value); + + private: + SR_MODULE *m_sr_module; +}; + +// SR LATCH CONTROL 1 REGISTER +// +class SRCON1 : public sfr_register +{ + public: + enum { + SRRC1E = 1<<0, // Latch C1 Reset Enable bit + SRRC2E = 1<<1, // Latch C2 Reset Enable bit + SRRCKE = 1<<2, // Latch Reset Clock Enable bit + SRRPE = 1<<3, // Latch Peripheral Reset Enable bit + SRSC1E = 1<<4, // Latch C1 Set Enable bit + SRSC2E = 1<<5, // Latch C2 Set Enable bit + SRSCKE = 1<<6, // Latch Set Clock Enable bit + SRSPE = 1<<7 // Latch Peripheral Set Enable bit + }; + + SRCON1(Processor *pCpu, const char *pName, const char *pDesc, SR_MODULE *m_sr_module); + void put(uint new_value); + void set_ValidBits(uint validbits) { mValidBits = validbits;} + + private: + SR_MODULE *m_sr_module; + uint mValidBits; +}; + +class SRinSink; + +class SR_MODULE: public TriggerObject +{ + + public: + + explicit SR_MODULE(Processor *); + ~SR_MODULE(); + + void update(); + SRCON0 srcon0; + SRCON1 srcon1; + + void pulse_reset() { state_reset = true;} + void pulse_set() { state_set = true;} + void clock_diff(uint); + void clock_enable(); + void clock_disable(); + void syncC1out(bool val); + void syncC2out(bool val); + void setPins(PinModule *, PinModule *,PinModule *); + void setState(char); + void Qoutput(); + void NQoutput(); + void releasePin(int); + + protected: + + void callback(); + + Processor *cpu; + uint64_t future_cycle; + bool state_set; + bool state_reset; + bool state_Q; + uint srclk; + bool syncc1out; // Synced output from comparator 1 + bool syncc2out; // Synced output from comparator 2 + PinModule *SRI_pin; + PinModule *SRQ_pin; + PinModule *SRNQ_pin; + bool SRI; // state of input pin + SRinSink *m_SRinSink; + PeripheralSignalSource *m_SRQsource; + PeripheralSignalSource *m_SRNQsource; + bool m_SRQsource_active; + bool m_SRNQsource_active; +}; + +class LVDCON_14 : public sfr_register, public TriggerObject +{ + public: + uint valid_bits; + + enum { + LVDL0 = 1<<0, + LVDL1 = 1<<1, + LVDL2 = 1<<2, + LVDEN = 1<<4, + IRVST = 1<<5, + }; + + LVDCON_14(Processor *, const char *pName, const char *pDesc=0); + void check_lvd(); + uint write_mask; + InterruptSource *IntSrc; + void callback(); + void put(uint new_value); + virtual void setIntSrc(InterruptSource *_IntSrc) { IntSrc = _IntSrc;} +}; +#endif diff --git a/src/gpsim/registers/16bit-registers.cc b/src/gpsim/registers/16bit-registers.cc new file mode 100644 index 0000000..ddbab4b --- /dev/null +++ b/src/gpsim/registers/16bit-registers.cc @@ -0,0 +1,1355 @@ +/* + Copyright (C) 1998 Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include +#include +#include + +#include "config.h" +#include "16bit-registers.h" +#include "16bit-processors.h" +//#include "interface.h" +#include "stimuli.h" + +#include "clock_phase.h" + +//-------------------------------------------------- +// member functions for the FSR class +//-------------------------------------------------- +// +FSRL::FSRL(Processor *pCpu, const char *pName, const char *pDesc, Indirect_Addressing *pIAM) + : sfr_register(pCpu,pName,pDesc), + iam(pIAM) +{ +} + +void FSRL::put(uint new_value) +{ + value.put(new_value & 0xff); + + iam->update_fsr_value(); +} + +void FSRL::put_value(uint new_value) +{ + put(new_value); + + update(); + cpu16->indf->update(); +} + +FSRH::FSRH(Processor *pCpu, const char *pName, const char *pDesc, Indirect_Addressing *pIAM) + : sfr_register(pCpu,pName,pDesc), + iam(pIAM) +{ +} + +void FSRH::put(uint new_value) +{ + value.put(new_value & 0x0f); + + iam->update_fsr_value(); +} + +void FSRH::put_value(uint new_value) +{ + + put(new_value); + + update(); + cpu16->indf->update(); +} + +INDF16::INDF16(Processor *pCpu, const char *pName, const char *pDesc, Indirect_Addressing *pIAM) + : sfr_register(pCpu,pName,pDesc), + iam(pIAM) +{ +} + +void INDF16::put(uint new_value) +{ + iam->fsr_value += iam->fsr_delta; + iam->fsr_delta = 0; + iam->put(new_value); +} + +void INDF16::put_value(uint new_value) +{ + put(new_value); + update(); +} + +uint INDF16::get() +{ + iam->fsr_value += iam->fsr_delta; + iam->fsr_delta = 0; + + return(iam->get()); +} + +uint INDF16::get_value() +{ + return(iam->get_value()); +} + +//------------------------------------------------ +// PREINC +PREINC::PREINC(Processor *pCpu, const char *pName, const char *pDesc, Indirect_Addressing *pIAM) + : sfr_register(pCpu,pName,pDesc), + iam(pIAM) +{ +} + +uint PREINC::get() +{ + iam->preinc_fsr_value(); + + return(iam->get()); +} + +uint PREINC::get_value() +{ + return(iam->get_value()); +} + +void PREINC::put(uint new_value) +{ + iam->preinc_fsr_value(); + iam->put(new_value); +} + +void PREINC::put_value(uint new_value) +{ + put(new_value); + update(); +} + +//------------------------------------------------ +// POSTINC +POSTINC::POSTINC(Processor *pCpu, const char *pName, const char *pDesc, Indirect_Addressing *pIAM) + : sfr_register(pCpu,pName,pDesc), + iam(pIAM) +{ +} + +uint POSTINC::get() +{ + iam->postinc_fsr_value(); + return(iam->get()); +} + +uint POSTINC::get_value() +{ + return(iam->get_value()); +} + +void POSTINC::put(uint new_value) +{ + iam->postinc_fsr_value(); + iam->put(new_value); +} + +void POSTINC::put_value(uint new_value) +{ + put(new_value); + update(); +} + + +//------------------------------------------------ +// POSTDEC +POSTDEC::POSTDEC(Processor *pCpu, const char *pName, const char *pDesc, Indirect_Addressing *pIAM) + : sfr_register(pCpu,pName,pDesc), + iam(pIAM) +{ +} +uint POSTDEC::get() +{ + iam->postdec_fsr_value(); + return(iam->get()); +} + +uint POSTDEC::get_value() +{ + return(iam->get_value()); +} + +void POSTDEC::put(uint new_value) +{ + iam->postdec_fsr_value(); + iam->put(new_value); +} + +void POSTDEC::put_value(uint new_value) +{ + put(new_value); + update(); +} + + +//------------------------------------------------ +// PLUSW +PLUSW::PLUSW(Processor *pCpu, const char *pName, const char *pDesc, Indirect_Addressing *pIAM) + : sfr_register(pCpu,pName,pDesc), + iam(pIAM) +{ +} + +uint PLUSW::get() +{ + int destination = iam->plusw_fsr_value(); + if(destination >= 0) + return (cpu_pic->registers[destination]->get()); + else + return 0; +} + +uint PLUSW::get_value() +{ + int destination = iam->plusw_fsr_value(); + if(destination >= 0) + return (cpu_pic->registers[destination]->get_value()); + else + return 0; +} + +void PLUSW::put(uint new_value) +{ + int destination = iam->plusw_fsr_value(); + if(destination >= 0) + cpu_pic->registers[destination]->put(new_value); +} + +void PLUSW::put_value(uint new_value) +{ + int destination = iam->plusw_fsr_value(); + if(destination >= 0) + cpu_pic->registers[destination]->put_value(new_value); + + update(); + if(destination >= 0) + cpu_pic->registers[destination]->update(); +} + +//------------------------------------------------ + +Indirect_Addressing::Indirect_Addressing(pic_processor *pCpu, const string &n) + : fsrl(pCpu, (string("fsrl")+n).c_str(), "FSR Low", this), + fsrh(pCpu, (string("fsrh")+n).c_str(), "FSR High", this), + indf(pCpu, (string("indf")+n).c_str(), "Indirect Register", this), + preinc(pCpu, (string("preinc")+n).c_str(), "Pre Increment Indirect", this), + postinc(pCpu, (string("postinc")+n).c_str(), "Post Increment Indirect", this), + postdec(pCpu, (string("postdec")+n).c_str(), "Post Decrement Indirect", this), + plusw(pCpu, (string("plusw")+n).c_str(), "Literal Offset Indirect", this) +{ + /* + fsrl.iam = this; + fsrh.iam = this; + indf.iam = this; + preinc.iam = this; + postinc.iam = this; + postdec.iam = this; + plusw.iam = this; + */ + current_cycle = (uint64_t)(-1); // Not zero! See bug #3311944 + fsr_value = 0; + fsr_state = 0; + fsr_delta = 0; + cpu = pCpu; + +} + +/* + * put - Each of the indirect registers associated with this + * indirect addressing class will call this routine to indirectly + * write data. + */ +void Indirect_Addressing::put(uint new_value) +{ + /* uint midbits; + + if( ((fsr_value & 0xfc7) == 0xfc3) || ((fsr_value & 0xfc4) == 0xfc4)) + { + midbits = (fsr_value >> 3) & 0x7; + if(midbits >= 3 && midbits <= 5) + return; + } + */ + if(is_indirect_register(fsr_value)) + return; + + cpu_pic->registers[get_fsr_value()]->put(new_value); + +} + +/* + * get - Each of the indirect registers associated with this + * indirect addressing class will call this routine to indirectly + * retrieve data. + */ +uint Indirect_Addressing::get() +{ + // uint midbits; + + // See the comment in Indirect_Addressing::put about fsr address checking + if(is_indirect_register(fsr_value)) + return 0; + else + /* + if( ((fsr_value & 0xfc7) == 0xfc3) || ((fsr_value & 0xfc4) == 0xfc4)) + { + midbits = (fsr_value >> 3) & 0x7; + if(midbits >= 3 && midbits <= 5) + return 0; + } + */ + + return cpu_pic->registers[get_fsr_value()]->get(); + +} + +/* + * get - Each of the indirect registers associated with this + * indirect addressing class will call this routine to indirectly + * retrieve data. + */ +uint Indirect_Addressing::get_value() +{ + /* + uint midbits; + + See the comment in Indirect_Addressing::put about fsr address checking + + if( ((fsr_value & 0xfc7) == 0xfc3) || ((fsr_value & 0xfc4) == 0xfc4)) + { + midbits = (fsr_value >> 3) & 0x7; + if(midbits >= 3 && midbits <= 5) + return 0; + } + */ + if(is_indirect_register(fsr_value)) + return 0; + else + return cpu_pic->registers[get_fsr_value()]->get_value(); + +} + +void Indirect_Addressing::put_fsr(uint new_fsr) +{ + + fsrl.put(new_fsr & 0xff); + fsrh.put((new_fsr>>8) & 0x0f); + +} + + +/* + * update_fsr_value - This routine is called by the FSRL and FSRH + * classes. It's purpose is to update the 16-bit (actually 12-bit) + * address formed by the concatenation of FSRL and FSRH. + * + */ + +void Indirect_Addressing::update_fsr_value() +{ + + if(current_cycle != get_cycles().get()) + { + fsr_value = (fsrh.value.get() << 8) | fsrl.value.get(); + fsr_delta = 0; + } +} + +/* + * preinc_fsr_value - This member function pre-increments the current + * fsr_value. If the preinc access is a read-modify-write instruction + * (e.g. bcf preinc0,1 ) then the increment operation should occur + * only once. + */ + +void Indirect_Addressing::preinc_fsr_value() +{ + + if(current_cycle != get_cycles().get()) + { + fsr_value += (fsr_delta+1); + fsr_delta = 0; + current_cycle = get_cycles().get(); + put_fsr(fsr_value); + } + +} + +void Indirect_Addressing::postinc_fsr_value() +{ + + if(current_cycle != get_cycles().get()) + { + fsr_value += fsr_delta; + fsr_delta = 1; + current_cycle = get_cycles().get(); + put_fsr(fsr_value+1); + + } +} + +void Indirect_Addressing::postdec_fsr_value() +{ + + if(current_cycle != get_cycles().get()) + { + fsr_value += fsr_delta; + fsr_delta = -1; + current_cycle = get_cycles().get(); + put_fsr(fsr_value-1); + + } + +} + +int Indirect_Addressing::plusw_fsr_value() +{ + + fsr_value += fsr_delta; + fsr_delta = 0; + int signExtendedW = cpu_pic->Wreg->value.get() | ((cpu_pic->Wreg->value.get() > 127) ? 0xf00 : 0); + uint destination = (fsr_value + signExtendedW) & _16BIT_REGISTER_MASK; + if(is_indirect_register(destination)) + return -1; + else + return destination; + +} + +int Indirect_Addressing::plusk_fsr_value(int k) +{ + + fsr_value += fsr_delta; + fsr_delta = 0; + uint destination = (fsr_value + k) & _16BIT_REGISTER_MASK; + if(is_indirect_register(destination)) + return -1; + else + return destination; + +} + +//------------------------------------------------ +void Fast_Stack::init(_16bit_processor *new_cpu) +{ + cpu = new_cpu; +} + +void Fast_Stack::push() +{ + w = cpu->Wreg->value.get(); + status = cpu->status->value.get(); + bsr = cpu->bsr.value.get(); + +} + +void Fast_Stack::pop() +{ + //cout << "popping fast stack\n"; + cpu->Wreg->put(w); + cpu->status->put(status); + cpu->bsr.put(bsr); + +} +//-------------------------------------------------- +// member functions for the PCL base class +//-------------------------------------------------- +PCL16::PCL16(Processor *pCpu, const char *pName, const char *pDesc) + : PCL(pCpu,pName,pDesc) +{ +} + + +/* + These get functions return the next PCL value rather than + the current value. + + The get() will update the PCLATH and PCLATU registers +*/ +uint PCL16::get() +{ + cpu_pic->pclath->value.put((cpu_pic->pc->get_value() >> 8) & 0xff); + cpu16->pclatu.value.put((cpu_pic->pc->get_value() >> 16) & 0xff); + value.put(cpu_pic->pc->get_value() & 0xff); + return((value.get()+2) & 0xff); +} + +uint PCL16::get_value() +{ + value.put(cpu_pic->pc->get_value() & 0xff); + return((value.get()+2) & 0xff); + +} + + +//-------------------------------------------------- +// Program_Counter16 +// The Program_Counter16 is almost identical to Program_Counter. +// The major difference is that the PC counts by 2 in the 16bit core. +Program_Counter16::Program_Counter16(Processor *pCpu) + : Program_Counter("pc","Program Counter", pCpu) +{ +} + +//-------------------------------------------------- +// computed_goto - update the program counter. Anytime the pcl register is written to +// by the source code we'll pass through here. +// +void Program_Counter16::computed_goto(uint new_address) +{ + // Use the new_address and the cached pclath + // to generate the destination address: + value = ( (new_address | cpu_pic->get_pclath_branching_modpcl() )>>1); + + if (value >= memory_size) value -= memory_size; + + update_pcl(); + + // The instruction modifying the PCL will also increment the program counter. + // So, pre-compensate the increment with a decrement: + value--; + + // The computed goto is a 2-cycle operation. The first cycle occurs within + // the instruction (i.e. via the ::increment() method). The second cycle occurs + // here: + cpu_pic->mExecute2ndHalf->advance(); +} + +//-------------------------------------------------- +// put_value - Change the program counter without affecting the cycle counter +// (This is what's called if the user changes the pc.) + +void Program_Counter16::put_value(uint new_value) +{ + // RP - The new_value passed in is a byte address, but the Program_Counter16 + // class's internal value is a word address + value = new_value >> 1; + if (value >= memory_size) value -= memory_size; + + cpu_pic->pcl->value.put(new_value & 0xfe); + +// RP - removed these lines as setting the actual PC should not affect the latches +// cpu_pic->pclath->value.put((new_value >> 8) & 0xff); +// cpu16->pclatu.value.put((new_value >> 16) & 0xff); + cpu_pic->pcl->update(); + cpu_pic->pclath->update(); + update(); +} + +uint Program_Counter16::get_value() +{ + return value << 1; +} + +//-------------------------------------------------- +// update_pcl - Updates the PCL from within the Program_Counter class. +// + +void Program_Counter16::update_pcl() +{ + // For 16 bit devices the PCL will be Program_Counter*2 + cpu_pic->pcl->value.put((value<<1) & 0xff); +} + +//------------------------------------------------ +// TOSU +TOSU::TOSU(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc) +{} +uint TOSU::get() +{ + value.put((stack->get_tos() >> 16) & 0x1f); + + return(value.get()); +} + +uint TOSU::get_value() +{ + + value.put((stack->get_tos() >> 16) & 0x1f); + return(value.get()); + +} + +void TOSU::put(uint new_value) +{ + stack->put_tos( (stack->get_tos() & 0xffe0ffff) | ( (new_value & 0x1f) << 16)); +} + +void TOSU::put_value(uint new_value) +{ + stack->put_tos( (stack->get_tos() & 0xffe0ffff) | ( (new_value & 0x1f) << 16)); + update(); +} + + +//------------------------------------------------ +// STKPTR +STKPTR16::STKPTR16(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc) +{} +void STKPTR16::put_value(uint new_value) +{ + stack->pointer = new_value & stack->stack_mask; + value.put(new_value); + update(); +} + +void STKPTR16::put(uint new_value) +{ + put_value(new_value); +} + +//-------------------------------------------------- +// +Stack16::Stack16(Processor *pCpu) : Stack(pCpu), + stkptr(pCpu, "stkptr", "Stack pointer"), + tosl(pCpu, "tosl", "Top of Stack low byte"), + tosh(pCpu, "tosh", "Top of Stack high byte"), + tosu(pCpu, "tosu", "Top of Stack upper byte") +{ + stkptr.stack = this; + tosl.stack = this; + tosh.stack = this; + tosu.stack = this; + +} + +Stack16::~Stack16() +{ + + pic_processor *pCpu = dynamic_cast(cpu); + if (pCpu) + { + pCpu->remove_sfr_register(&stkptr); + pCpu->remove_sfr_register(&tosl); + pCpu->remove_sfr_register(&tosh); + pCpu->remove_sfr_register(&tosu); + } +} + + +// pop of empty stack sets undeflow and returns 0 +uint Stack16::pop() +{ + if(pointer <= 0) + { + pointer = 0; + stack_underflow(); + return(0); + } + --pointer; + uint stkptr_status = stkptr.value.get() & ~stack_mask; + stkptr.value.put((pointer & stack_mask) | stkptr_status); + return(contents[pointer & stack_mask] >> 1); +} +// When stack is full last(top) entry is overwritten +bool Stack16::push(uint address) +{ + contents[pointer & stack_mask] = address << 1; + if(pointer >= (int)stack_mask) + { + pointer = stack_mask; + return stack_overflow(); + } + pointer++; + stkptr.value.put((pointer & stack_mask) | (stkptr.value.get() & ~stack_mask)); + return true; +} + +void Stack16::reset(RESET_TYPE r) +{ + uint reg_value; + + if (r != POR_RESET && r != BOD_RESET) + reg_value = stkptr.value.get() & ~stack_mask; + else + reg_value = 0; + pointer = 0; + stkptr.value.put( reg_value); +} +bool Stack16::stack_underflow() +{ + stkptr.value.put(STKPTR::STKUNF); // don't decrement past 0, signalize STKUNF + if(STVREN) + { + cpu->reset(STKUNF_RESET); + return false; + } + cout <<"Stack undeflow\n"; + return true; +} +bool Stack16::stack_overflow() +{ + stkptr.value.put( STKPTR::STKOVF | (pointer & stack_mask)); + if(STVREN) + { + cpu->reset(STKOVF_RESET); + return false; + } + cout << "Stack overflow\n"; + return true; +} + +//-------------------------------------------------- +// member functions for the RCON base class +//-------------------------------------------------- +RCON::RCON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc) +{ +} +//-------------------------------------------------- +// member functions for the CPUSTA base class +//-------------------------------------------------- +CPUSTA::CPUSTA(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc) +{ +} +//-------------------------------------------------- +// member functions for the T0CON base class +//-------------------------------------------------- +T0CON::T0CON(Processor *pCpu, const char *pName, const char *pDesc) + : OPTION_REG(pCpu,pName,pDesc) +{ + por_value = RegisterValue(0xff,0); + wdtr_value = RegisterValue(0xff,0); +} + +void T0CON::put(uint new_value) +{ + uint old_value = value.get(); + + value.put(new_value); + + if (new_value == old_value) return; + + // new_prescale causes issues in 16 bit mode, so save current tmr0l and + // tmr0h values , call new_prescale (if required), and then restart timer + // using saved values + // + uint initialTmr0value = (cpu16->tmr0l.value.get() & 0xff) | + (( (value.get() & T08BIT)) ? 0: ((cpu16->tmr0h.value.get() & 0xff)<<8)); + + + cpu16->option_new_bits_6_7(value.get() & (BIT6 | BIT7)); + + // %%%FIX ME%%% - can changing the state of TOSE cause the timer to + // increment if tmr0 is being clocked by an external clock? + // + if( (value.get() ^ old_value) & (T0CS | T0SE | PSA | PS2 | PS1 | PS0)) + cpu16->tmr0l.new_prescale(); + + if(value.get() & TMR0ON) { + cpu16->tmr0l.start(initialTmr0value); + } else + cpu16->tmr0l.stop(); +} + +//-------------------------------------------------- +void T0CON::initialize() +{ +// cpu16->tmr0l.new_prescale(); + cpu16->wdt.set_postscale( (value.get() & PSA) ? (value.get() & ( PS2 | PS1 | PS0 )) : 0); + cpu16->option_new_bits_6_7(value.get() & (T0CS | BIT6 | BIT7)); + +} + +//-------------------------------------------------- + +TMR0H::TMR0H(Processor *pCpu, const char *pName, const char *pDesc) + :sfr_register(pCpu,pName,pDesc) +{ +} + +//-------------------------------------------------- +void TMR0H::put(uint new_value) +{ + value.put(new_value & 0xff); +} + +//-------------------------------------------------- +void TMR0H::put_value(uint new_value) +{ + value.put(new_value & 0xff); +} + +uint TMR0H::get() +{ + return(value.get()); +} + +uint TMR0H::get_value() +{ + return(value.get()); +} + +//-------------------------------------------------- +// TMR0_16 member functions +// +TMR0_16::TMR0_16(Processor *pCpu, const char *pName, const char *pDesc) + : TMR0(pCpu,pName,pDesc), + t0con(0), intcon(0), tmr0h(0), value16(0) +{ +} +//-------------------------------------------------- +// TMR0_16::get_prescale +// +// If the prescaler is assigned to the WDT (and not TMR0) +// then return 0 +// other wise +// then return the Prescale select bits (plus 1) +// +uint TMR0_16::get_prescale() +{ + if(t0con->value.get() & 0x8) + return 0; + else + return ((t0con->value.get() & 7) + 1); + +} + +void TMR0_16::set_t0if() +{ + intcon->set_t0if(); + if (m_t1gcon) + { + m_t1gcon->T0_gate(true); + // Spec sheet does not indicate when the overflow signal + // is cleared, so I am assuming it is just a pulse. RRR + m_t1gcon->T0_gate(false); + } +} + +bool TMR0_16::get_t0cs() +{ + return (t0con->value.get() & 0x20) != 0; +} + +void TMR0_16::initialize() +{ + t0con = &cpu16->t0con; + intcon = &cpu16->intcon; + tmr0h = &cpu16->tmr0h; +} + +uint TMR0_16::max_counts() +{ + + if(t0con->value.get() & T0CON::T08BIT) + return 0x100; + else + return 0x10000; + +} +void TMR0_16::start(int restart_value, int sync) +{ + m_pOptionReg = t0con; + TMR0::start(restart_value, sync); +} + +void TMR0_16::put_value(uint new_value) +{ + value.put(new_value & 0xff); + value16 = (new_value & 0xff) | (tmr0h ? (tmr0h->get_value()<<8) : 0); + + if(t0con->value.get() & T0CON::TMR0ON) { + if(t0con->value.get() & T0CON::T08BIT) + TMR0::put_value(new_value); + else + start(value16); + } else { + // TMR0 is not enabled + } +} + + +// %%%FIX ME%%% +void TMR0_16::increment() +{ + if(--prescale_counter == 0) + { + prescale_counter = prescale; + + if(t0con->value.get() & T0CON::T08BIT) + { + if(value.get() == 255) + { + value.put(0); + set_t0if(); + } + else + value.put(value.get()+1); + } + else + { + if(value.get() == 255) + { + value.put(0); + if(tmr0h->value.get() == 255) + { + tmr0h->put(0); + set_t0if(); + } + else + tmr0h->value.put(tmr0h->value.get()+1); + + } + else + { + value.put(value.get()+1); + } + } + + } + // cout << value << '\n'; +} + + +uint TMR0_16::get_value() +{ + if(t0con->value.get() & T0CON::TMR0ON) { + + // If TMR0L:H is configured as an 8-bit timer, then treat as an 8-bit timer + if(t0con->value.get() & T0CON::T08BIT) { + if (tmr0h) + tmr0h->put_value( (value16>>8)&0xff); + + return(TMR0::get_value()); + + } + value16 = (int) ((get_cycles().get() - last_cycle)/ prescale); + + value.put(value16 & 0xff); + } + return(value.get()); + +} + +uint TMR0_16::get() +{ + get_value(); + + if(t0con->value.get() & T0CON::T08BIT) + return value.get(); + + // reading the low byte of tmr0 latches in the high byte. + tmr0h->put_value((value16 >> 8)&0xff); + return value.get(); +} + +void TMR0_16::callback() +{ + + //cout<<"_TMR0 rollover: " << hex << cycles.value << '\n'; + if((t0con->value.get() & T0CON::TMR0ON) == 0) { + cout << " tmr0 isn't turned on\n"; + return; + } + + TMR0::callback(); // Let the parent class handle the lower eight bits + + //Now handle the upper 8 bits: + + if(future_cycle && + !(t0con->value.get() & T0CON::T08BIT)) + { + // 16-bit mode + tmr0h->put_value(0); + } + + +} + +void TMR0_16::callback_print() +{ + cout << "TMR0_16 " << name() << " CallBack ID " << CallBackID << '\n'; +} + +void TMR0_16::sleep() +{ + if((state & RUNNING)) + { + TMR0::stop(); + state = SLEEPING; + } +} + +void TMR0_16::wake() +{ + if ((state & SLEEPING)) + { + if (! (state & RUNNING)) + { + state = STOPPED; + start(value.get(), 0); + } + else state &= ~SLEEPING; + } +} + +//-------------------------------------------------- +// T3CON +T3CON::T3CON(Processor *pCpu, const char *pName, const char *pDesc) + : T1CON(pCpu,pName,pDesc), + ccpr1l(0),ccpr2l(0),tmr1l(0), t1con(0) +{} + +void T3CON::put(uint new_value) +{ + int diff = (value.get() ^ new_value); + + if(diff & (T3CCP1 | T3CCP2)) { + switch(new_value & (T3CCP1 | T3CCP2)) { + case 0: + ccpr1l->assign_tmr(tmr1l); // Both CCP modules use TMR1 as their source + ccpr2l->assign_tmr(tmr1l); + break; + case T3CCP1: + ccpr1l->assign_tmr(tmr1l); // CCP1 uses TMR1 + ccpr2l->assign_tmr(tmrl); // CCP2 uses TMR3 + break; + default: + ccpr1l->assign_tmr(tmrl); // Both CCP modules use TMR3 as their source + ccpr2l->assign_tmr(tmrl); + } + } + + // Let the T1CON class deal with everything else. + T1CON::put(new_value & ~(T3CCP1 | T3CCP2)); + +} + +//-------------------------------------------------- +// TMR3_MODULE +// +// + +TMR3_MODULE::TMR3_MODULE() +{ + + t3con = 0; + pir_set = 0; + +} + +void TMR3_MODULE::initialize(T3CON *t3con_, PIR_SET *pir_set_) +{ + + t3con = t3con_; + pir_set = pir_set_; + +} + + +//------------------------------------------------------------------- +// +// Table Reads and Writes +// +// The 18cxxx family provides a peripheral that will allow the program +// memory to read and write to itself. +// +//------------------------------------------------------------------- + +TBL_MODULE::TBL_MODULE(_16bit_processor *pCpu) + : EEPROM_EXTND(pCpu, 0), cpu(pCpu), + tablat(pCpu,"tablat"), + tblptrl(pCpu,"tblptrl"), + tblptrh(pCpu,"tblptrh"), + tblptru(pCpu,"tblptru") +{ +} + +//void TBL_MODULE::initialize(_16bit_processor *new_cpu) +//{ +// cpu = new_cpu; +//} + +//------------------------------------------------------------------- +// void TBL_MODULE::increment() +// +// This function increments the 24-bit ptr that is formed by the +// concatenation of tabptrl,tabptrh, and tabptru. It is called by +// the TBLRD and TBLWT pic instructions when the auto-increment +// operand is specified (e.g. TBLWT *+ ) +// +// +// Inputs: none +// Outputs: none +// +//------------------------------------------------------------------- +void TBL_MODULE::increment() +{ + + if(tblptrl.value.get() >= 0xff) { + tblptrl.put(0); + if(tblptrh.value.get() >= 0xff) { + tblptrh.put(0); + tblptru.put(tblptru.value.get() + 1); + } else { + tblptrh.put(tblptrh.value.get() + 1); + } + } + else + tblptrl.put(tblptrl.value.get() + 1); + + +} +//------------------------------------------------------------------- +//------------------------------------------------------------------- +void TBL_MODULE::decrement() +{ + + if(tblptrl.value.get() == 0) { + tblptrl.put(0xff); + if(tblptrh.value.get() == 0) { + tblptrh.put(0xff); + tblptru.put(tblptru.value.get() - 1); + } else { + tblptrh.put(tblptrh.value.get() - 1); + } + } + else + tblptrl.put(tblptrl.value.get() - 1); + +} +//------------------------------------------------------------------- +//------------------------------------------------------------------- +void TBL_MODULE::read() +{ + uint tblptr,opcode; + + // tblptr is 12 bit address pointer + tblptr = + ( (tblptru.value.get() & 0xff) << 16 ) | + ( (tblptrh.value.get() & 0xff) << 8 ) | + ( (tblptrl.value.get() & 0xff) << 0 ); + + // read 16 bits of program memory from even address + opcode = cpu_pic->pma->get_rom(tblptr & 0xfffffe); + + // return high or low byte depending on lsb of address + if(tblptr & 1) + { + tablat.put((opcode >> 8) & 0xff); + internal_latch = (internal_latch & 0x00ff) | (opcode & 0xff00); + } + else + { + tablat.put((opcode >> 0) & 0xff); + internal_latch = (internal_latch & 0xff00) | (opcode & 0x00ff); + } + +} +//------------------------------------------------------------------- +//------------------------------------------------------------------- +void TBL_MODULE::write() +{ + + uint tblptr; + uint latch_index; + uint *pt; + + tblptr = + ( (tblptru.value.get() & 0xff) << 16 ) | + ( (tblptrh.value.get() & 0xff) << 8 ) | + ( (tblptrl.value.get() & 0xff) << 0 ); + + latch_index = (tblptr >> 1) % num_write_latches; + pt = &write_latches[latch_index]; + + if(tblptr & 1) + { + *pt = (*pt & 0x00ff) | ((tablat.value.get()<<8) & 0xff00); + } + else + { + *pt = (*pt & 0xff00) | (tablat.value.get() & 0x00ff); + } +} + +void TBL_MODULE::start_write() +{ + eecon1.value.put( eecon1.value.get() | eecon1.WRERR); + + if (eecon1.value.get() & (EECON1::EEPGD|EECON1::CFGS)) + { + int index; + wr_adr = + ( (tblptru.value.get() & 0xff) << 16 ) | + ( (tblptrh.value.get() & 0xff) << 8 ) | + ( (tblptrl.value.get() & 0xff) << 0 ); + wr_adr = cpu->map_pm_address2index(wr_adr); + index = wr_adr % num_write_latches; + wr_data = write_latches[index]; + + eecon2.start_write(); + + // stop execution fo 2 ms + get_cycles().set_break(get_cycles().get() + (uint64_t)(.002*get_cycles().instruction_cps()), this); + bp.set_pm_write(); + cpu_pic->pm_write(); + } + else + { + get_cycles().set_break(get_cycles().get() + EPROM_WRITE_TIME, this); + wr_adr = eeadr.value.get() + (eeadrh.value.get() << 8); + wr_data = eedata.value.get() + (eedatah.value.get() << 8); + eecon2.start_write(); + } +} +//------------------------------------------------------------------- +//------------------------------------------------------------------- +LVDCON::LVDCON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName,pDesc), + valid_bits(0x3f) +{ +} + + +/******************************************************************* + HLVDCON - High/Low-Voltage Detect Module +*/ + +HLVD_stimulus::HLVD_stimulus(HLVDCON *_hlvd, const char *cPname): + stimulus(cPname, 2.5, 1e12), hlvd(_hlvd) +{ +} +HLVD_stimulus::~HLVD_stimulus() +{ +} +void HLVD_stimulus::set_nodeVoltage(double v) +{ + nodeVoltage = v; + hlvd->check_hlvd(); +} + +HLVDCON::HLVDCON(Processor *pCpu, const char *pName, const char *pDesc) : + sfr_register(pCpu, pName, pDesc), hlvdin(0), hlvdin_stimulus(0), + stimulus_active(false),write_mask(0x9f), IntSrc(0) + {} +HLVDCON::~HLVDCON() +{ + if (IntSrc) + delete IntSrc; + if (stimulus_active) + { + hlvdin->getPin().snode->detach_stimulus(hlvdin_stimulus); + stimulus_active = false; + } + if (hlvdin_stimulus) + delete hlvdin_stimulus; +} + +void HLVDCON::put(uint new_value) +{ + double tivrst = 20e-6; // typical time for IVR stable + uint diff = value.get() ^ new_value; + + if (!diff) return; + + if (diff & HLVDEN) + { + if (new_value & HLVDEN) // Turning on + { + // wait tivrst before doing anything + value.put(new_value & write_mask); + get_cycles().set_break( + get_cycles().get() + tivrst * get_cycles().instruction_cps(), + this); + return; + } + else // Turning off + { + value.put(new_value & write_mask); + if (stimulus_active) + { + hlvdin->getPin().snode->detach_stimulus(hlvdin_stimulus); + stimulus_active = false; + } + return; + } + } + value.put((new_value & write_mask) | (value.get() & ~write_mask)); + if (!(value.get() & IRVST)) // Just return if voltage not stable + return; + check_hlvd(); + +} +void HLVDCON::callback() +{ + uint reg = value.get(); + + reg |= (BGVST | IRVST); + value.put(reg); + check_hlvd(); +} + +double hldv_volts[] = { 1.84, 2.07, 2.28, 2.44, 2.54, 2.74, 2.87, 3.01, + 3.30, 3.48, 3.69, 3.91, 4.15, 4.41, 4.74}; +void HLVDCON::check_hlvd() +{ + uint reg = value.get(); + + assert(IntSrc); + assert(hlvdin); + if (!(reg & IRVST)) + return; + if ((reg & HLVDL_MASK) == HLVDL_MASK) // using HLVDIN pin + { + if (!hlvdin_stimulus) + hlvdin_stimulus = new HLVD_stimulus(this, "hlvd_stim"); + + if (!stimulus_active && hlvdin->getPin().snode) + { + hlvdin->getPin().snode->attach_stimulus(hlvdin_stimulus); + stimulus_active = true; + hlvdin->getPin().snode->update(); + } + double voltage = hlvdin->getPin().get_nodeVoltage(); + // High voltage trip ? + if ((reg & VDIRMAG) && (voltage >= 1.024)) + { + IntSrc->Trigger(); + } + + // Low voltage trip ? + else if (!(reg & VDIRMAG) && (voltage <= 1.024)) + IntSrc->Trigger(); + } + else // Voltage divider on Vdd + { + double voltage = hldv_volts[reg & HLVDL_MASK]; + Processor *Cpu = (Processor *)cpu; + if ((reg & VDIRMAG) && (Cpu->get_Vdd() >= voltage)) + IntSrc->Trigger(); + else if (!(reg & VDIRMAG) && (Cpu->get_Vdd() <= voltage)) + IntSrc->Trigger(); + } +} + + + + diff --git a/src/gpsim/registers/16bit-registers.h b/src/gpsim/registers/16bit-registers.h new file mode 100644 index 0000000..dd333e0 --- /dev/null +++ b/src/gpsim/registers/16bit-registers.h @@ -0,0 +1,595 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include +#include + + +class InvalidRegister; // Forward reference + + +#ifndef __16_BIT_REGISTERS_H__ +#define __16_BIT_REGISTERS_H__ + +#include "pic-processor.h" +#include "14bit-registers.h" +#include "14bit-tmrs.h" +#include "pir.h" +#include "uart.h" +#include "a2dconverter.h" +#include "ssp.h" +#include "rcon.h" +#include "eeprom.h" + +#define _16BIT_REGISTER_MASK 0xfff + +class _16bit_processor; + +class stimulus; // forward reference +class IOPIN; +class source_stimulus; +class Stimulus_Node; +class PORTB; + + + + +//--------------------------------------------------------- +// +// Indirect_Addressing +// +// This class coordinates the indirect addressing on the 18cxxx +// parts. Each of the registers comprising the indirect addressing +// subsystem: FSRnL,FSRnH, INDFn, POSTINCn, POSTDECn, PREINCn, and +// PLUSWn are each individually defined as sfr_registers AND included +// in the Indirect_Addressing class. So accessing these registers +// is the same as accessing any register: through the core cpu's +// register memory. The only difference for these registers is that +// the + +class Indirect_Addressing; // Forward reference + +//--------------------------------------------------------- +// FSR registers + +class FSRL : public sfr_register +{ +public: + FSRL(Processor *, const char *pName, const char *pDesc, Indirect_Addressing *pIAM); + void put(uint new_value); + void put_value(uint new_value); + +protected: + Indirect_Addressing *iam; +}; + +class FSRH : public sfr_register +{ + public: + FSRH(Processor *, const char *pName, const char *pDesc, Indirect_Addressing *pIAM); + + void put(uint new_value); + void put_value(uint new_value); + +protected: + Indirect_Addressing *iam; +}; + +class INDF16 : public sfr_register +{ + public: + INDF16(Processor *, const char *pName, const char *pDesc, Indirect_Addressing *pIAM); + + void put(uint new_value); + void put_value(uint new_value); + uint get(); + uint get_value(); + +protected: + Indirect_Addressing *iam; +}; + +class PREINC : public sfr_register +{ +public: + PREINC(Processor *, const char *pName, const char *pDesc, Indirect_Addressing *pIAM); + + void put(uint new_value); + void put_value(uint new_value); + uint get(); + uint get_value(); + +protected: + Indirect_Addressing *iam; +}; + +class POSTINC : public sfr_register +{ +public: + POSTINC(Processor *, const char *pName, const char *pDesc, Indirect_Addressing *pIAM); + + void put(uint new_value); + void put_value(uint new_value); + uint get(); + uint get_value(); + +protected: + Indirect_Addressing *iam; +}; + +class POSTDEC : public sfr_register +{ +public: + POSTDEC(Processor *, const char *pName, const char *pDesc, Indirect_Addressing *pIAM); + + void put(uint new_value); + void put_value(uint new_value); + uint get(); + uint get_value(); + +protected: + Indirect_Addressing *iam; +}; + +class PLUSW : public sfr_register +{ +public: + PLUSW(Processor *, const char *pName, const char *pDesc, Indirect_Addressing *pIAM); + + void put(uint new_value); + void put_value(uint new_value); + uint get(); + uint get_value(); + +protected: + Indirect_Addressing *iam; +}; + +class Indirect_Addressing +{ +public: + Indirect_Addressing(pic_processor *cpu, const string &n); + + pic_processor *cpu; +//RRR _16bit_processor *cpu; + + uint fsr_value; // 16bit concatenation of fsrl and fsrh + uint fsr_state; /* used in conjunction with the pre/post incr + * and decrement. This is mainly needed for + * those instructions that perform read-modify- + * write operations on the indirect registers + * eg. btg POSTINC1,4 . The post increment must + * occur after the bit is toggled and not during + * the read operation that's determining the + * current state. + */ + int fsr_delta; /* If there's a pending update to the fsr register + * pair, then the magnitude of that update is + * stored here. + */ + uint64_t current_cycle; /* Stores the cpu cycle when the fsr was last + * changed. + */ + FSRL fsrl; + FSRH fsrh; + INDF16 indf; + PREINC preinc; + POSTINC postinc; + POSTDEC postdec; + PLUSW plusw; + + //void init(_16bit_processor *new_cpu); + void put(uint new_value); + uint get(); + uint get_value(); + void put_fsr(uint new_fsr); + uint get_fsr_value(){return (fsr_value & 0xfff);}; + void update_fsr_value(); + void preinc_fsr_value(); + void postinc_fsr_value(); + void postdec_fsr_value(); + int plusw_fsr_value(); + int plusk_fsr_value(int k); + + /* bool is_indirect_register(uint reg_address) + * + * The purpose of this routine is to determine whether or not the + * 'reg_address' is the address of an indirect register. This is + * used by the 'put' and 'get' functions of the indirect registers. + * Indirect registers are forbidden access to other indirect registers. + * (Although double indirection in a single instruction cycle would + * be powerful!). + * + * The indirect registers reside at the following addresses + * 0xfeb - 0xfef, 0xfe3 - 0xfe7, 0xfdb- 0xfdf + * If you look at the binary representation of these ranges: + * 1111 1110 1011, 1111 1110 1100 - 1111 1110 1111 (0xfeb,0xfec - 0xfef) + * 1111 1110 0011, 1111 1110 0100 - 1111 1110 0111 (0xfe3,0xfe4 - 0xfe7) + * 1111 1101 1011, 1111 1101 1100 - 1111 1101 1111 (0xfdb,0xfdc - 0xfdf) + * ------------------------------------------------------------------------ + * 1111 11xx x011, 1111 11vv v1yy - 1111 11vv v1yy + * + * Then you'll notice that indirect register addresses share + * the common bit pattern 1111 11xx x011 for the left column. + * Furthermore, the middle 3-bits, xxx, can only be 3,4, 5. + * The ranges in the last two columns share the bit pattern + * 1111 11vv v1yy. The middle 3-bits, vvv, again can only be + * 3,4, or 5. The least two lsbs, yy, are don't cares. + */ + + inline bool is_indirect_register(uint reg_address) + { + if( ((reg_address & 0xfc7) == 0xfc3) || ((reg_address & 0xfc4) == 0xfc4)) + { + uint midbits = (reg_address >> 3) & 0x7; + if(midbits >= 3 && midbits <= 5) + return 1; + } + return 0; + } + + +}; + +//--------------------------------------------------------- +class Fast_Stack +{ + public: + + uint w,status,bsr; + _16bit_processor *cpu; + + void init(_16bit_processor *new_cpu); + void push(); + void pop(); + +}; + +//--------------------------------------------------------- +class PCL16 : public PCL +{ +public: + + virtual uint get(); + virtual uint get_value(); + + PCL16(Processor *, const char *pName, const char *pDesc=0); +}; + +//--------------------------------------------------------- +// Program Counter +// + +class Program_Counter16 : public Program_Counter +{ +public: + //virtual void increment(); + //virtual void skip(); + //virtual void jump(uint new_value); + //virtual void interrupt(uint new_value); + virtual void computed_goto(uint new_value); + //virtual void new_address(uint new_value); + virtual void put_value(uint new_value); + virtual void update_pcl(); + virtual uint get_value(); + //virtual uint get_next(); + + Program_Counter16(Processor *pCpu); +}; + + +//--------------------------------------------------------- +// Stack +// +class Stack16; + +class STKPTR16 : public sfr_register +{ +public: + + enum { + STKUNF = 1<<6, + STKOVF = 1<<7 + }; + STKPTR16(Processor *, const char *pName, const char *pDesc=0); + + Stack16 *stack; + void put_value(uint new_value); + void put(uint new_value); +}; + + +class TOSU : public sfr_register +{ +public: + TOSU(Processor *, const char *pName, const char *pDesc=0); + + Stack16 *stack; + + void put(uint new_value); + void put_value(uint new_value); + uint get(); + uint get_value(); + +}; + + +class Stack16 : public Stack +{ +public: + STKPTR16 stkptr; + TOSL tosl; + TOSH tosh; + TOSU tosu; + + Stack16(Processor *); + ~Stack16(); + virtual bool push(uint); + virtual uint pop(); + virtual void reset(RESET_TYPE); + virtual bool stack_overflow(); + virtual bool stack_underflow(); + +}; + + +class TMR0_16; + + +//--------------------------------------------------------- +class CPUSTA : public sfr_register +{ +public: + + enum + { + BOR = 1<<0, + POR = 1<<1, + PD = 1<<2, + TO = 1<<3, + GLINTD = 1<<4, + STKAV = 1<<5, + }; + CPUSTA(Processor *, const char *pName, const char *pDesc=0); +}; + + +//--------------------------------------------------------- +// T0CON - Timer 0 control register +class T0CON : public OPTION_REG +{ +public: + + enum { + T08BIT = 1<<6, + TMR0ON = 1<<7 + }; + + T0CON(Processor *, const char *pName, const char *pDesc=0); + void put(uint new_value); + void initialize(); +}; + +//--------------------------------------------------------- +// TMR0 - Timer for the 16bit core. +// +// The 18cxxx extends TMR0 to a 16-bit timer. However, it maintains +// an 8-bit mode that is compatible with the 8-bit TMR0's in the +// 14 and 12-bit cores. The 18cxxx TMR0 reuses this code by deriving +// from the TMR0 class and providing definitions for many of the +// virtual functions. + +class TMR0H : public sfr_register +{ +public: + + TMR0H(Processor *, const char *pName, const char *pDesc=0); + + void put(uint new_value); + void put_value(uint new_value); + uint get(); + uint get_value(); + +}; + +class TMR0_16 : public TMR0 +{ +public: + + TMR0_16(Processor *, const char *pName, const char *pDesc=0); + + T0CON *t0con; + INTCON *intcon; + TMR0H *tmr0h; + uint value16; + + virtual void callback(); + virtual void callback_print(); + + virtual void increment(); + virtual uint get(); + virtual uint get_value(); + virtual void put_value(uint new_value); + virtual uint get_prescale(); + virtual uint max_counts(); + virtual void set_t0if(); + virtual bool get_t0cs(); + virtual void initialize(); + virtual void start(int new_value,int sync=0); + virtual void sleep(); + virtual void wake(); +}; + + +//--------------------------------------------------------- +/* +class TMR3H : public TMRH +{ +public: + +}; + +class TMR3L : public TMRL +{ +public: + +}; +*/ +class T3CON : public T1CON { public: enum { T3CCP1 = 1<<3, T3CCP2 = 1<<6, + }; + + CCPRL *ccpr1l; + CCPRL *ccpr2l; + TMRL *tmr1l; + T1CON *t1con; + + T3CON(Processor *pCpu, const char *pName, const char *pDesc=0); + virtual void put(uint new_value); + virtual bool get_t1oscen() { + if (t1con) + return(t1con->get_t1oscen()); + return(0); + } + +}; + +//--------------------------------------------------------- +// +// TMR3_MODULE +// +// + +class TMR3_MODULE +{ +public: + + _16bit_processor *cpu; + char * name_str; + + T3CON *t3con; + PIR_SET *pir_set; + + TMR3_MODULE(); + void initialize(T3CON *t1con, PIR_SET *pir_set); + +}; + +//------------------------------------------------------------------- + +class TBL_MODULE : public EEPROM_EXTND +{ +public: + TBL_MODULE(_16bit_processor *pCpu); + + uint state; + uint internal_latch; + + _16bit_processor *cpu; + + sfr_register tablat, + tblptrl, + tblptrh, + tblptru; + + + void increment(); + void decrement(); + void read(); + void write(); + virtual void start_write(); + //void initialize(_16bit_processor *); +}; + + + + +////////////////////////////////////////// +////////////////////////////////////////// +// vapid Place holders +////////////////////////////////////////// +////////////////////////////////////////// + + +class LVDCON : public sfr_register +{ +public: + uint valid_bits; + + enum { + LVDL0 = 1<<0, + LVDL1 = 1<<1, + LVDL2 = 1<<2, + LVDL3 = 1<<3, + LVDEN = 1<<4, + IRVST = 1<<5, + }; + + LVDCON(Processor *, const char *pName, const char *pDesc=0); +}; + + +/* + High/Low-Voltage Detect Module +*/ +class HLVDCON; + +class HLVD_stimulus : public stimulus +{ +public: + HLVD_stimulus(HLVDCON *_hlvd, const char *n=0); + ~HLVD_stimulus(); + virtual void set_nodeVoltage(double v); +private: + HLVDCON *hlvd; +}; + +class HLVDCON : public sfr_register, public TriggerObject +{ + public: + enum + { + VDIRMAG = 1<<7, // Voltage Direction Magnitude Select bit + BGVST = 1<<6, // Band Gap Reference Voltages Stable Status Flag bit + IRVST = 1<<5, // Internal Reference Voltage Stable Flag bit + HLVDEN = 1<<4, // High/Low-Voltage Detect Power Enable bit + HLVDL3 = 1<<3, // Voltage Detection Level bits + HLVDL2 = 1<<2, // Voltage Detection Level bits + HLVDL1 = 1<<1, // Voltage Detection Level bits + HLVDL0 = 1<<0, // Voltage Detection Level bits + HLVDL_MASK = 0xf + }; + HLVDCON(Processor *pCpu, const char *pName, const char *pDesc); + ~HLVDCON(); + void put(uint new_value); + virtual void callback_print(){cout << name() << " has callback, ID = " << CallBackID << '\n';} + void callback(); + void set_hlvdin(PinModule *_hlvdin){ hlvdin = _hlvdin;} + void check_hlvd(); + virtual void setIntSrc(InterruptSource *_IntSrc) { IntSrc = _IntSrc;} + + +private: + PinModule *hlvdin; + HLVD_stimulus *hlvdin_stimulus; + bool stimulus_active; + uint write_mask; + InterruptSource *IntSrc; +}; +#endif // __16_BIT_REGISTERS_H__ diff --git a/src/gpsim/registers/apfcon.cc b/src/gpsim/registers/apfcon.cc new file mode 100644 index 0000000..6100f17 --- /dev/null +++ b/src/gpsim/registers/apfcon.cc @@ -0,0 +1,66 @@ +/* + Copyright (C) 2013,2014,2017 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +#include "apfcon.h" +#include "processor.h" + +// Alternate Pin function +APFCON::APFCON(Processor *pCpu, const char *pName, const char *pDesc, unsigned int _mask) + : sfr_register(pCpu,pName,pDesc) + , mValidBits(_mask) +{ + for(int j=0; j<8; j++) + { + dispatch[j].pt_apfpin = 0; + } +} + +void APFCON::set_pins(unsigned int bit, class apfpin* pt_apfpin, int arg, + PinModule* pin_default, PinModule* pin_alt) +{ + dispatch[bit].pt_apfpin = pt_apfpin; + dispatch[bit].arg = arg; + dispatch[bit].pin_default = pin_default; + dispatch[bit].pin_alt = pin_alt; +} + +void APFCON::put( unsigned int new_value ) +{ + unsigned int old_value = value.get(); + unsigned int diff = (new_value ^ old_value) & mValidBits; + + new_value &= mValidBits; + value.put(new_value); + + for( int i=0; i<8; i++ ) + { + unsigned int bit = 1<setIOpin(dispatch[i].arg, (bit & new_value)? dispatch[i].pin_alt: dispatch[i].pin_default); + } + } +} diff --git a/src/gpsim/registers/apfcon.h b/src/gpsim/registers/apfcon.h new file mode 100644 index 0000000..f73a180 --- /dev/null +++ b/src/gpsim/registers/apfcon.h @@ -0,0 +1,61 @@ +/* + Copyright (C) 2013,2014,2017 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +#ifndef __APFCON_H__ +#define __APFCON_H__ + +#include "ioports.h" + + +// Base class to allow APFCON to change IO pins +class apfpin +{ + public: + virtual void setIOpin(int data, PinModule *pin) { fprintf(stderr, "unexpected call afpin::setIOpin data=%d\n", data);} +}; + +// ALTERNATE PIN LOCATIONS register +// set_pins is used to configure operation +class APFCON : public sfr_register +{ + public: + APFCON(Processor *pCpu, const char *pName, const char *pDesc, unsigned int _mask); + virtual void put(unsigned int new_value); + void set_pins(unsigned int bit, class apfpin *pt_apfpin, int arg, + PinModule *pin_default, PinModule *pin_alt); + void set_ValidBits(unsigned int _mask){mValidBits = _mask;} + + private: + unsigned int mValidBits; + struct dispatch + { + class apfpin *pt_apfpin; // pointer to pin setting function + int arg; // argument for pin setting function + PinModule *pin_default; // pin when bit=0 + PinModule *pin_alt; // pin when bit=1 + } dispatch[8]; +}; + +#endif diff --git a/src/gpsim/registers/intcon.cc b/src/gpsim/registers/intcon.cc new file mode 100644 index 0000000..f1aab3f --- /dev/null +++ b/src/gpsim/registers/intcon.cc @@ -0,0 +1,470 @@ +/* + Copyright (C) 1998-2003 Scott Dattalo + 2003 Mike Durian + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include +#include + +#include "intcon.h" +#include "gpsim_classes.h" // for RESET_TYPE +#include "pir.h" +#include "16bit-registers.h" +#include "16bit-processors.h" +#include "breakpoints.h" + + +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("%s:%d",__FILE__,__LINE__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +//-------------------------------------------------- +// member functions for the INTCON base class +//-------------------------------------------------- +INTCON::INTCON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ + in_interrupt = false; +} + +void INTCON::set_T0IF() +{ + put(value.get() | T0IF); +} + +void INTCON::set_rbif(bool b) +{ + bool current = (value.get() & RBIF) == RBIF; + + if (b && !current) put(value.get() | RBIF); + if (!b && current) + { + put(value.get() & ~RBIF); + if (portGReg) // check if IOC match condition still exists + portGReg->setIOCif(); + } +} + +void INTCON::put(uint new_value) +{ + put_value(new_value); +} + +void INTCON::put_value(uint new_value) +{ + uint diff = new_value ^ value.get(); + + value.put(new_value); + + // If we are clearing RBIF and we are using simple IOC, reset RBIF if + // port miss-match still exists + if ((diff & RBIF) && !(new_value & RBIF) && portGReg) + portGReg->setIOCif(); + + // Now let's see if there's a pending interrupt + // The INTCON bits are: + // GIE | ---- | TOIE | INTE | RBIE | TOIF | INTF | RBIF + // There are 3 sources for interrupts, TMR0, RB0/INTF + // and RBIF (RB7:RB4 change). If the corresponding interrupt + // flag is set AND the corresponding interrupt enable bit + // is set AND global interrupts (GIE) are enabled, THEN + // there's an interrupt pending. + // note: bit6 is not handled here because it is processor + // dependent (e.g. EEIE for x84 and ADIE for x7x). + + if(!in_interrupt) + { + if ((value.get()>>3)&value.get() & (T0IF | INTF | RBIF)) + { + if (cpu_pic->is_sleeping()) + cpu_pic->exit_sleep(); + + cpu_pic->BP_set_interrupt(); + } + if( (diff & GIE) && (value.get() & GIE) && check_peripheral_interrupt() ) + { + peripheral_interrupt(false); + } + } +} + +void INTCON::peripheral_interrupt ( bool hi_pri ) +{ + uint reg_val = value.get(); + + if ( hi_pri ) cout << "Dodgy call to 14-bit INTCON::peripheral_interrupt with priority set\n"; + + if (reg_val & XXIE) + { + if (cpu_pic->is_sleeping()) cpu_pic->exit_sleep(); + if((reg_val & GIE) && !in_interrupt) cpu_pic->BP_set_interrupt(); + } +} + +//---------------------------------------------------------------------- +//---------------------------------------------------------------------- +INTCON2::INTCON2(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc), m_bsRBPU(0) +{} + +bool INTCON2::assignBitSink(uint bitPosition, BitSink *pBS) +{ + if (bitPosition == 7) m_bsRBPU = pBS; + return true; +} + +bool INTCON2::releaseBitSink(uint bitPosition, BitSink *) +{ + if (bitPosition == 7) m_bsRBPU = 0; + return true; +} + +//---------------------------------------------------------------------- +//---------------------------------------------------------------------- +void INTCON2::put_value(uint new_value) +{ + uint old_value = value.get(); + value.put(new_value); + + if ((old_value ^ new_value) & RBPU && m_bsRBPU) + m_bsRBPU->setSink((new_value & RBPU) != 0); +} + +//---------------------------------------------------------------------- +//---------------------------------------------------------------------- +void INTCON2::put(uint new_value) +{ + put_value(new_value); +} + +//---------------------------------------------------------------------- +//---------------------------------------------------------------------- +INTCON3::INTCON3(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{} + +//---------------------------------------------------------------------- +//---------------------------------------------------------------------- +void INTCON3::put_value(uint new_value) +{ + value.put(new_value); +} + +//---------------------------------------------------------------------- +//---------------------------------------------------------------------- +void INTCON3::put(uint new_value) +{ + put_value(new_value); +} + +//---------------------------------------------------------------------- +//---------------------------------------------------------------------- +INTCON_14_PIR::INTCON_14_PIR(Processor *pCpu, const char *pName, const char *pDesc) + : INTCON(pCpu, pName, pDesc), + pir_set(0), write_mask(0xff) +{} + +void INTCON_14_PIR::reset(RESET_TYPE r) +{ + switch (r) + { + case POR_RESET: + value.put(por_value.data); + break; + + default: + if (wdtr_value.initialized()) value.put(wdtr_value.data); + break; + } + in_interrupt = false; +} + +void INTCON_14_PIR::put_value(uint new_value) +{ + uint diff = new_value ^ value.get(); + + value.put(new_value); + // Now let's see if there's a pending interrupt + // The INTCON bits are: + // GIE | ---- | TOIE | INTE | RBIE | TOIF | INTF | RBIF + // There are 3 sources for interrupts, TMR0, RB0/INTF + // and RBIF (RB7:RB4 change). If the corresponding interrupt + // flag is set AND the corresponding interrupt enable bit + // is set AND global interrupts (GIE) are enabled, THEN + // there's an interrupt pending. + // note: bit6 is not handled here because it is processor + // dependent (e.g. EEIE for x84 and ADIE for x7x). + + // If we are clearing IOCIF and we are using simple IOC, reset IOCIF if + // port miss-match still exists + if ((diff & IOCIF) && !(new_value & IOCIF) && portGReg) + portGReg->setIOCif(); + + if(value.get() & GIE && !in_interrupt && + ( ((value.get()>>3) & value.get() & (T0IF | INTF | IOCIF)) || + ( value.get() & PEIE && check_peripheral_interrupt() ))) + { + cpu_pic->BP_set_interrupt(); + } +} +int INTCON_14_PIR::check_peripheral_interrupt() +{ + assert(pir_set != 0); + + Dprintf((" INTCON::%s\n",__FUNCTION__)); + return (pir_set->interrupt_status()); +} +void INTCON_14_PIR::put(uint new_value) +{ + // preserve read only bits, but do not let them be written + uint read_only = value.get() & ~write_mask; + Dprintf((" INTCON_14_PIR::%s new_value %02x read_only %02x\n",__FUNCTION__, new_value, read_only)); + + put_value((new_value & write_mask) | read_only); +} + +void INTCON_14_PIR::aocxf_val(IOCxF *ptr, uint val) +{ + int i; + int sum = val; + bool found = false; + + for(i = 0; i < (int)aocxf_list.size(); i++) + { + if (aocxf_list[i].ptr_iocxf == ptr) + { + found = true; + aocxf_list[i].val = val; + } + sum |= aocxf_list[i].val; + } + if (!found) + { + aocxf_list.push_back(aocxf()); + aocxf_list[i].ptr_iocxf = ptr; + aocxf_list[i].val = val; + } + set_rbif(sum); +} + +void INTCON_14_PIR::set_rbif(bool b) +{ + bool current = (value.get() & IOCIF) == IOCIF; + + if( b && !current ) put_value(value.get() | IOCIF); + if( !b && current ) put_value(value.get() & ~IOCIF); +} + +//---------------------------------------------------------------------- +// INTCON_16 +// +// intcon for the 16-bit processor cores. +// +//---------------------------------------------------------------------- +INTCON_16::INTCON_16(Processor *pCpu, const char *pName, const char *pDesc) + : INTCON(pCpu, pName, pDesc), + interrupt_vector(0), rcon(0), intcon2(0), pir_set(0) +{ +} + +void INTCON_16::peripheral_interrupt ( bool hi_pri ) +{ + Dprintf((" INTCON_16::%s\n",__FUNCTION__)); + assert(rcon != 0); + + if(rcon->value.get() & RCON::IPEN) + { +// cout << "peripheral interrupt, priority " << hi_pri << "\n"; + if ( hi_pri ) + { + if( value.get() & GIEH && !in_interrupt ) + { + set_interrupt_vector(INTERRUPT_VECTOR_HI); + cpu_pic->BP_set_interrupt(); + } + } + else + { + if( ( value.get() & (GIEH|GIEL) ) == (GIEH|GIEL) && !in_interrupt) + { + set_interrupt_vector(INTERRUPT_VECTOR_LO); + cpu_pic->BP_set_interrupt(); + } + } + } + else + { + if((value.get() & (GIE | XXIE)) == (GIE | XXIE) && !in_interrupt) + cpu_pic->BP_set_interrupt(); + } +} + +int INTCON_16::check_peripheral_interrupt() +{ + assert(pir_set != 0); + + Dprintf((" INTCON_16::%s\n",__FUNCTION__)); + return (pir_set->interrupt_status()); // Not quite right, but... + // was return 0; but that was blatantly broken +} + +//---------------------------------------------------------------------- +// void INTCON_16::clear_gies() +// +// This routine clears the global interrupt enable bit(s). If priority +// interrupts are used (IPEN in RCON is set) then the appropriate gie +// bit (either giel or gieh) is cleared. +// +// This routine is called from 16bit_processor::interrupt(). +// +void INTCON_16::clear_gies() +{ + assert(cpu != 0); + + if ( !(rcon->value.get() & RCON::IPEN) ) put(value.get() & ~GIE); + else if ( isHighPriorityInterrupt() ) put(value.get() & ~GIEH); + else put(value.get() & ~GIEL); +} + +void INTCON_16::set_gies() +{ + assert(rcon != 0); + assert(intcon2 != 0); + assert(cpu != 0); + + get(); // Update the current value of intcon + // (and emit 'register read' trace). + + if(rcon->value.get() & RCON::IPEN) // Interrupt priorities are being used. + { + if(0 == (value.get() & GIEH)) // GIEH is cleared, so we need to set it + { + put(value.get() | GIEH); + return; + } + else + { + // GIEH is set. This means high priority interrupts are enabled. + // So we most probably got here because of an RETFIE instruction + // after handling a low priority interrupt. We could check to see + // if GIEL is low before calling put(), but it's not necessary. + // So we'll just blindly re-enable giel, and continue with the + // simulation. + + put(value.get() | GIEL); + return; + } + } + else // Interrupt priorities are not used, so re-enable GIEH (which is in + { // the same bit-position as GIE on the mid-range core). + + put(value.get() | GIEH); + return; + } +} + +//---------------------------------------------------------------------- +// void INTCON_16::put(uint new_value) +// +// Here's were the 18cxxx interrupt logic is primarily handled. +// +// inputs: new_value - +// outputs: none +// +void INTCON_16::put(uint new_value) +{ + put_value(new_value); +} + +void INTCON_16::put_value(uint new_value) +{ + value.put(new_value); + //cout << " INTCON_16::put\n"; + // Now let's see if there's a pending interrupt + // if IPEN is set in RCON, then interrupt priorities + // are being used. (In other words, there are two + // interrupt priorities on the 18cxxx core. If a + // low priority interrupt is being serviced, it's + // possible for a high priority interrupt to interject. + + if(rcon->value.get() & RCON::IPEN) + { + uint i1; + int i2; + + // Use interrupt priorities + // %%%FIXME%%% ***BUG*** - does not attempt to look for peripheral interrupts + + if( 0==(value.get() & GIEH) || in_interrupt) return; // Interrupts are disabled + + // First we check the high priorities and then we check the + // low ones. When ever we detect an interrupt, then the + // bp.interrupt flag is set (which will cause the interrupt + // to be handled at the high level) and additional checks + // are aborted. + + // If TO, INT, or RB flags are set AND their correspond + // interrupts are enabled, then the lower three bits of + // i1 will reflect this. Note that INTF does NOT have an + // associated priority bit! + + i1 = ( (value.get()>>3)&value.get()) & (T0IF | INTF | RBIF); + i2 = check_peripheral_interrupt(); + + if ( ( i1 & ( (intcon2->value.get() & (T0IF | RBIF)) | INTF) ) + || ( i2 & 2 ) ) + { + set_interrupt_vector(INTERRUPT_VECTOR_HI); + cpu_pic->BP_set_interrupt(); + return; + } + // If we reach here, then there are no high priority + // interrupts pending. So let's check for the low priority + // ones. + if ( ( (i1 & (~intcon2->value.get() & (T0IF | RBIF))) + || (i2 & 1) ) + && (value.get() & GIEL) ) + { + //cout << " selecting low priority vector\n"; + set_interrupt_vector(INTERRUPT_VECTOR_LO); + cpu_pic->BP_set_interrupt(); + return; + } + } + else + { // ignore interrupt priorities + set_interrupt_vector(INTERRUPT_VECTOR_HI); + + if(value.get() & GIE && !in_interrupt) + { + if( ( (value.get()>>3)&value.get()) & (T0IF | INTF | RBIF) ) + cpu_pic->BP_set_interrupt(); + + else if(value.get() & XXIE) + { + if(check_peripheral_interrupt()) + cpu_pic->BP_set_interrupt(); + } + } + } +} diff --git a/src/gpsim/registers/intcon.h b/src/gpsim/registers/intcon.h new file mode 100644 index 0000000..bd89c5d --- /dev/null +++ b/src/gpsim/registers/intcon.h @@ -0,0 +1,267 @@ +/* + Copyright (C) 1998-2003 Scott Dattalo + 2003 Mike Durian +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#ifndef INTCON_H +#define INTCON_H + +#include + +#include "gpsim_classes.h" +#include "registers.h" +#include "breakpoints.h" +#include "pic-ioports.h" + +class IOCxF; +class PicPortGRegister; +//--------------------------------------------------------- +// INTCON - Interrupt control register + +class INTCON : public sfr_register +{ + public: + bool in_interrupt; + + enum + { + RBIF = 1<<0, + INTF = 1<<1, + T0IF = 1<<2, + RBIE = 1<<3, + INTE = 1<<4, + T0IE = 1<<5, + XXIE = 1<<6, // Processor dependent + PEIE = 1<<6, + GIE = 1<<7 + }; + + INTCON(Processor *pCpu, const char *pName, const char *pDesc); + + virtual void set_gie() { put(value.get() | GIE); } + + virtual void clear_gie() { put(value.get() & ~GIE); } + + void set_T0IF(); + + /* + // Bit 6 of intcon depends on the processor that's being simulated, + // This generic function will get called whenever interrupt flag upon + // which bit 6 enables becomes true. (e.g. for the c84, this + // routine is called when EEIF goes high.) + */ + virtual void peripheral_interrupt ( bool hi_pri = false ); + + virtual void set_rbif(bool b); + + inline void set_intf(bool b) + { + bool current = (value.get() & INTF) == INTF; + if (b && !current) put(value.get() | INTF); + if (!b && current) put(value.get() & ~INTF); + } + + inline void set_t0if() { put(value.get() | T0IF); } + inline void set_rbie() { put(value.get() | RBIE); } + inline void set_inte() { put(value.get() | INTE); } + inline void set_t0ie() { put(value.get() | T0IE); } + + void set_portGReg( PicPortGRegister* pGR) { portGReg = pGR; } + + virtual int check_peripheral_interrupt()=0; + virtual void put(uint new_value); + virtual void put_value(uint new_value); + virtual void aocxf_val(IOCxF *, uint val){} + + PicPortGRegister *portGReg; +}; + + +//--------------------------------------------------------- +class INTCON2 : public sfr_register +{ + public: + INTCON2(Processor *pCpu, const char *pName, const char *pDesc); + + virtual void put_value(uint new_value); + virtual void put(uint new_value); + + virtual bool assignBitSink(uint bitPosition, BitSink *); + virtual bool releaseBitSink(uint bitPosition, BitSink *); + + enum + { + RBIP = 1<<0, + INT3IP = 1<<1, + TMR0IP = 1<<2, + INTEDG3 = 1<<3, + INTEDG2 = 1<<4, + INTEDG1 = 1<<5, + INTEDG0 = 1<<6, + RBPU = 1<<7 + }; + + private: + BitSink *m_bsRBPU; +}; + + +class INTCON3 : public sfr_register +{ + public: + INTCON3(Processor *pCpu, const char *pName, const char *pDesc); + + virtual void put_value(uint new_value); + virtual void put(uint new_value); + + inline void set_int1f(bool b) + { + bool current = (value.get() & INT1IF) == INT1IF; + if (b && !current) put(value.get() | INT1IF); + if (!b && current) put(value.get() & ~INT1IF); + } + inline void set_int2f(bool b) + { + bool current = (value.get() & INT2IF) == INT2IF; + if (b && !current) put(value.get() | INT2IF); + if (!b && current) put(value.get() & ~INT2IF); + } + inline void set_int3f(bool b) + { + bool current = (value.get() & INT3IF) == INT3IF; + if (b && !current) put(value.get() | INT3IF); + if (!b && current) put(value.get() & ~INT3IF); + } + inline void set_int1e() { put(value.get() | INT1IE); } + inline void set_int2e() { put(value.get() | INT2IE); } + inline void set_int3e() { put(value.get() | INT3IE); } + enum + { + INT1IF = 1<<0, + INT2IF = 1<<1, + INT3IF = 1<<2, + INT1IE = 1<<3, + INT2IE = 1<<4, + INT3IE = 1<<5, + INT1IP = 1<<6, + INT2IP = 1<<7 + }; +}; + + +class PIR_SET; + +// A 14-bit intcon with pir registers +class INTCON_14_PIR : public INTCON +{ + public: + + INTCON_14_PIR(Processor *pCpu, const char *pName, const char *pDesc); + + virtual void put(uint new_value); + virtual void put_value(uint new_value); + inline void set_pir_set(PIR_SET *p) { pir_set = p; } + + virtual int check_peripheral_interrupt(); + virtual void set_rbif(bool b); + virtual void set_gie() { put_value(value.get() | GIE); } + virtual void clear_gie() { put_value(value.get() & ~GIE); } + virtual void aocxf_val(IOCxF *, uint val); + virtual void reset(RESET_TYPE r); + + enum + { + IOCIF = 1<<0, + INTF = 1<<1, + T0IF = 1<<2, + IOCIE = 1<<3, + INTE = 1<<4, + T0IE = 1<<5, + PEIE = 1<<6, + GIE = 1<<7 + }; + + //private: + PIR_SET *pir_set; + uint write_mask; // Bits that instructions can modify + struct aocxf + { + struct IOCxF *ptr_iocxf; + uint val; + }; + vectoraocxf_list; +}; + + + +//--------------------------------------------------------- +// INTCON_16 - Interrupt control register for the 16-bit core +class RCON; + +class INTCON_16 : public INTCON +{ +public: + + enum { + GIEH = GIE, + GIEL = XXIE, + TMR0IE = T0IE, + INT0IE = INTE, + TMR0IF = T0IF, + INT0IF = INTF + }; +#define INTERRUPT_VECTOR_LO (0x18 >> 1) +#define INTERRUPT_VECTOR_HI (0x08 >> 1) + + INTCON_16(Processor *pCpu, const char *pName, const char *pDesc); + + inline void set_rcon(RCON *r) { rcon = r; } + inline void set_intcon2(INTCON2 *ic) { intcon2 = ic; } + inline void set_pir_set(PIR_SET *p) { pir_set = p; } + + virtual void put(uint new_value); + virtual void put_value(uint new_value); + + virtual void peripheral_interrupt ( bool hi_pri = false ); + + void clear_gies(); + void set_gies(); + virtual int check_peripheral_interrupt(); + uint get_interrupt_vector() + { + return interrupt_vector; + } + bool isHighPriorityInterrupt() + { + return ( interrupt_vector == INTERRUPT_VECTOR_HI ); + } + void set_interrupt_vector(uint new_int_vect) + { + interrupt_vector = new_int_vect; + } + +private: + uint interrupt_vector; // Starting address of the interrupt + RCON *rcon; + INTCON2 *intcon2; + PIR_SET *pir_set; +}; + + +#endif /* INTCON_H */ diff --git a/src/gpsim/registers/pic-registers.cc b/src/gpsim/registers/pic-registers.cc new file mode 100644 index 0000000..db49486 --- /dev/null +++ b/src/gpsim/registers/pic-registers.cc @@ -0,0 +1,437 @@ +/* + Copyright (C) 1998-2000 Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include +#include +#include + + +#include "config.h" +#include "14bit-processors.h" +//#include "interface.h" +#include "pic-registers.h" + +#include "clock_phase.h" + +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("0x%06" PRINTF_GINT64_MODIFIER "X %s() ",cycles.get(),__FUNCTION__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +//------------------------------------------------------------------------ +// member functions for the Program_Counter base class +//------------------------------------------------------------------------ +// + +//-------------------------------------------------- + +Program_Counter::Program_Counter(const char *name, const char *desc, Module *pM) + : Value(name,desc,pM) +{ + reset_address = 0; + value = 0; + pclath_mask = 0x1800; // valid pclath bits for branching in 14-bit cores + instruction_phase = 0; + + //set_xref(new XrefObject(this)); +} + +Program_Counter::~Program_Counter() +{ +// if (cpu) cpu->removeSymbol(this); + + /*XrefObject *pt_xref; + XrefObject *pt = xref(); + if (pt) + { + while((pt_xref = (XrefObject *)pt->first_xref())) + { + pt->clear(pt_xref); + if (pt_xref->data) + delete (int *)pt_xref->data; + delete pt_xref; + } + }*/ +} + +//-------------------------------------------------- +// increment - update the program counter. All non-branching instructions pass through here. +// +void Program_Counter::increment() +{ + Dprintf(("PC=0x%x\n",value)); + + value = (value + 1); + if (value == memory_size) // Some processors start at highest memory and roll over + { + printf("%s PC=0x%x == memory size 0x%x\n", __FUNCTION__, value, memory_size); + value = 0; + } + else if (value > memory_size) // assume this is a mistake + { + printf("%s PC=0x%x >= memory size 0x%x\n", __FUNCTION__, value, memory_size); + bp.halt(); + } + + // Update PCL sfr to reflect current PC + update_pcl(); + + cpu_pic->mCurrentPhase->setNextPhase(cpu_pic->mExecute1Cycle); +} + +//-------------------------------------------------- +// update_pcl - Updates the PCL from within the Program_Counter class. +// There is a separate method for this as the Program_Counter counts +// instructions (words) while the PCL can also point to bytes on +// 16 bit devices. So the PCL on 16-bit devices is always the double +// as the current Program_Counter +// + +void Program_Counter::update_pcl() +{ + // For 12/14 bit devices the PCL will simply get set to the + // current "value" of Program_Counter + + // Update pcl. Note that we don't want to pcl.put() because that + // will trigger a break point if there's one set on pcl. (A read/write + // break point on pcl should not be triggered by advancing the program + // counter). + cpu_pic->pcl->value.put(value & 0xff); +} + +//-------------------------------------------------- +// skip - Does the same thing that increment does, except that it records the operation +// in the trace buffer as a 'skip' instead of a 'pc update'. +// + +void Program_Counter::skip() +{ + Dprintf(("PC=0x%x\n",value)); + + if ((value + 2) >= memory_size) + { + printf("%s PC=0x%x >= memory size 0x%x\n", __FUNCTION__, value, memory_size); + bp.halt(); + } + else cpu_pic->mExecute2ndHalf->firstHalf( value + 2); +} + +//-------------------------------------------------- +// start_skip - The next instruction is going to be skipped +// +void Program_Counter::start_skip() +{ +} + +//-------------------------------------------------- +// set - The next instruction is at an arbitrary location. This method is used +// by the command line parser--the GUI uses put_value directly. +// +void Program_Counter::set(Value *v) +{ + int i; + v->get(i); + //printf ( "Assign %d to PC\n", i ); + put_value ( i ); +} + +void Program_Counter::get(char *buffer, int buf_size) +{ + if (buffer) + snprintf(buffer, buf_size, "%u (0x%x)", value, value); +} + +//======================================================================== + +phaseExecute2ndHalf::phaseExecute2ndHalf(Processor *pcpu) + : ProcessorPhase(pcpu), m_uiPC(0) +{ +} +phaseExecute2ndHalf::~phaseExecute2ndHalf() +{ +} + +ClockPhase *phaseExecute2ndHalf::firstHalf(uint uiPC) +{ + Dprintf(("first half of 2 cycle instruction new PC=0x%x\n",uiPC)); + ((pic_processor *)m_pcpu)->pc->value = uiPC; + ((pic_processor *)m_pcpu)->pc->update_pcl(); + m_pcpu->mCurrentPhase->setNextPhase(this); + return this; +} + +ClockPhase *phaseExecute2ndHalf::advance() +{ + Dprintf(("second half of 2 cycle instruction\n")); + m_pcpu->mCurrentPhase->setNextPhase(m_pcpu->mExecute1Cycle); + get_cycles().increment(); + return m_pNextPhase; +} + +//-------------------------------------------------- +// jump - update the program counter. All branching instructions except computed gotos +// and returns go through here. + +void Program_Counter::jump(uint new_address) +{ + Dprintf(("PC=0x%x new 0x%x\n",value,new_address)); + + // Use the new_address and the cached pclath (or page select bits for 12 bit cores) + // to generate the destination address: + + + // see Update pcl comment in Program_Counter::increment() + + if (new_address >= memory_size) + { + printf("%s PC=0x%x >= memory size 0x%x\n", __FUNCTION__, new_address, memory_size); + bp.halt(); + } + else cpu_pic->mExecute2ndHalf->firstHalf(new_address); +} + +//-------------------------------------------------- +// interrupt - update the program counter. Like a jump, except pclath is ignored. +// + +void Program_Counter::interrupt(uint new_address) +{ + Dprintf(("PC=0x%x 0x%x\n",value,new_address)); + + if (new_address >= memory_size) + { + printf("%s PC=0x%x >= memory size 0x%x\n", __FUNCTION__, new_address, memory_size); + bp.halt(); + } + else cpu_pic->mExecute2ndHalf->firstHalf(new_address); +} + +//-------------------------------------------------- +// computed_goto - update the program counter. Anytime the pcl register is written to +// by the source code we'll pass through here. +// + +void Program_Counter::computed_goto(uint new_address) +{ + Dprintf(("PC=0x%x new=0x%x\n",value,new_address)); + + // Use the new_address and the cached pclath (or page select bits for 12 bit cores) + // to generate the destination address: + + value = new_address | cpu_pic->get_pclath_branching_modpcl() ; + if (value >= memory_size) + { + printf("%s PC=0x%x >= memory size 0x%x\n", __FUNCTION__, value, memory_size); + bp.halt(); + } + + // Update PCL. As this is different for 12/14 and 16 bit devices + // this will get handled by a method on its own so it is possible + // to cope with different mappings PC-->PCL (direct, <<1, etc.) + update_pcl(); + + // The instruction modifying the PCL will also increment the program counter. + // So, pre-compensate the increment with a decrement: + value--; + + // The computed goto is a 2-cycle operation. The first cycle occurs within + // the instruction (i.e. via the ::increment() method). The second cycle occurs + // here: + + cpu_pic->mExecute2ndHalf->advance(); +} + +//-------------------------------------------------- +// new_address - write a new value to the program counter. All returns pass through here. +// + +void Program_Counter::new_address(uint new_address) +{ + Dprintf(("PC=0x%x new 0x%x\n",value, new_address&0xffff)); + + if (new_address >= memory_size) + { + printf("%s PC=0x%x >= memory size 0x%x\n", __FUNCTION__, new_address, memory_size); + bp.halt(); + } + else cpu_pic->mExecute2ndHalf->firstHalf(new_address); +} + +//-------------------------------------------------- +// get_next - get the next address that is just pass the current one +// (used by 'call' to obtain the return address) + +uint Program_Counter::get_next() +{ + uint new_address = value + cpu_pic->program_memory[value]->instruction_size(); + + if (new_address >= memory_size) + { + printf("%s PC=0x%x >= memory size 0x%x\n", __FUNCTION__, new_address, memory_size); + bp.halt(); + } + return( new_address); +} + + +//-------------------------------------------------- +// put_value - Change the program counter without affecting the cycle counter +// (This is what's called if the user changes the pc.) + +void Program_Counter::put_value(uint new_value) +{ + // FIXME +#define PCLATH_MASK 0x1f + Dprintf(("PC=0x%x new 0x%x\n",value, new_value&0xffff)); + + if (new_value >= memory_size) + { + printf("%s PC=0x%x >= memory size 0x%x\n", __FUNCTION__, new_value, memory_size); + bp.halt(); + } + value = new_value; + cpu_pic->pcl->value.put(value & 0xff); + cpu_pic->pclath->value.put((new_value >> 8) & PCLATH_MASK); + + cpu_pic->pcl->update(); + cpu_pic->pclath->update(); + update(); +} + +void Program_Counter::reset() +{ + value = reset_address; + value = (value >= memory_size) ? value - memory_size : value; + cpu_pic->mExecute2ndHalf->firstHalf(value); +} + +//======================================================================== +// +// Helper registers +// + +PCHelper::PCHelper(Processor *pCpu,ProgramMemoryAccess *new_pma) + : Register(pCpu, "PC", "Program Counter"), + pma(new_pma) +{ + assert(pma); +} + +void PCHelper::put_value(uint new_value) +{ + // if(pma) + pma->set_PC(new_value); +} + +uint PCHelper::get_value() +{ + // if(pma) + return pma->get_PC(); + + //return 0; +} + + +//-------------------------------------------------- +// member functions for the OPTION base class +//-------------------------------------------------- +OPTION_REG::OPTION_REG(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ + por_value = RegisterValue(0xff,0); + wdtr_value = RegisterValue(0xff,0); + // The chip reset will place the proper value here. + value = RegisterValue(0,0); // por_value; +} + +// make sure intial por_value does it's stuff +void OPTION_REG::initialize() +{ + cpu_pic->tmr0.new_prescale(); + cpu_pic->wdt.set_postscale( (value.get() & PSA) ? (value.get() & ( PS2 | PS1 | PS0 )) : 0); + cpu_pic->option_new_bits_6_7(value.get() & (T0CS | BIT6 | BIT7)); +} + +void OPTION_REG::put(uint new_value) +{ + uint old_value = value.get(); + value.put(new_value); + + // First, check the tmr0 clock source bit to see if we are changing from + // internal to external (or vice versa) clocks. + //if( (value ^ old_value) & T0CS) + // cpu_pic->tmr0.new_clock_source(); + + // %%%FIX ME%%% - can changing the state of TOSE cause the timer to + // increment if tmr0 is being clocked by an external clock? + + // Now check the rest of the tmr0 bits. + if( (value.get() ^ old_value) & (T0CS | T0SE | PSA | PS2 | PS1 | PS0)) + cpu_pic->tmr0.new_prescale(); + + if( (value.get() ^ old_value) & (PSA | PS2 | PS1 | PS0)) + cpu_pic->wdt.set_postscale( (value.get() & PSA) ? (value.get() & ( PS2 | PS1 | PS0 )) : 0); + + if( (value.get() ^ old_value) & (T0CS | BIT6 | BIT7)) + cpu_pic->option_new_bits_6_7(value.get() & (T0CS | BIT6 | BIT7)); + +} + + +void OPTION_REG::reset(RESET_TYPE r) +{ + putRV(por_value); +} + +// On 14bit enhanced cores the prescaler does not affect the watchdog +OPTION_REG_2::OPTION_REG_2(Processor *pCpu, const char *pName, const char *pDesc) + : OPTION_REG(pCpu, pName, pDesc) +{ +} + +void OPTION_REG_2::initialize() +{ + cpu_pic->tmr0.new_prescale(); + cpu_pic->option_new_bits_6_7(value.get() & (T0CS | BIT6 | BIT7)); +} + +void OPTION_REG_2::put(uint new_value) +{ + uint old_value = value.get(); + value.put(new_value); + + // First, check the tmr0 clock source bit to see if we are changing from + // internal to external (or vice versa) clocks. + //if( (value ^ old_value) & T0CS) + // cpu_pic->tmr0.new_clock_source(); + + // %%%FIX ME%%% - can changing the state of TOSE cause the timer to + // increment if tmr0 is being clocked by an external clock? + + // Now check the rest of the tmr0 bits. + if( (value.get() ^ old_value) & (T0CS | T0SE | PSA | PS2 | PS1 | PS0)) + cpu_pic->tmr0.new_prescale(); + + if( (value.get() ^ old_value) & (T0CS | BIT6 | BIT7)) + cpu_pic->option_new_bits_6_7(value.get() & (T0CS | BIT6 | BIT7)); +} diff --git a/src/gpsim/registers/pic-registers.h b/src/gpsim/registers/pic-registers.h new file mode 100644 index 0000000..e2113b7 --- /dev/null +++ b/src/gpsim/registers/pic-registers.h @@ -0,0 +1,115 @@ + +/* + Copyright (C) 1998-2000 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __PIC_REGISTERS_H__ +#define __PIC_REGISTERS_H__ + + +#include "gpsim_classes.h" +#include "registers.h" +#include "breakpoints.h" + + +//------------------------------------------------------------------------ +// +// PCHelper +// +// The purpose of this class is to provide a register wrapper around the +// program counter. On the low and mid range pics, the program counter spans +// two registers. On the high end ones it spans 3. This class allows the +// gui to treat the program counter as though if it's a single register. + +class PCHelper : public Register +{ +public: + + PCHelper(Processor *pCpu, ProgramMemoryAccess *); + virtual void put_value(uint new_value); + virtual uint get_value(); + virtual uint register_size () const + { + return 2; + } + + ProgramMemoryAccess *pma; +}; + +//--------------------------------------------------------- +// OPTION_REG - + +class OPTION_REG : public sfr_register +{ +public: + +enum + { + PS0 = 1<<0, + PS1 = 1<<1, + PS2 = 1<<2, + PSA = 1<<3, + T0SE = 1<<4, + T0CS = 1<<5, + BIT6 = 1<<6, + BIT7 = 1<<7 + }; + + uint prescale; + + + OPTION_REG(Processor *pCpu, const char *pName, const char *pDesc=0); + + inline uint get_prescale() + { + return value.get() & (PS0 | PS1 | PS2); + } + + inline uint get_psa() + { + return value.get() & PSA; + } + + inline uint get_t0cs() + { + return value.get() & T0CS; + } + + inline uint get_t0se() + { + return value.get() & T0SE; + } + + virtual void put(uint new_value); + virtual void reset(RESET_TYPE r); + virtual void initialize(); + +}; + +// For use on 14bit enhanced cores +class OPTION_REG_2 : public OPTION_REG +{ +public: + OPTION_REG_2(Processor *pCpu, const char *pName, const char *pDesc=0); + + virtual void put(uint new_value); + virtual void initialize(); +}; + +#endif diff --git a/src/gpsim/registers/pie.cc b/src/gpsim/registers/pie.cc new file mode 100644 index 0000000..6ad87ad --- /dev/null +++ b/src/gpsim/registers/pie.cc @@ -0,0 +1,27 @@ +//#include // for guint64 + +//#include "trace.h" + +#include "intcon.h" +#include "pie.h" +#include "pir.h" +#include "processor.h" + +PIE::PIE(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu,pName,pDesc), pir(0) +{ +} +void PIE::setPir(PIR *pPir) +{ + pir = pPir; +} + +void PIE::put(uint new_value) +{ + assert(pir); + + value.put(new_value & pir->valid_bits); + + if(pir->interrupt_status()) pir->setPeripheralInterrupt(); +} + diff --git a/src/gpsim/registers/pie.h b/src/gpsim/registers/pie.h new file mode 100644 index 0000000..3904384 --- /dev/null +++ b/src/gpsim/registers/pie.h @@ -0,0 +1,23 @@ +#ifndef PIE_H +#define PIE_H + +class PIR; + +#include "registers.h" + +//--------------------------------------------------------- +// PIE Peripheral Interrupt Enable register base class +// for PIE1 & PIE2 + +class PIE : public sfr_register +{ +public: + PIE(Processor *pCpu, const char *pName, const char *pDesc); + + void put(uint new_value); + void setPir(PIR *pPir); +protected: + PIR *pir; +}; + +#endif /* PIE_H */ diff --git a/src/gpsim/registers/pir.cc b/src/gpsim/registers/pir.cc new file mode 100644 index 0000000..9f2bec5 --- /dev/null +++ b/src/gpsim/registers/pir.cc @@ -0,0 +1,459 @@ +/* + Copyright (C) 1998-2003 Scott Dattalo + + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +#include "pir.h" +#include "intcon.h" +#include "processor.h" + +PIR::PIR(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie, int _valid_bits) + : sfr_register(pCpu,pName,pDesc), + intcon(_intcon),pie(_pie),ipr(0),valid_bits(_valid_bits),writable_bits(0) +{ +} + +void PIR::put(uint new_value) +{ + // Only the "writable bits" can be written with put. + // The "read-only" ones (such as TXIF) are written + // through the set_/clear_ member functions. + + value.put((new_value & writable_bits) | (value.get() & ~writable_bits)); + + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} + +void PIR::set_intcon(INTCON *_intcon) +{ + intcon = _intcon; +} + +void PIR::set_pie(PIE *_pie) +{ + pie = _pie; +} + +void PIR::set_ipr(sfr_register *_ipr) +{ + ipr = _ipr; +} + +void PIR::setInterrupt(uint bitMask) +{ + value.put(value.get() | bitMask); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} + + +void PIR::setPeripheralInterrupt() +{ + if (intcon) + intcon->peripheral_interrupt ( ipr && (value.get() & valid_bits & ipr->value.get() & pie->value.get()) ); +} + +/* + return 0 : no interrupt pending + 1 : low priority interrupt pending + 2 : high priority unterrupt pending +*/ +int PIR::interrupt_status() +{ + assert(pie); + if ( ipr ) + { + int result = 0; + if ( value.get() & valid_bits & pie->value.get() & ~(ipr->value.get()) ) + result |= 1; + if ( value.get() & valid_bits & pie->value.get() & ipr->value.get() ) + result |= 2; + return result; + } + else + return ( value.get() & valid_bits & pie->value.get() ) ? 1 : 0; +} + +//======================================================================== +InterruptSource::InterruptSource(PIR *_pir, uint bitMask) + : m_pir(_pir), m_bitMask(bitMask) +{ + assert(m_pir); + // Only one bit in the bit mask should be set. + assert(m_bitMask && ((m_bitMask & (m_bitMask-1)) == 0)); +} + +void InterruptSource::Trigger() +{ + m_pir->setInterrupt(m_bitMask); +} + +void InterruptSource::Clear() +{ + m_pir->value.put(m_pir->value.get() & ~m_bitMask); +} + + +void InterruptSource::release() +{ + delete this; +} + + + +//------------------------------------------------------------------------ + +PIR1v1::PIR1v1(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) +{ + // Even though TXIF is a valid bit, it can't be written by the PIC + // source code. Its state reflects whether the usart txreg is full + // or not. Similarly for RCIF + valid_bits = TMR1IF | TMR2IF | CCP1IF | SSPIF | TXIF | RCIF | CMIF | EEIF; + writable_bits = TMR1IF | TMR2IF | CCP1IF | SSPIF | CMIF | EEIF; +} + + +void PIR1v1::clear_sspif(void) +{ + value.put(value.get() & ~SSPIF); +} + +void PIR1v1::set_txif(void) +{ + value.put(value.get() | TXIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} + +void PIR1v1::clear_txif(void) +{ + value.put(value.get() & ~TXIF); +} + +void PIR1v1::set_rcif(void) +{ + value.put(value.get() | RCIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} + +void PIR1v1::clear_rcif(void) +{ + value.put(value.get() & ~RCIF); +} + +void PIR1v1::set_cmif(void) +{ + value.put(value.get() | CMIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} + +void PIR1v1::set_eeif(void) +{ + value.put(value.get() | EEIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +//------------------------------------------------------------------------ +// +PIR1v2::PIR1v2(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) +{ + // Even though TXIF is a valid bit, it can't be written by the PIC + // source code. Its state reflects whether the usart txreg is full + // or not. Similarly for RCIF + valid_bits = TMR1IF | TMR2IF | CCP1IF | SSPIF | TXIF | RCIF | ADIF | PSPIF; + writable_bits = TMR1IF | TMR2IF | CCP1IF | SSPIF | ADIF | PSPIF; +} + +void PIR1v2::clear_sspif(void) +{ + value.put(value.get() & ~SSPIF); +} + +void PIR1v2::set_txif(void) +{ + value.put(value.get() | TXIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} + +void PIR1v2::set_pspif(void) +{ + value.put(value.get() | PSPIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +void PIR1v2::set_sppif(void) +{ + value.put(value.get() | SPPIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +void PIR1v2::set_sspif(void) +{ + value.put(value.get() | SSPIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} + +void PIR1v2::clear_txif(void) +{ + value.put(value.get() & ~TXIF); +} + +void PIR1v2::set_rcif(void) +{ + value.put(value.get() | RCIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} + +void PIR1v2::clear_rcif(void) +{ + value.put(value.get() & ~RCIF); +} + +//------------------------------------------------------------------------ + +PIR1v3::PIR1v3(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) +{ + valid_bits = TMR1IF | ADIF | CMIF | EEIF; + writable_bits = TMR1IF | ADIF | CMIF | EEIF; +} + +void PIR1v3::set_tmr1if(void) +{ + value.put(value.get() | TMR1IF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} + +void PIR1v3::set_tmr2if(void) +{ + value.put(value.get() | TMR2IF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} + +void PIR1v3::set_cmif(void) +{ + value.put(value.get() | CMIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} + +void PIR1v3::set_eeif(void) +{ + value.put(value.get() | EEIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +void PIR1v3::set_adif(void) +{ + value.put(value.get() | ADIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +void PIR1v3::set_c1if(void) +{ + value.put(value.get() | C1IF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +void PIR1v3::set_c2if(void) +{ + value.put(value.get() | C2IF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} + +//------------------------------------------------------------------------ + +PIR1v4::PIR1v4(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) +{ + writable_bits = TMR1IF | TMR2IF | CCP1IF | SSPIF | ADIF | EEIF; + valid_bits = 0xff; +} +void PIR1v4::set_txif(void) +{ + value.put(value.get() | TXIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +void PIR1v4::clear_txif(void) +{ + value.put(value.get() & ~TXIF); +} + +void PIR1v4::set_rcif(void) +{ + value.put(value.get() | RCIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +void PIR1v4::clear_rcif(void) +{ + value.put(value.get() & ~RCIF); +} +//------------------------------------------------------------------------ +PIR2v1::PIR2v1(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) +{ + valid_bits = CCP2IF; + writable_bits = valid_bits; +} +//------------------------------------------------------------------------ +PIR2v2::PIR2v2(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) +{ + valid_bits = ECCP1IF | TMR3IF | LVDIF | BCLIF | EEIF | CMIF; + writable_bits = valid_bits; +} + +void PIR2v2::set_cmif(void) +{ + value.put(value.get() | CMIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +void PIR2v2::set_eeif(void) +{ + value.put(value.get() | EEIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +void PIR2v2::set_bclif(void) +{ + value.put(value.get() | BCLIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +//------------------------------------------------------------------------ +PIR2v3::PIR2v3(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) +{ + valid_bits = CCP2IF | ULPWUIF | BCLIF | EEIF | C1IF | C2IF | OSFIF; + writable_bits = valid_bits; +} + +void PIR2v3::set_c1if(void) +{ + value.put(value.get() | C1IF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +void PIR2v3::set_c2if(void) +{ + value.put(value.get() | C2IF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +void PIR2v3::set_eeif(void) +{ + value.put(value.get() | EEIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +void PIR2v3::set_bclif(void) +{ + value.put(value.get() | BCLIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} + +PIR2v4::PIR2v4(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) +{ + valid_bits = OSCFIF | CMIF | USBIF | EEIF | BCLIF | HLVDIF | TMR3IF | CCP2IF; + writable_bits = valid_bits; +} +void PIR2v4::set_usbif(void) +{ + value.put(value.get() | USBIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +void PIR2v4::set_cmif(void) +{ + value.put(value.get() | CMIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +void PIR2v4::set_eeif(void) +{ + value.put(value.get() | EEIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +void PIR2v4::set_bclif(void) +{ + value.put(value.get() | BCLIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} +PIR2v5::PIR2v5(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) +{ + valid_bits = OSFIF | LVDIF | LCDIF | C1IF | C2IF |CCP2IF; + writable_bits = valid_bits; +} +//------------------------------------------------------------------------ + +PIR3v1::PIR3v1(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) +{ + // Even though TXIF is a valid bit, it can't be written by the PIC + // source code. Its state reflects whether the usart txreg is full + // or not. Similarly for RCIF + valid_bits = CCP3IF | CCP4IF | CCP5IF | TMR4IF | TXIF | RCIF; + writable_bits = CCP3IF | CCP4IF | CCP5IF | TMR4IF; +} + + +void PIR3v1::set_txif(void) +{ + value.put(value.get() | TXIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} + +void PIR3v1::clear_txif(void) +{ + value.put(value.get() & ~TXIF); +} + +void PIR3v1::set_rcif(void) +{ + value.put(value.get() | RCIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); +} + +void PIR3v1::clear_rcif(void) +{ + value.put(value.get() & ~RCIF); +} + +//------------------------------------------------------------------------ +PIR3v2::PIR3v2(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) +{ + valid_bits = RXB0IF | RXB1IF | TXB0IF | TXB1IF | TXB2IF | ERRIF | + WAKIF | IRXIF; + writable_bits = valid_bits; +} + +PIR3v3::PIR3v3(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) +{ + valid_bits = TMR3GIF | TMR5GIF | TMR1GIF | CTMUIF | TX2IF | RC2IF + | BCL2IF | SSP2IF; + writable_bits = valid_bits; +} + +PIR4v1::PIR4v1(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) +{ + valid_bits = CCP3IF | CCP4IF | CCP5IF ; + writable_bits = CCP3IF | CCP4IF | CCP5IF; +} +PIR5v1::PIR5v1(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) +{ + valid_bits = TMR4IF | TMR5IF | TMR6IF ; + writable_bits = TMR4IF | TMR5IF | TMR6IF ; +} diff --git a/src/gpsim/registers/pir.h b/src/gpsim/registers/pir.h new file mode 100644 index 0000000..1efdeb2 --- /dev/null +++ b/src/gpsim/registers/pir.h @@ -0,0 +1,1214 @@ +/* + Copyright (C) 1998-2003 Scott Dattalo + 2003 Mike Durian + 2013 Roy R. Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ +/**************************************************************** +* * +* Modified 2018 by Santiago Gonzalez santigoro@gmail.com * +* * +*****************************************************************/ + +#ifndef PIR_H +#define PIR_H + +#include "assert.h" + +#include "pie.h" + +class INTCON; + +//--------------------------------------------------------- +// PIR Peripheral Interrupt register base class for PIR1 & PIR2 + +class PIR : public sfr_register +{ + protected: + INTCON *intcon; + PIE *pie; + sfr_register *ipr; + public: + int valid_bits; + int writable_bits; + + PIR(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *, PIE *, int _valid_bits); + // The PIR base class supports no PIR bits directly + virtual void clear_sspif(){} + virtual void clear_sppif(){} + virtual void clear_rcif(){} + virtual void clear_txif(){} + virtual void set_adif(){} + virtual void set_bclif(){} + virtual void set_ccpif(){} + virtual void set_cmif(){} + virtual void set_c1if(){fprintf(stderr, "RRR set_c1if FIX\n");} + virtual void set_c2if(){fprintf(stderr, "RRR set_c2if FIX\n");} + virtual void set_c3if(){fprintf(stderr, "RRR set_c3if FIX\n");} + virtual void set_c4if(){fprintf(stderr, "RRR set_c4if FIX\n");} + virtual void set_c5if(){fprintf(stderr, "RRR set_c5if FIX\n");} + virtual void set_eccp1if(){} + virtual void set_eeif(){} + virtual void set_errif(){} + virtual void set_irxif(){} + virtual void set_lvdif(){} + virtual void set_pspif(){} + virtual void set_rcif(){} + virtual void set_rxb0if(){} + virtual void set_rxb1if(){} + virtual void set_sspif(){} + virtual void set_sppif(){fprintf(stderr, "set_sppif FIX\n");} + virtual void set_tmr1if(){} + virtual void set_tmr1gif(){} + virtual void set_tmr2if(){} + virtual void set_tmr3if(){ fprintf(stderr, "set_tmr3if FIX\n");} + virtual void set_txb0if(){} + virtual void set_txb1if(){} + virtual void set_txb2if(){} + virtual void set_txif(){} + virtual void set_wakif(){} + virtual void set_usbif(){} + virtual void set_nco1if() { fprintf(stderr, "set_nco1if() FIX\n");} + + virtual uint get_txif() { return 0;} + virtual uint get_rcif() { return 0;} + virtual uint get_sspif() { return 0;} + virtual uint get_sppif() { return 0;} + + /// A generic method to set an interrupt bit by mask + virtual void set(int mask) + { + put(get() | mask); + } + + /// Obtain interrupt request state, as a mask of priorities if relevant + virtual int interrupt_status(); + + virtual void put(uint new_value); + + virtual void setInterrupt(uint bitMask); + virtual void setPeripheralInterrupt(); + + void set_intcon(INTCON *); + void set_pie(PIE *); + void set_ipr(sfr_register *); +}; + +/*--------------------------------------------------------- +// InterruptSource + + this is an alternative to the set_xxif method which + a> is becoming unwieldly + b> removes hard coding to allow multiple instantiation of classes + with different interrupts + +*/ + +class InterruptSource +{ +public: + InterruptSource(PIR *_pir, uint bitMask); + void Trigger(); + void Clear(); + uint Get() { return m_pir->value.get() & m_bitMask;} + void release(); // called when source is no longer needed. +private: + PIR *m_pir; + uint m_bitMask; +}; +//--------------------------------------------------------- +// PIR1 Peripheral Interrupt register # 1 +// +// This is version 1 of the PIR1 register - as seen on the 16f62x + +class PIR1v1 : public PIR +{ + public: + + enum { + TMR1IF = 1<<0, + TMR2IF = 1<<1, + CCP1IF = 1<<2, + SSPIF = 1<<3, + TXIF = 1<<4, + RCIF = 1<<5, + CMIF = 1<<6, // 16f62x + EEIF = 1<<7 // 16f62x + }; + + virtual void set_tmr1if() + { + put(get() | TMR1IF); + } + + virtual void set_tmr2if() + { + put(get() | TMR2IF); + } + + virtual void set_ccpif() + { + put(get() | CCP1IF); + } + + virtual void set_sspif() + { + put(get() | SSPIF); + } + + virtual void set_txif(); + virtual void set_rcif(); + + virtual void set_cmif(); + virtual void set_c1if(){set_cmif();} + virtual void set_c2if(){set_cmif();} + + + virtual void set_eeif(); + + virtual uint get_sspif() + { + return value.get() & SSPIF; + } + void clear_sspif(); + + uint get_txif() + { + return value.get() & TXIF; + } + void clear_txif(); + + uint get_rcif() + { + return value.get() & RCIF; + } + virtual void clear_rcif(); + + + PIR1v1(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *, PIE *); +}; + + +//--------------------------------------------------------- +// PIR1 Peripheral Interrupt register # 1 +// +// This is version 2 of the PIR1 register - as seen on the 18xxxx devices +// and devices like the 16c63a. + +class PIR1v2 : public PIR +{ + public: + + enum { + TMR1IF = 1<<0, + TMR2IF = 1<<1, + CCP1IF = 1<<2, + SSPIF = 1<<3, + TXIF = 1<<4, + RCIF = 1<<5, + ADIF = 1<<6, // 18cxxx + PSPIF = 1<<7, + SPPIF = 1<<7 + }; + + virtual void set_tmr1if() + { + put(get() | TMR1IF); + } + + virtual void set_tmr2if() + { + put(get() | TMR2IF); + } + + virtual void set_ccpif() + { + put(get() | CCP1IF); + } + + virtual void set_sspif(); + + uint get_sspif() + { + return value.get() & SSPIF; + } + virtual void clear_sspif(); + + virtual void set_txif(); + virtual void set_rcif(); + + virtual void set_adif() + { + put(get() | ADIF); + } + + uint get_sppif() + { + return value.get() & SPPIF; + } + virtual void set_sppif(); + + virtual void set_pspif(); + + + virtual uint get_txif() + { + return value.get() & TXIF; + } + virtual void clear_txif(); + uint get_rcif() + { + return value.get() & RCIF; + } + virtual void clear_rcif(); + + PIR1v2(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *, PIE *); +}; + +//--------------------------------------------------------- +// PIR1 Peripheral Interrupt register # 1 +// +// This is version 3 of the PIR1 register - as seen on the p16f630 devices + +class PIR1v3 : public PIR +{ + public: + + enum { + TMR1IF = 1<<0, + TMR2IF = 1<<1, //16f684 + OSFIF = 1<<2, //16f684 + CMIF = 1<<3, + C1IF = 1<<3, //16f684 + C2IF = 1<<4, //16f684 + CCP1IF = 1<<5, //16f684 + ADIF = 1<<6, + EEIF = 1<<7 + }; + + virtual void set_tmr1if(); + virtual void set_tmr2if(); + virtual void set_cmif(); + + virtual void set_adif(); + + virtual void set_eeif(); + virtual void set_c1if(); + virtual void set_c2if(); + virtual void set_ccpif() { put(get() | CCP1IF); } + + + PIR1v3(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *, PIE *); +}; + +//--------------------------------------------------------- +// PIR1 Peripheral Interrupt register # 1 +// +// This is version 4 of the PIR1 register - as seen on the p16f91x devices + +class PIR1v4 : public PIR +{ + public: + + enum { + TMR1IF = 1<<0, + TMR2IF = 1<<1, + CCP1IF = 1<<2, + SSPIF = 1<<3, + TXIF = 1<<4, + RCIF = 1<<5, + ADIF = 1<<6, + EEIF = 1<<7 + }; + + virtual void set_tmr1if(){ put(get() | TMR1IF); } + virtual void set_tmr2if(){ put(get() | TMR2IF); } + virtual void set_ccpif() { put(get() | CCP1IF); } + virtual void set_sspif() { put(get() | SSPIF); } + virtual void set_txif(); + virtual void set_rcif(); + virtual void clear_txif(); + virtual void clear_rcif(); + virtual uint get_txif() { return value.get() & TXIF; } + virtual uint get_rcif() { return value.get() & RCIF; } + virtual void set_adif() { put(get() | ADIF); } + virtual void set_eeif() { put(get() | EEIF); } + + + PIR1v4(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *, PIE *); +}; + + + +//--------------------------------------------------------- +// PIR2 Peripheral Interrupt register # 2 +// +// This is version 1 of the PIR1 register - as seen on the 16f62x + +class PIR2v1 : public PIR +{ + public: + + enum + { + CCP2IF = 1<<0 + }; + + virtual void set_ccpif() + { + put(get() | CCP2IF); + } + + PIR2v1(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *, PIE *); +}; + +//--------------------------------------------------------- +// PIR2 Peripheral Interrupt register # 2 +// +// This is version 2 of the PIR2 register - as seen on the 18xxxx devices +// and devices like the 16c63a. + +class PIR2v2 : public PIR +{ + public: + + enum + { + CCP2IF = 1<<0, + ECCP1IF = 1<<0, /* only on the PIC18F4xx devices */ + TMR3IF = 1<<1, + LVDIF = 1<<2, + HLVDIF = 1<<2, /* 18f26k22 */ + BCLIF = 1<<3, + EEIF = 1<<4, + C2IF = 1<<5, /* 18f14k22 */ + C1IF = 1<<6, /* 18f14k22 */ + CMIF = 1<<6, /* PIC16F87xA, PIC18F4xx devices */ + OSCFIF = 1<<7 /* 18f14k22 */ + }; + + virtual void set_eccp1if() + { + put(get() | ECCP1IF); + } + + virtual void set_ccpif() /* RP - needs to define set_ccpif too! */ + { + put(get() | CCP2IF); + } + + virtual void set_tmr3if() + { + put(get() | TMR3IF); + } + + virtual void set_lvdif() + { + put(get() | LVDIF); + } + + virtual void set_bclif(); + virtual void set_eeif(); + virtual void set_cmif(); + virtual void set_c1if(){ set_cmif();} + virtual void set_c2if(){ set_cmif();} + + PIR2v2(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *, PIE *); +}; + +//--------------------------------------------------------- +// PIR2 Peripheral Interrupt register # 3 +// +// This is version 2 of the PIR2 register - as seen on the 16f88x devices + +class PIR2v3 : public PIR +{ + public: + + enum + { + CCP2IF = 1<<0, + ULPWUIF = 1<<2, + BCLIF = 1<<3, + EEIF = 1<<4, + C1IF = 1<<5, + C2IF = 1<<6, + OSFIF = 1<<7 + }; + + + virtual void set_ccpif() + { + put(get() | CCP2IF); + } + + virtual void set_bclif(); + virtual void set_eeif(); + virtual void set_c1if(); + virtual void set_c2if(); + + PIR2v3(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *, PIE *); +}; + +//--------------------------------------------------------- +// PIR2 Peripheral Interrupt register # 3 +// +// This is version 4 of the PIR2 register - as seen on the 18F4455 devices + +class PIR2v4 : public PIR +{ + public: + + enum + { + CCP2IF = 1<<0, + TMR3IF = 1<<1, + HLVDIF = 1<<2, + BCLIF = 1<<3, + EEIF = 1<<4, + USBIF = 1<<5, + CMIF = 1<<6, + OSCFIF = 1<<7 + }; + + + virtual void set_ccpif(){ + put(get() | CCP2IF); + } + virtual void set_tmr3if() { + put(get() | TMR3IF); + } + virtual void set_hlvdif() { + put(get() | HLVDIF); + } + virtual void set_oscfif() { + put(get() | OSCFIF); + } + + virtual void set_bclif(); + virtual void set_eeif(); + virtual void set_usbif(); + virtual void set_cmif(); + virtual void set_c1if(){ set_cmif(); } + virtual void set_c2if(){ set_cmif(); } + + PIR2v4(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *, PIE *); +}; + +//--------------------------------------------------------- +// PIR2 Peripheral Interrupt register +// +// This is version 5 of the PIR2 register - as seen on the p16f91x devices + +class PIR2v5 : public PIR +{ + public: + + enum { + + CCP2IF = 1<<0, + LVDIF = 1<<2, + LCDIF = 1<<4, + C1IF = 1<<5, + C2IF = 1<<6, + OSFIF = 1<<7 + }; + + virtual void set_ccp2if() { put(get() | CCP2IF); } + virtual void set_lvdif() { put(get() | LVDIF); } + virtual void set_lcdif() { put(get() | LCDIF); } + virtual void set_c1if() { put(get() | C1IF); } + virtual void set_c2if() { put(get() | C2IF); } + virtual void set_osfif() { put(get() | OSFIF); } + + PIR2v5(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *, PIE *); +}; + +//--------------------------------------------------------- +// PIR3 Peripheral Interrupt register # 3 +// +// This is version 1 of the PIR3 register - as seen on the 18F6520 devices + +class PIR3v1 : public PIR +{ + public: + + enum + { + CCP3IF = 1<<0, + CCP4IF = 1<<1, + CCP5IF = 1<<2, + TMR4IF = 1<<3, + TXIF = 1<<4, + RCIF = 1<<5 + }; + + virtual void set_ccpif() /* RP - needs to define set_ccpif too! */ + { + put(get() | CCP3IF); + } + + virtual void set_tmr2if() + { + put(get() | TMR4IF); + } + virtual void set_txif(); + virtual void set_rcif(); + + virtual uint get_txif() + { + return value.get() & TXIF; + } + virtual void clear_txif(); + uint get_rcif() + { + return value.get() & RCIF; + } + virtual void clear_rcif(); + + PIR3v1(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *, PIE *); +}; + +//--------------------------------------------------------- +// PIR3 Peripheral Interrupt register # 3 +// +// This is version 2 of the PIR3 register - as seen on the 18F248 devices +// Perhaps other devices too - it contains bits for the CAN device + +class PIR3v2 : public PIR +{ + public: + + enum + { + RXB0IF = 1<<0, + RXB1IF = 1<<1, + TXB0IF = 1<<2, + TXB1IF = 1<<3, + TXB2IF = 1<<4, + ERRIF = 1<<5, + WAKIF = 1<<6, + IRXIF = 1<<7 + }; + + virtual void set_rxb0if() + { + put(get() | RXB0IF); + } + + virtual void set_rxb1if() + { + put(get() | RXB1IF); + } + + virtual void set_txb0if() + { + put(get() | TXB0IF); + } + + virtual void set_txb1if() + { + put(get() | TXB1IF); + } + + virtual void set_txb2if() + { + put(get() | TXB2IF); + } + + virtual void set_errif() + { + put(get() | ERRIF); + } + + virtual void set_wakif() + { + put(get() | WAKIF); + } + + virtual void set_irxif() + { + put(get() | IRXIF); + } + + PIR3v2(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *, PIE *); +}; + +class PIR3v3 : public PIR +{ + public: + + enum + { + TMR1GIF = 1<<0, + TMR3GIF = 1<<1, + TMR5GIF = 1<<2, + CTMUIF = 1<<3, + TX2IF = 1<<4, + RC2IF = 1<<5, + BCL2IF = 1<<6, + SSP2IF = 1<<7 + }; + PIR3v3(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *, PIE *); +}; + + +/*--------------------------------------------------------- + PIR2 Peripheral Interrupt register # 2 + + This is version 1 of the PIR4 register - as seen on the 18f26k22 +*/ + +class PIR4v1: public PIR +{ + public: + + enum + { + CCP3IF = 1<<0, + CCP4IF = 1<<1, + CCP5IF = 1<<2, + }; + virtual void set_ccp3if() { put(get() | CCP3IF); } + virtual void set_ccp4if() { put(get() | CCP4IF); } + virtual void set_ccp5if() { put(get() | CCP5IF); } + + PIR4v1(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *, PIE *); +}; + +class PIR5v1: public PIR +{ + public: + + enum + { + TMR4IF = 1<<0, + TMR5IF = 1<<1, + TMR6IF = 1<<2, + }; + virtual void set_tmr4if() { put(get() | TMR4IF); } + virtual void set_tmr5if() { put(get() | TMR5IF); } + virtual void set_tmr6if() { put(get() | TMR6IF); } + + PIR5v1(Processor *pCpu, const char *pName, const char *pDesc, + INTCON *, PIE *); +}; + +//------------------------------------------------------------------------ + +class PIR1v1822 : public PIR1v2 +{ + public: + + enum { // rest of bits defined in PIR1v2 + TMR1GIF = 1<<7 + }; + + PIR1v1822(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR1v2(pCpu,pName,pDesc,_intcon, _pie) + { + valid_bits = TMR1IF | TMR2IF | CCP1IF | SSPIF | TXIF | RCIF | ADIF | TMR1GIF; + writable_bits = TMR1IF | TMR2IF | CCP1IF | SSPIF | ADIF | TMR1GIF; + } + + virtual void set_tmr1gif() + { + value.put(value.get() | TMR1GIF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); + } +}; + +class PIR2v1822 : public PIR +{ + public: + + enum { + CCP2IF = 1<<0, // for 16f178[89] + C3IF = 1<<1, // for 16f178[89] + C4IF = 1<<2, // for 16f178[89] + BCLIF = 1<<3, + EEIF = 1<<4, + C1IF = 1<<5, + C2IF = 1<<6, // not 12f1822 + OSFIF = 1<<7 + }; + + PIR2v1822(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) + { + valid_bits = BCLIF | EEIF | C1IF | OSFIF; + writable_bits = BCLIF | EEIF | C1IF | OSFIF; + } + + void set_ccp2if(void) + { + value.put(value.get() | CCP2IF); + if( value.get() & pie->value.get() ) + setPeripheralInterrupt(); + } + + void set_c3if(void) + { + value.put(value.get() | C3IF); + if( value.get() & pie->value.get() ) + setPeripheralInterrupt(); + } + + void set_c4if(void) + { + value.put(value.get() | C4IF); + if( value.get() & pie->value.get() ) + setPeripheralInterrupt(); + } + + void set_bclif(void) + { + value.put(value.get() | BCLIF); + if( value.get() & pie->value.get() ) + setPeripheralInterrupt(); + } + virtual void set_eeif() + { + value.put(value.get() | EEIF); + if( value.get() & pie->value.get() ) + setPeripheralInterrupt(); + } + void set_c1if(void) + { + value.put(value.get() | C1IF); + if( value.get() & pie->value.get() ) + setPeripheralInterrupt(); + } + void set_c2if(void) + { + value.put(value.get() | C2IF); + if( value.get() & pie->value.get() ) + setPeripheralInterrupt(); + } + void set_osfif(void) + { + value.put(value.get() | OSFIF); + if( value.get() & pie->value.get() ) + setPeripheralInterrupt(); + } +}; + +//------------------------------------------------------------------------ + +class PIR3v178x : public PIR +{ + public: + + enum + { + CCP3IF = 1<<4, // PIR3 + PSMC4TIF = 1<<7, + PSMC3TIF = 1<<6, + PSMC2TIF = 1<<5, + PSMC1TIF = 1<<4, + PSMC4SIF = 1<<3, + PSMC3SIF = 1<<2, + PSMC2SIF = 1<<1, + PSMC1SIF = 1<<0, + }; + + PIR3v178x(Processor *pCpu, const char *pName, const char *pDesc,INTCON *_intcon, PIE *_pie) + : PIR(pCpu,pName,pDesc,_intcon, _pie,0) + { + writable_bits = valid_bits = CCP3IF; + } + + void set_ccp3if(void) + { + value.put(value.get() | CCP3IF); + if( value.get() & pie->value.get() ) setPeripheralInterrupt(); + } +}; + +//------------------------------------------------------------------------ +/* + * PIR_SET defines an interface to some common interrupt capabilities. + * PIR_SET is a pure virtual class - you must instantiate a more specific + * version of PIR_SET. + * + * The idea behind PIR_SET is to hide the location of the interrupt bits. + * in some cases, a bit might be in PIR1, in others it might be in PIR2. + * Instead of accessing the register directly, you go through PIR_SET + * and it will find the proper PIR register. + */ +//------------------------------------------------------------------------ + +class PIR_SET +{ + public: + virtual ~PIR_SET() + { + } + + virtual int interrupt_status() + { + return 0; + } + + // uart stuff + virtual bool get_txif() + { + return false; + } + virtual void set_txif() {} + virtual void clear_txif() {} + virtual bool get_rcif() + { + return false; + } + virtual void set_rcif() {} + virtual void clear_rcif() {} + + // ssp stuff + virtual bool get_sspif() + { + return false; + } + virtual void clear_sspif() {} + virtual void set_sspif() {} + virtual void set_bclif() {} + + + virtual void set_sppif() {} + virtual void set_pspif() {} + virtual void set_cmif() {} + virtual void set_c1if() {} + virtual void set_c2if() {} + virtual void set_c3if() {} + virtual void set_c4if() {} + + // eeprom stuff + virtual void set_eeif() {} + + // CCP stuff + virtual void set_ccpif() {} + + // Timer stuff + virtual void set_tmr1if() {} + virtual void set_tmr1gif() {} + virtual void set_tmr2if() {} + virtual void set_adif() {} + + virtual void set_nco1if() { printf("RRR bad set_nco1if() \n");} +}; + + +//---------------------------------------- +// Supports 1 or 2 Pir version 1 registers + +class PIR_SET_1 : public PIR_SET +{ + public: + PIR_SET_1() { pir1 = 0; pir2 = 0;} + + virtual ~PIR_SET_1() + { + } + + void set_pir1(PIR *p1) { pir1 = p1; } + void set_pir2(PIR *p2) { pir2 = p2; } + + virtual int interrupt_status() { + assert(pir1 != 0); + if (pir2 != 0) + return (pir1->interrupt_status() | + pir2->interrupt_status()); + else + return (pir1->interrupt_status()); + } + + // uart stuff + virtual bool get_txif() { + assert(pir1 != 0); + return (pir1->get_txif() != 0); + } + virtual void set_txif() { + assert(pir1 != 0); + pir1->set_txif(); + } + virtual void clear_txif() { + assert(pir1 != 0); + pir1->clear_txif(); + } + virtual bool get_rcif() { + assert(pir1 != 0); + return (pir1->get_rcif() != 0); + } + virtual void set_rcif() { + assert(pir1 != 0); + pir1->set_rcif(); + } + virtual void clear_rcif() { + assert(pir1 != 0); + pir1->clear_rcif(); + } + + // ssp stuff + virtual bool get_sspif() { + assert(pir1 != 0); + return (pir1->get_sspif() != 0); + } + virtual void set_sspif() { + assert(pir1 != 0); + pir1->set_sspif(); + } + virtual void clear_sspif() { + assert(pir1 != 0); + pir1->clear_sspif(); + } + + + // eeprom stuff + virtual void set_eeif() { + assert(pir1 != 0); + pir1->set_eeif(); + } + + // CCP stuff + virtual void set_ccpif() { + assert(pir1 != 0); + pir1->set_ccpif(); + } + + // Timer stuff + virtual void set_tmr1if() { + assert(pir1 != 0); + pir1->set_tmr1if(); + } + virtual void set_tmr2if() { + assert(pir1 != 0); + pir1->set_tmr2if(); + } + + // A/D stuff - not part of base PIR_SET class + virtual void set_adif() { + assert(pir1 != 0); + pir1->set_adif(); + } + // Comparator + virtual void set_cmif() { + assert(pir1 != 0); + pir1->set_cmif(); + } + + virtual void set_c1if() { + assert(pir1 != 0); + pir1->set_c1if(); + } + virtual void set_c2if() { + assert(pir1 != 0); + pir1->set_c2if(); + } + + virtual void set_c3if() { + assert(pir1 != 0); + pir1->set_c3if(); + } + virtual void set_c4if() { + assert(pir1 != 0); + pir1->set_c4if(); + } + + private: + PIR *pir1; + PIR *pir2; +}; + + +// Supports 1, 2 ,3, 4 or 5 Pir registers + +class PIR_SET_2 : public PIR_SET +{ + public: + PIR_SET_2() { pir1 = 0; pir2 = 0; pir3 = 0; pir4 = 0; pir5 = 0;} + + virtual ~PIR_SET_2() + { + } + + void set_pir1(PIR *p1) { pir1 = p1; } + void set_pir2(PIR *p2) { pir2 = p2; } + void set_pir3(PIR *p3) { pir3 = p3; } + void set_pir4(PIR *p4) { pir4 = p4; } + void set_pir5(PIR *p5) { pir5 = p5; } + + virtual int interrupt_status() { + assert(pir1 != 0); + int result = pir1->interrupt_status(); + if ( pir2 != 0 ) + result |= pir2->interrupt_status(); + if ( pir3 != 0 ) + result |= pir3->interrupt_status(); + if ( pir4 != 0 ) + result |= pir4->interrupt_status(); + if ( pir5 != 0 ) + result |= pir5->interrupt_status(); + return result; + } + + // uart stuff + virtual bool get_txif() { + assert(pir1 != 0); + return (pir1->get_txif() != 0); + } + virtual void set_txif() { + assert(pir1 != 0); + pir1->set_txif(); + } + virtual void clear_txif() { + assert(pir1 != 0); + pir1->clear_txif(); + } + virtual bool get_rcif() { + assert(pir1 != 0); + return (pir1->get_rcif() != 0); + } + virtual void set_rcif() { + assert(pir1 != 0); + pir1->set_rcif(); + } + virtual void clear_rcif() { + assert(pir1 != 0); + pir1->clear_rcif(); + } + + // ssp stuff + virtual bool get_sspif() { + assert(pir1 != 0); + return (pir1->get_sspif() != 0); + } + virtual void set_sspif() { + assert(pir1 != 0); + pir1->set_sspif(); + } + virtual void clear_sspif() { + assert(pir1 != 0); + pir1->clear_sspif(); + } + + // spp stuff + virtual bool get_sppif() { + assert(pir1 != 0); + return (pir1->get_sppif() != 0); + } + virtual void set_sppif() { + assert(pir1 != 0); + pir1->set_sppif(); + } + virtual void clear_sppif() { + assert(pir1 != 0); + pir1->clear_sppif(); + } + + // eeprom stuff + virtual void set_eeif() { + assert(pir2 != 0); + pir2->set_eeif(); + } + + // CCP stuff + virtual void set_ccpif() { + assert(pir1 != 0); + pir1->set_ccpif(); + } + + // Timer stuff + virtual void set_tmr1if() { + assert(pir1 != 0); + pir1->set_tmr1if(); + } + virtual void set_tmr1gif() { + assert(pir1 != 0); + pir1->set_tmr1gif(); + } + virtual void set_tmr2if() { + assert(pir1 != 0); + pir1->set_tmr2if(); + } + + // A/D stuff - not part of base PIR_SET class + virtual void set_adif() { + assert(pir1 != 0); + pir1->set_adif(); + } + // Comparator + virtual void set_cmif() { + assert(pir2 != 0); + pir2->set_cmif(); + } + + virtual void set_c1if() { + assert(pir2 != 0); + pir2->set_c1if(); + } + virtual void set_c2if() { + assert(pir2 != 0); + pir2->set_c2if(); + } + + virtual void set_c3if() { + assert(pir2 != 0); + pir2->set_c3if(); + } + + virtual void set_c4if() { + assert(pir2 != 0); + pir2->set_c4if(); + } + + // I2C master + virtual void set_bclif() { + assert(pir2 != 0); + pir2->set_bclif(); + } + + // Parallel Slave Port + virtual void set_pspif() { + assert(pir1 != 0); + pir1->set_pspif(); + } + + private: + PIR *pir1; + PIR *pir2; + PIR *pir3; + PIR *pir4; + PIR *pir5; +}; + + +#endif /* PIR_H */ diff --git a/src/gpsim/registers/pm_rd.cc b/src/gpsim/registers/pm_rd.cc new file mode 100644 index 0000000..94d9d69 --- /dev/null +++ b/src/gpsim/registers/pm_rd.cc @@ -0,0 +1,267 @@ +/* + Copyright (C) 1998-2003 Scott Dattalo + 2003 Mike Durian + 2006,2017 Roy Rankin + 2006 David Barnett + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include + +#include +#include +using namespace std; + + +#include "pic-processor.h" +#include "pm_rd.h" + + +//------------------------------------------------------------------------ +// +// PM-related registers + +void PMCON1::put(uint new_value) +{ + new_value &= valid_bits; + + bool rd_rise = (bool)(new_value & ~value.get() & RD); + value.put((value.get() & RD) | new_value); + + if (rd_rise) pm_rd->start_read(); +} + +uint PMCON1::get() +{ + return(value.get()); +} + +PMCON1::PMCON1(Processor *pCpu, PM_RD *pRd) + : sfr_register(pCpu, "pmcon1", "Program Memory Read Write Control"), + pm_rd(pRd) +{ + valid_bits = PMCON1_VALID_BITS; +} + +void PMCON1_RW::put(uint new_value) +{ + uint diff = value.get() ^ new_value; + + new_value |= 0x80; + value.put(new_value); + + if ((diff & WR) && (new_value & (WR|WREN)) == (WR|WREN)) + { + if ((pm_rw->get_reg_pmcon2())->is_ready_for_write()) + { + if (new_value & FREE) // erase row + pm_rw->erase_row(); + else if (new_value & LWLO) // write to latches + pm_rw->write_latch(); + else + pm_rw->write_row(); // write latches to memory + } + else + new_value |= WRERR; + } + else if (new_value & RD) + pm_rw->start_read(); +} +void PMCON2::put(uint new_value) +{ + if(new_value == value.get()) return; + + value.put(new_value); + if( (state == WAITING) && (0x55 == new_value)) + { + state = HAVE_0x55; + } + else if ( (state == HAVE_0x55) && (0xaa == new_value)) + { + state = READY_FOR_WRITE; + } + else if ((state == HAVE_0x55) || (state == READY_FOR_WRITE)) + { + state = WAITING; + } + +} + +uint PMDATA::get() +{ + return(value.get()); +} + +void PMDATA::put(uint new_value) +{ + value.put(new_value); +} + +PMDATA::PMDATA(Processor *pCpu, const char *pName) + : sfr_register(pCpu, pName, "Program Memory Data") +{} + + +uint PMADR::get() +{ + return(value.get()); +} + +void PMADR::put(uint new_value) +{ + value.put(new_value); +} + + +PMADR::PMADR(Processor *pCpu, const char *pName) + : sfr_register(pCpu, pName, "Program Memory Address") +{} + +// ---------------------------------------------------------- + +PM_RD::PM_RD(pic_processor *pCpu) + : cpu(pCpu), + pmcon1(pCpu,this), + pmdata(pCpu,"pmdatl"), + pmdath(pCpu,"pmdath"), + pmadr(pCpu,"pmadr"), + pmadrh(pCpu,"pmadrh") +{ +} + +void PM_RD::start_read() +{ + rd_adr = pmadr.value.get() | (pmadrh.value.get() << 8); + + get_cycles().set_break(get_cycles().get() + READ_CYCLES, this); +} + +void PM_RD::callback() +{ + // read program memory + if(pmcon1.value.get() & PMCON1::RD) { + int opcode = cpu->pma->get_opcode(rd_adr); + pmdata.value.put(opcode & 0xff); + pmdath.value.put((opcode>>8) & 0xff); + pmcon1.value.put(pmcon1.value.get() & (~PMCON1::RD)); + } +} + +// ---------------------------------------------------------- + +PM_RW::PM_RW(pic_processor *pCpu) + : PM_RD(pCpu), + pmcon1_rw(pCpu,this), + pmcon2(pCpu,this), num_latches(16) +{ + write_latches = new uint [num_latches]; + for(int i = 0; i < num_latches; i++) + write_latches[i] = LATCH_EMPTY; + +} +PM_RW::~PM_RW() +{ + delete[] write_latches; +} + +void PM_RW::callback() +{ + if(pmcon1_rw.value.get() & PMCON1_RW::RD) + { + pmcon1_rw.value.put(pmcon1_rw.value.get() & (~PMCON1_RW::RD)); + return; + } + else if (pmcon1_rw.value.get() & PMCON1_RW::WR) + { +/* + int opcode = pmdata.value.get() | (pmdath.value.get() << 8); + cpu->init_program_memory_at_index(rd_adr, opcode); +*/ + pmcon1_rw.value.put(pmcon1_rw.value.get() & (~PMCON1_RW::WR)); + pmcon2.unarm(); + return; + } +} +void PM_RW::start_read() +{ + rd_adr = pmadr.value.get() | (pmadrh.value.get() << 8); + + if (pmcon1_rw.value.get() & PMCON1_RW::CFGS) + rd_adr |= 0x2000; + + int opcode = cpu->get_program_memory_at_address(rd_adr); + pmdata.value.put(opcode & 0xff); + pmdath.value.put((opcode>>8) & 0xff); + get_cycles().set_break(get_cycles().get() + READ_CYCLES, this); +} +void PM_RW::write_row() +{ + int index; + uint opcode; + rd_adr = pmadr.value.get() | (pmadrh.value.get() << 8); + + if (pmcon1_rw.value.get() & PMCON1_RW::CFGS) + rd_adr |= 0x2000; + + index = rd_adr & (num_latches - 1); + write_latches[index] = pmdata.value.get() | (pmdath.value.get() << 8); + get_cycles().set_break(get_cycles().get() + 2e-3*get_cycles().instruction_cps(), this); + rd_adr &= ~(num_latches - 1); + for(index= 0; index < num_latches; index++) + { + opcode = cpu->get_program_memory_at_address(rd_adr); + if (opcode != LATCH_EMPTY) + fprintf(stderr, "Error write to un-erased program memory address=0x%x\n", rd_adr); + cpu->init_program_memory_at_index(rd_adr, write_latches[index]); + write_latches[index] = LATCH_EMPTY; + rd_adr++; + } + +} + +void PM_RW::erase_row() +{ + int index; + rd_adr = pmadr.value.get() | (pmadrh.value.get() << 8); + + if (pmcon1_rw.value.get() & PMCON1_RW::CFGS) + rd_adr |= 0x2000; + + index = rd_adr & (num_latches - 1); + get_cycles().set_break(get_cycles().get() + 2e-3*get_cycles().instruction_cps(), this); + rd_adr &= ~(num_latches - 1); + + for(index= 0; index < num_latches; index++) + { + cpu->init_program_memory_at_index(rd_adr, LATCH_EMPTY); + write_latches[index] = LATCH_EMPTY; + rd_adr++; + } +} + +void PM_RW::write_latch() +{ + rd_adr = pmadr.value.get() | (pmadrh.value.get() << 8); + + if (pmcon1_rw.value.get() & PMCON1_RW::CFGS) + rd_adr |= 0x2000; + + uint index = rd_adr & (num_latches - 1); + write_latches[index] = pmdata.value.get() | (pmdath.value.get() << 8); + get_cycles().set_break(get_cycles().get() + READ_CYCLES, this); +} diff --git a/src/gpsim/registers/pm_rd.h b/src/gpsim/registers/pm_rd.h new file mode 100644 index 0000000..0e39093 --- /dev/null +++ b/src/gpsim/registers/pm_rd.h @@ -0,0 +1,215 @@ +/* + Copyright (C) 1998-2003 Scott Dattalo + 2003 Mike Durian + 2006 David Barnett + 2017 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef PM_RD_H +#define PM_RD_H + +#include + +#include "gpsim_classes.h" +#include "registers.h" +#include "breakpoints.h" + +class pic_processor; +class PM_RD; +class PM_RW; + +//--------------------------------------------------------- +// PMCON1 - PM control register 1 +// + +class PMCON1 : public sfr_register +{ +public: +enum +{ + RD = (1<<0), +}; + + + PMCON1(Processor *p, PM_RD *); + + void put(uint new_value); + uint get(); + + inline void set_pm(PM_RD *pm) {pm_rd = pm;} + inline void set_valid_bits(uint vb) { valid_bits = vb; } + inline uint get_valid_bits() { return (valid_bits); } + inline void set_bits(uint b) { valid_bits |= b; } + inline void clear_bits(uint b) { valid_bits &= ~b; } + + uint valid_bits = 0; + PM_RD *pm_rd; +}; + +const uint PMCON1_VALID_BITS = (PMCON1::RD); + +class PMCON1_RW : public sfr_register +{ +public: +enum +{ + RD = (1<<0), + WR = (1<<1), + WREN = (1<<2), + WRERR = (1<<3), + FREE = (1<<4), + LWLO = (1<<5), + CFGS = (1<<6) +}; + + + PMCON1_RW(Processor *pCpu, PM_RW *pRW) + : sfr_register(pCpu, "pmcon1", "Program Memory Read Write Control 1"), + pm_rw(pRW) {} + + + void put(uint new_value); + + inline void set_pm(PM_RW *pm) {pm_rw = pm;} + inline void set_valid_bits(uint vb) { valid_bits = vb; } + inline uint get_valid_bits() { return (valid_bits); } + inline void set_bits(uint b) { valid_bits |= b; } + inline void clear_bits(uint b) { valid_bits &= ~b; } + + uint valid_bits; + PM_RW *pm_rw; +}; + +class PMCON2 : public sfr_register +{ +public: + +enum STATES +{ + WAITING = 0, + HAVE_0x55, + READY_FOR_WRITE, +}; + + + + PMCON2(Processor *pCpu, PM_RW *pRW) + : sfr_register(pCpu, "pmcon2", "Program Memory Read Write Control 2"), + pm_rw(pRW), lock1(false), state(WAITING) {;} + + + void put(uint new_value); + PM_RW *pm_rw; + + inline bool is_ready_for_write() {return(state == READY_FOR_WRITE);} + inline void unarm() { state = WAITING; } + + + bool lock1; + enum STATES state; + +}; +// +// PMDATA - PM data register +// + +class PMDATA : public sfr_register +{ +public: + + PMDATA(Processor *p, const char *pName); + + void put(uint new_value); + uint get(); + +}; + +// +// PMADR - PM address register +// + +class PMADR : public sfr_register +{ +public: + + PMADR(Processor *p, const char *pName); + + void put(uint new_value); + uint get(); +}; + + +//------------------------------------------------------------------------ + +// For storing callback and cpu ptr and grouping PM regs +class PM_RD : public TriggerObject +{ +public: + static const uint READ_CYCLES = 2; + + PM_RD(pic_processor *p); + //virtual void set_cpu(pic_processor *p) { cpu = p; } + + virtual void callback(); + virtual void start_read(); + + inline virtual PMCON1 *get_reg_pmcon1() { return (&pmcon1); } + inline virtual PMDATA *get_reg_pmdata() { return (&pmdata); } + inline virtual PMDATA *get_reg_pmdath() { return (&pmdath); } + inline virtual PMADR *get_reg_pmadr() { return (&pmadr); } + inline virtual PMADR *get_reg_pmadrh() { return (&pmadrh); } + + //protected: + pic_processor *cpu; + + PMCON1 pmcon1; + PMDATA pmdata; + PMDATA pmdath; + PMADR pmadr; + PMADR pmadrh; + + uint rd_adr; // latched adr + +}; + +//------------------------------------------------------------------------ +class PM_RW : public PM_RD +{ +public: + inline virtual PMCON1_RW *get_reg_pmcon1_rw() { return (&pmcon1_rw); } + inline virtual PMCON2 *get_reg_pmcon2() { return (&pmcon2); } + PMCON1_RW pmcon1_rw; + PMCON2 pmcon2; + void set_write_enable() { write_enable = true;} + PM_RW(pic_processor *pCpu); + ~PM_RW(); + virtual void callback(); + virtual void start_read(); + virtual void write_latch(); // Place data in write latch + virtual void write_row(); // Write latches to program memory + virtual void erase_row(); + +#define LATCH_EMPTY 0x3fff + bool write_enable; + int num_latches; + uint *write_latches; + +}; + +#endif /* PM_RD_H */ diff --git a/src/gpsim/registers/psp.cc b/src/gpsim/registers/psp.cc new file mode 100644 index 0000000..1800d09 --- /dev/null +++ b/src/gpsim/registers/psp.cc @@ -0,0 +1,247 @@ +/* + Copyright (C) 2006 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include +#include +#include "config.h" +#include "stimuli.h" +#include "psp.h" + +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("%s:%d-%s() ",__FILE__,__LINE__,__FUNCTION__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +//-------------------------------------------------- +// +//-------------------------------------------------- + + +class CS_SignalSink : public SignalSink +{ +public: + CS_SignalSink(PSP *_psp) + : m_psp(_psp) + { + assert(_psp); + } + virtual void release(){ delete this;} + + void setSinkState(char new3State) + { + m_psp->setCS_State(new3State); + } +private: + PSP *m_psp; +}; + +class RD_SignalSink : public SignalSink +{ +public: + RD_SignalSink(PSP *_psp) + : m_psp(_psp) + { + assert(_psp); + } + virtual void release(){ delete this;} + + void setSinkState(char new3State) + { + m_psp->setRD_State(new3State); + } +private: + PSP *m_psp; +}; + +class WR_SignalSink : public SignalSink +{ +public: + WR_SignalSink(PSP *_psp) + : m_psp(_psp) + { + assert(_psp); + } + virtual void release(){delete this;} + + void setSinkState(char new3State) + { + m_psp->setWR_State(new3State); + } +private: + PSP *m_psp; +}; + + +/* + * Some devices use high bits of a TRIS register, but others + * have a dedicated PSPCON register which is defined here + */ + +PSPCON::PSPCON(Processor *pCpu, const char *pName, const char *pDesc) + : sfr_register(pCpu, pName, pDesc) +{ +} +void PSPCON::put(uint new_value) +{ + uint mask = (PSP::OBF | PSP::IBF | 0x0f); + uint fixed; + + if (! (new_value & PSP::PSPMODE)) + fixed = 0; + else + fixed = value.data & mask; + + value.data = (new_value & ~mask) | fixed; +} + +void PSPCON::put_value(uint new_value) +{ + value.data = new_value; +} +// +// setup information for PSP module +// +void PSP::initialize( PIR_SET *_pir_set, PicPSP_PortRegister *_port_set, + PicTrisRegister *_port_tris, sfr_register *_pspcon, + PinModule *pin_RD, PinModule *pin_WR, PinModule *pin_CS) +{ + pir_set = _pir_set; + parallel_port = _port_set; + parallel_port->setPSP(this); + parallel_tris = _port_tris; + cntl_tris = _pspcon; + // + // The rest of this function allows catching of changes to PSP contol signals + // + if (!m_rd_sink) + { + m_rd_sink = new RD_SignalSink(this); + Not_RD = pin_RD; + if (Not_RD) + Not_RD->addSink(m_rd_sink); + } + if (!m_cs_sink) + { + m_cs_sink = new CS_SignalSink(this); + Not_CS = pin_CS; + if (Not_CS) + Not_CS->addSink(m_cs_sink); + } + if (!m_wr_sink) + { + m_wr_sink = new WR_SignalSink(this); + Not_WR = pin_WR; + if (Not_WR) + Not_WR->addSink(m_wr_sink); + } + +} +// +// process changes on the control pins +// +void PSP::state_control() +{ + if (! pspmode()) return; + + if (rd && wr && cs) // this is an error condition + { + cerr << "PSP: Error CS, WR and RD must not all be low\n"; + parallel_tris->put(0xff); + state = ST_INACTIVE; + return; + } + else if (cs && rd) + { + parallel_tris->put(0); + parallel_port->put_value(put_value); + cntl_tris->put_value(cntl_tris->get() & ~OBF); + state = ST_READ; + } + else if (cs && wr) + { + parallel_tris->put(0xff); + get_value = parallel_port->get_value(); + state = ST_WRITE; + } + else + { + if (state != ST_INACTIVE) + { + pir_set->set_pspif(); + } + + // + // On first bus write set IBF flag. + // if a second bus write occurs prior to read of pic port (portd) + // IBOV flag is also set. + // + if (state == ST_WRITE) + { + uint trise_val = cntl_tris->get(); + if (trise_val & IBF) + cntl_tris->put_value(trise_val | IBOV); + else + cntl_tris->put_value(trise_val | IBF); + } + + parallel_tris->put(0xff); + state = ST_INACTIVE; + } + return; +} +// +// The next three functions are called when their control pin change state +// The control pins are active low which is converted to active high signals +void PSP::setRD_State(char new3State) +{ + rd = new3State == '0'; + state_control(); +} +void PSP::setCS_State(char new3State) +{ + cs = new3State == '0'; + state_control(); +} +void PSP::setWR_State(char new3State) +{ + wr = new3State == '0'; + state_control(); +} + +// +// psp_put is called on write to portd when pspmode is active +// set OBF register bit and save value for next bus read +// +void PSP::psp_put(uint new_value) +{ + cntl_tris->put_value(cntl_tris->get() | OBF); + put_value = new_value; +} +// +// psp_get is called on read of portd when pspmode is active so +// we can clear the IBF flag +// +uint PSP::psp_get(void) +{ + cntl_tris->put_value(cntl_tris->get() & ~IBF); + return(get_value); +} diff --git a/src/gpsim/registers/psp.h b/src/gpsim/registers/psp.h new file mode 100644 index 0000000..eb06f27 --- /dev/null +++ b/src/gpsim/registers/psp.h @@ -0,0 +1,97 @@ +/* + Copyright (C) 2006 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __PSP_H__ +#define __PSP_H__ + +#include "pic-processor.h" +#include "14bit-registers.h" +#include "pic-ioports.h" +#include "pir.h" + +class RD_SignalSink; +class CS_SignalSink; +class WR_SignalSink; +class PicPSP_PortRegister; +class PicTrisRegister; + +class PSPCON : public sfr_register, public TriggerObject +{ +public: + PSPCON(Processor *pCpu, const char *pName, const char *pDesc); + virtual void put(uint new_value); + virtual void put_value(uint new_value); +}; + +class PSP +{ +public: + void initialize( PIR_SET *pir_set, PicPSP_PortRegister *port_set, + PicTrisRegister *port_tris, sfr_register *PSPcon, + PinModule *pin_RD, PinModule *pin_CS, PinModule *pin_WR); + void setRD_State(char new3State); + void setCS_State(char new3State); + void setWR_State(char new3State); + void ParallelSetbit(int m_iobit,char cNewSinkState); + void state_control(void); + bool pspmode(void) { return((cntl_tris->get() & PSPMODE) == PSPMODE);} + void psp_put(uint new_value); + uint psp_get(void); + + PSP() { m_rd_sink=0; m_cs_sink=0; m_wr_sink=0; state=0;} + + enum { + TRIS_MASK = 7, + PSPMODE = 1<<4, + IBOV = 1<<5, + OBF = 1<<6, + IBF = 1<<7 + }; +protected: + + enum { + ST_INACTIVE = 0, + ST_READ, + ST_WRITE + }; + + uint put_value = 0; + uint get_value = 0; + int state = 0; + + bool rd = false; + bool cs = false; + bool wr = false; + + PIR_SET *pir_set = nullptr; + PicPSP_PortRegister *parallel_port = nullptr; + PicTrisRegister *parallel_tris = nullptr; + sfr_register *cntl_tris = nullptr; + + PinModule *Not_RD = nullptr; + PinModule *Not_CS = nullptr; + PinModule *Not_WR = nullptr; + + RD_SignalSink *m_rd_sink = nullptr; + CS_SignalSink *m_cs_sink = nullptr; + WR_SignalSink *m_wr_sink = nullptr; +}; + +#endif // __PSP_H__ diff --git a/src/gpsim/registers/rcon.h b/src/gpsim/registers/rcon.h new file mode 100644 index 0000000..4f942f6 --- /dev/null +++ b/src/gpsim/registers/rcon.h @@ -0,0 +1,63 @@ +/* + * Copyright (C) 1998-2007 T. Scott Dattalo + * Copyright (C) 2007 Roy R Rankin + * +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef RCON_H +#define RCON_H + +// The methods of this class are typically called from Status_register +//--------------------------------------------------------- +class RCON : public sfr_register +{ +public: + + enum + { + BOR = 1<<0, + POR = 1<<1, + PD = 1<<2, + TO = 1<<3, + RI = 1<<4, + LWRT = 1<<6, + IPEN = 1<<7 + }; + RCON(Processor *, const char *pName, const char *pDesc=0); + + inline void put_PD(uint new_pd) + { + value.put((value.get() & ~PD) | ((new_pd) ? PD : 0)); + } + + inline uint get_PD() + { + return( ( (value.get() & PD) == 0) ? 0 : 1); + } + + inline void put_TO(uint new_to) + { + value.put((value.get() & ~TO) | ((new_to) ? TO : 0)); + } + inline uint get_TO() + { + return( ( (value.get() & TO) == 0) ? 0 : 1); + } +}; + +#endif // RCON_H diff --git a/src/gpsim/stimuli.cc b/src/gpsim/stimuli.cc new file mode 100644 index 0000000..f50d25d --- /dev/null +++ b/src/gpsim/stimuli.cc @@ -0,0 +1,988 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + Copyright (C) 2006,2015 Roy R Rankin + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "config.h" +#include "pic-processor.h" +#include "stimuli.h" +#include "errors.h" + +//#define DEBUG +#if defined(DEBUG) +#define Dprintf(arg) {printf("%s:%d-%s() ",__FILE__,__LINE__,__FUNCTION__); printf arg; } +#else +#define Dprintf(arg) {} +#endif + +static char num_nodes = 'a'; + +/* + * stimulus.cc + * + * This file contains some rudimentary infrastructure to support simulating + * the environment outside of the pic. Simple net lists interconnecting pic + * I/O pins and various signal generators may be created. + * + * Details: + * There are two basic concepts behind the stimulus code: nodes and stimuli. + * The nodes are like wires and the stimuli are like sources and loads. The + * nodes define the interconnectivity between the stimuli. In most cases there + * will be only two stimuli connected by one node. For example, you may wish + * to simulate the effects of a clock input connected to porta.0 . In this case, + * the stimuli would be the external clock and the pic I/O pin. + */ + +Stimulus_Node::Stimulus_Node(const char *n) + : TriggerObject(0) +{ + warned = 0; + voltage = 0; + Cth = 0.0; + Zth = 0.0; + current_time_constant = 0.0; + delta_voltage = 0.0; + minThreshold = 0.1; // volts + cap_start_cycle = 0; + future_cycle = 0; + initial_voltage = 0.0; + DCVoltage = 0.0; + bSettling = false; + stimuli = 0; + nStimuli = 0; + settlingTimeStep = 0; + + if(n) gpsimObject::new_name(n); + else + { + char name_str[100]; + snprintf(name_str,sizeof(name_str),"node%d",num_nodes); + num_nodes++; // %%% FIX ME %%% + gpsimObject::new_name(name_str); + } +} + +Stimulus_Node::~Stimulus_Node() +{ + stimulus *sptr; + + sptr = stimuli; + while(sptr) + { + sptr->detach(this); + sptr = sptr->next; + } + +} + +Stimulus_Node * Stimulus_Node::construct(const char * psName) +{ + return new Stimulus_Node(psName); +} + +void Stimulus_Node::new_name(const char *cPname, bool bClearableSymbol) +{ + cout << " Warning ignoring stimulus node name change from " + << name() << " to " << cPname < cap_start_cycle) // RC calculation in progress, get current value + callback(); + + return(voltage); +} + +string Stimulus_Node::toString() +{ + string out = name() + " : " + showType(); + + for(stimulus *pt = stimuli; pt; pt = pt->next) + { + out += "\n\n " + pt->name() + pt->toString(); + } + return out; +} + +// +// Add the stimulus 's' to the stimulus list for this node +// +void Stimulus_Node::attach_stimulus(stimulus *s) +{ + if (!s) return; + + stimulus *sptr; + warned = 0; + + if(stimuli) + { + sptr = stimuli; + bool searching=1; + int nTotalStimuliConnected = 1; + + while( searching ) + { + if(s == sptr) return; // The stimulus is already attached to this node. + + nTotalStimuliConnected++; + if(sptr->next == 0) + { + sptr->next = s; + searching=0; + } + sptr = sptr->next; + } + nStimuli = nTotalStimuliConnected; + } + else + { + stimuli = s; // This is the first stimulus attached to this node. + nStimuli = 1; + } + // If we reach this point, then it means that the stimulus that we're + // trying to attach has just been placed at the end of the the stimulus + // list for this node. So we need to 0 terminate the singly-linked list. + + s->next = 0; + + // Now tell the stimulus to attach itself to the node too (If it hasn't already.) + s->attach(this); +} + +// +// Search for the stimulus 's' in the stimulus list for this node. +// If it is found, then remove it from the list. +// +void Stimulus_Node::detach_stimulus( stimulus* s ) +{ + if(!s) return; // You can't remove a non-existant stimulus + + stimulus *sptr; + + if(stimuli) + { + if(s == stimuli) + { + // This was the first stimulus in the list. + + stimuli = s->next; + s->detach(this); + nStimuli--; + } + else + { + sptr = stimuli; + + do + { + if(s == sptr->next) + { + sptr->next = s->next; + s->detach(this); + nStimuli--; + //gi.node_configuration_changed(this); + return; + } + sptr = sptr->next; + } while(sptr); + } + } +} + +//------------------------------------------------------------------------ +// +// Stimulus_Node::update(uint64_t current_time) +// +// update() is called whenever a stimulus attached to this node changes states. +// +void Stimulus_Node::update( uint64_t current_time ) +{ + update(); // So far, 'update' only applies to the current time. +} + +//------------------------------------------------------------------------ +// refresh() - compute the Thevenin voltage and Thevenin impedance +// +void Stimulus_Node::refresh() +{ + if(stimuli) + { + stimulus *sptr = stimuli; + + initial_voltage = get_nodeVoltage(); + + switch (nStimuli) + { + case 0: + // hmm, strange nStimuli is 0, but the stimuli pointer is non null. + break; + + case 1: + // Only one stimulus is attached. + DCVoltage = sptr->get_Vth(); // RP - was just voltage + Zth = sptr->get_Zth(); + break; + + case 2: + // 2 stimuli are attached to the node. This is the typical case + // and we'll optimize for it. + { + stimulus *sptr2 = sptr ? sptr->next : 0; + if(!sptr2) break; // error, nStimuli is two, but there aren't two stimuli + + double V1,Z1,C1; + double V2,Z2,C2; + sptr->getThevenin(V1,Z1,C1); + sptr2->getThevenin(V2,Z2,C2); + DCVoltage = (V1*Z2 + V2*Z1) / (Z1+Z2); + Zth = Z1*Z2/(Z1+Z2); + Cth = C1+C2; + } + break; + + default: + { + /* + There are 3 or more stimuli connected to this node. Recall + that these are all in parallel. The Thevenin voltage and + impedance for this is: + + Thevenin impedance: + Zt = 1 / sum(1/Zi) + + Thevenin voltage: + + Vt = sum( Vi / ( ((Zi - Zt)/Zt) + 1) ) + = sum( Vi * Zt /Zi) + = Zt * sum(Vi/Zi) + */ + + double conductance=0.0; // Thevenin conductance. + Cth=0; + DCVoltage=0.0; + + //cout << "multi-node summing:\n"; + while(sptr) { + + double V1,Z1,C1; + sptr->getThevenin(V1,Z1,C1); + /* + cout << " N: " <name() + << " V=" << V1 + << " Z=" << Z1 + << " C=" << C1 << endl; + */ + + double Cs = 1 / Z1; + DCVoltage += V1 * Cs; + conductance += Cs; + Cth += C1; + sptr = sptr->next; + } + Zth = 1.0/conductance; + DCVoltage *= Zth; + } + } + current_time_constant = Cth * Zth; + Dprintf(("%s DCVoltage %.3f voltage %.3f Cth=%.2e Zth=%2e time_constant %fsec or %" PRINTF_GINT64_MODIFIER "d cycles now=%" PRINTF_GINT64_MODIFIER "d \n",name().c_str(), DCVoltage, voltage, Cth, Zth, current_time_constant, (uint64_t)(current_time_constant*get_cycles().instruction_cps()), get_cycles().get())); + + if (((uint64_t)(current_time_constant*get_cycles().instruction_cps()) < 5) || + (fabs(DCVoltage - voltage) < minThreshold)) + { + if (future_cycle) // callback is active + { + get_cycles().clear_break(this); + } + voltage = DCVoltage; + future_cycle = 0; + } + else + { + settlingTimeStep = calc_settlingTimeStep(); + voltage = initial_voltage; + + // If future_cycle is not 0 we are in the middle of an RC + // calculation, but an input condition has changed. + + if (future_cycle && (get_cycles().get() > cap_start_cycle)) callback(); + else + { + if (future_cycle) get_cycles().clear_break(this); + cap_start_cycle = get_cycles().get(); + future_cycle = cap_start_cycle + settlingTimeStep; + get_cycles().set_break(future_cycle,this); + } + } + } +} + +uint64_t Stimulus_Node::calc_settlingTimeStep() +{ + /* Select a time interval where the voltage does not change more + than about 0.125 volts in each step(unless timestep < 1). + First we calculate dt_dv = CR/V with dt in cpu cycles to + determine settling time step + */ + uint64_t TimeStep; + double dv = fabs(DCVoltage - voltage); + + // avoid divide by zero + if (dv < 0.000001) dv = 0.000001; + + double dt_dv = get_cycles().instruction_cps()*current_time_constant/dv; + TimeStep = (uint64_t) (0.125 * dt_dv); + TimeStep = (TimeStep) ? TimeStep : 1; + + Dprintf(("%s dt_dv = %.2f TimeStep 0x%" PRINTF_GINT64_MODIFIER "x now 0x%" PRINTF_GINT64_MODIFIER "x\n", __FUNCTION__, dt_dv, TimeStep, get_cycles().get())); + + return(TimeStep); +} + +//------------------------------------------------------------------------ +// updateStimuli +// drive all the stimuli connected to this node. + +void Stimulus_Node::updateStimuli() +{ + stimulus *sptr = stimuli; + + while(sptr) + { + sptr->set_nodeVoltage(voltage); + sptr = sptr->next; + } +} + +void Stimulus_Node::update() +{ + if(stimuli) + { + refresh(); + updateStimuli(); + } +} + +void Stimulus_Node::set_nodeVoltage(double v) +{ + voltage = v; + updateStimuli(); +} + +void Stimulus_Node::callback() +{ + initial_voltage = voltage; + double Time_Step; + double expz; + // + // increase time step as capacitor charges more slowly as final + // voltage is approached. + // + + // + // The following is an exact calculation, assuming no circuit + // changes, regardless of time step. + // + Time_Step = (get_cycles().get() - cap_start_cycle)/ + (get_cycles().instruction_cps()*current_time_constant); + expz = exp(-Time_Step); + voltage = DCVoltage - (DCVoltage - voltage)*expz; + + if (fabs(DCVoltage - voltage) < minThreshold) + { + voltage = DCVoltage; + if (future_cycle) get_cycles().clear_break(this); + future_cycle = 0; + + Dprintf(("%s DC Voltage %.2f reached at 0x%" PRINTF_GINT64_MODIFIER "x cycles\n", name().c_str(), DCVoltage, get_cycles().get())); + } + else if(get_cycles().get() >= future_cycle) // got here via break + { + settlingTimeStep = calc_settlingTimeStep(); + cap_start_cycle = get_cycles().get(); + get_cycles().clear_break(this); + future_cycle = cap_start_cycle + settlingTimeStep; + get_cycles().set_break(future_cycle, this); + + } + else // updating value before break don't increase step size + { + cap_start_cycle = get_cycles().get(); + get_cycles().reassign_break(future_cycle, + cap_start_cycle + settlingTimeStep, this); + future_cycle = get_cycles().get() + settlingTimeStep; + } + updateStimuli(); +} + +void Stimulus_Node::callback_print() +{ + cout << "Node: " << name() ; + TriggerObject::callback_print(); +} + +//------------------------------------------------------------------------ + +stimulus::stimulus( const char *cPname, double _Vth, double _Zth) + : Value(cPname, "", 0),snode(0), next(0), + bDrivingState(false), bDriving(false), + Vth(_Vth), Zth(_Zth), + Cth(0.0), // Farads + nodeVoltage(0.0) // volts +{ +} + +void stimulus::new_name(const char *cPname, bool bClearableSymbol) +{ + gpsimObject::new_name( cPname ); +} + +void stimulus::new_name(string &rName, bool bClearableSymbol) +{ + new_name(rName.c_str(),bClearableSymbol); +} + +stimulus::~stimulus(void) +{ + if(snode) snode->detach_stimulus(this); +} + +void stimulus::show() +{ +} + +string stimulus::toString() +{ + ostringstream s; + + s << " stimulus "; + if(snode) + s << " attached to " << snode->name(); + s << endl + << " Vth=" << get_Vth() << "V" + << " Zth=" << get_Zth() << " ohms" + << " Cth=" << get_Cth() << "F" + << " nodeVoltage= " << get_nodeVoltage() << "V" + << endl + << " Driving=" << getDriving() + << " drivingState=" << getDrivingState() + << " drivenState=" << getDrivenState() + << " bitState=" << getBitChar(); + + return s.str(); +} +void stimulus::attach(Stimulus_Node *s) +{ + detach(snode); + snode = s; +} +void stimulus::detach( Stimulus_Node *s ) +{ + if( snode == s ) snode = 0; +} + +void stimulus::getThevenin(double &v, double &z, double &c) +{ + v = get_Vth(); + z = get_Zth(); + c = get_Cth(); +} + +//======================================================================== +// +PinMonitor::PinMonitor() +{ +} + +PinMonitor::~PinMonitor() +{ + // Release all of the sinks: + list :: iterator ssi = sinks.begin(); + while (ssi != sinks.end()) + { + Dprintf(("release sink %p\n", *ssi)); + fflush(stdout); + (*ssi)->release(); + ++ssi; + } + + list :: iterator asi = analogSinks.begin(); + while (asi != analogSinks.end()) + { + (*asi)->release(); + ++asi; + } +} + +void PinMonitor::addSink(SignalSink *new_sink) +{ + if(new_sink) sinks.push_back(new_sink); +} + +void PinMonitor::removeSink(SignalSink *pSink) +{ + if(pSink) sinks.remove(pSink); +} + +void PinMonitor::addSink(AnalogSink *new_sink) +{ + if(new_sink) analogSinks.push_back(new_sink); +} + +void PinMonitor::removeSink(AnalogSink *pSink) +{ + if(pSink) analogSinks.remove(pSink); +} + +//======================================================================== +// +IOPIN::IOPIN(const char *_name, + double _Vth, + double _Zth, + double _ZthWeak, + double _ZthFloating + ) + : stimulus(_name,_Vth, _Zth), + bDrivenState(false), + m_monitor(0), + ZthWeak(_ZthWeak), ZthFloating(_ZthFloating), + l2h_threshold(2.0), // PICs are CMOS and use CMOS-like thresholds + h2l_threshold(1.0), + Vdrive_high(4.4), + Vdrive_low(0.6), + m_type( BI_DIRECTIONAL ) +{ + is_analog = false; + m_picPin = 0l; +} + +IOPIN::~IOPIN() +{ + if (m_monitor) ((PinModule *)m_monitor)->clrPin(); +} + +void IOPIN::set_digital_threshold(double vdd) +{ + set_l2h_threshold(vdd > 4.5 ? 2.0 : 0.25 * vdd + 0.8); + set_h2l_threshold(vdd > 4.5 ? 0.8 : 0.15 * vdd); + Vdrive_high = vdd - 0.6; + Vdrive_low = 0.6; +} + +void IOPIN::setMonitor(PinMonitor *new_pinMonitor) +{ + if (m_monitor && new_pinMonitor) cout << "IOPIN already has a monitor!" << endl; + else m_monitor = new_pinMonitor; +} + +void IOPIN::get(char *return_str, int len) +{ + if (return_str) + { + if (get_direction() == DIR_OUTPUT) + strncpy(return_str, IOPIN::getDrivingState()?"1": "0", len); + else + strncpy(return_str, IOPIN::getState()?"1": "0", len); + } +} + +void IOPIN::attach(Stimulus_Node *s) +{ + snode = s; +} + +void IOPIN::show() +{ + stimulus::show(); +} + +void IOPIN::set_nodeVoltage( double new_nodeVoltage ) +{ + nodeVoltage = new_nodeVoltage; + + if ( nodeVoltage < h2l_threshold ) setDrivenState(false); // The voltage is below the low threshold + else if( nodeVoltage > l2h_threshold ) setDrivenState(true); // The voltage is above the high threshold +} + +//------------------------------------------------------------ +// putState - called by peripherals when they wish to +// drive an I/O pin to a new state. + +void IOPIN::putState(bool new_state) +{ + if(new_state != bDrivingState) + { + bDrivingState = new_state; + Vth = bDrivingState ? Vdrive_high : Vdrive_low; + + // If this pin is tied to a node, then update the node. + // Note that when the node is updated, then the I/O port + // (if there is one) holding this I/O pin will get updated. + // If this pin is not tied to a node, then try to update + // the I/O port directly. + + if(snode) snode->update(); + } + if(m_monitor) m_monitor->putState(new_state?'1':'0'); +} + +void IOPIN::putState(double new_Vth) +{ + if( new_Vth != Vth ) + { + Vth = new_Vth; + + if (Vth <= 0.3) bDrivingState = false; + else bDrivingState = true; + + // If this pin is tied to a node, then update the node. + if(snode) snode->update(); + } + if(m_monitor) m_monitor->putState(bDrivingState?'1':'0'); +} + +bool IOPIN::getState() +{ + return getDriving() ? getDrivingState() : getDrivenState(); +} + +void IOPIN::setDrivingState(bool new_state) +{ + bDrivingState = new_state; + if(m_monitor) m_monitor->setDrivingState(bDrivingState?'1':'0'); +} + +void IOPIN::setDrivingState(char new3State) +{ + bDrivingState = (new3State=='1' || new3State=='W'); + + if( m_picPin ) m_picPin->update_state( bDrivingState ); // SimulIDE Pic pin + + if( m_monitor ) m_monitor->setDrivingState( new3State ); +} + +bool IOPIN::getDrivingState(void) +{ + return bDrivingState; +} + +bool IOPIN::getDrivenState() +{ + return bDrivenState; +} + +//------------------------------------------------------------------------ +// setDrivenState +// +// An stimulus attached to this pin is driving us to a new state. +// This state will be recorded and propagate up to anything +// monitoring this pin. + +void IOPIN::setDrivenState(bool new_state) +{ + bDrivenState = new_state; + + // Propagate the new state to those things monitoring this pin. + // (note that the 3-state value is what's propagated). + if(m_monitor /*&& !is_analog*/ ) // SimulIDE + { + m_monitor->setDrivenState(getBitChar()); + } +} + +void IOPIN::toggle() +{ + putState((bool) (getState() ^ true)); +} + +/************************************* + * int IOPIN::get_Vth() + * + * If this iopin has a stimulus attached to it then + * the voltage will be dictated by the stimulus. Otherwise, + * the voltage is determined by the state of the ioport register + * that is inside the pic. For an input (like this), the pic code + * that is being simulated can not change the state of the I/O pin. + * However, the user has the ability to modify the state of + * this register either by writing directly to it in the cli, + * or by clicking in one of many places in the gui. + */ +double IOPIN::get_Vth() +{ + return Vth; +} + +char IOPIN::getBitChar() +{ + if(snode ) + { // was return 'Z'; // High impedance - unknown state. + if( snode->get_nodeZth() > ZthFloating ) return 'Z'; + if( snode->get_nodeZth() > ZthWeak ) return getDrivenState() ? 'W' : 'w'; + } + return getDrivenState() ? '1' : '0'; +} + +//======================================================================== +// +IO_bi_directional::IO_bi_directional(const char *_name, + double _Vth, + double _Zth, + double _ZthWeak, + double _ZthFloating, + double _VthIn, + double _ZthIn) + : IOPIN(_name, _Vth, _Zth, _ZthWeak, _ZthFloating), + ZthIn(_ZthIn), VthIn(_VthIn) +{ +} + +void IO_bi_directional::set_nodeVoltage( double new_nodeVoltage) +{ + IOPIN::set_nodeVoltage(new_nodeVoltage); +} + +double IO_bi_directional::get_Vth() +{ + if( getDriving() ) return getDrivingState() ? Vth : 0; + + return VthIn; +} + +double IO_bi_directional::get_Zth() +{ + return getDriving() ? Zth : ZthIn; +} + +/* getBitChar() returns bit status as follows + Input pin + 1> Pin considered floating, + return 'Z' + 2> Weak Impedance on pin, + return 'W" if high or 'w' if low + 3> Pin being driven externally + return '1' node voltage high '0' if low + Output pin + 1> Node voltage opposite driven value + return 'X' if node voltage high or 'x' if inode voltage low + 2> Node voltage same as driven value + return '1' node voltage high '0' if low +*/ + +char IO_bi_directional::getBitChar() +{ + if(snode) + { + if (!getDriving()) // input pin + { + if(snode->get_nodeZth() > ZthFloating) return 'Z'; + + if(snode->get_nodeZth() > ZthWeak) return getDrivenState() ? 'W' : 'w'; + } + else if(getDrivenState() != getDrivingState()) return getDrivenState() ? 'X' : 'x'; + } + return getDrivenState() ? '1' : '0'; +} + +//--------------- +//::update_direction(uint new_direction) +// +// This is called when a new value is written to the tris register +// with which this bi-direction pin is associated. + +void IO_bi_directional::update_direction( uint new_direction, bool refresh ) +{ + bool out = new_direction ? true : false; + + setDriving( out ); + + // If this pin is not associated with an IO Port, but it's tied + // to a stimulus, then we need to update the stimulus. + + if( m_picPin ) m_picPin->update_direction( out ); // SimulIDE Pic pin + + if( refresh && snode ) snode->update(); +} + +void IO_bi_directional::putState(bool new_state) +{ + IOPIN::putState(new_state); +} + +void IO_bi_directional::putState(double new_Vth) +{ + VthIn = new_Vth; + IOPIN::putState(new_Vth); +} + +IO_bi_directional_pu::IO_bi_directional_pu(const char *_name, + double _Vth, + double _Zth, + double _ZthWeak, + double _ZthFloating, + double _VthIn, + double _ZthIn, + double _Zpullup) + : IO_bi_directional(_name, _Vth, _Zth, _ZthWeak, + _ZthFloating, _VthIn, _ZthIn), + Zpullup(_Zpullup) +{ + Vpullup = Vth; + bPullUp = false; +} + +IO_bi_directional_pu::~IO_bi_directional_pu(void) +{ +} + +void IO_bi_directional_pu::set_is_analog(bool flag) +{ + //cout << "IO_bi_directional_pu::set_is_analog Ignoring "<update(); + //else if (!getDriving()) setDrivenState( bPullUp /*&& !is_analog*/ ); + } +} + +void IO_bi_directional_pu::update_pullup( char new_state, bool refresh ) +{ + bool bNewPullupState = new_state == '1' || new_state == 'W'; + if (bPullUp != bNewPullupState) + { + bPullUp = bNewPullupState; + if (refresh) + { + // If there is a node attached to the pin, then we already + // know the driven state. If there is no node attached and + // this pin is configured as an input, then let the drivenState + // be the same as the pullup state. + if (snode) snode->update(); + else if (!getDriving()) setDrivenState(bPullUp && !is_analog); + } + if( m_picPin ) m_picPin->update_pullup( bPullUp ); // SimulIDE Pic pin + } +} + +double IO_bi_directional_pu::get_Zth() +{ + return getDriving() ? Zth : ((bPullUp && ! is_analog)? Zpullup : ZthIn); +} + +double IO_bi_directional_pu::get_Vth() +{ + // If the pin is configured as an output, then the driving voltage + // depends on the pin state. If the pin is an input, and the pullup resistor + // is enabled, then the pull-up resistor will 'drive' the output. The + // open circuit voltage in this case will be Vth (the thevenin voltage, + // which is assigned to be same as the processor's supply voltage). + + if(getDriving()) return getDrivingState() ? Vth : 0; + else return (bPullUp && !is_analog) ? Vpullup : VthIn; +} + +/* + getBitChar() returns bit status as follows + Input pin + 1> Pin considered floating, + return 'Z' + 2> Weak Impedance on pin, + return 'W" if high or 'w' if low + 3> Pin being driven externally + return '1' node voltage high '0' if low + Output pin + 1> Node voltage opposite driven value + return 'X' if node voltage high or 'x' if inode voltage low + 2> Node voltage same as driven value + return '1' node voltage high '0' if low +*/ + +char IO_bi_directional_pu::getBitChar() +{ + if(snode) + { + if (!getDriving()) // input pin + { + if(snode->get_nodeZth() > ZthFloating) return 'Z'; + + if(snode->get_nodeZth() > ZthWeak) + return getDrivenState() ? 'W' : 'w'; + } + else if(getDrivenState() != getDrivingState()) + return getDrivenState() ? 'X' : 'x'; + } + return getDrivenState() ? '1' : '0'; +} + +IO_open_collector::IO_open_collector(const char *_name) + : IO_bi_directional_pu(_name) +{ + m_type = OPEN_COLLECTOR; +} + +double IO_open_collector::get_Vth() +{ + if(getDriving() && !getDrivingState()) return 0.0; + + return bPullUp ? Vpullup : VthIn; +} + +double IO_open_collector::get_Zth() +{ + if(getDriving() && !getDrivingState()) return Zth; + + return bPullUp ? Zpullup : ZthIn; +} + +char IO_open_collector::getBitChar() +{ + if(snode) + { + if(snode->get_nodeZth() > ZthFloating) + return bPullUp ? 'W' : 'Z'; + + if(getDriving() && getDrivenState() && !getDrivingState()) + return 'X'; + + if(snode->get_nodeZth() > ZthWeak) + return getDrivenState() ? 'W' : 'w'; + else + return getDrivenState() ? '1' : '0'; + } + return getDrivingState() ? 'W' : '0'; +} + diff --git a/src/gpsim/stimuli.h b/src/gpsim/stimuli.h new file mode 100644 index 0000000..b12ca42 --- /dev/null +++ b/src/gpsim/stimuli.h @@ -0,0 +1,457 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#ifndef __STIMULI_H__ +#define __STIMULI_H__ + +#include +using namespace std; +#include + +#include "gpsim_classes.h" +#include "breakpoints.h" +#include "piccomponentpin.h" + + +class Stimulus_Node; +class stimulus; +class IOPIN; +class symbol; + +typedef list SymbolList_t; +typedef list StringList_t; +typedef list StimulusList_t; +typedef list gpsimObjectList_t; + + +/**************************************************************************** + * + * Include file support stimuli. + * + * stimulus TriggerObject + * | \ / + * | -----------------+---- + * | | + * |- IOPIN |- source_stimulus + * | | + * |- IO_input |- square_wave + * | |- triangle_wave + * |- IO_open_collector |- asynchronous_stimulus + * |- IO_bi_directional |- dc_supply + * | |- open_collector + * |- IO_bi_directional_pu + * + * A stimulus is used to stimulate stimuli. What's that mean? Well, + * in gpsim, the pic I/O pins are derived from the stimulus base class + * (as can be seen from above). The I/O pins are what interface to the + * 'external' world. In some cases, I/O pins are inputs and others they're + * outputs. The stimulus base class defines the basic functionality of + * a stimulus and how this interface to the outside world is to occur. + * + */ + +#define MAX_DRIVE 0x100000 +#define MAX_ANALOG_DRIVE 0x1000 + +class Stimulus_Node : public gpsimObject, public TriggerObject +{ +public: + bool warned; // keeps track of node warnings (e.g. floating node, contention) + double voltage; // The most recent target voltage of this node + double Cth; // The most recent capacitance (to ground) measured on this node. + double Zth; // The most recent thevenin resistance computed on this node. + + double current_time_constant; // The most recent time constant for the attached stimuli. + double delta_voltage; // Amplitude of initial change + double minThreshold; // Use DC value when voltage this close + uint64_t cap_start_cycle; // cycles when RC value last calculated + uint64_t future_cycle; // cycles when next callback expected + + double initial_voltage; // node voltage at the instant of change + double DCVoltage; // Target voltage when settling + + bool bSettling; // true when the voltage is settling + stimulus *stimuli; // Pointer to the first stimulus connected to this node. + int nStimuli; // number of stimuli attached to this node. + + explicit Stimulus_Node(const char *n = 0); + virtual ~Stimulus_Node(); + + void set_nodeVoltage(double v); + double get_nodeVoltage(); + double get_nodeZth() { return Zth;} + double get_nodeCth() { return Cth; } + + void update(); + + void attach_stimulus(stimulus *); + void detach_stimulus(stimulus *); + + // When a node is given a name, it is also added to the symbol + // table. If bClearableSymbol is true, then the symbol can be + // automatically removed when the symbol table is cleared. + virtual void new_name(const char *, bool bClearableSymbol=false); + virtual void new_name(string &, bool bClearableSymbol=false); + + // When the node is settling (due to RC charging/discharging) + // it's voltage is periodically updated by invoking callback() + virtual void callback(void); + virtual void callback_print(void); + + // factory function + static Stimulus_Node * construct(const char * psName); + virtual string toString(); + +protected: + void update(uint64_t current_time); // deprecated + void refresh(); + void updateStimuli(); + uint64_t calc_settlingTimeStep(); + + uint64_t settlingTimeStep; + +}; + + +//======================================================================== +// +// stimulus +// +// The stimulus class is the base class for all of the analog interfaces +// between modules. A stimulus is a 1-node device that has a characteristic +// impedance and voltage. If you're familiar with circuit analysis, these +// are the Thevenin voltage and impedance. +// +// gpsim is not a spice simulator. So complex devices like transistors or +// opamps are not modeled. In fact, even simple devices like capacitors and +// inductors are not modeled. +// +class stimulus : public Value +{ + public: + + Stimulus_Node *snode; // Node to which this stimulus is attached + stimulus *next; // next stimulus that's on the snode + + stimulus(const char *n=0, double _Vth=5.0, double _Zth=1e3 ); + virtual ~stimulus(); + + // When a stimulus is given a name, it is also added to the symbol + // table. If bClearableSymbol is true, then the symbol can be + // automatically removed when the symbol table is cleared. + virtual void new_name(const char *, bool bClearableSymbol=true); + virtual void new_name(string &, bool bClearableSymbol=true); + + // Functions for accessing/manipulating the thevenin voltage and impedance. + virtual void getThevenin(double &v, double &z, double &c); + virtual double get_Vth() { return Vth; } + virtual void set_Vth(double v) { Vth = v; } + virtual double get_Zth() { return Zth; } + virtual void set_Zth(double z) { Zth = z; } + virtual double get_Cth() { return Cth; } + virtual void set_Cth(double c) { Cth = c; } + + virtual double get_nodeVoltage() { return nodeVoltage; } + virtual void set_nodeVoltage(double v) { nodeVoltage = v; } + + virtual bool getDriving() { return bDriving; } + virtual void setDriving(bool bNewDriving) { bDriving = bNewDriving; } + + // Functions for accessing/manipulating the stimulus state + + // Control the driving state, i.e. the state this stimulus wishes to drive + virtual bool getDrivingState(void) {return bDrivingState;}; + virtual void setDrivingState(bool new_dstate) { bDrivingState = new_dstate;}; + virtual void setDrivingState(char new3State) { bDrivingState = new3State=='1';}; + + // Control the driven state, i.e. the state some external node wishes to + // drive this stimulus. + virtual bool getDrivenState(void) { return getDrivingState(); } + virtual void setDrivenState(bool new_dstate) { setDrivingState(new_dstate);} + + // Control the 'state' of the node. + virtual bool getState() { return getDrivingState(); } + virtual void putState(bool new_dstate) { setDrivingState(new_dstate);} + + // getBitChar - this complements the Register class' getBitStr function + virtual char getBitChar() { return getState() ? '1':'0'; } + virtual void attach(Stimulus_Node *s); + virtual void detach(Stimulus_Node *s); + + // If a stimulus changes its state, it can signal this change to + // any other stimuli that are connected to it. + virtual void updateNode(void) { if(snode) snode->update();} + + // Display info about the stimulus. + virtual void show(); + virtual string toString(); + + protected: + bool bDrivingState; // 0/1 digitization of the analog state we're driving + bool bDriving; // True if this stimulus is a driver + + double Vth; // Open-circuit or Thevenin voltage + double Zth; // Input or Thevenin resistance + double Cth; // Stimulus capacitance. + + double nodeVoltage; // The voltage driven on to this stimulus by the snode + + // These are only here because they're pure virtual functions in the parent class. + virtual uint get_value(void) { return 0;} + virtual void put_value(uint new_value) {} + + // factory function + static stimulus * construct(const char * psName); +}; + + +///------------------------------------------------------------ +/// +/// SignalSink - A pure virtual class that allows signals driven by external +/// stimuli to be routed to one or more objects monitoring them (e.g. one +/// sink may be a bit in a port register while another may be a peripheral) + +class SignalSink +{ + public: + virtual ~SignalSink(){} + + virtual void setSinkState(char)=0; + virtual void release()=0; +}; + +///------------------------------------------------------------- +/// +/// AnalogSink - An analog sink is similar to a digital sink. The primary +/// difference is that an analog sink redirects an analog signal to one +/// or more objects. A signal sink only redirects digital signals. + +class AnalogSink +{ + public: + virtual ~AnalogSink(){} + + virtual void setSinkState(double)=0; + virtual void release()=0; +}; + + +///------------------------------------------------------------ +/// The PinMonitor class allows other objects to be notified whenever +/// a Pin changes states. +/// (Note: In older versions of gpsim, iopins notified the Port registers +/// in which they were contained by direcly calling the register setbit() +/// method. This is deprecated - and eventually will cause compile time errors.) +class PinMonitor +{ + public: + PinMonitor(); + virtual ~PinMonitor(); + + void addSink(SignalSink *); + void removeSink(SignalSink *); + void addSink(AnalogSink *); + void removeSink(AnalogSink *); + + virtual void setDrivenState(char)=0; + virtual void setDrivingState(char)=0; + virtual void set_nodeVoltage(double)=0; + virtual void putState(char)=0; + virtual void setDirection()=0; + virtual void updateUI() {} // FIXME - make this pure virtual too. + + protected: + /// The SignalSink list is a list of all sinks that can receive digital data + list sinks; + + /// The AnalogSink list is a list of all sinks that can receive analog data + list analogSinks; +}; + + +class PICComponentPin; +class IOPIN : public stimulus +{ + public: + + enum IOPIN_DIRECTION + { + DIR_INPUT, + DIR_OUTPUT + }; + + IOPIN(const char *n=0, + double _Vth=5.0, + double _Zth=1e8, + double _ZthWeak = 1e6, + double _ZthFloating = 1e7 + ); + + ~IOPIN(); + + virtual void setMonitor(PinMonitor *); + virtual PinMonitor *getMonitor() { return m_monitor; } + + virtual void set_nodeVoltage(double v); + + virtual bool getDrivingState(void); + virtual void setDrivingState(bool new_dstate); + virtual void setDrivingState(char); + virtual bool getDrivenState(void); + virtual void setDrivenState(bool new_dstate); + + virtual bool getState(); + virtual void putState(bool new_dstate); + virtual void putState(double new_Vth); + + virtual void set_digital_threshold(double vdd); + virtual void get(char *return_str, int len); + + virtual void set_ZthWeak(double Z) { ZthWeak=Z;} + virtual double get_ZthWeak() { return ZthWeak;} + virtual void set_ZthFloating(double Z) { ZthFloating=Z;} + virtual double get_ZthFloating() { return ZthFloating;} + + virtual void set_l2h_threshold(double V) { l2h_threshold=V; } + virtual double get_l2h_threshold() { return l2h_threshold;} + virtual void set_h2l_threshold(double V) { h2l_threshold=V; } + virtual double get_h2l_threshold() { return h2l_threshold;} + + virtual void toggle(void); + virtual void attach(Stimulus_Node *s); + + // These functions don't apply to Inputs, but provide an + // interface for the derived classes. + virtual IOPIN_DIRECTION get_direction(void) {return DIR_INPUT; }; + virtual void update_direction( uint x, bool refresh ){ }; + virtual void update_pullup( char new_state, bool refresh ) {} + virtual void set_is_analog( bool flag ) {} + + virtual double get_Vth(); + + virtual char getBitChar(); + virtual IOPIN_TYPE getType() { return m_type;} + virtual void show(); + + void setPicPin( PICComponentPin* pin ){ m_picPin = pin; } + + protected: + bool is_analog; // Pin is in analog mode + + bool bDrivenState; // binary state we're being driven to + + PinMonitor *m_monitor; + + // When connected to a node, these are thresholds used to determine whether + // we're being driven by a weak driver or not. + double ZthWeak; + double ZthFloating; + + // These are the low to high and high to low input thresholds. The + // units are volts. + double l2h_threshold; + double h2l_threshold; + double Vdrive_high; + double Vdrive_low; + + IOPIN_TYPE m_type; + PICComponentPin* m_picPin; +}; + +class IO_bi_directional : public IOPIN +{ + public: + + IO_bi_directional(const char *n=0, + double _Vth=5.0, + double _Zth=150, + double _ZthWeak = 1e6, + double _ZthFloating = 1e7, + double _VthIn = 0.3, + double _ZthIn = 1e10); + virtual double get_Zth(); + virtual double get_Vth(); + virtual double get_VthIn() { return VthIn;} + virtual double get_ZthIn() { return ZthIn;} + virtual void set_VthIn(double _VthIn) { VthIn = _VthIn;} + virtual void set_ZthIn(double _ZthIn) { ZthIn = _ZthIn;} + virtual char getBitChar(); + + virtual void set_nodeVoltage(double new_nodeVoltage); + virtual void putState(bool new_state); + virtual void putState(double new_Vth); + + virtual void update_direction(uint,bool refresh); + virtual IOPIN_DIRECTION get_direction(void) {return ((getDriving()) ? DIR_OUTPUT : DIR_INPUT);} + + protected: + /// Impedance of the IOPIN when it's not driving. + double ZthIn; + + /// Voltage of the IOPIN when it's not driving + /// (this is the voltage the I/O pin floats to when there's + /// nothing connected to it) + double VthIn; +}; + +class IO_bi_directional_pu : public IO_bi_directional +{ + public: + IO_bi_directional_pu(const char *n=0, + double _Vth=5.0, + double _Zth=150, + double _ZthWeak = 1e6, + double _ZthFloating = 1e7, + double _VthIn = 0.3, + double _ZthIn = 1e8, + double _Zpullup = 20e3 + ); + + ~IO_bi_directional_pu(); + virtual double get_Vth(); + virtual double get_Zth(); + + virtual void set_Zpullup(double Z) { Zpullup = Z; } + virtual double get_Zpullup() { return Zpullup; } + virtual void set_Vpullup(double V) { Vpullup = V; } + virtual double get_Vpullup() { return Vpullup; } + + virtual char getBitChar(); + virtual void update_pullup(char new3State, bool refresh); + virtual void set_is_analog(bool flag); + + protected: + bool bPullUp; // True when pullup is enabled + double Zpullup; // resistance of the pullup + double Vpullup; // Voltage the pullup resistor is tied to. +}; + + +class IO_open_collector : public IO_bi_directional_pu +{ + public: + explicit IO_open_collector(const char *n = 0); + virtual double get_Vth(); + virtual double get_Zth(); + virtual char getBitChar(); +}; + +#endif // __STIMULI_H__ diff --git a/src/gpsim/trigger.cc b/src/gpsim/trigger.cc new file mode 100644 index 0000000..e13e7f8 --- /dev/null +++ b/src/gpsim/trigger.cc @@ -0,0 +1,147 @@ +/* + Copyright (C) 2004 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include "trigger.h" +#include "config.h" +#include "value.h" +#include "errors.h" +#include "breakpoints.h" + +#include +#include + +using namespace std; + +static TriggerAction DefaultTrigger; + +//------------------------------------------------------------------------ +// TriggerAction +// +TriggerAction::TriggerAction() +{ +} + +TriggerAction::~TriggerAction() +{ +} + +bool TriggerAction::evaluate() +{ + action(); + return true; +} + +bool TriggerAction::getTriggerState() +{ + return false; +} + +void TriggerAction::action() +{ + bp.halt(); +} + +//------------------------------------------------------------------------ +// SimpleTriggerAction +// +// For most cases... A single trigger action coupled with a single trigger +// object +SimpleTriggerAction::SimpleTriggerAction(TriggerObject *_to) + : TriggerAction(), to(_to) +{ +} + +void SimpleTriggerAction::action() +{ + TriggerAction::action(); +} + +//------------------------------------------------------------------------ +TriggerObject::TriggerObject() +{ + set_action(&DefaultTrigger); +} + +TriggerObject::TriggerObject(TriggerAction *ta) +{ + if(ta) set_action(ta); + else set_action(&DefaultTrigger); +} + +TriggerObject::~TriggerObject() +{ + if( m_action != &DefaultTrigger ) delete m_action; +} + +void TriggerObject::callback() +{ + cout << "generic callback\n"; +} + +void TriggerObject::callback_print() +{ + cout << " has callback, ID = 0x" << CallBackID << '\n'; +} + +void TriggerObject::clear_trigger() +{ +} + +int TriggerObject::find_free() +{ + bpn = bp.find_free(); + + if(bpn < MAX_BREAKPOINTS) { + + bp.break_status[bpn].type = Breakpoints::BREAK_CLEAR; + bp.break_status[bpn].cpu = 0; //get_cpu(); + bp.break_status[bpn].arg1 = 0; + bp.break_status[bpn].arg2 = 0; + bp.break_status[bpn].bpo = this; + } + return bpn; +} + +void TriggerObject::print() +{ +} + +void TriggerObject::clear() +{ + cout << "clear Generic breakpoint " << bpn << endl; +} + +//------------------------------------------------------------------------ +void TriggerObject::invokeAction() +{ + m_action->action(); +} + +//------------------------------------------------------------------- +void TriggerObject::new_message(const char *s) +{ + m_sMessage = string(s); +} + +void TriggerObject::new_message(string &new_message) +{ + m_sMessage = new_message; +} diff --git a/src/gpsim/trigger.h b/src/gpsim/trigger.h new file mode 100644 index 0000000..ae50ee5 --- /dev/null +++ b/src/gpsim/trigger.h @@ -0,0 +1,149 @@ +/* + Copyright (C) 1998 T. Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#if !defined(__TRIGGER_H__) +#define __TRIGGER_H__ + +typedef unsigned int uint; + +#include +using namespace std; + +class TriggerObject; + + +//======================================================================== +// +// Triggers +// (these comments are not completely implemented in code) +// +// gpsim divides a breakpoint into a TriggerAction and a TriggerObject. +// The TriggerObject is something that gets evaluated. If it evaluates +// to true then a TriggerAction is invoked. +// Most breakpoints are simple and don't need this complexity. For example, +// an execution breakpoint only needs to halt simulation whenever it's +// encountered. But gpsim defines the TriggerObject to be something like +// 'if address is executed' and the TriggerAction to be 'halt simulation'. +// However this design accomodates much more complicated situations. For +// example, the use may wish to break whenever register 42 is cleared during +// a time when interrupts are disabled. In this case, the trigger action +// is still a simple halt. However, the trigger object is more complicated: +// +// break w reg(42) (reg(42) == 0) && (STATUS & GIE == 0) +// +// In this case, the compound expression gets associated with write operations +// to register 42. + +class TriggerAction +{ +public: + TriggerAction(); + virtual ~TriggerAction(); + virtual bool evaluate(); + virtual bool getTriggerState(); + virtual void action(); +}; + +class SimpleTriggerAction : public TriggerAction +{ +public: + explicit SimpleTriggerAction(TriggerObject *_to); + virtual void action(); +protected: + TriggerObject *to; + +}; + +// TriggerObject - a base class for handling all of gpsim's breakpoints. +// +// The TriggerObject class is designed to be part of a multiple inheritance +// class heirarchy. Its main function is to provide an interface to the +// breakpoint functionality. +// +// + +class TriggerObject +{ + public: + + uint bpn; + + // Enable the breakpoint and return true if successful + virtual bool set_break() {return false;} + + // A unique number assigned when the break point is armed. + int CallBackID; + + // When the breakpoint associated with this object is encountered, + // then 'callback' is invoked. + virtual void callback(); + + // Invoked to display info about the breakpoint. + virtual void callback_print(); + + // clear_trigger is invoked when the breakpoint associated with + // this object is cleared. + virtual void clear_trigger(); + + // Will search for a place to store this break point. + virtual int find_free(); + + // This object has no cpu associated with it. However, derived + // types may and can choose to provide access to it through here: + //virtual Processor *get_cpu() { return 0; } + + // Display the breakpoint - Probably should tie into a stream... + virtual void print(); + + // Clear the breakpoint + virtual void clear(); + + virtual char const * bpName() { return "Generic"; } + + virtual void set_action(TriggerAction *ta) { m_action = ta; } + virtual TriggerAction *get_action() { return m_action;} + virtual void invokeAction(); + + // Messages can be associatated with triggers + string &message() {return m_sMessage;} + virtual void new_message(const char *); + virtual void new_message(string &); + + TriggerObject(); + explicit TriggerObject(TriggerAction *); + // Virtual destructor place holder + virtual ~TriggerObject(); + +private: + string m_sMessage; + + // When the TriggerObject becomes true, then the TriggerAction is + // evaluated. E.g. If the trigger object is an execution breakpoint, + // then whenever the PC == break address, the Breakpoint_Instruction + // class (which is derived from this class) will invoke action->evaluate() + // which will in turn halt the execution. + + TriggerAction *m_action; +}; + + + +#endif // !defined(__TRIGGER_H__) diff --git a/src/gpsim/value.cc b/src/gpsim/value.cc new file mode 100644 index 0000000..1632ce2 --- /dev/null +++ b/src/gpsim/value.cc @@ -0,0 +1,1055 @@ +/* + Copyright (C) 1998-2003 Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + + +#include +#include +#include +#include +#include + +#include "processor.h" +#include "value.h" +#include "errors.h" +#include "protocol.h" +#include "config.h" + + + +char * TrimWhiteSpaceFromString(char * pBuffer) { + size_t iPos = 0; + char * pChar = pBuffer; + while(*pChar != 0 && ::isspace(*pChar)) { + pChar++; + } + if(pBuffer != pChar) { + memmove(pBuffer, pChar, strlen(pBuffer) - iPos); + } + iPos = strlen(pBuffer); + if(iPos > 0) { + pChar = pBuffer + iPos - 1; + while(pBuffer != pChar && ::isspace(*pChar)) { + *pChar = 0; + pChar--; + } + } + return pBuffer; +} + +char * UnquoteString(char * pBuffer) { + char cQuote; + if(*pBuffer == '\'') { + cQuote = '\''; + } + else if(*pBuffer == '"') { + cQuote = '"'; + } + else { + return pBuffer; + } + int iLen = strlen(pBuffer); + if(iLen > 1) { + if(pBuffer[iLen - 1] == cQuote) { + memmove(&pBuffer[0], &pBuffer[1], iLen - 2); + pBuffer[iLen - 2] = 0; + } + } + return pBuffer; +} + +string &toupper(string & sStr) { + string::iterator it; + string::iterator itEnd = sStr.end(); + for(it = sStr.begin(); it != itEnd; ++it) { + if(isalpha(*it)) { + *it = toupper((int)*it); + } + } + return sStr; +} + +//------------------------------------------------------------------------ +Value::Value() + : cpu(0) +{ +} + +Value::Value(const char *_name, const char *desc, Module *pMod) + : gpsimObject(_name,desc), cpu(pMod) +{ +} + +Value::~Value() +{ +} +void Value::update() +{ +} + +void Value::set(const char *cP,int i) +{ + throw new Error(" cannot assign string to a " + showType()); +} +void Value::set(double d) +{ + throw new Error(" cannot assign a double to a " + showType()); +} +void Value::set(int64_t i) +{ + throw new Error(" cannot assign an integer to a " + showType()); +} +void Value::set(bool v) +{ + throw new Error(" cannot assign a boolean to a " + showType()); +} + +void Value::set(int i) +{ + int64_t i64 = i; + set(i64); +} + +void Value::set(Value *v) +{ + throw new Error(" cannot assign a Value to a " + showType()); +} + +void Value::set(Packet &pb) +{ + cout << "Value,"<(cpu); +} + +void Value::set_cpu(Processor *new_cpu) +{ + cpu = new_cpu; +} +void Value::set_module(Module *new_cpu) +{ + cpu = new_cpu; +} +Module *Value::get_module() +{ + return cpu; +} + +void Value::addName(string &r_sAliasedName) +{ +} + +//------------------------------------------------------------------------ +ValueWrapper::ValueWrapper(Value *pCopy) + : m_pVal(pCopy) +{ +} +ValueWrapper::~ValueWrapper() +{ +} +uint ValueWrapper::get_leftVal() +{ + return m_pVal->get_leftVal(); +} +uint ValueWrapper::get_rightVal() +{ + return m_pVal->get_rightVal(); +} +void ValueWrapper::set(const char *cP,int len) +{ + m_pVal->set(cP,len); +} +void ValueWrapper::set(double d) +{ + m_pVal->set(d); +} +void ValueWrapper::set(int64_t i) +{ + m_pVal->set(i); +} +void ValueWrapper::set(int i) +{ + m_pVal->set(i); +} +void ValueWrapper::set(bool b) +{ + m_pVal->set(b); +} +void ValueWrapper::set(Value *v) +{ + m_pVal->set(v); +} +void ValueWrapper::set(Packet &p) +{ + m_pVal->set(p); +} +void ValueWrapper::get(bool &b) +{ + m_pVal->get(b); +} +void ValueWrapper::get(int &i) +{ + m_pVal->get(i); +} +void ValueWrapper::get(uint64_t &i) +{ + m_pVal->get(i); +} +void ValueWrapper::get(int64_t &i) +{ + m_pVal->get(i); +} +void ValueWrapper::get(double &d) +{ + m_pVal->get(d); +} +void ValueWrapper::get(char *pC, int len) +{ + m_pVal->get(pC,len); +} +void ValueWrapper::get(Packet &p) +{ + m_pVal->get(p); +} +Value *ValueWrapper::copy() +{ + return m_pVal->copy(); +} +void ValueWrapper::update() +{ + m_pVal->update(); +} +Value *ValueWrapper::evaluate() +{ + return m_pVal->evaluate(); +} + +/***************************************************************** + * The AbstractRange class. + */ +AbstractRange::AbstractRange(uint newLeft, uint newRight) +{ + left = newLeft; + right = newRight; +} + +AbstractRange::~AbstractRange() +{ +} + +string AbstractRange::toString() +{ + char buff[256]; + + snprintf(buff, sizeof(buff), "%u:%u", left, right); + + return (string(buff)); +} + +string AbstractRange::toString(const char* format) +{ + char cvtBuf[1024]; + + snprintf(cvtBuf, sizeof(cvtBuf), format, left, right); + return (string(&cvtBuf[0])); +} + +char *AbstractRange::toString(char *return_str, int len) +{ + if(return_str) { + snprintf(return_str, len, "%u:%u", left, right); + } + + return return_str; +} + +uint AbstractRange::get_leftVal() +{ + return(left); +} + +uint AbstractRange::get_rightVal() +{ + return(right); +} + +AbstractRange* AbstractRange::typeCheck(Value* val, string valDesc) +{ + if (typeid(*val) != typeid(AbstractRange)) { + throw new TypeMismatch(valDesc, "AbstractRange", val->showType()); + } + // This static cast is totally safe in light of our typecheck, above. + return((AbstractRange*)(val)); +} + +Value *AbstractRange::copy() +{ + return new AbstractRange(get_leftVal(),get_rightVal()); +} + +void AbstractRange::set(Value *v) +{ + AbstractRange *ar=typeCheck(v, string("")); + left = ar->get_leftVal(); + right = ar->get_rightVal(); +} + + +/***************************************************************** + * The Boolean class. + */ +Boolean::Boolean(bool newValue) +{ + value = newValue; +} + +Boolean::Boolean(const char *_name, bool newValue, const char *_desc) + : Value(_name,_desc) +{ + value = newValue; + +} + +bool Boolean::Parse(const char *pValue, bool &bValue) { + if(strncmp("true", pValue, sizeof("true")-1) == 0) { + bValue = true; + return true; + } + else if(strncmp("false", pValue, sizeof("false")-1) == 0) { + bValue = false; + return true; + } + return false; +} + +Boolean * Boolean::NewObject(const char *_name, const char *pValue, const char *desc) { + bool bValue; + if(Parse(pValue, bValue)) { + return new Boolean(_name, bValue); + } + return NULL; +} + +Boolean::~Boolean() +{ +} + +string Boolean::toString() +{ + bool b; + get(b); + return (string(b ? "true" : "false")); +} + +string Boolean::toString(bool value) +{ + return (string(value ? "true" : "false")); +} + +char *Boolean::toString(char *return_str, int len) +{ + if(return_str) { + bool b; + get(b); + snprintf(return_str,len,"%s",(b ? "true" : "false")); + } + + return return_str; +} +char *Boolean::toBitStr(char *return_str, int len) +{ + if(return_str) { + bool b; + get(b); + snprintf(return_str,len,"%d",(b ? 1 : 0)); + } + + return return_str; +} + +string Boolean::toString(const char* format) +{ + char cvtBuf[1024]; + bool b; + get(b); + + snprintf(cvtBuf, sizeof(cvtBuf), format, b); + return cvtBuf; +} + +Boolean* Boolean::typeCheck(Value* val, string valDesc) +{ + if (typeid(*val) != typeid(Boolean)) { + throw new TypeMismatch(valDesc, "Boolean", val->showType()); + } + + // This static cast is totally safe in light of our typecheck, above. + return((Boolean*)(val)); +} + +Value *Boolean::copy() +{ + bool b; + get(b); + return new Boolean(b); +} + +// get(bool&) - primary method for accessing the value. +void Boolean::get(bool &b) +{ + b = value; +} + +// get(int&) - type cast an integer into a boolean. Note +// that we call get(bool &) instead of directly accessing +// the member value. The reason for this is so that derived +// classes can capture the access. +void Boolean::get(int &i) +{ + bool b; + get(b); + i = b ? 1 : 0; +} +/* +void Boolean::get(double &d) +{ + bool b; + get(b); + d = b ? 1.0 : 0.0; +} +*/ +void Boolean::get(char *buffer, int buf_size) +{ + if(buffer) { + + bool b; + get(b); + if(b) + strncpy(buffer,"true",buf_size); + else + strncpy(buffer,"false",buf_size); + } + +} +void Boolean::get(Packet &pb) +{ + bool b; + get(b); + pb.EncodeBool(b); +} + +void Boolean::set(Value *v) +{ + Boolean *bv = typeCheck(v,string("set ")); + bool b = bv->getVal(); + set(b); +} + +void Boolean::set(bool v) +{ + value = v; + //if(get_xref()) + // get_xref()->set(v); +} + +void Boolean::set(const char *buffer, int buf_size) +{ + if(buffer) { + bool bValue; + if(Parse(buffer, bValue)) { + set(bValue); + } + } +} + +void Boolean::set(Packet &p) +{ + bool b; + if(p.DecodeBool(b)) + set(b); +} + + +/***************************************************************** + * The Integer class. + */ +Integer::Integer( const Integer &new_value ) + : Value() +{ + Integer & nv = (Integer&)new_value; + nv.get(value); + bitmask = new_value.bitmask; +} + +Integer::Integer(int64_t newValue) +{ + value = newValue; + bitmask = def_bitmask; +} + +Integer::Integer(const char *_name, int64_t newValue,const char *_desc) + : Value(_name,_desc) +{ + value = newValue; + bitmask = def_bitmask; +} + +int64_t Integer::def_bitmask = 0xffffffff; + +Integer::~Integer() +{ +} + +void Integer::setDefaultBitmask(int64_t bitmask) +{ + def_bitmask = bitmask; +} + +Value *Integer::copy() +{ + int64_t i; + get(i); + return new Integer(i); +} + +void Integer::set(double d) +{ + int64_t i = (int64_t)d; + set(i); +} + +void Integer::set(int64_t i) +{ + value = i; + //if(get_xref()) + // get_xref()->set(i); +} +void Integer::set(int i) +{ + int64_t ii = i; + set(ii); +} +void Integer::set(Value *v) +{ + int64_t iv = 0; + if (v) v->get(iv); + + set(iv); +} + +void Integer::set(Packet &p) +{ + uint i; + if(p.DecodeUInt32(i)) + { + set((int)i); + return; + } + + uint64_t i64; + if(p.DecodeUInt64(i64)) + { + set((int64_t)i64); + return; + } +} + +void Integer::set(const char *buffer, int buf_size) +{ + if(buffer) + { + int64_t i; + if(Parse(buffer, i)) set(i); + } +} + +bool Integer::Parse(const char *pValue, int64_t &iValue) { + if(::isdigit(*pValue)) + { + if(strchr(pValue, '.')) return false; + else return sscanf(pValue, "%li", &iValue) == 1; + } + else if(*pValue == '$' && ::isxdigit(*(pValue+1))) + { + // hexidecimal integer + char szHex[10] = "0x"; + strcat(&szHex[0], pValue + 1); + return sscanf(szHex, "%li" , &iValue) == 1; + } + return false; +} + +Integer * Integer::NewObject(const char *_name, const char *pValue, const char *desc) { + int64_t iValue; + if(Parse(pValue, iValue)) { + return new Integer(_name, iValue, desc); + } + return NULL; +} + + +void Integer::get(int64_t &i) +{ + i = value; +} + +void Integer::get(double &d) +{ + int64_t i; + get(i); + d = (double)i; +} + +void Integer::get(char *buffer, int buf_size) +{ + if(buffer) { + + int64_t i; + get(i); + long long int j = i; + snprintf(buffer,buf_size,"%" PRINTF_INT64_MODIFIER "d",j); + } + +} +void Integer::get(Packet &pb) +{ + int64_t i; + get(i); + + uint j = (uint) (i &0xffffffff); + pb.EncodeUInt32(j); +} + +string Integer::toString() +{ + return ""; +} + +string Integer::toString(const char* format) +{ + char cvtBuf[1024]; + + int64_t i; + get(i); + + snprintf(cvtBuf,sizeof(cvtBuf), format, i); + return (string(&cvtBuf[0])); +} + + +string Integer::toString(const char* format, int64_t value) +{ + char cvtBuf[1024]; + + snprintf(cvtBuf,sizeof(cvtBuf), format, value); + return (string(&cvtBuf[0])); +} + +string Integer::toString(int64_t value) +{ + char cvtBuf[1024]; + long long int v=value; + snprintf(cvtBuf,sizeof(cvtBuf), "%" PRINTF_INT64_MODIFIER "d", v); + return (string(&cvtBuf[0])); +} + +char *Integer::toString(char *return_str, int len) +{ + return return_str; +} +char *Integer::toBitStr(char *return_str, int len) +{ + if(return_str) { + int64_t i; + get(i); + int j=0; + int mask=1<<31; + for( ; mask ; mask>>=1, j++) + if(jshowType()); + } + + // This static cast is totally safe in light of our typecheck, above. + return((Integer*)(val)); +} + +Integer* Integer::assertValid(Value* val, string valDesc, int64_t valMin) +{ + Integer* iVal; + int64_t i; + + iVal = Integer::typeCheck(val, valDesc); + iVal->get(i); + + if (i < valMin) { + throw new Error(valDesc + + " must be greater than " + Integer::toString(valMin) + + ", saw " + Integer::toString(i) + ); + } + + return(iVal); +} + +Integer* Integer::assertValid(Value* val, string valDesc, int64_t valMin, int64_t valMax) +{ + Integer* iVal; + int64_t i; + + iVal = (Integer::typeCheck(val, valDesc)); + + iVal->get(i); + + if ((i < valMin) || (i>valMax)) { + throw new Error(valDesc + + " must be be in the range [" + Integer::toString(valMin) + ".." + + Integer::toString(valMax) + "], saw " + Integer::toString(i) + ); + } + + return(iVal); +} + +/***************************************************************** + * The Float class. + */ +Float::Float(double newValue) +{ + value = newValue; +} + +Float::Float(const char *_name, double newValue,const char *_desc) + : Value(_name,_desc) +{ + value = newValue; +} + +bool Float::Parse(const char *pValue, double &fValue) +{ + return pValue ? sscanf(pValue,"%lg",&fValue) == 1 : false; +} + +Float * Float::NewObject(const char *_name, const char *pValue, const char *desc) { + double fValue; + if(Parse(pValue, fValue)) { + return new Float(_name, fValue); + } + return NULL; +} + +Float::~Float() +{ +} + +void Float::set(double d) +{ + value = d; +} + +void Float::set(int64_t i) +{ + double d = (double)i; + set(d); +} + +void Float::set(Value *v) +{ + /* typeCheck means cannot set integers - RRR + Float *fv = typeCheck(v,string("set ")); + double d = fv->getVal(); + set(d); + */ + double d; + + if (typeid(*v) != typeid(Float) && + typeid(*v) != typeid(Integer)) + { + throw new TypeMismatch(string("set "), "Float", v->showType()); + } + v->get(d); + set(d); +} + +void Float::set(const char *buffer, int buf_size) +{ + if(buffer) { + + double d; + if(Parse(buffer, d)) { + set(d); + } + } +} + +void Float::set(Packet &p) +{ + double d; + if(p.DecodeFloat(d)) { + + set(d); + } + +} + +void Float::get(int64_t &i) +{ + double d; + get(d); + i = (int64_t)d; +} +void Float::get(double &d) +{ + d = value; +} + +void Float::get(char *buffer, int buf_size) +{ + if(buffer) { + + double d;; + get(d); + + snprintf(buffer,buf_size,"%g",d); + } + +} +void Float::get(Packet &pb) +{ + double d; + get(d); + + pb.EncodeFloat(d); +} + +Value *Float::copy() { + double d; + get(d); + return new Float(d); +} + +string Float::toString() +{ + return toString("%#-16.16g"); +} + + +string Float::toString(const char* format) +{ + char cvtBuf[1024]; + + double d; + get(d); + + snprintf(cvtBuf, sizeof(cvtBuf), format, d); + return cvtBuf; +} + +char *Float::toString(char *return_str, int len) +{ + if(return_str) { + + double d; + get(d); + snprintf(return_str,len,"%g",d); + } + + return return_str; +} + +Float* Float::typeCheck(Value* val, string valDesc) +{ + if (typeid(*val) != typeid(Float)) { + throw new TypeMismatch(valDesc, "Float", val->showType()); + } + + // This static cast is totally safe in light of our typecheck, above. + return((Float*)(val)); +} + + +/***************************************************************** + * The String class. + */ +String::String(const char *newValue) +{ + if (newValue) + value = newValue; +} + +String::String(const char *newValue, size_t len) +{ + if (newValue) + value.assign(newValue, len); +} + +String::String(const char *_name, const char *newValue, const char *_desc) + : Value(_name, _desc) +{ + if (newValue) + value = newValue; +} + +String::~String() +{ +} + +std::string String::toString() +{ + return value; +} + +char *String::toString(char *return_str, int len) +{ + if (return_str) + snprintf(return_str, len, "%s", value.c_str()); + + return return_str; +} + +void String::set(Value *v) +{ + if (v) { + std::string buf = v->toString(); + set(buf.c_str()); + } +} + +// TODO: is this meant to do something +void String::set(Packet &p) +{ + cout << " fixme String::set(Packet &) is not implemented\n"; +} + +// TODO: was len meant to do anything +void String::set(const char *s, int len) +{ + if (s) + value = s; +} + +void String::get(char *buf, int len) +{ + if (buf) + snprintf(buf, len, "%s", value.c_str()); +} + +void String::get(Packet &p) +{ + p.EncodeString(value.c_str()); +} + +const char *String::getVal() +{ + return value.c_str(); +} + +Value *String::copy() +{ + return new String(value.c_str()); +} + +//------------------------------------------------------------------------ +namespace gpsim { + Function::Function(const char *_name, const char *desc) + : gpsimObject(_name,desc) + { + } + + Function::~Function() + { + cout << "Function destructor\n"; + } + + string Function::description() + { + if(cpDescription) + return string(cpDescription); + else + return string("no description"); + } + + string Function::toString() + { + return name(); + } +} diff --git a/src/gpsim/value.h b/src/gpsim/value.h new file mode 100644 index 0000000..7029419 --- /dev/null +++ b/src/gpsim/value.h @@ -0,0 +1,548 @@ +/* + Copyright (C) 1998-2004 Scott Dattalo + +This file is part of the libgpsim library of gpsim + +This library is free software; you can redistribute it and/or +modify it under the terms of the GNU Lesser General Public +License as published by the Free Software Foundation; either +version 2.1 of the License, or (at your option) any later version. + +This library is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +Lesser General Public License for more details. + +You should have received a copy of the GNU Lesser General Public +License along with this library; if not, see +. +*/ + +#ifndef __VALUE_H__ +#define __VALUE_H__ + +#include "gpsim_object.h" + +#include +#include + +class Processor; +class Module; +class Packet; + +//------------------------------------------------------------------------ +// +/// Value - the base class that supports types +/// +/// Everything that can hold a value is derived from the Value class. +/// The primary purpose of this is to provide external objects (like +/// the gui) an abstract way of getting the value of diverse things +/// like registers, program counters, cycle counters, etc. +/// +/// In addition, expressions of Values can be created and operated +/// on. + +class Value : public gpsimObject +{ + public: + Value(); + Value(const char *name, const char *desc, Module *pM=0); + virtual ~Value(); + + virtual uint get_leftVal() {return 0;} + virtual uint get_rightVal() {return 0;} + + /// Value 'set' methods provide a mechanism for casting values to the + /// the type of this value. If the type cast is not supported in a + /// derived class, an Error will be thrown. + + virtual void set(const char *cP,int len=0); + virtual void set(double); + virtual void set(int64_t); + virtual void set(int); + virtual void set(bool); + virtual void set(Value *); + virtual void set(Packet &); + + /// Value 'get' methods provide a mechanism of casting Value objects + /// to other value types. If the type cast is not supported in a + /// derived class, an Error will be thrown. + + virtual void get(bool &b); + virtual void get(int &); + virtual void get(uint64_t &); + virtual void get(int64_t &); + virtual void get(double &); + virtual void get(char *, int len); + virtual void get(Packet &); + + inline operator int64_t() { + int64_t i; + get(i); + return i; + } + + inline operator int() { + int64_t i; + get(i); + return (int)i; + } + + inline operator uint() { + int64_t i; + get(i); + return (uint)i; + } + + inline Value & operator =(int i) { + set(i); + return *this; + } + + inline Value & operator =(uint i) { + set((int)i); + return *this; + } + /// copy - return an object that is identical to this one. + virtual Value *copy(); + + // Some Value types that are used for symbol classes + // contain a gpsimValue type that have update listeners. + virtual void update(); // {} + virtual Value* evaluate() { return copy(); } + + virtual void set_module(Module *new_cpu); + Module *get_module(); + virtual void set_cpu(Processor *new_cpu); + Processor *get_cpu() const; + void addName(string &r_sAliasedName); + + protected: + Module *cpu; // A pointer to the module that owns this value. +}; + + +/***************************************************************** + ValueWrapper + */ +class ValueWrapper : public Value +{ + public: + explicit ValueWrapper(Value *pCopy); + virtual ~ValueWrapper(); + + virtual uint get_leftVal(); + virtual uint get_rightVal(); + virtual void set(const char *cP,int len=0); + virtual void set(double); + virtual void set(int64_t); + virtual void set(int); + virtual void set(bool); + virtual void set(Value *); + virtual void set(Packet &); + + virtual void get(bool &b); + virtual void get(int &); + virtual void get(uint64_t &); + virtual void get(int64_t &); + virtual void get(double &); + virtual void get(char *, int len); + virtual void get(Packet &); + virtual Value *copy(); + virtual void update(); + virtual Value* evaluate(); + + private: + Value *m_pVal; +}; + +/***************************************************************** + * Now we introduce classes for the basic built-in data types. + * These classes are created by extending the Value class. For + * convenience, they all must instantiate a getVal() method that + * returns valueof the object in question as a simple value of + * the base data type. For example, invoking getVal() on a + * Boolean oject must return a simple 'bool' value. + */ +/*****************************************************************/ +class Boolean : public Value +{ + public: + + explicit Boolean(bool newValue); + Boolean(const char *_name, bool newValue, const char *desc=0); + static bool Parse(const char *pValue, bool &bValue); + static Boolean * NewObject(const char *_name, const char *pValue, const char *desc); + virtual ~Boolean(); + + string toString(); + string toString(const char* format); + static string toString(bool value); + static string toString(const char* format, bool value); + + virtual void get(bool &b); + virtual void get(int &i); + virtual void get(char *, int len); + virtual void get(Packet &); + + virtual void set(bool); + virtual void set(Value *); + virtual void set(const char *cP,int len=0); + virtual void set(Packet &); + + bool getVal() { return value; } + + static Boolean* typeCheck(Value* val, string valDesc); + + virtual Value *copy(); + + /// copy the object value to a user char array + virtual char *toString(char *return_str, int len); + virtual char *toBitStr(char *return_str, int len); + + inline operator bool() { + bool bValue; + get(bValue); + return bValue; + } + + inline Boolean &operator = (bool bValue) { + set(bValue); + return *this; + } + + private: + bool value; +}; + +inline bool operator!=(Boolean &LValue, Boolean &RValue) { + return (bool)LValue != (bool)RValue; +} + + +//------------------------------------------------------------------------ +/// Integer - built in gpsim type for a 64-bit integer. + +class Integer : public Value +{ + public: + + Integer(const Integer &new_value); + explicit Integer(int64_t new_value); + Integer(const char *_name, int64_t new_value, const char *desc=0); + static bool Parse(const char *pValue, int64_t &iValue); + static Integer * NewObject(const char *_name, const char *pValue, const char *desc); + + virtual ~Integer(); + + virtual string toString(); + string toString(const char* format); + static string toString(int64_t value); + static string toString(const char* format, int64_t value); + + virtual void get(int64_t &i); + virtual void get(double &d); + virtual void get(char *, int len); + virtual void get(Packet &); + + virtual void set(int64_t v); + virtual void set(int); + virtual void set(double d); + virtual void set(Value *); + virtual void set(const char *cP,int len=0); + virtual void set(Packet &); + + static void setDefaultBitmask(int64_t bitmask); + + inline void setBitmask(int64_t bitmask) { + this->bitmask = bitmask; + } + + inline int64_t getBitmask() { + return bitmask; + } + + int64_t getVal() { return value; } + + virtual Value *copy(); + /// copy the object value to a user char array + virtual char *toString(char *, int len); + virtual char *toBitStr(char *, int len); + + static Integer* typeCheck(Value* val, string valDesc); + static Integer* assertValid(Value* val, string valDesc, int64_t valMin); + static Integer* assertValid(Value* val, string valDesc, int64_t valMin, int64_t valMax); + + inline operator int64_t() { + int64_t i; + get(i); + return i; + } + + inline operator uint64_t() { + int64_t i; + get(i); + return (uint64_t)i; + } + + inline operator bool() { + int64_t i; + get(i); + return i != 0; + } + + inline operator int() { + int64_t i; + get(i); + return (int)i; + } + + inline operator uint() { + int64_t i; + get(i); + return (uint)i; + } + + inline Integer & operator =(const Integer &i) { + Integer & ii = (Integer &)i; + int64_t iNew = (int64_t)ii; + set(iNew); + bitmask = i.bitmask; + return *this; + } + + inline Integer & operator =(int i) { + set(i); + return *this; + } + + inline Integer & operator =(uint i) { + set((int)i); + return *this; + } + + inline Integer & operator &=(int iValue) { + int64_t i; + get(i); + set((int)i & iValue); + return *this; + } + + inline Integer & operator |=(int iValue) { + int64_t i; + get(i); + set((int)i | iValue); + return *this; + } + + inline Integer & operator +=(int iValue) { + int64_t i; + get(i); + set((int)i + iValue); + return *this; + } + + inline Integer & operator ++(int) { + int64_t i; + get(i); + set((int)i + 1); + return *this; + } + + inline Integer & operator --(int) { + int64_t i; + get(i); + set((int)i - 1); + return *this; + } + + inline Integer & operator <<(int iShift) { + int64_t i; + get(i); + set(i << iShift); + return *this; + } + + inline bool operator !() { + int64_t i; + get(i); + return i == 0; + } + + private: + int64_t value; + // Used for display purposes + int64_t bitmask; + static int64_t def_bitmask; +}; + +inline bool operator!=(Integer &iLValue, Integer &iRValue) { + return (int64_t)iLValue != (int64_t)iRValue; +} + +//------------------------------------------------------------------------ +/// Float - built in gpsim type for a 'double' + +class Float : public Value +{ +public: + + explicit Float(double newValue = 0.0); + Float(const char *_name, double newValue, const char *desc=0); + static bool Parse(const char *pValue, double &fValue); + static Float * NewObject(const char *_name, const char *pValue, const char *desc); + virtual ~Float(); + + virtual string toString(); + string toString(const char* format); + static string toString(double value); + static string toString(const char* format, double value); + + virtual void get(int64_t &i); + virtual void get(double &d); + virtual void get(char *, int len); + virtual void get(Packet &); + + virtual void set(int64_t v); + virtual void set(double d); + virtual void set(Value *); + virtual void set(const char *cP,int len=0); + virtual void set(Packet &); + + double getVal() { return value; } + + virtual Value *copy(); + /// copy the object value to a user char array + virtual char *toString(char *, int len); + + static Float* typeCheck(Value* val, string valDesc); + + inline operator double() { + double d; + get(d); + return d; + } + + inline Float & operator = (double d) { + set((double)d); + return *this; + } + + inline Float & operator = (int d) { + set((double)d); + return *this; + } + + inline Float & operator += (Float &d) { + set((double)*this + (double)d ); + return *this; + } + + inline Float & operator *= (Float &d) { + set((double)*this * (double)d ); + return *this; + } + + inline Float & operator *= (double d) { + set((double)*this * d ); + return *this; + } + +private: + double value; +}; + +inline bool operator!=(Float &iLValue, Float &iRValue) { + return (double)iLValue != (double)iRValue; +} + + +/*****************************************************************/ +class String : public Value { + +public: + + explicit String(const char *newValue); + String(const char *newValue, size_t len); + String(const char *_name, const char *newValue, const char *desc = 0); + virtual ~String(); + + virtual std::string toString(); + + const char *getVal(); + + virtual void set(Value *); + virtual void set(const char *cP, int len = 0); + virtual void set(Packet &); + + virtual void get(char *, int len); + virtual void get(Packet &); + + virtual Value *copy(); + /// copy the object value to a user char array + virtual char *toString(char *, int len); + + inline operator const char *() { + return getVal(); + } + +private: + std::string value; +}; + +inline bool operator!=(String &LValue, String &RValue) { + return strcmp((const char *)LValue, (const char *)RValue) != 0; +} + + +/*****************************************************************/ + +class AbstractRange : public Value { + +public: + + AbstractRange(uint leftVal, uint rightVal); + virtual ~AbstractRange(); + + virtual string toString(); + string toString(const char* format); + + virtual uint get_leftVal(); + virtual uint get_rightVal(); + + virtual void set(Value *); + + virtual Value *copy(); + /// copy the object value to a user char array + virtual char *toString(char *return_str, int len); + + static AbstractRange* typeCheck(Value* val, string valDesc); + +private: + uint left; + uint right; +}; + +//------------------------------------------------------------------------ +// Function -- maybe should go into its own header file. +// + +namespace gpsim { + class Function : public gpsimObject { + + public: + + Function(const char *_name, const char *desc=0); + virtual ~Function(); + virtual string description(); + virtual string toString(); + + //void call(ExprList_t *vargs); + }; +} + +char * TrimWhiteSpaceFromString(char * pBuffer); +char * UnquoteString(char * pBuffer); +string &toupper(string & sStr); + +#endif // __VALUE_H__ diff --git a/src/gui/QPropertyEditor/ColorCombo.cpp b/src/gui/QPropertyEditor/ColorCombo.cpp new file mode 100644 index 0000000..1e0878a --- /dev/null +++ b/src/gui/QPropertyEditor/ColorCombo.cpp @@ -0,0 +1,87 @@ +// ************************************************************************************************* +// +// QPropertyEditor v 0.3 +// +// -------------------------------------- +// Copyright (C) 2007 Volker Wiendl +// Acknowledgements to Roman alias banal from qt-apps.org for the Enum enhancement +// +// +// The QPropertyEditor Library is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation version 3 of the License +// +// The Horde3D Scene Editor is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// ************************************************************************************************* +/*************************************************************************** + * Modified 2012 by santiago González * + * santigoro@gmail.com * + * * + ***************************************************************************/ + +#include "ColorCombo.h" + +#include + +ColorCombo::ColorCombo(QWidget* parent /*= 0*/) : QComboBox(parent) +{ + QStringList colorNames = QColor::colorNames(); + for (int i = 0; i < colorNames.size(); ++i) { + QColor color(colorNames[i]); + insertItem(i, colorNames[i]); + setItemData(i, color, Qt::DecorationRole); + } + addItem(tr("Custom"), QVariant((int)QVariant::UserType)); + connect(this, SIGNAL(currentIndexChanged(int)), this, SLOT(currentChanged(int))); +} + + +ColorCombo::~ColorCombo() +{ +} + + +QColor ColorCombo::color() const +{ + //return qVariantValue(itemData(currentIndex(), Qt::DecorationRole)); // Qt4 + //QColor color = itemData(currentIndex(), Qt::DecorationRole); + return itemData(currentIndex(), Qt::DecorationRole).value(); +} + +void ColorCombo::setColor(QColor color) +{ + m_init = color; + setCurrentIndex(findData(color, int(Qt::DecorationRole))); + if (currentIndex() == -1) + { + addItem(color.name()); + setItemData(count()-1, color, Qt::DecorationRole); + setCurrentIndex(count()-1); + } +} + +void ColorCombo::currentChanged(int index) +{ + if (itemData(index).isValid() && itemData(index) == QVariant((int)QVariant::UserType)) + { + QColor color = QColorDialog::getColor(m_init, this); + if (color.isValid()) + { + if (findData(color, int(Qt::DecorationRole)) == -1) + { + addItem(color.name()); + setItemData(count()-1, color, Qt::DecorationRole); + } + setCurrentIndex(findData(color, int(Qt::DecorationRole))); + } + else + setCurrentIndex(findData(m_init)); + } +} diff --git a/src/gui/QPropertyEditor/ColorCombo.h b/src/gui/QPropertyEditor/ColorCombo.h new file mode 100644 index 0000000..9c92d40 --- /dev/null +++ b/src/gui/QPropertyEditor/ColorCombo.h @@ -0,0 +1,51 @@ +// ************************************************************************************************* +// +// QPropertyEditor v 0.3 +// +// -------------------------------------- +// Copyright (C) 2007 Volker Wiendl +// Acknowledgements to Roman alias banal from qt-apps.org for the Enum enhancement +// +// +// The QPropertyEditor Library is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation version 3 of the License +// +// The Horde3D Scene Editor is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// ************************************************************************************************* +/*************************************************************************** + * Modified 2012 by santiago González * + * santigoro@gmail.com * + * * + ***************************************************************************/ + +#ifndef COLORCOMBO_H_ +#define COLORCOMBO_H_ + +#include + +class ColorCombo : public QComboBox +{ + Q_OBJECT +public: + ColorCombo(QWidget* parent = 0); + virtual ~ColorCombo(); + + QColor color() const; + void setColor(QColor c); + +private slots: + void currentChanged(int index); + +private: + QColor m_init; + +}; +#endif diff --git a/src/gui/QPropertyEditor/EnumProperty.cpp b/src/gui/QPropertyEditor/EnumProperty.cpp new file mode 100644 index 0000000..d41c976 --- /dev/null +++ b/src/gui/QPropertyEditor/EnumProperty.cpp @@ -0,0 +1,126 @@ +// ************************************************************************************************* +// +// QPropertyEditor v 0.3 +// +// -------------------------------------- +// Copyright (C) 2007 Volker Wiendl +// Acknowledgements to Roman alias banal from qt-apps.org for the Enum enhancement +// +// +// The QPropertyEditor Library is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation version 3 of the License +// +// The Horde3D Scene Editor is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// ************************************************************************************************* +/*************************************************************************** + * Modified 2012 by santiago González * + * santigoro@gmail.com * + * * + ***************************************************************************/ + +#include "EnumProperty.h" + +///////////////////////////////////////////////////////////////////////////////////////////// +// Constructor +///////////////////////////////////////////////////////////////////////////////////////////// +EnumProperty::EnumProperty(const QString &name /* = QString()*/, + QObject *propertyObject /* = 0*/, QObject *parent /* = 0*/) +: Property(name, propertyObject, parent) +{ + // get the meta property object + const QMetaObject* meta = propertyObject->metaObject(); + QMetaProperty prop = meta->property(meta->indexOfProperty(qPrintable(name))); + + // if it is indeed an enum type, fill the QStringList member with the keys + if(prop.isEnumType()){ + QMetaEnum qenum = prop.enumerator(); + for(int i=0; i < qenum.keyCount(); i++){ + m_enum << qenum.key(i); + } + } +} + +///////////////////////////////////////////////////////////////////////////////////////////// +// value +///////////////////////////////////////////////////////////////////////////////////////////// +QVariant EnumProperty::value(int role /* = Qt::UserRole */) const { + if(role == Qt::DisplayRole){ + if (m_propertyObject){ + // resolve the value to the corresponding enum key + int index = m_propertyObject->property(qPrintable(objectName())).toInt(); + + const QMetaObject* meta = m_propertyObject->metaObject(); + QMetaProperty prop = meta->property(meta->indexOfProperty(qPrintable(objectName()))); + return QVariant(prop.enumerator().valueToKey(index)); + } else{ + return QVariant(); + } + } else { + return Property::value(role); + } +} + +///////////////////////////////////////////////////////////////////////////////////////////// +// createEditor +///////////////////////////////////////////////////////////////////////////////////////////// +QWidget* EnumProperty::createEditor(QWidget* parent, const QStyleOptionViewItem& option){ + Q_UNUSED(option); + // create a QComboBox and fill it with the QStringList values + QComboBox* editor = new QComboBox(parent); + editor->addItems(m_enum); + + connect(editor, SIGNAL(currentIndexChanged(const QString)), + this, SLOT(valueChanged(const QString))); + return editor; +} + +///////////////////////////////////////////////////////////////////////////////////////////// +// setEditorData +///////////////////////////////////////////////////////////////////////////////////////////// +bool EnumProperty::setEditorData(QWidget *editor, const QVariant &data) +{ + QComboBox* combo = 0; + if ( (combo = qobject_cast(editor)) ){ + int value = data.toInt(); + const QMetaObject* meta = m_propertyObject->metaObject(); + QMetaProperty prop = meta->property(meta->indexOfProperty(qPrintable(objectName()))); + + int index = combo->findText(prop.enumerator().valueToKey(value)); + if(index == -1) + return false; + + combo->setCurrentIndex(index); + } else { + return false; + } + + return true; +} + +///////////////////////////////////////////////////////////////////////////////////////////// +// editorData +///////////////////////////////////////////////////////////////////////////////////////////// +QVariant EnumProperty::editorData(QWidget *editor) +{ + QComboBox* combo = 0; + if( (combo = qobject_cast(editor)) ){ + return QVariant(combo->currentText()); + } else { + return QVariant(); + } +} + +///////////////////////////////////////////////////////////////////////////////////////////// +// valueChanged +///////////////////////////////////////////////////////////////////////////////////////////// +void EnumProperty::valueChanged(const QString item){ + setValue(QVariant(item)); +} diff --git a/src/gui/QPropertyEditor/EnumProperty.h b/src/gui/QPropertyEditor/EnumProperty.h new file mode 100644 index 0000000..d4f9eaf --- /dev/null +++ b/src/gui/QPropertyEditor/EnumProperty.h @@ -0,0 +1,71 @@ +// ************************************************************************************************* +// +// QPropertyEditor v 0.3 +// +// -------------------------------------- +// Copyright (C) 2007 Volker Wiendl +// Acknowledgements to Roman alias banal from qt-apps.org for the Enum enhancement +// +// +// The QPropertyEditor Library is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation version 3 of the License +// +// The Horde3D Scene Editor is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// ************************************************************************************************* +/*************************************************************************** + * Modified 2012 by santiago González * + * santigoro@gmail.com * + * * + ***************************************************************************/ + +#ifndef __ENUMPROPERTY_H__ +#define __ENUMPROPERTY_H__ + +#include +#include +#include +#include +#include +#include "Property.h" + +/** + The Enum Property Class extends a Property to add enum functionality to the + QPropertyEditor. + Enum Properties are automatically created in the QPropertyModel for objects that + have an enum as property value. + + @author Roman Schmid +*/ +class EnumProperty : public Property +{ + Q_OBJECT + +public: + EnumProperty(const QString& name = QString(), QObject* propertyObject = 0, QObject* parent = 0); + + /** @see Property::value */ + virtual QVariant value(int role = Qt::UserRole) const; + /** @see Property::createEditor */ + virtual QWidget* createEditor(QWidget* parent, const QStyleOptionViewItem& option); + /** @see Property::setEditorData */ + virtual bool setEditorData(QWidget *editor, const QVariant& data); + /** @see Property::editorData */ + virtual QVariant editorData(QWidget *editor); + +private slots: + /** slot that is being called by the editor widget */ + void valueChanged(const QString item); + +private: + /** QStringList with possible enum values */ + QStringList m_enum; +}; +#endif diff --git a/src/gui/QPropertyEditor/Property.cpp b/src/gui/QPropertyEditor/Property.cpp new file mode 100644 index 0000000..fa5fae1 --- /dev/null +++ b/src/gui/QPropertyEditor/Property.cpp @@ -0,0 +1,185 @@ +// ************************************************************************************************* +// +// QPropertyEditor v 0.3 +// +// -------------------------------------- +// Copyright (C) 2007 Volker Wiendl +// Acknowledgements to Roman alias banal from qt-apps.org for the Enum enhancement +// +// +// The QPropertyEditor Library is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation version 3 of the License +// +// The Horde3D Scene Editor is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// ************************************************************************************************* +/*************************************************************************** + * Modified 2012 by santiago González * + * santigoro@gmail.com * + * * + ***************************************************************************/ + +#include "Property.h" +#include "ColorCombo.h" + +#include +#include +//#include + +Property::Property(const QString& name /*= QString()*/, QObject* propertyObject /*= 0*/, QObject* parent /*= 0*/) + : QObject(parent) + , m_propertyObject(propertyObject) +{ + setObjectName(name); + QString propName = name; + propName.replace('_', ' '); + m_propName = QApplication::translate( "App::Property", propName.toLatin1() ); +} + +QString Property::propName() +{ + return m_propName; +} + +QVariant Property::value(int /*role = Qt::UserRole*/) const +{ + if (m_propertyObject) + return m_propertyObject->property(qPrintable(objectName())); + else + return QVariant(); +} + +void Property::setValue(const QVariant &value) +{ + if (m_propertyObject) + m_propertyObject->setProperty(qPrintable(objectName()), value); +} + +bool Property::isReadOnly() +{ + if( m_propertyObject->dynamicPropertyNames().contains( objectName().toLocal8Bit() ) ) + return false; + if (m_propertyObject && m_propertyObject->metaObject()->property(m_propertyObject->metaObject()->indexOfProperty(qPrintable(objectName()))).isWritable()) + return false; + else + return true; +} + +QWidget* Property::createEditor(QWidget *parent, const QStyleOptionViewItem& /*option*/) +{ + QWidget* editor = 0; + switch(value().type()) + { + case QVariant::Color: + editor = new ColorCombo(parent); + break; + case QVariant::Int: + editor = new QSpinBox( parent ); + editor->setProperty("minimum", -1e9); + editor->setProperty("maximum", 1e9); + //connect(editor, SIGNAL(valueChanged(int)), this, SLOT(setValue(int))); + break; + //case QMetaType::Float: + case QVariant::Double: + editor = new QDoubleSpinBox(parent); + editor->setProperty("minimum", -1e9); + editor->setProperty("maximum", 1e9); + editor->setProperty("decimals", 3); + //connect(editor, SIGNAL(valueChanged(double)), this, SLOT(setValue(double))); + break; + default: + return editor; + } + return editor; +} + +bool Property::setEditorData(QWidget *editor, const QVariant &data) +{//qDebug() <<"Property::setEditorData"<(editor)->setColor(data.value()); + return true;; + case QVariant::Int: + editor->blockSignals(true); + static_cast(editor)->setValue(data.toInt()); + editor->blockSignals(false); + return true; + //case QMetaType::Float: + case QVariant::Double: + editor->blockSignals(true); + static_cast(editor)->setValue(data.toDouble()); + editor->blockSignals(false); + return true; + default: + return false; + } + return false; +} + +QVariant Property::editorData(QWidget *editor) +{//qDebug() <<"Property::editorData"; + switch(value().type()) + { + case QVariant::Color: + return QVariant::fromValue(static_cast(editor)->color()); + case QVariant::Int: + return QVariant(static_cast(editor)->value()); + //case QMetaType::Float: + case QVariant::Double: + return QVariant(static_cast(editor)->value()); + break; + default: + return QVariant(); + } +} + +Property* Property::findPropertyObject(QObject* propertyObject) +{ + if (m_propertyObject == propertyObject) + return this; + for (int i=0; i(children()[i])->findPropertyObject(propertyObject); + if (child) + return child; + } + return 0; +} + +void Property::setValue(double value) +{ + setValue(QVariant(value)); +} + +void Property::setValue(int value) +{ + setValue(QVariant(value)); +} + + +/*SpinBox::SpinBox( QWidget *parent ) + : QSpinBox( parent ) +{ +} + +int SpinBox::valueFromText( const QString &text ) const +{ + qDebug()<<"SpinBox::valueFromText" << text; + QScriptEngine engine; + int value = engine.evaluate( text ).toNumber(); + //m_sEngine.evaluate( text ).toNumber(); + return value; +} + +QString SpinBox::textFromValue( int value ) const +{ + return tr("%1 OK").arg(value); +}*/ diff --git a/src/gui/QPropertyEditor/Property.h b/src/gui/QPropertyEditor/Property.h new file mode 100644 index 0000000..f55a74c --- /dev/null +++ b/src/gui/QPropertyEditor/Property.h @@ -0,0 +1,173 @@ +// ************************************************************************************************* +// +// QPropertyEditor v 0.3 +// +// -------------------------------------- +// Copyright (C) 2007 Volker Wiendl +// Acknowledgements to Roman alias banal from qt-apps.org for the Enum enhancement +// +// +// The QPropertyEditor Library is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation version 3 of the License +// +// The Horde3D Scene Editor is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// ************************************************************************************************* +/*************************************************************************** + * Modified 2012 by santiago González * + * santigoro@gmail.com * + * * + ***************************************************************************/ + +#ifndef PROPERTY_H_ +#define PROPERTY_H_ + +//#include +#include +#include +#include +//#include + +/** + * The Property class is the base class for all properties in the QPropertyEditor + * You can implement custom properties inherited from this class to further enhence the + * functionality of the QPropertyEditor + */ +class Property : public QObject +{ + Q_OBJECT + +public: + + /** + * Constructor + * + * @param name the name of the property within the propertyObject (will be used in the QPropertyEditorWidget view too) + * @param propertyObject the object that contains the property + * @param parent optional parent object + */ + Property(const QString& name = QString(), QObject* propertyObject = 0, QObject* parent = 0); + + /** + * The value stored by this property + * @return QVariant the data converted to a QVariant + */ + virtual QVariant value(int role = Qt::UserRole) const; + /** + * Sets the value stored by this property + * @param value the data converted to a QVariant + */ + virtual void setValue(const QVariant& value); + + /** + * Returns the QObject which contains the property managed by this instance + * @return QObject* pointer to the QObject that contains user defined properties + */ + QObject* propertyObject() {return m_propertyObject;} + + /** + * Flag if property is used for indicating a group or really manages a property + * @return bool true if this property is only used to display a category in the QPropertyEditorWidget + */ + bool isRoot() {return m_propertyObject == 0;} + + /** + * Flag if the property can be set + * @return bool true if this property has no set method + */ + bool isReadOnly(); + + /** + * Returns the row of this instance within the QPropertyModel + * @return int row within the QPropertyModel + */ + int row() {return parent()->children().indexOf(this);} + + /** + * returns optional settings for the editor widget that is used to manipulate the properties value + * @return QString a string that contains property settings for the editor widget (e.g. "minimum=1.0;maximum=10.0;") + */ + QString editorHints() {return m_hints;} + + /** + * Sets properties for the editor widget that is used to manipulate the data value managed by this instance + * @param hints a string containing property settings for the editor widget that manipulates this property + */ + virtual void setEditorHints(const QString& hints) {m_hints = hints;} + + /** + * Creates an editor for the data managed by this instance + * @param parent widget the newly created editor widget will be child of + * @param option currently not used + * @return QWidget* pointer to the editor widget + */ + virtual QWidget* createEditor(QWidget* parent, const QStyleOptionViewItem& option); + + /** + * Returns the data of the editor widget used to manipulate this instance + * @return QVariant the data converted to a QVariant + */ + virtual QVariant editorData(QWidget *editor); + + /** + * Changes the editor widget's data to a specific value + * @param editor the editor widget + * @param data the data to set in the editor widget + * @return bool true if editor widget was set to the given data successfully, false if the data can not be set in the editor (e.g. wrong datatype) + */ + virtual bool setEditorData(QWidget *editor, const QVariant& data); + + /** + * Tries to find the first property that manages the given propertyObject + * @param propertyObject + * @return Property + */ + Property* findPropertyObject(QObject* propertyObject); + + QString propName(); + +private slots: + /** + * This slot is used to immediately set the properties when the editor widget's value of a double or double + * property has changed + * @param value the new value + */ + void setValue(double value); + /** + * This slot is used to immediately set the properties when the editor widget's value of an integer + * property has changed + * @param value the new value + */ + void setValue(int value); + +protected: + QObject* m_propertyObject; + QString m_hints; + QString m_propName; +}; + + +//====================================================================== + +/*class SpinBox : public QSpinBox +{ + Q_OBJECT + +public: + SpinBox( QWidget *parent ); + + int valueFromText(const QString &text) const override; + QString textFromValue(int value) const override; + +private: + QScriptEngine m_sEngine; +};*/ + +#endif diff --git a/src/gui/QPropertyEditor/QPropertyEditorWidget.cpp b/src/gui/QPropertyEditor/QPropertyEditorWidget.cpp new file mode 100644 index 0000000..ca61eb7 --- /dev/null +++ b/src/gui/QPropertyEditor/QPropertyEditorWidget.cpp @@ -0,0 +1,90 @@ +// ************************************************************************************************* +// +// QPropertyEditor v 0.3 +// +// -------------------------------------- +// Copyright (C) 2007 Volker Wiendl +// Acknowledgements to Roman alias banal from qt-apps.org for the Enum enhancement +// +// +// The QPropertyEditor Library is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation version 3 of the License +// +// The Horde3D Scene Editor is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// ************************************************************************************************* + +#include "QPropertyEditorWidget.h" +#include "QPropertyModel.h" +#include "QVariantDelegate.h" +#include "Property.h" +#include "mainwindow.h" + +QPropertyEditorWidget* QPropertyEditorWidget::m_pSelf = 0l; + +QPropertyEditorWidget::QPropertyEditorWidget(QWidget* parent /*= 0*/) + : QTreeView(parent) +{ + m_pSelf = this; + m_model = new QPropertyModel(this); + setModel( m_model ); + setItemDelegate( new QVariantDelegate(this) ); + setAlternatingRowColors(true); + setIndentation(12); + //QString fontSize = QString::number( int(12*MainWindow::self()->fontScale()) ); + //setStyleSheet("QTreeView { font-size:"+fontSize+"px; }"); + m_propertyObject = 0l; +} + +QPropertyEditorWidget::~QPropertyEditorWidget(){} + +void QPropertyEditorWidget::addObject(QObject* propertyObject) +{ + m_model->addItem(propertyObject); + expandToDepth(0); +} + +void QPropertyEditorWidget::setObject(QObject* propertyObject) +{ + m_model->clear(); + if (propertyObject) + { + addObject(propertyObject); + m_propertyObject = propertyObject; + } +} + +void QPropertyEditorWidget::updateObject(QObject* propertyObject) +{ + if( propertyObject ) + m_model->updateItem(propertyObject); +} + +void QPropertyEditorWidget::clearView() +{ + m_model->clear(); +} + +void QPropertyEditorWidget::removeObject(QObject* propertyObject) +{ + if( propertyObject == m_propertyObject) + m_model->clear(); +} + +void QPropertyEditorWidget::registerCustomPropertyCB(UserTypeCB callback) +{ + m_model->registerCustomPropertyCB(callback); +} + +void QPropertyEditorWidget::unregisterCustomPropertyCB(UserTypeCB callback) +{ + m_model->unregisterCustomPropertyCB(callback); +} + diff --git a/src/gui/QPropertyEditor/QPropertyEditorWidget.h b/src/gui/QPropertyEditor/QPropertyEditorWidget.h new file mode 100644 index 0000000..6bf2a8b --- /dev/null +++ b/src/gui/QPropertyEditor/QPropertyEditorWidget.h @@ -0,0 +1,139 @@ +// ************************************************************************************************* +// +// QPropertyEditor v 0.3 +// +// -------------------------------------- +// Copyright (C) 2007 Volker Wiendl +// Acknowledgements to Roman alias banal from qt-apps.org for the Enum enhancement +// +// +// The QPropertyEditor Library is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation version 3 of the License +// +// The Horde3D Scene Editor is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// ************************************************************************************************* +/*************************************************************************** + * Modified 2012 by santiago González * + * santigoro@gmail.com * + * * + ***************************************************************************/ + +#ifndef QPROPERTYEDITORWIDGET_H_ +#define QPROPERTYEDITORWIDGET_H_ + +#include + +class QPropertyModel; +class Property; + +/** + * \mainpage QPropertyEditor + * + * \section intro_sec Introduction + * + * The main purpose for the QPropertyEditor is the visualization and manipulation of properties defined via the Q_PROPERTY macro in + * QObject based classes. + */ + +/** + * \brief The QPropertyEditorWidget offers an easy to use mechanism to visualize properties of a class inherited from QObject. + * + * Qt provides a nice way to define class properties by using the Q_PROPERTY macro. The purpose of the QPropertyEditor + * is to visualize these properties in an easy way. + * + * To use the property editor, all you have to do is to create a class that defines it's properties by using Q_PROPERTY + * and to add this class by using the addObject() method of this QPropertyEditorWidget class. + * The QPropertyEditorWidget is inherited from QTreeView and will display the properties in a tree with two columns: Name and Value + * + * For basic data types the build in editor widgets of Qt will be used. The QPropertyEditor itself only defines an additional + * editor for QColor (based on the Color Editor Factory Example from Trolltech). But it can easily be extended by yourself + * either within the library or for special datatypes also outside of the library in your application. + */ + + + +class MAINMODULE_EXPORT QPropertyEditorWidget : public QTreeView +{ + Q_OBJECT +public: + + /** + * A typedef for a callback used to create user defined properties for custom datatypes + */ + typedef Property* (*UserTypeCB)(const QString& name, QObject* propertyObject, Property* parent); + + /** + * \brief Constructor + * + * Creates a new editor widget based on QTreeView + * @param parent optional parent widget + */ + QPropertyEditorWidget(QWidget* parent = 0); + + /// Destructor + virtual ~QPropertyEditorWidget(); + + static QPropertyEditorWidget * self() { return m_pSelf; } + + /** + * Adds the user properties of the given class to the QPropertyModel associated with this view + * + * @param propertyObject the class inherited from QObject that contains user properties that should be + * managed by the QPropertyModel associated with this view + */ + void addObject(QObject* propertyObject); + + /** + * Similar to the addObject() method this method adds the properties of the given class to the QPropertyModel + * associated with this view. But in contrast to addObject() it will clear the model before, removing all + * previously added objects. + * + * @param propertyObject the class inherited from QObject that contains user properties that should be + * managed by the QPropertyModel associated with this view + */ + void setObject(QObject* propertyObject); + + /** + * Updates the view for the given object. This can be usefull if a property was changed programmatically instead + * of using the view. In this case the view normally will display the new property values only after the user clicked + * on it. To overcome this problem you can call updateObject with the object whose property was changed. + */ + void updateObject(QObject* propertyObject); + + void clearView(); + + void removeObject(QObject* propertyObject); + + /** + * If you define custom datatypes outside of this library the QPropertyModel will check if you + * also defined a callback that is responsible to create custom property classes inherited from Property to handle + * these datatypes. With this method you can register such a callback that will create custom properties for custom datatypes. + */ + void registerCustomPropertyCB(UserTypeCB callback); + + /** + * You can register more than one callback. If one of those callbacks are not used any longer, you can unregister + * it with this method + */ + void unregisterCustomPropertyCB(UserTypeCB callback); + +private: + + static QPropertyEditorWidget * m_pSelf; + + // The Model for this view + QPropertyModel* m_model; + + // The object actually displayed + QObject* m_propertyObject; + +}; +#endif diff --git a/src/gui/QPropertyEditor/QPropertyModel.cpp b/src/gui/QPropertyEditor/QPropertyModel.cpp new file mode 100644 index 0000000..4b09150 --- /dev/null +++ b/src/gui/QPropertyEditor/QPropertyModel.cpp @@ -0,0 +1,355 @@ +// ************************************************************************************************* +// +// QPropertyEditor v 0.3 +// +// -------------------------------------- +// Copyright (C) 2007 Volker Wiendl +// Acknowledgements to Roman alias banal from qt-apps.org for the Enum enhancement +// +// +// The QPropertyEditor Library is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation version 3 of the License +// +// The Horde3D Scene Editor is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// ************************************************************************************************* +/*************************************************************************** + * Modified 2012 by santiago González * + * santigoro@gmail.com * + * * + ***************************************************************************/ + +#include "QPropertyModel.h" + +#include "Property.h" +#include "EnumProperty.h" + +#include +#include +#include +//#include + +struct PropertyPair +{ + PropertyPair(const QMetaObject* obj, QMetaProperty property) : Property(property), Object(obj) {} + + QMetaProperty Property; + const QMetaObject* Object; + + bool operator==(const PropertyPair& other) const + {return QString(other.Property.name()) == QString(Property.name());} +}; + +QPropertyModel::QPropertyModel(QObject* parent /*= 0*/) : QAbstractItemModel(parent) +{ + m_rootItem = new Property("Root",0, this); +} + +QPropertyModel::~QPropertyModel(){} + +QModelIndex QPropertyModel::index( int row, int column, const QModelIndex & parent /*= QModelIndex()*/ ) const +{ + Property *parentItem = m_rootItem; + if (parent.isValid()) + parentItem = static_cast(parent.internalPointer()); + if (row >= parentItem->children().size() || row < 0) + return QModelIndex(); + return createIndex(row, column, parentItem->children().at(row)); + +} + +QModelIndex QPropertyModel::parent( const QModelIndex & index ) const +{ + if (!index.isValid()) return QModelIndex(); + + Property *childItem = static_cast(index.internalPointer()); + Property *parentItem = qobject_cast(childItem->parent()); + + if (!parentItem || parentItem == m_rootItem) return QModelIndex(); + + return createIndex(parentItem->row(), 0, parentItem); +} + +int QPropertyModel::rowCount ( const QModelIndex & parent /*= QModelIndex()*/ ) const +{ + Property *parentItem = m_rootItem; + if (parent.isValid()) + parentItem = static_cast(parent.internalPointer()); + return parentItem->children().size(); +} + +int QPropertyModel::columnCount ( const QModelIndex & /*parent = QModelIndex()*/ ) const +{ + return 2; +} + +QVariant QPropertyModel::data ( const QModelIndex & index, int role /*= Qt::DisplayRole*/ ) const +{ + if (!index.isValid()) return QVariant(); + + Property *item = static_cast(index.internalPointer()); + switch(role) + { + case Qt::SizeHintRole: return QSize( 25, 25 ); + case Qt::ToolTipRole: + case Qt::DecorationRole: + case Qt::DisplayRole: + case Qt::EditRole: + if( index.column() == 0 ) { return item->propName(); } + if( index.column() == 1 ) return item->value(role); + case Qt::BackgroundRole: + if( item->isRoot() ) return QApplication::palette("QTreeView").brush(QPalette::Normal, QPalette::Button).color(); + break; + }; + return QVariant(); +} + +// edit methods +bool QPropertyModel::setData( const QModelIndex & index, const QVariant & value, int role /*= Qt::EditRole*/ ) +{ + //qDebug() <<"QPropertyModel::setData"<(index.internalPointer()); + item->setValue(value); + emit dataChanged(index, index); + return true; + } + return false; +} + +Qt::ItemFlags QPropertyModel::flags( const QModelIndex & index ) const +{ + if (!index.isValid()) return Qt::ItemIsEnabled; + + Property *item = static_cast(index.internalPointer()); + // only allow change of value attribute + if (item->isRoot()) return Qt::ItemIsEnabled; + + else if(item->isReadOnly()) return Qt::ItemIsSelectable; + + else return Qt::ItemIsEnabled + | Qt::ItemIsSelectable + | Qt::ItemIsEditable; +} + +QVariant QPropertyModel::headerData( int section, Qt::Orientation orientation, int role /*= Qt::DisplayRole*/ ) const +{ + if (orientation == Qt::Horizontal && role == Qt::DisplayRole) + { + switch (section) + { + case 0: return tr("Name"); + case 1: return tr("Value"); + } + } + return QVariant(); +} + +QModelIndex QPropertyModel::buddy( const QModelIndex & index ) const +{ + if (index.isValid() && index.column() == 0) + return createIndex(index.row(), 1, index.internalPointer()); + return index; +} + +void QPropertyModel::addItem( QObject *propertyObject ) +{ + // first create property <-> class hierarchy + QList propertyMap; + QList classList; + const QMetaObject* metaObject = propertyObject->metaObject(); + do + { + int count = metaObject->propertyCount(); + for (int i=0; iproperty(i); + + if( property.isUser() && ( property.name() != QString("plainText") )) // Hide Qt specific properties + { + PropertyPair pair(metaObject, property); + int index = propertyMap.indexOf(pair); + + if( index != -1 ) propertyMap[index] = pair; + else propertyMap.push_back(pair); + } + } + classList.push_front(metaObject); + } + while ((metaObject = metaObject->superClass())!=0); + + QList finalClassList; + // remove empty classes from hierarchy list + foreach(const QMetaObject* obj, classList) + { + bool keep = false; + foreach(PropertyPair pair, propertyMap) + { + if (pair.Object == obj) + { + keep = true; + break; + } + } + if (keep) finalClassList.push_back(obj); + } + + // finally insert properties for classes containing them + int i=rowCount(); + + // Create Property Item for class node + Property* propertyItem = new Property(propertyObject->objectName (), 0, m_rootItem); + beginInsertRows( QModelIndex(), i, i + finalClassList.count() ); + + foreach(const QMetaObject* metaObject, finalClassList) + { + foreach(PropertyPair pair, propertyMap) + { + // Check if the property is associated with the current class from the finalClassList + if (pair.Object == metaObject) + { + QMetaProperty property(pair.Property); + Property* p = 0; + if (property.type() == QVariant::UserType && !m_userCallbacks.isEmpty()) + { + QList::iterator iter = m_userCallbacks.begin(); + while( p == 0 && iter != m_userCallbacks.end() ) + { + p = (*iter)(property.name(), propertyObject, propertyItem); + ++iter; + } + } + if( p == 0){ + if(property.isEnumType()){ + p = new EnumProperty(property.name(), propertyObject, propertyItem); + } + else { + p = new Property(property.name(), propertyObject, propertyItem); + } + } + int index = metaObject->indexOfClassInfo(property.name()); + if (index != -1) + p->setEditorHints(metaObject->classInfo(index).value()); + } + } + } + endInsertRows(); + if( propertyItem ) addDynamicProperties( propertyItem, propertyObject ); +} + +void QPropertyModel::updateItem ( QObject* propertyObject, const QModelIndex& parent /*= QModelIndex() */ ) +{ + Property *parentItem = m_rootItem; + if( parent.isValid() ) + parentItem = static_cast(parent.internalPointer()); + + if( parentItem->propertyObject() != propertyObject ) + parentItem = parentItem->findPropertyObject(propertyObject ); + + if( parentItem ) // Indicate view that the data for the indices have changed + { + QModelIndex itemIndex = createIndex(parentItem->row(), 0, static_cast(parentItem)); + dataChanged(itemIndex, createIndex(parentItem->row(), 1, static_cast(parentItem))); + QList dynamicProperties = propertyObject->dynamicPropertyNames(); + QList childs = parentItem->parent()->children(); + int removed = 0; + for( int i=0; iproperty("__Dynamic").toBool() || dynamicProperties.contains( obj->objectName().toLocal8Bit() ) ) + continue; + beginRemoveRows(itemIndex.parent(), i - removed, i - removed); + ++removed; + delete obj; + endRemoveRows(); + } + addDynamicProperties(static_cast(parentItem->parent()), propertyObject); + } +} + +void QPropertyModel::addDynamicProperties( Property* parent, QObject* propertyObject ) +{ + // Get dynamic property names + QList dynamicProperties = propertyObject->dynamicPropertyNames(); + + QList childs = parent->children(); + + // Remove already existing properties from list + for(int i = 0; i < childs.count(); ++i ) + { + if( !childs[i]->property("__Dynamic").toBool() ) continue; + + int index = dynamicProperties.indexOf( childs[i]->objectName().toLocal8Bit() ); + if( index != -1) + { + dynamicProperties.removeAt(index); + continue; + } + } + + // Remove invalid properites and those we don't want to add + for(int i = 0; i < dynamicProperties.size(); ++i ) + { + QString dynProp = dynamicProperties[i]; + + // Skip properties starting with _ (because there may be dynamic properties from Qt with _q_ and we may + // have user defined hidden properties starting with _ too + if( dynProp.startsWith("_") || !propertyObject->property( qPrintable(dynProp) ).isValid() ) + { + dynamicProperties.removeAt(i); + --i; + } + } + + if( dynamicProperties.empty() ) return; + + QModelIndex parentIndex = createIndex(parent->row(), 0, static_cast(parent)); + int rows = rowCount(parentIndex); + beginInsertRows(parentIndex, rows, rows + dynamicProperties.count() - 1 ); + + // Add properties left in the list + foreach(QByteArray dynProp, dynamicProperties ) + { + QVariant v = propertyObject->property(dynProp); + Property* p = 0; + if( v.type() == QVariant::UserType && !m_userCallbacks.isEmpty() ) + { + QList::iterator iter = m_userCallbacks.begin(); + while( p == 0 && iter != m_userCallbacks.end() ) + { + p = (*iter)(dynProp, propertyObject, parent); + ++iter; + } + } + if( p == 0 ) p = new Property(dynProp, propertyObject, parent); + p->setProperty("__Dynamic", true); + } + endInsertRows(); +} + +void QPropertyModel::clear() +{ + beginRemoveRows(QModelIndex(), 0, rowCount()); + delete m_rootItem; + m_rootItem = new Property("Root", 0, this); + endRemoveRows(); +} + +void QPropertyModel::registerCustomPropertyCB(QPropertyEditorWidget::UserTypeCB callback) +{ + if( !m_userCallbacks.contains(callback) ) m_userCallbacks.push_back(callback); +} + +void QPropertyModel::unregisterCustomPropertyCB(QPropertyEditorWidget::UserTypeCB callback) +{ + int index = m_userCallbacks.indexOf(callback); + if( index != -1 ) m_userCallbacks.removeAt(index); +} diff --git a/src/gui/QPropertyEditor/QPropertyModel.h b/src/gui/QPropertyEditor/QPropertyModel.h new file mode 100644 index 0000000..1b96a3f --- /dev/null +++ b/src/gui/QPropertyEditor/QPropertyModel.h @@ -0,0 +1,124 @@ +// ************************************************************************************************* +// +// QPropertyEditor v 0.3 +// +// -------------------------------------- +// Copyright (C) 2007 Volker Wiendl +// Acknowledgements to Roman alias banal from qt-apps.org for the Enum enhancement +// +// +// The QPropertyEditor Library is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation version 3 of the License +// +// The Horde3D Scene Editor is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// ************************************************************************************************* +/*************************************************************************** + * Modified 2012 by santiago González * + * santigoro@gmail.com * + * * + ***************************************************************************/ + +#ifndef QPROPERTYMODEL_H_ +#define QPROPERTYMODEL_H_ + +#include +#include + +#include "QPropertyEditorWidget.h" + +class Property; + +/** + * The QPropertyModel handles the user defined properties of QObjects + */ +class QPropertyModel : public QAbstractItemModel +{ + Q_OBJECT +public: + /** + * Constructor + * @param parent optional parent object + */ + QPropertyModel(QObject* parent = 0); + /// Destructor + virtual ~QPropertyModel(); + + /// QAbstractItemModel implementation + QModelIndex index ( int row, int column, const QModelIndex & parent = QModelIndex() ) const; + + /// QAbstractItemModel implementation + QModelIndex parent ( const QModelIndex & index ) const; + + /// QAbstractItemModel implementation + int rowCount ( const QModelIndex & parent = QModelIndex() ) const; + + /// QAbstractItemModel implementation + int columnCount ( const QModelIndex & parent = QModelIndex() ) const; + + /// QAbstractItemModel implementation + QVariant data ( const QModelIndex & index, int role = Qt::DisplayRole ) const; + + /// QAbstractItemModel implementation + bool setData ( const QModelIndex & index, const QVariant & value, int role = Qt::EditRole ); + + /// QAbstractItemModel implementation + Qt::ItemFlags flags ( const QModelIndex & index ) const; + + /// QAbstractItemModel implementation + QVariant headerData ( int section, Qt::Orientation orientation, int role = Qt::DisplayRole ) const; + + /// QAbstractItemModel implementation + QModelIndex buddy ( const QModelIndex & index ) const; + + /** + * Adds the user properties of the given class to the QPropertyModel instance + * + * @param propertyObject the class inherited from QObject that contains user properties that should be + * managed by this instance + */ + void addItem( QObject* propertyObject ); + + /** + * Creates a dataChanged signal for the given object + * @param propertyObject the instance of a QObject based class that should be updated + * @param parent optional model index the propertyObject is child of + */ + void updateItem( QObject* propertyObject, const QModelIndex& parent = QModelIndex() ) ; + + /** + * Removes all objects from the model + */ + void clear(); + + /** + * Adds custom callback that will be used to create Property instances for custom datatypes + */ + void registerCustomPropertyCB( QPropertyEditorWidget::UserTypeCB callback ); + + /** + * Adds custom callback that will be used to create Property instances for custom datatypes + */ + void unregisterCustomPropertyCB( QPropertyEditorWidget::UserTypeCB callback ); + + +private: + + /// Adds dynamic properties to the model + void addDynamicProperties( Property* parent, QObject* propertyObject ); + + /// The Root Property for all objects + Property* m_rootItem; + + /// Custom callback + QList m_userCallbacks; + +}; +#endif diff --git a/src/gui/QPropertyEditor/QVariantDelegate.cpp b/src/gui/QPropertyEditor/QVariantDelegate.cpp new file mode 100644 index 0000000..a548c5d --- /dev/null +++ b/src/gui/QPropertyEditor/QVariantDelegate.cpp @@ -0,0 +1,139 @@ +// ************************************************************************************************* +// +// QPropertyEditor v 0.3 +// +// -------------------------------------- +// Copyright (C) 2007 Volker Wiendl +// Acknowledgements to Roman alias banal from qt-apps.org for the Enum enhancement +// +// +// The QPropertyEditor Library is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation version 3 of the License +// +// The Horde3D Scene Editor is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// ************************************************************************************************* +/*************************************************************************** + * Modified 2012 by santiago González * + * santigoro@gmail.com * + * * + ***************************************************************************/ + +#include "QVariantDelegate.h" + +#include "Property.h" + +#include +#include +//#include + +QVariantDelegate::QVariantDelegate(QObject* parent) : QItemDelegate(parent) +{ + m_finishedMapper = new QSignalMapper(this); + connect(m_finishedMapper, SIGNAL(mapped(QWidget*)), this, SIGNAL(commitData(QWidget*))); + connect(m_finishedMapper, SIGNAL(mapped(QWidget*)), this, SIGNAL(closeEditor(QWidget*))); +} + +QVariantDelegate::~QVariantDelegate(){} + +QWidget *QVariantDelegate::createEditor(QWidget *parent, const QStyleOptionViewItem& option , const QModelIndex & index ) const +{ + QWidget* editor = 0; + Property* p = static_cast(index.internalPointer()); + switch(p->value().type()) + { + case QVariant::Color: + case QVariant::Int: + //case QMetaType::Float: + case QVariant::Double: + case QVariant::UserType: + editor = p->createEditor(parent, option); + if (editor) + { + if (editor->metaObject()->indexOfSignal("editFinished()") != -1) + { + connect(editor, SIGNAL(editFinished()), m_finishedMapper, SLOT(map())); + m_finishedMapper->setMapping(editor, editor); + } + break; // if no editor could be created take default case + } + default: + editor = QItemDelegate::createEditor(parent, option, index); + } + parseEditorHints(editor, p->editorHints()); + return editor; +} + +void QVariantDelegate::setEditorData(QWidget *editor, const QModelIndex &index) const +{ + m_finishedMapper->blockSignals(true); + QVariant data = index.model()->data(index, Qt::EditRole); + //qDebug() <<"QVariantDelegate::setEditorData"<(index.internalPointer())->setEditorData(editor, data)) // if editor couldn't be recognized use default + break; + default: + QItemDelegate::setEditorData(editor, index); + break; + } + m_finishedMapper->blockSignals(false); +} + +void QVariantDelegate::setModelData(QWidget *editor, QAbstractItemModel *model, const QModelIndex &index) const +{ + QVariant data = index.model()->data(index, Qt::EditRole); + switch(data.type()) + { + case QVariant::Color: + case QMetaType::Double: + case QVariant::UserType: + case QVariant::Int: + { + QVariant data = static_cast(index.internalPointer())->editorData(editor); + if (data.isValid()) + { + model->setData(index, data , Qt::EditRole); + break; + } + } + default: + QItemDelegate::setModelData(editor, model, index); + break; + } +} + +void QVariantDelegate::updateEditorGeometry(QWidget *editor, const QStyleOptionViewItem &option, const QModelIndex& index ) const +{ + return QItemDelegate::updateEditorGeometry(editor, option, index); +} + +void QVariantDelegate::parseEditorHints(QWidget* editor, const QString& editorHints) const +{ + if (editor && !editorHints.isEmpty()) + { + editor->blockSignals(true); + // Parse for property values + QRegExp rx("(.*)(=\\s*)(.*)(;{1})"); + rx.setMinimal(true); + int pos = 0; + while ((pos = rx.indexIn(editorHints, pos)) != -1) + { + //qDebug("Setting %s to %s", qPrintable(rx.cap(1)), qPrintable(rx.cap(3))); + editor->setProperty(qPrintable(rx.cap(1).trimmed()), rx.cap(3).trimmed()); + pos += rx.matchedLength(); + } + editor->blockSignals(false); + } +} diff --git a/src/gui/QPropertyEditor/QVariantDelegate.h b/src/gui/QPropertyEditor/QVariantDelegate.h new file mode 100644 index 0000000..42361ff --- /dev/null +++ b/src/gui/QPropertyEditor/QVariantDelegate.h @@ -0,0 +1,85 @@ +// ************************************************************************************************* +// +// QPropertyEditor v 0.3 +// +// -------------------------------------- +// Copyright (C) 2007 Volker Wiendl +// Acknowledgements to Roman alias banal from qt-apps.org for the Enum enhancement +// +// +// The QPropertyEditor Library is free software; you can redistribute it and/or modify +// it under the terms of the GNU General Public License as published by +// the Free Software Foundation version 3 of the License +// +// The Horde3D Scene Editor is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. +// +// You should have received a copy of the GNU General Public License +// along with this program. If not, see . +// +// ************************************************************************************************* +/*************************************************************************** + * Modified 2012 by santiago González * + * santigoro@gmail.com * + * * + ***************************************************************************/ + +#ifndef COLORSELECTIONBUTTON_H_ +#define COLORSELECTIONBUTTON_H_ + +#include + +class QSignalMapper; + +/** + * This class is used to create the editor widgets for datatypes encapsulated in QVariant variables + */ +class QVariantDelegate : public QItemDelegate +{ + Q_OBJECT + +public: + /** + * Constructor + * @param parent optional parent object + */ + QVariantDelegate(QObject* parent = 0); + /// Destructor + virtual ~QVariantDelegate(); + + /** + * Creates an editor widget as child of a given widget for a specific QModelIndex + * + * @param parent the parent widget for the editor + * @param option some style options that the editor should use + * @param index the index of the item the editor will be created for + * @return QWidget the editor widget + */ + QWidget *createEditor(QWidget *parent, const QStyleOptionViewItem &option, const QModelIndex &index) const; + + /** + * Tries to set the editor data based on the value stored at a specific QModelIndex + * @param editor the editor widget + * @param index the model index of the value that should be used in the editor + */ + virtual void setEditorData(QWidget *editor, const QModelIndex &index) const; + + /** + * Sets the data of a specific QModelIndex to the value of the editor widget + * @param editor the editor widget that contains the new value + * @param model the model that contains the index + * @param index the index within the model whose data value should be set to the data value of the editor + */ + virtual void setModelData(QWidget *editor, QAbstractItemModel *model, const QModelIndex &index) const; + + /// QItemDelegate implementation + virtual void updateEditorGeometry(QWidget *editor, const QStyleOptionViewItem &option, const QModelIndex &index) const; + +private: + void parseEditorHints(QWidget* editor, const QString& editorHints) const; + + QSignalMapper* m_finishedMapper; +}; +#endif diff --git a/src/gui/QPropertyEditor/propertieswidget.cpp b/src/gui/QPropertyEditor/propertieswidget.cpp new file mode 100644 index 0000000..a0d04c9 --- /dev/null +++ b/src/gui/QPropertyEditor/propertieswidget.cpp @@ -0,0 +1,66 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "propertieswidget.h" +#include "mainwindow.h" + +PropertiesWidget* PropertiesWidget::m_pSelf = 0l; + +PropertiesWidget::PropertiesWidget( QWidget *parent ) + :QWidget( parent ) +{ + m_pSelf = this; + + createWidgets(); +} + +PropertiesWidget::~PropertiesWidget() +{ +} + +void PropertiesWidget::createWidgets() +{ + QGridLayout* widgetLayout = new QGridLayout( this ); + widgetLayout->setSpacing(0); + widgetLayout->setContentsMargins(0, 0, 0, 0); + widgetLayout->setObjectName( "widgetLayout" ); + + QSplitter* splitter0 = new QSplitter( this ); + splitter0->setObjectName("splitter0"); + splitter0->setOrientation( Qt::Vertical ); + widgetLayout->addWidget( splitter0 ); + + m_properties = new QPropertyEditorWidget( this ); + m_help = new QPlainTextEdit( this ); + + splitter0->addWidget( m_properties ); + splitter0->addWidget( m_help ); + + m_help->appendPlainText( tr( "Here will be some help ..............................................\n" )); + m_help->setReadOnly( true ); +} + +void PropertiesWidget::setHelpText( QString* text ) +{ + if( !text ) return; + m_help->clear(); + m_help->appendPlainText( *text ); +} + +#include "moc_propertieswidget.cpp" diff --git a/src/gui/QPropertyEditor/propertieswidget.h b/src/gui/QPropertyEditor/propertieswidget.h new file mode 100644 index 0000000..7d0692c --- /dev/null +++ b/src/gui/QPropertyEditor/propertieswidget.h @@ -0,0 +1,49 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef PROPERTIESWIDGET_H +#define PROPERTIESWIDGET_H + +#include + +#include "QPropertyEditorWidget.h" + + +class PropertiesWidget : public QWidget +{ + Q_OBJECT + + public: + PropertiesWidget( QWidget *parent ); + ~PropertiesWidget(); + + static PropertiesWidget* self() { return m_pSelf; } + + void setHelpText( QString* text ); + + private: + static PropertiesWidget* m_pSelf; + + void createWidgets(); + + QPropertyEditorWidget* m_properties; + QPlainTextEdit* m_help; +}; + +#endif // PROPERTIESWIDGET_H diff --git a/src/gui/circuitwidget/chip.cpp b/src/gui/circuitwidget/chip.cpp new file mode 100644 index 0000000..003dd60 --- /dev/null +++ b/src/gui/circuitwidget/chip.cpp @@ -0,0 +1,301 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include + +#include "chip.h" +#include "connector.h" +#include "circuit.h" +#include "utils.h" +#include "pin.h" +#include "simuapi_apppath.h" + + +Chip::Chip( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( id.toStdString() ) +{ + m_numpins = 0; + m_isLS = false; + + m_pkgeFile = ""; + + m_lsColor = QColor( 255, 255, 255 ); + m_icColor = QColor( 50, 50, 70 ); + + setLabelPos( m_area.x(), m_area.y()-20, 0); +} +Chip::~Chip() {} + +void Chip::initChip() +{ + //qDebug() << "Chip::initChip"<getFileName() ).absoluteDir(); + QString fileNameAbs = circuitDir.absoluteFilePath( m_pkgeFile ); + + QFile pfile( fileNameAbs ); + if( !pfile.exists() ) // Check if package file exist, if not try LS or no LS + { + if ( m_pkgeFile.endsWith("_LS.package")) m_pkgeFile.replace( "_LS.package", ".package" ); + else if( m_pkgeFile.endsWith(".package")) m_pkgeFile.replace( ".package", "_LS.package" ); + else qDebug() << "SubPackage::setPackage: No package files found.\nTODO: create dummy package\n"; + fileNameAbs = circuitDir.absoluteFilePath( m_pkgeFile ); + } + QFile file( fileNameAbs ); + if( !file.open( QFile::ReadOnly | QFile::Text) ) + { + MessageBoxNB( "Chip::initChip", + tr( "Cannot read file:\n%1:\n%2." ).arg(m_pkgeFile).arg(file.errorString()) ); + m_error = 1; + return; + } + + QDomDocument domDoc; + if( !domDoc.setContent(&file) ) + { + MessageBoxNB( "Chip::initChip", + tr( "Cannot set file:\n%1\nto DomDocument" ) .arg(m_pkgeFile)); + file.close(); + m_error = 2; + return; + } + file.close(); + + QDomElement root = domDoc.documentElement(); + + if( root.tagName()!="package" ) + { + MessageBoxNB( "Chip::initChip", + tr( "Error reading Chip file:\n%1\nNo valid Chip" ) .arg(m_pkgeFile)); + m_error = 3; + return; + } + + m_width = root.attribute( "width" ).toInt(); + m_height = root.attribute( "height" ).toInt(); + m_numpins = root.attribute( "pins" ).toInt(); + + foreach( Pin* pin, m_pin ) + { + if( pin->connector() ) pin->connector()->remove(); + if( pin->scene() ) Circuit::self()->removeItem( pin ); + pin->reset(); + delete pin; + } + m_ePin.clear(); + m_pin.clear(); + m_ePin.resize( m_numpins ); + m_pin.resize( m_numpins ); + + m_rigPin.clear(); + m_topPin.clear(); + m_lefPin.clear(); + m_botPin.clear(); + + if( m_pkgeFile.endsWith( "_LS.package" )) m_isLS = true; + else m_isLS = false; + + if( m_isLS ) m_color = m_lsColor; + else m_color = m_icColor; + + m_area = QRect( 0, 0, 8*m_width, 8*m_height ); + //setTransformOriginPoint( togrid( boundingRect().center()) ); + + setShowId( true ); + + QDomNode node = root.firstChild(); + + int chipPos = 0; + + while( !node.isNull() ) + { + QDomElement element = node.toElement(); + if( element.tagName() == "pin" ) + { + QString type = element.attribute( "type" ); + QString label = element.attribute( "label" ); + QString id = element.attribute( "id" ); + QString side = element.attribute( "side" ); + int pos = element.attribute( "pos" ).toInt(); + + int xpos = 0; + int ypos = 0; + int angle = 0; + + if( side=="left" ) + { + xpos = -8; + ypos = 8*pos; + angle = 180; + } + else if( side=="top") + { + xpos = 8*pos; + ypos = -8; + angle = 90; + } + else if( side=="right" ) + { + xpos = m_width*8+8; + ypos = 8*pos; + angle = 0; + } + else if( side=="bottom" ) + { + xpos = 8*pos; + ypos = m_height*8+8; + angle = 270; + } + chipPos++; + addPin( id, type, label, chipPos, xpos, ypos, angle ); + } + node = node.nextSibling(); + } +} + +void Chip::addPin( QString id, QString type, QString label, int pos, int xpos, int ypos, int angle ) +{ + Pin* pin = new Pin( angle, QPoint(xpos, ypos), m_id+"-"+id, pos-1, this ); // pos in package starts at 1 + + //m_pinMap[id] = pin; + + pin->setLabelText( label ); + + if ( type == "inverted" ) pin->setInverted( true ); + else if( type == "unused" ) pin->setUnused( true ); + else if( type == "null" ) + { + pin->setVisible( false ); + pin->setLabelText( "" ); + } + if ( angle == 0 ) m_rigPin.append( pin ); + else if( angle == 90 ) m_topPin.append( pin ); + else if( angle == 180 ) m_lefPin.append( pin ); + else if( angle == 270 ) m_botPin.append( pin ); + + if( m_isLS ) pin->setLabelColor( QColor( 0, 0, 0 ) ); + + m_ePin[pos-1] = pin; + m_pin[pos-1] = pin; +} + +/*void Chip::updatePin( QString id, QString type, QString label, int pos, int xpos, int ypos, int angle ) +{ + Pin* pin = m_pin[pos-1]; // pos in package starts at 1 + + pin->setLabelText( label ); + pin->setPos( QPoint(xpos, ypos) ); + + int oldAngle = pin->pinAngle(); + if( angle != oldAngle ) + { + if ( oldAngle == 0 ) m_rigPin.removeOne( pin ); + else if( oldAngle == 90 ) m_topPin.removeOne( pin ); + else if( oldAngle == 180 ) m_lefPin.removeOne( pin ); + else if( oldAngle == 270 ) m_botPin.removeOne( pin ); + + if ( angle == 0 ) m_rigPin.append( pin ); + else if( angle == 90 ) m_topPin.append( pin ); + else if( angle == 180 ) m_lefPin.append( pin ); + else if( angle == 270 ) m_botPin.append( pin ); + } + + pin->setPinAngle( angle ); + pin->setLabelPos(); + + if( type == "inverted" ) pin->setInverted( true ); + else pin->setInverted( false ); + + if( type == "unused" ) pin->setUnused( true ); + else pin->setUnused( false ); + + if( type == "null" ) + { + pin->setVisible( false ); + pin->setLabelText( "" ); + } + else pin->setVisible( true ); + + if( m_isLS ) pin->setLabelColor( QColor( 0, 0, 0 ) ); + else pin->setLabelColor( QColor( 250, 250, 200 ) ); + + pin->isMoved(); +}*/ + +bool Chip::logicSymbol() +{ + return m_isLS; +} + +void Chip::setLogicSymbol( bool ls ) +{ + if( m_isLS == ls ) return; + + if ( m_pkgeFile.endsWith("_LS.package")) m_pkgeFile.replace( "_LS.package", ".package" ); + else if( m_pkgeFile.endsWith(".package")) m_pkgeFile.replace( ".package", "_LS.package" ); + + m_error = 0; + Chip::initChip(); + + if( m_error == 0 ) Circuit::self()->update(); +} + +void Chip::remove() +{ + /*for( uint i=0; i(m_ePin[i]); + if( pin->connector() ) pin->connector()->remove(); + }*/ + Component::remove(); +} + +void Chip::contextMenuEvent( QGraphicsSceneContextMenuEvent* event ) +{ + event->accept(); + QMenu *menu = new QMenu(); + /*QAction *loadAction = menu->addAction( QIcon(":/fileopen.png"),tr("Load firmware") ); + connect( loadAction, SIGNAL(triggered()), this, SLOT(slotLoad()) ); + + QAction *reloadAction = menu->addAction( QIcon(":/fileopen.png"),tr("Reload firmware") ); + connect( reloadAction, SIGNAL(triggered()), this, SLOT(slotReload()) );*/ + + menu->addSeparator(); + + Component::contextMenu( event, menu ); + menu->deleteLater(); +} + +void Chip::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + p->drawRoundedRect( m_area, 1, 1); + + if( !m_isLS ) + { + p->setPen( QColor( 170, 170, 150 ) ); + p->drawArc( boundingRect().width()/2-6, -4, 8, 8, 0, -2880 /* -16*180 */ ); + } +} + +#include "moc_chip.cpp" + diff --git a/src/gui/circuitwidget/chip.h b/src/gui/circuitwidget/chip.h new file mode 100644 index 0000000..f694684 --- /dev/null +++ b/src/gui/circuitwidget/chip.h @@ -0,0 +1,75 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef CHIP_H +#define CHIP_H + +#include "component.h" +#include "e-element.h" + + +class MAINMODULE_EXPORT Chip : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( bool Logic_Symbol READ logicSymbol WRITE setLogicSymbol DESIGNABLE true USER true ) + + public: + Chip( QObject* parent, QString type, QString id ); + ~Chip(); + + bool logicSymbol(); + virtual void setLogicSymbol( bool ls ); + + virtual void initEpins(){;} + + virtual void paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + public slots: + virtual void remove(); + + protected: + virtual void contextMenuEvent(QGraphicsSceneContextMenuEvent* event); + + virtual void addPin( QString id, QString type, QString label, + int pos, int xpos, int ypos, int angle ); + + //virtual void updatePin( QString id, QString type, QString label, + // int pos, int xpos, int ypos, int angle ); + + virtual void initChip(); + + int m_numpins; + int m_width; + int m_height; + + bool m_isLS; + + QColor m_lsColor; + QColor m_icColor; + + QString m_pkgeFile; // file containig package defs + //QString m_dataFile; // xml file containig entry + + QList m_topPin; + QList m_botPin; + QList m_lefPin; + QList m_rigPin; +}; +#endif + diff --git a/src/gui/circuitwidget/circuit.cpp b/src/gui/circuitwidget/circuit.cpp new file mode 100644 index 0000000..e4f48b7 --- /dev/null +++ b/src/gui/circuitwidget/circuit.cpp @@ -0,0 +1,1460 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "circuit.h" +#include "itemlibrary.h" +#include "mainwindow.h" +#include "circuitwidget.h" +#include "propertieswidget.h" +#include "subpackage.h" +#include "connectorline.h" +#include "simuapi_apppath.h" +#include "node.h" +#include "utils.h" + +#include "switch.h" // Delete in later versions (0.3.10) + +static const char* Circuit_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Speed"), + QT_TRANSLATE_NOOP("App::Property","ReactStep"), + QT_TRANSLATE_NOOP("App::Property","NoLinStep"), + QT_TRANSLATE_NOOP("App::Property","NoLinAcc"), + QT_TRANSLATE_NOOP("App::Property","Draw Grid"), + QT_TRANSLATE_NOOP("App::Property","Show ScrollBars") +}; + +Circuit* Circuit::m_pSelf = 0l; + +Circuit::Circuit( qreal x, qreal y, qreal width, qreal height, QGraphicsView* parent) + : QGraphicsScene(x, y, width, height, parent) +{ + Q_UNUSED( Circuit_properties ); + + setObjectName( "Circuit" ); + setParent( parent ); + m_graphicView = parent; + m_scenerect.setRect( x, y, width, height ); + setSceneRect( QRectF(x, y, width, height) ); + + m_pSelf = this; + + m_changed = false; + m_pasting = false; + m_deleting = false; + m_con_started = false; + + new_connector = 0l; + m_seqNumber = 0; + + m_hideGrid = MainWindow::self()->settings()->value( "Circuit/hideGrid" ).toBool(); + m_showScroll = MainWindow::self()->settings()->value( "Circuit/showScroll" ).toBool(); + m_filePath = qApp->applicationDirPath()+"/new.simu"; + + connect( &m_bckpTimer, SIGNAL(timeout() ), this, SLOT( saveChanges()) ); + //m_bckpTimer.start( m_autoBck*1000 ); +} + +Circuit::~Circuit() +{ + m_bckpTimer.stop(); + + // Avoid PropertyEditor problem: comps not unregistered + QPropertyEditorWidget::self()->removeObject( this ); + + foreach( Component* comp, m_compList ) + { + QPropertyEditorWidget::self()->removeObject( comp ); + } + + // Clear Undo/Redo stacks + foreach( QDomDocument* doc, m_redoStack ) delete doc; + foreach( QDomDocument* doc, m_undoStack ) delete doc; + m_undoStack.clear(); + m_redoStack.clear(); + + if( !m_backupPath.isEmpty() ) + { + QFile::remove( m_backupPath ); // Remove backup file + } +} + +QList* Circuit::compList() { return &m_compList; } +QList* Circuit::conList() { return &m_conList; } + +int Circuit::noLinAcc() +{ + return Simulator::self()->noLinAcc(); +} + +void Circuit::setNoLinAcc( int ac ) +{ + Simulator::self()->setNoLinAcc( ac ); +} + +int Circuit::reactStep() +{ + return Simulator::self()->reaClock(); +} + +void Circuit::setReactStep( int steps ) +{ + Simulator::self()->setReaClock( steps ); +} + +int Circuit::noLinStep() +{ + return Simulator::self()->noLinClock(); +} + +void Circuit::setNoLinStep( int steps ) +{ + Simulator::self()->setNoLinClock( steps ); +} + +int Circuit::circSpeed() +{ + return Simulator::self()->simuRate(); +} +void Circuit::setCircSpeed( int rate ) +{ + Simulator::self()->simuRateChanged( rate ); +} + +void Circuit::removeItems() // Remove Selected items +{ + if( m_con_started ) return; + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + saveState(); + + foreach( Component* comp, m_compList ) + { + bool isNode = comp->objectName().contains( "Node" ); // Don't remove Graphical Nodes + if( comp->isSelected() && !isNode ) removeComp( comp ); + } + + QList itemlist = selectedItems(); + while( !itemlist.isEmpty() ) + { + QList connectors; + + foreach( QGraphicsItem* item, itemlist ) + { + ConnectorLine* line = qgraphicsitem_cast( item ); + if( line->objectName() == "" ) + { + Connector* con = line->connector(); + if( !connectors.contains( con ) ) connectors.append( con ); + } + } + foreach( Connector* con, connectors ) con->remove(); + itemlist = selectedItems(); + } + if( pauseSim ) Simulator::self()->runContinuous(); +} + +void Circuit::removeComp( Component* comp ) +{ + m_compRemoved = false; + comp->remove(); + if( !m_compRemoved ) return; + + QPropertyEditorWidget::self()->removeObject( comp ); + compList()->removeOne( comp ); + if( items().contains( comp ) ) removeItem( comp ); + //comp->deleteLater(); + delete comp; +} + +void Circuit::compRemoved( bool removed ) // Arduino doesn't like to be removed while circuit is running +{ + m_compRemoved = removed; +} + +void Circuit::remove() // Remove everything +{ + if( m_con_started ) return; + + //qDebug() << m_compList.size(); + m_deleting = true; + + foreach( Component* comp, m_compList ) + { + //qDebug() << "Circuit::remove" << comp->itemID(); + + bool isNumber = false; // Don't remove internal items + + comp->objectName().split("-").last().toInt( &isNumber ); // TODO: Find a proper way !!!!!!!!!!! + + bool isNode = comp->objectName().contains( "Node" );// Don't remove Graphical Nodes + + if( isNumber && !isNode ) removeComp( comp ); + } + m_deleting = false; +} + +bool Circuit::deleting() +{ + return m_deleting; +} + +void Circuit::saveState() +{ + if( m_con_started ) return; + + //qDebug() << "saving state"; + foreach( QDomDocument* doc, m_redoStack ) delete doc; + + m_redoStack.clear(); + + circuitToDom(); + m_undoStack.append( new QDomDocument() ); + m_undoStack.last()->setContent( m_domDoc.toString() ); + + m_changed = true; + + QString title = MainWindow::self()->windowTitle(); + if( !title.endsWith('*') ) MainWindow::self()->setWindowTitle(title+'*'); +} + +void Circuit::saveChanges() +{ + //qDebug() << "Circuit::saveChanges"; + if( !m_changed ) return; + if( m_con_started ) return; + m_changed = false; + + circuitToDom(); + + m_backupPath = m_filePath; + + QFileInfo bckDir( m_backupPath ); + + if( !bckDir.isWritable() ) + m_backupPath = SIMUAPI_AppPath::self()->RWDataFolder().absolutePath()+"/_backup.simu"; + + if( !m_backupPath.endsWith( "_backup.simu" )) + m_backupPath.replace( ".simu", "_backup.simu" ); + + //qDebug() << "saving Backup"<settings()->setValue( "backupPath", m_backupPath ); +} + +void Circuit::setChanged() +{ + m_changed = true; +} + +bool Circuit::drawGrid() +{ + return !m_hideGrid; +} +void Circuit::setDrawGrid( bool draw ) +{ + m_hideGrid = !draw; + if( m_hideGrid ) MainWindow::self()->settings()->setValue( "Circuit/hideGrid", "true" ); + else MainWindow::self()->settings()->setValue( "Circuit/hideGrid", "false" ); + update(); +} + +bool Circuit::showScroll() +{ + return m_showScroll; +} + +void Circuit::setShowScroll( bool show ) +{ + m_showScroll = show; + if( show ) + { + m_graphicView->setHorizontalScrollBarPolicy( Qt::ScrollBarAlwaysOn ); + m_graphicView->setVerticalScrollBarPolicy( Qt::ScrollBarAlwaysOn ); + MainWindow::self()->settings()->setValue( "Circuit/showScroll", "true" ); + } + else + { + m_graphicView->setHorizontalScrollBarPolicy( Qt::ScrollBarAlwaysOff ); + m_graphicView->setVerticalScrollBarPolicy( Qt::ScrollBarAlwaysOff ); + MainWindow::self()->settings()->setValue( "Circuit/showScroll", "false" ); + } +} + +bool Circuit::animate() +{ + return m_animate; +} + +void Circuit::setAnimate( bool an ) +{ + m_animate = an; + update(); +} + +double Circuit::fontScale() +{ + return MainWindow::self()->fontScale(); +} + +void Circuit::setFontScale( double scale ) +{ + MainWindow::self()->setFontScale( scale ); +} + +int Circuit::autoBck() +{ + return MainWindow::self()->autoBck(); +} + +void Circuit::setAutoBck( int secs ) +{ + //qDebug() << "Circuit::setAutoBck"<< secs; + m_bckpTimer.stop(); + if( secs < 1 ) secs = 0; + else m_bckpTimer.start( secs*1000 ); + + MainWindow::self()->setAutoBck( secs ); +} + +void Circuit::drawBackground ( QPainter* painter, const QRectF & rect ) +{ + Q_UNUSED( rect ); + /*painter->setBrush(QColor( 255, 255, 255 ) ); + painter->drawRect( m_scenerect );*/ + + painter->setBrush( QColor( 240, 240, 210 ) ); + painter->drawRect( m_scenerect ); + painter->setPen( QColor( 210, 210, 210 ) ); + + if( m_hideGrid ) return; + + int startx = int(m_scenerect.x());///2; + int endx = int(m_scenerect.width())/2; + int starty = int(m_scenerect.y());///2; + int endy = int(m_scenerect.height())/2; + + for( int i = 4; idrawLine( i, starty, i, endy ); + painter->drawLine(-i, starty,-i, endy ); + } + for( int i = 4; idrawLine( startx, i, endx, i); + painter->drawLine( startx,-i, endx,-i); + } +} + +QString Circuit::getCompId( QString name ) +{ + QStringList nameSplit = name.split("-"); + if( nameSplit.isEmpty() ) return ""; + + QString compId = nameSplit.takeFirst(); + if( nameSplit.isEmpty() ) return ""; + + QString compNum = nameSplit.takeFirst(); + + return compId+"-"+compNum; +} + +Pin* Circuit::findPin( int x, int y, QString id ) +{ + QRectF itemRect = QRectF ( x-4, y-4, 8, 8 ); + + QList list = items( itemRect ); // List of items in (x, y) + foreach( QGraphicsItem* it, list ) + { + Pin* pin = qgraphicsitem_cast( it ); + + if( pin && (pin->pinId().left(1) == id.left(1)) ) // Test if names start by same letter + { + return pin; + } + } + foreach( QGraphicsItem* it, list ) // Not found by first letter, take first Pin + { + Pin* pin = qgraphicsitem_cast( it ); + if( pin && !pin->isConnected() ) return pin; + } + return 0l; +} + +void Circuit::importCirc( QPointF eventpoint ) +{ + if( m_con_started ) return; + + m_pasting = true; + + m_deltaMove = QPointF( 160, 160 );//togrid(eventpoint); + + const QString dir = m_filePath; + QString fileName = QFileDialog::getOpenFileName( 0l, tr("Load Circuit"), dir, + tr("Circuits (*.simu);;All files (*.*)")); + + if( !fileName.isEmpty() && fileName.endsWith(".simu") ) + loadCircuit( fileName ); + + m_pasting = false; +} + +void Circuit::loadCircuit( QString &fileName ) +{ + if( m_con_started ) return; + + m_filePath = fileName; + QFile file( fileName ); + + if( !file.open(QFile::ReadOnly | QFile::Text) ) + { + QMessageBox::warning(0l, "Circuit::loadCircuit", + tr("Cannot read file %1:\n%2.").arg(fileName).arg(file.errorString())); + return; + } + //qDebug() << "Circuit::loadCircuit"<centerOn( QPointF( 1200+itemsBoundingRect().center().x(), 950+itemsBoundingRect().center().y() ) ); + + foreach( Component* comp, *(conList()) ) + { + Connector* con = static_cast( comp ); + con->startPin()->isMoved(); + con->endPin()->isMoved(); + } + if( MainWindow::self()->autoBck() ) + { + saveState(); + saveChanges(); + } +} + +void Circuit::loadDomDoc( QDomDocument* doc ) +{ + QApplication::setOverrideCursor(Qt::WaitCursor); + + //int firstSeqNumber = m_seqNumber+1; + QList compList; // Component List + QList conList; // Connector List + QList jointList; // Joint List + QHash idMap; + QHash nodMap; + m_animate = false; + + QDomElement circuit = doc->documentElement(); + //QString docType = circuit.attribute("type"); + + if( circuit.hasAttribute( "speed" )) setCircSpeed( circuit.attribute("speed").toInt() ); + if( circuit.hasAttribute( "reactStep" )) setReactStep( circuit.attribute("reactStep").toInt() ); + if( circuit.hasAttribute( "noLinStep" )) setNoLinStep( circuit.attribute("noLinStep").toInt() ); + if( circuit.hasAttribute( "noLinAcc" )) setNoLinAcc( circuit.attribute("noLinAcc").toInt() ); + if( circuit.hasAttribute( "animate" )) setAnimate( circuit.attribute("animate").toInt() ); + + QDomNode node = circuit.firstChild(); + + while( !node.isNull() ) + { + QDomElement element = node.toElement(); + const QString tagName = element.tagName(); + + if( tagName == "item" ) + { + QString objNam = element.attribute( "objectName" ); // Data in simu file + QString type = element.attribute( "itemtype" ); + QString id = objNam.split("-").first()+"-"+newSceneId(); // Create new id + + element.setAttribute( "objectName", id ); + + if( type == "Connector" ) + { + Pin* startpin = 0l; + Pin* endpin = 0l; + QString startpinid = element.attribute( "startpinid" ); + QString endpinid = element.attribute( "endpinid" ); + QString startCompName = getCompId( startpinid ); + QString endCompName = getCompId( endpinid ); + + startpinid.replace( startCompName, idMap[startCompName] ); + endpinid.replace( endCompName, idMap[endCompName] ); + + startpin = m_pinMap[startpinid]; + endpin = m_pinMap[endpinid]; + + if( !startpin ) // Pin not found by name... find it by pos + { + QStringList pointList = element.attribute( "pointList" ).split(","); + int itemX = pointList.first().toInt(); + int itemY = pointList.at(1).toInt(); + + startpin = findPin( itemX, itemY, startpinid ); + } + if( !endpin ) // Pin not found by name... find it by pos + { + QStringList pointList = element.attribute( "pointList" ).split(","); + int itemX = pointList.at(pointList.size()-2).toInt(); + int itemY = pointList.last().toInt(); + + endpin = findPin( itemX, itemY, endpinid ); + } + + if( m_pasting ) + { + if( startpin && !startpin->component()->isSelected() ) startpin = 0l; + if( endpin && !endpin->component()->isSelected() ) endpin = 0l; + } + if( startpin && startpin->isConnected() ) startpin = 0l; + if( endpin && endpin->isConnected() ) endpin = 0l; + + if( startpin && endpin ) // Create Connector + { + Connector* con = new Connector( this, type, id, startpin, endpin ); + + element.setAttribute( "startpinid", startpin->pinId() ); + element.setAttribute( "endpinid", endpin->pinId() ); + + loadProperties( element, con ); + + QString enodeId = element.attribute( "enodeid" ); + eNode* enode = nodMap[enodeId]; + if( !enode ) // Create eNode and add to enodList + { + enode = new eNode( "Circ_eNode-"+newSceneId() ); + nodMap[enodeId] = enode; + } + con->setEnode( enode ); + + QStringList plist = con->pointList(); // add lines to connector + int p1x = snapToGrid( plist.first().toInt() ); + int p1y = snapToGrid( plist.at(1).toInt() ); + int p2x = snapToGrid( plist.at(plist.size()-2).toInt() ); + int p2y = snapToGrid( plist.last().toInt() ); + + con->addConLine( con->x(),con->y(), p1x, p1y, 0 ); + + int count = plist.size(); + for (int i=2; iaddConLine( p1x, p1y, p2x, p2y, i/2 ); + p1x = p2x; + p1y = p2y; + } + con->updateConRoute( startpin, startpin->scenePos() ); + con->updateConRoute( endpin, endpin->scenePos() ); + con->remNullLines(); + conList.append( con ); + } + else // Start or End pin not found + { + if( !startpin ) qDebug() << "\n ERROR!! Circuit::loadDomDoc: null startpin in " << objNam << startpinid; + if( !endpin ) qDebug() << "\n ERROR!! Circuit::loadDomDoc: null endpin in " << objNam << endpinid; + } + } + else if( type == "Node") + { + idMap[objNam] = id; // Map simu id to new id + + Node* joint = new Node( this, type, id ); + loadProperties( element, joint ); + joint->moveTo( togrid( joint->pos() ) ); + compList.append( joint ); + jointList.append( joint ); + + if( m_pasting ) joint->setSelected( true ); + } + else if( type == "LEDSMD" ); // TODO: this type shouldnt be saved to circuit + // bcos is created inside another component, for example boards + else if( type == "Plotter") + { + loadObjectProperties( element, PlotterWidget::self() ); + } + else if( type == "SerialPort") + { + loadObjectProperties( element, SerialPortWidget::self() ); + } + else + { + idMap[objNam] = id; // Map simu id to new id + + Component* item = 0l; + + if( (type == "InBus")||( type == "OutBus") ) type = "Bus"; + else if( type == "Ram8bit" ) type = "Memory"; + + if( type == "ToggleSwitch" ) item = createItem( "Switch", id ); + else item = createItem( type, id ); + + if( item ) + { + loadProperties( element, item ); + item->moveTo( togrid( item->pos() ) ); + compList.append( item ); + if( m_pasting ) item->setSelected( true ); + } + else + { + qDebug() << " ERROR Creating Component: "<< type << id; + QApplication::restoreOverrideCursor(); + m_error = 1; + return; + } + if( type == "ToggleSwitch" ) + { + Switch* sw = static_cast( item ); + sw->setDt( true ); + } + } + } + node = node.nextSibling(); + } + if( m_pasting ) + { + foreach( Component *item, compList ) + { + item->move( m_deltaMove ); + } + foreach( Component* item, conList ) + { + Connector* con = static_cast( item ); + con->setSelected( true ); + con->move( m_deltaMove ); + } + } + // Take care about unconnected Joints + foreach( Node* joint, jointList ) joint->remove(); // Only removed if some missing connector + + QApplication::restoreOverrideCursor(); +} + +bool Circuit::saveCircuit( QString &fileName ) +{ + if( m_con_started ) return false; + + QApplication::setOverrideCursor(Qt::WaitCursor); + + if( !fileName.endsWith(".simu") ) fileName.append(".simu"); + + circuitToDom(); + + bool saved = saveDom( fileName, &m_domDoc ); + + if( saved && !m_backupPath.isEmpty() ) + { + QFile::remove( m_backupPath ); // remove backup file + m_backupPath = ""; + m_filePath = fileName; + } + QApplication::restoreOverrideCursor(); + return saved; +} + +bool Circuit::saveDom( QString &fileName, QDomDocument* doc ) +{ + QFile file( fileName ); + + if( !file.open(QFile::WriteOnly | QFile::Text) ) + { + QApplication::restoreOverrideCursor(); + QMessageBox::warning(0l, "Circuit::saveCircuit", + tr("Cannot write file %1:\n%2.").arg(fileName).arg(file.errorString())); + return false; + } + QTextStream out(&file); + out.setCodec("UTF-8"); + out << doc->toString(); + file.close(); + + return true; +} + +void Circuit::bom() +{ + if( m_con_started ) return; + + QString fileName = m_filePath; + fileName.replace( fileName.lastIndexOf( ".simu" ), 5, "-bom.txt" ); + + fileName = QFileDialog::getSaveFileName( MainWindow::self() + , tr( "Bill Of Materials" ) + , fileName + , "(*.*)" ); + + if( fileName.isEmpty() ) return; + + QStringList bom; + + foreach( Component* comp, m_compList ) + { + bool isNumber = false; + comp->objectName().split("-").last().toInt( &isNumber ); + + if( isNumber ) bom.append( comp->print() ); + } + + QFile file( fileName ); + + if( !file.open(QFile::WriteOnly | QFile::Text) ) + { + QMessageBox::warning(0l, "Circuit::bom", + tr("Cannot write file %1:\n%2.").arg(fileName).arg(file.errorString())); + } + bom.sort(); + + QTextStream out(&file); + out.setCodec("UTF-8"); + out << "\nCircuit: "; + out << QFileInfo( m_filePath ).fileName(); + out << "\n\n"; + out << "Bill of Materials:\n\n"; + foreach( QString line, bom ) out << line; + + file.close(); +} + +void Circuit::circuitToDom() +{ + m_domDoc.clear(); + QDomElement circuit = m_domDoc.createElement("circuit"); + + circuit.setAttribute( "type", "simulide_0.1" ); + circuit.setAttribute( "speed", QString::number( circSpeed() ) ); + circuit.setAttribute( "reactStep", QString::number( reactStep() ) ); + circuit.setAttribute( "noLinStep", QString::number( noLinStep() ) ); + circuit.setAttribute( "noLinAcc", QString::number( noLinAcc() ) ); + circuit.setAttribute( "animate", QString::number( animate() ) ); + //circuit.setAttribute( "drawGrid", QString( drawGrid()?"true":"false")); + //circuit.setAttribute( "showScroll", QString( showScroll()?"true":"false")); + + m_domDoc.appendChild(circuit); + + listToDom( &m_domDoc, &m_compList ); + + foreach( Component* comp, m_conList ) + { + Connector* con = static_cast( comp ); + con->remNullLines(); + } + listToDom( &m_domDoc, &m_conList ); + + objectToDom( &m_domDoc, PlotterWidget::self() ); + objectToDom( &m_domDoc, SerialPortWidget::self() ); + + circuit.appendChild( m_domDoc.createTextNode( "\n \n" ) ); +} + +void Circuit::listToDom( QDomDocument* doc, QList* complist ) +{ + int count = complist->count(); + for( int i=0; iat(i); + + // Don't save internal items + bool isNumber = false; + item->objectName().split("-").last().toInt( &isNumber ); + + if( isNumber ) objectToDom( doc, item ); + } +} + +void Circuit::objectToDom( QDomDocument* doc, QObject* object ) +{ + QDomElement root = doc->firstChild().toElement(); + QDomElement elm = m_domDoc.createElement("item"); + const QMetaObject* metaobject = object->metaObject(); + + int count = metaobject->propertyCount(); + for( int i=0; iproperty(i); + const char* name = metaproperty.name(); + + QVariant value = object->property( name ); + if( metaproperty.type() == QVariant::StringList ) + { + QStringList list= value.toStringList(); + elm.setAttribute( name, list.join(",") ); + } + else if( (QString(name)=="Mem") || (QString(name)=="eeprom") ) + { + QVector vmem = value.value>(); + + QStringList list; + foreach( int val, vmem ) list << QString::number( val ); + + elm.setAttribute( name, list.join(",") ); + + //qDebug() << "typename" << value.typeName(); + //qDebug() << "Value:\n" << vmem; + //qDebug() << "Data:\n" << list; + //qDebug() << "type" << value.type()<< "typename" << value.typeName()<< "name " << name + // << " value " << value << "saved" << value.toString(); + } + else + { + elm.setAttribute( name, value.toString() ); + /*if( QString(name)=="Mem" ) + qDebug() << "type" << value.type()<< "typename" << value.typeName()<< "name " << name + << " value " << value << "saved" << value.toString();*/ + } + + } + QDomText blank = m_domDoc.createTextNode( "\n \n" ); + QDomText objNme = m_domDoc.createTextNode( object->objectName() ); + root.appendChild( blank ); + root.appendChild( objNme ); + blank = m_domDoc.createTextNode( ": \n" ); + root.appendChild( blank ); + root.appendChild( elm ); +} + +void Circuit::undo() +{ + if( m_con_started ) return; + + if( m_undoStack.isEmpty() ) return; + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->stopSim(); + + circuitToDom(); + m_redoStack.prepend( new QDomDocument() ); + m_redoStack.first()->setContent( m_domDoc.toString() ); + + remove(); + QDomDocument* doc = m_undoStack.takeLast(); + m_domDoc.setContent( doc->toString()); + + m_seqNumber = 0; + loadDomDoc( &m_domDoc ); + + if( pauseSim ) Simulator::self()->runContinuous(); +} + +void Circuit::redo() +{ + if( m_con_started ) return; + + if( m_redoStack.isEmpty() ) return; + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->stopSim(); + + circuitToDom(); + m_undoStack.append( new QDomDocument() ); + m_undoStack.last()->setContent( m_domDoc.toString() ); + + remove(); + QDomDocument* doc = m_redoStack.takeFirst(); + m_domDoc.setContent( doc->toString()); + + m_seqNumber = 0; + loadDomDoc( &m_domDoc ); + + if( pauseSim ) Simulator::self()->runContinuous(); +} + +void Circuit::updatePin(ePin* epin, std::string newId ) +{ + QString pinId = QString::fromStdString( newId ); + Pin* pin = static_cast( epin ); + + addPin( pin, pinId ); +} + +void Circuit::addPin( Pin* pin, QString pinId ) +{ + m_pinMap[ pinId ] = pin; +} + +void Circuit::removePin( QString pinId ) +{ + m_pinMap.remove( pinId ); +} + +Component* Circuit::createItem( QString type, QString id ) +{ + //qDebug() << "Circuit::createItem" << type << id; + foreach( LibraryItem* libItem, ItemLibrary::self()->items() ) + { + if( libItem->type()==type ) + { + Component* comp = libItem->createItemFnPtr()( this, type, id ); + + if( comp ) + { + QString category = libItem->category(); + if( ( category != "Meters" ) + && ( category != "Sources" ) + && ( category != "Other" ) ) + comp->setPrintable( true ); + } + return comp; + } + } + return 0l; +} + +void Circuit::loadProperties( QDomElement element, Component* Item ) +{ + loadObjectProperties( element, Item ); + + Item->setLabelPos(); + Item->setValLabelPos(); + + addItem(Item); + + int number = Item->objectName().split("-").last().toInt(); + + if ( number > m_seqNumber ) m_seqNumber = number; // Adjust item counter: m_seqNumber +} + +void Circuit::loadObjectProperties( QDomElement element, QObject* Item ) +{ + const QMetaObject* metaobject = Item->metaObject(); + int count = metaobject->propertyCount(); + + for( int i=0; iproperty(i); + const char* chName = metaproperty.name(); + QString n = chName; + + if( !element.hasAttribute( chName ) ) // Take care of new capitalization in some properties + { + n.replace(0, 1, n[0].toLower()); + if( !element.hasAttribute( n.toUtf8() ) ) continue; + } + QVariant value( element.attribute( n.toUtf8() ) ); + + if ( metaproperty.type() == QVariant::Int ) Item->setProperty( chName, value.toInt() ); + else if( metaproperty.type() == QVariant::Double ) Item->setProperty( chName, value.toDouble() ); + else if( metaproperty.type() == QVariant::PointF ) Item->setProperty( chName, value.toPointF() ); + else if( metaproperty.type() == QVariant::Bool ) Item->setProperty( chName, value.toBool() ); + else if( metaproperty.type() == QVariant::StringList ) + { + QStringList list= value.toString().split(","); + Item->setProperty( chName, list ); + } + else if( (n=="Mem") || (n=="eeprom") ) + { + QStringList list = value.toString().split(","); + + QVector vmem; + int lsize = list.size(); + vmem.resize( lsize ); + //qDebug() << "Circuit::loadObjectProperties eeprom size:" << lsize; + + for( int x=0; xsetProperty( chName, value ); + } + else Item->setProperty( chName, value ); + //else qDebug() << " ERROR!!! Circuit::loadObjectProperties\n unknown type: "<<"name "< complist; + + QList itemlist = selectedItems(); + + foreach( QGraphicsItem* item , itemlist ) + { + Component* comp = qgraphicsitem_cast( item ); + if( comp ) + { + if( comp->itemType() == "Connector" ) + { + Connector* con = static_cast( comp ); + con->remNullLines(); + + complist.append( con ); + } + else + { + complist.prepend( comp ); + } + } + } + m_copyDoc.clear(); + QDomElement root = m_copyDoc.createElement("circuit"); + root.setAttribute( "type", "simulide_0.1" ); + m_copyDoc.appendChild(root); + + listToDom( &m_copyDoc, &complist ); + + QString px = QString::number( m_eventpoint.x() ); + QString py = QString::number( m_eventpoint.y() ); + QString clipTextText = px+","+py+"eventpoint"+m_copyDoc.toString(); + QClipboard *clipboard = QApplication::clipboard(); + clipboard->setText( clipTextText ); +} + +void Circuit::paste( QPointF eventpoint ) +{ + if( m_con_started ) return; + + QClipboard *clipboard = QApplication::clipboard(); + QString clipText = clipboard->text(); + if( !clipText.contains( "eventpoint") ) return; + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->stopSim(); + + bool animate = m_animate; + saveState(); + m_pasting = true; + foreach( QGraphicsItem*item, selectedItems() ) item->setSelected( false ); + + QStringList clipData = clipText.split( "eventpoint" ); + clipText = clipData.last(); + m_copyDoc.setContent( clipText ); + + clipData = clipData.first().split(","); + int px = clipData.first().toInt(); + int py = clipData.last().toInt(); + m_eventpoint = QPointF( px, py ); + + m_deltaMove = togrid(eventpoint) - m_eventpoint; + + loadDomDoc( &m_copyDoc ); + + m_pasting = false; + setAnimate( animate ); + + if( pauseSim ) Simulator::self()->runContinuous(); +} + +bool Circuit::pasting() { return m_pasting; } +QPointF Circuit::deltaMove(){ return m_deltaMove; } + +void Circuit::createSubcircuit() +{ + if( m_con_started ) return; + + QString fileName = m_filePath; + fileName.replace( m_filePath.lastIndexOf( ".simu" ), 5, "" ); + fileName = QFileDialog::getSaveFileName( MainWindow::self() + , tr( "Create Subcircuit" ) + , fileName + , "All files (*)" ); + + QFileInfo fi( fileName ); + QString ext = fi.suffix(); + QString filePath = fileName; + if( !ext.isEmpty() ) filePath.remove( fileName.lastIndexOf( ext )-1, ext.size()+1 ); + //qDebug() <<"Circuit::createSubcircuit filePath"<< filePath; + + QHash compList; // Get Components properties + + //qDebug() << compIdTip<<"--------------------------"; + foreach( Component* component, m_compList ) + { + if( component->itemType() == "Package" ) + { + SubPackage* pkg = (static_cast(component)); + + QString ext = ".package"; + if( pkg->logicSymbol() ) ext = "_LS.package"; + + pkg->savePackage( filePath+ext ); + } + + QString compId = component->objectName(); + QString propString = ""; + + const QMetaObject* metaObject = component->metaObject(); + + int count = metaObject->propertyCount(); + for( int i=0; iproperty(i); + if( property.isUser() ) + { + QString name = property.name(); + + if( !name.contains( "Show" ) + && !name.contains( "Unit" ) + && !name.contains( "itemtype" ) ) + { + QString valString = ""; + + if(( name == "Resistance" ) + | ( name == "Capacitance" ) + | ( name == "Inductance" ) + | ( name == "Voltage" ) + | ( name == "Current" )) + { + valString = QString::number( component->getmultValue() ); + } + else + { + const char* charname = property.name(); + + QVariant value = component->property( charname ); + valString = value.toString(); + } + if( name == "Functions" ) valString = valString.replace("&", "&"); + if( name == "id") ;//compId = valString; + else + { + name[0] = name[0].toLower(); + name = name.replace( "_", "" ); + propString += " "+name+" = \""+valString+"\"\n"; + } + } + } + } + compList[compId] = propString; + } + QList eNodeList = simulator.geteNodes(); + QList connectionList; + + int nodes = 0; + foreach( eNode* node, eNodeList ) // Get all the connections in each eNode + { + //qDebug() << "\nCircuit::createSubcircuit New Node "; + if( ! node ) continue; + + QStringList pinConList; + QList pinList = node->getEpins(); + + foreach( ePin* epin, pinList ) + { + Pin* pin = (static_cast(epin)); + Component* component = pin->component(); + QString compId = component->itemID(); + QString compType = component->itemType(); + QString pinId = pin->pinId().split( "-" ).last().replace( " ", "" ); + + if( compType == "Package" ) + { + if( pin->inverted() && !pinId.startsWith( "!" ) ) pinId = "!"+pinId; + + pinConList.prepend( "Package_"+pinId ); + } + else if( ( compType == "Probe" ) + ||( compType == "Fixed Voltage" ) ) + { + // Take care about "packagepin" bad spelling + //compId = compId.replace( test.indexOf("packagepin"), 10, "packagePin"); + pinConList.prepend( "Package_"+component->idLabel().replace("-","") ); + } + else if( compId.contains( "Node") ) ; + else + { + pinConList.append( compId ); + pinConList.append( compType ); + pinConList.append( pinId ); + } + } + QString conType = "Node"; + if( pinConList.length() == 4 ) conType = "Connection"; + + if( conType == "Connection" ) // PackagePin to pin + { + QString pin1 = pinConList.takeLast(); // Component pin + QString pin2 = pinConList.takeFirst(); // Package Pin + QString compty = pinConList.takeFirst(); // Component type + QString compId = pinConList.takeFirst(); // Component Id + + pinConList << compty << compId << pin1+"-"+pin2; + connectionList.append( pinConList ); + //qDebug() << "Circuit::createSubcircuit PackagePin to pin\n" << pinConList; + } + else // Multiple connection + { + QString pin2 = "eNode"+QString::number(nodes); + bool isNode = true; + + int packPins = 0; + for( QString entry : pinConList ) + { + if( entry.contains("Package") ) // No Node, connection to packagePin + { + pin2 = entry; + pinConList.removeOne( entry ); + isNode = false; + packPins++; + //break; + } + } + if( packPins > 1 ) // 2 Package Pins connected together + { + MessageBoxNB( "Circuit::createSubcircuit", " \nERROR:\n"+ + tr( "2 Package Pins connected together" ) ); + return; + } + while( !pinConList.isEmpty() ) // Create connection entries + { + QStringList pinConList2; + QString compId = pinConList.takeFirst(); + QString compty = pinConList.takeFirst(); + QString pin1 = pinConList.takeFirst(); + + pinConList2 << compId << compty << pin1+"-"+pin2; + connectionList.append( pinConList2 ); + //qDebug() << "Circuit::createSubcircuit Multiple connection\n" << pinConList2; + } + if( isNode ) nodes++; + } + } + QString subcircuit = "\n"; + subcircuit += "\n\n"; + subcircuit += "\n\n"; + + while( !connectionList.isEmpty() ) + { + QStringList list = connectionList.takeFirst(); + if( list.isEmpty() ) continue; + + QString compId = list.takeFirst(); + QString compty = "e"+list.takeFirst().replace( " ", ""); + QString conect = list.takeFirst(); + + subcircuit += " \n \n\n"; + } + subcircuit +=""; + + QFile file( filePath+".subcircuit" ); + + if( !file.open(QFile::WriteOnly | QFile::Text) ) + { + QMessageBox::warning(0l, "Circuit::createSubcircuit", + tr("Cannot write file %1:\n%2.").arg(fileName).arg(file.errorString())); + } + QTextStream out( &file ); + out.setCodec("UTF-8"); + out << subcircuit; + file.close(); + //qDebug() <<"Circuit::createSubcircuit\n" << subcircuit; +} + +QString Circuit::newSceneId() +{ + return QString("%1").arg(++m_seqNumber) ; +} + +void Circuit::newconnector( Pin* startpin ) +{ + saveState(); + + //if ( m_subcirmode ) return; + m_con_started = true; + + QString type = QString("Connector"); + QString id = type; + id.append( "-" ); + id.append( newSceneId() ); + + new_connector = new Connector( this, type, id, startpin ); + + QPoint p1 = startpin->scenePos().toPoint(); + QPoint p2 = startpin->scenePos().toPoint(); + + new_connector->addConLine( p1.x(), p1.y(), p2.x(), p2.y(), 0 ); + + addItem(new_connector); +} + +void Circuit::closeconnector( Pin* endpin ) +{ + m_con_started = false; + new_connector->closeCon( endpin, /*connect=*/true ); +} + +void Circuit::updateConnectors() +{ + foreach( Component* comp, m_conList ) + { + Connector* con = static_cast( comp ); + con->updateLines(); + } +} + +void Circuit::constarted( bool started ) { m_con_started = started; } +bool Circuit::is_constarted() { return m_con_started ; } + +void Circuit::mousePressEvent( QGraphicsSceneMouseEvent* event ) +{ + if( event->button() == Qt::LeftButton ) + { + QPropertyEditorWidget::self()->setObject( this ); + PropertiesWidget::self()->setHelpText( MainWindow::self()->circHelp() ); + + if( m_con_started ) event->accept();//new_connector->incActLine() ; + QGraphicsScene::mousePressEvent( event ); + } + else if( event->button() == Qt::RightButton ) + { + if( m_con_started ) event->accept(); + else QGraphicsScene::mousePressEvent( event ); + } +} + +void Circuit::mouseReleaseEvent( QGraphicsSceneMouseEvent* event ) +{ + if( event->button() == Qt::LeftButton ) + { + if( m_con_started ) new_connector->incActLine() ; + QGraphicsScene::mouseReleaseEvent( event ); + } + else if( event->button() == Qt::RightButton ) + { + if( m_con_started ) + { + event->accept(); + new_connector->remove(); + m_con_started = false; + } + else QGraphicsScene::mouseReleaseEvent( event ); + } +} + +void Circuit::mouseMoveEvent( QGraphicsSceneMouseEvent* event ) +{ + if( m_con_started ) + { + event->accept(); + + if(event->modifiers() & Qt::ShiftModifier) + { + new_connector->m_freeLine = true; + } + new_connector->updateConRoute( 0l, event->scenePos() ); + } + QGraphicsScene::mouseMoveEvent(event); +} + +void Circuit::keyPressEvent( QKeyEvent* event ) +{ + if( m_con_started ) return; + + int key = event->key(); + + if( event->modifiers() & Qt::ControlModifier ) + { + if( key == Qt::Key_C ) + { + QPoint p = CircuitWidget::self()->mapFromGlobal(QCursor::pos()); + copy( m_graphicView->mapToScene( p ) ); + clearSelection(); + } + else if( key == Qt::Key_V ) + { + QPoint p = CircuitWidget::self()->mapFromGlobal(QCursor::pos()); + paste( m_graphicView->mapToScene( p ) ); + } + else if( key == Qt::Key_S ) + { + if( event->modifiers() & Qt::ShiftModifier) CircuitWidget::self()->saveCircAs(); + else CircuitWidget::self()->saveCirc(); + } + else if( key == Qt::Key_Z ) { undo(); } + else if( key == Qt::Key_Y ) { redo(); } + else if( key == Qt::Key_N ) { CircuitWidget::self()->newCircuit(); } + else if( key == Qt::Key_O ) { CircuitWidget::self()->openCirc(); } + else if( key == Qt::Key_Plus ) { CircuitView::self()->zoom( 120 ); } + else if( key == Qt::Key_Minus ) { CircuitView::self()->zoom( -120 ); } + else QGraphicsScene::keyPressEvent( event ); + } + else if( key == Qt::Key_Delete ) removeItems(); + else QGraphicsScene::keyPressEvent(event); +} + +void Circuit::contextMenuEvent( QGraphicsSceneContextMenuEvent* event ) +{ + QGraphicsScene::contextMenuEvent( event ); + + /*if( !event->isAccepted() ) + { + QMenu menu; + + QAction* openCircAct = menu.addAction(QIcon(":/opencirc.png"), tr("Open Circuit") ); + connect(openCircAct, SIGNAL(triggered()), MainWindow::self(), SLOT(openCirc())); + + QAction* newCircAct = menu.addAction( QIcon(":/newcirc.png"), tr("New Circuit") ); + connect( newCircAct, SIGNAL(triggered()), MainWindow::self(), SLOT(newCircuit())); + + QAction* saveCircAct = menu.addAction(QIcon(":/savecirc.png"), tr("Save Circuit") ); + connect(saveCircAct, SIGNAL(triggered()), MainWindow::self(), SLOT(saveCirc())); + + QAction* saveCircAsAct = menu.addAction(QIcon(":/savecircas.png"),tr("Save Circuit As...") ); + connect(saveCircAsAct, SIGNAL(triggered()), MainWindow::self(), SLOT(saveCircAs())); + + menu.exec( event->screenPos() ); + }*/ +} + +#include "moc_circuit.cpp" + + diff --git a/src/gui/circuitwidget/circuit.h b/src/gui/circuitwidget/circuit.h new file mode 100644 index 0000000..1a362bc --- /dev/null +++ b/src/gui/circuitwidget/circuit.h @@ -0,0 +1,186 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef CIRCUIT_H +#define CIRCUIT_H + +#include + +#include "simulator.h" +#include "component.h" +#include "connector.h" +#include "pin.h" + + +class MAINMODULE_EXPORT Circuit : public QGraphicsScene +{ + Q_OBJECT + + Q_PROPERTY( int Speed READ circSpeed WRITE setCircSpeed DESIGNABLE true USER true ) + Q_PROPERTY( int ReactStep READ reactStep WRITE setReactStep DESIGNABLE true USER true ) + Q_PROPERTY( int NoLinStep READ noLinStep WRITE setNoLinStep DESIGNABLE true USER true ) + Q_PROPERTY( int NoLinAcc READ noLinAcc WRITE setNoLinAcc DESIGNABLE true USER true ) + + Q_PROPERTY( bool Draw_Grid READ drawGrid WRITE setDrawGrid DESIGNABLE true USER true ) + Q_PROPERTY( bool Show_ScrollBars READ showScroll WRITE setShowScroll DESIGNABLE true USER true ) + Q_PROPERTY( bool Animate READ animate WRITE setAnimate DESIGNABLE true USER true ) + Q_PROPERTY( double Font_Scale READ fontScale WRITE setFontScale DESIGNABLE true USER true ) + Q_PROPERTY( int Auto_Backup_Secs READ autoBck WRITE setAutoBck DESIGNABLE true USER true ) + + public: + Circuit( qreal x, qreal y, qreal width, qreal height, QGraphicsView* parent ); + ~Circuit(); + + static Circuit* self() { return m_pSelf; } + + int reactStep(); + void setReactStep( int steps ); + + int noLinStep(); + void setNoLinStep( int steps ); + + int circSpeed(); + void setCircSpeed( int rate ); + + int noLinAcc(); + void setNoLinAcc( int ac ); + + bool drawGrid(); + void setDrawGrid( bool draw ); + + bool showScroll(); + void setShowScroll( bool show ); + + bool animate(); + void setAnimate( bool an ); + + double fontScale(); + void setFontScale( double scale ); + + int autoBck(); + void setAutoBck( int secs ); + + void removeItems(); + void removeComp( Component* comp ); + void remove(); + bool deleting(); + void compRemoved( bool removed ); + void saveState(); + void setChanged(); + + void drawBackground( QPainter* painter, const QRectF &rect ); + + Pin* findPin( int x, int y, QString id ); + + void loadCircuit( QString &fileName ); + bool saveCircuit( QString &fileName ); + + Component* createItem( QString name, QString id ); + + QString newSceneId(); + + void newconnector( Pin* startpin ); + void closeconnector( Pin* endpin ); + void updateConnectors(); + Connector* getNewConnector() { return new_connector; } + + QList* compList(); + QList* conList(); + + void constarted( bool started); + bool is_constarted(); + + bool pasting(); + QPointF deltaMove(); + + void addPin( Pin* pin, QString pinId ); + void updatePin( ePin* epin, std::string newId ); + void removePin( QString pinId ); + + const QString getFileName() const { return m_filePath; } + + public slots: + void createSubcircuit(); + void copy( QPointF eventpoint ); + void paste( QPointF eventpoint ); + void undo(); + void redo(); + void importCirc( QPointF eventpoint ); + void bom(); + void saveChanges(); + + protected: + void mousePressEvent( QGraphicsSceneMouseEvent* event ); + void mouseReleaseEvent( QGraphicsSceneMouseEvent* event ); + void mouseMoveEvent( QGraphicsSceneMouseEvent* event ); + void contextMenuEvent( QGraphicsSceneContextMenuEvent* event ); + void keyPressEvent ( QKeyEvent * event ); + + private: + void loadDomDoc( QDomDocument* doc ); + void loadProperties( QDomElement element, Component* Item ); + void loadObjectProperties( QDomElement element, QObject* Item ); + void circuitToDom(); + void listToDom( QDomDocument* doc, QList* complist ); + void objectToDom( QDomDocument* doc, QObject* object ); + bool saveDom( QString &fileName, QDomDocument* doc ); + + QString getCompId( QString name ); + + static Circuit* m_pSelf; + + QDomDocument m_domDoc; + QDomDocument m_copyDoc; + + QString m_filePath; + QString m_backupPath; + + QRect m_scenerect; + QGraphicsView* m_graphicView; + Connector* new_connector; + + int m_seqNumber; + int m_error; + + bool m_con_started; + bool m_pasting; + bool m_hideGrid; + bool m_showScroll; + bool m_compRemoved; + bool m_animate; + bool m_changed; + bool m_deleting; + + QPointF m_eventpoint; + QPointF m_deltaMove; + + QList m_compList; // Component list + QList m_conList; // Connector list + + QHash m_pinMap; // Pin list + + QList m_undoStack; + QList m_redoStack; + + Simulator simulator; + + QTimer m_bckpTimer; +}; + +#endif diff --git a/src/gui/circuitwidget/circuitview.cpp b/src/gui/circuitwidget/circuitview.cpp new file mode 100644 index 0000000..29f1243 --- /dev/null +++ b/src/gui/circuitwidget/circuitview.cpp @@ -0,0 +1,325 @@ +/*************************************************************************** + * Copyright (C) 2010 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include + +#include "circuitwidget.h" +#include "circuitview.h" +#include "circuit.h" +#include "mainwindow.h" +#include "component.h" +#include "mcucomponent.h" +#include "utils.h" + +CircuitView* CircuitView::m_pSelf = 0l; + +CircuitView::CircuitView( QWidget *parent ) + : QGraphicsView( parent ) +{ + m_pSelf = this; + + m_circuit = 0l; + m_enterItem = 0l; + + clear(); + + viewport()->setFixedSize( 3200, 2400 ); + bool scrollBars = MainWindow::self()->settings()->value( "Circuit/showScroll" ).toBool(); + if( scrollBars ) + { + setHorizontalScrollBarPolicy( Qt::ScrollBarAlwaysOn ); + setVerticalScrollBarPolicy( Qt::ScrollBarAlwaysOn ); + } + else + { + setHorizontalScrollBarPolicy( Qt::ScrollBarAlwaysOff ); + setVerticalScrollBarPolicy( Qt::ScrollBarAlwaysOff ); + } + //setViewportUpdateMode( QGraphicsView::FullViewportUpdate ); + //setCacheMode( CacheBackground ); + //setRenderHint( QPainter::Antialiasing ); + setRenderHints( QPainter::HighQualityAntialiasing | QPainter::TextAntialiasing | QPainter::SmoothPixmapTransform); + //setRenderHint( QPainter::SmoothPixmapTransform ); + setTransformationAnchor( AnchorUnderMouse ); + setResizeAnchor( AnchorUnderMouse ); + setDragMode( QGraphicsView::RubberBandDrag ); + + setAcceptDrops(true); + + m_info = new QPlainTextEdit( this ); + m_info->setLineWrapMode( QPlainTextEdit::NoWrap ); + m_info->setMinimumSize( 500, 30 ); + m_info->setPlainText( "Time: 00:00:00.000000" ); + m_info->setWindowFlags( Qt::FramelessWindowHint ); + m_info->setAttribute( Qt::WA_NoSystemBackground ); + m_info->setAttribute( Qt::WA_TranslucentBackground ); + m_info->setAttribute( Qt::WA_TransparentForMouseEvents ); + m_info->setStyleSheet( "color: #884433;background-color: rgba(0,0,0,0)" ); + m_info->setVerticalScrollBarPolicy( Qt::ScrollBarAlwaysOff ); + + double fontScale = MainWindow::self()->fontScale(); + QFont font = m_info->font(); + font.setBold( true ); + font.setPixelSize( int(10*fontScale) ); + m_info->setFont( font ); + + m_info->setMaximumSize( 320*fontScale, 20*fontScale ); + m_info->setMinimumSize( 400, 25 ); + m_info->show(); +} +CircuitView::~CircuitView() { } + +void CircuitView::setCircTime( uint64_t step) +{ + int hours = step/3600e6; + step -= hours*3600e6; + int mins = step/60e6; + step -= mins*60e6; + int secs = step/1e6; + int mSecs = step - secs*1e6; + + QString strH = QString::number( hours ); + if( strH.length() < 2 ) strH = "0"+strH; + QString strM = QString::number( mins ); + if( strM.length() < 2 ) strM = "0"+strM; + QString strS = QString::number( secs ); + if( strS.length() < 2 ) strS = "0"+strS; + QString strMS = QString::number( mSecs ); + while( strMS.length() < 6 ) strMS = "0"+strMS; + + QString strMcu = ""; + + if( McuComponent::self() ) + { + QString device = McuComponent::self()->device(); + QString freq = QString::number( McuComponent::self()->freq() ); + strMcu = " Mcu: "+device+" at "+freq+" MHz"; + } + m_info->setPlainText( tr("Time: ")+strH+":"+strM+":"+strS+"."+strMS + strMcu ); +} + +void CircuitView::clear() +{ + if( m_circuit ) + { + m_circuit->remove(); + m_circuit->deleteLater(); + } + resetMatrix(); + + m_circuit = new Circuit( -1600, -1200, 3200, 2400, this ); + setScene( m_circuit ); + centerOn( 900, 600 ); + //setCircTime( 0 ); +} + +void CircuitView::wheelEvent( QWheelEvent *event ) +{ + zoom( event->delta() ); +} + + +void CircuitView::zoom( double val ) +{ + qreal scaleFactor = pow( 2.0, val / 700.0); + scale( scaleFactor, scaleFactor ); +} + +void CircuitView::dragEnterEvent(QDragEnterEvent *event) +{ + Circuit::self()->saveState(); + + event->accept(); + //bool pauseSim = Simulator::self()->isRunning(); + //if( pauseSim ) Simulator::self()->pauseSim(); + + QString type = event->mimeData()->html(); + QString id = event->mimeData()->text(); + + if( type.isEmpty() || id.isEmpty() ) return; + + id += "-"+m_circuit->newSceneId(); + + m_enterItem = m_circuit->createItem( type, id ); + if( m_enterItem ) + { + //qDebug()<<"CircuitView::dragEnterEvent"<itemID()<< type<< id; + m_enterItem->setPos( mapToScene( event->pos() ) ); + m_circuit->addItem( m_enterItem ); + } + //if( pauseSim ) Simulator::self()->resumeSim(); +} + +void CircuitView::dragMoveEvent(QDragMoveEvent *event) +{ + event->accept(); + if( m_enterItem ) m_enterItem->moveTo( togrid( mapToScene( event->pos() ) ) ); +} + +void CircuitView::dragLeaveEvent(QDragLeaveEvent *event) +{ + event->accept(); + if ( m_enterItem ) + { + m_circuit->removeComp( m_enterItem ); + m_enterItem = 0l; + } +} + +void CircuitView::resizeEvent( QResizeEvent *event ) +{ + int width = event->size().width(); + int height = event->size().height(); + + m_circuit->setSceneRect(-width/2+2, -height/2+2, width-4, height-4); + + QGraphicsView::resizeEvent(event); +} + +void CircuitView::mousePressEvent( QMouseEvent* event ) +{ + if( event->button() == Qt::MidButton ) + { + event->accept(); + setDragMode( QGraphicsView::ScrollHandDrag ); + + QMouseEvent eve( QEvent::MouseButtonPress, event->pos(), + Qt::LeftButton, Qt::LeftButton, Qt::NoModifier ); + + QGraphicsView::mousePressEvent( &eve ); + } + else + { + QGraphicsView::mousePressEvent( event ); + //viewport()->setCursor( Qt::ArrowCursor ); + } +} + +void CircuitView::mouseReleaseEvent( QMouseEvent* event ) +{ + if( event->button() == Qt::MidButton ) + { + event->accept(); + QMouseEvent eve( QEvent::MouseButtonRelease, event->pos(), + Qt::LeftButton, Qt::LeftButton, Qt::NoModifier ); + + QGraphicsView::mouseReleaseEvent( &eve ); + } + else + { + QGraphicsView::mouseReleaseEvent( event ); + //viewport()->setCursor( Qt::ArrowCursor ); + } + viewport()->setCursor( Qt::ArrowCursor ); + setDragMode( QGraphicsView::RubberBandDrag ); +} + +void CircuitView::contextMenuEvent(QContextMenuEvent* event) +{ + QGraphicsView::contextMenuEvent( event ); + + if( !event->isAccepted() && !m_circuit->is_constarted() ) + { + QPointF eventPos = mapToScene( event->globalPos() ) ; + m_eventpoint = mapToScene( event->pos() ); + + QMenu menu; + + QAction* pasteAction = menu.addAction(QIcon(":/paste.png"),tr("Paste")+"\tCtrl+V"); + connect( pasteAction, SIGNAL( triggered()), this, SLOT(slotPaste()) ); + + QAction* undoAction = menu.addAction(QIcon(":/undo.png"),tr("Undo")+"\tCtrl+Z"); + connect( undoAction, SIGNAL( triggered()), Circuit::self(), SLOT(undo()) ); + + QAction* redoAction = menu.addAction(QIcon(":/redo.png"),tr("Redo")+"\tCtrl+Y"); + connect( redoAction, SIGNAL( triggered()), Circuit::self(), SLOT(redo()) ); + menu.addSeparator(); + + /*QAction* openCircAct = menu.addAction(QIcon(":/opencirc.png"), tr("Open Circuit")+"\tCtrl+O" ); + connect(openCircAct, SIGNAL(triggered()), CircuitWidget::self(), SLOT(openCirc())); + + QAction* newCircAct = menu.addAction( QIcon(":/newcirc.png"), tr("New Circuit")+"\tCtrl+N" ); + connect( newCircAct, SIGNAL(triggered()), CircuitWidget::self(), SLOT(newCircuit())); + + QAction* saveCircAct = menu.addAction(QIcon(":/savecirc.png"), tr("Save Circuit")+"\tCtrl+S" ); + connect(saveCircAct, SIGNAL(triggered()), CircuitWidget::self(), SLOT(saveCirc())); + + QAction* saveCircAsAct = menu.addAction(QIcon(":/savecircas.png"),tr("Save Circuit As...")+"\tCtrl+Shift+S" ); + connect(saveCircAsAct, SIGNAL(triggered()), CircuitWidget::self(), SLOT(saveCircAs())); + menu.addSeparator();*/ + + QAction* importCircAct = menu.addAction(QIcon(":/opencirc.png"), tr("Import Circuit") ); + connect(importCircAct, SIGNAL(triggered()), this, SLOT(importCirc())); + + QAction* saveImgAct = menu.addAction( QIcon(":/saveimage.png"), tr("Save Circuit as Image") ); + connect( saveImgAct, SIGNAL(triggered()), this, SLOT(saveImage())); + + QAction* createSubCircAct = menu.addAction(QIcon(":/load.png"), tr("Create SubCircuit") ); + connect(createSubCircAct, SIGNAL(triggered()), Circuit::self(), SLOT( createSubcircuit() )); + + QAction* createBomAct = menu.addAction(QIcon(":/savecirc.png"), tr("Bill of Materials") ); + connect(createBomAct, SIGNAL(triggered()), Circuit::self(), SLOT( bom() )); + + menu.exec( mapFromScene( eventPos ) ); + } +} + +void CircuitView::importCirc() +{ + Circuit::self()->importCirc( m_eventpoint ); +} + +void CircuitView::slotPaste() +{ + Circuit::self()->paste( m_eventpoint ); +} + +void CircuitView::saveImage() +{ + QString circPath = Circuit::self()->getFileName(); + circPath.replace( ".simu", ".png" ); + + QString fileName = QFileDialog::getSaveFileName( this + , tr( "Save as Image" ) + , circPath + , "PNG (*.png);;JPEG (*.jpeg);;BMP (*.bmp);;SVG (*.svg);;All (*.*)" ); + if (!fileName.isNull()) + { + if( fileName.endsWith( ".svg" ) ) + { + QSvgGenerator svgGen; + + svgGen.setFileName( fileName ); + svgGen.setSize( QSize(3200, 2400) ); + svgGen.setViewBox( QRect(0, 0, 3200, 2400) ); + svgGen.setTitle( tr("Circuit Name") ); + svgGen.setDescription( tr("Generated by SimulIDE") ); + + QPainter painter( &svgGen ); + Circuit::self()->render( &painter ); + } + else + { + QPixmap pixMap = this->grab(); + pixMap.save( fileName ); + } + } +} +#include "moc_circuitview.cpp" + diff --git a/src/gui/circuitwidget/circuitview.h b/src/gui/circuitwidget/circuitview.h new file mode 100644 index 0000000..670057d --- /dev/null +++ b/src/gui/circuitwidget/circuitview.h @@ -0,0 +1,73 @@ +/*************************************************************************** + * Copyright (C) 2010 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef CIRCUITVIEW_H +#define CIRCUITVIEW_H + +#include + + +class Component; +class Circuit; + +class CircuitView : public QGraphicsView +{ + Q_OBJECT + + public: + CircuitView( QWidget *parent ); + ~CircuitView(); + + static CircuitView* self() { return m_pSelf; } + + void clear(); + + void wheelEvent( QWheelEvent *event ); + void dragMoveEvent( QDragMoveEvent* event ); + void dragEnterEvent( QDragEnterEvent* event ); + void dragLeaveEvent( QDragLeaveEvent* event ); + + void mousePressEvent( QMouseEvent* event ); + void mouseReleaseEvent( QMouseEvent* event ); + + void resizeEvent( QResizeEvent* event ); + void zoom( double val ); + + void setCircTime( uint64_t step); + + public slots: + void saveImage(); + void slotPaste(); + void importCirc(); + + protected: + void contextMenuEvent( QContextMenuEvent* event ); + + private: + static CircuitView* m_pSelf; + + QPlainTextEdit* m_info; + + Component* m_enterItem; + Circuit* m_circuit; + + QPointF m_eventpoint; +}; + +#endif diff --git a/src/gui/circuitwidget/circuitwidget.cpp b/src/gui/circuitwidget/circuitwidget.cpp new file mode 100644 index 0000000..7fd0055 --- /dev/null +++ b/src/gui/circuitwidget/circuitwidget.cpp @@ -0,0 +1,318 @@ +/*************************************************************************** + * Copyright (C) 2010 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "circuitwidget.h" +#include "mainwindow.h" +#include "circuit.h" +#include "filebrowser.h" + +CircuitWidget* CircuitWidget::m_pSelf = 0l; + +CircuitWidget::CircuitWidget( QWidget *parent ) + : QWidget( parent ) + , m_verticalLayout(this) + , m_horizontLayout() + , m_circView(this) + , m_terminal(this) + , m_plotter(this) + , m_serial(this) + , m_circToolBar(this) + , m_infoMenu(this) +{ + m_pSelf = this; + + m_verticalLayout.setObjectName( "verticalLayout" ); + m_verticalLayout.setContentsMargins(0, 0, 0, 0); + m_verticalLayout.setSpacing(0); + + m_verticalLayout.addWidget( &m_circToolBar ); + m_verticalLayout.addWidget( &m_circView ); + + m_verticalLayout.addLayout( &m_horizontLayout ); + m_horizontLayout.addWidget( &m_plotter ); + m_horizontLayout.addWidget( &m_terminal ); + m_horizontLayout.addWidget( &m_serial); + + connect( this, &CircuitWidget::dataAvailable, + &m_serial, &SerialPortWidget::slotWriteData ); + + m_rateLabel = new QLabel( this ); + QFont font( "Arial", 10, QFont::Normal ); + double fontScale = MainWindow::self()->fontScale(); + font.setPixelSize( int(10*fontScale) ); + m_rateLabel->setFont( font ); + + createActions(); + createToolBars(); + + QString appPath = QCoreApplication::applicationDirPath(); + + m_lastCircDir = MainWindow::self()->settings()->value("lastCircDir").toByteArray(); + if( m_lastCircDir.isEmpty() ) m_lastCircDir = appPath + "..share/simulide/examples"; + + newCircuit(); + setRate(0); +} +CircuitWidget::~CircuitWidget() { } + +void CircuitWidget::clear() +{ + m_circView.clear(); + m_circView.setCircTime( 0 ); +} + +void CircuitWidget::createActions() +{ + newCircAct = new QAction( QIcon(":/newcirc.png"), tr("New C&ircuit\tCtrl+N"), this); + newCircAct->setStatusTip( tr("Create a new Circuit")); + connect( newCircAct, SIGNAL( triggered()), this, SLOT( newCircuit())); + + openCircAct = new QAction( QIcon(":/opencirc.png"), tr("&Open Circuit\tCtrl+O"), this); + openCircAct->setStatusTip( tr("Open an existing Circuit")); + connect( openCircAct, SIGNAL( triggered()), this, SLOT(openCirc())); + + saveCircAct = new QAction( QIcon(":/savecirc.png"), tr("&Save Circuit\tCtrl+S"), this); + saveCircAct->setStatusTip( tr("Save the Circuit to disk")); + connect( saveCircAct, SIGNAL( triggered()), this, SLOT(saveCirc())); + + saveCircAsAct = new QAction( QIcon(":/savecircas.png"),tr("Save Circuit &As...\tCtrl+Shift+S"), this); + saveCircAsAct->setStatusTip( tr("Save the Circuit under a new name")); + connect( saveCircAsAct, SIGNAL( triggered()), this, SLOT(saveCircAs())); + + powerCircAct = new QAction( QIcon(":/poweroff.png"),tr("Power Circuit"), this); + powerCircAct->setStatusTip(tr("Power the Circuit")); + connect( powerCircAct, SIGNAL( triggered()), this, SLOT(powerCirc())); + + infoAct = new QAction( QIcon(":/help.png"),tr("Online Help"), this); + infoAct->setStatusTip(tr("Online Help")); + connect( infoAct, SIGNAL( triggered()), this, SLOT(openInfo())); + + aboutAct = new QAction( QIcon(":/about.png"),tr("About SimulIDE"), this); + aboutAct->setStatusTip(tr("About SimulIDE")); + connect( aboutAct, SIGNAL( triggered()), this, SLOT(about())); + + aboutQtAct = new QAction( QIcon(":/about.png"),tr("About Qt"), this); + aboutQtAct->setStatusTip(tr("About Qt")); + connect( aboutQtAct, SIGNAL(triggered()), qApp, SLOT(aboutQt()) ); +} + +void CircuitWidget::createToolBars() +{ + m_circToolBar.setObjectName( "m_circToolBar" ); + m_circToolBar.addAction(newCircAct); + m_circToolBar.addAction(openCircAct); + m_circToolBar.addAction(saveCircAct); + m_circToolBar.addAction(saveCircAsAct); + m_circToolBar.addSeparator();//.......................... + m_circToolBar.addAction(powerCircAct); + m_circToolBar.addSeparator();//.......................... + m_circToolBar.addWidget( m_rateLabel ); + + QWidget *spacerWidget = new QWidget(this); + spacerWidget->setSizePolicy(QSizePolicy::Expanding, QSizePolicy::Preferred); + spacerWidget->setVisible(true); + m_circToolBar.addWidget(spacerWidget); + + m_infoMenu.addAction( infoAct ); + m_infoMenu.addAction( aboutAct ); + m_infoMenu.addAction( aboutQtAct ); + + QToolButton* toolButton = new QToolButton( this ); + toolButton->setStatusTip( tr("Info") ); + toolButton->setMenu( &m_infoMenu ); + toolButton->setIcon( QIcon(":/help.png") ); + toolButton->setPopupMode( QToolButton::InstantPopup ); + m_circToolBar.addWidget( toolButton ); + + m_circToolBar.addSeparator();//.......................... +} + +bool CircuitWidget::newCircuit() +{ + powerCircOff(); + + if( MainWindow::self()->windowTitle().endsWith('*') ) + { + const QMessageBox::StandardButton ret + = QMessageBox::warning(this, "MainWindow::closeEvent", + tr("\nCircuit has been modified.\n" + "Do you want to save your changes?\n"), + QMessageBox::Save | QMessageBox::Discard | QMessageBox::Cancel); + + if ( ret == QMessageBox::Save ) saveCirc(); + else if( ret == QMessageBox::Cancel ) return false; + } + clear(); + Circuit::self()->setAutoBck( MainWindow::self()->autoBck() ); + m_curCirc = ""; + + MainWindow::self()->setTitle( tr("New Circuit")); + MainWindow::self()->settings()->setValue( "lastCircDir", m_lastCircDir ); + + return true; +} + +void CircuitWidget::openCirc() +{ + const QString dir = m_lastCircDir; + QString fileName = QFileDialog::getOpenFileName( 0l, tr("Load Circuit"), dir, + tr("Circuits (*.simu);;All files (*.*)")); + + loadCirc( fileName ); +} + +void CircuitWidget::loadCirc( QString path ) +{ + if( !path.isEmpty() && path.endsWith(".simu") ) + { + newCircuit(); + Circuit::self()->loadCircuit( path ); + + m_curCirc = path; + m_lastCircDir = path; + MainWindow::self()->setTitle(path.split("/").last()); + MainWindow::self()->settings()->setValue( "lastCircDir", m_lastCircDir ); + //FileBrowser::self()->setPath(m_lastCircDir); + m_circView.setCircTime( 0 ); + } +} + +void CircuitWidget::saveCirc() +{ + bool saved = false; + if( m_curCirc.isEmpty() ) saved = saveCircAs(); + else saved = Circuit::self()->saveCircuit( m_curCirc ); + + if( saved ) + { + QString fileName = m_curCirc; + MainWindow::self()->setTitle(fileName.split("/").last()); + } +} + +bool CircuitWidget::saveCircAs() +{ + const QString dir = m_lastCircDir; + QString fileName = QFileDialog::getSaveFileName( this, tr("Save Circuit"), dir, + tr("Circuits (*.simu);;All files (*.*)")); + if (fileName.isEmpty()) return false; + + m_curCirc = fileName; + m_lastCircDir = fileName; + + bool saved = Circuit::self()->saveCircuit(fileName); + if( saved ) + { + QString fileName = m_curCirc; + MainWindow::self()->setTitle(fileName.split("/").last()); + MainWindow::self()->settings()->setValue( "lastCircDir", m_lastCircDir ); + //FileBrowser::self()->setPath(m_lastCircDir); + } + return saved; +} + +void CircuitWidget::powerCirc() +{ + if ( powerCircAct->iconText() == "Off" ) powerCircOn(); + else if( powerCircAct->iconText() == "On" ) powerCircOff(); +} + +void CircuitWidget::powerCircOn() +{ + powerCircAct->setIcon(QIcon(":/poweron.png")); + powerCircAct->setIconText("On"); + Simulator::self()->runContinuous(); +} + +void CircuitWidget::powerCircOff() +{ + powerCircAct->setIcon(QIcon(":/poweroff.png")); + powerCircAct->setIconText("Off"); + Simulator::self()->stopSim(); +} + +void CircuitWidget::powerCircDebug( bool run ) +{ + powerCircAct->setIcon(QIcon(":/powerdeb.png")); + powerCircAct->setIconText("Debug"); + if( run ) Simulator::self()->runContinuous(); + else + { + Simulator::self()->debug(); + m_rateLabel->setText( tr(" Real Speed: Debugger") ); + } +} + +void CircuitWidget::openInfo() +{ + QDesktopServices::openUrl(QUrl("http://simulide.blogspot.com")); +} + +void CircuitWidget::about() +{ + QString t ="               "; + QMessageBox::about( this, tr("About SimulIDE"), + "Web site: https://simulide.blogspot.com/

" + "Project: https://sourceforge.net/projects/simulide/

" + "Report Bugs: https://sourceforge.net/p/simulide/discussion/bugs/

" + "Become a Patron: https://www.patreon.com/simulide

" + "

" + "Creator: Santiago Gonzalez.
" + "
" + "Developers:
" + +t+"Santiago Gonzalez.
" + +t+"Popov Alexey
" + +t+"Pavel Lamonov
" + "
" + "Contributors:
" + +t+"Chris Roper
" + +t+"Sergei Chiyanov
" + +t+"Sergey Roenko
" + +t+"Gabor Nagy
" + "
" + "Translations:
" + +t+"Spanish: Santiago Gonzalez.
" + +t+"Russian: Ronomir
" + ); +} + +void CircuitWidget::setRate( int rate ) +{ + if( rate < 0 ) m_rateLabel->setText( tr("Circuit ERROR!!!") ); + else + m_rateLabel->setText( tr(" Real Speed: ")+QString::number(rate) +" %" ); +} + +/*void CircuitWidget::setSerialPortWidget( QWidget* serialPortWidget ) +{ + m_serialPortWidget = serialPortWidget; + m_horizontLayout.addWidget( m_serialPortWidget ); +}*/ + +void CircuitWidget::showSerialPortWidget( bool showIt ) +{ + m_serial.setVisible( showIt ); +} + +void CircuitWidget::writeSerialPortWidget( const QByteArray &data ) +{ + emit dataAvailable( data ); +} + +#include "moc_circuitwidget.cpp" diff --git a/src/gui/circuitwidget/circuitwidget.h b/src/gui/circuitwidget/circuitwidget.h new file mode 100644 index 0000000..d4d0b09 --- /dev/null +++ b/src/gui/circuitwidget/circuitwidget.h @@ -0,0 +1,99 @@ +/*************************************************************************** + * Copyright (C) 2010 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef CIRCUITWIDGET_H +#define CIRCUITWIDGET_H + +#include + +#include "circuitview.h" +#include "plotterwidget.h" +#include "terminalwidget.h" +#include "serialportwidget.h" + +class MAINMODULE_EXPORT CircuitWidget : public QWidget +{ + Q_OBJECT + + public: + CircuitWidget( QWidget *parent ); + ~CircuitWidget(); + + static CircuitWidget* self() { return m_pSelf; } + + void clear(); + + void createActions(); + + void createToolBars(); + + void setRate( int rate ); + + void showSerialPortWidget( bool showIt ); + + void writeSerialPortWidget( const QByteArray &data ); + + void powerCircOn(); + void powerCircOff(); + void powerCircDebug( bool run ); + + public slots: + bool newCircuit(); + void openCirc(); + void loadCirc( QString path ); + void saveCirc(); + bool saveCircAs(); + void powerCirc(); + void openInfo(); + void about(); + + signals: + void dataAvailable( const QByteArray &data ); + + private: + + static CircuitWidget* m_pSelf; + + QVBoxLayout m_verticalLayout; + QHBoxLayout m_horizontLayout; + CircuitView m_circView; + + TerminalWidget m_terminal; + PlotterWidget m_plotter; + SerialPortWidget m_serial; + + QToolBar m_circToolBar; + QLabel* m_rateLabel; + + QAction* newCircAct; + QAction* openCircAct; + QAction* saveCircAct; + QAction* saveCircAsAct; + QAction* powerCircAct; + QAction* infoAct; + QAction* aboutAct; + QAction* aboutQtAct; + + QMenu m_infoMenu; + + QString m_curCirc; + QString m_lastCircDir; +}; + +#endif diff --git a/src/gui/circuitwidget/component.cpp b/src/gui/circuitwidget/component.cpp new file mode 100644 index 0000000..2f4843a --- /dev/null +++ b/src/gui/circuitwidget/component.cpp @@ -0,0 +1,672 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "component.h" +#include "mainwindow.h" +#include "connector.h" +#include "connectorline.h" +#include "propertieswidget.h" +#include "itemlibrary.h" +#include "circuit.h" +#include "utils.h" +#include "simuapi_apppath.h" + +#include + +int Component::m_error = 0; + +static const char* Component_properties[] = { + QT_TRANSLATE_NOOP("App::Property","id"), + QT_TRANSLATE_NOOP("App::Property","Show id"), + QT_TRANSLATE_NOOP("App::Property","Unit"), + QT_TRANSLATE_NOOP("App::Property","Color") +}; + +Component::Component( QObject* parent, QString type, QString id ) + : QObject( parent ) + , QGraphicsItem() + , multUnits( "TGMk munp" ) +{ + Q_UNUSED( Component_properties ); + //setCacheMode(QGraphicsItem::DeviceCoordinateCache); + + m_help = 0l; + m_value = 0; + m_unitMult = 1; + m_Hflip = 1; + m_Vflip = 1; + m_mult = " "; + m_unit = " "; + m_type = type; + m_color = QColor( Qt::white ); + m_showId = false; + m_moving = false; + m_printable = false; + m_BackGround = ""; + + if( ( type != "Connector" )&&( type != "Node" ) ) + { + LibraryItem* li= ItemLibrary::self()->libraryItem( type ); + if( li ) m_help = li->help(); + } + + QFont f; + f.setPixelSize(10); + + m_idLabel = new Label( this ); + m_idLabel->setDefaultTextColor( Qt::darkBlue ); + m_idLabel->setFont(f); + setLabelPos(-16,-24, 0); + setShowId( false ); + + m_valLabel = new Label( this ); + m_valLabel->setDefaultTextColor( Qt::black ); + setValLabelPos( 0, 0, 0); + f.setPixelSize(9); + m_valLabel->setFont(f); + setShowVal( false ); + + setObjectName( id ); + setIdLabel( id ); + setId(id); + + setCursor( Qt::OpenHandCursor ); + this->setFlag( QGraphicsItem::ItemIsSelectable, true ); + + //setTransformOriginPoint( boundingRect().center() ); + + if( type == "Connector" ) Circuit::self()->conList()->append( this ); + else Circuit::self()->compList()->prepend( this ); +} +Component::~Component(){} + +void Component::mousePressEvent( QGraphicsSceneMouseEvent* event ) +{ + if( event->button() == Qt::LeftButton ) + { + event->accept(); + if( event->modifiers() == Qt::ControlModifier ) setSelected( !isSelected() ); + else + { + if( !isSelected() ) // Deselecciona los demas + { + QList itemlist = Circuit::self()->selectedItems(); + + foreach( QGraphicsItem* item, itemlist ) item->setSelected( false ); + + setSelected( true ); + } + QPropertyEditorWidget::self()->setObject( this ); + PropertiesWidget::self()->setHelpText( m_help ); + + setCursor( Qt::ClosedHandCursor ); + } + } +} + +void Component::mouseDoubleClickEvent( QGraphicsSceneMouseEvent* event ) +{ + if ( event->button() == Qt::LeftButton ) + { + QPropertyEditorWidget::self()->setObject( this ); + PropertiesWidget::self()->setHelpText( m_help ); + //QPropertyEditorWidget::self()->setVisible( true ); + } +} + +void Component::mouseMoveEvent( QGraphicsSceneMouseEvent* event ) +{ + event->accept(); + + QPointF delta = togrid(event->scenePos()) - togrid(event->lastScenePos()); + + bool deltaH = fabs( delta.x() )> 0; + bool deltaV = fabs( delta.y() )> 0; + + if( !deltaH && !deltaV ) return; + + QList itemlist = Circuit::self()->selectedItems(); + if( itemlist.size() > 1 ) + { + if( !m_moving ) + { + Circuit::self()->saveState(); + m_moving = true; + } + foreach( QGraphicsItem* item, itemlist ) + { + ConnectorLine* line = qgraphicsitem_cast( item ); + if( line->objectName() == "" ) + { + //line->move( delta ); + line->moveSimple( delta ); + } + + } + foreach( QGraphicsItem* item, itemlist ) + { + Component* comp = qgraphicsitem_cast( item ); + if(comp && (comp->objectName() != "") && (!comp->objectName().contains("Connector")) ) + { + comp->move( delta ); + } + } + foreach( Component* comp, *(Circuit::self()->conList()) ) + { + Connector* con = static_cast( comp ); + con->startPin()->isMoved(); + con->endPin()->isMoved(); + } + } + else this->move( delta ); +} + +void Component::move( QPointF delta ) +{ + setPos( pos() + delta ); + emit moved(); +} + +void Component::moveTo( QPointF pos ) +{ + setPos( pos ); + emit moved(); +} + +void Component::mouseReleaseEvent( QGraphicsSceneMouseEvent* event ) +{ + event->accept(); + setCursor( Qt::OpenHandCursor ); + + m_moving = false; + Circuit::self()->update(); +} + +void Component::contextMenuEvent( QGraphicsSceneContextMenuEvent* event ) +{ + if( !acceptedMouseButtons() ) event->ignore(); + else + { + event->accept(); + QMenu* menu = new QMenu(); + contextMenu( event, menu ); + menu->deleteLater(); + } +} + +void Component::contextMenu( QGraphicsSceneContextMenuEvent* event, QMenu* menu ) +{ + m_eventpoint = mapToScene( togrid(event->pos()) ); + + QAction* copyAction = menu->addAction(QIcon(":/copy.png"),tr("Copy")+"\tCtrl+C"); + connect( copyAction, SIGNAL( triggered()), this, SLOT(slotCopy()) ); + + QAction* removeAction = menu->addAction( QIcon( ":/remove.png"),tr("Remove")+"\tDel" ); + connect( removeAction, SIGNAL( triggered()), this, SLOT(slotRemove()) ); + + QAction* propertiesAction = menu->addAction( QIcon( ":/properties.png"),tr("Properties") ); + connect( propertiesAction, SIGNAL( triggered()), this, SLOT(slotProperties()) ); + menu->addSeparator(); + + QAction* rotateCWAction = menu->addAction( QIcon( ":/rotateCW.png"),tr("Rotate CW") ); + connect( rotateCWAction, SIGNAL( triggered()), this, SLOT(rotateCW())); + + QAction* rotateCCWAction = menu->addAction(QIcon( ":/rotateCCW.png"),tr("Rotate CCW") ); + connect( rotateCCWAction, SIGNAL( triggered()), this, SLOT(rotateCCW()) ); + + QAction* rotateHalfAction = menu->addAction(QIcon(":/rotate180.png"),tr("Rotate 180") ); + connect( rotateHalfAction, SIGNAL( triggered()), this, SLOT(rotateHalf()) ); + + QAction* H_flipAction = menu->addAction(QIcon(":/hflip.png"),tr("Horizontal Flip") ); + connect( H_flipAction, SIGNAL( triggered()), this, SLOT(H_flip()) ); + + QAction* V_flipAction = menu->addAction(QIcon(":/vflip.png"),tr("Vertical Flip") ); + connect( V_flipAction, SIGNAL( triggered()), this, SLOT(V_flip()) ); + + menu->exec(event->screenPos()); +} + +void Component::slotCopy() +{ + if( !isSelected() ) Circuit::self()->clearSelection(); + setSelected( true ); + Circuit::self()->copy( m_eventpoint ); +} + +void Component::slotRemove() +{ + if( !isSelected() ) Circuit::self()->clearSelection(); + setSelected( true ); + Circuit::self()->removeItems(); +} + +void Component::remove() +{ + for( uint i=0; iisConnected()) + { + Connector* con = pin->connector(); + if( con ) con->remove(); + } + } + Circuit::self()->compRemoved( true ); +} + +void Component::slotProperties() +{ + QPropertyEditorWidget::self()->setObject( this ); + PropertiesWidget::self()->setHelpText( m_help ); + MainWindow::self()->m_sidepanel->setCurrentIndex( 2 ); // Open Properties tab +} + +void Component::H_flip() +{ + Circuit::self()->saveState(); + m_Hflip = -m_Hflip; + setflip(); +} + +void Component::V_flip() +{ + Circuit::self()->saveState(); + m_Vflip = -m_Vflip; + setflip(); +} + +void Component::rotateCW() +{ + Circuit::self()->saveState(); + setRotation( rotation() + 90 ); + emit moved(); +} + +void Component::rotateCCW() +{ + Circuit::self()->saveState(); + setRotation( rotation() - 90 ); + emit moved(); +} + +void Component::rotateHalf() +{ + Circuit::self()->saveState(); + setRotation( rotation() - 180); + emit moved(); +} + +void Component::updateLabel( Label* label, QString txt ) +{ + if ( label == m_idLabel ) m_id = txt; + else if( label == m_valLabel ) + { + QString value = ""; + int x; + for( x=0; xm_labelx = x; + m_idLabel->m_labely = y; + m_idLabel->m_labelrot = rot; + m_idLabel->setLabelPos(); +} + +void Component::setLabelPos() +{ + m_idLabel->setLabelPos(); +} + +void Component::setValLabelPos( int x, int y, int rot ) +{ + m_valLabel->m_labelx = x; + m_valLabel->m_labely = y; + m_valLabel->m_labelrot = rot; + m_valLabel->setLabelPos(); +} + +void Component::setValLabelPos() +{ + m_valLabel->setLabelPos(); +} + +void Component::setValue( double val) +{ + if( fabs(val) < 1e-12 ) + { + m_value = 0; + m_mult = " "; + } + else + { + val = val*m_unitMult; + + int index = 4; // We are in bare units "TGMK munp" + m_unitMult = 1; + while( fabs(val) >= 1000 ) + { + index--; + m_unitMult = m_unitMult*1000; + val = val/1000; + } + while( fabs(val) < 1 ) + { + index++; + m_unitMult = m_unitMult/1000; + val = val*1000; + } + m_mult = multUnits.at( index ); + if( m_mult != " " ) m_mult.prepend( " " ); + m_value = val; + } + m_valLabel->setPlainText( QString::number(m_value)+m_mult+m_unit ); +} + +QString Component::unit() { return m_mult+m_unit; } +void Component::setUnit( QString un ) +{ + QString mul = " "; + un.replace( " ", "" ); + if( un.size() > 0 ) + { + mul = un.at(0); + + double unitMult = 1e12; // We start in Tera units "TGMk munp" + + for( int x=0; x<9; x++ ) + { + if( mul == multUnits.at(x) ) + { + m_unitMult = unitMult; + m_mult = mul; + if( m_mult != " " ) m_mult.prepend( " " ); + m_valLabel->setPlainText( QString::number(m_value)+m_mult+m_unit ); + return; + } + unitMult = unitMult/1000; + } + } + m_unitMult = 1; + m_mult = " "; + m_valLabel->setPlainText( QString::number(m_value)+m_mult+m_unit ); +} + +double Component::getmultValue() { return m_value*m_unitMult; } + +bool Component::showId() { return m_showId; } +void Component::setShowId( bool show ) +{ + m_idLabel->setVisible( show ); + m_showId = show; +} + +bool Component::showVal() { return m_showVal;} +void Component::setShowVal( bool show ) +{ + m_valLabel->setVisible( show ); + m_showVal = show; +} + +QString Component::idLabel() { return m_idLabel->toPlainText(); } +void Component::setIdLabel( QString id ) { m_idLabel->setPlainText( id ); } + +QString Component::itemID() { return m_id; } +void Component::setId( QString id ) { m_id = id; m_idLabel->setPlainText( m_id ); } + +int Component::labelx() { return m_idLabel->m_labelx; } +void Component::setLabelX( int x ) { m_idLabel->m_labelx = x; } + +int Component::labely() { return m_idLabel->m_labely; } +void Component::setLabelY( int y ) { m_idLabel->m_labely = y; } + +int Component::labelRot() { return m_idLabel->m_labelrot; } +void Component::setLabelRot( int rot ) { m_idLabel->m_labelrot = rot; } + +int Component::valLabelx() { return m_valLabel->m_labelx; } +void Component::setValLabelX( int x ) { m_valLabel->m_labelx = x; } + +int Component::valLabely() { return m_valLabel->m_labely; } +void Component::setValLabelY( int y ) { m_valLabel->m_labely = y; } + +int Component::valLabRot() { return m_valLabel->m_labelrot; } +void Component::setValLabRot( int rot ) { m_valLabel->m_labelrot = rot; } + +int Component::hflip() { return m_Hflip; } +void Component::setHflip( int hf ) +{ + if(( hf != 1 )&( hf != -1 )) hf = 1; + m_Hflip = hf; + setflip(); +} + +int Component::vflip(){ return m_Vflip; } +void Component::setVflip( int vf ) +{ + if(( vf != 1 )&( vf != -1 )) vf = 1; + m_Vflip = vf; + setflip(); +} + +void Component::setflip() +{ + setTransform(QTransform::fromScale( m_Hflip, m_Vflip )); + m_idLabel->setTransform(QTransform::fromScale( m_Hflip, m_Vflip )); + m_valLabel->setTransform(QTransform::fromScale( m_Hflip, m_Vflip )); + emit moved(); +} + +QString Component::itemType() { return m_type; } +QString Component::category() { return m_category; } +QIcon Component::icon() { return m_icon; } + +//bool Component::isChanged(){ return m_changed;} + +void Component::setPrintable( bool p ) +{ + m_printable = p; +} + +QString Component::print() +{ + if( !m_printable ) return ""; + + QString str = m_id+" : "; + str += objectName().split("-").first()+" "; + if( m_value > 0 ) str += QString::number( m_value ); + str += m_mult+m_unit+"\n"; + + return str; +} + +void Component::paint( QPainter* painter, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + Q_UNUSED(option); Q_UNUSED(widget); + + QPen pen(Qt::black, 1.5, Qt::SolidLine, Qt::RoundCap, Qt::RoundJoin); + + if ( isSelected() ) + { + pen.setColor( Qt::darkGray); + painter->setBrush( Qt::darkGray); + //label->setBrush( Qt::darkGray ); + } + else + { + painter->setBrush( m_color ); + //label->setBrush( Qt::darkBlue ); + } + //painter->setBrush( Qt::yellow ); + //painter->drawRect( boundingRect() ); + + painter->setPen( pen ); +} + + +// CLASS Label ***************************************************************************** + +Label::Label( Component* parent ) + : QGraphicsTextItem( parent ) +{ + m_parentComp = parent; + m_labelrot = 0; + setCursor( Qt::OpenHandCursor ); + + this->document()->setDocumentMargin(0); + + connect(document(), SIGNAL(contentsChange(int, int, int)), + this, SLOT(updateGeometry(int, int, int))); + //document()->setDefaultStyleSheet( QString("p {max-width: 500px;}") ); + //document()->set +} +Label::~Label() { } + +void Label::updateGeometry(int, int, int) +{ + document()->setTextWidth(-1); + //setTextWidth( boundingRect().width() ); + //setItemSize(boundingRect().width(), boundingRect().height()); + //adjustSize(); +} + +void Label::focusOutEvent(QFocusEvent *event) +{ + setTextInteractionFlags(Qt::NoTextInteraction); + m_parentComp->updateLabel( this, document()->toPlainText() ); + + QGraphicsTextItem::focusOutEvent(event); +} + +void Label::mouseDoubleClickEvent(QGraphicsSceneMouseEvent *event) +{ + if( !isEnabled() ) return; + //setTextInteractionFlags(Qt::TextEditorInteraction); + + QGraphicsTextItem::mouseDoubleClickEvent(event); +} + +void Label::mousePressEvent(QGraphicsSceneMouseEvent* event) +{ + if ( event->button() == Qt::LeftButton ) + { + event->accept(); + setCursor( Qt::ClosedHandCursor ); + grabMouse(); + } +} + +void Label::mouseMoveEvent(QGraphicsSceneMouseEvent* event) +{ + event->accept(); + setPos( pos() + mapToItem( m_parentComp, event->pos() ) - mapToItem( m_parentComp, event->lastPos() ) ); + m_labelx = int(pos().x()); + m_labely = int(pos().y()); +} + +void Label::mouseReleaseEvent(QGraphicsSceneMouseEvent* event) +{ + event->accept(); + setCursor( Qt::OpenHandCursor ); + ungrabMouse(); +} + +void Label::contextMenuEvent(QGraphicsSceneContextMenuEvent* event) +{ + if( !acceptedMouseButtons() ) event->ignore(); + else + { + event->accept(); + QMenu menu; + + QAction* rotateCWAction = menu.addAction(QIcon(":/rotateCW.png"),"Rotate CW"); + connect(rotateCWAction, SIGNAL(triggered()), this, SLOT(rotateCW())); + + QAction* rotateCCWAction = menu.addAction(QIcon(":/rotateCCW.png"),"Rotate CCW"); + connect(rotateCCWAction, SIGNAL(triggered()), this, SLOT(rotateCCW())); + + QAction* rotate180Action = menu.addAction(QIcon(":/rotate180.png"),"Rotate 180º"); + connect(rotate180Action, SIGNAL(triggered()), this, SLOT(rotate180())); + + /*QAction* selectedAction = */menu.exec(event->screenPos()); + } +} + +void Label::setLabelPos() +{ + setX( m_labelx ); + setY( m_labely ); + setRotation( m_labelrot ); + adjustSize(); +} + +void Label::rotateCW() +{ + if( !isEnabled() ) return; + setRotation( rotation() + 90 ); + m_labelrot = int(rotation()) ; +} + +void Label::rotateCCW() +{ + if( !isEnabled() ) return; + setRotation( rotation() - 90 ); + m_labelrot = int(rotation()) ; +} + +void Label::rotate180() +{ + if( !isEnabled() ) return; + setRotation( rotation() - 180 ); + m_labelrot = int(rotation()) ; +} + +void Label::H_flip( int hf ) +{ + if( !isEnabled() ) return; + setTransform(QTransform::fromScale(hf, 1)); + //m_idLabel->rotateCCW(); +} + +void Label::V_flip( int vf ) +{ + if( !isEnabled() ) return; + setTransform(QTransform::fromScale(1, vf)); +} + +/*void Label::paint(QPainter* painter, const QStyleOptionGraphicsItem* option, QWidget* widget) +{ + painter->setBrush( Qt::blue ); + painter->drawRect( boundingRect() ); + QGraphicsTextItem::paint( painter, option, widget ); +}*/ + +#include "moc_component.cpp" diff --git a/src/gui/circuitwidget/component.h b/src/gui/circuitwidget/component.h new file mode 100644 index 0000000..77eedab --- /dev/null +++ b/src/gui/circuitwidget/component.h @@ -0,0 +1,228 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + + +#ifndef COMPONENTITEM_H +#define COMPONENTITEM_H + +#include +#include + +#include "QPropertyEditorWidget.h" + +Q_DECLARE_METATYPE( QList ) + +class Pin; +class Label; + +class MAINMODULE_EXPORT Component : public QObject, public QGraphicsItem +{ + Q_OBJECT + Q_INTERFACES(QGraphicsItem) + + Q_PROPERTY( QString itemtype READ itemType USER true ) + Q_PROPERTY( QString id READ idLabel WRITE setIdLabel DESIGNABLE true USER true ) + Q_PROPERTY( bool Show_id READ showId WRITE setShowId DESIGNABLE true USER true ) + Q_PROPERTY( qreal rotation READ rotation WRITE setRotation ) + Q_PROPERTY( int x READ x WRITE setX ) + Q_PROPERTY( int y READ y WRITE setY ) + Q_PROPERTY( int labelx READ labelx WRITE setLabelX ) + Q_PROPERTY( int labely READ labely WRITE setLabelY ) + Q_PROPERTY( int labelrot READ labelRot WRITE setLabelRot ) + Q_PROPERTY( int valLabelx READ valLabelx WRITE setValLabelX ) + Q_PROPERTY( int valLabely READ valLabely WRITE setValLabelY ) + Q_PROPERTY( int valLabRot READ valLabRot WRITE setValLabRot ) + Q_PROPERTY( int hflip READ hflip WRITE setHflip ) + Q_PROPERTY( int vflip READ vflip WRITE setVflip ) + + public: + QRectF boundingRect() const { return QRectF( m_area.x()-2, m_area.y()-2, m_area.width()+4 ,m_area.height()+4 ); } + + Component( QObject* parent, QString type, QString id ); + ~Component(); + + enum { Type = UserType + 1 }; + int type() const { return Type; } + + QString idLabel(); + void setIdLabel( QString id ); + + QString itemID(); + void setId( QString id ); + + bool showId(); + void setShowId( bool show ); + + bool showVal(); + void setShowVal( bool show ); + + QString unit(); + void setUnit( QString un ); + + int labelx(); + void setLabelX( int x ); + + int labely(); + void setLabelY( int y ); + + int labelRot(); + void setLabelRot( int rot ); + + void setLabelPos( int x, int y, int rot=0 ); + void setLabelPos(); + + int valLabelx(); + void setValLabelX( int x ); + + int valLabely(); + void setValLabelY( int y ); + + int valLabRot(); + void setValLabRot( int rot ); + + int hflip(); + void setHflip( int hf ); + + int vflip(); + void setVflip( int vf ); + + void setValLabelPos( int x, int y, int rot ); + void setValLabelPos(); + + void updateLabel( Label* label, QString txt ); + + double getmultValue(); + + //QString getHelp( QString file ); + + void setPrintable( bool p ); + QString print(); + + QString itemType(); + QString category(); + QIcon icon(); + + virtual void inStateChanged( int ){} + + virtual void move( QPointF delta ); + void moveTo( QPointF pos ); + + virtual void paint(QPainter* painter, const QStyleOptionGraphicsItem* option, QWidget* widget); + + signals: + void moved(); + + public slots: + virtual void slotProperties(); + virtual void rotateCW(); + virtual void rotateCCW(); + virtual void rotateHalf(); + virtual void H_flip(); + virtual void V_flip(); + virtual void slotRemove(); + void slotCopy(); + + virtual void remove(); + + protected: + void mousePressEvent(QGraphicsSceneMouseEvent* event); + void mouseDoubleClickEvent(QGraphicsSceneMouseEvent* event); + void mouseMoveEvent(QGraphicsSceneMouseEvent* event); + void mouseReleaseEvent(QGraphicsSceneMouseEvent* event); + void contextMenuEvent(QGraphicsSceneContextMenuEvent* event); + void contextMenu( QGraphicsSceneContextMenuEvent* event, QMenu* menu ); + + void setValue( double val ); + void setflip(); + + double m_value; + + const QString multUnits; + QString m_unit; + QString m_mult; + double m_unitMult; + + int m_Hflip; + int m_Vflip; + static int m_error; + + Label* m_idLabel; + Label* m_valLabel; + + QString m_id; + QString m_type; + QString m_category; + QString m_BackGround; // BackGround Image + + QString* m_help; + + QIcon m_icon; + QColor m_color; + QRectF m_area; // bounding rect + QPointF m_eventpoint; + + bool m_showId; + bool m_showVal; + bool m_moving; + bool m_printable; + + std::vector m_pin; +}; + +typedef Component* (*createItemPtr)( QObject* parent, QString type, QString id ); + + +class Label : public QGraphicsTextItem +{ + friend class Component; + + Q_OBJECT + public: + Label( Component* parent ); + ~Label(); + + void setLabelPos(); + + //virtual void paint(QPainter* painter, const QStyleOptionGraphicsItem* option, QWidget* widget); + + public slots: + void rotateCW(); + void rotateCCW(); + void rotate180(); + void H_flip( int hf ); + void V_flip( int vf ); + void updateGeometry(int, int, int); + + protected: + void mouseDoubleClickEvent(QGraphicsSceneMouseEvent *event); + void mousePressEvent(QGraphicsSceneMouseEvent* event); + void mouseMoveEvent(QGraphicsSceneMouseEvent* event); + void mouseReleaseEvent(QGraphicsSceneMouseEvent* event); + void contextMenuEvent(QGraphicsSceneContextMenuEvent* event); + void focusOutEvent(QFocusEvent *event); + + private: + Component* m_parentComp; + + int m_labelx; + int m_labely; + int m_labelrot; +}; +#endif + diff --git a/src/gui/circuitwidget/components/Shape.cpp b/src/gui/circuitwidget/components/Shape.cpp new file mode 100644 index 0000000..a94039f --- /dev/null +++ b/src/gui/circuitwidget/components/Shape.cpp @@ -0,0 +1,95 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "shape.h" +#include "circuit.h" + +static const char* Shape_properties[] = { + QT_TRANSLATE_NOOP("App::Property","H size"), + QT_TRANSLATE_NOOP("App::Property","V size"), + QT_TRANSLATE_NOOP("App::Property","Border"), + QT_TRANSLATE_NOOP("App::Property","Color"), + QT_TRANSLATE_NOOP("App::Property","Opacity"), + QT_TRANSLATE_NOOP("App::Property","Z Value") +}; + +Shape::Shape( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) +{ + Q_UNUSED( Shape_properties ); + + m_hSize = 50; + m_vSize = 30; + m_border = 2; + m_color = QColor( Qt::gray ); + + setZValue( -1 ); + + m_area = QRectF( -m_hSize/2, -m_vSize/2, m_hSize, m_vSize ); +} +Shape::~Shape(){} + +int Shape::hSize() +{ + return m_hSize; +} + +void Shape::setHSize( int size ) +{ + m_hSize = size; + m_area = QRectF( -m_hSize/2, -m_vSize/2, m_hSize, m_vSize ); + Circuit::self()->update(); +} + +int Shape::vSize() +{ + return m_vSize; +} + +void Shape::setVSize( int size ) +{ + m_vSize = size; + m_area = QRectF( -m_hSize/2, -m_vSize/2, m_hSize, m_vSize ); + Circuit::self()->update(); +} + +int Shape::border() +{ + return m_border; +} + +void Shape::setBorder( int border ) +{ + if( border < 0 ) border = 0; + m_border = border; + update(); +} + +QColor Shape::color() +{ + return m_color; +} + +void Shape::setColor( QColor color ) +{ + m_color = color; + update(); +} + +#include "moc_shape.cpp" diff --git a/src/gui/circuitwidget/components/active/bjt.cpp b/src/gui/circuitwidget/components/active/bjt.cpp new file mode 100644 index 0000000..57965b3 --- /dev/null +++ b/src/gui/circuitwidget/components/active/bjt.cpp @@ -0,0 +1,143 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "bjt.h" +#include "itemlibrary.h" +#include "connector.h" +#include "circuit.h" +#include "pin.h" + +static const char* BJT_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Gain"), + QT_TRANSLATE_NOOP("App::Property","PNP") +}; + + +Component* BJT::construct( QObject* parent, QString type, QString id ) +{ + return new BJT( parent, type, id ); +} + +LibraryItem* BJT::libraryItem() +{ + return new LibraryItem( + tr( "BJT" ), + tr( "Active" ), + "bjt.png", + "BJT", + BJT::construct ); +} + +BJT::BJT( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eBJT( id.toStdString() ) +{ + Q_UNUSED( BJT_properties ); + + m_area = QRectF( -12, -14, 28, 28 ); + setLabelPos(18, 0, 0); + + QString newId = id; + + m_pin.resize( 3 ); + newId.append(QString("-collector")); + m_pin[0] = new Pin( 90, QPoint(8,-16), newId, 0, this ); + m_pin[0]->setLabelText( "" ); + m_pin[0]->setLabelColor( QColor( 0, 0, 0 ) ); + m_ePin[0] = m_pin[0]; + + newId = id; + newId.append(QString("-emiter")); + m_pin[1] = new Pin( 270, QPoint(8, 16), newId, 1, this ); + m_pin[1]->setLabelText( "" ); + m_pin[1]->setLabelColor( QColor( 0, 0, 0 ) ); + m_ePin[1] = m_pin[1]; + + newId = id; + newId.append(QString("-base")); + m_pin[2] = new Pin( 180, QPoint(-16, 0), newId, 0, this ); + m_pin[2]->setLabelColor( QColor( 0, 0, 0 ) ); + m_ePin[2] = m_pin[2]; + + Simulator::self()->addToUpdateList( this ); + + resetState(); +} +BJT::~BJT() +{ + Simulator::self()->remFromUpdateList( this ); +} + +void BJT::updateStep() +{ + update(); +} + +void BJT::setPnp( bool pnp ) +{ + m_PNP = pnp; + update(); +} + +void BJT::setBCd( bool bcd ) +{ + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + eBJT::setBCd( bcd ); + + if( pauseSim ) Simulator::self()->runContinuous(); +} + +void BJT::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + if( Circuit::self()->animate() && m_baseCurr > 1e-4 ) p->setBrush( Qt::yellow ); + else p->setBrush( Qt::white ); + + p->drawEllipse( m_area ); + + p->drawLine( -12, 0,-4, 0 ); + p->drawLine( -4,-8,-4, 8 ); + + p->drawLine( -4,-4, 8,-12 ); + p->drawLine( -4, 4, 8, 12 ); + + p->setBrush( Qt::black ); + if( m_PNP ) + { + QPointF points[3] = { + QPointF( 0.1, 6.8 ), + QPointF( 2.4, 10 ), + QPointF( 4, 7.5 ) }; + p->drawPolygon(points, 3); + } + else + { + QPointF points[3] = { + QPointF( 6, 10.7 ), + QPointF( 2.4, 10 ), + QPointF( 4, 7.5 ) }; + p->drawPolygon(points, 3); + } +} + +#include "moc_bjt.cpp" + diff --git a/src/gui/circuitwidget/components/active/bjt.h b/src/gui/circuitwidget/components/active/bjt.h new file mode 100644 index 0000000..bcf10a2 --- /dev/null +++ b/src/gui/circuitwidget/components/active/bjt.h @@ -0,0 +1,52 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef BJT_H +#define BJT_H + +#include "e-bjt.h" +#include "component.h" + +class LibraryItem; + +class MAINMODULE_EXPORT BJT : public Component, public eBJT +{ + Q_OBJECT + Q_PROPERTY( double Gain READ gain WRITE setGain DESIGNABLE true USER true ) + Q_PROPERTY( double Threshold READ BEthr WRITE setBEthr DESIGNABLE true USER true ) + Q_PROPERTY( bool PNP READ pnp WRITE setPnp DESIGNABLE true USER true ) + Q_PROPERTY( bool BC_diode READ BCd WRITE setBCd DESIGNABLE true USER true ) + + public: + + BJT( QObject* parent, QString type, QString id ); + ~BJT(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + void updateStep(); + + void setPnp( bool pnp ); + void setBCd( bool bcd ); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); +}; + +#endif diff --git a/src/gui/circuitwidget/components/active/diode.cpp b/src/gui/circuitwidget/components/active/diode.cpp new file mode 100644 index 0000000..12207f3 --- /dev/null +++ b/src/gui/circuitwidget/components/active/diode.cpp @@ -0,0 +1,89 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "diode.h" +#include "connector.h" +#include "pin.h" + +static const char* Diode_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Threshold"), + QT_TRANSLATE_NOOP("App::Property","Zener Volt") +}; + +Component* Diode::construct( QObject* parent, QString type, QString id ) +{ return new Diode( parent, type, id ); } + +LibraryItem* Diode::libraryItem() +{ + return new LibraryItem( + tr( "Diode" ), + tr( "Active" ), + "diode.png", + "Diode", + Diode::construct); +} + +Diode::Diode( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eDiode( id.toStdString() ) +{ + Q_UNUSED( Diode_properties ); + + m_pin.resize(2); + QString nodid = m_id; + nodid.append(QString("-lPin")); + QPoint nodpos = QPoint(-16, 0 ); + m_pin[0] = new Pin( 180, nodpos, nodid, 0, this ); // pPin + m_ePin[0] = m_pin[0]; + + nodid = m_id; + nodid.append(QString("-rPin")); + nodpos = QPoint( 16, 0 ); + m_pin[1] = new Pin( 0, nodpos, nodid, 1, this ); // nPin + m_ePin[1] = m_pin[1]; +} +Diode::~Diode(){} + +void Diode::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + p->setBrush( Qt::black ); + + static const QPointF points[3] = { + QPointF( 7, 0 ), + QPointF(-8,-7 ), + QPointF(-8, 7 ) }; + + p->drawPolygon(points, 3); + + QPen pen = p->pen(); + pen.setWidth(3); + p->setPen(pen); + + p->drawLine( 7, -6, 7, 6 ); + + if( m_zenerV>0 ) + { + p->drawLine( 7,-6, 4,-6 ); + p->drawLine( 7, 6, 10, 6 ); + } +} + +#include "moc_diode.cpp" diff --git a/src/gui/circuitwidget/components/active/diode.h b/src/gui/circuitwidget/components/active/diode.h new file mode 100644 index 0000000..8eadd93 --- /dev/null +++ b/src/gui/circuitwidget/components/active/diode.h @@ -0,0 +1,46 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef DIODE_H +#define DIODE_H + +#include "e-diode.h" +#include "itemlibrary.h" + +class MAINMODULE_EXPORT Diode : public Component, public eDiode +{ + Q_OBJECT + Q_PROPERTY( double Threshold READ threshold WRITE setThreshold DESIGNABLE true USER true ) + Q_PROPERTY( double Zener_Volt READ zenerV WRITE setZenerV DESIGNABLE true USER true ) + + + public: + + QRectF boundingRect() const { return QRect( -12, -8, 24, 16 ); } + + Diode( QObject* parent, QString type, QString id ); + ~Diode(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); +}; + +#endif diff --git a/src/gui/circuitwidget/components/active/inductor.cpp b/src/gui/circuitwidget/components/active/inductor.cpp new file mode 100644 index 0000000..7772f10 --- /dev/null +++ b/src/gui/circuitwidget/components/active/inductor.cpp @@ -0,0 +1,125 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include + +#include "inductor.h" +#include "connector.h" +#include "itemlibrary.h" + +static const char* Inductor_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Inductance"), + QT_TRANSLATE_NOOP("App::Property","Show Ind") +}; + + +Component* Inductor::construct( QObject* parent, QString type, QString id ) +{ return new Inductor( parent, type, id ); } + +LibraryItem* Inductor::libraryItem() +{ + return new LibraryItem( + tr( "Inductor" ), + tr( "Passive" ), + "inductor.png", + "Inductor", + Inductor::construct); +} + +Inductor::Inductor( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eInductor( id.toStdString() ) +{ + Q_UNUSED( Inductor_properties ); + + m_ePin.resize(2); + + m_area = QRectF( -10, -10, 20, 20 ); + + QString nodid = m_id; + nodid.append(QString("-lPin")); + QPoint nodpos = QPoint(-16-8,0); + Pin* pin = new Pin( 180, nodpos, nodid, 0, this); + pin->setLength(4.5); + pin->setPos(-16, 0 ); + m_ePin[0] = pin; + + nodid = m_id; + nodid.append(QString("-rPin")); + nodpos = QPoint(16+8,0); + pin = new Pin( 0, nodpos, nodid, 1, this); + pin->setLength(4.5); + pin->setPos( 16, 0 ); + m_ePin[1] = pin; + + m_unit = "H"; + setInduc( m_ind ); + setValLabelPos(-16, 6, 0); + setShowVal( true ); + + setLabelPos(-16,-24, 0); +} +Inductor::~Inductor(){} + +double Inductor::induc() { return m_value; } + +void Inductor::setInduc( double i ) +{ + Component::setValue( i ); // Takes care about units multiplier + eInductor::setInd( m_value*m_unitMult ); +} + +void Inductor::setUnit( QString un ) +{ + Component::setUnit( un ); + eInductor::setInd( m_value*m_unitMult ); +} +void Inductor::remove() +{ + if( m_ePin[0]->isConnected() ) (static_cast(m_ePin[0]))->connector()->remove(); + if( m_ePin[1]->isConnected() ) (static_cast(m_ePin[1]))->connector()->remove(); + Component::remove(); +} + +void Inductor::paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + Component::paint( p, option, widget ); + + QPen pen = p->pen(); + pen.setWidth(2.8); + p->setPen(pen); + + QRectF rectangle(-12,-4.5, 10, 10 ); + int startAngle = -45 * 16; + int spanAngle = 220 * 16; + p->drawArc(rectangle, startAngle, spanAngle); + + QRectF rectangle2(-5,-4.5, 10, 10 ); + startAngle = 225 * 16; + spanAngle = -270 * 16; + p->drawArc(rectangle2, startAngle, spanAngle); + + QRectF rectangle3(2,-4.5, 10, 10 ); + startAngle = 225 * 16; + spanAngle = -220 * 16; + p->drawArc(rectangle3, startAngle, spanAngle); +} + + +#include "moc_inductor.cpp" diff --git a/src/gui/circuitwidget/components/active/inductor.h b/src/gui/circuitwidget/components/active/inductor.h new file mode 100644 index 0000000..0cae9b6 --- /dev/null +++ b/src/gui/circuitwidget/components/active/inductor.h @@ -0,0 +1,59 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef INDUCTOR_H +#define INDUCTOR_H + +#include "e-inductor.h" + +#include "pin.h" + +class LibraryItem; + +class MAINMODULE_EXPORT Inductor : public Component, public eInductor +{ + Q_OBJECT + Q_PROPERTY( double Inductance READ induc WRITE setInduc DESIGNABLE true USER true ) + Q_PROPERTY( QString Unit READ unit WRITE setUnit DESIGNABLE true USER true ) + Q_PROPERTY( bool Show_Ind READ showVal WRITE setShowVal DESIGNABLE true USER true ) + + public: + + Inductor( QObject* parent, QString type, QString id ); + ~Inductor(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + double induc(); + void setInduc( double c ); + + void setUnit( QString un ); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + void remove(); + + private: + //QGraphicsSimpleTextItem* m_labelcurr; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/active/mosfet.cpp b/src/gui/circuitwidget/components/active/mosfet.cpp new file mode 100644 index 0000000..afcd7d2 --- /dev/null +++ b/src/gui/circuitwidget/components/active/mosfet.cpp @@ -0,0 +1,160 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "mosfet.h" +#include "connector.h" +#include "simulator.h" +#include "circuit.h" +#include "itemlibrary.h" +#include "e-source.h" +#include "pin.h" + +static const char* Mosfet_properties[] = { + QT_TRANSLATE_NOOP("App::Property","RDSon"), + QT_TRANSLATE_NOOP("App::Property","P Channel"), + QT_TRANSLATE_NOOP("App::Property","Depletion") +}; + +Component* Mosfet::construct( QObject* parent, QString type, QString id ) +{ return new Mosfet( parent, type, id ); } + +LibraryItem* Mosfet::libraryItem() +{ + return new LibraryItem( + tr( "Mosfet" ), + tr( "Active" ), + "mosfet.png", + "Mosfet", + Mosfet::construct); +} + +Mosfet::Mosfet( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eMosfet( id.toStdString() ) +{ + Q_UNUSED( Mosfet_properties ); + + m_area = QRectF( -12, -14, 28, 28 ); + setLabelPos(18, 0, 0); + + QString newId = id; + newId.append(QString("-Gate")); + Pin* newPin = new Pin( 180, QPoint(-16, 0), newId, 0, this ); + newPin->setLabelText( "" ); + newPin->setLabelColor( QColor( 0, 0, 0 ) ); + m_ePin[2] = newPin; + + // D,S pins m_ePin[0] m_ePin[1] + newId = id; + newId.append(QString("-Dren")); + newPin = new Pin( 90, QPoint(8,-16), newId, 0, this ); + newPin->setLabelText( "" ); + newPin->setLabelColor( QColor( 0, 0, 0 ) ); + m_ePin[0] = newPin; + + newId = id; + newId.append(QString("-Sour")); + newPin = new Pin( 270, QPoint(8, 16), newId, 1, this ); + newPin->setLabelText( "" ); + newPin->setLabelColor( QColor( 0, 0, 0 ) ); + m_ePin[1] = newPin; + + Simulator::self()->addToUpdateList( this ); +} +Mosfet::~Mosfet(){} + +void Mosfet::updateStep() +{ + update(); +} + +void Mosfet::setPchannel( bool pc ) +{ + m_Pchannel = pc; + update(); +} + +void Mosfet::setDepletion( bool dep ) +{ + m_depletion = dep; + update(); +} + +void Mosfet::remove() +{ + Simulator::self()->remFromUpdateList( this ); + + if( m_ePin[0]->isConnected() ) (static_cast(m_ePin[0]))->connector()->remove(); + if( m_ePin[1]->isConnected() ) (static_cast(m_ePin[1]))->connector()->remove(); + if( m_ePin[2]->isConnected() ) (static_cast(m_ePin[2]))->connector()->remove(); + + Component::remove(); +} + +void Mosfet::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + if( Circuit::self()->animate() && m_gateV > 0 ) p->setBrush( Qt::yellow ); + else p->setBrush( Qt::white ); + + p->drawEllipse( m_area ); + + p->drawLine( -12, 0,-4, 0 ); + p->drawLine( -4,-8,-4, 8 ); + + p->drawLine( 0,-7.5, 8,-7.5 ); + p->drawLine( 0, 0, 8, 0 ); + p->drawLine( 0, 7.5, 8, 7.5 ); + + p->drawLine( 8,-12, 8,-7.5 ); + p->drawLine( 8, 12, 8, 0 ); + + p->setBrush( Qt::black ); + if( m_Pchannel ) + { + QPointF points[3] = { + QPointF( 7, 0 ), + QPointF( 3,-2 ), + QPointF( 3, 2 ) }; + p->drawPolygon(points, 3); + } + else + { + QPointF points[3] = { + QPointF( 1, 0 ), + QPointF( 5,-2 ), + QPointF( 5, 2 ) }; + p->drawPolygon(points, 3); + } + if( m_depletion ) + { + QPen pen(Qt::black, 2.0, Qt::SolidLine, Qt::RoundCap, Qt::RoundJoin); + p->setPen( pen ); + p->drawLine( 0,-9, 0, 9 ); + } + else + { + p->drawLine( 0,-9, 0, -5 ); + p->drawLine( 0,-2, 0, 2 ); + p->drawLine( 0, 5, 0, 9 ); + } +} + +#include "moc_mosfet.cpp" diff --git a/src/gui/circuitwidget/components/active/mosfet.h b/src/gui/circuitwidget/components/active/mosfet.h new file mode 100644 index 0000000..b49a623 --- /dev/null +++ b/src/gui/circuitwidget/components/active/mosfet.h @@ -0,0 +1,56 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef MOSFET_H +#define MOSFET_H + + +#include "e-mosfet.h" +#include "component.h" + +class LibraryItem; + +class MAINMODULE_EXPORT Mosfet : public Component, public eMosfet +{ + Q_OBJECT + Q_PROPERTY( double RDSon READ RDSon WRITE setRDSon DESIGNABLE true USER true ) + Q_PROPERTY( double Threshold READ threshold WRITE setThreshold DESIGNABLE true USER true ) + Q_PROPERTY( bool P_Channel READ pChannel WRITE setPchannel DESIGNABLE true USER true ) + Q_PROPERTY( bool Depletion READ depletion WRITE setDepletion DESIGNABLE true USER true ) + + public: + + Mosfet( QObject* parent, QString type, QString id ); + ~Mosfet(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem* libraryItem(); + + void updateStep(); + + void setPchannel( bool pc ); + void setDepletion( bool dep ); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + void remove(); +}; + +#endif diff --git a/src/gui/circuitwidget/components/active/mux_analog.cpp b/src/gui/circuitwidget/components/active/mux_analog.cpp new file mode 100644 index 0000000..e1ab1e7 --- /dev/null +++ b/src/gui/circuitwidget/components/active/mux_analog.cpp @@ -0,0 +1,204 @@ +/*************************************************************************** + * Copyright (C) 2019 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include + +#include "mux_analog.h" +#include "circuit.h" +#include "e-source.h" +#include "e-resistor.h" +#include "pin.h" + + +Component* MuxAnalog::construct( QObject* parent, QString type, QString id ) +{ + return new MuxAnalog( parent, type, id ); +} + +LibraryItem* MuxAnalog::libraryItem() +{ + return new LibraryItem( + tr( "Analog Mux" ), + tr( "Active" ), + "1to3-c.png", + "MuxAnalog", + MuxAnalog::construct ); +} + +MuxAnalog::MuxAnalog( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eMuxAnalog( id.toStdString() ) +{ + setLabelPos(-16,-16, 0); + + Pin* pin = new Pin( 180, QPoint( -24, 8 ), m_id+"-PinInput", 0, this ); + pin->setLabelText( " Z" ); + pin->setLabelColor( QColor( 0, 0, 0 ) ); + m_inputPin = pin; + + pin = new Pin( 180, QPoint( -24, 16 ), m_id+"-PinEnable", 0, this ); + pin->setLabelText( " En" ); + pin->setLabelColor( QColor( 0, 0, 0 ) ); + pin->setInverted( true ); + m_enablePin = pin; + + setAddrBits( 3 ); +} +MuxAnalog::~MuxAnalog(){} + +void MuxAnalog::setAddrBits( int bits ) +{ + if( bits == m_addrBits ) return; + if( bits < 1 ) bits = 1; + + int channels = pow( 2, bits ); + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + if( bits < m_addrBits ) deleteAddrBits( m_addrBits-bits ); + else createAddrBits( bits-m_addrBits ); + + if ( channels < m_channels ) deleteResistors( m_channels-channels ); + else createResistors( channels-m_channels ); + + m_channels = channels; + + int rside = m_channels*8+8; + int size = 5*8 + bits*8; + if( rside > size ) size = rside; + + m_area = QRect( -2*8, 0, 4*8, size ); + + Pin* pin =(static_cast(m_enablePin)); + pin->setPos( QPoint(-3*8,4*8+bits*8 ) ); + pin->isMoved(); + pin->setLabelPos(); + + if( pauseSim ) Simulator::self()->runContinuous(); + Circuit::self()->update(); +} + +void MuxAnalog::createAddrBits( int c ) +{ + int start = m_addrBits; + m_addrBits = m_addrBits+c; + m_addrPin.resize( m_addrBits ); + + for( int i=start; isetLabelText( " A"+QString::number(i) ); + pin->setLabelColor( QColor( 0, 0, 0 ) ); + m_addrPin[i] = pin; + } + //update(); +} + +void MuxAnalog::deleteAddrBits( int d ) +{ + int start = m_addrBits-d; + + for( int i=start; i(m_addrPin[i])); + if( pin->isConnected() ) pin->connector()->remove(); + + delete pin; + } + m_addrBits = m_addrBits-d; + m_addrPin.resize( m_addrBits ); + //Circuit::self()->update(); +} + +void MuxAnalog::createResistors( int c ) +{ + int start = m_channels; + m_channels = m_channels+c; + m_resistor.resize( m_channels ); + m_chanPin.resize( m_channels ); + m_ePin.resize( m_channels ); + + for( int i=start; isetEpin( 0, m_ePin[i] ); + + pinId = m_id+"-pinY"+QString::number(i); + QPoint pinpos = QPoint( 3*8, 8+i*8 ); + Pin* pin = new Pin( 0, pinpos, pinId, 0, this); + pin->setLabelText( "Y"+QString::number(i)+" " ); + pin->setLabelColor( QColor( 0, 0, 0 ) ); + m_resistor[i]->setEpin( 1, pin ); + m_chanPin[i] = pin; + + m_resistor[i]->setAdmit( 0 ); + } + //update(); +} + +void MuxAnalog::deleteResistors( int d ) +{ + int start = m_channels-d; + + for( int i=start; i(m_chanPin[i]); + if( pin->isConnected() ) pin->connector()->remove(); + + delete pin; + delete m_ePin[i]; + delete m_resistor[i]; + } + m_resistor.resize( start ); + m_chanPin.resize( start ); + m_ePin.resize( start ); + //Circuit::self()->update(); +} + +void MuxAnalog::remove() +{ + if( m_inputPin->isConnected() ) (static_cast(m_inputPin))->connector()->remove(); + if( m_enablePin->isConnected() ) (static_cast(m_enablePin))->connector()->remove(); + + for( int i=0; i(m_addrPin[i]); + if( pin->isConnected() ) pin->connector()->remove(); + } + deleteResistors( m_channels ); + deleteAddrBits( m_addrBits ); + + Component::remove(); +} + +void MuxAnalog::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + p->drawRoundRect( m_area, 4, 4 ); +} +#include "moc_mux_analog.cpp" + diff --git a/src/gui/circuitwidget/components/active/mux_analog.h b/src/gui/circuitwidget/components/active/mux_analog.h new file mode 100644 index 0000000..2c2165c --- /dev/null +++ b/src/gui/circuitwidget/components/active/mux_analog.h @@ -0,0 +1,57 @@ +/*************************************************************************** + * Copyright (C) 2019 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef MUXANALOG_H +#define MUXANALOG_H + +#include "e-mux_analog.h" +#include "itemlibrary.h" +#include "component.h" + +class eResistor; + +class MAINMODULE_EXPORT MuxAnalog : public Component, public eMuxAnalog +{ + Q_OBJECT + Q_PROPERTY( int Address_Bits READ addrBits WRITE setAddrBits DESIGNABLE true USER true ) + Q_PROPERTY( double Impedance READ resist WRITE setResist DESIGNABLE true USER true ) + + public: + MuxAnalog( QObject* parent, QString type, QString id ); + ~MuxAnalog(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + int addrBits() { return m_addrBits; } + void setAddrBits( int bits ); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void remove(); + + private: + void createAddrBits( int c ); + void deleteAddrBits( int d ); + void createResistors( int c ); + void deleteResistors( int d ); +}; + +#endif diff --git a/src/gui/circuitwidget/components/active/op_amp.cpp b/src/gui/circuitwidget/components/active/op_amp.cpp new file mode 100644 index 0000000..eae95ca --- /dev/null +++ b/src/gui/circuitwidget/components/active/op_amp.cpp @@ -0,0 +1,149 @@ +/*************************************************************************** + * * + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + +#include "op_amp.h" +#include "e-source.h" +#include "itemlibrary.h" +#include "connector.h" +#include "pin.h" + +static const char* OpAmp_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Power Pins") +}; + +Component* OpAmp::construct( QObject* parent, QString type, QString id ) +{ + return new OpAmp( parent, type, id ); +} + +LibraryItem* OpAmp::libraryItem() +{ + return new LibraryItem( + tr( "OpAmp" ), + tr( "Active" ), + "opamp.png", + "opAmp", + OpAmp::construct ); +} + +OpAmp::OpAmp( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eOpAmp( id.toStdString() ) +{ + Q_UNUSED( OpAmp_properties ); + + m_area = QRect( -18, -8*2, 36, 8*2*2 ); + setLabelPos(-16,-32, 0); + + setGain( 1000 ); + m_voltPos = 5; + m_voltNeg = 0; + + m_pin.resize( 5 ); + + QString newId = id; + + newId.append(QString("-inputNinv")); + m_pin[0] = new Pin( 180, QPoint(-16-8,-8), newId, 0, this ); + m_pin[0]->setLabelText( "+" ); + m_pin[0]->setLabelColor( QColor( 0, 0, 0 ) ); + m_ePin[0] = m_pin[0]; + + newId = id; + newId.append(QString("-inputInv")); + m_pin[1] = new Pin( 180, QPoint(-16-8,8), newId, 1, this ); + m_pin[1]->setLabelText( " -" ); + m_pin[1]->setLabelColor( QColor( 0, 0, 0 ) ); + m_ePin[1] = m_pin[1]; + + newId = id; + newId.append(QString("-output")); + m_pin[2] = new Pin( 0, QPoint(16+8,0), newId, 2, this ); + m_ePin[2] = m_pin[2]; + newId.append("-eSource"); + m_output = new eSource( newId.toStdString(), m_ePin[2] ); + //m_output->setImp( 40 ); + m_output->setOut( true ); + + newId = id; + newId.append(QString("powerPos")); + m_pin[3] = new Pin( 90, QPoint(0,-16), newId, 3, this ); + m_ePin[3] = m_pin[3]; + //newId.append("-eSource"); + //m_powerPos = new eSource( newId.toStdString(), m_ePin[2] ); + + newId = id; + newId.append(QString("powerNeg")); + m_pin[4] = new Pin( 270, QPoint(0, 16), newId, 4, this ); + m_ePin[4] = m_pin[4]; + //newId.append("-eSource"); + //m_powerNeg = new eSource( newId.toStdString(), m_ePin[3] ); + + setPowerPins( false ); +} +OpAmp::~OpAmp() +{ +} + +void OpAmp::setPowerPins( bool set ) +{ + m_pin[3]->setEnabled( set ); + m_pin[3]->setVisible( set ); + m_pin[4]->setEnabled( set ); + m_pin[4]->setVisible( set ); + + m_powerPins = set; +} + +QPainterPath OpAmp::shape() const +{ + QPainterPath path; + + QVector points; + + points << QPointF(-16,-16 ) + << QPointF(-16, 16 ) + << QPointF( 16, 1 ) + << QPointF( 16, -1 ); + + path.addPolygon( QPolygonF(points) ); + path.closeSubpath(); + return path; +} + +void OpAmp::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + QPen pen = p->pen(); + pen.setWidth(2); + p->setPen(pen); + + static const QPointF points[4] = { + QPointF(-16,-16 ), + QPointF(-16, 16 ), + QPointF( 16, 1 ), + QPointF( 16, -1 ) }; + + p->drawPolygon(points, 4); +} + +#include "moc_op_amp.cpp" diff --git a/src/gui/circuitwidget/components/active/op_amp.h b/src/gui/circuitwidget/components/active/op_amp.h new file mode 100644 index 0000000..714f087 --- /dev/null +++ b/src/gui/circuitwidget/components/active/op_amp.h @@ -0,0 +1,52 @@ +/*************************************************************************** + * * + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + +#ifndef OPAMP_H +#define OPAMP_H + +#include "e-op_amp.h" +#include "component.h" + +#include + +class LibraryItem; + +class MAINMODULE_EXPORT OpAmp : public Component, public eOpAmp +{ + Q_OBJECT + Q_PROPERTY( double Gain READ gain WRITE setGain DESIGNABLE true USER true ) + Q_PROPERTY( bool Power_Pins READ hasPowerPins WRITE setPowerPins DESIGNABLE true USER true ) + + public: + + OpAmp( QObject* parent, QString type, QString id ); + ~OpAmp(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + void setPowerPins( bool set ); + + virtual QPainterPath shape() const; + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); +}; + +#endif diff --git a/src/gui/circuitwidget/components/active/volt_reg.cpp b/src/gui/circuitwidget/components/active/volt_reg.cpp new file mode 100644 index 0000000..ea4e5cf --- /dev/null +++ b/src/gui/circuitwidget/components/active/volt_reg.cpp @@ -0,0 +1,101 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "volt_reg.h" +#include "connector.h" +#include "simulator.h" +#include "pin.h" + +static const char* VoltReg_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Volts") +}; + +Component* VoltReg::construct( QObject* parent, QString type, QString id ) +{ + return new VoltReg( parent, type, id ); +} + +LibraryItem* VoltReg::libraryItem() +{ + return new LibraryItem( + tr( "Volt. Regulator" ), + tr( "Active" ), + "voltreg.png", + "VoltReg", + VoltReg::construct ); +} + +VoltReg::VoltReg( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eVoltReg( id.toStdString() ) +{ + Q_UNUSED( VoltReg_properties ); + + m_area = QRect( -10, -10, 20, 20 ); + + setVRef( 1.2 ); + m_voltPos = 0; + m_voltNeg = 0; + + m_pin.resize( 3 ); + + QString newId = id; + + newId.append(QString("-input")); + m_pin[0] = new Pin( 180, QPoint( -16, 0 ), newId, 0, this ); + m_pin[0]->setLabelText( "I" ); + m_pin[0]->setLabelColor( QColor( 0, 0, 0 ) ); + m_ePin[0] = m_pin[0]; + + newId = id; + newId.append(QString("-output")); + m_pin[1] = new Pin( 0, QPoint( 16, 0 ), newId, 1, this ); + m_pin[1]->setLabelText( "O" ); + m_pin[1]->setLabelColor( QColor( 0, 0, 0 ) ); + m_ePin[1] = m_pin[1]; + + newId = id; + newId.append(QString("-ref")); + m_pin[2] = new Pin( 270, QPoint( 0, 16 ), newId, 2, this ); + m_pin[2]->setLabelText( "R" ); + m_pin[2]->setLabelColor( QColor( 0, 0, 0 ) ); + m_ePin[2] = m_pin[2]; +} +VoltReg::~VoltReg() +{ +} + +void VoltReg::setVRef( double vref ) +{ + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + eVoltReg::setVRef( vref ); + + if( pauseSim ) Simulator::self()->runContinuous(); +} + +void VoltReg::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + p->drawRect( m_area ); +} + +#include "moc_volt_reg.cpp" diff --git a/src/gui/circuitwidget/components/active/volt_reg.h b/src/gui/circuitwidget/components/active/volt_reg.h new file mode 100644 index 0000000..b2d528c --- /dev/null +++ b/src/gui/circuitwidget/components/active/volt_reg.h @@ -0,0 +1,48 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef VOLTREG_H +#define VOLTREG_H + +#include "e-volt_reg.h" +#include "itemlibrary.h" + +#include + + +class MAINMODULE_EXPORT VoltReg : public Component, public eVoltReg +{ + Q_OBJECT + Q_PROPERTY( double Volts READ vRef WRITE setVRef DESIGNABLE true USER true ) + + public: + + VoltReg( QObject* parent, QString type, QString id ); + ~VoltReg(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual void setVRef( double vref ); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); +}; + + +#endif diff --git a/src/gui/circuitwidget/components/logic/adc.cpp b/src/gui/circuitwidget/components/logic/adc.cpp new file mode 100644 index 0000000..5e854c0 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/adc.cpp @@ -0,0 +1,90 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "adc.h" +#include "connector.h" +#include "itemlibrary.h" + +static const char* ADC_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Vref") +}; + +Component* ADC::construct( QObject* parent, QString type, QString id ) +{ + return new ADC( parent, type, id ); +} + +LibraryItem* ADC::libraryItem() +{ + return new LibraryItem( + tr( "ADC" ), + tr( "Logic/Other Logic" ), + "1to3.png", + "ADC", + ADC::construct ); +} + +ADC::ADC( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ) + , eADC( id.toStdString() ) +{ + Q_UNUSED( ADC_properties ); + + m_width = 4; + m_height = 9; + + setNumOuts( 8 ); // Create Output Pins + setMaxVolt( 5 ); + + LogicComponent::setNumInps( 1 ); + + m_inPin[0] = new Pin( 180, QPoint( -24, -8 ), m_id+"-in", 1, this ); + m_inPin[0]->setLabelText( " In" ); + m_inPin[0]->setLabelColor( QColor( 0, 0, 0 ) ); + + eLogicDevice::createInput( m_inPin[0] ); +} +ADC::~ADC(){ +} + +void ADC::setNumOuts( int outs ) +{ + if( outs == m_numOutputs ) return; + if( outs < 1 ) return; + + LogicComponent::setNumOuts( outs ); + eLogicDevice::deleteOutputs( m_numOutputs ); + + for( int i=0; isetLabelText( "D"+num+" " ); + m_outPin[i]->setLabelColor( QColor( 0, 0, 0 ) ); + + eLogicDevice::createOutput( m_outPin[i] ); + } + m_maxAddr = pow( 2, m_numOutputs )-1; + + m_height = outs+1; + m_area = QRect( -(m_width/2)*8, -m_height*8+8, m_width*8, m_height*8 ); +} + +#include "moc_adc.cpp" diff --git a/src/gui/circuitwidget/components/logic/adc.h b/src/gui/circuitwidget/components/logic/adc.h new file mode 100644 index 0000000..0c45235 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/adc.h @@ -0,0 +1,49 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef ADC_H +#define ADC_H + +#include "logiccomponent.h" +#include "e-adc.h" + +class LibraryItem; + +class MAINMODULE_EXPORT ADC : public LogicComponent, public eADC +{ + Q_OBJECT + Q_PROPERTY( double Out_High_V READ outHighV WRITE setOutHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Low_V READ outLowV WRITE setOutLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Imped READ outImp WRITE setOutImp DESIGNABLE true USER true ) + Q_PROPERTY( double Vref READ maxVolt WRITE setMaxVolt DESIGNABLE true USER true ) + Q_PROPERTY( int Num_Bits READ numOuts WRITE setNumOuts DESIGNABLE true USER true ) + + public: + ADC( QObject* parent, QString type, QString id ); + ~ADC(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual void setNumOuts( int outs ); + + protected: +}; + +#endif diff --git a/src/gui/circuitwidget/components/logic/bcdto7s.cpp b/src/gui/circuitwidget/components/logic/bcdto7s.cpp new file mode 100644 index 0000000..32680e2 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/bcdto7s.cpp @@ -0,0 +1,81 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "bcdto7s.h" +#include "pin.h" + + +Component* BcdTo7S::construct( QObject* parent, QString type, QString id ) +{ + return new BcdTo7S( parent, type, id ); +} + +LibraryItem* BcdTo7S::libraryItem() +{ + return new LibraryItem( + tr( "Bcd To 7S." ), + tr( "Logic/Converters" ), + "2to3g.png", + "BcdTo7S", + BcdTo7S::construct ); +} + +BcdTo7S::BcdTo7S( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ) + , eBcdTo7S( id.toStdString() ) +{ + m_width = 4; + m_height = 8; + + QStringList pinList; + + pinList // Inputs: + + << "IL03 S0" + << "IL04 S1" + << "IL05 S2" + << "IL06 S3" + + << "IU01OE " + + // Outputs: + << "OR01a " + << "OR02b " + << "OR03c " + << "OR04d " + << "OR05e " + << "OR06f " + << "OR07g " + ; + init( pinList ); + + eLogicDevice::createOutEnablePin( m_inPin[4] ); // IOutput Enable + + for( int i=0; i<4; i++ ) + eLogicDevice::createInput( m_inPin[i] ); + + for( int i=0; i<7; i++ ) + { + eLogicDevice::createOutput( m_outPin[i] ); + } +} +BcdTo7S::~BcdTo7S(){} + + +#include "moc_bcdto7s.cpp" diff --git a/src/gui/circuitwidget/components/logic/bcdto7s.h b/src/gui/circuitwidget/components/logic/bcdto7s.h new file mode 100644 index 0000000..ad52951 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/bcdto7s.h @@ -0,0 +1,50 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef BCDTO7S_H +#define BCDTO7S_H + +#include "e-bcdto7s.h" +#include "itemlibrary.h" +#include "logiccomponent.h" + +class MAINMODULE_EXPORT BcdTo7S : public LogicComponent, public eBcdTo7S +{ + Q_OBJECT + Q_PROPERTY( double Input_High_V READ inputHighV WRITE setInputHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Low_V READ inputLowV WRITE setInputLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Imped READ inputImp WRITE setInputImp DESIGNABLE true USER true ) + Q_PROPERTY( double Out_High_V READ outHighV WRITE setOutHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Low_V READ outLowV WRITE setOutLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Imped READ outImp WRITE setOutImp DESIGNABLE true USER true ) + Q_PROPERTY( bool Inverted READ inverted WRITE setInverted DESIGNABLE true USER true ) + Q_PROPERTY( bool Tristate READ tristate USER true ) + + public: + BcdTo7S( QObject* parent, QString type, QString id ); + ~BcdTo7S(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + bool tristate() { return true; } +}; + +#endif + diff --git a/src/gui/circuitwidget/components/logic/bcdtodec.cpp b/src/gui/circuitwidget/components/logic/bcdtodec.cpp new file mode 100644 index 0000000..9af9222 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/bcdtodec.cpp @@ -0,0 +1,83 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "bcdtodec.h" +#include "pin.h" + + +Component* BcdToDec::construct( QObject* parent, QString type, QString id ) +{ + return new BcdToDec( parent, type, id ); +} + +LibraryItem* BcdToDec::libraryItem() +{ + return new LibraryItem( + tr( "Bcd To Dec." ), + tr( "Logic/Converters" ), + "2to3g.png", + "BcdToDec", + BcdToDec::construct ); +} + +BcdToDec::BcdToDec( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ) + , eBcdToDec( id.toStdString() ) +{ + m_width = 4; + m_height = 11; + + QStringList pinList; + + pinList // Inputs: + + << "IL04 S0" + << "IL05 S1" + << "IL06 S2" + << "IL07 S3" + + << "IU01OE " + + // Outputs: + << "OR01O0 " + << "OR02O1 " + << "OR03O2 " + << "OR04O3 " + << "OR05O4 " + << "OR06O5 " + << "OR07O6 " + << "OR08O7 " + << "OR09O8 " + << "OR10O9 " + ; + init( pinList ); + + eLogicDevice::createOutEnablePin( m_inPin[4] ); // IOutput Enable + + for( int i=0; i<4; i++ ) + eLogicDevice::createInput( m_inPin[i] ); + + for( int i=0; i<10; i++ ) + { + eLogicDevice::createOutput( m_outPin[i] ); + } +} +BcdToDec::~BcdToDec(){} + +#include "moc_bcdtodec.cpp" diff --git a/src/gui/circuitwidget/components/logic/bcdtodec.h b/src/gui/circuitwidget/components/logic/bcdtodec.h new file mode 100644 index 0000000..ca1efe3 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/bcdtodec.h @@ -0,0 +1,50 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef BCDTODEC_H +#define BCDTODEC_H + +#include "e-bcdtodec.h" +#include "itemlibrary.h" +#include "logiccomponent.h" + +class MAINMODULE_EXPORT BcdToDec : public LogicComponent, public eBcdToDec +{ + Q_OBJECT + Q_PROPERTY( double Input_High_V READ inputHighV WRITE setInputHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Low_V READ inputLowV WRITE setInputLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Imped READ inputImp WRITE setInputImp DESIGNABLE true USER true ) + Q_PROPERTY( double Out_High_V READ outHighV WRITE setOutHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Low_V READ outLowV WRITE setOutLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Imped READ outImp WRITE setOutImp DESIGNABLE true USER true ) + Q_PROPERTY( bool Inverted READ inverted WRITE setInverted DESIGNABLE true USER true ) + Q_PROPERTY( bool Tristate READ tristate USER true ) + + public: + BcdToDec( QObject* parent, QString type, QString id ); + ~BcdToDec(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + bool tristate() { return true; } +}; + +#endif + diff --git a/src/gui/circuitwidget/components/logic/bincounter.cpp b/src/gui/circuitwidget/components/logic/bincounter.cpp new file mode 100644 index 0000000..8b51ddb --- /dev/null +++ b/src/gui/circuitwidget/components/logic/bincounter.cpp @@ -0,0 +1,70 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "bincounter.h" +#include "pin.h" + +static const char* BinCounter_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Max Value") +}; + +Component *BinCounter::construct(QObject *parent, QString type, QString id) +{ + return new BinCounter(parent, type, id); +} + +LibraryItem* BinCounter::libraryItem() +{ + return new LibraryItem( + tr( "Counter" ), + tr ("Logic/Arithmetic"), + "2to1.png", + "Counter", + BinCounter::construct ); +} + +BinCounter::BinCounter(QObject *parent, QString type, QString id) + : LogicComponent( parent, type, id ) + , eBinCounter( id.toStdString() ) +{ + Q_UNUSED( BinCounter_properties ); + + m_width = 4; + m_height = 4; + + QStringList pinList; + pinList + << "IL01>" + << "IL03 R" + << "OR02Q " + ; + init( pinList ); + + eLogicDevice::createClockPin( m_inPin[0] ); // Input Clock + + eLogicDevice::createInput( m_inPin[1] ); // Input Reset + + eLogicDevice::createOutput( m_outPin[0] ); // Output Q + + setResetInv( true ); // Invert Reset Pin +} + +BinCounter::~BinCounter(){} + +#include "moc_bincounter.cpp" diff --git a/src/gui/circuitwidget/components/logic/bincounter.h b/src/gui/circuitwidget/components/logic/bincounter.h new file mode 100644 index 0000000..f9f4366 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/bincounter.h @@ -0,0 +1,48 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef BINCOUNTER_H +#define BINCOUNTER_H + +#include "itemlibrary.h" +#include "logiccomponent.h" +#include "e-bincounter.h" + +class MAINMODULE_EXPORT BinCounter : public LogicComponent, public eBinCounter +{ + Q_OBJECT + Q_PROPERTY( double Input_High_V READ inputHighV WRITE setInputHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Low_V READ inputLowV WRITE setInputLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Imped READ inputImp WRITE setInputImp DESIGNABLE true USER true ) + Q_PROPERTY( double Out_High_V READ outHighV WRITE setOutHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Low_V READ outLowV WRITE setOutLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Imped READ outImp WRITE setOutImp DESIGNABLE true USER true ) + Q_PROPERTY( bool Clock_Inverted READ clockInv WRITE setClockInv DESIGNABLE true USER true ) + Q_PROPERTY( bool Reset_Inverted READ resetInv WRITE setResetInv DESIGNABLE true USER true ) + Q_PROPERTY( int Max_Value READ TopValue WRITE setTopValue DESIGNABLE true USER true ) + + public: + BinCounter( QObject* parent, QString type, QString id ); + ~BinCounter(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); +}; + +#endif diff --git a/src/gui/circuitwidget/components/logic/buffer.cpp b/src/gui/circuitwidget/components/logic/buffer.cpp new file mode 100644 index 0000000..45a7693 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/buffer.cpp @@ -0,0 +1,104 @@ +/*************************************************************************** + * Copyright (C) 2010 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "buffer.h" +#include "itemlibrary.h" + + +Component* Buffer::construct( QObject* parent, QString type, QString id ) +{ + return new Buffer( parent, type, id ); +} + +LibraryItem* Buffer::libraryItem() +{ + return new LibraryItem( + tr( "Buffer" ), + tr( "Logic/Gates" ), + "buffer.png", + "Buffer", + Buffer::construct ); +} + +Buffer::Buffer( QObject* parent, QString type, QString id ) + : Gate( parent, type, id, 1 ) +{ + m_area = QRect( -19, -17, 38, 34 ); + + m_outEnPin = new Pin( 90, QPoint( 0,-12 ), m_id+"-ePin-outEnable", 0, this ); + eLogicDevice::createOutEnablePin( m_outEnPin ); + + setTristate( false ); +} +Buffer::~Buffer(){} + +void Buffer::setTristate( bool t ) +{ + if( !t ) + { + if( m_outEnPin->isConnected() ) + { + m_outEnPin->reset(); + m_outEnPin->connector()->remove(); + } + } + m_outEnPin->setVisible( t ); + m_tristate = t; + eLogicDevice::updateOutEnabled(); +} + +void Buffer::remove() +{ + if( m_tristate ) + if( m_outEnPin->isConnected() ) m_outEnPin->connector()->remove(); + + Gate::remove(); +} + +QPainterPath Buffer::shape() const +{ + QPainterPath path; + + QVector points; + + points << QPointF(-9,-9 ) + << QPointF(-9, 9 ) + << QPointF( 9, 1 ) + << QPointF( 9,-1 ); + + path.addPolygon( QPolygonF(points) ); + path.closeSubpath(); + return path; +} + +void Buffer::paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + Component::paint( p, option, widget ); + + static const QPointF points[4] = { + QPointF( -8,-12 ), + QPointF( -8, 12 ), + QPointF( 16, 1 ), + QPointF( 16, -1 ) }; + + p->drawPolygon( points, 4 ); +} + +#include "moc_buffer.cpp" + diff --git a/src/gui/circuitwidget/components/logic/buffer.h b/src/gui/circuitwidget/components/logic/buffer.h new file mode 100644 index 0000000..4cf5212 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/buffer.h @@ -0,0 +1,54 @@ +/*************************************************************************** + * Copyright (C) 2010 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef BUFFER_H +#define BUFFER_H + +#include "gate.h" +#include "component.h" + +class LibraryItem; + +class MAINMODULE_EXPORT Buffer : public Gate +{ + Q_OBJECT + Q_PROPERTY( bool Tristate READ tristate WRITE setTristate DESIGNABLE true USER true ) + + public: + QRectF boundingRect() const { return m_area; } + + Buffer( QObject* parent, QString type, QString id ); + ~Buffer(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + void setTristate( bool t ); + + virtual QPainterPath shape() const; + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void remove(); + + private: + Pin* m_outEnPin; +}; + +#endif diff --git a/src/gui/circuitwidget/components/logic/bus.cpp b/src/gui/circuitwidget/components/logic/bus.cpp new file mode 100644 index 0000000..eb396b1 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/bus.cpp @@ -0,0 +1,164 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "connector.h" +#include "circuit.h" +#include "bus.h" + +Component* Bus::construct( QObject* parent, QString type, QString id ) +{ + return new Bus( parent, type, id ); +} + +LibraryItem* Bus::libraryItem() +{ + return new LibraryItem( + tr( "Bus" ), + tr( "Logic/Other Logic" ), + "outbus.png", + "Bus", + Bus::construct ); +} + +Bus::Bus( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eBus( id.toStdString() ) +{ + setNumLines( 8 ); // Create Input Pins + + m_busPin = new Pin( 0, QPoint( 8, 0 ), m_id+"-ePin0", 1, this ); + m_busPin->setIsBus( true ); + m_pin[0] = m_busPin; +} +Bus::~Bus(){ +} + +void Bus::setNumLines( int lines ) +{ + if( lines == m_numLines ) return; + if( lines < 1 ) return; + + for( int i=1; i<=m_numLines; i++ ) + { + if( m_pin[i]->isConnected() ) m_pin[i]->connector()->remove(); + if( m_pin[i]->scene() ) Circuit::self()->removeItem( m_pin[i] ); + delete m_pin[i]; + } + m_numLines = lines; + + m_pin.resize( lines+1 ); + + for( int i=1; i<=lines; i++ ) + { + m_pin[i] = new Pin( 180, QPoint(-8,-8*lines+(i-1)*8+8 ) + , m_id+"-ePin"+QString::number(i), i, this ); + } + m_height = lines-1; + m_area = QRect( -2, -m_height*8-4, 4, m_height*8+8 ); + Circuit::self()->update(); +} + +void Bus::initialize() +{ + if( !m_busPin->isConnected() ) return; + + //qDebug() << "\nBus::initialize()" << m_numLines; + + for( int i=1; i<=m_numLines; i++ ) + { + QList epins; + + if( m_pin[i]->isConnected() ) + { + Pin* pin = m_pin[ m_numLines-i+1 ]; + eNode* enode = pin->getEnode(); + + if( enode ) + { + pin->findConnectedPins(); // All connected pins will register in eNode + epins = enode->getSubEpins(); + //foreach( ePin* epin, epins ) epin->setEnode( 0l ); + //pin->setEnode( 0l ); + } + eNode* busEnode = m_busPin->getEnode(); + if( busEnode ) busEnode->addBusPinList( epins, m_startBit+i ); + } + } +} + +void Bus::inStateChanged( int msg ) // Called by m_busPin when removing +{ + if( msg != 3 ) return; // Only accept remove msgs + + for( int i=1; i<=m_numLines; i++ ) + { + QList epins; + + if( m_pin[i]->isConnected() ) + { + Pin* pin = m_pin[i]; + eNode* enode = pin->getEnode(); + + if( enode ) + { + pin->findConnectedPins(); // All connected pins will register in eNode + epins = enode->getSubEpins(); + + eNode* enode = new eNode( m_id+"eNode"+QString::number( i ) ); + foreach( ePin* epin, epins ) epin->setEnode( enode ); + } + } + } +} + +void Bus::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + + if( Circuit::self()->animate() ) + { + QPen pen = p->pen(); + + /*if( m_driving ) + { + pen.setColor( QColor( 200, 50, 50 ) ); + p->setPen(pen); + p->drawLine( 7, 0, 3, 3 ); + p->drawLine( 7, 0, 3,-3 ); + } + else + { + pen.setColor( QColor( 50, 50, 200 ) ); + p->setPen(pen); + p->drawLine( 1, 0, 5, 3 ); + p->drawLine( 1, 0, 5,-3 ); + }*/ + pen.setColor( Qt::black ); + p->setPen(pen); + } + + QPen pen = p->pen(); + pen.setWidth(3); + p->setPen(pen); + + p->drawRect( QRect( 0, -m_height*8, 0, m_height*8 ) ); +} + +#include "moc_bus.cpp" diff --git a/src/gui/circuitwidget/components/logic/bus.h b/src/gui/circuitwidget/components/logic/bus.h new file mode 100644 index 0000000..e87c13c --- /dev/null +++ b/src/gui/circuitwidget/components/logic/bus.h @@ -0,0 +1,54 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef BUS_H +#define BUS_H + +#include "itemlibrary.h" +#include "component.h" +#include "e-bus.h" + +class MAINMODULE_EXPORT Bus : public Component, public eBus +{ + Q_OBJECT + Q_PROPERTY( int Num_Bits READ numLines WRITE setNumLines DESIGNABLE true USER true ) + Q_PROPERTY( int Start_Bit READ startBit WRITE setStartBit DESIGNABLE true USER true ) + + public: + Bus( QObject* parent, QString type, QString id ); + ~Bus(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + void setNumLines( int lines ); + + virtual void initialize(); + void inStateChanged( int msg ); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + protected: + int m_height; + + Pin* m_busPin; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/logic/dac.cpp b/src/gui/circuitwidget/components/logic/dac.cpp new file mode 100644 index 0000000..70206c8 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/dac.cpp @@ -0,0 +1,82 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "dac.h" + +Component* DAC::construct( QObject* parent, QString type, QString id ) +{ + return new DAC( parent, type, id ); +} + +LibraryItem* DAC::libraryItem() +{ + return new LibraryItem( + tr( "DAC" ), + tr( "Logic/Other Logic" ), + "3to1.png", + "DAC", + DAC::construct ); +} + +DAC::DAC( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ) + , eDAC( id.toStdString() ) +{ + m_width = 4; + m_height = 9; + + setNumInps( 8 ); // Create Input Pins + setMaxVolt( 5 ); + + LogicComponent::setNumOuts( 1 ); + + m_outPin[0] = new Pin( 0, QPoint( 24, -8 ), m_id+"-out", 1, this ); + m_outPin[0] ->setLabelText( "Out " ); + m_outPin[0] ->setLabelColor( QColor( 0, 0, 0 ) ); + + eLogicDevice::createOutput( m_outPin[0] ); +} +DAC::~DAC(){ +} + +void DAC::setNumInps( int inputs ) +{ + if( inputs == m_numInputs ) return; + if( inputs < 1 ) return; + + LogicComponent::setNumInps( inputs ); + eLogicDevice::deleteInputs( m_numInputs ); + + for( int i=0; isetLabelText( "D"+num+" " ); + m_inPin[i]->setLabelColor( QColor( 0, 0, 0 ) ); + + eLogicDevice::createInput( m_inPin[i] ); + } + m_maxAddr = pow( 2, m_numInputs )-1; + + m_height = inputs+1; + m_area = QRect( -(m_width/2)*8, -m_height*8+8, m_width*8, m_height*8 ); +} + +#include "moc_dac.cpp" diff --git a/src/gui/circuitwidget/components/logic/dac.h b/src/gui/circuitwidget/components/logic/dac.h new file mode 100644 index 0000000..78b9286 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/dac.h @@ -0,0 +1,48 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef DAC_H +#define DAC_H + +#include "itemlibrary.h" +#include "logiccomponent.h" +#include "e-dac.h" + +class MAINMODULE_EXPORT DAC : public LogicComponent, public eDAC +{ + Q_OBJECT + Q_PROPERTY( double Input_High_V READ inputHighV WRITE setInputHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Low_V READ inputLowV WRITE setInputLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Imped READ inputImp WRITE setInputImp DESIGNABLE true USER true ) + Q_PROPERTY( double Vref READ maxVolt WRITE setMaxVolt DESIGNABLE true USER true ) + Q_PROPERTY( int Num_Bits READ numInps WRITE setNumInps DESIGNABLE true USER true ) + + public: + DAC( QObject* parent, QString type, QString id ); + ~DAC(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual void setNumInps( int inputs ); + + protected: +}; + +#endif diff --git a/src/gui/circuitwidget/components/logic/dectobcd.cpp b/src/gui/circuitwidget/components/logic/dectobcd.cpp new file mode 100644 index 0000000..cdafd84 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/dectobcd.cpp @@ -0,0 +1,81 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "dectobcd.h" + + +Component* DecToBcd::construct( QObject* parent, QString type, QString id ) +{ + return new DecToBcd( parent, type, id ); +} + +LibraryItem* DecToBcd::libraryItem() +{ + return new LibraryItem( + tr( "Dec. To Bcd" ), + tr( "Logic/Converters" ), + "3to2g.png", + "DecToBcd", + DecToBcd::construct ); +} + +DecToBcd::DecToBcd( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ), eDecToBcd( id.toStdString() ) +{ + m_width = 4; + m_height = 10; + + QStringList pinList; + + pinList // Inputs: + << "IL01 D1" + << "IL02 D2" + << "IL03 D3" + << "IL04 D4" + << "IL05 D5" + << "IL06 D6" + << "IL07 D7" + << "IL08 D8" + << "IL09 D9" + + << "IU03OE " + + // Outputs: + << "OR03A " + << "OR04B " + << "OR05C " + << "OR06D " + ; + init( pinList ); + + eLogicDevice::createOutEnablePin( m_inPin[9] ); // IOutput Enable + + for( int i=0; i<9; i++ ) + { + eLogicDevice::createInput( m_inPin[i] ); + } + + for( int i=0; i<4; i++ ) + { + eLogicDevice::createOutput( m_outPin[i] ); + } +} +DecToBcd::~DecToBcd(){} + +#include "moc_dectobcd.cpp" diff --git a/src/gui/circuitwidget/components/logic/dectobcd.h b/src/gui/circuitwidget/components/logic/dectobcd.h new file mode 100644 index 0000000..3325606 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/dectobcd.h @@ -0,0 +1,50 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef DECTOBCD_H +#define DECTOBCD_H + +#include "e-dectobcd.h" +#include "itemlibrary.h" +#include "logiccomponent.h" + +class MAINMODULE_EXPORT DecToBcd : public LogicComponent, public eDecToBcd +{ + Q_OBJECT + Q_PROPERTY( double Input_High_V READ inputHighV WRITE setInputHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Low_V READ inputLowV WRITE setInputLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Imped READ inputImp WRITE setInputImp DESIGNABLE true USER true ) + Q_PROPERTY( double Out_High_V READ outHighV WRITE setOutHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Low_V READ outLowV WRITE setOutLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Imped READ outImp WRITE setOutImp DESIGNABLE true USER true ) + Q_PROPERTY( bool Invert_Inputs READ invertInps WRITE setInvertInps DESIGNABLE true USER true ) + Q_PROPERTY( bool Tristate READ tristate USER true ) + + public: + DecToBcd( QObject* parent, QString type, QString id ); + ~DecToBcd(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + bool tristate() { return true; } +}; + +#endif + diff --git a/src/gui/circuitwidget/components/logic/demux.cpp b/src/gui/circuitwidget/components/logic/demux.cpp new file mode 100644 index 0000000..303faeb --- /dev/null +++ b/src/gui/circuitwidget/components/logic/demux.cpp @@ -0,0 +1,108 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "demux.h" + + +Component* Demux::construct( QObject* parent, QString type, QString id ) +{ + return new Demux( parent, type, id ); +} + +LibraryItem* Demux::libraryItem() +{ + return new LibraryItem( + tr( "Demux" ), + tr( "Logic/Converters" ), + "demux.png", + "Demux", + Demux::construct ); +} + +Demux::Demux( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ), eDemux( id.toStdString() ) +{ + m_width = 4; + m_height = 10; + + QStringList pinList; + + pinList // Inputs: + + << "ID03S0" + << "ID02 S1" + << "ID01 S2" + + << "IL05 DI" + + << "IU01OE " + + // Outputs: + << "OR01O0 " + << "OR02O1 " + << "OR03O2 " + << "OR04O3 " + << "OR05O4 " + << "OR06O5 " + << "OR07O6 " + << "OR08O7 " + ; + init( pinList ); + m_area = QRect( -(m_width/2)*8-1, -(m_height/2)*8-8-1, m_width*8+2, m_height*8+16+2 ); + + eLogicDevice::createOutEnablePin( m_inPin[4] ); // IOutput Enable + + for( int i=0; i<4; i++ ) + eLogicDevice::createInput( m_inPin[i] ); + + for( int i=0; i<8; i++ ) + eLogicDevice::createOutput( m_outPin[i] ); +} +Demux::~Demux(){} + +QPainterPath Demux::shape() const +{ + QPainterPath path; + + QVector points; + + points << QPointF(-(m_width/2)*8,-(m_height/2)*8+2 ) + << QPointF(-(m_width/2)*8, (m_height/2)*8-2 ) + << QPointF( (m_width/2)*8, (m_height/2)*8+6 ) + << QPointF( (m_width/2)*8,-(m_height/2)*8-6 ); + + path.addPolygon( QPolygonF(points) ); + path.closeSubpath(); + return path; +} + +void Demux::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + static const QPointF points[4] = { + QPointF(-(m_width/2)*8,-(m_height/2)*8+2 ), + QPointF(-(m_width/2)*8, (m_height/2)*8-2 ), + QPointF( (m_width/2)*8, (m_height/2)*8+6 ), + QPointF( (m_width/2)*8,-(m_height/2)*8-6 )}; + + p->drawPolygon(points, 4); +} + +#include "moc_demux.cpp" diff --git a/src/gui/circuitwidget/components/logic/demux.h b/src/gui/circuitwidget/components/logic/demux.h new file mode 100644 index 0000000..36f98b8 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/demux.h @@ -0,0 +1,53 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef DEMUX_H +#define DEMUX_H + +#include "e-demux.h" +#include "itemlibrary.h" +#include "logiccomponent.h" + +class MAINMODULE_EXPORT Demux : public LogicComponent, public eDemux +{ + Q_OBJECT + Q_PROPERTY( double Input_High_V READ inputHighV WRITE setInputHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Low_V READ inputLowV WRITE setInputLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Imped READ inputImp WRITE setInputImp DESIGNABLE true USER true ) + Q_PROPERTY( double Out_High_V READ outHighV WRITE setOutHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Low_V READ outLowV WRITE setOutLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Imped READ outImp WRITE setOutImp DESIGNABLE true USER true ) + Q_PROPERTY( bool Inverted READ inverted WRITE setInverted DESIGNABLE true USER true ) + Q_PROPERTY( bool Tristate READ tristate USER true ) + + public: + Demux( QObject* parent, QString type, QString id ); + ~Demux(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + bool tristate() { return true; } + + virtual QPainterPath shape() const; + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); +}; + +#endif + diff --git a/src/gui/circuitwidget/components/logic/flipflopd.cpp b/src/gui/circuitwidget/components/logic/flipflopd.cpp new file mode 100644 index 0000000..e982ef3 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/flipflopd.cpp @@ -0,0 +1,76 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "flipflopd.h" +#include "pin.h" + + +Component* FlipFlopD::construct( QObject* parent, QString type, QString id ) +{ + return new FlipFlopD( parent, type, id ); +} + +LibraryItem* FlipFlopD::libraryItem() +{ + return new LibraryItem( + tr( "FlipFlop D" ), + tr( "Logic/Memory" ), + "2to2.png", + "FlipFlopD", + FlipFlopD::construct ); +} + +FlipFlopD::FlipFlopD( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ) + , eFlipFlopD( id.toStdString() ) +{ + m_width = 4; + m_height = 4; + + QStringList pinList; + + pinList // Inputs: + << "IL01 D" + << "IU02S" + << "ID02R" + << "IL03>" + + // Outputs: + << "OR01Q " + << "OR03!Q " + ; + init( pinList ); + + eLogicDevice::createInput( m_inPin[0] ); // Input D + eLogicDevice::createInput( m_inPin[1] ); // Input S + eLogicDevice::createInput( m_inPin[2] ); // Input R + + eLogicDevice::createClockPin( m_inPin[3] ); // Input Clock + + eLogicDevice::createOutput( m_outPin[0] ); // Output Q + eLogicDevice::createOutput( m_outPin[1] ); // Output Q' + + setSrInv( true ); // Inver Set & Reset pins + setClockInv( false ); //Don't Invert Clock pin + +} +FlipFlopD::~FlipFlopD(){} + + +#include "moc_flipflopd.cpp" diff --git a/src/gui/circuitwidget/components/logic/flipflopd.h b/src/gui/circuitwidget/components/logic/flipflopd.h new file mode 100644 index 0000000..4f1b7bc --- /dev/null +++ b/src/gui/circuitwidget/components/logic/flipflopd.h @@ -0,0 +1,49 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef FLIPFLOPD_H +#define FLIPFLOPD_H + +#include "e-flipflopd.h" +#include "itemlibrary.h" +#include "logiccomponent.h" + +class MAINMODULE_EXPORT FlipFlopD : public LogicComponent, public eFlipFlopD +{ + Q_OBJECT + Q_PROPERTY( double Input_High_V READ inputHighV WRITE setInputHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Low_V READ inputLowV WRITE setInputLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Imped READ inputImp WRITE setInputImp DESIGNABLE true USER true ) + Q_PROPERTY( double Out_High_V READ outHighV WRITE setOutHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Low_V READ outLowV WRITE setOutLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Imped READ outImp WRITE setOutImp DESIGNABLE true USER true ) + + Q_PROPERTY( bool Clock_Inverted READ clockInv WRITE setClockInv DESIGNABLE true USER true ) + Q_PROPERTY( bool S_R_Inverted READ srInv WRITE setSrInv DESIGNABLE true USER true ) + + public: + FlipFlopD( QObject* parent, QString type, QString id ); + ~FlipFlopD(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); +}; + +#endif + diff --git a/src/gui/circuitwidget/components/logic/flipflopjk.cpp b/src/gui/circuitwidget/components/logic/flipflopjk.cpp new file mode 100755 index 0000000..5d3c028 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/flipflopjk.cpp @@ -0,0 +1,82 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "flipflopjk.h" +#include "pin.h" + + +Component* FlipFlopJK::construct( QObject* parent, QString type, QString id ) +{ + return new FlipFlopJK( parent, type, id ); +} + +LibraryItem* FlipFlopJK::libraryItem() +{ + return new LibraryItem( + tr( "FlipFlop JK" ), + tr( "Logic/Memory" ), + "3to2.png", + "FlipFlopJK", + FlipFlopJK::construct ); +} + +FlipFlopJK::FlipFlopJK( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ) + , eFlipFlopJK( id.toStdString() ) +{ + m_width = 4; + m_height = 6; + + QStringList pinList; + + pinList // Inputs: + << "IL01 J" + << "IL05 K" + << "IU02S" + << "ID02R" + << "IL03>" + + // Outputs: + << "OR01Q " + << "OR05!Q " + ; + init( pinList ); + + eLogicDevice::createInput( m_inPin[0] ); // Input J + + eLogicDevice::createInput( m_inPin[1] ); // Input K + + eLogicDevice::createInput( m_inPin[2] ); // Input S + + eLogicDevice::createInput( m_inPin[3] ); // Input R + + eLogicDevice::createClockPin( m_inPin[4] ); // Input Clock + + eLogicDevice::createOutput( m_outPin[0] ); // Output Q + + eLogicDevice::createOutput( m_outPin[1] ); // Output Q' + + setSrInv( true ); // Invert Set & Reset pins + setClockInv( false ); //Don't Invert Clock pin + +} +FlipFlopJK::~FlipFlopJK(){} + + +#include "moc_flipflopjk.cpp" diff --git a/src/gui/circuitwidget/components/logic/flipflopjk.h b/src/gui/circuitwidget/components/logic/flipflopjk.h new file mode 100755 index 0000000..fc62a9a --- /dev/null +++ b/src/gui/circuitwidget/components/logic/flipflopjk.h @@ -0,0 +1,49 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef FLIPFLOPJK_H +#define FLIPFLOPJK_H + +#include "e-flipflopjk.h" +#include "itemlibrary.h" +#include "logiccomponent.h" + +class MAINMODULE_EXPORT FlipFlopJK : public LogicComponent, public eFlipFlopJK +{ + Q_OBJECT + Q_PROPERTY( double Input_High_V READ inputHighV WRITE setInputHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Low_V READ inputLowV WRITE setInputLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Imped READ inputImp WRITE setInputImp DESIGNABLE true USER true ) + Q_PROPERTY( double Out_High_V READ outHighV WRITE setOutHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Low_V READ outLowV WRITE setOutLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Imped READ outImp WRITE setOutImp DESIGNABLE true USER true ) + + Q_PROPERTY( bool Clock_Inverted READ clockInv WRITE setClockInv DESIGNABLE true USER true ) + Q_PROPERTY( bool S_R_Inverted READ srInv WRITE setSrInv DESIGNABLE true USER true ) + + public: + FlipFlopJK( QObject* parent, QString type, QString id ); + ~FlipFlopJK(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); +}; + +#endif + diff --git a/src/gui/circuitwidget/components/logic/fulladder.cpp b/src/gui/circuitwidget/components/logic/fulladder.cpp new file mode 100644 index 0000000..e103adc --- /dev/null +++ b/src/gui/circuitwidget/components/logic/fulladder.cpp @@ -0,0 +1,66 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "fulladder.h" + +Component* FullAdder::construct(QObject *parent, QString type, QString id) +{ + return new FullAdder(parent, type, id); +} + +LibraryItem* FullAdder::libraryItem() +{ + return new LibraryItem( + tr( "Full Adder" ), + tr ("Logic/Arithmetic"), + "2to2.png", + "FullAdder", + FullAdder::construct ); +} + +FullAdder::FullAdder(QObject *parent, QString type, QString id) + : LogicComponent( parent, type, id ), eFullAdder( id.toStdString() ) +{ + m_width = 4; + m_height = 4; + + QStringList pinList; + pinList + << "IU01 A" + << "IU03 B" + + << "ID03 Ci " + + // Outputs: + + << "OD02 S" + << "OD01 Co" + ; + init( pinList ); + + for( int i=0; i. * + * * + ***************************************************************************/ + +#ifndef FULLADDER_H +#define FULLADDER_H + +#include "itemlibrary.h" +#include "logiccomponent.h" +#include "e-fulladder.h" + +class MAINMODULE_EXPORT FullAdder : public LogicComponent, public eFullAdder +{ + Q_OBJECT + Q_PROPERTY( double Input_High_V READ inputHighV WRITE setInputHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Low_V READ inputLowV WRITE setInputLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Imped READ inputImp WRITE setInputImp DESIGNABLE true USER true ) + Q_PROPERTY( double Out_High_V READ outHighV WRITE setOutHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Low_V READ outLowV WRITE setOutLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Imped READ outImp WRITE setOutImp DESIGNABLE true USER true ) + + public: + FullAdder( QObject* parent, QString type, QString id ); + ~FullAdder(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); +}; + +#endif diff --git a/src/gui/circuitwidget/components/logic/function.cpp b/src/gui/circuitwidget/components/logic/function.cpp new file mode 100644 index 0000000..bb65a02 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/function.cpp @@ -0,0 +1,192 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "function.h" +#include "connector.h" +#include "circuit.h" +#include "itemlibrary.h" + +static const char* Function_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Functions") +}; + +Component* Function::construct( QObject* parent, QString type, QString id ) +{ + return new Function( parent, type, id ); +} + +LibraryItem* Function::libraryItem() +{ + return new LibraryItem( + tr( "Function" ), + tr( "Logic/Arithmetic" ), + "subc.png", + "Function", + Function::construct ); +} + +Function::Function( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ) + , eFunction( id.toStdString() ) +{ + Q_UNUSED( Function_properties ); + + setNumInps( 2 ); // Create Input Pins + setNumOuts( 1 ); + + setFunctions( "i0 | i1" ); + + //Simulator::self()->addToUpdateList( this ); +} +Function::~Function(){ +} + +void Function::remove() +{ + foreach( QPushButton* button, m_buttons ) + { + m_buttons.removeOne( button ); + delete button; + } + LogicComponent::remove(); +} + +void Function::setNumInps( int inputs ) +{ + if( inputs == m_numInputs ) return; + if( inputs < 1 ) return; + + if( inputs < m_numInputs ) + { + int dif = m_numInputs-inputs; + + eLogicDevice::deleteInputs( dif ); + LogicComponent::deleteInputs( dif ); + } + else + { + m_inPin.resize( inputs ); + m_numInPins = inputs; + + for( int i=m_numInputs; isetLabelText( " I"+num ); + m_inPin[i]->setLabelColor( QColor( 0, 0, 0 ) ); + + eLogicDevice::createInput( m_inPin[i] ); + } + } + m_height = m_numOutputs*2-1; + if( m_numInputs > m_height ) m_height = m_numInputs; + m_area = QRect( -16, 0, 32, 8*m_height+8 ); + + Circuit::self()->update(); +} + +void Function::setNumOuts( int outs ) +{ + if( outs == m_numOutputs ) return; + if( outs < 1 ) return; + + if( outs < m_numOutputs ) + { + int dif = m_numOutputs-outs; + + eLogicDevice::deleteOutputs( dif ); + LogicComponent::deleteOutputs( dif ); + + for( int i=0; isetMaximumSize( 14,14 ); + button->setGeometry(-14,-14,14,14); + QFont font = button->font(); + font.setPixelSize(7); + button->setFont(font); + button->setText( "O"+num ); + button->setCheckable( true ); + m_buttons.append( button ); + + QGraphicsProxyWidget* proxy = Circuit::self()->addWidget( button ); + proxy->setParentItem( this ); + proxy->setPos( QPoint( 0, i*8*2+1 ) ); + + m_proxys.append( proxy ); + m_funcList.append( "" ); + + connect( button, SIGNAL( released() ), this, SLOT ( onbuttonclicked() )); + } + } + m_height = m_numOutputs*2-1; + if( m_numInputs > m_height ) m_height = m_numInputs; + m_area = QRect( -16, 0, 32, 8*m_height+8 ); + + m_functions = m_funcList.join(","); + + Circuit::self()->update(); +} + +void Function::onbuttonclicked() +{ + int i = 0; + foreach( QPushButton* button, m_buttons ) + { + if( button->isChecked() ) + { + button->setChecked( false ); + break; + } + i++; + } + bool ok; + QString text = QInputDialog::getText(0l, tr("Set Function"), + "Output "+QString::number(i)+tr(" Function:"), + QLineEdit::Normal, + m_funcList[i], &ok); + if( ok && !text.isEmpty() ) + { + m_funcList[i] = text; + m_functions = m_funcList.join(","); + } +} + +#include "moc_function.cpp" diff --git a/src/gui/circuitwidget/components/logic/function.h b/src/gui/circuitwidget/components/logic/function.h new file mode 100644 index 0000000..091a885 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/function.h @@ -0,0 +1,63 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef FUNCTION_H +#define FUNCTION_H + +#include "e-function.h" +#include "logiccomponent.h" + +class LibraryItem; + +class MAINMODULE_EXPORT Function : public LogicComponent, public eFunction +{ + Q_OBJECT + Q_PROPERTY( double Input_High_V READ inputHighV WRITE setInputHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Low_V READ inputLowV WRITE setInputLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Imped READ inputImp WRITE setInputImp DESIGNABLE true USER true ) + Q_PROPERTY( double Out_High_V READ outHighV WRITE setOutHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Low_V READ outLowV WRITE setOutLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Imped READ outImp WRITE setOutImp DESIGNABLE true USER true ) + Q_PROPERTY( bool Inverted READ inverted WRITE setInverted DESIGNABLE true USER true ) + Q_PROPERTY( int Num_Inputs READ numInps WRITE setNumInps DESIGNABLE true USER true ) + Q_PROPERTY( int Num_Outputs READ numOuts WRITE setNumOuts DESIGNABLE true USER true ) + Q_PROPERTY( QString Functions READ functions WRITE setFunctions DESIGNABLE true USER true ) + + + public: + + Function( QObject* parent, QString type, QString id ); + ~Function(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem* libraryItem(); + + void setNumInps( int inputs ); + void setNumOuts( int outs ); + + public slots: + virtual void remove(); + void onbuttonclicked(); + + private: + QList m_buttons; + QList m_proxys; +}; + +#endif diff --git a/src/gui/circuitwidget/components/logic/gate.cpp b/src/gui/circuitwidget/components/logic/gate.cpp new file mode 100644 index 0000000..26c3164 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/gate.cpp @@ -0,0 +1,84 @@ +/*************************************************************************** + * Copyright (C) 2010 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "connector.h" +#include "circuit.h" +#include "gate.h" + + +Gate::Gate( QObject* parent, QString type, QString id, int inputs ) + : Component( parent, type, id ) + , eGate( id.toStdString(), 0 ) +{ + setNumInps( inputs ); // Create Input Pins + + m_outputPin = new Pin( 0, QPoint( 16+8,-8+0*16+8 ) + , m_id+"-out", 1, this ); + + eLogicDevice::createOutput( m_outputPin ); +} +Gate::~Gate(){ +} + +void Gate::remove() +{ + for( int i=0; iisConnected() ) m_inputPin[i]->connector()->remove(); + + if( m_outputPin->isConnected() ) m_outputPin->connector()->remove(); + + Component::remove(); +} + +void Gate::setNumInps( int inputs ) +{ + if( inputs == m_numInputs ) return; + if( inputs < 1 ) return; + + for( int i=0; iisConnected() ) pin->connector()->remove(); + if( pin->scene() ) Circuit::self()->removeItem( pin ); + pin->reset(); + delete pin; + } + eLogicDevice::deleteInputs( m_numInputs ); + + m_inputPin.resize( inputs ); + + for( int i=0; iupdate(); +} + +void Gate::setInverted( bool inverted ) +{ + eLogicDevice::setInverted( inverted ); + Circuit::self()->update(); +} + +#include "moc_gate.cpp" diff --git a/src/gui/circuitwidget/components/logic/gate.h b/src/gui/circuitwidget/components/logic/gate.h new file mode 100644 index 0000000..a866d35 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/gate.h @@ -0,0 +1,59 @@ +/*************************************************************************** + * Copyright (C) 2010 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef GATE_H +#define GATE_H + +#include "e-gate.h" +#include "component.h" +#include "pin.h" + +class MAINMODULE_EXPORT Gate : public Component, public eGate +{ + Q_OBJECT + //Q_PROPERTY( int Num_Inputs READ numInps WRITE setNumInps DESIGNABLE true USER true ) + Q_PROPERTY( double Input_High_V READ inputHighV WRITE setInputHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Low_V READ inputLowV WRITE setInputLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Imped READ inputImp WRITE setInputImp DESIGNABLE true USER true ) + Q_PROPERTY( double Out_High_V READ outHighV WRITE setOutHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Low_V READ outLowV WRITE setOutLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Imped READ outImp WRITE setOutImp DESIGNABLE true USER true ) + Q_PROPERTY( bool Inverted READ inverted WRITE setInverted DESIGNABLE true USER true ) + Q_PROPERTY( bool Open_Collector READ openCol WRITE setOpenCol DESIGNABLE true USER true ) + + + public: + QRectF boundingRect() const { return QRect( -20, -8*m_numInputs-2, 40, 8*2*m_numInputs+4 ); } + + Gate( QObject* parent, QString type, QString id, int inputs ); + ~Gate(); + + virtual void setNumInps( int inputs ); + + void setInverted( bool inverted ); + + public slots: + virtual void remove(); + + protected: + std::vector m_inputPin; + Pin* m_outputPin; +}; + +#endif diff --git a/src/gui/circuitwidget/components/logic/gate_and.cpp b/src/gui/circuitwidget/components/logic/gate_and.cpp new file mode 100644 index 0000000..8eb3a6d --- /dev/null +++ b/src/gui/circuitwidget/components/logic/gate_and.cpp @@ -0,0 +1,75 @@ +/*************************************************************************** + * Copyright (C) 2010 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "gate_and.h" +#include "itemlibrary.h" + +Component* AndGate::construct( QObject* parent, QString type, QString id ) +{ + return new AndGate( parent, type, id ); +} + +LibraryItem* AndGate::libraryItem() +{ + return new LibraryItem( + tr( "And Gate" ), + tr( "Logic/Gates" ), + "andgate.png", + "And Gate", + AndGate::construct ); +} + +AndGate::AndGate( QObject* parent, QString type, QString id ) + : Gate( parent, type, id, 2 ) +{ +} +AndGate::~AndGate(){} + +QPainterPath AndGate::shape() const +{ + QPainterPath path; + + QVector points; + + int size = m_numInputs*8; + + points << QPointF( -9,-size ) + << QPointF( -9, size ) + << QPointF( 0, size-2 ) + << QPointF( 16, 8 ) + << QPointF( 16,-8 ) + << QPointF( 0,-size+2 ); + + path.addPolygon( QPolygonF(points) ); + path.closeSubpath(); + return path; +} + +void AndGate::paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + Component::paint( p, option, widget ); + + QPen pen = p->pen(); + pen.setWidth( 2 ); + p->setPen( pen ); + + p->drawChord( -36, m_area.y()+2, 53, m_area.height()-4, -1440/*-16*90*/, 2880/*16*180*/ ); +} + +#include "moc_gate_and.cpp" diff --git a/src/gui/circuitwidget/components/logic/gate_and.h b/src/gui/circuitwidget/components/logic/gate_and.h new file mode 100644 index 0000000..933d72e --- /dev/null +++ b/src/gui/circuitwidget/components/logic/gate_and.h @@ -0,0 +1,49 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef ANDGATE_H +#define ANDGATE_H + +#include "gate.h" +#include "component.h" + +//#include + +class LibraryItem; + +class MAINMODULE_EXPORT AndGate : public Gate +{ + Q_OBJECT + Q_PROPERTY( int Num_Inputs READ numInps WRITE setNumInps DESIGNABLE true USER true ) + + public: + + AndGate( QObject* parent, QString type, QString id ); + ~AndGate(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual QPainterPath shape() const; + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); +}; + + +#endif + diff --git a/src/gui/circuitwidget/components/logic/gate_or.cpp b/src/gui/circuitwidget/components/logic/gate_or.cpp new file mode 100644 index 0000000..2ef0afe --- /dev/null +++ b/src/gui/circuitwidget/components/logic/gate_or.cpp @@ -0,0 +1,110 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ +#include "gate_or.h" +#include "itemlibrary.h" + + +Component* OrGate::construct( QObject* parent, QString type, QString id ) +{ + return new OrGate( parent, type, id ); +} + +LibraryItem* OrGate::libraryItem() +{ + return new LibraryItem( + tr( "Or Gate" ), + tr( "Logic/Gates" ), + "orgate.png", + "Or Gate", + OrGate::construct ); +} + +OrGate::OrGate( QObject* parent, QString type, QString id ) + : Gate( parent, type, id, 2 ) +{ +} +OrGate::~OrGate(){} + +bool OrGate::calcOutput( int inputs ) +{ + if( inputs > 0 ) return true; + + return false; +} + +QPainterPath OrGate::shape() const +{ + QPainterPath path; + + QVector points; + + int size = m_numInputs*8; + + points << QPointF(-14,-size+2 ) + << QPointF(-9,-8 ) + << QPointF(-9, 8 ) + << QPointF(-14, size+2 ) + << QPointF( 0, size ) + << QPointF( 16, 8 ) + << QPointF( 16,-8 ) + << QPointF( 0,-size ); + + path.addPolygon( QPolygonF(points) ); + path.closeSubpath(); + return path; +} + +void OrGate::paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + int y_orig = m_area.y()+2; + int height = m_area.height()-4; + + // Paint white background of gate + Component::paint( p, option, widget ); + QPen pen = p->pen(); + + p->setPen( Qt::NoPen ); + + QPainterPath path; + + path.moveTo( -8, 0 ); + path.arcTo( -39, y_orig, 56, height, -90, 180 ); + + path.moveTo( -8, 0 ); + path.arcTo( -15.5, y_orig, 9, height, -90, 180 ); + + p->drawPath( path ); + + // Draw curves + + pen.setWidth( 2 ); + p->setPen( pen ); + + p->setBrush( Qt::NoBrush ); + + // Output side arc + p->drawArc( -37, y_orig, 54, height, -1520/*-16*95*/, 3040/*16*190*/ ); + + // Input side arc + p->drawArc( -16, y_orig, 9, height, -1440/*-16*90*/, 2880/*16*180*/ ); +} + +#include "moc_gate_or.cpp" + + diff --git a/src/gui/circuitwidget/components/logic/gate_or.h b/src/gui/circuitwidget/components/logic/gate_or.h new file mode 100644 index 0000000..82a23e1 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/gate_or.h @@ -0,0 +1,51 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef ORGATE_H +#define ORGATE_H + +#include "gate.h" +#include "component.h" + +#include + +class LibraryItem; + +class MAINMODULE_EXPORT OrGate : public Gate +{ + Q_OBJECT + Q_PROPERTY( int Num_Inputs READ numInps WRITE setNumInps DESIGNABLE true USER true ) + + public: + + OrGate( QObject* parent, QString type, QString id ); + ~OrGate(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual QPainterPath shape() const; + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + protected: + virtual bool calcOutput( int inputs ); +}; + + +#endif diff --git a/src/gui/circuitwidget/components/logic/gate_xor.cpp b/src/gui/circuitwidget/components/logic/gate_xor.cpp new file mode 100644 index 0000000..de990a4 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/gate_xor.cpp @@ -0,0 +1,112 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "gate_xor.h" +#include "itemlibrary.h" + + +Component* XorGate::construct( QObject* parent, QString type, QString id ) +{ + return new XorGate( parent, type, id ); +} + +LibraryItem* XorGate::libraryItem() +{ + return new LibraryItem( + tr( "Xor Gate" ), + tr( "Logic/Gates" ), + "xorgate.png", + "Xor Gate", + XorGate::construct ); +} + +XorGate::XorGate( QObject* parent, QString type, QString id ) + : Gate( parent, type, id, 2 ) +{ +} +XorGate::~XorGate(){} + +bool XorGate::calcOutput( int inputs ) +{ + if( inputs == 1 ) return true; + + return false; +} + +QPainterPath XorGate::shape() const +{ + QPainterPath path; + + QVector points; + + int size = m_numInputs*8; + + points << QPointF(-15,-size+2 ) + << QPointF( -9,-8 ) + << QPointF( -9, 8 ) + << QPointF(-15, size+2 ) + << QPointF( 0, size ) + << QPointF( 16, 8 ) + << QPointF( 16,-8 ) + << QPointF( 0,-size ); + + path.addPolygon( QPolygonF(points) ); + path.closeSubpath(); + return path; +} + +void XorGate::paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + int y_orig = m_area.y()+2; + int height = m_area.height()-4; + + // Paint white background of gate + Component::paint( p, option, widget ); + QPen pen = p->pen(); + + p->setPen( Qt::NoPen ); + + QPainterPath path; + path.moveTo( -8, 0 ); + path.arcTo( -32, y_orig, 50, height, -90, 180 ); + + path.moveTo( -8, 0 ); + path.arcTo( -12, y_orig, 10, height, -90, 180 ); + + p->drawPath( path ); + + // Draw curves + pen.setWidth( 2 ); + p->setPen( pen ); + + p->setBrush( Qt::NoBrush ); + + // Output side arc + p->drawArc( -27, y_orig, 44, height, -1520/*-16*95*/, 3040/*16*190*/ ); + + // Input side arc + p->drawArc( -12, y_orig, 10, height, -1440/*-16*90*/, 2880/*16*180*/ ); + + // Input side arc close to pins + p->drawArc( -16, y_orig, 9, height, -1440/*-16*90*/, 2880/*16*180*/ ); +} + +#include "moc_gate_xor.cpp" + + diff --git a/src/gui/circuitwidget/components/logic/gate_xor.h b/src/gui/circuitwidget/components/logic/gate_xor.h new file mode 100644 index 0000000..4e88285 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/gate_xor.h @@ -0,0 +1,50 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef XORGATE_H +#define XORGATE_H + +#include "gate.h" +#include "component.h" + +#include + +class LibraryItem; + +class MAINMODULE_EXPORT XorGate : public Gate +{ + Q_OBJECT + + public: + + XorGate( QObject* parent, QString type, QString id ); + ~XorGate(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual QPainterPath shape() const; + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + protected: + virtual bool calcOutput( int inputs ); +}; + + +#endif diff --git a/src/gui/circuitwidget/components/logic/i2cram.cpp b/src/gui/circuitwidget/components/logic/i2cram.cpp new file mode 100644 index 0000000..c7e38ec --- /dev/null +++ b/src/gui/circuitwidget/components/logic/i2cram.cpp @@ -0,0 +1,251 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "i2cram.h" +#include "pin.h" + +static const char* I2CRam_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Control Code"), + QT_TRANSLATE_NOOP("App::Property","Size bytes") +}; + +Component* I2CRam::construct( QObject* parent, QString type, QString id ) +{ + return new I2CRam( parent, type, id ); +} + +LibraryItem* I2CRam::libraryItem() +{ + return new LibraryItem( + tr( "I2C Ram" ), + tr( "Logic/Memory" ), + "2to3.png", + "I2CRam", + I2CRam::construct ); +} + +I2CRam::I2CRam( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ) + , eI2C( id.toStdString() ) + , MemData() +{ + Q_UNUSED( I2CRam_properties ); + + m_width = 4; + m_height = 4; + + QStringList pinList; // Create Pin List + + pinList // Inputs: + << "IL01 SDA"//type: Input, side: Left, pos: 01, label: "SDA" + << "IL03 SCL" + << "IR01 A0" + << "IR02 A1" + << "IR03 A2" + // Outputs: + ; + init( pinList ); // Create Pins Defined in pinList + + eLogicDevice::createInput( m_inPin[0] ); // Input SDA + eLogicDevice::createClockPin( m_inPin[1] ); // Input SCL + + eLogicDevice::createInput( m_inPin[2] ); // Input A0 + eLogicDevice::createInput( m_inPin[3] ); // Input A1 + eLogicDevice::createInput( m_inPin[4] ); // Input A2 + + m_cCode = 0b01010000; + m_size = 65536; + m_ram.resize( m_size ); + + m_persistent = false; + + resetState(); +} +I2CRam::~I2CRam(){} + +void I2CRam::initialize() // Called at Simulation Start +{ + eI2C::initialize(); + + for( int i=2; i<5; i++ ) // Initialize address pins + { + eNode* enode = m_inPin[i]->getEnode(); + if( enode ) enode->addToChangedFast( this ); + } +} + +void I2CRam::resetState() +{ + eI2C::resetState(); + + m_addrPtr = 0; + m_phase = 3; +} + +void I2CRam::setVChanged() // Some Pin Changed State, Manage it +{ + bool A0 = eLogicDevice::getInputState( 1 ); + bool A1 = eLogicDevice::getInputState( 2 ); + bool A2 = eLogicDevice::getInputState( 3 ); + + int address = m_cCode; + if( A0 ) address += 1; + if( A1 ) address += 2; + if( A2 ) address += 4; + + m_address = address; + + eI2C::setVChanged(); // Run I2C Engine + + //qDebug() <<"I2CRam::setVChanged " << m_state ; + + if( m_state == I2C_STARTED ) + { + if( m_size > 256 ) m_phase = 0; + else m_phase = 1; + } + if( m_state == I2C_STOPPED ) m_phase = 3; +} + +void I2CRam::readByte() // Write to RAM +{ + if( m_phase == 0 ) + { + m_phase++; + m_addrPtr = m_rxReg<<8; + } + else if( m_phase == 1 ) + { + m_phase++; + + if( m_size > 256 ) m_addrPtr += m_rxReg; + else m_addrPtr = m_rxReg; + + //while( m_addrPtr >= m_size ) m_addrPtr -= m_size; + } + else + { + while( m_addrPtr >= m_size ) m_addrPtr -= m_size; + //qDebug() << "I2CRam::readByte Address:"<= m_size ) m_addrPtr = 0; + } + eI2C::readByte(); +} + +void I2CRam::writeByte() // Read from RAM +{ + while( m_addrPtr >= m_size ) m_addrPtr -= m_size; + //qDebug() << "I2CRam::writeByte Address:"<= m_size ) m_addrPtr = 0; + + eI2C::writeByte(); +} + +void I2CRam::setMem( QVector m ) +{ + if( m.size() == 1 ) return; // Avoid loading data if not saved + m_ram = m; +} + +QVector I2CRam::mem() +{ + if( !m_persistent ) + { + QVector null; + return null; + } + //qDebug() << m_ram.size() <<"Ram:\n" << m_ram; + return m_ram; +} + +int I2CRam::cCode() +{ + return m_cCode; +} + +void I2CRam::setCcode( int code ) +{ + m_cCode = code; +} + +int I2CRam::rSize() +{ + return m_size; +} + +void I2CRam::setRSize( int size ) +{ + if( size > 65536 ) size = 65536; + if( size < 1 ) size = 1; + m_size = size; + //m_ram.resize( size ); +} + +bool I2CRam::persistent() +{ + return m_persistent; +} + +void I2CRam::setPersistent( bool p ) +{ + m_persistent = p; +} + +void I2CRam::contextMenuEvent( QGraphicsSceneContextMenuEvent* event ) +{ + if( !acceptedMouseButtons() ) event->ignore(); + else + { + event->accept(); + QMenu* menu = new QMenu(); + contextMenu( event, menu ); + menu->deleteLater(); + } +} + +void I2CRam::contextMenu( QGraphicsSceneContextMenuEvent* event, QMenu* menu ) +{ + QAction* loadAction = menu->addAction( QIcon(":/load.png"),tr("Load data") ); + connect( loadAction, SIGNAL(triggered()), this, SLOT(loadData()) ); + + QAction* saveAction = menu->addAction(QIcon(":/save.png"), tr("Save data") ); + connect( saveAction, SIGNAL(triggered()), this, SLOT(saveData()) ); + + menu->addSeparator(); + + Component::contextMenu( event, menu ); +} + +void I2CRam::loadData() +{ + MemData::loadData( &m_ram ); +} + +void I2CRam::saveData() +{ + MemData::saveData( m_ram ); +} +#include "moc_i2cram.cpp" diff --git a/src/gui/circuitwidget/components/logic/i2cram.h b/src/gui/circuitwidget/components/logic/i2cram.h new file mode 100644 index 0000000..23f021d --- /dev/null +++ b/src/gui/circuitwidget/components/logic/i2cram.h @@ -0,0 +1,81 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef I2CRAM_H +#define I2CRAM_H + +#include "e-i2c.h" +#include "itemlibrary.h" +#include "logiccomponent.h" +#include "memdata.h" + +class MAINMODULE_EXPORT I2CRam : public LogicComponent, public eI2C, public MemData +{ + Q_OBJECT + Q_PROPERTY( QVector Mem READ mem WRITE setMem ) + Q_PROPERTY( int Control_Code READ cCode WRITE setCcode DESIGNABLE true USER true ) + Q_PROPERTY( int Size_bytes READ rSize WRITE setRSize DESIGNABLE true USER true ) + Q_PROPERTY( bool Persistent READ persistent WRITE setPersistent DESIGNABLE true USER true ) + + public: + I2CRam( QObject* parent, QString type, QString id ); + ~I2CRam(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + void setMem( QVector m ); + QVector mem(); + + int cCode(); + void setCcode( int code ); + + int rSize(); + void setRSize( int size ); + + bool persistent(); + void setPersistent( bool p ); + + virtual void initialize(); + virtual void resetState(); + virtual void setVChanged(); + virtual void writeByte(); + virtual void readByte(); + + public slots: + //virtual void remove(); + void loadData(); + void saveData(); + void contextMenu( QGraphicsSceneContextMenuEvent* event, QMenu* menu ); + + protected: + virtual void contextMenuEvent(QGraphicsSceneContextMenuEvent* event); + + private: + QVector m_ram; + int m_size; + int m_addrPtr; + int m_cCode; + int m_phase; + + bool m_persistent; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/logic/i2ctoparallel.cpp b/src/gui/circuitwidget/components/logic/i2ctoparallel.cpp new file mode 100644 index 0000000..91824bc --- /dev/null +++ b/src/gui/circuitwidget/components/logic/i2ctoparallel.cpp @@ -0,0 +1,158 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "i2ctoparallel.h" +#include "pin.h" + +Component* I2CToParallel::construct( QObject* parent, QString type, QString id ) +{ + return new I2CToParallel( parent, type, id ); +} + +LibraryItem* I2CToParallel::libraryItem() +{ + return new LibraryItem( + tr( "I2C to Parallel" ), + tr( "Logic/Converters" ), + "2to3g.png", + "I2CToParallel", + I2CToParallel::construct ); +} + +I2CToParallel::I2CToParallel( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ) + , eI2C( id.toStdString() ) +{ + m_width = 4; + m_height = 9; + + QStringList pinList; // Create Pin List + + pinList // Inputs: + << "IL02 SDA"//type: Input, side: Left, pos: 01, label: "SDA" + << "IL03 SCL" + << "IL05 A0" + << "IL06 A1" + << "IL07 A2" + // Outputs: + << "OR01 D0" + << "OR02 D1" + << "OR03 D2" + << "OR04 D3" + << "OR05 D4" + << "OR06 D5" + << "OR07 D6" + << "OR08 D7" + ; + init( pinList ); // Create Pins Defined in pinList + + eLogicDevice::createInput( m_inPin[0] ); // Input SDA + eLogicDevice::createClockPin( m_inPin[1] ); // Input SCL + + eLogicDevice::createInput( m_inPin[2] ); // Input A0 + eLogicDevice::createInput( m_inPin[3] ); // Input A1 + eLogicDevice::createInput( m_inPin[4] ); // Input A2 + + for( int i=0; i<8; i++ ) + { + eLogicDevice::createOutput( m_outPin[i] ); + } + + m_cCode = 0b01010000; +} +I2CToParallel::~I2CToParallel(){} + +void I2CToParallel::initialize() // Called at Simulation Start +{ + eI2C::initialize(); + + for( int i=2; i<5; i++ ) // Initialize address pins + { + eNode* enode = m_inPin[i]->getEnode(); + if( enode ) enode->addToChangedFast( this ); + } +} + +void I2CToParallel::setVChanged() // Some Pin Changed State, Manage it +{ + bool A0 = eLogicDevice::getInputState( 1 ); + bool A1 = eLogicDevice::getInputState( 2 ); + bool A2 = eLogicDevice::getInputState( 3 ); + + int address = m_cCode; + if( A0 ) address += 1; + if( A1 ) address += 2; + if( A2 ) address += 4; + + m_address = address; + + eI2C::setVChanged(); // Run I2C Engine + + //if( m_state == I2C_READING ) m_phase = 0; + //if( m_state == I2C_STOPPED ) m_phase = 3; +} + +void I2CToParallel::readByte() // Reading from I2C to Parallel +{ + int value = m_rxReg; + //qDebug() << "Reading " << value; + for( int i=0; i<8; i++ ) + { + bool pinState = value & 1; + m_output[i]->setOut( pinState ); + m_output[i]->stampOutput(); + //qDebug() << "Bit " << i << pinState; + value >>= 1; + } + eI2C::readByte(); +} + +/*void I2CToParallel::writeByte() // Writting to I2C from Parallel +{ + for( int i=0; i<8; i++ ) + { + int value = 0; + int volt = m_output[i]->getEpin()->getVolt(); + + bool state = m_dataPinState[i]; + + if ( volt > m_inputHighV ) state = true; + else if( volt < m_inputLowV ) state = false; + + m_dataPinState[i] = state; + //qDebug() << "Bit " << i << state; + if( state ) value += pow( 2, i ); + } + m_txReg = value; + //qDebug() << "I2CToParallel::writeByte Address:"<<" Value"<< m_txReg; + + eI2C::writeByte(); +}*/ + +int I2CToParallel::cCode() +{ + return m_cCode; +} + +void I2CToParallel::setCcode( int code ) +{ + m_cCode = code; +} + +#include "moc_i2ctoparallel.cpp" diff --git a/src/gui/circuitwidget/components/logic/i2ctoparallel.h b/src/gui/circuitwidget/components/logic/i2ctoparallel.h new file mode 100644 index 0000000..5bd8473 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/i2ctoparallel.h @@ -0,0 +1,53 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef I2CTOPARALLEL_H +#define I2CTOPARALLEL_H + +#include "e-i2c.h" +#include "itemlibrary.h" +#include "logiccomponent.h" + +class MAINMODULE_EXPORT I2CToParallel : public LogicComponent, public eI2C +{ + Q_OBJECT + Q_PROPERTY( int Control_Code READ cCode WRITE setCcode DESIGNABLE true USER true ) + + public: + I2CToParallel( QObject* parent, QString type, QString id ); + ~I2CToParallel(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + int cCode(); + void setCcode( int code ); + + virtual void initialize(); + virtual void setVChanged(); + //virtual void writeByte(); + virtual void readByte(); + + private: + int m_cCode; + //int m_phase; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/logic/latchd.cpp b/src/gui/circuitwidget/components/logic/latchd.cpp new file mode 100644 index 0000000..09fadda --- /dev/null +++ b/src/gui/circuitwidget/components/logic/latchd.cpp @@ -0,0 +1,224 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include + +#include "latchd.h" +#include "circuit.h" +#include "pin.h" + + +Component* LatchD::construct( QObject* parent, QString type, QString id ) +{ + return new LatchD( parent, type, id ); +} + +LibraryItem* LatchD::libraryItem() +{ + return new LibraryItem( + tr( "Latch" ), + tr( "Logic/Memory" ), + "subc.png", + "LatchD", + LatchD::construct ); +} + +LatchD::LatchD( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ) + , eLatchD( id.toStdString() ) +{ + m_width = 4; + m_height = 10; + + m_tristate = true; + + m_inputEnPin = new Pin( 180, QPoint( 0,0 ), m_id+"-Pin-inputEnable", 0, this ); + m_inputEnPin->setLabelText( " IE" ); + m_inputEnPin->setLabelColor( QColor( 0, 0, 0 ) ); + + std::stringstream ssesource; + ssesource << m_elmId << "-eSource-inputEnable"; + m_inEnSource = new eSource( ssesource.str(), m_inputEnPin ); + m_inEnSource->setImp( m_inputImp ); + + m_outEnPin = new Pin( 0, QPoint( 0,0 ), m_id+"-Pin-outEnable" , 0, this ); + m_outEnPin->setLabelText( "OE " ); + m_outEnPin->setLabelColor( QColor( 0, 0, 0 ) ); + + //eLogicDevice::createInEnablePin( m_inputEnPin ); // Input Enable + eLogicDevice::createOutEnablePin( m_outEnPin ); // Output Enable + + setTrigger( InEnable ); + + m_channels = 0; + setChannels( 8 ); +} +LatchD::~LatchD(){} + +void LatchD::createLatches( int n ) +{ + int chans = m_channels + n; + + int origY = -(m_height/2)*8; + + m_outPin.resize( chans ); + m_numOutPins = chans; + m_inPin.resize( chans ); + m_numInPins = chans; + + for( int i=m_channels; isetLabelText( " D"+number ); + m_inPin[i]->setLabelColor( QColor( 0, 0, 0 ) ); + eLogicDevice::createInput( m_inPin[i] ); + + m_outPin[i] = new Pin( 0, QPoint(24,origY+8+i*8 ), m_id+"-out"+number, i, this ); + m_outPin[i]->setLabelText( "O"+number+" " ); + m_outPin[i]->setLabelColor( QColor( 0, 0, 0 ) ); + eLogicDevice::createOutput( m_outPin[i] ); + } +} + +void LatchD::deleteLatches( int n ) +{ + eLogicDevice::deleteOutputs( n ); + eLogicDevice::deleteInputs( n ); + LogicComponent::deleteOutputs( n ); + LogicComponent::deleteInputs( n ); +} + +void LatchD::setChannels( int channels ) +{ + if( channels == m_channels ) return; + if( channels < 1 ) return; + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + m_height = channels+2; + int origY = -(m_height/2)*8; + + if ( channels < m_channels ) deleteLatches( m_channels-channels ); + else if( channels > m_channels ) createLatches( channels-m_channels ); + + for( int i=0; isetPos( QPoint(-24,origY+8+i*8 ) ); + m_inPin[i]->setLabelPos(); + m_inPin[i]->isMoved(); + m_outPin[i]->setPos( QPoint(24,origY+8+i*8 ) ); + m_outPin[i]->setLabelPos(); + m_outPin[i]->isMoved(); + } + + m_inputEnPin->setPos( QPoint(-24,origY+8+channels*8 ) ); + m_inputEnPin->isMoved(); + m_inputEnPin->setLabelPos(); + + m_outEnPin->setPos( QPoint(24,origY+8+channels*8) ); + m_outEnPin->isMoved(); + m_outEnPin->setLabelPos(); + + m_channels = channels; + + m_area = QRect( -(m_width/2)*8, origY, m_width*8, m_height*8 ); + + if( pauseSim ) Simulator::self()->runContinuous(); + Circuit::self()->update(); +} + +void LatchD::setTristate( bool t ) +{ + if( !t ) + { + if( m_outEnPin->isConnected() ) m_outEnPin->connector()->remove(); + m_outEnPin->reset(); + m_outEnPin->setLabelText( "" ); + } + else m_outEnPin->setLabelText( "OE " ); + m_outEnPin->setVisible( t ); + m_tristate = t; + eLogicDevice::updateOutEnabled(); +} + +void LatchD::setTrigger( Trigger trigger ) +{ + //if( trigger == m_trigger ) return; + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + m_trigger = trigger; + + if( trigger == None ) + { + if( m_inputEnPin->isConnected() )m_inputEnPin->connector()->remove(); + m_inputEnPin->reset(); + m_inputEnPin->setLabelText( "" ); + m_inputEnPin->setVisible( false ); + + eLogicDevice::m_clockPin = 0l; + eLogicDevice::m_inEnablePin = 0l; + + eLogicDevice::m_inEnable = false; + eLogicDevice::m_clock = false; + } + else if( trigger == Clock ) + { + std::stringstream sspin; + sspin << m_elmId << "-ePin-clock"; + m_inputEnPin->setId( sspin.str() ); + m_inputEnPin->setLabelText( ">" ); + m_inputEnPin->setVisible( true ); + + eLogicDevice::m_inEnablePin = 0l; + eLogicDevice::m_clockPin = m_inEnSource; + + eLogicDevice::m_inEnable = false; + eLogicDevice::m_clock = false; + } + else if( trigger == InEnable ) + { + std::stringstream sspin; + sspin << m_elmId << "-ePin-inputEnable"; + m_inputEnPin->setId( sspin.str() ); + m_inputEnPin->setLabelText( " IE" ); + m_inputEnPin->setVisible( true ); + + eLogicDevice::m_clockPin = 0l; + eLogicDevice::m_inEnablePin = m_inEnSource; + + eLogicDevice::m_inEnable = false; + eLogicDevice::m_clock = false; + } + if( pauseSim ) Simulator::self()->runContinuous(); + Circuit::self()->update(); +} + +void LatchD::remove() +{ + if( m_inputEnPin->isConnected() ) m_inputEnPin->connector()->remove(); + if( m_outEnPin->isConnected() ) m_outEnPin->connector()->remove(); + + LogicComponent::remove(); +} +#include "moc_latchd.cpp" diff --git a/src/gui/circuitwidget/components/logic/latchd.h b/src/gui/circuitwidget/components/logic/latchd.h new file mode 100644 index 0000000..d31d32b --- /dev/null +++ b/src/gui/circuitwidget/components/logic/latchd.h @@ -0,0 +1,84 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef LATCHD_H +#define LATCHD_H + +#include "e-latch_d.h" +#include "itemlibrary.h" +#include "logiccomponent.h" + +class MAINMODULE_EXPORT LatchD : public LogicComponent, public eLatchD +{ + Q_OBJECT + Q_PROPERTY( double Input_High_V READ inputHighV WRITE setInputHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Low_V READ inputLowV WRITE setInputLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Imped READ inputImp WRITE setInputImp DESIGNABLE true USER true ) + Q_PROPERTY( double Out_High_V READ outHighV WRITE setOutHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Low_V READ outLowV WRITE setOutLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Imped READ outImp WRITE setOutImp DESIGNABLE true USER true ) + Q_PROPERTY( int Channels READ channels WRITE setChannels DESIGNABLE true USER true ) + Q_PROPERTY( bool Tristate READ tristate WRITE setTristate DESIGNABLE true USER true ) + Q_PROPERTY( bool Inverted READ inverted WRITE setInverted DESIGNABLE true USER true ) + Q_PROPERTY( Trigger Trigger READ trigger WRITE setTrigger DESIGNABLE true USER true ) + Q_ENUMS( Trigger ) + + public: + LatchD( QObject* parent, QString type, QString id ); + ~LatchD(); + + enum Trigger { + None = 0, + Clock, + InEnable + }; + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + int channels() { return m_channels; } + void setChannels( int channels ); + + bool tristate() { return m_tristate; } + void setTristate( bool t ); + + Trigger trigger() { return m_trigger; } + void setTrigger( Trigger trigger ); + + public slots: + virtual void remove(); + + private: + void createLatches( int n ); + void deleteLatches( int n ); + + eSource* m_inEnSource; + + Pin* m_inputEnPin; + Pin* m_outEnPin; + + int m_channels; + + bool m_tristate; + + Trigger m_trigger; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/logic/lm555.cpp b/src/gui/circuitwidget/components/logic/lm555.cpp new file mode 100644 index 0000000..8196435 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/lm555.cpp @@ -0,0 +1,129 @@ +/*************************************************************************** + * * + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + +#include "lm555.h" +#include "e-source.h" +#include "itemlibrary.h" +#include "connector.h" +#include "pin.h" + + +Component* Lm555::construct( QObject* parent, QString type, QString id ) +{ + return new Lm555( parent, type, id ); +} + +LibraryItem* Lm555::libraryItem() +{ + return new LibraryItem( + tr( "lm555" ), + tr( "Logic/Other Logic" ), + "ic2.png", + "Lm555", + Lm555::construct ); +} + +Lm555::Lm555( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eLm555( id.toStdString() ) +{ + m_area = QRect( 0, 0, 8*4, 8*5 ); + m_color = QColor( 50, 50, 70 ); + + m_pin.resize( 8 ); + + QString newId = id; + + newId.append(QString("-ePin0")); + m_pin[0] = new Pin( 180, QPoint(-8, 8*1), newId, 0, this ); + m_pin[0]->setLabelText( "Gnd" ); + m_ePin[0] = m_pin[0]; + + newId = id; + newId.append(QString("-ePin1")); + m_pin[1] = new Pin( 180, QPoint(-8, 8*2), newId, 1, this ); + m_pin[1]->setLabelText( "Trg" ); + m_ePin[1] = m_pin[1]; + + newId = id; + newId.append(QString("-ePin2")); + m_pin[2] = new Pin( 180, QPoint(-8, 8*3), newId, 2, this ); + m_pin[2]->setLabelText( "Out" ); + m_ePin[2] = m_pin[2]; + newId.append("-eSource"); + m_output = new eSource( newId.toStdString(), m_ePin[2] ); + m_output->setImp( 10 ); + m_output->setOut( true ); + + newId = id; + newId.append(QString("-ePin3")); + m_pin[3] = new Pin( 180, QPoint(-8, 8*4), newId, 3, this ); + m_pin[3]->setLabelText( "Rst" ); + m_ePin[3] = m_pin[3]; + + newId = id; + newId.append(QString("-ePin4")); + m_pin[4] = new Pin( 0, QPoint(4*8+8, 8*4), newId, 4, this ); + m_pin[4]->setLabelText( "CV" ); + m_ePin[4] = m_pin[4]; + newId.append("-eSource"); + m_cv = new eSource( newId.toStdString(), m_ePin[4] ); + m_cv->setImp( 10 ); + m_cv->setOut( true ); + + newId = id; + newId.append(QString("-ePin5")); + m_pin[5] = new Pin( 0, QPoint(4*8+8, 8*3), newId, 5, this ); + m_pin[5]->setLabelText( "Thr" ); + m_ePin[5] = m_pin[5]; + + newId = id; + newId.append(QString("-ePin6")); + m_pin[6] = new Pin( 0, QPoint(4*8+8, 8*2), newId, 6, this ); + m_pin[6]->setLabelText( "Dis" ); + m_ePin[6] = m_pin[6]; + newId.append("-eSource"); + m_dis = new eSource( newId.toStdString(), m_ePin[6] ); + m_dis->setImp( high_imp ); + m_dis->setOut( false ); + + newId = id; + newId.append(QString("-ePin7")); + m_pin[7] = new Pin( 0, QPoint(4*8+8, 8*1), newId, 7, this ); + m_pin[7]->setLabelText( "Vcc" ); + m_ePin[7] = m_pin[7]; + +} +Lm555::~Lm555() +{ +} + +void Lm555::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + p->drawRoundedRect( m_area, 1, 1); + + p->setPen( QColor( 170, 170, 150 ) ); + p->drawArc( boundingRect().width()/2-6, -4, 8, 8, 0, -2880 /* -16*180 */ ); +} + +#include "moc_lm555.cpp" diff --git a/src/gui/circuitwidget/components/logic/lm555.h b/src/gui/circuitwidget/components/logic/lm555.h new file mode 100644 index 0000000..5d14909 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/lm555.h @@ -0,0 +1,47 @@ +/*************************************************************************** + * * + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + +#ifndef LM555_H +#define LM555_H + +#include "e-lm555.h" +#include "component.h" + +#include + +class LibraryItem; + +class MAINMODULE_EXPORT Lm555 : public Component, public eLm555 +{ + Q_OBJECT + + public: + + Lm555( QObject* parent, QString type, QString id ); + ~Lm555(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); +}; + +#endif diff --git a/src/gui/circuitwidget/components/logic/memory.cpp b/src/gui/circuitwidget/components/logic/memory.cpp new file mode 100644 index 0000000..cfebc2d --- /dev/null +++ b/src/gui/circuitwidget/components/logic/memory.cpp @@ -0,0 +1,248 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include + +#include "memory.h" +#include "circuit.h" +#include "pin.h" +#include "utils.h" + +Component* Memory::construct( QObject* parent, QString type, QString id ) +{ + return new Memory( parent, type, id ); +} + +LibraryItem* Memory::libraryItem() +{ + return new LibraryItem( + tr( "Ram/Rom" ), + tr( "Logic/Memory" ), + "2to3g.png", + "Memory", + Memory::construct ); +} + +Memory::Memory( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ) + , eMemory( id.toStdString() ) + , MemData() +{ + m_width = 4; + m_height = 11; + + m_WePin = new Pin( 180, QPoint( 0,0 ), m_id+"-Pin-We", 0, this ); + m_WePin->setLabelText( " WE" ); + m_WePin->setLabelColor( QColor( 0, 0, 0 ) ); + + m_CsPin = new Pin( 0, QPoint( 0,0 ), m_id+"-Pin-Cs", 0, this ); + m_CsPin->setLabelText( "CS " ); + m_CsPin->setLabelColor( QColor( 0, 0, 0 ) ); + + m_outEnPin = new Pin( 180, QPoint( 0,0 ), m_id+"-Pin-outEnable" , 0, this ); + m_outEnPin->setLabelText( " OE" ); + m_outEnPin->setLabelColor( QColor( 0, 0, 0 ) ); + + eLogicDevice::createInput( m_WePin ); // WE + eLogicDevice::createInput( m_CsPin ); // CS + eLogicDevice::createOutEnablePin( m_outEnPin ); // OE + + for( int i=0; i<2; i++ ) m_input[i]->setInverted( true ); // Invert control pins + + m_addrBits = 0; + m_dataBits = 0; + setAddrBits( 8 ); + setDataBits( 8 ); +} +Memory::~Memory(){} + +void Memory::updatePins() +{ + int h = m_addrBits+1; + if( m_dataBits > h ) h = m_dataBits; + + m_height = h+2; + int origY = -(m_height/2)*8; + + for( int i=0; isetPos( QPoint(-24,origY+8+i*8 ) ); + m_inPin[i]->setLabelPos(); + m_inPin[i]->isMoved(); + } + + for( int i=0; isetPos( QPoint(24,origY+8+i*8 ) ); + m_outPin[i]->setLabelPos(); + m_outPin[i]->isMoved(); + } + + m_WePin->setPos( QPoint(-24,origY+h*8 ) ); // WE + m_WePin->isMoved(); + m_WePin->setLabelPos(); + + m_CsPin->setPos( QPoint( 24,origY+8+h*8 ) ); // CS + m_CsPin->isMoved(); + m_CsPin->setLabelPos(); + + m_outEnPin->setPos( QPoint(-24,origY+8+h*8 ) ); // OE + m_outEnPin->isMoved(); + m_outEnPin->setLabelPos(); + + m_area = QRect( -(m_width/2)*8, origY, m_width*8, m_height*8 ); +} + +void Memory::setAddrBits( int bits ) +{ + if( bits == m_addrBits ) return; + if( bits == 0 ) bits = 8; + if( bits > 18 ) bits = 18; + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + if ( bits < m_addrBits ) deleteAddrBits( m_addrBits-bits ); + else if( bits > m_addrBits ) createAddrBits( bits-m_addrBits ); + + eMemory::setAddrBits( bits ); + + updatePins(); + + if( pauseSim ) Simulator::self()->runContinuous(); + Circuit::self()->update(); +} + +void Memory::createAddrBits( int bits ) +{ + int chans = m_addrBits + bits; + + int origY = -(m_height/2)*8; + + m_inPin.resize( chans ); + m_numInPins = chans; + + for( int i=m_addrBits; isetLabelText( " A"+number ); + m_inPin[i]->setLabelColor( QColor( 0, 0, 0 ) ); + eLogicDevice::createInput( m_inPin[i] ); + } +} + +void Memory::deleteAddrBits( int bits ) +{ + eLogicDevice::deleteInputs( bits ); + LogicComponent::deleteInputs( bits ); +} + +void Memory::setDataBits( int bits ) +{ + if( bits == m_dataBits ) return; + if( bits == 0 ) bits = 8; + if( bits > 32 ) bits = 32; + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + if ( bits < m_dataBits ) deleteDataBits( m_dataBits-bits ); + else if( bits > m_dataBits ) createDataBits( bits-m_dataBits ); + + m_dataBits = bits; + + updatePins(); + + if( pauseSim ) Simulator::self()->runContinuous(); + Circuit::self()->update(); +} + +void Memory::createDataBits( int bits ) +{ + int chans = m_dataBits + bits; + + int origY = -(m_height/2)*8; + + m_outPin.resize( chans ); + m_numOutPins = chans; + + for( int i=m_dataBits; isetLabelText( "D"+number+" " ); + m_outPin[i]->setLabelColor( QColor( 0, 0, 0 ) ); + eLogicDevice::createOutput( m_outPin[i] ); + } +} + +void Memory::deleteDataBits( int bits ) +{ + eLogicDevice::deleteOutputs( bits ); + LogicComponent::deleteOutputs( bits ); +} + +void Memory::contextMenuEvent( QGraphicsSceneContextMenuEvent* event ) +{ + if( !acceptedMouseButtons() ) event->ignore(); + else + { + event->accept(); + QMenu* menu = new QMenu(); + contextMenu( event, menu ); + menu->deleteLater(); + } +} + +void Memory::contextMenu( QGraphicsSceneContextMenuEvent* event, QMenu* menu ) +{ + QAction* loadAction = menu->addAction( QIcon(":/load.png"),tr("Load data") ); + connect( loadAction, SIGNAL(triggered()), this, SLOT(loadData()) ); + + QAction* saveAction = menu->addAction(QIcon(":/save.png"), tr("Save data") ); + connect( saveAction, SIGNAL(triggered()), this, SLOT(saveData()) ); + + menu->addSeparator(); + + Component::contextMenu( event, menu ); +} + +void Memory::loadData() +{ + MemData::loadData( &m_ram ); +} + +void Memory::saveData() +{ + MemData::saveData( m_ram ); +} + +void Memory::remove() +{ + if( m_CsPin->isConnected() ) m_CsPin->connector()->remove(); + if( m_WePin->isConnected() ) m_WePin->connector()->remove(); + if( m_outEnPin->isConnected() ) m_outEnPin->connector()->remove(); + + LogicComponent::remove(); +} + +#include "moc_memory.cpp" diff --git a/src/gui/circuitwidget/components/logic/memory.h b/src/gui/circuitwidget/components/logic/memory.h new file mode 100644 index 0000000..6af0fae --- /dev/null +++ b/src/gui/circuitwidget/components/logic/memory.h @@ -0,0 +1,71 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef MEMORY_H +#define MEMORY_H + +#include "itemlibrary.h" +#include "logiccomponent.h" +#include "e-memory.h" +#include "memdata.h" + + +class MAINMODULE_EXPORT Memory : public LogicComponent, public eMemory, public MemData +{ + Q_OBJECT + + Q_PROPERTY( QVector Mem READ mem WRITE setMem ) + Q_PROPERTY( int Address_Bits READ addrBits WRITE setAddrBits DESIGNABLE true USER true ) + Q_PROPERTY( int Data_Bits READ dataBits WRITE setDataBits DESIGNABLE true USER true ) + Q_PROPERTY( bool Persistent READ persistent WRITE setPersistent DESIGNABLE true USER true ) + + public: + Memory( QObject* parent, QString type, QString id ); + ~Memory(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + void setAddrBits( int bits ); + void deleteAddrBits( int bits ); + void createAddrBits( int bits ); + + void setDataBits( int bits ); + void deleteDataBits( int bits ); + void createDataBits( int bits ); + + void updatePins(); + + public slots: + virtual void remove(); + void loadData(); + void saveData(); + void contextMenu( QGraphicsSceneContextMenuEvent* event, QMenu* menu ); + + protected: + virtual void contextMenuEvent(QGraphicsSceneContextMenuEvent* event); + + private: + Pin* m_CsPin; + Pin* m_WePin; + Pin* m_outEnPin; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/logic/mux.cpp b/src/gui/circuitwidget/components/logic/mux.cpp new file mode 100644 index 0000000..c7dd8ee --- /dev/null +++ b/src/gui/circuitwidget/components/logic/mux.cpp @@ -0,0 +1,120 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "mux.h" +#include "pin.h" + + +Component* Mux::construct( QObject* parent, QString type, QString id ) +{ + return new Mux( parent, type, id ); +} + +LibraryItem* Mux::libraryItem() +{ + return new LibraryItem( + tr( "Mux" ), + tr( "Logic/Converters" ), + "mux.png", + "Mux", + Mux::construct ); +} + +Mux::Mux( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ) + , eMux( id.toStdString() ) +{ + m_width = 4; + m_height = 10; + + QStringList pinList; + + pinList // Inputs: + << "IL01 D0" + << "IL02 D1" + << "IL03 D2" + << "IL04 D3" + << "IL05 D4" + << "IL06 D5" + << "IL07 D6" + << "IL08 D7" + + << "ID03 S0" + << "ID02 S1 " + << "ID01S2 " + + << "IU03OE " + + // Outputs: + << "OR04Y " + << "OR06!Y " + ; + init( pinList ); + m_area = QRect( -(m_width/2)*8-1, -(m_height/2)*8-8-1, m_width*8+2, m_height*8+16+2 ); + + eLogicDevice::createOutEnablePin( m_inPin[11] ); // IOutput Enable + + for( int i=0; i<11; i++ ) + eLogicDevice::createInput( m_inPin[i] ); + + eLogicDevice::createOutput( m_outPin[0] ); + eLogicDevice::createOutput( m_outPin[1] ); + +} +Mux::~Mux(){} + +void Mux::setInvertInps( bool invert ) +{ + m_invInputs = invert; + for( int i=0; i<8; i++ ) + { + m_input[i]->setInverted( invert ); + } +} + +QPainterPath Mux::shape() const +{ + QPainterPath path; + + QVector points; + + points << QPointF(-(m_width/2)*8,-(m_height/2)*8-6 ) + << QPointF(-(m_width/2)*8, (m_height/2)*8+6 ) + << QPointF( (m_width/2)*8, (m_height/2)*8-2 ) + << QPointF( (m_width/2)*8,-(m_height/2)*8+2 ); + + path.addPolygon( QPolygonF(points) ); + path.closeSubpath(); + return path; +} + +void Mux::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + static const QPointF points[4] = { + QPointF(-(m_width/2)*8,-(m_height/2)*8-6 ), + QPointF(-(m_width/2)*8, (m_height/2)*8+6 ), + QPointF( (m_width/2)*8, (m_height/2)*8-2 ), + QPointF( (m_width/2)*8,-(m_height/2)*8+2 )}; + + p->drawPolygon(points, 4); +} + +#include "moc_mux.cpp" diff --git a/src/gui/circuitwidget/components/logic/mux.h b/src/gui/circuitwidget/components/logic/mux.h new file mode 100644 index 0000000..15e28b1 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/mux.h @@ -0,0 +1,58 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef MUX_H +#define MUX_H + +#include "e-mux.h" +#include "itemlibrary.h" +#include "logiccomponent.h" + +class MAINMODULE_EXPORT Mux : public LogicComponent, public eMux +{ + Q_OBJECT + Q_PROPERTY( bool tristate READ tristate USER true ) + Q_PROPERTY( double Input_High_V READ inputHighV WRITE setInputHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Low_V READ inputLowV WRITE setInputLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Imped READ inputImp WRITE setInputImp DESIGNABLE true USER true ) + Q_PROPERTY( double Out_High_V READ outHighV WRITE setOutHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Low_V READ outLowV WRITE setOutLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Imped READ outImp WRITE setOutImp DESIGNABLE true USER true ) + Q_PROPERTY( bool Invert_Inputs READ invertInps WRITE setInvertInps DESIGNABLE true USER true ) + + + public: + QRectF boundingRect() const { return m_area; } + + Mux( QObject* parent, QString type, QString id ); + ~Mux(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + bool tristate() { return true; } + + void setInvertInps( bool invert ); + + virtual QPainterPath shape() const; + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); +}; + +#endif + diff --git a/src/gui/circuitwidget/components/logic/sevensegment_bcd.cpp b/src/gui/circuitwidget/components/logic/sevensegment_bcd.cpp new file mode 100755 index 0000000..e5b9d39 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/sevensegment_bcd.cpp @@ -0,0 +1,140 @@ +/*************************************************************************** + * Copyright (C) 2010 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "sevensegment_bcd.h" +#include "simulator.h" +#include "connector.h" + + +Component* SevenSegmentBCD::construct( QObject* parent, QString type, QString id ) +{ + return new SevenSegmentBCD( parent, type, id ); +} + +LibraryItem* SevenSegmentBCD::libraryItem() +{ + return new LibraryItem( + tr( "7 Seg BCD" ), + tr( "Logic/Other Logic" ), + "7segbcd.png", + "7-Seg BCD", + SevenSegmentBCD::construct ); +} + +SevenSegmentBCD::SevenSegmentBCD( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ) + , eBcdTo7S( id.toStdString() ) +{ + m_width = 4; + m_height = 6; + + QStringList pinList; + + pinList // Inputs: + << "ID04 " + << "ID03 " + << "ID02 " + << "ID01 " + ; + init( pinList ); + + for( int i=0; iaddToUpdateList( this ); + + resetState(); +} +SevenSegmentBCD::~SevenSegmentBCD(){} + +void SevenSegmentBCD::resetState() +{ + for( int i=0; i<7; i++ ) m_outValue[i] = false; +} + +void SevenSegmentBCD::stamp() +{ + m_outValue[0] = true; + m_outValue[1] = true; + m_outValue[2] = true; + m_outValue[3] = true; + m_outValue[4] = true; + m_outValue[5] = true; + m_outValue[6] = false; + update(); +} + +void SevenSegmentBCD::updateStep() +{ + if( m_changed ) + { + update(); + m_changed = false; + } +} + +void SevenSegmentBCD::remove() +{ + Simulator::self()->remFromUpdateList( this ); + LogicComponent::remove(); +} + +void SevenSegmentBCD::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Q_UNUSED(option); Q_UNUSED(widget); + + QPen pen; + pen.setWidth(3); + pen.setCapStyle(Qt::RoundCap); + + p->setPen(pen); + p->setBrush( QColor( 30, 30, 30 ) ); + p->drawRect( m_area ); + + const int mg = 6;// Margin around number + const int ds = 1; // "Slope" + const int tk = 4; // Line thick + const int x1 = m_area.x()+mg; + const int x2 = -m_area.x()-mg; + const int y1 = m_area.y()+mg; + const int y2 = -m_area.y()-mg; + + + pen.setWidth(tk); + pen.setColor( QColor( 250, 250, 100)); + p->setPen(pen); + + if( m_outValue[0]) p->drawLine( x1+tk+ds, y1, x2-tk+ds, y1 ); + if( m_outValue[1]) p->drawLine( x2+ds, y1+tk, x2, -tk ); + if( m_outValue[2]) p->drawLine( x2, tk, x2-ds, y2-tk ); + if( m_outValue[3]) p->drawLine( x2-tk-ds, y2, x1+tk-ds, y2 ); + if( m_outValue[4]) p->drawLine( x1-ds, y2-tk, x1, tk ); + if( m_outValue[5]) p->drawLine( x1, -tk, x1+ds, y1+tk ); + if( m_outValue[6]) p->drawLine( x1+tk, 0, x2-tk, 0 ); + + /*if( m_point ) + { + p->setPen( Qt::NoPen ); + p->setBrush( QColor( 250, 250, 100) ); + p->drawPie( x2+ds, y2-ds, tk, tk, 0, 16*360 ); + // Decimal pointn p->drawPie( x2+ds, y3-ds, 6, 6, 0, 16*360 ); + }*/ +} + +#include "moc_sevensegment_bcd.cpp" diff --git a/src/gui/circuitwidget/components/logic/sevensegment_bcd.h b/src/gui/circuitwidget/components/logic/sevensegment_bcd.h new file mode 100755 index 0000000..bafe178 --- /dev/null +++ b/src/gui/circuitwidget/components/logic/sevensegment_bcd.h @@ -0,0 +1,53 @@ +/*************************************************************************** + * Copyright (C) 2010 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef SEVENSEGMENTBCD_H +#define SEVENSEGMENTBCD_H + +#include "itemlibrary.h" +#include "logiccomponent.h" +#include "e-bcdto7s.h" + + +class MAINMODULE_EXPORT SevenSegmentBCD : public LogicComponent, public eBcdTo7S +{ + Q_OBJECT + + public: + SevenSegmentBCD( QObject* parent, QString type, QString id ); + ~SevenSegmentBCD(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + void resetState(); + void updateStep(); + void stamp(); + + void remove(); + + void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + private: + int m_origx; + int m_origy; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/logic/shiftreg.cpp b/src/gui/circuitwidget/components/logic/shiftreg.cpp new file mode 100644 index 0000000..5f4c19d --- /dev/null +++ b/src/gui/circuitwidget/components/logic/shiftreg.cpp @@ -0,0 +1,82 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "shiftreg.h" +#include "pin.h" + + +Component* ShiftReg::construct( QObject* parent, QString type, QString id ) +{ + return new ShiftReg( parent, type, id ); +} + +LibraryItem* ShiftReg::libraryItem() +{ + return new LibraryItem( + tr( "Shift Reg." ), + tr( "Logic/Arithmetic" ), + "1to3.png", + "ShiftReg", + ShiftReg::construct ); +} + +ShiftReg::ShiftReg( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ) + , eShiftReg( id.toStdString() ) +{ + m_width = 4; + m_height = 9; + + QStringList pinList; + + pinList // Inputs: + << "IL03 DI" + << "IL05>" + << "IL07 Rst" + + << "IU01OE " + + // Outputs: + << "OR01Q0 " + << "OR02Q1 " + << "OR03Q2 " + << "OR04Q3 " + << "OR05Q4 " + << "OR06Q5 " + << "OR07Q6 " + << "OR08Q7 " + ; + init( pinList ); + + eLogicDevice::createInput( m_inPin[0] ); // Input DI + + eLogicDevice::createClockPin( m_inPin[1] ); // Input Clock + + eLogicDevice::createInput( m_inPin[2] ); // Input Rst + + eLogicDevice::createOutEnablePin( m_inPin[3] ); // IOutput Enable + + for( int i=0; i. * + * * + ***************************************************************************/ + +#ifndef SHIFTREG_H +#define SHIFTREG_H + +#include "e-shiftreg.h" +#include "itemlibrary.h" +#include "logiccomponent.h" + +class MAINMODULE_EXPORT ShiftReg : public LogicComponent, public eShiftReg +{ + Q_OBJECT + Q_PROPERTY( double Input_High_V READ inputHighV WRITE setInputHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Low_V READ inputLowV WRITE setInputLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Input_Imped READ inputImp WRITE setInputImp DESIGNABLE true USER true ) + Q_PROPERTY( double Out_High_V READ outHighV WRITE setOutHighV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Low_V READ outLowV WRITE setOutLowV DESIGNABLE true USER true ) + Q_PROPERTY( double Out_Imped READ outImp WRITE setOutImp DESIGNABLE true USER true ) + + Q_PROPERTY( bool Clock_Inverted READ clockInv WRITE setClockInv DESIGNABLE true USER true ) + Q_PROPERTY( bool Reset_Inverted READ resetInv WRITE setResetInv DESIGNABLE true USER true ) + Q_PROPERTY( bool Tristate READ tristate USER true ) + + public: + ShiftReg( QObject* parent, QString type, QString id ); + ~ShiftReg(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + bool tristate() { return true; } +}; + +#endif + diff --git a/src/gui/circuitwidget/components/logiccomponent.cpp b/src/gui/circuitwidget/components/logiccomponent.cpp new file mode 100644 index 0000000..6772a8e --- /dev/null +++ b/src/gui/circuitwidget/components/logiccomponent.cpp @@ -0,0 +1,225 @@ +/*************************************************************************** + * Copyright (C) 2010 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "connector.h" +#include "circuit.h" +#include "logiccomponent.h" + +static const char* LogicComponent_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Input High V"), + QT_TRANSLATE_NOOP("App::Property","Input Low V"), + QT_TRANSLATE_NOOP("App::Property","Input Imped"), + QT_TRANSLATE_NOOP("App::Property","Out High V"), + QT_TRANSLATE_NOOP("App::Property","Out Low V"), + QT_TRANSLATE_NOOP("App::Property","Out Imped"), + QT_TRANSLATE_NOOP("App::Property","Inverted"), + QT_TRANSLATE_NOOP("App::Property","Tristate"), + QT_TRANSLATE_NOOP("App::Property","Clock Inverted"), + QT_TRANSLATE_NOOP("App::Property","Reset Inverted"), + QT_TRANSLATE_NOOP("App::Property","Invert Inputs"), + QT_TRANSLATE_NOOP("App::Property","S R Inverted"), + QT_TRANSLATE_NOOP("App::Property","Num Inputs"), + QT_TRANSLATE_NOOP("App::Property","Num Outputs"), + QT_TRANSLATE_NOOP("App::Property","Num Bits"), + QT_TRANSLATE_NOOP("App::Property","Channels"), +}; + +LogicComponent::LogicComponent( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) +{ + Q_UNUSED( LogicComponent_properties ); + + m_numInPins = 0; + m_numOutPins = 0; +} +LogicComponent::~LogicComponent() +{ +} + +void LogicComponent::init( QStringList pins ) +{ + m_area = QRect( -(m_width/2)*8, -(m_height/2)*8, m_width*8, m_height*8 ); + + QStringList inputs; // Input Pins + QStringList outputs; // Output Pins + + // Example: pin = "IL02Name" => input, left, number 2, label = "Name" + + foreach( QString pin, pins ) + { + if( pin.startsWith( "I" ) ) inputs.append( pin.remove(0,1) ); + else if( pin.startsWith( "O" ) ) outputs.append( pin.remove(0,1) ); + else qDebug() << " LogicComponent::init: pin name error "; + } + //qDebug() << inputs << outputs; + + // configure Input Pins............................................ + setNumInps( inputs.length() ); + int i = 0; + foreach( QString input, inputs ) + { + // Example input = "L02Name" + QString pin = input.left(3); // Pin position + QString label = input.remove(0,3); // Pin name + + m_inPin[i] = createPin( pin, m_id+"-in"+QString::number(i) ); + m_inPin[i]->setLabelText( label ); + i++; + } + + // configure Output Pins............................................ + setNumOuts( outputs.length() ); + i = 0; + foreach( QString output, outputs ) + { + // Example output = "L02Name" + QString pin = output.left(3); // Pin position + QString label = output.remove(0,3); // Pin name + + m_outPin[i] = createPin( pin, m_id+"-out"+QString::number(i) ); + m_outPin[i]->setLabelText( label ); + i++; + } + //label->setPos( m_area.x(), m_area.y()-20 ); +} + +Pin* LogicComponent::createPin( QString data, QString pinId ) +{ + // Example pin = "L02" => left side, number 2 + + QString pos = data.left(1); + int num = data.remove(0,1).toInt(); + + int angle = 0; + int x = 0; + int y = 0; + + if( pos == "U" ) // Up + { + angle = 90; + x = m_area.x() + num*8; + y = m_area.y() - 8; + } + else if( pos == "L") // Left + { + angle = 180; + x = m_area.x() - 8; + y = m_area.y() + num*8; + } + if( pos == "D" ) // Down + { + angle = 270; + x = m_area.x() + num*8; + y = m_area.height()/2 + 8; + } + else if( pos == "R") // Right + { + x = m_area.width()/2 + 8; + y = m_area.y() + num*8; + } + Pin* pin = new Pin( angle, QPoint( x, y ), pinId, 0, this ); + pin->setLabelColor( QColor( 0, 0, 0 ) ); + return pin; +} + +void LogicComponent::remove() +{ + for( int i=0; iisConnected() ) m_inPin[i]->connector()->remove(); + + for( int i=0; iisConnected() ) m_outPin[i]->connector()->remove(); + + Component::remove(); +} + +void LogicComponent::setNumInps( int inPins ) +{ + //qDebug()<< m_id << "LogicComponent::setNumInps" << inPins; + if( inPins == m_numInPins ) return; + if( inPins < 1 ) return; + + for( int i=0; iisConnected() ) m_inPin[i]->connector()->remove(); + if( m_inPin[i]->scene() ) Circuit::self()->removeItem( m_inPin[i] ); + m_inPin[i]->reset(); + delete m_inPin[i]; + } + m_inPin.resize( inPins ); + + m_numInPins = inPins; +} + +void LogicComponent::setNumOuts( int outPins ) +{ + //qDebug()<< m_id << "LogicComponent::setNumOuts" << outPins; + if( outPins == m_numOutPins ) return; + if( outPins < 1 ) return; + + for( int i=0; iisConnected() ) m_outPin[i]->connector()->remove(); + if( m_outPin[i]->scene() ) Circuit::self()->removeItem( m_outPin[i] ); + m_outPin[i]->reset(); + delete m_outPin[i]; + } + m_outPin.resize( outPins ); + + m_numOutPins = outPins; +} + +void LogicComponent::deleteInputs( int inputs ) +{ + if( m_numInPins-inputs < 0 ) inputs = m_numInPins; + + for( int i=m_numInPins-1; i>m_numInPins-inputs-1; i-- ) + { + if( m_inPin[i]->isConnected() ) m_inPin[i]->connector()->remove(); + if( m_inPin[i]->scene() ) Circuit::self()->removeItem( m_inPin[i] ); + m_inPin[i]->reset(); + delete m_inPin[i]; + } + m_numInPins -= inputs; + m_inPin.resize( m_numInPins ); +} + +void LogicComponent::deleteOutputs( int outputs ) +{ + for( int i=m_numOutPins-1; i>m_numOutPins-outputs-1; i-- ) + { + if( m_outPin[i]->isConnected() ) m_outPin[i]->connector()->remove(); + //else m_outPin[i]->reset(); + + if( m_outPin[i]->scene() ) Circuit::self()->removeItem( m_outPin[i] ); + + delete m_outPin[i]; + } + m_numOutPins -= outputs; + m_outPin.resize( m_numOutPins ); +} + +void LogicComponent::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + p->drawRect( m_area ); +} + +#include "moc_logiccomponent.cpp" diff --git a/src/gui/circuitwidget/components/logiccomponent.h b/src/gui/circuitwidget/components/logiccomponent.h new file mode 100644 index 0000000..d795fc4 --- /dev/null +++ b/src/gui/circuitwidget/components/logiccomponent.h @@ -0,0 +1,61 @@ +/*************************************************************************** + * Copyright (C) 2010 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef LOGICCOMPONENT_H +#define LOGICCOMPONENT_H + +#include "component.h" +#include "pin.h" + +class MAINMODULE_EXPORT LogicComponent : public Component +{ + Q_OBJECT + public: + + LogicComponent( QObject* parent, QString type, QString id ); + ~LogicComponent(); + + virtual void init( QStringList pins ); + + virtual void setNumInps( int inPins ); + + virtual void setNumOuts(int outPins ); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void remove(); + + protected: + Pin* createPin( QString data , QString pinId ); + + void deleteInputs( int inputs ); + void deleteOutputs( int inputs ); + + std::vector m_inPin; + std::vector m_outPin; + + int m_width; + int m_height; + + int m_numInPins; + int m_numOutPins; +}; + +#endif diff --git a/src/gui/circuitwidget/components/mcu/arduino.cpp b/src/gui/circuitwidget/components/mcu/arduino.cpp new file mode 100644 index 0000000..950f32e --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/arduino.cpp @@ -0,0 +1,249 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "arduino.h" +#include "mainwindow.h" +#include "circuit.h" +#include "e-resistor.h" +#include "itemlibrary.h" +#include "utils.h" + +LibraryItem* Arduino::libraryItem() +{ + return new LibraryItem( + tr("Arduino"), + tr("Micro"), + "arduinoUnoIcon.png", + "Arduino", + Arduino::construct ); +} + +Component* Arduino::construct( QObject* parent, QString type, QString id ) +{ + if( m_canCreate ) + { + Arduino* ard = new Arduino( parent, type, id ); + if( m_error > 0 ) + { + Circuit::self()->compList()->removeOne( ard ); + ard->deleteLater(); + ard = 0l; + m_error = 0; + m_pSelf = 0l; + m_canCreate = true; + } + return ard; + } + MessageBoxNB( tr("Error") + , tr("Only 1 Mcu allowed\n to be in the Circuit.") ); + + return 0l; +} + +Arduino::Arduino( QObject* parent, QString type, QString id ) + : McuComponent( parent, type, id ) +{ + m_pSelf = this; + m_processor = AvrProcessor::self(); + + setLabelPos( 100,-21, 0); // X, Y, Rot + + initChip(); + if( m_error == 0 ) + { + initBoard(); + setFreq( 16 ); + //initBootloader(); + + qDebug() <<" ..."<setEnode( 0l ); + ePin* ledPin0 = m_boardLed->getEpin(0); + ledPin0->setEnode( 0l ); + delete ledPin0; + + ePin* ledPin1 = m_boardLed->getEpin(1); + ledPin1->setEnode( 0l ); + delete ledPin1; + + delete m_groundpin; + delete m_ground; + + McuComponent::remove(); + + Simulator::self()->remFromEnodeList( m_groundEnode, true ); + Simulator::self()->remFromUpdateList( m_boardLed ); + Circuit::self()->compList()->removeOne( m_boardLed ); +} + +void Arduino::initialize() +{ + eNode* enod = m_pb5Pin->getEnode(); + + if( !enod ) // Not connected: Create boardLed eNode + { + m_boardLedEnode = new eNode( m_id+"-boardLedeNode" ); + enod = m_boardLedEnode; + m_pb5Pin->setEnode( m_boardLedEnode ); + } + else if( enod != m_boardLedEnode ) // Connected to external eNode: Delete boardLed eNode + { + //Simulator::self()->remFromEnodeList( m_boardLedEnode, true ); + m_boardLedEnode = enod; + } + else return; // Already connected to boardLed eNode: Do nothing + //qDebug() << "Arduino::initialize() Pin 13"<itemId() ; + m_boardLed->getEpin(0)->setEnode(enod); +} + +void Arduino::initBoard() +{ + // Create Led ground + m_groundEnode = new eNode( m_id+"-Gnod"); + m_groundpin = new ePin( (m_id+"-Gnod-ePin_ground").toStdString(), 0); + m_ground = new eSource( (m_id+"-Gnod-eSource_ground").toStdString(), m_groundpin ); + m_groundpin->setEnode( m_groundEnode ); + + // Create board led + m_boardLed = new LedSmd( this, "LEDSMD", m_id+"boardled", QRectF(0, 0, 4, 3) ); + m_boardLed->setNumEpins(2); + m_boardLed->setParentItem(this); + m_boardLed->setEnabled(false); + m_boardLed->setMaxCurrent( 0.003 ); + m_boardLed->setRes( 1000 ); + + if( objectName().contains("Mega") ) m_boardLed->setPos( 35+12, 125+105 ); + else m_boardLed->setPos( 35, 125 ); + + m_boardLedEnode = 0l; + + ePin* boardLedEpin1 = m_boardLed->getEpin(1); + + boardLedEpin1->setEnode( m_groundEnode ); // Connect board led to ground + + for( int i=0; iangle() == 0 ) mcuPin->move(-16, 0 ); + else if( mcuPin->angle() == 180 ) mcuPin->move( 16, 0 ); + else if( mcuPin->angle() == 90 ) mcuPin->move( 0, 32 ); + else mcuPin->move( 0,-320 ); + + Pin* pin = mcuPin->pin(); + pin->setLength(0); + pin->setFlag( QGraphicsItem::ItemStacksBehindParent, false ); + + QString pinId = pin->pinId(); + QString type = mcuPin->ptype(); + if ( pinId.contains( "GND" ) ) // Gnd Pins + { + mcuPin->setImp( 0.01 ); + } + else if( pinId.contains( "V3V" ) ) // 3.3V Pins + { + mcuPin->setImp( 0.1 ); + mcuPin->setVoltHigh( 3.3 ); + mcuPin->setVoltLow( 3.3 ); + } + else if( pinId.contains( "V5V" ) ) // 5V Pins + { + mcuPin->setImp( 0.1 ); + mcuPin->setVoltHigh( 5 ); + mcuPin->setVoltLow( 5 ); + } + else if( pinId.contains( "Vin" ) ) // Vin Pins ( 12 V ) + { + mcuPin->setImp( 0.1 ); + mcuPin->setVoltHigh( 12 ); + mcuPin->setVoltLow( 12 ); + } + else if( type.contains( "led" ) ) // Pin 13 + { + //pin->setEnode( m_boardLedEnode ); + m_pb5Pin = pin; + } + else if( pinId.toUpper().contains( "RST" ) ) // Reset Pins + { + mcuPin->setImp( 20000 ); + mcuPin->setVoltHigh( 5 ); + mcuPin->setVoltLow( 5 ); + } + } +} + +void Arduino::attachPins() +{ + AvrProcessor *ap = dynamic_cast( m_processor ); + avr_t *cpu = ap->getCpu(); + + for( int i = 0; i < m_numpins; i++ ) + { + AVRComponentPin *pin = dynamic_cast( m_pinList[i] ); + pin->attach( cpu ); + } + cpu->vcc = 5000; + cpu->avcc = 5000; + + // Registra IRQ para recibir petiones de voltaje de pin ( usado en ADC ) + avr_irq_t* adcIrq = avr_io_getirq( cpu, AVR_IOCTL_ADC_GETIRQ, ADC_IRQ_OUT_TRIGGER ); + avr_irq_register_notify( adcIrq, adc_hook, this ); + + m_attached = true; +} + +void Arduino::addPin( QString id, QString type, QString label, int pos, int xpos, int ypos, int angle ) +{ + //qDebug()<adcread(); +} + +void Arduino::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + int ox = m_area.x(); + int oy = m_area.y(); + + p->drawPixmap( ox, oy, QPixmap( m_BackGround )); +} + +#include "moc_arduino.cpp" diff --git a/src/gui/circuitwidget/components/mcu/arduino.h b/src/gui/circuitwidget/components/mcu/arduino.h new file mode 100644 index 0000000..b8b79da --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/arduino.h @@ -0,0 +1,82 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef ARDUINO_H +#define ARDUINO_H + +#include "avrcomponentpin.h" +#include "mcucomponent.h" +#include "avrprocessor.h" +#include "ledsmd.h" +#include "e-source.h" +#include "e-node.h" +#include "itemlibrary.h" + + +class Arduino : public McuComponent +{ + Q_OBJECT + + public: + + Arduino( QObject* parent, QString type, QString id ); + ~Arduino(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem * libraryItem(); + + void initialize(); + + int getRamValue( int address ); + + void adcread( int channel ); + + void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + static void adc_hook( struct avr_irq_t* irq, uint32_t value, void* param ) + { + Q_UNUSED(irq); + // get the pointer out of param and asign it to AVRComponentPin* + Arduino* ptrArduino = reinterpret_cast (param); + + int channel = int( value/524288 ); + ptrArduino->adcread( channel ); + } + + public slots: + virtual void remove(); + + private: + void attachPins(); + void initBoard(); + void addPin( QString id, QString type, QString label, int pos, int xpos, int ypos, int angle ); + + eSource* m_ground; + eNode* m_groundEnode; + ePin* m_groundpin; + LedSmd* m_boardLed; + eNode* m_boardLedEnode; + Pin* m_pb5Pin; + + QHash m_ADCpinList; + + AvrProcessor m_avr; +}; + +#endif diff --git a/src/gui/circuitwidget/components/mcu/avrcomponent.cpp b/src/gui/circuitwidget/components/mcu/avrcomponent.cpp new file mode 100644 index 0000000..956357d --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/avrcomponent.cpp @@ -0,0 +1,113 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "avrcomponent.h" +#include "avrprocessor.h" +#include "itemlibrary.h" +#include "mainwindow.h" +#include "circuit.h" +#include "utils.h" + +LibraryItem* AVRComponent::libraryItem() +{ + return new LibraryItem( + tr("AVR"), + tr("Micro"), + "ic2.png", + "AVR", + AVRComponent::construct ); +} + +Component* AVRComponent::construct( QObject* parent, QString type, QString id ) +{ + if( m_canCreate ) + { + AVRComponent* avr = new AVRComponent( parent, type, id ); + if( m_error > 0 ) + { + Circuit::self()->compList()->removeOne( avr ); + avr->deleteLater(); + avr = 0l; + m_error = 0; + m_pSelf = 0l; + m_canCreate = true; + + } + return avr; + } + MessageBoxNB( tr("Error") + , tr("Only 1 Mcu allowed\n to be in the Circuit.") ); + + return 0l; +} + +AVRComponent::AVRComponent( QObject* parent, QString type, QString id ) + : McuComponent( parent, type, id ) +{ + m_pSelf = this; + m_processor = AvrProcessor::self(); + + initChip(); + if( m_error == 0 ) + { + setFreq( 16 ); + qDebug() <<" ..."<( m_processor ); + avr_t* cpu = ap->getCpu(); + + for( int i = 0; i < m_numpins; i++ ) + { + AVRComponentPin* pin = dynamic_cast( m_pinList[i] ); + pin->attach( cpu ); + } + cpu->vcc = 5000; + cpu->avcc = 5000; + + // Registra IRQ para recibir petiones de voltaje de pin ( usado en ADC ) + avr_irq_t* adcIrq = avr_io_getirq( cpu, AVR_IOCTL_ADC_GETIRQ, ADC_IRQ_OUT_TRIGGER ); + avr_irq_register_notify( adcIrq, adc_hook, this ); + + m_attached = true; +} + +void AVRComponent::addPin( QString id, QString type, QString label, int pos, int xpos, int ypos, int angle ) +{ + AVRComponentPin* newPin = new AVRComponentPin( this, id, type, label, pos, xpos, ypos, angle ); + m_pinList.append( newPin ); + + if( type.startsWith("adc") ) m_ADCpinList[type.remove("adc").toInt()] = newPin; +} + +void AVRComponent::adcread( int channel ) +{ + AVRComponentPin* pin = m_ADCpinList.value(channel); + if( pin ) pin->adcread(); +} + +#include "moc_avrcomponent.cpp" diff --git a/src/gui/circuitwidget/components/mcu/avrcomponent.h b/src/gui/circuitwidget/components/mcu/avrcomponent.h new file mode 100644 index 0000000..59c322f --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/avrcomponent.h @@ -0,0 +1,67 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef AVRCOMPONENT_H +#define AVRCOMPONENT_H + + +#include "mcucomponent.h" +#include "avrcomponentpin.h" +#include "avrprocessor.h" +#include "itemlibrary.h" + +struct avr_t; + +class AVRComponent : public McuComponent +{ + Q_OBJECT + + public: + + AVRComponent( QObject* parent, QString type, QString id ); + ~AVRComponent(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem * libraryItem(); + + int getRamValue( int address ); + + void adcread( int channel ); + + static void adc_hook( struct avr_irq_t* irq, uint32_t value, void* param ) + { + Q_UNUSED(irq); + // get the pointer out of param and asign it to AVRComponentPin* + AVRComponent* ptrAVRComponent = reinterpret_cast (param); + + int channel = int( value/524288 ); + ptrAVRComponent->adcread( channel ); + } + + private: + void attachPins(); + void addPin( QString id, QString type, QString label, int pos, int xpos, int ypos, int angle ); + + QHash m_ADCpinList; + + AvrProcessor m_avr; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/mcu/avrcomponentpin.cpp b/src/gui/circuitwidget/components/mcu/avrcomponentpin.cpp new file mode 100644 index 0000000..fdb20cf --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/avrcomponentpin.cpp @@ -0,0 +1,242 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "avrcomponentpin.h" +#include "baseprocessor.h" +#include "simulator.h" + +AVRComponentPin::AVRComponentPin( McuComponent* mcu, QString id, QString type, QString label, int pos, int xpos, int ypos, int angle ) + : McuComponentPin( mcu, id, type, label, pos, xpos, ypos, angle ) +{ + m_channel = -1; + m_isInput = true; +} +AVRComponentPin::~AVRComponentPin(){} + +void AVRComponentPin::attach( avr_t* AvrProcessor ) +{ + m_AvrProcessor = AvrProcessor; + + if( m_id.startsWith("P") ) + { + m_pinType = 1; + m_port = m_id.at(1).toLatin1(); + m_pinN = m_id.mid(2,1).toInt(); + + // PORTX Register change irq + QString portName = "PORT"; + portName.append( m_id.at(1) ); + int portAddr = BaseProcessor::self()->getRegAddress( portName ); + if( portAddr < 0 ) + { + qDebug() << tr("Register descriptor file for this AVR processor %1 is corrupted - cannot attach pin").arg(AvrProcessor->mmcu) + << portName << m_pinN + ; + return; + } + m_PortRegChangeIrq = avr_iomem_getirq( AvrProcessor, + portAddr, + &m_port, + m_pinN ); + + avr_irq_register_notify( m_PortRegChangeIrq, port_reg_hook, this ); + + // By now need this for pwm to work + m_PortChangeIrq = avr_io_getirq( AvrProcessor, AVR_IOCTL_IOPORT_GETIRQ( m_port ), m_pinN ); + avr_irq_register_notify( m_PortChangeIrq, port_hook, this ); + + // DDRX Register change irq + QString ddrName = "DDR"; + ddrName.append( m_id.at(1) ); + int ddrAddr = BaseProcessor::self()->getRegAddress( ddrName ); + if( ddrAddr < 0 ) + { + qDebug() << tr("Register descriptor file for this AVR processor %1 is corrupted - cannot attach pin \n").arg(AvrProcessor->mmcu) + << ddrName << m_pinN + ; + return; + } + m_DdrRegChangeIrq = avr_iomem_getirq( AvrProcessor, + ddrAddr, + " ", + m_pinN ); + + avr_irq_register_notify( m_DdrRegChangeIrq, ddr_hook, this ); + + //qDebug() << m_port << m_pinN; + + m_Write_stat_irq = avr_io_getirq( AvrProcessor, AVR_IOCTL_IOPORT_GETIRQ(m_port), m_pinN ); + /*m_Write_stat_irq = avr_alloc_irq(&AvrProcessor->irq_pool, 0, 1, NULL); + avr_connect_irq( + m_Write_stat_irq, + avr_io_getirq(AvrProcessor, AVR_IOCTL_IOPORT_GETIRQ(m_port), m_pinN));*/ + + if( m_type.startsWith("adc") ) + { + m_channel = m_type.right(1).toInt(); + m_Write_adc_irq = avr_io_getirq( m_AvrProcessor, AVR_IOCTL_ADC_GETIRQ, m_channel); + } + +#ifdef AVR_IOPORT_INTRN_PULLUP_IMP + // If we wish to take full control over pull-ups, + // we can turn off the simavr internall pull-ups support. + avr_irq_t *src_imp_irq = avr_io_getirq( m_AvrProcessor, AVR_IOCTL_IOPORT_GETIRQ(m_port), m_pinN + IOPORT_IRQ_PIN0_SRC_IMP); + avr_raise_irq_float(src_imp_irq, 0, true); + // Otherwise it is active and can "override" our handling in some situations. + // Verify tests/pullup_disconnect/pullup_disconnect.ino with digitalWrite(1, x) lines uncommented +#endif //AVR_IOPORT_INTRN_PULLUP_IMP + } + else if( m_type == "reset" ) + { + m_pinType = 21; + } + else if( m_type == "vcc" ) + { + m_pinType = 22; + } + else if( m_type == "avcc" ) + { + m_pinType = 23; + } + else if( m_type == "aref" ) + { + m_pinType = 24; + } + m_attached = true; + + resetState(); +} + +void AVRComponentPin::resetState() +{ + if( m_pinType == 1 ) // Initialize irq flags + { + if( m_PortRegChangeIrq && m_DdrRegChangeIrq ) + { + m_PortChangeIrq->flags |= IRQ_FLAG_INIT; + m_PortRegChangeIrq->flags |= IRQ_FLAG_INIT; + m_DdrRegChangeIrq->flags |= IRQ_FLAG_INIT; + } + else + { + qDebug() << tr("Pin is not initialized properly:") + << m_port << m_pinN; + } + } +} + +void AVRComponentPin::setVChanged() +{ + float volt = m_ePin[0]->getVolt(); + + //qDebug() << m_id << m_type << volt; + if( m_pinType == 1 ) // Is an IO Pin + { + if( volt > 2.5 ) avr_raise_irq(m_Write_stat_irq, 1); + else avr_raise_irq(m_Write_stat_irq, 0); + } + else if( m_pinType == 21 ) // reset + { + if( volt < 3 ) BaseProcessor::self()->hardReset( true ); + else BaseProcessor::self()->hardReset( false ); + } + else if( m_pinType == 22 ) { m_AvrProcessor->vcc = volt*1000;} + else if( m_pinType == 23 ) { m_AvrProcessor->avcc = volt*1000;} + else if( m_pinType == 24 ) { m_AvrProcessor->aref = volt*1000;} +} + +void AVRComponentPin::setPullup( uint32_t value ) +{ + if( !m_isInput ) return; + + //qDebug() << "Port" << m_port << m_id << " pullup: " << (value>0); + + if( value>0 ) // Activate pullup + { + eSource::setImp( 1e5 ); + m_voltOut = m_voltHigh; + } + else // Deactivate pullup + { + eSource::setImp( high_imp ); + m_voltOut = m_voltLow; + } + if( !(m_ePin[0]->isConnected()) ) + { + avr_raise_irq( m_Write_stat_irq, (value>0)? 1:0 ); + return; + } + + m_ePin[0]->stampCurrent( m_voltOut/m_imp ); + //if( m_ePin[0]->getEnode()->needFastUpdate() ) + { + Simulator::self()->runExtraStep(); + } +} + +void AVRComponentPin::set_pinVoltage( uint32_t value ) +{ + if( m_isInput ) return; + + //if( m_isInput ) setPullup( value>0 ); // Activate pullup when port is written while input + + if( value > 0 ) m_voltOut = m_voltHigh; + else m_voltOut = m_voltLow; + + if( !(m_ePin[0]->isConnected()) ) return; + + //qDebug() << "\nPort" << m_port << m_id << " estado: " << value< 0 ); + eSource::stampOutput(); + //m_ePin[0]->stampCurrent( m_voltOut/m_imp ); // Save some calls + //if( m_ePin[0]->getEnode()->needFastUpdate() ) + { + Simulator::self()->runExtraStep(); + } +} + +void AVRComponentPin::set_pinImpedance( uint32_t value ) +{ + //qDebug() << "Port" << m_port << m_id << " salida: " << (value > 0 ); + + if( value > 0 ) // Pis is Output + { + m_isInput = false; + eSource::setImp( 40 ); + if( m_ePin[0]->isConnected() && m_attached ) + m_ePin[0]->getEnode()->remFromChangedFast(this); + } + else // Pin is Input + { + m_isInput = true; + eSource::setImp( high_imp ); + if( m_ePin[0]->isConnected() && m_attached ) + m_ePin[0]->getEnode()->addToChangedFast(this); + } + //qDebug()<< m_id << "Port" << m_port << m_pinN << " salida: " << (value and ( 1<getVolt()*1000 ; + avr_raise_irq( m_Write_adc_irq, m_ePin[0]->getVolt()*1000 ); +} + +#include "moc_avrcomponentpin.cpp" diff --git a/src/gui/circuitwidget/components/mcu/avrcomponentpin.h b/src/gui/circuitwidget/components/mcu/avrcomponentpin.h new file mode 100644 index 0000000..c068e4a --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/avrcomponentpin.h @@ -0,0 +1,98 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef AVRCOMPONENTPIN_H +#define AVRCOMPONENTPIN_H + +#include + +#include "mcucomponentpin.h" + +//simavr includes +#include "sim_avr.h" +#include "sim_irq.h" +#include "sim_io.h" +#include "avr_adc.h" +#include "avr_ioport.h" +#include "avr_timer.h" + + +class AVRComponentPin : public McuComponentPin +{ + Q_OBJECT + public: + AVRComponentPin( McuComponent *mcu, QString id, QString type, QString label, int pos, int xpos, int ypos, int angle ); + ~AVRComponentPin(); + + void attach( avr_t * AvrProcessor ); + + void set_pinVoltage( uint32_t value ); + + void set_pinImpedance( uint32_t value ); + + void resetOutput(); + + void setVChanged(); + + void adcread(); + + virtual void resetState(); + + static void port_hook( struct avr_irq_t* irq, uint32_t value, void* param ) + { + Q_UNUSED(irq); + // get the pointer out of param and asign it to AVRComponentPin* + AVRComponentPin* ptrAVRComponentPin = reinterpret_cast (param); + + ptrAVRComponentPin->set_pinVoltage(value); + } + + static void port_reg_hook( struct avr_irq_t* irq, uint32_t value, void* param ) + { + Q_UNUSED(irq); + // get the pointer out of param and asign it to AVRComponentPin* + AVRComponentPin* ptrAVRComponentPin = reinterpret_cast (param); + + ptrAVRComponentPin->setPullup(value); + } + + static void ddr_hook( struct avr_irq_t* irq, uint32_t value, void* param ) + { + Q_UNUSED(irq); + // get the pointer out of param and asign it to AVRComponentPin* + AVRComponentPin * ptrAVRComponentPin = reinterpret_cast (param); + + ptrAVRComponentPin->set_pinImpedance(value); + } + + protected: + void setPullup( uint32_t value ); + + int m_channel; + + //from simavr + avr_t* m_AvrProcessor; + avr_irq_t* m_PortChangeIrq; + avr_irq_t* m_PortRegChangeIrq; + avr_irq_t* m_DdrRegChangeIrq; + avr_irq_t* m_Write_stat_irq; + avr_irq_t* m_Write_adc_irq; +}; + +#endif diff --git a/src/gui/circuitwidget/components/mcu/mcucomponent.cpp b/src/gui/circuitwidget/components/mcu/mcucomponent.cpp new file mode 100644 index 0000000..6bd3f1c --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/mcucomponent.cpp @@ -0,0 +1,386 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include +#include +#include + +#include "mainwindow.h" +#include "mcucomponent.h" +#include "mcucomponentpin.h" +#include "baseprocessor.h" +#include "terminalwidget.h" +#include "componentselector.h" +#include "circuitwidget.h" +#include "circuit.h" +#include "connector.h" +#include "simulator.h" +#include "utils.h" + + +static const char* McuComponent_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Program") +}; + +McuComponent* McuComponent::m_pSelf = 0l; +bool McuComponent::m_canCreate = true; + +McuComponent::McuComponent( QObject* parent, QString type, QString id ) + : Chip( parent, type, id ) + , MemData() +{ + Q_UNUSED( McuComponent_properties ); + + qDebug() << " Initializing"<settings(); + m_lastFirmDir = settings->value("lastFirmDir").toString(); + + if( m_lastFirmDir.isEmpty() ) + m_lastFirmDir = QCoreApplication::applicationDirPath(); +} +McuComponent::~McuComponent() {} + +void McuComponent::initChip() +{ + QString compName = m_id.split("-").first(); // for example: "atmega328-1" to: "atmega328" + + QString dataFile = ComponentSelector::self()->getXmlFile( compName ); + + QFile file( dataFile ); + + if(( dataFile == "" ) || ( !file.exists() )) + { + m_error = 1; + return; + } + if( !file.open(QFile::ReadOnly | QFile::Text) ) + { + MessageBoxNB( "Error", tr("Cannot read file %1:\n%2.").arg(dataFile).arg(file.errorString()) ); + m_error = 1; + return; + } + QDomDocument domDoc; + + if( !domDoc.setContent(&file) ) + { + MessageBoxNB( "Error", tr("Cannot set file %1\nto DomDocument").arg(dataFile) ); + file.close(); + m_error = 1; + return; + } + file.close(); + + QDomElement root = domDoc.documentElement(); + QDomNode rNode = root.firstChild(); + QString package; + + while( !rNode.isNull() ) + { + QDomElement element = rNode.toElement(); + QDomNode node = element.firstChild(); + + while( !node.isNull() ) + { + QDomElement element = node.toElement(); + if( element.attribute("name")==compName ) + { + // Get package file + QDir dataDir( dataFile ); + dataDir.cdUp(); // Indeed it doesn't cd, just take out file name + m_pkgeFile = dataDir.filePath( element.attribute( "package" ) )+".package"; + + // Get device + m_device = element.attribute( "device" ); + m_processor->setDevice( m_device ); + + // Get data file + QString dataFile = dataDir.filePath( element.attribute( "data" ) )+".data"; + + m_processor->setDataFile( dataFile ); + if( element.hasAttribute( "icon" ) ) m_BackGround = ":/" + element.attribute( "icon" ); + + break; + } + node = node.nextSibling(); + } + rNode = rNode.nextSibling(); + } + if( m_device != "" ) Chip::initChip(); + else + { + m_error = 1; + qDebug() << compName << "ERROR!! McuComponent::initChip Chip not Found: " << package; + } +} + +double McuComponent::freq() +{ + return m_freq; +} +void McuComponent::setFreq( double freq ) +{ + if ( freq < 0 ) freq = 0; + else if( freq > 100 ) freq = 100; + + BaseProcessor::self()->setSteps( freq ); + m_freq = freq; +} + +void McuComponent::reset() +{ + for ( int i = 0; i < m_pinList.size(); i++ ) // Reset pins states + m_pinList[i]->resetOutput(); + + m_processor->reset(); +} + +void McuComponent::terminate() +{ + qDebug() <<" Terminating"<terminate(); + for( int i=0; iterminate(); + m_pSelf = 0l; + //reset(); + qDebug() <<" ..."<pin(); + if( pin->connector() ) pin->connector()->remove(); + //delete mcupin; + } + slotCloseTerm(); + slotCloseSerial(); + terminate(); + m_pinList.clear(); + + m_canCreate = true; + + Component::remove(); +} + +void McuComponent::contextMenuEvent( QGraphicsSceneContextMenuEvent* event ) +{ + if( !acceptedMouseButtons() ) event->ignore(); + else + { + event->accept(); + QMenu* menu = new QMenu(); + contextMenu( event, menu ); + menu->deleteLater(); + } +} + +void McuComponent::contextMenu( QGraphicsSceneContextMenuEvent* event, QMenu* menu ) +{ + QAction* loadAction = menu->addAction( QIcon(":/load.png"),tr("Load firmware") ); + connect( loadAction, SIGNAL(triggered()), this, SLOT(slotLoad()) ); + + QAction* reloadAction = menu->addAction( QIcon(":/reload.png"),tr("Reload firmware") ); + connect( reloadAction, SIGNAL(triggered()), this, SLOT(slotReload()) ); + + QAction* loadDAction = menu->addAction( QIcon(":/load.png"),tr("Load EEPROM data") ); + connect( loadDAction, SIGNAL(triggered()), this, SLOT(loadData()) ); + + QAction* saveDAction = menu->addAction(QIcon(":/save.png"), tr("Save EEPROM data") ); + connect( saveDAction, SIGNAL(triggered()), this, SLOT(saveData()) ); + + menu->addSeparator(); + + QAction* openTerminal = menu->addAction( QIcon(":/terminal.png"),tr("Open Serial Monitor.") ); + connect( openTerminal, SIGNAL(triggered()), this, SLOT(slotOpenTerm()) ); + + QAction* closeTerminal = menu->addAction( QIcon(":/closeterminal.png"),tr("Close Serial Monitor") ); + connect( closeTerminal, SIGNAL(triggered()), this, SLOT(slotCloseTerm()) ); + + QAction* openSerial = menu->addAction( QIcon(":/terminal.png"),tr("Open Serial Port.") ); + connect( openSerial, SIGNAL(triggered()), this, SLOT(slotOpenSerial()) ); + + QAction* closeSerial = menu->addAction( QIcon(":/closeterminal.png"),tr("Close Serial Port") ); + connect( closeSerial, SIGNAL(triggered()), this, SLOT(slotCloseSerial()) ); + + menu->addSeparator(); + + Component::contextMenu( event, menu ); +} + +void McuComponent::slotOpenSerial() +{ + CircuitWidget::self()->showSerialPortWidget( true ); + m_processor->setSerPort( true ); + m_serPort = true; +} + +void McuComponent::slotCloseSerial() +{ + CircuitWidget::self()->showSerialPortWidget( false ); + m_processor->setSerPort( false ); + m_serPort = false; +} + +void McuComponent::slotOpenTerm() +{ + TerminalWidget::self()->setVisible( true ); + m_processor->setUsart( true ); + m_serMon = true; +} + +void McuComponent::slotCloseTerm() +{ + TerminalWidget::self()->setVisible( false ); + m_processor->setUsart( false ); + m_serMon = false; +} + +void McuComponent::slotLoad() +{ + const QString dir = m_lastFirmDir; + QString fileName = QFileDialog::getOpenFileName( 0l, tr("Load Firmware"), dir, + tr("Hex Files (*.hex);;ELF Files (*.elf);;All files (*.*)")); + + if( fileName.isEmpty() ) return; // User cancels loading + + load( fileName ); +} + +void McuComponent::slotReload() +{ + if( m_processor->getLoadStatus() ) load( m_symbolFile ); + else QMessageBox::warning( 0, tr("No File:"), tr("No File to reload ") ); +} + +void McuComponent::load( QString fileName ) +{ + QDir circuitDir = QFileInfo(Circuit::self()->getFileName()).absoluteDir(); + QString fileNameAbs = circuitDir.absoluteFilePath(fileName); + QString cleanPathAbs = circuitDir.cleanPath(fileNameAbs); + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + if( m_processor->loadFirmware( cleanPathAbs ) ) + { + if( !m_attached ) attachPins(); + reset(); + + m_symbolFile = circuitDir.relativeFilePath( fileName ); + m_lastFirmDir = cleanPathAbs; + + QSettings* settings = MainWindow::self()->settings(); + settings->setValue( "lastFirmDir", m_symbolFile ); + } + //else QMessageBox::warning( 0, tr("Error:"), tr("Could not load: \n")+ fileName ); + + if( pauseSim ) Simulator::self()->runContinuous(); +} + +void McuComponent::setProgram( QString pro ) +{ + if( pro == "" ) return; + m_symbolFile = pro; + + QDir circuitDir = QFileInfo(Circuit::self()->getFileName()).absoluteDir(); + QString fileNameAbs = circuitDir.absoluteFilePath(m_symbolFile); + + if( QFileInfo::exists( fileNameAbs ) // Load firmware at circuit load + && !m_processor->getLoadStatus()) + { + load( m_symbolFile ); + } +} + +bool McuComponent::serPort() +{ + return m_serPort; +} + +void McuComponent::setSerPort( bool set ) +{ + if( set ) slotOpenSerial(); + else slotCloseSerial(); +} + +bool McuComponent::serMon() +{ + return m_serMon; +} + +void McuComponent::setSerMon( bool set ) +{ + if( set ) slotOpenTerm(); + else slotCloseTerm(); +} + +void McuComponent::setEeprom( QVector eep ) +{ + m_processor->setEeprom( eep ); +} + +QVector McuComponent::eeprom() +{ + QVector eep = m_processor->eeprom(); + return eep; +} + +void McuComponent::loadData() +{ + QVector data; + + bool resize = false; + if( !m_processor->getLoadStatus() ) resize = true; // No eeprom initialized yet + + MemData::loadData( &data, resize ); + m_processor->setEeprom( data ); +} + +void McuComponent::saveData() +{ + QVector data = m_processor->eeprom(); + MemData::saveData( data ); +} + +void McuComponent::setLogicSymbol( bool ls ) +{ + return; + +} + +void McuComponent::paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + Chip::paint( p, option, widget ); +} + +#include "moc_mcucomponent.cpp" diff --git a/src/gui/circuitwidget/components/mcu/mcucomponent.h b/src/gui/circuitwidget/components/mcu/mcucomponent.h new file mode 100644 index 0000000..a25e26f --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/mcucomponent.h @@ -0,0 +1,111 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef MCUCOMPONENT_H +#define MCUCOMPONENT_H + +#include + +#include "chip.h" +#include "memdata.h" + + +class BaseProcessor; +class McuComponentPin; + +class MAINMODULE_EXPORT McuComponent : public Chip, public MemData +{ + Q_OBJECT + Q_PROPERTY( QVector eeprom READ eeprom WRITE setEeprom ) + Q_PROPERTY( QString Program READ program WRITE setProgram DESIGNABLE true USER true ) + Q_PROPERTY( double Mhz READ freq WRITE setFreq DESIGNABLE true USER true ) + Q_PROPERTY( bool Ser_Port READ serPort WRITE setSerPort ) + Q_PROPERTY( bool Ser_Monitor READ serMon WRITE setSerMon ) + + public: + + McuComponent( QObject* parent, QString type, QString id ); + ~McuComponent(); + + static McuComponent* self() { return m_pSelf; } + + QString program() const { return m_symbolFile; } + void setProgram( QString pro ); + + QString device() { return m_device; } + + double freq(); + virtual void setFreq( double freq ); + virtual void initChip(); + + bool serPort(); + void setSerPort( bool set ); + + bool serMon(); + void setSerMon( bool set ); + + void setEeprom(QVector eep ); + QVector eeprom(); + + virtual void setLogicSymbol( bool ls ); + + QList getPinList() { return m_pinList; } + + virtual void paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + public slots: + virtual void terminate(); + virtual void remove(); + virtual void reset(); + virtual void load( QString fileName ); + void slotLoad(); + void slotReload(); + void slotOpenTerm(); + void slotCloseTerm(); + void slotOpenSerial(); + void slotCloseSerial(); + void loadData(); + void saveData(); + + void contextMenu( QGraphicsSceneContextMenuEvent* event, QMenu* menu ); + + protected: + static McuComponent* m_pSelf; + static bool m_canCreate; + + virtual void contextMenuEvent(QGraphicsSceneContextMenuEvent* event); + + virtual void addPin( QString id, QString type, QString label, int pos, int xpos, int ypos, int angle )=0; + virtual void attachPins()=0; + + BaseProcessor* m_processor; + + double m_freq; // Clock Frequency Mhz + + bool m_attached; + bool m_serPort; + bool m_serMon; + + QString m_device; // Name of device + QString m_symbolFile; // firmware file loaded + QString m_lastFirmDir; // Last firmware folder used + + QList m_pinList; +}; +#endif diff --git a/src/gui/circuitwidget/components/mcu/mcucomponentpin.cpp b/src/gui/circuitwidget/components/mcu/mcucomponentpin.cpp new file mode 100644 index 0000000..3f98603 --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/mcucomponentpin.cpp @@ -0,0 +1,100 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "mcucomponentpin.h" + + +McuComponentPin::McuComponentPin( McuComponent *mcuComponent, QString id, QString type, QString label, int pos, int xpos, int ypos, int angle ) + : QObject( mcuComponent ) + , eSource( id.toStdString(), 0l ) +{ + m_id = id; + m_type = type; + m_angle = angle; + + m_pinType = 0; + + m_mcuComponent = mcuComponent; + + m_attached = false; + m_isInput = true; + m_openColl = false; + + Pin* pin = new Pin( angle, QPoint (xpos, ypos), mcuComponent->itemID()+"-"+id, pos, m_mcuComponent ); + pin->setLabelText( label ); + m_ePin[0] = pin; + + eSource::setImp( high_imp ); + eSource::setVoltHigh( 5 ); + eSource::setOut( false ); + + type = type.toLower(); + if( type == "gnd" + || type == "vdd" + || type == "vcc" + || type == "unused" + || type == "nc" ) + pin->setUnused( true ); + + resetState(); +} + +McuComponentPin::~McuComponentPin() +{ +} + +void McuComponentPin::terminate() +{ + m_attached = false; +} + +void McuComponentPin::resetState() +{ + if( m_pinType == 1 ) + { + eSource::setImp( high_imp );// All IO Pins should be inputs at start-up + eSource::setOut(false); + eSource::stamp(); + } +} + +void McuComponentPin::initialize() +{ + //if( m_pinType == 1 ) eSource::setImp( high_imp );// All IO Pins should be inputs at start-up + + if( m_ePin[0]->isConnected() && m_attached ) + m_ePin[0]->getEnode()->addToChangedFast(this); + + //if( m_pinType == 21 ) BaseProcessor::self()->hardReset( true ); + eSource::initialize(); +} + +void McuComponentPin::resetOutput() +{ + eSource::setOut(false); + eSource::stampOutput(); +} + +void McuComponentPin::move( int dx, int dy ) +{ + pin()->moveBy( dx, dy ); +} + + +#include "moc_mcucomponentpin.cpp" diff --git a/src/gui/circuitwidget/components/mcu/mcucomponentpin.h b/src/gui/circuitwidget/components/mcu/mcucomponentpin.h new file mode 100644 index 0000000..f887f4d --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/mcucomponentpin.h @@ -0,0 +1,68 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef MCUCOMPONENTPIN_H +#define MCUCOMPONENTPIN_H + +#include "mcucomponent.h" +#include "e-source.h" +#include "pin.h" + + +class MAINMODULE_EXPORT McuComponentPin : public QObject, public eSource +{ + Q_OBJECT + public: + McuComponentPin( McuComponent *mcu, QString id, QString type, QString label, int pos, int xpos, int ypos, int angle ); + ~McuComponentPin(); + + Pin* pin() const { return ( static_cast(m_ePin[0]) ); } + + virtual void initialize(); + virtual void resetState(); + void terminate(); + + void move( int dx, int dy ); + + void resetOutput(); + + int angle() { return m_angle;} + + QString ptype() { return m_type; } + + protected: + McuComponent* m_mcuComponent; + + bool m_attached; + bool m_isInput; + bool m_openColl; + + char m_port; + int m_pinN; + + int m_pinType; + int m_angle; + + QString m_type; + QString m_id; +}; + +#endif + + diff --git a/src/gui/circuitwidget/components/mcu/piccomponent.cpp b/src/gui/circuitwidget/components/mcu/piccomponent.cpp new file mode 100644 index 0000000..00f4a45 --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/piccomponent.cpp @@ -0,0 +1,100 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + + +#include "piccomponent.h" +#include "piccomponentpin.h" +#include "mainwindow.h" +#include "circuit.h" +#include "utils.h" + +LibraryItem* PICComponent::libraryItem() +{ + return new LibraryItem( + "PIC", + tr("Micro"), + "ic2.png", + "PIC", + PICComponent::construct ); +} + +Component* PICComponent::construct( QObject* parent, QString type, QString id ) +{ + if( m_canCreate ) + { + PICComponent* pic = new PICComponent( parent, type, id ); + if( m_error > 0 ) + { + Circuit::self()->removeComp( pic ); + pic = 0l; + m_error = 0; + m_pSelf = 0l; + m_canCreate = true; + } + return pic; + } + MessageBoxNB( tr("Error") + , tr("Only 1 Mcu allowed\n to be in the Circuit.") ); + + return 0l; +} + +PICComponent::PICComponent( QObject* parent, QString type, QString id ) + : McuComponent( parent, type, id ) +{ + m_pSelf = this; + m_processor = PicProcessor::self(); + + //if( m_id.startsWith("PIC") ) m_id.replace( "PIC", "pic16f876" ); + + initChip(); + if( m_error == 0 ) + { + setFreq( 20 ); + + qDebug() <<" ..."<( m_processor ); + pic_processor* cpu = ap->getCpu(); + + for( int i=0; i < m_numpins; i++ ) + { + PICComponentPin* pin = dynamic_cast( m_pinList[i] ); + pin->attach( cpu ); + } + m_attached = true; +} + +void PICComponent::addPin( QString id, QString type, QString label, int pos, int xpos, int ypos, int angle ) +{ + m_pinList.append( new PICComponentPin( this, id, type, label, pos, xpos, ypos, angle ) ); +} + +#include "moc_piccomponent.cpp" + + diff --git a/src/gui/circuitwidget/components/mcu/piccomponent.h b/src/gui/circuitwidget/components/mcu/piccomponent.h new file mode 100644 index 0000000..60b079a --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/piccomponent.h @@ -0,0 +1,50 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef PICCOMPONENT_H +#define PICCOMPONENT_H + +#include "mcucomponent.h" +#include "picprocessor.h" +#include "itemlibrary.h" + + +class PICComponent : public McuComponent +{ + Q_OBJECT + + public: + + PICComponent( QObject* parent, QString type, QString id ); + ~PICComponent(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem * libraryItem(); + + int getRamValue( int address ); + + private: + void attachPins(); + void addPin( QString id, QString type, QString label, int pos, int xpos, int ypos, int angle ); + + PicProcessor m_pic; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/mcu/piccomponentpin.cpp b/src/gui/circuitwidget/components/mcu/piccomponentpin.cpp new file mode 100644 index 0000000..b492d85 --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/piccomponentpin.cpp @@ -0,0 +1,175 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include +#include + +#include "piccomponentpin.h" +#include "piccomponent.h" +#include "baseprocessor.h" +#include "simulator.h" + +#include "stimuli.h" +#include "ioports.h" +#include "pic-processor.h" + +PICComponentPin::PICComponentPin( McuComponent* mcu, QString id, QString type, QString label, int pos, int xpos, int ypos, int angle ) + : McuComponentPin( mcu, id, type, label, pos, xpos, ypos, angle ) +{ + m_pos = pos; + m_PicProcessor = 0l; + m_pIOPIN = 0l; +} +PICComponentPin::~PICComponentPin(){} + +void PICComponentPin::attach( pic_processor *PicProcessor ) +{ + if( m_PicProcessor ) return; + + m_PicProcessor = PicProcessor; + + IOPIN* iopin = m_PicProcessor->get_pin( m_pos ); + + if( m_id.startsWith("R") || m_id.startsWith("GP") ) + { + m_pinType = 1; + + m_port = m_id.at(1).toLatin1(); + m_pinN = m_id.mid(2,1).toInt(); + + if( !iopin ) + { + qDebug() << "PICComponentPin::attach : iopin is NULL: "<< m_id << endl; + return; + } + if( m_pIOPIN ) + { + qDebug() << "PICComponentPin::attach :Already have an iopin" << endl; + return; + } + m_pIOPIN = iopin; + m_pIOPIN->setPicPin( this ); + if( m_pIOPIN->getType() == OPEN_COLLECTOR ) + { + m_openColl = true; + eSource::setVoltHigh( 0 ); + } + } + else if( m_id.startsWith("MCLR") ) + { + m_pinType = 21; + } + m_attached = true; +} + +void PICComponentPin::setVChanged() +{ + if( !m_isInput ) return; // Nothing to do if pin is output + + double volt = m_ePin[0]->getVolt(); + //qDebug() << "PICComponentPin::setVChanged "<< m_id <set_nodeVoltage(volt); + } + else if( m_pinType == 21 ) // reset + { + if( volt < 3 ) BaseProcessor::self()->hardReset( true ); + else BaseProcessor::self()->hardReset( false ); + } +} + +void PICComponentPin::update_direction( bool out ) +{ + //qDebug() << "PICComponentPin::update_direction "<< m_id << out; + m_isInput = !out; + + if( out ) + { + eSource::setImp( 40 ); + if( m_ePin[0]->isConnected() && m_attached ) + m_ePin[0]->getEnode()->remFromChangedFast(this); + } + else + { + eSource::setImp( high_imp ); + if( m_ePin[0]->isConnected() && m_attached ) + m_ePin[0]->getEnode()->addToChangedFast(this); + } +} + +void PICComponentPin::update_pullup( bool pullup ) +{ + if( !m_isInput ) return; + + //qDebug() << "PICComponentPin::update_pullup "<< m_id << pullup; + + if( pullup ) // Activate pullup + { + eSource::setImp( 1e5 ); + m_voltOut = m_voltHigh; + } + else // Deactivate pullup + { + eSource::setImp( high_imp ); + m_voltOut = m_voltLow; + } + if( !(m_ePin[0]->isConnected()) ) + { + m_pIOPIN->set_nodeVoltage( pullup ? 5:0); + return; + } + + m_ePin[0]->stampCurrent( m_voltOut/m_imp ); + //if( m_ePin[0]->getEnode()->needFastUpdate() ) + { + Simulator::self()->runExtraStep(); + } +} + +void PICComponentPin::update_state( bool state ) +{ + //qDebug() << "PICComponentPin::update_state "<< m_id << state << m_openColl; + if( !(m_ePin[0]->isConnected()) ) return; + if( m_isInput ) return; + + if( state == m_state ) return; + m_state = state; + + if( m_openColl ) + { + if( state ) eSource::setImp( high_imp ); + else eSource::setImp( 40 ); + + stamp(); + } + else + { + eSource::setOut( state ); + eSource::stampOutput(); + } + + //if( m_ePin[0]->getEnode()->needFastUpdate() ) + { + Simulator::self()->runExtraStep(); + } +} + +#include "moc_piccomponentpin.cpp" diff --git a/src/gui/circuitwidget/components/mcu/piccomponentpin.h b/src/gui/circuitwidget/components/mcu/piccomponentpin.h new file mode 100644 index 0000000..a56396b --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/piccomponentpin.h @@ -0,0 +1,57 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + + +#ifndef PICCOMPONENTPIN_H +#define PICCOMPONENTPIN_H + +#include "mcucomponentpin.h" + +class pic_processor; +class IOPIN; + +class PICComponentPin : public McuComponentPin +{ + Q_OBJECT + public: + PICComponentPin( McuComponent *mcu, QString id, QString type, QString label, int pos, int xpos, int ypos, int angle ); + ~PICComponentPin(); + + void attach( pic_processor *PicProcessor ); + + void setVChanged(); + void resetOutput(); + + // GpSim Interface + void update_direction( bool out ); + void update_state( bool state ); + void update_pullup( bool pullup ); + + protected: + char m_port; + int m_pinN; + int m_pos; + + bool m_state; + + pic_processor *m_PicProcessor; + IOPIN *m_pIOPIN; +}; + +#endif diff --git a/src/gui/circuitwidget/components/mcu/sr04.cpp b/src/gui/circuitwidget/components/mcu/sr04.cpp new file mode 100644 index 0000000..f42c7c3 --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/sr04.cpp @@ -0,0 +1,177 @@ +/*************************************************************************** + * Copyright (C) 2019 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "sr04.h" +#include "pin.h" +#include "simulator.h" + +Component* SR04::construct( QObject* parent, QString type, QString id ) +{ return new SR04( parent, type, id ); } + +LibraryItem* SR04::libraryItem() +{ + return new LibraryItem( + tr( "HC-SR04" ), + tr( "Sensors" ), + "sr04.png", + "SR04", + SR04::construct); +} + +SR04::SR04( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( id.toStdString() ) +{ + m_area = QRect( -10*8, -4*8, 21*8, 9*8 ); + setLabelPos(-16,-48, 0); + m_BackGround = ":/sr04.png"; + + m_pin.resize(5); + + QString pinid = id; + pinid.append(QString("-inpin")); + QPoint pinpos = QPoint(-11*8,-3*8); + m_inpin = new Pin( 180, pinpos, pinid, 0, this); + m_inpin->setLabelText( " In v=m" ); + m_pin[0] = m_inpin; + + pinid = id; + pinid.append(QString("-vccpin")); + pinpos = QPoint(-8,48); + Pin* vccPin = new Pin( 270, pinpos, pinid, 0, this); + vccPin->setLabelText( " Vcc" ); + vccPin->setUnused( true ); + m_pin[1] = vccPin; + + pinid = id; + pinid.append(QString("-gndpin")); + pinpos = QPoint(16,48); + Pin* gndPin = new Pin( 270, pinpos, pinid, 0, this); + gndPin->setLabelText( " Gnd" ); + gndPin->setUnused( true ); + m_pin[2] = gndPin; + + pinid = id; + pinid.append(QString("-trigpin")); + pinpos = QPoint(0,48); + m_trigpin = new Pin( 270, pinpos, pinid, 0, this); + m_trigpin->setLabelText( " Trig" ); + m_pin[3] = m_trigpin; + + pinid = id; + pinid.append(QString("-outpin")); + pinpos = QPoint(8,48); + m_echopin = new Pin( 270, pinpos, pinid, 0, this); + m_echopin->setLabelText( " Echo" ); + m_pin[4] = m_echopin; + + pinid.append(QString("-eSource")); + m_echo = new eSource( pinid.toStdString(), m_echopin ); + m_echo->setVoltHigh( 5 ); + m_echo->setImp( 40 ); + + resetState(); +} +SR04::~SR04(){ Simulator::self()->remFromSimuClockList( this ); } + +void SR04::initialize() +{ + eNode* enode = m_trigpin->getEnode(); // Register for Trigger Pin changes + if( enode ) enode->addToChangedFast(this); +} + +void SR04::resetState() +{ + m_lastStep = Simulator::self()->step(); + m_lastTrig = false; + m_trigCount = 0; + m_echouS = 0; +} + +void SR04::setVChanged() // Called when Trigger Pin changes +{ + bool trigState = m_trigpin->getVolt()>2.5; + + if( !m_lastTrig && trigState ) // Rising trigger Pin + { + m_lastStep = Simulator::self()->step(); + } + else if( m_lastTrig && !trigState ) // Triggered + { + uint64_t step = Simulator::self()->step(); + + if( (step-m_lastStep) >= 10 ) // >=10 uS Trigger pulse + { + m_trigCount = 200; + + double us = m_inpin->getVolt()*2000/0.344+0.5; + m_echouS = us; + //qDebug() <getVolt()<< us<addToSimuClockList( this ); + } + } + m_lastTrig = trigState; +} + +void SR04::simuClockStep() +{ + if( m_trigCount > 0 ) + { + m_trigCount--; + + if( m_trigCount == 0 ) // Start Echo pulse + { + m_echo->setOut( true ); + m_echo->stampOutput(); + } + } + else if( m_trigCount == 0 ) + { + m_echouS--; + + if( m_echouS == 0 ) // Stop Echo pulse + { + m_echo->setOut( false ); + m_echo->stampOutput(); + + Simulator::self()->remFromSimuClockList( this ); + } + } +} + +void SR04::remove() +{ + delete m_echo; + Component::remove(); +} + +void SR04::paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + Component::paint( p, option, widget ); + + p->drawRoundedRect( m_area, 2, 2 ); + + int ox = m_area.x(); + int oy = m_area.y(); + + p->drawPixmap( ox, oy, QPixmap( m_BackGround )); +} + +#include "moc_sr04.cpp" diff --git a/src/gui/circuitwidget/components/mcu/sr04.h b/src/gui/circuitwidget/components/mcu/sr04.h new file mode 100644 index 0000000..6c17c9e --- /dev/null +++ b/src/gui/circuitwidget/components/mcu/sr04.h @@ -0,0 +1,65 @@ +/*************************************************************************** + * Copyright (C) 2019 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef SR04_H +#define SR04_H + +#include "e-source.h" +#include "e-element.h" +#include "component.h" +#include "itemlibrary.h" + +class MAINMODULE_EXPORT SR04 : public Component, public eElement +{ + Q_OBJECT + + public: + + SR04( QObject* parent, QString type, QString id ); + ~SR04(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem* libraryItem(); + + void initialize(); + void resetState(); + void setVChanged(); + void simuClockStep(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void remove(); + + private: + uint64_t m_lastStep; + bool m_lastTrig; + + int m_trigCount; + int m_echouS; + + Pin* m_inpin; + Pin* m_trigpin; + Pin* m_echopin; + + eSource* m_echo; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/memdata.cpp b/src/gui/circuitwidget/components/memdata.cpp new file mode 100644 index 0000000..c283424 --- /dev/null +++ b/src/gui/circuitwidget/components/memdata.cpp @@ -0,0 +1,132 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include +#include + +#include "memdata.h" +#include "circuit.h" +#include "utils.h" + + +MemData::MemData() +{ +} +MemData::~MemData(){} + +void MemData::loadData( QVector* toData, bool resize ) +{ + QString dir = Circuit::self()->getFileName(); + dir.replace( ".simu", ".data" ); + QString fileName = QFileDialog::getOpenFileName( 0l, QCoreApplication::translate("MemData", "Load Data"), dir, + QCoreApplication::translate( "MemData", "All files (*.*)")); + + if( fileName.isEmpty() ) return; // User cancels loading + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + QStringList lines = fileToStringList( fileName, "MemData::loadData" ); + + if( resize ) toData->resize( 1 ); + int addr = 0; + int ramEnd = toData->size()-1; + + foreach( QString line, lines ) + { + if( line.isEmpty() ) continue; + + line = line.replace("\t", "").replace(" ", ""); + + QStringList words = line.split( "," ); + words.removeAll(QString("")); + + while( !words.isEmpty() ) + { + QString sdata = words.takeFirst(); + bool ok = false; + int data = sdata.toInt( &ok, 10 ); + if( !ok ) continue; + + if( resize ) + { + ramEnd++; + toData->resize( ramEnd+1 ); + } + + if( addr > ramEnd ) break; + toData->replace( addr, data ); + addr++; + } + if( !words.isEmpty() && ( addr > ramEnd ) ) + { + qDebug() << "\nMemData::loadData: Data doesn't fit in Memory\n"; + break; + } + } + if( pauseSim ) Simulator::self()->runContinuous(); +} + +void MemData::saveData( QVector data ) +{ + QString dir = Circuit::self()->getFileName(); + dir.replace( ".simu", ".data" ); + + QString fileName = QFileDialog::getSaveFileName( 0l + , QCoreApplication::translate( "MemData", "Save Data" ), dir + , QCoreApplication::translate( "MemData", "All files (*.*)") ); + + if( fileName.isEmpty() ) return; // User cancels saving + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + int i = 0; + QString output = ""; + foreach( int val, data ) + { + QString sval = QString::number( val ); + while( sval.length() < 4) sval.prepend( " " ); + output += sval; + + if( i == 15 ) + { + output += "\n"; + i = 0; + } + else + { + output += ","; + i++; + } + } + QFile outFile( fileName ); + + if( !outFile.open(QFile::WriteOnly | QFile::Text) ) + { + QMessageBox::warning(0l, "MemData::saveData", + QCoreApplication::translate( "MemData", "Cannot write file %1:\n%2.").arg(fileName).arg(outFile.errorString())); + } + QTextStream toFile( &outFile ); + toFile << output; + outFile.close(); + + if( pauseSim ) Simulator::self()->runContinuous(); +} + diff --git a/src/gui/circuitwidget/components/memdata.h b/src/gui/circuitwidget/components/memdata.h new file mode 100644 index 0000000..655057e --- /dev/null +++ b/src/gui/circuitwidget/components/memdata.h @@ -0,0 +1,38 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef MEMDATA_H +#define MEMDATA_H + + +class MAINMODULE_EXPORT MemData +{ + public: + MemData(); + ~MemData(); + + void loadData(QVector* toData , bool resize=false ); + void saveData( QVector data ); + + private: +}; + +#endif + + diff --git a/src/gui/circuitwidget/components/meters/amperimeter.cpp b/src/gui/circuitwidget/components/meters/amperimeter.cpp new file mode 100644 index 0000000..7fad913 --- /dev/null +++ b/src/gui/circuitwidget/components/meters/amperimeter.cpp @@ -0,0 +1,59 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "amperimeter.h" +#include "simulator.h" + + +Component* Amperimeter::construct( QObject* parent, QString type, QString id ) +{ return new Amperimeter( parent, type, id ); } + +LibraryItem* Amperimeter::libraryItem() +{ + return new LibraryItem( + tr( "Amperimeter" ), + tr( "Meters" ), + "amperimeter.png", + "Amperimeter", + Amperimeter::construct); +} + +Amperimeter::Amperimeter( QObject* parent, QString type, QString id ) + : Meter( parent, type, id ) +{ + m_unit = "A"; + m_dispValue = 0; + setRes( 1e-6 ); + Meter::updateStep(); +} +Amperimeter::~Amperimeter(){} + +void Amperimeter::updateStep() +{ + double curr = current(); + + if( curr != m_dispValue ) + { + setUnit("A"); + m_dispValue = curr; + Meter::updateStep(); + } +} + +#include "moc_amperimeter.cpp" diff --git a/src/gui/circuitwidget/components/meters/amperimeter.h b/src/gui/circuitwidget/components/meters/amperimeter.h new file mode 100644 index 0000000..9c9154d --- /dev/null +++ b/src/gui/circuitwidget/components/meters/amperimeter.h @@ -0,0 +1,42 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef AMPERIMETER_H +#define AMPERIMETER_H + +#include "itemlibrary.h" +#include "meter.h" + + +class MAINMODULE_EXPORT Amperimeter : public Meter +{ + Q_OBJECT + + public: + + Amperimeter( QObject* parent, QString type, QString id ); + ~Amperimeter(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + void updateStep(); +}; + +#endif diff --git a/src/gui/circuitwidget/components/meters/frequencimeter.cpp b/src/gui/circuitwidget/components/meters/frequencimeter.cpp new file mode 100644 index 0000000..ec6b0f0 --- /dev/null +++ b/src/gui/circuitwidget/components/meters/frequencimeter.cpp @@ -0,0 +1,154 @@ +/*************************************************************************** + * Copyright (C) 2019 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "frequencimeter.h" +#include "simulator.h" +#include "pin.h" + +Component* Frequencimeter::construct( QObject* parent, QString type, QString id ) +{ return new Frequencimeter( parent, type, id ); } + +LibraryItem* Frequencimeter::libraryItem() +{ + return new LibraryItem( + tr( "Frequencimeter" ), + tr( "Meters" ), + "frequencimeter.png", + "Frequencimeter", + Frequencimeter::construct); +} + +Frequencimeter::Frequencimeter( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( id.toStdString() ) + , m_display( this ) +{ + m_area = QRectF( -32, -10, 75, 20 ); + m_color = Qt::black; + + m_ePin.resize( 1 ); + m_pin.resize( 1 ); + QString pinId = m_id; + pinId.append(QString("-lPin")); + QPoint pinPos = QPoint(-40, 0); + m_pin[0] = new Pin( 180, pinPos, pinId, 0, this); + m_ePin[0] = m_pin[0]; + + m_idLabel->setPos(-12,-24); + setLabelPos(-32,-24, 0); + + QFont f( "Helvetica [Cronyx]", 10, QFont::Bold ); + f.setPixelSize(12); + m_display.setFont(f); + m_display.setBrush( Qt::yellow ); + m_display.setPos( -30, -6 ); + m_display.setVisible( true ); + + Simulator::self()->addToSimuClockList( this ); + Simulator::self()->addToUpdateList( this ); + + resetState(); +} +Frequencimeter::~Frequencimeter() +{ + Simulator::self()->remFromSimuClockList( this ); + Simulator::self()->remFromUpdateList( this ); +} + +void Frequencimeter::resetState() +{ + m_rising = false; + m_falling = false; + + m_filter = 0.01; + m_lastData = 0; + m_max = 0; + m_min = 0; + m_freq = 0; + + m_numMax = 0; + + m_step = 0; + m_lastMax = 0; + m_totalP = 0; + + m_display.setText( "0 Hz" ); +} + +void Frequencimeter::updateStep() +{ + if( m_step > 1e6 ) resetState(); + if( m_numMax < 2 ) return; + m_numMax--; + + double freq = 1e6/(double)(m_totalP/m_numMax); + //qDebug() <<"Frequencimeter::simuClockStep"<= 10000 ) m_display.setText( QString::number( freq, 'f', 0 )+" Hz" ); + else if( freq >= 1000 ) m_display.setText( QString::number( freq, 'f', 1 )+" Hz" ); + else m_display.setText( QString::number( freq, 'f', 2 )+" Hz" ); + } + m_totalP = 0; + m_numMax = 0; + m_step = 0; +} + +void Frequencimeter::simuClockStep() +{ + m_step++; + + double data = m_ePin[0]->getVolt(); + + if( (data-m_lastData) > m_filter ) // Rising + { + if( m_falling && !m_rising ) // Min Found + { + m_falling = false; + m_max = -1e12; + } + m_rising = true; + m_lastData = data; + } + else if( (data-m_lastData) < -m_filter ) // Falling + { + if( m_rising && !m_falling ) // Max Found + { + if( m_numMax > 0 ) m_totalP += m_step-m_lastMax; + + m_lastMax = m_step; + m_numMax++; + m_rising = false; + m_min = 1e12; + } + m_falling = true; + m_lastData = data; + } +} + +void Frequencimeter::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + p->setBrush( Qt::black); + + p->drawRect( m_area ); +} + +//#include "moc_frequencimeter.cpp" diff --git a/src/gui/circuitwidget/components/meters/frequencimeter.h b/src/gui/circuitwidget/components/meters/frequencimeter.h new file mode 100644 index 0000000..b48f468 --- /dev/null +++ b/src/gui/circuitwidget/components/meters/frequencimeter.h @@ -0,0 +1,64 @@ +/*************************************************************************** + * Copyright (C) 2019 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef FREQUENCIMETER_H +#define FREQUENCIMETER_H + +#include "itemlibrary.h" +#include "component.h" +#include "e-element.h" + +class MAINMODULE_EXPORT Frequencimeter : public Component, public eElement +{ + Q_OBJECT + + public: + + Frequencimeter( QObject* parent, QString type, QString id ); + ~Frequencimeter(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + void simuClockStep(); + void resetState(); + void updateStep(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + private: + bool m_rising; + bool m_falling; + + double m_filter; + double m_lastData; + double m_max; + double m_min; + double m_freq; + + int m_numMax; + + uint64_t m_step; + uint64_t m_lastMax; + uint64_t m_totalP; + + QGraphicsSimpleTextItem m_display; +}; + +#endif diff --git a/src/gui/circuitwidget/components/meters/meter.cpp b/src/gui/circuitwidget/components/meters/meter.cpp new file mode 100644 index 0000000..fc1bd4a --- /dev/null +++ b/src/gui/circuitwidget/components/meters/meter.cpp @@ -0,0 +1,134 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "meter.h" +#include "simulator.h" +#include "e-source.h" +#include "pin.h" +#include "utils.h" + + +#include // fabs(x,y) + +Meter::Meter( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eResistor( id.toStdString() ) + , m_display( this ) +{ + m_area = QRectF( -24, -24, 48, 32 ); + + m_pin.resize( 3 ); + + QString pinId = m_id; + pinId.append(QString("-lPin")); + QPoint pinPos = QPoint(-8, 16); + m_pin[0] = new Pin( 270, pinPos, pinId, 0, this); + //m_pin[0]->setLabelText( "+" ); + m_pin[0]->setColor( Qt::red ); + m_ePin[0] = m_pin[0]; + + pinId = m_id; + pinId.append(QString("-rPin")); + pinPos = QPoint(8, 16); + m_pin[1] = new Pin( 270, pinPos, pinId, 1, this); + //m_pin[1]->setLabelText( "|" ); + m_ePin[1] = m_pin[1]; + + pinId = id; + pinId.append(QString("-outnod")); + pinPos = QPoint(32,-8); + m_pin[2] = new Pin( 0, pinPos, pinId, 0, this); + m_outpin = m_pin[2]; + + pinId.append(QString("-eSource")); + m_out = new eSource( pinId.toStdString(), m_outpin ); + m_out->setOut( true ); + m_out->setVoltHigh( 0 ); + + m_idLabel->setPos(-12,-24); + setLabelPos(-24,-40, 0); + + QFont f( "Helvetica [Cronyx]", 10, QFont::Bold ); + f.setPixelSize(12); + m_display.setFont(f); + m_display.setText( "Freq: 0 Hz" ); + m_display.setBrush( Qt::yellow ); + m_display.setPos( -22, -22 ); + m_display.setVisible( true ); + + setShowVal( false ); + + Simulator::self()->addToUpdateList( this ); +} +Meter::~Meter(){} + +void Meter::updateStep() +{ + int dispVal = 0; + + QString sign = " "; + + double dispValue = fabs(m_dispValue); + + if( dispValue > 1e-6 ) + { + if( m_dispValue < 0 ) sign = "-"; + + setValue( dispValue ); + dispVal = int( m_value*10+0.5 ); + + if( dispVal > 999 ) + { + setValue( dispVal/10 ); + dispVal = int( m_value*10 ); + } + //qDebug() <<"Meter::updateStep"<setVoltHigh( m_dispValue ); + m_out->stampOutput(); +} + +void Meter::remove() +{ + Simulator::self()->remFromUpdateList( this ); + + delete m_out; + + Component::remove(); +} + +void Meter::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + p->setBrush( Qt::black); + + p->drawRect( m_area ); + + QPointF points[3] = { + QPointF( 27,-12 ), + QPointF( 32, -8 ), + QPointF( 27, -4 ) }; + p->drawPolygon(points, 3); +} + +#include "moc_meter.cpp" diff --git a/src/gui/circuitwidget/components/meters/meter.h b/src/gui/circuitwidget/components/meters/meter.h new file mode 100644 index 0000000..778e218 --- /dev/null +++ b/src/gui/circuitwidget/components/meters/meter.h @@ -0,0 +1,54 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef METER_H +#define METER_H + +#include "e-resistor.h" +#include "component.h" + +class eSource; +class Pin; + +class MAINMODULE_EXPORT Meter : public Component, public eResistor +{ + Q_OBJECT + + public: + + Meter( QObject* parent, QString type, QString id ); + ~Meter(); + + void updateStep(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + void remove(); + + protected: + double m_dispValue; + + Pin* m_outpin; + eSource* m_out; + + QGraphicsSimpleTextItem m_display; +}; + +#endif diff --git a/src/gui/circuitwidget/components/meters/oscope.cpp b/src/gui/circuitwidget/components/meters/oscope.cpp new file mode 100644 index 0000000..78c25e8 --- /dev/null +++ b/src/gui/circuitwidget/components/meters/oscope.cpp @@ -0,0 +1,132 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "oscope.h" +#include "connector.h" +#include "circuit.h" +#include "itemlibrary.h" +#include "circuitwidget.h" +#include "oscopewidget.h" + +static const char* Oscope_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Filter") +}; + +Component* Oscope::construct( QObject* parent, QString type, QString id ) +{ + return new Oscope( parent, type, id ); +} + +LibraryItem* Oscope::libraryItem() +{ + return new LibraryItem( + tr( "Oscope" ), + tr( "Meters" ), + "oscope.png", + "Oscope", + Oscope::construct ); +} + +Oscope::Oscope( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( (id+"-eElement").toStdString() ) + , m_topW( ) +{ + Q_UNUSED( Oscope_properties ); + + m_area = QRectF( -115, -65, 230, 130 ); + setLabelPos(-100,-80, 0); + + m_pin.resize(2); + m_ePin.resize(2); + m_pin[0] = new Pin( 180, QPoint(-120,0 ), id+"-PinP", 0, this ); + m_pin[1] = new Pin( 180, QPoint(-120,16), id+"-PinN", 0, this ); + m_ePin[0] = m_pin[0]; + m_ePin[1] = m_pin[1]; + + m_pin[0]->setLabelText( "+" ); + m_pin[1]->setLabelText( "_" ); + m_pin[0]->setLabelColor( QColor( 0, 0, 0 ) ); + m_pin[1]->setLabelColor( QColor( 0, 0, 0 ) ); + m_pin[0]->setLength( 5 ); + m_pin[1]->setLength( 5 ); + + m_oscopeW = new OscopeWidget( &m_topW ); + m_oscopeW->setupWidget( 116 ); + m_oscopeW->setFixedSize( 220, 120 ); + m_oscopeW->setVisible( true ); + m_oscopeW->setOscope( this ); + m_topW.setupWidget( m_oscopeW ); + + m_proxy = Circuit::self()->addWidget( &m_topW); + m_proxy->setParentItem( this ); + m_proxy->setPos( QPoint( -110, -60) ); + //m_proxy->setFlag(QGraphicsItem::ItemNegativeZStacksBehindParent, true ); + + Simulator::self()->addToUpdateList( this ); +} + +Oscope::~Oscope() +{ +} + +void Oscope::updateStep() +{ + m_oscopeW->read(); + update(); +} + +void Oscope::initialize() +{ +} + +double Oscope::getVolt() +{ + //qDebug() <getVolt() - m_pin[1]->getVolt(); + return m_pin[0]->getVolt() - m_pin[1]->getVolt(); +} + +void Oscope::remove() +{ + Simulator::self()->remFromUpdateList( this ); + m_oscopeW->setOscope( 0l ); + + Component::remove(); +} + +void Oscope::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + p->setBrush( Qt::darkGray ); + p->drawRoundedRect( m_area, 4, 4 ); + + p->setBrush( Qt::white ); + QPen pen = p->pen(); + pen.setWidth( 0 ); + pen.setColor( Qt::white ); + p->setPen(pen); + + p->drawRoundedRect( QRectF( -114, -64, 225, 125 ), 3, 3 ); + +} + +#include "moc_oscope.cpp" + + diff --git a/src/gui/circuitwidget/components/meters/oscope.h b/src/gui/circuitwidget/components/meters/oscope.h new file mode 100644 index 0000000..4dc7668 --- /dev/null +++ b/src/gui/circuitwidget/components/meters/oscope.h @@ -0,0 +1,65 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef OSCOPE_H +#define OSCOPE_H + +#include "component.h" +#include "e-element.h" +#include "oscopewidget.h" +#include "topwidget.h" +#include "pin.h" + +class LibraryItem; + +class MAINMODULE_EXPORT Oscope : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( double Filter READ filter WRITE setFilter DESIGNABLE true USER true ) + + public: + + Oscope( QObject* parent, QString type, QString id ); + ~Oscope(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem* libraryItem(); + + virtual void initialize(); + virtual void updateStep(); + + double getVolt(); + + double filter() { return m_oscopeW->filter(); } + void setFilter( double filter ) { m_oscopeW->setFilter( filter ); } + + virtual void paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + public slots: + void remove(); + + private: + + OscopeWidget* m_oscopeW; + TopWidget m_topW; + QGraphicsProxyWidget* m_proxy; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/meters/probe.cpp b/src/gui/circuitwidget/components/meters/probe.cpp new file mode 100644 index 0000000..c20bedb --- /dev/null +++ b/src/gui/circuitwidget/components/meters/probe.cpp @@ -0,0 +1,282 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "probe.h" +#include "connector.h" +#include "connectorline.h" +#include "e-source.h" +#include "simulator.h" +#include "itemlibrary.h" +#include "circuitwidget.h" +#include "pin.h" + +#include + +static const char* Probe_properties[] = { + QT_TRANSLATE_NOOP("App::Property","PlotterCh") +}; + +Component* Probe::construct( QObject* parent, QString type, QString id ) +{ return new Probe( parent, type, id ); } + +LibraryItem* Probe::libraryItem() +{ + return new LibraryItem( + tr( "Probe" ), + tr( "Meters" ), + "probe.png", + "Probe", + Probe::construct ); +} + +Probe::Probe( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( id.toStdString() ) +{ + Q_UNUSED( Probe_properties ); + + m_area = QRect( -8, -8, 16, 16 ); + m_readPin = 0l; + m_readConn = 0l; + m_voltTrig = 2.5; + m_plotterLine = 0; + m_plotterColor = QColor( 255, 255, 255 ); + + // Create Input Pin + m_ePin.resize(1); + QString nodid = id; + nodid.append(QString("-inpin")); + QPoint nodpos = QPoint(-22,0); + m_inputpin = new Pin( 180, nodpos, nodid, 0, this); + m_inputpin->setLength( 20 ); + m_inputpin->setBoundingRect( QRect(-2, -2, 6, 4) ); + + nodid.append( QString("-eSource") ); + m_inSource = new eSource( nodid.toStdString(), m_inputpin ); + m_inSource->setOut(false); + m_inSource->setImp( 1e9 ); + + setRotation( rotation() - 45 ); + + m_unit = " "; + m_valLabel->setDefaultTextColor( Qt::darkRed ); + m_valLabel->setPlainText( "0" ); + setValLabelPos( 16, 0 , 45 ); // x, y, rot + setVolt( 0 ); + setShowVal( true ); + + setLabelPos( 16, -16 , 45 ); + + Simulator::self()->addToUpdateList( this ); +} +Probe::~Probe() +{ + delete m_inSource; +} + +void Probe::updateStep() +{ + m_readPin = 0l; + m_readConn = 0l; + + if( !Simulator::self()->isRunning() ) + { + setVolt( 0.0 ); + return; + } + + if( m_inputpin->isConnected() )// Voltage from connected pin + { + setVolt( m_inputpin->getVolt() ); + return; + } + + // Voltage from connector or Pin behind inputPin + QList list = m_inputpin->collidingItems(); + + if( list.isEmpty() ) + { + setVolt( 0.0 ); + return; + } + foreach( QGraphicsItem* it, list ) + { + if( it->type() == 65536 ) // Component + { + ConnectorLine* line = qgraphicsitem_cast( it ); + + Connector* con = line->connector(); + + if( con->objectName().startsWith("Connector") ) // Connector found + { + setVolt( con->getVolt() ); //startPin()->volt(); + m_readConn = con; + break; + } + } + else if( it->type() == 65536+3 ) // Pin found + { + m_readPin = qgraphicsitem_cast( it ); + setVolt( m_readPin->getVolt() ); + //qDebug() << " probe: Pin found" << volt; + break; + } + } + //qDebug() << " probe: " /*<< item->type()*/ << UserType;//con->objectName(); +} + +void Probe::setVolt( double volt ) +{ + if( m_voltIn == volt ) return; + + m_voltIn = volt; + + if( fabs(volt) < 0.01 ) volt = 0; + int dispVolt = int( volt*100+0.5 ); + + m_valLabel->setPlainText( QString("%1 V").arg(double(dispVolt)/100) ); + + if( m_plotterLine > 0 ) PlotterWidget::self()->setData( m_plotterLine, m_voltIn*100 ); + + update(); // Repaint +} + +double Probe::getVolt() +{ + double volt = 0; + if ( m_inputpin->isConnected() ) volt = m_inputpin->getVolt(); + else if( m_readConn != 0l ) volt = m_readConn->getVolt(); + else if( m_readPin != 0l ) volt = m_readPin->getVolt(); + return volt; +} + +void Probe::remove() +{ + if( m_inputpin->isConnected() ) m_inputpin->connector()->remove(); + + slotPlotterRem(); + + Simulator::self()->remFromUpdateList( this ); + + Component::remove(); +} + +int Probe::plotter() +{ + return m_plotterLine ; +} + +void Probe::setPlotter( int channel ) +{ + if( channel == 0 ) return; + + if( PlotterWidget::self()->addChannel( channel ) ) + { + slotPlotterRem(); + m_plotterLine = channel; + PlotterWidget::self()->setData( m_plotterLine, int(m_voltIn*100) ); + m_plotterColor = PlotterWidget::self()->getColor( m_plotterLine ); + update(); // Repaint + } +} + +void Probe::slotPlotter1() { setPlotter( 1 ); } +void Probe::slotPlotter2() { setPlotter( 2 ); } +void Probe::slotPlotter3() { setPlotter( 3 ); } +void Probe::slotPlotter4() { setPlotter( 4 ); } + +/*void Probe::slotPlotterAdd() +{ + if( m_plotterLine != 0 ) return; // Already have plotter + + m_plotterLine = PlotterWidget::self()->getChannel(); + if( m_plotterLine < 1 ) return; + + PlotterWidget::self()->setData( m_plotterLine, int(m_voltIn*100) ); + m_plotterColor = PlotterWidget::self()->getColor( m_plotterLine ); + update(); // Repaint +}*/ + +void Probe::slotPlotterRem() +{ + //qDebug() << m_plotterLine; + if( m_plotterLine == 0 ) return; // No plotter to remove + + PlotterWidget::self()->remChannel( m_plotterLine ); + m_plotterLine = 0; + update(); // Repaint +} + +void Probe::contextMenuEvent(QGraphicsSceneContextMenuEvent *event) +{ + event->accept(); + QMenu* menu = new QMenu(); + QMenu *pmenu = menu->addMenu(QIcon(":/fileopen.png"),tr("Plotter Channel")); + + QAction* plotter1Action = pmenu->addAction(QIcon(":/fileopen.png"),tr("Channel 1")); + connect(plotter1Action, SIGNAL(triggered()), this, SLOT(slotPlotter1())); + + QAction* plotter2Action = pmenu->addAction(QIcon(":/fileopen.png"),tr("Channel 2")); + connect(plotter2Action, SIGNAL(triggered()), this, SLOT(slotPlotter2())); + + QAction* plotter3Action = pmenu->addAction(QIcon(":/fileopen.png"),tr("Channel 3")); + connect(plotter3Action, SIGNAL(triggered()), this, SLOT(slotPlotter3())); + + QAction* plotter4Action = pmenu->addAction(QIcon(":/fileopen.png"),tr("Channel 4")); + connect(plotter4Action, SIGNAL(triggered()), this, SLOT(slotPlotter4())); + + QAction* plotterRemAction = pmenu->addAction(QIcon(":/fileopen.png"),tr("Remove from Plotter")); + connect(plotterRemAction, SIGNAL(triggered()), this, SLOT(slotPlotterRem())); + + menu->addSeparator(); + + Component::contextMenu( event, menu ); + menu->deleteLater(); +} + +QPainterPath Probe::shape() const +{ + QPainterPath path; + path.addEllipse( m_area ); + return path; +} + +void Probe::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + if( m_plotterLine > 0 ) p->setBrush( m_plotterColor ); + else if ( m_voltIn > m_voltTrig) p->setBrush( QColor( 255, 166, 0 ) ); + else p->setBrush( QColor( 230, 230, 255 ) ); + + p->drawEllipse( m_area ); + + if( m_plotterLine > 0 ) + { + //p->drawLine(-4,-7,-5,-1 ); + p->drawLine(-5,-1, 1,-3 ); + p->drawLine( 1,-3,-1, 3 ); + p->drawLine(-1, 3, 5, 1 ); + //p->drawLine( 6, 1, 4, 7 ); + //p->drawLine( 5, 3, 8, 0 ); + } +} + +#include "moc_probe.cpp" + diff --git a/src/gui/circuitwidget/components/meters/probe.h b/src/gui/circuitwidget/components/meters/probe.h new file mode 100644 index 0000000..741c166 --- /dev/null +++ b/src/gui/circuitwidget/components/meters/probe.h @@ -0,0 +1,82 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef PROBE_H +#define PROBE_H + +#include "component.h" +#include "e-element.h" + +class Pin; +class eSource; +class Connector; +class LibraryItem; + +class MAINMODULE_EXPORT Probe : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( bool Show_volt READ showVal WRITE setShowVal DESIGNABLE true USER true ) + Q_PROPERTY( int PlotterCh READ plotter WRITE setPlotter ) + + public: + Probe( QObject* parent, QString type, QString id ); + ~Probe(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem* libraryItem(); + + void setVolt( double volt ); + double getVolt(); + + int plotter(); + void setPlotter( int channel ); + + virtual void updateStep(); + + virtual QPainterPath shape() const; + virtual void paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + public slots: + virtual void remove(); + + void slotPlotter1(); + void slotPlotter2(); + void slotPlotter3(); + void slotPlotter4(); + + void slotPlotterRem(); + + protected: + void contextMenuEvent(QGraphicsSceneContextMenuEvent *event); + + private: + double m_voltIn; + double m_voltTrig; + + int m_plotterLine; + QColor m_plotterColor; + + Pin* m_inputpin; + Pin* m_readPin; + Connector* m_readConn; + eSource* m_inSource; +}; + + +#endif diff --git a/src/gui/circuitwidget/components/meters/voltimeter.cpp b/src/gui/circuitwidget/components/meters/voltimeter.cpp new file mode 100644 index 0000000..bbd42db --- /dev/null +++ b/src/gui/circuitwidget/components/meters/voltimeter.cpp @@ -0,0 +1,59 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "voltimeter.h" +#include "simulator.h" +#include "connector.h" + + +Component* Voltimeter::construct( QObject* parent, QString type, QString id ) +{ return new Voltimeter( parent, type, id ); } + +LibraryItem* Voltimeter::libraryItem() +{ + return new LibraryItem( + tr( "Voltimeter" ), + tr( "Meters" ), + "voltimeter.png", + "Voltimeter", + Voltimeter::construct); +} + +Voltimeter::Voltimeter( QObject* parent, QString type, QString id ) + : Meter( parent, type, id ) +{ + m_unit = "V"; + setRes( high_imp ); + Meter::updateStep(); +} +Voltimeter::~Voltimeter(){} + +void Voltimeter::updateStep() +{ + double volt = m_ePin[0]->getVolt()-m_ePin[1]->getVolt(); + + if( volt != m_dispValue ) + { + setUnit("V"); + m_dispValue = volt; + Meter::updateStep(); + } +} + +#include "moc_voltimeter.cpp" diff --git a/src/gui/circuitwidget/components/meters/voltimeter.h b/src/gui/circuitwidget/components/meters/voltimeter.h new file mode 100644 index 0000000..58b8f1c --- /dev/null +++ b/src/gui/circuitwidget/components/meters/voltimeter.h @@ -0,0 +1,42 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef VOLTIMETER_H +#define VOLTIMETER_H + +#include "itemlibrary.h" +#include "meter.h" + + +class MAINMODULE_EXPORT Voltimeter : public Meter +{ + Q_OBJECT + + public: + + Voltimeter( QObject* parent, QString type, QString id ); + ~Voltimeter(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + void updateStep(); +}; + +#endif diff --git a/src/gui/circuitwidget/components/other/ellipse.cpp b/src/gui/circuitwidget/components/other/ellipse.cpp new file mode 100644 index 0000000..c4be352 --- /dev/null +++ b/src/gui/circuitwidget/components/other/ellipse.cpp @@ -0,0 +1,62 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "ellipse.h" + + +Component* Ellipse::construct( QObject* parent, QString type, QString id ) +{ return new Ellipse( parent, type, id ); } + +LibraryItem* Ellipse::libraryItem() +{ + return new LibraryItem( + tr( "Ellipse" ), + tr( "Other" ), + "ellipse.png", + "Ellipse", + Ellipse::construct); +} + +Ellipse::Ellipse( QObject* parent, QString type, QString id ) + : Shape( parent, type, id ) +{ + +} +Ellipse::~Ellipse(){} + +QPainterPath Ellipse::shape() const +{ + QPainterPath path; + path.addEllipse( Shape::boundingRect() ); + return path; +} + +void Ellipse::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + QPen pen(Qt::black, m_border, Qt::SolidLine, Qt::RoundCap, Qt::RoundJoin); + + if ( isSelected() ) pen.setColor( Qt::darkGray); + + p->setBrush( m_color ); + p->setPen( pen ); + + p->drawEllipse( m_area ); +} + +#include "moc_ellipse.cpp" diff --git a/src/gui/circuitwidget/components/other/ellipse.h b/src/gui/circuitwidget/components/other/ellipse.h new file mode 100644 index 0000000..d726a55 --- /dev/null +++ b/src/gui/circuitwidget/components/other/ellipse.h @@ -0,0 +1,43 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef ELLIPSE_H +#define ELLIPSE_H + +#include "itemlibrary.h" +#include "shape.h" + +class MAINMODULE_EXPORT Ellipse : public Shape +{ + Q_OBJECT + + public: + + Ellipse( QObject* parent, QString type, QString id ); + ~Ellipse(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual QPainterPath shape() const; + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + +}; + +#endif diff --git a/src/gui/circuitwidget/components/other/line.cpp b/src/gui/circuitwidget/components/other/line.cpp new file mode 100644 index 0000000..5da7757 --- /dev/null +++ b/src/gui/circuitwidget/components/other/line.cpp @@ -0,0 +1,65 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "line.h" + + +Component* Line::construct( QObject* parent, QString type, QString id ) +{ return new Line( parent, type, id ); } + +LibraryItem* Line::libraryItem() +{ + return new LibraryItem( + tr( "Line" ), + tr( "Other" ), + "line.png", + "Line", + Line::construct); +} + +Line::Line( QObject* parent, QString type, QString id ) + : Shape( parent, type, id ) +{ +} +Line::~Line(){} + +QPainterPath Line::shape() const +{ + QPainterPath path; + QPolygon polygon; + polygon << QPoint(-m_hSize/2+1, m_vSize/2 ); + polygon << QPoint( m_hSize/2, -m_vSize/2+1 ); + polygon << QPoint( m_hSize/2-1,-m_vSize/2 ); + polygon << QPoint(-m_hSize/2, m_vSize/2-1 ); + path.addPolygon(polygon); + return path; +} + +void Line::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + QPen pen( m_color, m_border, Qt::SolidLine, Qt::RoundCap, Qt::RoundJoin); + + if ( isSelected() ) pen.setColor( Qt::darkGray); + + p->setPen( pen ); + + p->drawLine( -m_hSize/2, m_vSize/2, m_hSize/2, -m_vSize/2 ); +} + +#include "moc_line.cpp" diff --git a/src/gui/circuitwidget/components/other/line.h b/src/gui/circuitwidget/components/other/line.h new file mode 100644 index 0000000..3551bbc --- /dev/null +++ b/src/gui/circuitwidget/components/other/line.h @@ -0,0 +1,43 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef LINE_H +#define LINE_H + +#include "itemlibrary.h" +#include "shape.h" + +class MAINMODULE_EXPORT Line : public Shape +{ + Q_OBJECT + + public: + + Line( QObject* parent, QString type, QString id ); + ~Line(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual QPainterPath shape() const; + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + +}; + +#endif diff --git a/src/gui/circuitwidget/components/other/rectangle.cpp b/src/gui/circuitwidget/components/other/rectangle.cpp new file mode 100644 index 0000000..b7995ab --- /dev/null +++ b/src/gui/circuitwidget/components/other/rectangle.cpp @@ -0,0 +1,55 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "rectangle.h" + + +Component* Rectangle::construct( QObject* parent, QString type, QString id ) +{ return new Rectangle( parent, type, id ); } + +LibraryItem* Rectangle::libraryItem() +{ + return new LibraryItem( + tr( "Rectangle" ), + tr( "Other" ), + "rectangle.png", + "Rectangle", + Rectangle::construct); +} + +Rectangle::Rectangle( QObject* parent, QString type, QString id ) + : Shape( parent, type, id ) +{ +} +Rectangle::~Rectangle(){} + +void Rectangle::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + QPen pen(Qt::black, m_border, Qt::SolidLine, Qt::RoundCap, Qt::RoundJoin); + + if ( isSelected() ) pen.setColor( Qt::darkGray); + + p->setBrush( m_color ); + p->setPen( pen ); + + if( m_border > 0 ) p->drawRect( m_area ); + else p->fillRect( m_area, p->brush() ); +} + +#include "moc_rectangle.cpp" diff --git a/src/gui/circuitwidget/components/other/rectangle.h b/src/gui/circuitwidget/components/other/rectangle.h new file mode 100644 index 0000000..e33ab4a --- /dev/null +++ b/src/gui/circuitwidget/components/other/rectangle.h @@ -0,0 +1,42 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef RECTANGLE_H +#define RECTANGLE_H + +#include "itemlibrary.h" +#include "shape.h" + +class MAINMODULE_EXPORT Rectangle : public Shape +{ + Q_OBJECT + + public: + + Rectangle( QObject* parent, QString type, QString id ); + ~Rectangle(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + +}; + +#endif diff --git a/src/gui/circuitwidget/components/other/textcomponent.cpp b/src/gui/circuitwidget/components/other/textcomponent.cpp new file mode 100644 index 0000000..99db474 --- /dev/null +++ b/src/gui/circuitwidget/components/other/textcomponent.cpp @@ -0,0 +1,163 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "textcomponent.h" +#include "circuit.h" + +static const char* TextComponent_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Text"), + QT_TRANSLATE_NOOP("App::Property","Font Size"), + QT_TRANSLATE_NOOP("App::Property","Fixed Width"), + QT_TRANSLATE_NOOP("App::Property","Margin") +}; + +Component* TextComponent::construct( QObject* parent, QString type, QString id ) +{ + return new TextComponent( parent, type, id ); +} + +LibraryItem* TextComponent::libraryItem() +{ + return new LibraryItem( + tr( "Text" ), + tr( "Other" ), + "text.png", + "TextComponent", + TextComponent::construct ); +} + +TextComponent::TextComponent( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) +{ + Q_UNUSED( TextComponent_properties ); + + m_color = QColor( 255, 255, 220 ); + m_font = "Helvetica [Cronyx]"; + + QFont sansFont( m_font, 10 ); + #if QT_VERSION >= QT_VERSION_CHECK(5, 9, 0) + sansFont.setWeight( QFont::Medium ); + #else + sansFont.setWeight( QFont::Normal); + #endif + sansFont.setFixedPitch(true); + + m_text = new QGraphicsTextItem( this ); + m_text->setTextInteractionFlags( Qt::TextEditorInteraction ); + m_text->setTextWidth( 90 ); + m_text->setFont( sansFont ); + m_text->setPlainText("... TEXT ..."); + m_text->setPos( 0, 0 ); + m_text->setCursor( Qt::IBeamCursor ); + m_text->document()->setTextWidth(-1); + m_text->setDefaultTextColor( Qt::darkBlue ); + m_margin = 5; + m_border = 1; + updateGeometry( 0, 0, 0 ); + + setFontSize( 10 ); + + connect(m_text->document(), SIGNAL( contentsChange(int, int, int )), + this, SLOT( updateGeometry(int, int, int ))); +} +TextComponent::~TextComponent(){} + +void TextComponent::updateGeometry(int, int, int) +{ + m_text->document()->setTextWidth(-1); + + int margin = m_margin; + + m_area = QRect( -margin, -margin, m_text->boundingRect().width()+margin*2, m_text->boundingRect().height()+margin*2 ); + + Circuit::self()->update(); +} + +int TextComponent::margin() { return m_margin; } + +void TextComponent::setMargin( int margin ) +{ + if( margin < 2 ) margin = 2; + m_margin = margin; + updateGeometry( 0, 0, 0 ); +} + +bool TextComponent::fixedW() { return m_fixedW; } + +void TextComponent::setFixedW( bool fixedW ) +{ + m_fixedW = fixedW; + + QFont font = m_text->font(); + font.setFixedPitch( fixedW ); + m_text->setFont( font ); + updateGeometry( 0, 0, 0 ); +} + +QString TextComponent::getFont() +{ + return m_font; +} + +void TextComponent::setFont( QString font ) +{ + if( font == "" ) return; + m_font = font; + + QFont Tfont = m_text->font(); + Tfont.setFamily( font ); + m_text->setFont( Tfont ); + updateGeometry( 0, 0, 0 ); +} + +int TextComponent::fontSize() +{ + return m_fontSize; +} + +void TextComponent::setFontSize( int size ) +{ + if( size < 1 ) return; + m_fontSize = size; + + QFont font = m_text->font(); + font.setPixelSize( size ); + m_text->setFont( font ); + updateGeometry( 0, 0, 0 ); +} + +int TextComponent::border() { return m_border; } +void TextComponent::setBorder( int border ) { m_border = border; } + +QString TextComponent::getText() { return m_text->toPlainText(); } +void TextComponent::setText( QString text ) { m_text->document()->setPlainText( text ); } + + +void TextComponent::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + QPen pen( QColor( 0, 0, 0 ), m_border, Qt::SolidLine, Qt::RoundCap, Qt::RoundJoin); + p->setPen( pen ); + + if( m_border >0 ) p->drawRect( m_area ); + else p->fillRect( m_area, p->brush() ); +} + +#include "moc_textcomponent.cpp" diff --git a/src/gui/circuitwidget/components/other/textcomponent.h b/src/gui/circuitwidget/components/other/textcomponent.h new file mode 100644 index 0000000..1e5b392 --- /dev/null +++ b/src/gui/circuitwidget/components/other/textcomponent.h @@ -0,0 +1,67 @@ +#ifndef TEXTCOMPONENT_H +#define TEXTCOMPONENT_H + + +#include "component.h" +#include "itemlibrary.h" + +class MAINMODULE_EXPORT TextComponent : public Component +{ + Q_OBJECT + Q_PROPERTY( QString Text READ getText WRITE setText ) + Q_PROPERTY( QString Font READ getFont WRITE setFont DESIGNABLE true USER true ) + Q_PROPERTY( bool Fixed_Width READ fixedW WRITE setFixedW DESIGNABLE true USER true ) + Q_PROPERTY( int Font_Size READ fontSize WRITE setFontSize DESIGNABLE true USER true ) + Q_PROPERTY( int Margin READ margin WRITE setMargin DESIGNABLE true USER true ) + Q_PROPERTY( int Border READ border WRITE setBorder DESIGNABLE true USER true ) + + public: + TextComponent( QObject* parent, QString type, QString id ); + ~TextComponent(); + + QRectF boundingRect() const + { + return QRectF( m_area.x()-m_border/2-1, m_area.y()-m_border/2-1, + m_area.width()+m_border+2, m_area.height()+m_border+2 ); + } + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + int margin(); + void setMargin( int margin ); + + int border(); + void setBorder( int border ); + + int fontSize(); + void setFontSize( int size ); + + bool fixedW(); + void setFixedW( bool fixedW ); + + QString getText(); + void setText( QString text ); + + QString getFont(); + void setFont( QString font ); + + void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + signals: + + public slots: + void updateGeometry(int, int, int); + + private: + QGraphicsTextItem* m_text; + + int m_fontSize; + int m_margin; + int m_border; + bool m_fixedW; + + QString m_font; +}; + +#endif // TEXTCOMPONENT_H diff --git a/src/gui/circuitwidget/components/outputs/audio_out.cpp b/src/gui/circuitwidget/components/outputs/audio_out.cpp new file mode 100644 index 0000000..8a76f8e --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/audio_out.cpp @@ -0,0 +1,220 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "audio_out.h" +#include "simulator.h" +#include "connector.h" +#include "itemlibrary.h" +#include "pin.h" + +static const char* AudioOut_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Impedance") +}; + +Component* AudioOut::construct( QObject* parent, QString type, QString id ) +{ return new AudioOut( parent, type, id ); } + +LibraryItem* AudioOut::libraryItem() +{ + return new LibraryItem( + tr( "Audio Out" ), + tr( "Outputs" ), + "audio_out.png", + "AudioOut", + AudioOut::construct); +} + +AudioOut::AudioOut( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eResistor( id.toStdString() ) +{ + Q_UNUSED( AudioOut_properties ); + + m_area = QRect( -12, -24, 24, 40 ); + + m_pin.resize( 2 ); + + QString pinId = m_id; + pinId.append(QString("-lPin")); + QPoint pinPos = QPoint(-8-8,-8); + m_pin[0] = new Pin( 180, pinPos, pinId, 0, this); + m_pin[0]->setLabelText( "+" ); + m_pin[0]->setLabelColor( QColor( 0, 0, 0 ) ); + m_ePin[0] = m_pin[0]; + + pinId = m_id; + pinId.append(QString("-rPin")); + pinPos = QPoint(-8-8,0); + m_pin[1] = new Pin( 180, pinPos, pinId, 1, this); + m_pin[1]->setLabelText( " -" ); + m_pin[1]->setLabelColor( QColor( 0, 0, 0 ) ); + m_ePin[1] = m_pin[1]; + + //m_idLabel->setText( QString("") ); + m_idLabel->setPos(-12,-24); + setLabelPos(-20,-36, 0); + + m_resist = 8; + + int refreshPeriod = 10; // mS + int sampleRate = 40000; // samples/S + + m_deviceinfo = QAudioDeviceInfo::defaultOutputDevice(); + if( m_deviceinfo.isNull() ) + { + qDebug() <<"No defaulf Audio Output Device Found" ; + return; + } + m_format.setSampleRate( sampleRate ); + m_format.setChannelCount(1); + m_format.setSampleSize(8); + m_format.setCodec( "audio/pcm" ); + m_format.setByteOrder( QAudioFormat::LittleEndian ); + m_format.setSampleType( QAudioFormat::UnSignedInt ); + + if( !m_deviceinfo.isFormatSupported( m_format )) + { + qDebug() << "Default format not supported - trying to use nearest"; + m_format = m_deviceinfo.nearestFormat( m_format ); + + qDebug() << m_format.sampleRate() << m_format.channelCount()<setBufferSize( m_dataSize ); + + m_audioOutput->setNotifyInterval( refreshPeriod ); + + connect( m_audioOutput, SIGNAL( notify() ), + this, SLOT( OnAudioNotify() )); + + resetState(); +} + +AudioOut::~AudioOut() +{ + //qDebug() << "AudioOut::~AudioOut deleting" << QString::fromStdString( m_elmId ); +} + +void AudioOut::initialize() +{ + if( m_deviceinfo.isNull() ) return; + + if( m_ePin[0]->isConnected() && m_ePin[1]->isConnected() ) + Simulator::self()->addToSimuClockList( this ); + + eResistor::initialize(); +} + +void AudioOut::resetState() +{ + if( m_deviceinfo.isNull() ) return; + m_counter = 0; + m_dataCount = 0; + + m_auIObuffer = m_audioOutput->start(); +} + +void AudioOut::simuClockStep() +{ + m_counter++; + if( m_counter == 25 ) + { + m_counter = 0; + + double voltPN = m_ePin[0]->getVolt()-m_ePin[1]->getVolt(); + if( voltPN > 5 ) voltPN = 5; + + char outVal = voltPN*51; + + m_dataBuffer[ m_dataCount ] = outVal; + m_dataCount++; + + if( m_dataCount == m_dataSize ) + { + //qDebug() << m_dataCount; + m_dataCount = 0; + m_auIObuffer->write( (const char*)m_dataBuffer, m_dataSize ); + } + } +} + +void AudioOut::OnAudioNotify() +{ + //qDebug() << "AudioOut::OnAudioNotify()"<write( (const char*)m_dataBuffer, m_dataCount ); + m_dataCount = 0; +} + +void AudioOut::remove() +{ + Simulator::self()->remFromSimuClockList( this ); + + if( m_ePin[0]->isConnected() ) (static_cast(m_ePin[0]))->connector()->remove(); + if( m_ePin[1]->isConnected() ) (static_cast(m_ePin[1]))->connector()->remove(); + Component::remove(); +} + +QPainterPath AudioOut::shape() const +{ + QPainterPath path; + + QVector points; + + points << QPointF(-10,-12 ) + << QPointF(-10, 4 ) + << QPointF( 0, 4 ) + << QPointF( 10, 16 ) + << QPointF( 10, -24 ) + << QPointF( 0, -12 ) + << QPointF(-10, -12 ); + + path.addPolygon( QPolygonF(points) ); + path.closeSubpath(); + return path; +} + +void AudioOut::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + //p->drawRect( -10.5, -12, 12, 24 ); + static const QPointF points[7] = { + QPointF(-10,-12 ), + QPointF(-10, 4 ), + QPointF( 0, 4 ), + QPointF( 10, 16 ), + QPointF( 10, -24 ), + QPointF( 0, -12 ), + QPointF(-10, -12 ) + }; + + p->drawPolygon(points, 7); + + if( m_deviceinfo.isNull() ) + { + p->drawLine(0,-8, 7, 0 ); + p->drawLine( 7,-8,0, 0 ); + } +} + +#include "moc_audio_out.cpp" diff --git a/src/gui/circuitwidget/components/outputs/audio_out.h b/src/gui/circuitwidget/components/outputs/audio_out.h new file mode 100644 index 0000000..b5c9a7e --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/audio_out.h @@ -0,0 +1,68 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef AUDIOOUT_H +#define AUDIOOUT_H + +#include "itemlibrary.h" +#include "e-resistor.h" + +#include +#include + +class AudioOut : public Component, public eResistor +{ + Q_OBJECT + Q_PROPERTY( double Impedance READ res WRITE setResSafe DESIGNABLE true USER true ) + + public: + AudioOut( QObject* parent, QString type, QString id ); + ~AudioOut(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual void initialize(); + virtual void resetState(); + virtual void simuClockStep(); + + virtual QPainterPath shape() const; + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + void remove(); + void OnAudioNotify(); + + private: + QAudioDeviceInfo m_deviceinfo; + QAudioFormat m_format; + + QAudioOutput* m_audioOutput; + QIODevice* m_auIObuffer; + + char* m_dataBuffer; + int m_dataSize; + int m_dataCount; + + int m_counter; +}; + +#endif + + diff --git a/src/gui/circuitwidget/components/outputs/hd44780.cpp b/src/gui/circuitwidget/components/outputs/hd44780.cpp new file mode 100644 index 0000000..d700940 --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/hd44780.cpp @@ -0,0 +1,452 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + + +#include "connector.h" +#include "simulator.h" +#include "hd44780.h" +#include "utils.h" + +static const char* Hd44780_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Cols"), + QT_TRANSLATE_NOOP("App::Property","Rows") +}; + +Component* Hd44780::construct( QObject* parent, QString type, QString id ) +{ + return new Hd44780( parent, type, id ); +} + +LibraryItem* Hd44780::libraryItem() +{ + return new LibraryItem( + tr( "Hd44780" ), + tr( "Outputs" ), + "hd44780.png", + "Hd44780", + Hd44780::construct ); +} + +Hd44780::Hd44780( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( (id+"-eElement").toStdString() ) + , m_fontImg(":font2.png") +{ + Q_UNUSED( Hd44780_properties ); + + m_rows = 2; + m_cols = 16; + + int pinY = 8;//8*((33+m_imgHeight)/8); + + m_pinRS = new Pin( 270, QPoint(16, pinY), id+"-PinRS", 0, this ); + m_pinRW = new Pin( 270, QPoint(24, pinY), id+"-PinRW", 0, this ); + m_pinEn = new Pin( 270, QPoint(32, pinY), id+"-PinEn", 0, this ); + m_pinRS->setLabelText( " RS" ); + m_pinRW->setLabelText( " RW" ); + m_pinEn->setLabelText( " En" ); + + m_dataPin.resize( 8 ); + + for( int i=0; i<8; i++ ) + { + m_dataPin[i] = new Pin( 270, QPoint( 40+i*8, pinY), id+"-dataPin"+QString::number(i) , 0, this ); + m_dataPin[i]->setLabelText( " D"+QString::number(i) ); + } + + Simulator::self()->addToUpdateList( this ); + + setLabelPos( 70,-82, 0); + setShowId( true ); + + resetState(); +} + +Hd44780::~Hd44780() +{ +} + +void Hd44780::initialize() +{ + eNode* enode = m_pinEn->getEnode();// Register for clk changes callback + if( enode ) enode->addToChangedFast(this); +} + +void Hd44780::resetState() +{ + //qDebug() << "Hd44780::resetState()" ; + m_lastClock = false; + m_writeDDRAM = true; + m_cursPos = 0; + m_shiftPos = 0; + m_direction = 1; + m_shiftDisp = 0; + m_dispOn = 0; + m_cursorOn = 0; + m_cursorBlink = 0; + m_dataLength = 8; + m_lineLength = 80; + m_nibble = 0; + m_input = 0; + + m_DDaddr = 0; + m_CGaddr = 0; + + m_imgWidth = (m_cols*6-1)*2; + m_imgHeight = (m_rows*9-1)*2; + m_area = QRectF( 0, -(m_imgHeight+33), m_imgWidth+20, m_imgHeight+33 ); + setTransformOriginPoint( togrid( m_area.center() )); + + clearLcd(); +} +void Hd44780::setVChanged() // Called when clock Pin changes +{ + if( m_pinEn->getVolt()>2.5 ) // Clk Pin is High + { + m_lastClock = true; + return; + } + else // Clk Pin is Low + { + if( m_lastClock == false ) return; // Not a Falling edge + m_lastClock = false; + } + // We Had a Falling Edge: Read input + if( m_dataLength == 8 ) // 8 bit mode + { + m_input = 0; + + for( int pin=0; pin<8; pin++ ) + if( m_dataPin[pin]->getVolt()>2.5 ) + m_input += pow( 2, pin ); + } + else // 4 bit mode + { + if( m_nibble == 0 ) // Read high nibble + { + m_input = 0; + + for( int pin=4; pin<8; pin++ ) + if( m_dataPin[pin]->getVolt()>2.5 ) + m_input += pow( 2, pin ); + + m_nibble = 1; + return; + } + else // Read low nibble + { + for( int pin=4; pin<8; pin++ ) + if( m_dataPin[pin]->getVolt()>2.5 ) + m_input += pow( 2, (pin-4) ); + + m_nibble = 0; + } + } + + //Get RS state: data or command + if( m_pinRS->getVolt()>2.5 ) writeData( m_input ); + else proccessCommand( m_input ); +} + +void Hd44780::writeData( int data ) +{ + if( m_writeDDRAM ) // Write to DDRAM + { + //qDebug() << "Hd44780::writeData: " << data << m_cursPos< 79 ) m_DDaddr = 0; + if( m_DDaddr < 0 ) m_DDaddr = 79; + + if( m_shiftDisp ) + { + m_shiftPos += m_direction; + + int lineEnd = m_lineLength-1; + + if( m_shiftPos>lineEnd ) m_shiftPos = 0; + if( m_shiftPos<0 ) m_shiftPos = lineEnd; + } + } + else // Write to CGRAM + { + m_CGram[m_CGaddr] = data; + m_CGaddr += 1; + + if( m_CGaddr > 63 ) m_CGaddr = 0; + } +} + +void Hd44780::proccessCommand( int command ) +{ + //qDebug() << "Hd44780::proccessCommand: " << command; + if( command<2 ) { clearLcd(); return; } //00000001 //Clear display //Clears display and returns cursor to the home position (address 0).//1.52 ms + if( command<4 ) { cursorHome(); return; } //0000001. //Cursor home //Returns cursor to home position. Also returns display being shifted to the original position. DDRAM content remains unchanged.//1.52 ms + if( command<8 ) { entryMode( command ); return; } //000001.. //Entry mode set //Sets cursor move direction (I/D); specifies to shift the display (S). These operations are performed during data read/write.//37 μs + if( command<16 ) { dispControl( command ); return; } //00001... //Display on/off //Sets on/off of all display (D), cursor on/off (C), and blink of cursor position character (B).//37 μs + if( command<32 ) { C_D_Shift( command ); return; } //0001.... //Cursor/display shift //Sets cursor-move or display-shift (S/C), shift direction (R/L). DDRAM content remains unchanged//37 μs + if( command<64 ) { functionSet( command ); return; } //001..... //Function set //Sets interface data length (DL), number of display line (N), and character font (F)//37 μs + if( command<128 ) { setCGaddr( command-64 ); return; } //01...... //Set CGRAM address //Sets the CGRAM address. CGRAM data are sent and received after this setting//37 μs + else { setDDaddr( command-128 ); return; } //1....... //Set DDRAM address //Sets the DDRAM address. DDRAM data are sent and received after this setting.//37 μs +} + +void Hd44780::functionSet( int data ) +{ + if( data & 16 ) m_dataLength = 8; // Data Length + else m_dataLength = 4; + + if( data & 8 ) m_lineLength = 40; // Display Lines + else m_lineLength = 80; + + // Sets the character font. + //if( data & 4 ) ; + //else ; + //qDebug()<lineEnd ) m_shiftPos = 0; + if( m_shiftPos<0 ) m_shiftPos = lineEnd; + } + else m_cursPos += dir; +} + +void Hd44780::dispControl( int data ) +{ + + if( data & 4 ) m_dispOn = 1; // Display On/Off + else m_dispOn = 0; + + if( data & 2 ) m_cursorOn = 1; // Cursor On/Off + else m_cursorOn = 0; + + if( data & 1 ) m_cursorBlink = 1; // Cursor Blink + else m_cursorBlink = 0; + //qDebug()<63) ) addr -= 24; + m_DDaddr = addr & 0b01111111; + + m_writeDDRAM = true; + //qDebug() << "Hd44780::setDDaddr: "<< addr << m_DDaddr; +} + +void Hd44780::setCGaddr( int addr ) +{ + m_CGaddr = addr & 0b00111111; + + m_writeDDRAM = false; + //qDebug() << "set_CGaddr: " << m_CGaddr; +} + +void Hd44780::clearDDRAM() +{ + for(int i=0; i<80; i++) m_DDram[i] = 32; +} + +int Hd44780::cols() +{ + return m_cols; +} + +void Hd44780::setCols( int cols ) +{ + if( cols > 20 ) cols = 20; + if( cols < 8 ) cols = 8; + + m_cols = cols; + + resetState(); +} + +int Hd44780::rows() +{ + return m_rows; +} +void Hd44780::setRows( int rows ) +{ + if( rows > 4 ) rows = 4; + if( rows < 1 ) rows = 1; + + m_rows = rows; + + resetState(); +} + +void Hd44780::updateStep() +{ + update(); +} + +void Hd44780::remove() +{ + if( m_pinRS->isConnected() ) m_pinRS->connector()->remove(); + if( m_pinRW->isConnected() ) m_pinRW->connector()->remove(); + if( m_pinEn->isConnected() ) m_pinEn->connector()->remove(); + + for( int i=0; i<8; i++ ) + { + if( m_dataPin[i]->isConnected() ) m_dataPin[i]->connector()->remove(); + } + + Simulator::self()->remFromUpdateList( this ); + + Component::remove(); +} + +ePin* Hd44780::getEpin( QString pinName ) +{ + if ( pinName == "RS" ) return m_pinRS; + else if( pinName == "RW" ) return m_pinRW; + else if( pinName == "En" ) return m_pinEn; + else if( pinName.contains( "D" ) ) + { + int pin = pinName.remove("D").toInt(); + return m_dataPin[pin]; + } + + return 0l; +} + +void Hd44780::showPins( bool show ) +{ + m_pinRS->setVisible( show ); + m_pinRW->setVisible( show ); + m_pinEn->setVisible( show ); + + for( int i=0; i<8; i++ ) m_dataPin[i]->setVisible( show ); +} + +void Hd44780::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + QPen pen(Qt::black, 1, Qt::SolidLine, Qt::RoundCap, Qt::RoundJoin); + p->setPen( pen ); + + p->setBrush( QColor(50, 70, 100) ); + p->drawRoundedRect( m_area, 2, 2 ); + p->setBrush( QColor(200, 220, 180) ); + p->drawRoundedRect( 4, -(29+m_imgHeight), m_imgWidth+12, m_imgHeight+12, 8, 8 ); + + if( m_dispOn == 0 ) return; + + for( int row=0; rowlineEnd ) mem_pos -= m_lineLength; + if( mem_pos0; x-=2 ) + { + if( data & 1 ) + { + charact.setPixel(x, y, qRgb(0, 0, 0)); + charact.setPixel(x-1, y, qRgb(0, 0, 0)); + charact.setPixel(x, y+1, qRgb(0, 0, 0)); + charact.setPixel(x-1, y+1, qRgb(0, 0, 0)); + } + data = data>>1; + } + } + } + p->drawImage(10+col*12,-(m_imgHeight+22)+row*18,charact ); + + if( (mem_pos == m_DDaddr) & m_cursorOn ) // Draw cursor + { + if( m_cursorBlink ) m_blinkStep++; + else m_blinkStep = 0; + + if( m_blinkStep < 20 )//m_cursorBlink + { + charact = m_fontImg.copy(95*10, 0, 10, 14); + p->drawImage(10+col*12,-(m_imgHeight+22)+row*18,charact ); + } + if( m_blinkStep == 40 ) m_blinkStep = 0; + } + } + } +} + + +#include "moc_hd44780.cpp" + diff --git a/src/gui/circuitwidget/components/outputs/hd44780.h b/src/gui/circuitwidget/components/outputs/hd44780.h new file mode 100644 index 0000000..81ada28 --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/hd44780.h @@ -0,0 +1,112 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef HD44780_H +#define HD44780_H + +#include "itemlibrary.h" +#include "component.h" +#include "e-element.h" +#include "pin.h" + +class MAINMODULE_EXPORT Hd44780 : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( int Cols READ cols WRITE setCols DESIGNABLE true USER true ) + Q_PROPERTY( int Rows READ rows WRITE setRows DESIGNABLE true USER true ) + + public: + Hd44780( QObject* parent, QString type, QString id ); + ~Hd44780(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem* libraryItem(); + + int cols(); + void setCols( int cols ); + + int rows(); + void setRows( int rows ); + + void initialize(); + void resetState(); + void setVChanged(); + void updateStep(); + void showPins( bool show ); + + ePin* getEpin( QString pinName ); + + virtual void paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + public slots: + void remove(); + + private: + void clearDDRAM(); + void clearLcd(); + void writeData( int data ); + void proccessCommand( int command ); + void functionSet( int data ); + void C_D_Shift( int data ); + void dispControl( int data ); + void entryMode( int data ); + void cursorHome(); + void setDDaddr( int addr ); + void setCGaddr( int addr ); + + QImage m_fontImg; //Characters image + + int m_DDram[80]; //80 DDRAM + int m_CGram[64]; //64 CGRAM + + int m_rows; + int m_cols; + //int m_lineWidth; + int m_imgWidth; + int m_imgHeight; + + int m_cursPos; + int m_shiftPos; + int m_direction; + int m_shiftDisp; + int m_dispOn; + int m_cursorOn; + int m_cursorBlink; + int m_dataLength; + //int m_dispLines; + int m_lineLength; + int m_DDaddr; + int m_CGaddr; + int m_nibble; + int m_input; + + int m_blinkStep; + + bool m_lastClock; + bool m_writeDDRAM; + + //Inputs + Pin* m_pinRS; + Pin* m_pinRW; + Pin* m_pinEn; + std::vector m_dataPin; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/outputs/ks0108.cpp b/src/gui/circuitwidget/components/outputs/ks0108.cpp new file mode 100644 index 0000000..48cf355 --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/ks0108.cpp @@ -0,0 +1,375 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "itemlibrary.h" +#include "connector.h" +#include "simulator.h" +#include "ks0108.h" + +static const char* Ks0108_properties[] = { + QT_TRANSLATE_NOOP("App::Property","CS Active Low") +}; + + +Component* Ks0108::construct( QObject* parent, QString type, QString id ) +{ + return new Ks0108( parent, type, id ); +} + +LibraryItem* Ks0108::libraryItem() +{ + return new LibraryItem( + tr( "Ks0108" ), + tr( "Outputs" ), + "ks0108.png", + "Ks0108", + Ks0108::construct ); +} + +Ks0108::Ks0108( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( (id+"-eElement").toStdString() ) + , m_pinRst( 270, QPoint(-56, 56), id+"-PinRst" , 0, this ) + , m_pinCs2( 270, QPoint(-48, 56), id+"-PinCs2" , 0, this ) + , m_pinCs1( 270, QPoint(-40, 56), id+"-PinCs1" , 0, this ) + , m_pinEn ( 270, QPoint( 32, 56), id+"-PinEn" , 0, this ) + , m_pinRW ( 270, QPoint( 40, 56), id+"-PinRW" , 0, this ) + , m_pinDC ( 270, QPoint( 48, 56), id+"-PinDC" , 0, this ) +{ + Q_UNUSED( Ks0108_properties ); + + m_area = QRectF( -74, -52, 148, 100 ); + m_csActLow = false; + + m_pinRst.setLabelText( " RST" ); + m_pinCs1.setLabelText( " CS1" ); + m_pinCs2.setLabelText( " CS2" ); + m_pinDC.setLabelText( " RS" ); + m_pinRW.setLabelText( " RW" ); + m_pinEn.setLabelText( " En" ); + + m_dataPin.resize( 8 ); + m_dataeSource.resize( 8 ); + + int pinY = 56; + + for( int i=0; i<8; i++ ) + { + QString pinId = id+"-dataPin"+QString::number(i); + m_dataPin[i] = new Pin( 270, QPoint(-32+(7-i)*8, pinY), pinId , 0, this ); + m_dataPin[i]->setLabelText( " D"+QString::number(i) ); + + pinId.append(QString("-eSource")); + m_dataeSource[i] = new eSource( pinId.toStdString(), m_dataPin[i] ); + m_dataeSource[i]->setVoltHigh( 5 ); + m_dataeSource[i]->setImp( high_imp ); + } + + m_pdisplayImg = new QImage( 128, 64, QImage::Format_MonoLSB ); + m_pdisplayImg->setColor( 1, qRgb(0,0,0)); + m_pdisplayImg->setColor( 0, qRgb(200,215,180) ); + + Simulator::self()->addToUpdateList( this ); + + setLabelPos( -32,-68, 0); + setShowId( true ); + + resetState(); +} + +Ks0108::~Ks0108(){} + +void Ks0108::initialize() +{ + eNode* enode = m_pinEn.getEnode();// Register for Scl changes callback + if( enode ) enode->addToChangedFast(this); + + enode = m_pinRst.getEnode(); // Register for Rst changes callback + if( enode ) enode->addToChangedFast(this); +} + +void Ks0108::resetState() +{ + clearDDRAM(); + clearLcd(); + reset() ; + updateStep(); +} + +void Ks0108::setVChanged() // Called when En Pin changes +{ + if( m_pinRst.getVolt()<2.5 ) reset(); // Reset Pin is Low + else m_reset = false; + + bool Write = ( m_pinRW.getVolt()<2.5 ); // Read or Write + if( m_Write != Write ) // Set Read or Write Impedances + { + m_Write = Write; + double imped; + if( Write ) imped = high_imp; // Data bus as Input + else imped = 40; // Data bus as Output + + for( int i=0; i<8; i++ ) + { + m_dataeSource[i]->setOut( false ); + m_dataeSource[i]->setImp( imped ); + } + } + + bool Scl = (m_pinEn.getVolt()>2.5); + + if ( Scl && !m_lastScl ) // This is a clock Rising Edge + { + m_lastScl = true; + if( Write ) return; // Only Read in Rising Edge + } + else if( !Scl && m_lastScl ) // This is a clock Falling edge + { + m_lastScl = false; + if( !Write ) return; // Only Write in Falling Edge + } + else + { + m_lastScl = Scl; + return; + } + m_input = 0; + if( Write ) + { + //qDebug()<<"Reading "<getVolt()>2.5 ) + { + //qDebug()<setOut( ((data & 1)==1) ); + m_dataeSource[i]->stampOutput(); + data >>= 1; + } +} + +void Ks0108::ReadStatus() +{ + for( int i=0; i<8; i++ ) + { + bool out = false; + + if ( i == 4 ) out = m_reset; + else if( i == 5 ) out = !m_dispOn; + + m_dataeSource[i]->setOut( out ); + m_dataeSource[i]->stampOutput(); + } +} + +void Ks0108::writeData( int data ) +{ + //qDebug() << "Ks0108::writeData "< 0); +} + +void Ks0108::setYaddr( int addr ) +{ + //qDebug() << "Ks0108::setYaddr "<fill(0); +} + +void Ks0108::clearDDRAM() +{ + for(int row=0;row<8;row++) + for( int col=0;col<128;col++ ) + m_aDispRam[row][col] = 0; +} + +void Ks0108::incrementPointer() +{ + if( m_Cs1 ) + { + m_addrY1++; + if( m_addrY1 > 63 ) + { + m_addrY1 = 0; + //m_addrX++; + } + /*if( m_addrX > 7 ) + { + m_addrX = 0; + }*/ + } + if( m_Cs2 ) + { + m_addrY2++; + if( m_addrY2 > 63 ) + { + m_addrY2 = 0; + //m_addrX++; + } + /*if( m_addrX > 7 ) + { + m_addrX = 0; + }*/ + } +} + +void Ks0108::reset() +{ + m_addrX1 = 0; + m_addrY1 = 0; + m_addrX2 = 0; + m_addrY2 = 0; + m_startLin = 0; + m_dispOn = false; + m_reset = true; +} + +void Ks0108::remove() +{ + if( m_pinRst.isConnected()) m_pinRst.connector()->remove(); + if( m_pinCs1.isConnected()) m_pinCs1.connector()->remove(); + if( m_pinCs2.isConnected()) m_pinCs2.connector()->remove(); + if( m_pinDC.isConnected() ) m_pinDC.connector()->remove(); + if( m_pinRW.isConnected() ) m_pinRW.connector()->remove(); + if( m_pinEn.isConnected() ) m_pinEn.connector()->remove(); + + for( int i=0; i<8; i++ ) + { + if( m_dataPin[i]->isConnected() ) m_dataPin[i]->connector()->remove(); + + delete m_dataeSource[i]; + } + + delete m_pdisplayImg; + Simulator::self()->remFromUpdateList( this ); + + Component::remove(); +} + +void Ks0108::updateStep() +{ + if( !m_dispOn ) m_pdisplayImg->fill(0); // Display Off + else + { + for(int row=0;row<8;row++) + { + for( int col=0;col<128;col++ ) + { + char abyte = m_aDispRam[row][col]; + for( int bit=0; bit<8; bit++ ) + { + m_pdisplayImg->setPixel(col,row*8+bit,(abyte & 1) ); + abyte >>= 1; + } + } + } + } + update(); +} + +void Ks0108::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + QPen pen(Qt::black, 1, Qt::SolidLine, Qt::RoundCap, Qt::RoundJoin); + p->setPen( pen ); + + p->setBrush( QColor(50, 70, 100) ); + p->drawRoundedRect( m_area,2,2 ); + p->setBrush( QColor(200, 220, 180) ); + p->drawRoundedRect( -70, -48, 140, 76, 8, 8 ); + p->drawImage(-64,-42,*m_pdisplayImg ); +} + +#include "moc_ks0108.cpp" diff --git a/src/gui/circuitwidget/components/outputs/ks0108.h b/src/gui/circuitwidget/components/outputs/ks0108.h new file mode 100644 index 0000000..18b215e --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/ks0108.h @@ -0,0 +1,106 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef KS0108_H +#define KS0108_H + +#include "component.h" +#include "itemlibrary.h" +#include "e-source.h" +#include "pin.h" + +class MAINMODULE_EXPORT Ks0108 : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( bool CS_Active_Low READ csActLow WRITE setCsActLow DESIGNABLE true USER true ) + + public: + Ks0108( QObject* parent, QString type, QString id ); + ~Ks0108(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem* libraryItem(); + + void initialize(); + void resetState(); + + void setVChanged(); + + void updateStep(); + + virtual void paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + public slots: + void remove(); + void setCsActLow( bool low ) { m_csActLow = low; } + bool csActLow() { return m_csActLow; } + + protected: + void initPins(); + + void writeData( int data ); + void proccessCommand( int command ); + void ReadData(); + void ReadStatus(); + void dispOn( int state ); + void setYaddr( int addr ); + void setXaddr( int addr ); + void startLin( int line ); + void clearLcd(); + + void incrementPointer(); + + void reset(); + + void clearDDRAM(); + + QImage *m_pdisplayImg; //Visual representation of the LCD + + unsigned char m_aDispRam[8][128]; //128x64 DDRAM + + + int m_input; + int m_addrX1; // X RAM address + int m_addrY1; // Y RAM address + int m_addrX2; // X RAM address + int m_addrY2; // Y RAM address + int m_startLin; + + bool m_csActLow; + bool m_Cs1; + bool m_Cs2; + bool m_dispOn; + bool m_lastScl; + bool m_reset; + bool m_Write; + + //Inputs + Pin m_pinRst; + Pin m_pinCs2; + Pin m_pinCs1; + Pin m_pinEn; + Pin m_pinRW; + Pin m_pinDC; + + std::vector m_dataPin; + std::vector m_dataeSource; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/outputs/led.cpp b/src/gui/circuitwidget/components/outputs/led.cpp new file mode 100644 index 0000000..9186e8b --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/led.cpp @@ -0,0 +1,77 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "led.h" +#include "pin.h" + +Component* Led::construct( QObject* parent, QString type, QString id ) +{ return new Led( parent, type, id ); } + +LibraryItem* Led::libraryItem() +{ + return new LibraryItem( + tr( "Led" ), + tr( "Outputs" ), + "led.png", + "Led", + Led::construct); +} + +Led::Led( QObject* parent, QString type, QString id ) + : LedBase( parent, type, id ) +{ + m_area = QRect( -8, -10, 20, 20 ); + + m_pin.resize( 2 ); + + QString nodid = m_id; + nodid.append(QString("-lPin")); + Pin* pin = new Pin( 180, QPoint(-16, 0 ), nodid, 0, this); + pin->setLength( 10 ); + m_ePin[0] = pin; + m_pin[0] = pin; + + nodid = m_id; + nodid.append(QString("-rPin")); + pin = new Pin( 0, QPoint( 16, 0 ), nodid, 1, this); + m_ePin[1] = pin; + m_pin[1] = pin; +} +Led::~Led(){} + + +void Led::drawBackground( QPainter *p ) +{ + p->drawEllipse( -6, -8, 16, 16 ); + //p->drawLine( 11,-5, 11, 5 ); +} + +void Led::drawForeground( QPainter *p ) +{ + static const QPointF points[3] = { + QPointF( 8, 0 ), + QPointF(-3,-6 ), + QPointF(-3, 6 ) }; + + p->drawPolygon( points, 3 ); + p->drawLine( 8,-4, 8, 4 ); + p->drawLine(-6, 0, 10, 0 ); +} + +#include "moc_led.cpp" diff --git a/src/gui/circuitwidget/components/outputs/led.h b/src/gui/circuitwidget/components/outputs/led.h new file mode 100644 index 0000000..f2f7699 --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/led.h @@ -0,0 +1,42 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef LED_H +#define LED_H + +#include "ledbase.h" +#include "itemlibrary.h" + +class MAINMODULE_EXPORT Led : public LedBase +{ + Q_OBJECT + + public: + Led( QObject* parent, QString type, QString id ); + ~Led(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + protected: + void drawBackground( QPainter *p ); + void drawForeground( QPainter *p ); +}; + +#endif diff --git a/src/gui/circuitwidget/components/outputs/ledbar.cpp b/src/gui/circuitwidget/components/outputs/ledbar.cpp new file mode 100644 index 0000000..2585195 --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/ledbar.cpp @@ -0,0 +1,209 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "ledbar.h" +#include "connector.h" +#include "circuit.h" +#include "pin.h" + + +Component* LedBar::construct( QObject* parent, QString type, QString id ) +{ return new LedBar( parent, type, id ); } + +LibraryItem* LedBar::libraryItem() +{ + return new LibraryItem( + tr( "LedBar" ), + tr( "Outputs" ), + "ledbar.png", + "LedBar", + LedBar::construct); +} + +LedBar::LedBar( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) +{ + m_area = QRect( -8, -28, 16, 64 ); + m_color = QColor(0,0,0); + + setLabelPos(-16,-44, 0); + + m_size = 0; + setSize( 8 ); + + setRes( 0.6 ); +} +LedBar::~LedBar(){} + +void LedBar::createLeds( int c ) +{ + bool initialized = m_size > 0; + int start = m_size; + m_size = m_size+c; + m_led.resize( m_size ); + m_pin.resize( m_size*2 ); + + for( int i=start; isetParentItem(this); + m_led[i]->setPos( 0, -28+2+i*8 ); + //m_led[i]->setEnabled( false ); + m_led[i]->setFlag( QGraphicsItem::ItemIsSelectable, false ); + m_led[i]->setAcceptedMouseButtons(0); + + QPoint pinpos = QPoint(-16,-32+8+i*8 ); + Pin* pin = new Pin( 180, pinpos, ledid+"-pinP", 0, this); + m_led[i]->setEpin( 0, pin ); + m_pin[index] = pin; + + pinpos = QPoint( 16,-32+8+i*8 ); + pin = new Pin( 0, pinpos, ledid+"-pinN", 0, this); + m_led[i]->setEpin( 1, pin ); + m_pin[index+1] = pin; + + if( initialized ) + { + m_led[i]->setGrounded( grounded() ); + m_led[i]->setRes( res() ); + m_led[i]->setMaxCurrent( maxCurrent() ); + m_led[i]->setThreshold( threshold() ); + m_led[i]->setColor( color() ); + } + } + //update(); +} + +void LedBar::deleteLeds( int d ) +{ + if( d > m_size ) d = m_size; + int start = m_size-d; + + if( grounded() ) + { + for( int i=start; isetGrounded( false ); + } + + for( int i=start*2; iisConnected() ) pin->connector()->remove(); + + delete pin; + } + for( int i=start; iremoveComp( m_led[i] ); + m_size = m_size-d; + m_led.resize( m_size ); + m_pin.resize( m_size*2 ); + //Circuit::self()->update(); +} + +void LedBar::setColor( LedBase::LedColor color ) +{ + foreach( LedSmd* led, m_led ) + led->setColor( color ); +} + +LedBase::LedColor LedBar::color() +{ + return m_led[0]->color(); +} + +int LedBar::size() +{ + return m_size; +} + +void LedBar::setSize( int size ) +{ + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + if( size == 0 ) size = 8; + + if ( size < m_size ) deleteLeds( m_size-size ); + else if( size > m_size ) createLeds( size-m_size ); + + m_area = QRect( -8, -28, 16, m_size*8 ); + + if( pauseSim ) Simulator::self()->runContinuous(); + Circuit::self()->update(); +} + +double LedBar::threshold() +{ + return m_led[0]->threshold(); +} + +void LedBar::setThreshold( double threshold ) +{ + for( int i=0; isetThreshold( threshold ); +} + +double LedBar::maxCurrent() +{ + return m_led[0]->maxCurrent(); +} +void LedBar::setMaxCurrent( double current ) +{ + for( int i=0; isetMaxCurrent( current ); +} + +double LedBar::res() { return m_led[0]->res(); } + +void LedBar::setRes( double resist ) +{ + if( resist == 0 ) resist = 1e-14; + + for( int i=0; isetRes( resist ); +} + +bool LedBar::grounded() +{ + if( m_size == 0 ) return false; + return m_led[0]->grounded(); +} + +void LedBar::setGrounded( bool grounded ) +{ + for( int i=0; isetGrounded( grounded ); +} + +void LedBar::remove() +{ + for( int i=0; iremoveComp( m_led[i] ); + + Component::remove(); +} +void LedBar::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + p->drawRoundRect( m_area, 4, 4 ); +} + +#include "moc_ledbar.cpp" diff --git a/src/gui/circuitwidget/components/outputs/ledbar.h b/src/gui/circuitwidget/components/outputs/ledbar.h new file mode 100644 index 0000000..cf07af7 --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/ledbar.h @@ -0,0 +1,77 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef LEDBAR_H +#define LEDBAR_H + +#include "itemlibrary.h" +#include "component.h" +#include "ledsmd.h" + +class MAINMODULE_EXPORT LedBar : public Component +{ + Q_OBJECT + Q_PROPERTY( LedBase::LedColor Color READ color WRITE setColor DESIGNABLE true USER true ) + Q_PROPERTY( int Size READ size WRITE setSize DESIGNABLE true USER true ) + Q_PROPERTY( double Threshold READ threshold WRITE setThreshold DESIGNABLE true USER true ) + Q_PROPERTY( double MaxCurrent READ maxCurrent WRITE setMaxCurrent DESIGNABLE true USER true ) + Q_PROPERTY( double Resistance READ res WRITE setRes DESIGNABLE true USER true ) + Q_PROPERTY( bool Grounded READ grounded WRITE setGrounded DESIGNABLE true USER true ) + + public: + + LedBar( QObject* parent, QString type, QString id ); + ~LedBar(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + void setColor( LedBase::LedColor color ); + LedBase::LedColor color(); + + int size(); + void setSize( int size ); + + double threshold(); + void setThreshold( double threshold ); + + double maxCurrent(); + void setMaxCurrent( double current ); + + double res(); + void setRes( double resist ); + + bool grounded(); + void setGrounded( bool grounded ); + + void createLeds( int c ); + void deleteLeds( int d ); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void remove(); + + private: + std::vector m_led; + + int m_size; +}; + +#endif diff --git a/src/gui/circuitwidget/components/outputs/ledbase.cpp b/src/gui/circuitwidget/components/outputs/ledbase.cpp new file mode 100644 index 0000000..48eea8d --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/ledbase.cpp @@ -0,0 +1,188 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "ledbase.h" +#include "connector.h" +#include "simulator.h" +#include "pin.h" + +static const char* LedBase_properties[] = { + QT_TRANSLATE_NOOP("App::Property","MaxCurrent"), + QT_TRANSLATE_NOOP("App::Property","Grounded") +}; + +LedBase::LedBase( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eLed( id.toStdString() ) +{ + Q_UNUSED( LedBase_properties ); + + m_overCurrent = false; + m_grounded = false; + m_ground = 0l; + m_scrEnode = 0l; + m_counter = 0; + m_bright = 0; + + m_color = QColor( Qt::black ); + setColor( yellow ); + + m_valLabel->setEnabled( false ); + m_valLabel->setVisible( false ); + + Simulator::self()->addToUpdateList( this ); +} +LedBase::~LedBase() +{ +} + +void LedBase::updateStep() +{ + uint bright = m_bright; + eLed::updateBright(); + + if( m_bright > 255+75 ) + { + m_bright = 255+75; + m_counter++; + + if( m_counter > 4 ) + { + m_counter = 0; + m_overCurrent = !m_overCurrent; + update(); + } + } + else if( m_overCurrent ) + { + m_overCurrent = false; + m_counter = 0; + update(); + } + else if( bright != m_bright ) update(); +} + +bool LedBase::grounded() +{ + return m_grounded; +} + +void LedBase::setGrounded( bool grounded ) +{ + if( grounded == m_grounded ) return; + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + if( grounded ) + { + Pin* pin1 = (static_cast(m_ePin[1])); + if( m_ePin[1]->isConnected() ) pin1->connector()->remove(); + pin1->setEnabled( false ); + pin1->setVisible( false ); + + QString nodid = m_id; + nodid.append(QString("Gnod-eSource")); + + m_ground = new eSource( nodid.toStdString(), m_ePin[1] ); + + m_scrEnode = new eNode( nodid+"scr" ); + m_scrEnode->setNodeNumber(0); + Simulator::self()->remFromEnodeList( m_scrEnode, /*delete=*/ false ); + + m_ePin[1]->setEnode( m_scrEnode ); + } + else + { + Pin* pin1 = (static_cast(m_ePin[1])); + + pin1->setEnabled( true ); + pin1->setVisible( true ); + + delete m_ground; + + m_ground = 0l; + m_scrEnode = 0l; + + m_ePin[1]->setEnode( 0l ); + } + m_grounded = grounded; + + if( pauseSim ) Simulator::self()->runContinuous(); +} + +void LedBase::remove() +{ + if( m_ground ) delete m_ground; + + Simulator::self()->remFromUpdateList( this ); + + Component::remove(); +} + +void LedBase::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + QPen pen(Qt::black, 4, Qt::SolidLine, Qt::RoundCap, Qt::RoundJoin); + + QColor color; + + if( m_overCurrent ) // Max Current + { + //m_bright = 0; + p->setBrush( Qt::white ); + color = QColor( Qt::white ); + pen.setColor( color ); + } + else + { + int overBight = 100; + + if( m_bright > 25 ) + { + m_bright += 15; // Set a Minimun Bright + + if( m_bright > 255 ) + { + overBight += m_bright-255; + m_bright = 255; + } + } + + color = QColor( m_bright, m_bright, overBight ); // Default = yellow + + if ( m_ledColor == red ) color = QColor( m_bright, m_bright/3, overBight ); + else if( m_ledColor == green ) color = QColor( overBight, m_bright, m_bright*2/3 ); + else if( m_ledColor == blue ) color = QColor( overBight, m_bright/2, m_bright ); + else if( m_ledColor == orange ) color = QColor( m_bright, m_bright*2/3, overBight ); + else if( m_ledColor == purple ) color = QColor( m_bright, overBight, m_bright*2/3 ); + } + p->setPen(pen); + drawBackground( p ); + + pen.setColor( color ); + pen.setWidth(2.5); + p->setPen(pen); + p->setBrush( color ); + + drawForeground( p ); +} + +#include "moc_ledbase.cpp" diff --git a/src/gui/circuitwidget/components/outputs/ledbase.h b/src/gui/circuitwidget/components/outputs/ledbase.h new file mode 100644 index 0000000..f25484f --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/ledbase.h @@ -0,0 +1,80 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef LEDBASE_H +#define LEDBASE_H + +#include "e-led.h" +#include "e-source.h" +#include "component.h" +#include +#include + +class MAINMODULE_EXPORT LedBase : public Component, public eLed +{ + Q_OBJECT + Q_PROPERTY( LedColor Color READ color WRITE setColor DESIGNABLE true USER true ) + Q_PROPERTY( double Threshold READ threshold WRITE setThreshold DESIGNABLE true USER true ) + Q_PROPERTY( double MaxCurrent READ maxCurrent WRITE setMaxCurrent DESIGNABLE true USER true ) + Q_PROPERTY( double Resistance READ res WRITE setRes DESIGNABLE true USER true ) + Q_PROPERTY( bool Grounded READ grounded WRITE setGrounded DESIGNABLE true USER true ) + Q_ENUMS( LedColor ) + + public: + LedBase( QObject* parent, QString type, QString id ); + ~LedBase(); + + enum LedColor { + yellow = 0, + red, + green, + blue, + orange, + purple + }; + + void setColor( LedColor color ) { m_ledColor = color; } + LedColor color() { return m_ledColor; } + + void updateStep(); + + bool grounded(); + void setGrounded( bool grounded ); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void remove(); + + protected: + virtual void drawBackground( QPainter *p )=0; + virtual void drawForeground( QPainter *p )=0; + + bool m_grounded; + eSource* m_ground; + eNode* m_scrEnode; + + LedColor m_ledColor; + + bool m_overCurrent; + int m_counter; + +}; + +#endif diff --git a/src/gui/circuitwidget/components/outputs/ledmatrix.cpp b/src/gui/circuitwidget/components/outputs/ledmatrix.cpp new file mode 100644 index 0000000..a1f450a --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/ledmatrix.cpp @@ -0,0 +1,316 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "ledmatrix.h" +#include "connector.h" +#include "circuit.h" +#include "pin.h" + + +Component* LedMatrix::construct( QObject* parent, QString type, QString id ) +{ return new LedMatrix( parent, type, id ); } + +LibraryItem* LedMatrix::libraryItem() +{ + return new LibraryItem( + tr( "LedMatrix" ), + tr( "Outputs" ), + "ledmatrix.png", + "LedMatrix", + LedMatrix::construct); +} + +LedMatrix::LedMatrix( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( id.toStdString() ) +{ + m_rows = 8; + m_cols = 8; + m_resist = 0.6; + m_maxCurr = 0.02; + m_threshold = 2.4; + + m_ledColor = LedBase::yellow; + m_color = QColor(0,0,0); + m_verticalPins = false; + createMatrix(); +} +LedMatrix::~LedMatrix(){} + +void LedMatrix::initialize() +{ + for( int row=0; rowgetEnode(); + + for( int col=0; colgetEnode(); + + LedSmd* lsmd = m_led[row][col]; + lsmd->getEpin(0)->setEnode( rowEnode ); + lsmd->getEpin(1)->setEnode( colEnode ); + } + } +} + +void LedMatrix::setupMatrix( int rows, int cols ) +{ + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + deleteMatrix(); + m_rows = rows; + m_cols = cols; + createMatrix(); + + Circuit::self()->update(); + + if( pauseSim ) Simulator::self()->runContinuous(); +} + +void LedMatrix::createMatrix() +{ + if( m_verticalPins ) m_area = QRect( -4, -8, m_cols*8, m_rows*8+8 ); + else m_area = QRect( -8, -8, m_cols*8+8, m_rows*8+8 ); + + m_led.resize( m_rows, std::vector(m_cols) ); + m_rowPin.resize( m_rows ); + m_colPin.resize( m_cols ); + + for( int row=0; rowsetParentItem(this); + lsmd->setNumEpins(2); + lsmd->setMaxCurrent( 0.02 ); + lsmd->setPos( col*8, row*8 ); + lsmd->setRes( m_resist ); + lsmd->setMaxCurrent( m_maxCurr ); + lsmd->setThreshold( m_threshold ); + lsmd->setColor( m_ledColor ); + //lsmd->setEnabled(false); + lsmd->setFlag( QGraphicsItem::ItemIsSelectable, false ); + lsmd->setAcceptedMouseButtons(0); + + m_led[row][col] = lsmd; + } + } + for( int col=0; colisConnected() ) pin->connector()->remove(); + delete pin; + + for( int col=0; colremoveComp( m_led[row][col] ); + } + } + for( int col=0; colisConnected() ) pin->connector()->remove(); + delete pin; + } + m_led.resize(0); +} + +void LedMatrix::setColor( LedBase::LedColor color ) +{ + m_ledColor = color; + + for( int row=0; rowsetColor( color ); + } + } +} + +LedBase::LedColor LedMatrix::color() +{ + return m_ledColor; +} + +int LedMatrix::rows() +{ + return m_rows; +} + +void LedMatrix::setRows( int rows ) +{ + if( rows == m_rows ) return; + if( rows < 1 ) rows = 1; + setupMatrix( rows, m_cols ); +} + +int LedMatrix::cols() +{ + return m_cols; +} + +void LedMatrix::setCols( int cols ) +{ + if( cols == m_cols ) return; + if( cols < 1 ) cols = 1; + setupMatrix( m_rows, cols ); +} + +bool LedMatrix::verticalPins() +{ + return m_verticalPins; +} + +void LedMatrix::setVerticalPins( bool v ) +{ + if( v == m_verticalPins ) return; + m_verticalPins = v; + + if( v ) + { + for( int i=0; isetPos( i*8, -16 ); + m_rowPin[i]->setRotation( 90 ); + } + } + else + { + for( int i=0; isetPos( -16, i*8 ); + m_rowPin[i]->setRotation( 0 ); + } + } + for( int i=0; iisMoved(); + + if( m_verticalPins ) m_area = QRect( -4, -8, m_cols*8, m_rows*8+8 ); + else m_area = QRect( -8, -8, m_cols*8+8, m_rows*8+8 ); + + update(); +} + +double LedMatrix::threshold() +{ + return m_threshold; +} + +void LedMatrix::setThreshold( double threshold ) +{ + if( threshold < 1e-6 ) threshold = 1e-6; + m_threshold = threshold; + + for( int row=0; rowsetThreshold( threshold ); + } + } +} + +double LedMatrix::maxCurrent() +{ + return m_maxCurr; +} +void LedMatrix::setMaxCurrent( double current ) +{ + if( current < 1e-6 ) current = 1e-6; + m_maxCurr = current; + + for( int row=0; rowsetMaxCurrent( current ); + } + } +} + +double LedMatrix::res() +{ + return m_resist; +} + +void LedMatrix::setRes( double resist ) +{ + if( resist == 0 ) resist = 1e-14; + + m_resist = resist; + + for( int row=0; rowsetRes( resist ); + } + } +} + +void LedMatrix::remove() +{ + deleteMatrix(); + + Component::remove(); +} + +void LedMatrix::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + p->drawRoundRect( m_area, 4, 4 ); +} + +#include "moc_ledmatrix.cpp" + diff --git a/src/gui/circuitwidget/components/outputs/ledmatrix.h b/src/gui/circuitwidget/components/outputs/ledmatrix.h new file mode 100644 index 0000000..d58ad40 --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/ledmatrix.h @@ -0,0 +1,95 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef LEDMATRIX_H +#define LEDMATRIX_H + +#include "itemlibrary.h" +#include "component.h" +#include "e-element.h" +#include "ledsmd.h" + +class MAINMODULE_EXPORT LedMatrix : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( LedBase::LedColor Color READ color WRITE setColor DESIGNABLE true USER true ) + Q_PROPERTY( int Rows READ rows WRITE setRows DESIGNABLE true USER true ) + Q_PROPERTY( int Cols READ cols WRITE setCols DESIGNABLE true USER true ) + Q_PROPERTY( bool Vertical_Pins READ verticalPins WRITE setVerticalPins DESIGNABLE true USER true ) + Q_PROPERTY( double Threshold READ threshold WRITE setThreshold DESIGNABLE true USER true ) + Q_PROPERTY( double MaxCurrent READ maxCurrent WRITE setMaxCurrent DESIGNABLE true USER true ) + Q_PROPERTY( double Resistance READ res WRITE setRes DESIGNABLE true USER true ) + + public: + LedMatrix( QObject* parent, QString type, QString id ); + ~LedMatrix(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + void setColor( LedBase::LedColor color ); + LedBase::LedColor color(); + + int rows(); + void setRows( int rows ); + + int cols(); + void setCols( int cols ); + + bool verticalPins(); + void setVerticalPins( bool v ); + + double threshold(); + void setThreshold( double threshold ); + + double maxCurrent(); + void setMaxCurrent( double current ); + + double res(); + void setRes( double resist ); + + virtual void initialize(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void remove(); + + private: + void setupMatrix( int rows, int cols ); + void createMatrix(); + void deleteMatrix(); + + std::vector> m_led; + std::vector m_rowPin; + std::vector m_colPin; + + bool m_verticalPins; + + LedBase::LedColor m_ledColor; + + double m_resist; + double m_maxCurr; + double m_threshold; + + int m_rows; + int m_cols; +}; + +#endif diff --git a/src/gui/circuitwidget/components/outputs/ledsmd.cpp b/src/gui/circuitwidget/components/outputs/ledsmd.cpp new file mode 100644 index 0000000..0838f37 --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/ledsmd.cpp @@ -0,0 +1,42 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "ledsmd.h" +#include "e-pin.h" + + +LedSmd::LedSmd( QObject* parent, QString type, QString id, QRectF area ) + : LedBase( parent, type, id ) +{ + m_area = area; +} +LedSmd::~LedSmd(){} + + +void LedSmd::drawBackground( QPainter *p ) +{ + p->drawRoundedRect( m_area, 0, 0); +} + +void LedSmd::drawForeground( QPainter *p ) +{ + p->drawRoundedRect( m_area, 0, 0 ); +} + +#include "moc_ledsmd.cpp" diff --git a/src/gui/circuitwidget/components/outputs/ledsmd.h b/src/gui/circuitwidget/components/outputs/ledsmd.h new file mode 100644 index 0000000..98d8934 --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/ledsmd.h @@ -0,0 +1,40 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef LEDSMD_H +#define LEDSMD_H + +#include "ledbase.h" + +class LibraryItem; + +class MAINMODULE_EXPORT LedSmd : public LedBase +{ + Q_OBJECT + + public: + LedSmd( QObject* parent, QString type, QString id, QRectF area ); + ~LedSmd(); + + protected: + void drawBackground( QPainter *p ); + void drawForeground( QPainter *p ); +}; + +#endif diff --git a/src/gui/circuitwidget/components/outputs/pcd8544.cpp b/src/gui/circuitwidget/components/outputs/pcd8544.cpp new file mode 100644 index 0000000..9b06955 --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/pcd8544.cpp @@ -0,0 +1,294 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ +// Based on: +// +// C++ Implementation: pcd8544 +// +// Description: This component emulates a graphic LCD module based on the +// PCD8544 controller. +// +// Author: Roland Elek , (C) 2010 +// +// Copyright: See COPYING file that comes with this distribution + +#include "itemlibrary.h" +#include "connector.h" +#include "simulator.h" +#include "pcd8544.h" + + +Component* Pcd8544::construct( QObject* parent, QString type, QString id ) +{ + return new Pcd8544( parent, type, id ); +} + +LibraryItem* Pcd8544::libraryItem() +{ + return new LibraryItem( + tr( "Pcd8544" ), + tr( "Outputs" ), + "pcd8544.png", + "Pcd8544", + Pcd8544::construct ); +} + +Pcd8544::Pcd8544( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( (id+"-eElement").toStdString() ) + , m_pRst( 270, QPoint(-32, 40), id+"-PinRst", 0, this ) + , m_pCs ( 270, QPoint(-16, 40), id+"-PinCs" , 0, this ) + , m_pDc ( 270, QPoint( 0, 40), id+"-PinDc" , 0, this ) + , m_pSi ( 270, QPoint( 16, 40), id+"-PinSi" , 0, this ) + , m_pScl( 270, QPoint( 32, 40), id+"-PinScl", 0, this ) + +{ + m_area = QRectF( -52, -52, 104, 84 ); + + m_pRst.setLabelText( " RST" ); + m_pCs.setLabelText( " CS" ); + m_pDc.setLabelText( " D/C" ); + m_pSi.setLabelText( " DIN" ); + m_pScl.setLabelText( " CLK" ); + + m_pdisplayImg = new QImage( 84, 48, QImage::Format_MonoLSB ); + m_pdisplayImg->setColor( 1, qRgb(0,0,0)); + m_pdisplayImg->setColor( 0, qRgb(200,215,180) ); + + Simulator::self()->addToUpdateList( this ); + + setLabelPos( -32,-66, 0); + setShowId( true ); + + resetState(); +} + +Pcd8544::~Pcd8544() +{ +} + +void Pcd8544::initialize() +{ + eNode* enode = m_pScl.getEnode();// Register for Scl changes callback + if( enode ) enode->addToChangedFast(this); + + enode = m_pRst.getEnode(); // Register for Rst changes callback + if( enode ) enode->addToChangedFast(this); +} + +void Pcd8544::resetState() +{ + clearDDRAM(); + clearLcd(); + reset() ; + updateStep(); +} + +void Pcd8544::setVChanged() // Called when Scl Pin changes +{ + if( m_pRst.getVolt()<0.3 ) // Reset Pin is Low + { + reset(); + return; + } + if( m_pCs.getVolt()>1.6 ) // Cs Pin High: Lcd not selected + { + m_cinBuf = 0; // Initialize serial buffer + m_inBit = 0; + return; + } + if( m_pScl.getVolt()<1.6 ) // This is an Scl Falling Edge + { + m_lastScl = false; + return; + } + else if( m_lastScl ) return; // Not a rising edge + m_lastScl = true; + + m_cinBuf &= ~1; //Clear bit 0 + + if( m_pSi.getVolt()>1.6 ) m_cinBuf |= 1; + + if( m_inBit == 7 ) + { + if( m_pDc.getVolt()>1.6 ) // Write Data + { + m_aDispRam[m_addrY][m_addrX] = m_cinBuf; + incrementPointer(); + } + else // Write Command + { + //if(m_cinBuf == 0) { //(NOP) } + + if((m_cinBuf & 0xF8) == 0x20) // Function set + { + m_bH = ((m_cinBuf & 1) == 1); + m_bV = ((m_cinBuf & 2) == 2); + m_bPD = ((m_cinBuf & 4) == 4); + } + else + { + if(m_bH) + { + //(Extended instruction set) + //None implemented yet - are they relevant at all? + //Visualization of e.g. contrast setting could be + //useful in some cases, meaningless in others. + } + else // Basic instruction set + { + if((m_cinBuf & 0xFA) == 0x08) // Display control + { + m_bD = ((m_cinBuf & 0x04) == 0x04); + m_bE = (m_cinBuf & 0x01); + } + else if((m_cinBuf & 0xF8) == 0x40)// Set Y RAM address + { + int addrY = m_cinBuf & 0x07; + if( addrY<6 ) m_addrY = addrY; + } + else if((m_cinBuf & 0x80) == 0x80)// Set X RAM address + { + int addrX = m_cinBuf & 0x7F; + if( addrX<84 ) m_addrX = addrX; + } + } + } + } + m_inBit = 0; + } + else + { + m_cinBuf <<= 1; + m_inBit++; + } +} + +void Pcd8544::updateStep() +{ + if ( m_bPD ) m_pdisplayImg->fill(0); // Power-Down mode + else if( !m_bD && !m_bE ) m_pdisplayImg->fill(0);// Blank Display mode, blank the visuals + else if( !m_bD && m_bE ) m_pdisplayImg->fill(1); //All segments on + else + { + for(int row=0;row<6;row++) + { + for( int col=0;col<84;col++ ) + { + char abyte = m_aDispRam[row][col]; + for( int bit=0; bit<8; bit++ ) + { + //This takes inverse video mode into account: + m_pdisplayImg->setPixel(col,row*8+bit, + (abyte & 1) ^ ((m_bD && m_bE) ? 1 : 0) ); + + abyte >>= 1; + } + } + } + } + update(); +} + +void Pcd8544::clearLcd() +{ + m_pdisplayImg->fill(0); +} + +void Pcd8544::clearDDRAM() +{ + for(int row=0;row<6;row++) + for( int col=0;col<84;col++ ) + m_aDispRam[row][col] = 0; +} + +void Pcd8544::incrementPointer() +{ + if( m_bV ) + { + m_addrY++; + if( m_addrY >= 6 ) + { + m_addrY = 0; + m_addrX++; + } + if( m_addrX >= 84 ) + { + m_addrX = 0; + } + } + else + { + m_addrX++; + if( m_addrX >= 84 ) + { + m_addrX = 0; + m_addrY++; + } + if( m_addrY >= 6 ) + { + m_addrY = 0; + } + } +} + +void Pcd8544::reset() +{ + m_cinBuf = 0; + m_inBit = 0; + m_addrX = 0; + m_addrY = 0; + m_bPD = true; + m_bV = false; + m_bH = false; + m_bE = false; + m_bD = false; +} + +void Pcd8544::remove() +{ + if( m_pRst.isConnected() ) m_pRst.connector()->remove(); + if( m_pCs.isConnected() ) m_pCs.connector()->remove(); + if( m_pDc.isConnected() ) m_pDc.connector()->remove(); + if( m_pSi.isConnected() ) m_pSi.connector()->remove(); + if( m_pScl.isConnected() ) m_pScl.connector()->remove(); + + delete m_pdisplayImg; + Simulator::self()->remFromUpdateList( this ); + + Component::remove(); +} + +void Pcd8544::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + QPen pen(Qt::black, 1, Qt::SolidLine, Qt::RoundCap, Qt::RoundJoin); + p->setPen( pen ); + + p->setBrush( QColor(50, 70, 100) ); + p->drawRoundedRect( m_area,2,2 ); + p->setBrush( QColor(200, 220, 180) ); + p->drawRoundedRect( -48, -48, 96, 60, 8, 8 ); + p->drawImage(-42,-42,*m_pdisplayImg ); + /*p->setFont(QFont("sans",6)); + p->drawText(-48, 40,QString("D/C /RST /CS SCL SI")); //TODO: beautify this + p->setFont(QFont()); + p->drawText(-30,-55,"PCD8544");*/ +} + + +#include "moc_pcd8544.cpp" diff --git a/src/gui/circuitwidget/components/outputs/pcd8544.h b/src/gui/circuitwidget/components/outputs/pcd8544.h new file mode 100644 index 0000000..5ee10b2 --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/pcd8544.h @@ -0,0 +1,97 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ +// Based on: + +// C++ Interface: pcd8544 +// +// Description: This component emulates a graphic LCD module based on the +// PCD8544 controller. +// +// Author: Roland Elek , (C) 2010 +// +// Copyright: See COPYING file that comes with this distribution + + +#ifndef PCD8544_H +#define PCD8544_H + +#include "component.h" +#include "itemlibrary.h" +#include "e-element.h" +#include "pin.h" + +class MAINMODULE_EXPORT Pcd8544 : public Component, public eElement +{ + Q_OBJECT + + public: + Pcd8544( QObject* parent, QString type, QString id ); + ~Pcd8544(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem* libraryItem(); + + void initialize(); + void resetState(); + void setVChanged(); + + void updateStep(); + + void paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + public slots: + void remove(); + + protected: + void initPins(); + + virtual void clearLcd(); + + void incrementPointer(); + + void reset(); + + void clearDDRAM(); + + QImage *m_pdisplayImg; //Visual representation of the LCD + + unsigned char m_aDispRam[6][84]; //84x48 DDRAM + + //Controller state + bool m_bPD; + bool m_bV; + bool m_bH; + bool m_bD; + bool m_bE; + bool m_lastScl; + int m_addrX; // X RAM address + int m_addrY; // Y RAM address + int m_inBit; //How many bits have we read since last byte + unsigned char m_cinBuf; //Buffer where we keep incoming bits + + //Inputs + Pin m_pRst; + Pin m_pCs; + Pin m_pDc; + Pin m_pSi; + Pin m_pScl; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/outputs/servo.cpp b/src/gui/circuitwidget/components/outputs/servo.cpp new file mode 100644 index 0000000..6eff651 --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/servo.cpp @@ -0,0 +1,211 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "servo.h" +#include "simulator.h" + +static const char* Servo_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Speed") +}; + +Component* Servo::construct( QObject* parent, QString type, QString id ) +{ + return new Servo( parent, type, id ); +} + +LibraryItem* Servo::libraryItem() +{ + return new LibraryItem( + tr( "Servo" ), + tr( "Outputs" ), + "servo.png", + "Servo", + Servo::construct ); +} + +Servo::Servo( QObject* parent, QString type, QString id ) + : LogicComponent( parent, type, id ) + , eLogicDevice( id.toStdString() ) +{ + Q_UNUSED( Servo_properties ); + + m_width = 10; + m_height = 6; + + QStringList pinList; + + pinList // Inputs: + << "IL01 V+" + << "IL03 Gnd" + << "IL05 Sig" + ; + init( pinList ); + + for( int i=0; i<3;i++ ) m_inPin[i]->setLabelColor( QColor( 250, 250, 200 ) ); + + eLogicDevice::createInput( m_inPin[0] ); // V+ + eLogicDevice::createInput( m_inPin[1] ); // Gnd + eLogicDevice::createClockPin( m_inPin[2] ); // Input Clock + + m_pos = 90; + m_speed = 0.2; + + setLabelPos(-16,-40, 0); + setShowId( true ); + + resetState(); + + Simulator::self()->addToUpdateList( this ); +} +Servo::~Servo(){} + +void Servo::initialize() +{ + if( m_inPin[0]->isConnected() + & m_inPin[1]->isConnected() + & m_inPin[2]->isConnected() ) + { + eNode* enode = m_input[0]->getEpin()->getEnode(); // Gnd pin + if( enode ) enode->addToChangedFast(this); + + enode = m_input[1]->getEpin()->getEnode(); // V+ pin + if( enode ) enode->addToChangedFast(this); + + eLogicDevice::initialize(); + } +} + +void Servo::resetState() +{ + m_targetPos = 90; + m_pulseStart = 0; + m_lastUpdate = Simulator::self()->step(); + + eLogicDevice::resetState(); +} + +void Servo::updateStep() +{ + uint64_t step = Simulator::self()->step(); + + if( m_targetPos != m_pos ) + { + double updateTime = (step - m_lastUpdate)/1e6; + + int maxMove = updateTime/m_speed*60; // Maximum to move since last update + int deltaPos = m_targetPos - m_pos; + int absDeltaPos = abs(deltaPos); + + if( absDeltaPos > maxMove ) + deltaPos = absDeltaPos/deltaPos*maxMove; // keep sign of deltaPos + m_pos += deltaPos; + } + m_lastUpdate = step; + update(); +} + +void Servo::setVChanged() +{ + int clkState = eLogicDevice::getClockState(); + + if(!(eLogicDevice::getInputState(0)-eLogicDevice::getInputState(1)))// not power + { + m_targetPos = 90; + m_pulseStart = 0; + } + else if( clkState == Rising ) + { + m_pulseStart = Simulator::self()->step(); + } + else if( clkState == Falling ) + { + if( m_pulseStart == 0 ) return; + + int steps = Simulator::self()->step() - m_pulseStart; + + m_targetPos = (steps-1000)*180/1000; // Map 1mS-2mS to 0-180ª + + if ( m_targetPos>180 ) m_targetPos = 180; + else if( m_targetPos<0 ) m_targetPos = 0; + + m_pulseStart = 0; + //qDebug() << "Servo::setVChanged() m_targetPos" << m_targetPos; + } +} + +void Servo::remove() +{ + if( m_inPin[0]->isConnected() ) m_inPin[0]->connector()->remove(); + if( m_inPin[1]->isConnected() ) m_inPin[1]->connector()->remove(); + if( m_inPin[2]->isConnected() ) m_inPin[2]->connector()->remove(); + + Simulator::self()->remFromUpdateList( this ); + + Component::remove(); +} + +QPainterPath Servo::shape() const +{ + QPainterPath path; + + QVector points; + + points << QPointF(-40,-24 ) + << QPointF(-40, 24 ) + << QPointF(-16, 24 ) + << QPointF( 0, 40 ) + << QPointF( 32, 40 ) + << QPointF( 56, 8 ) + << QPointF( 56,-8 ) + << QPointF( 32,-40 ) + << QPointF( 0,-40 ) + << QPointF(-16,-24 ) + << QPointF(-40,-24 ); + + path.addPolygon( QPolygonF(points) ); + path.closeSubpath(); + return path; +} + +void Servo::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + p->setBrush( QColor(50, 70, 100) ); + p->drawRoundedRect( m_area, 4, 4 ); + //p->drawEllipse( -24, -40, 80, 80 ); + + + //p->setBrush( QColor(50, 70, 100) ); + + QPen pen = p->pen(); + pen.setColor( Qt::white);; + p->setPen(pen); + p->drawEllipse( 0,-16, 32, 32 ); + + pen.setColor( Qt::black);; + p->setPen(pen); + p->setBrush( QColor( 255, 255, 255) ); + p->save(); + p->translate( 16, 0); + p->rotate( m_pos-90 ); + p->drawRoundedRect( -8, -8, 48, 16, 8, 8 ); + p->restore(); +} + +#include "moc_servo.cpp" diff --git a/src/gui/circuitwidget/components/outputs/servo.h b/src/gui/circuitwidget/components/outputs/servo.h new file mode 100644 index 0000000..dce6c69 --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/servo.h @@ -0,0 +1,69 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef SERVO_H +#define SERVO_H + +#include "e-logic_device.h" +#include "itemlibrary.h" +#include "logiccomponent.h" + + +class MAINMODULE_EXPORT Servo : public LogicComponent, public eLogicDevice +{ + Q_OBJECT + Q_PROPERTY( double Speed READ speed WRITE setSpeed DESIGNABLE true USER true ) + + public: + QRectF boundingRect() const { return QRect( -40, -40, 96, 80 ); } + + Servo( QObject* parent, QString type, QString id ); + ~Servo(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem* libraryItem(); + + double speed() { return m_speed; } + void setSpeed( double speed ) { m_speed = speed; } + + void initialize(); + void resetState(); + void setVChanged(); + void updateStep(); + + virtual QPainterPath shape() const; + void paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + public slots: + void remove(); + + private: + int m_pos; // Actual Angular position 0-180 + int m_targetPos; // Target Angular position 0-180 + + double m_speed; // Angular speed sec/60ª + int m_minAngle; // Angle to move evry repaint + + uint64_t m_pulseStart; // Simulation step + uint64_t m_lastUpdate; // Simulation step +}; + + +#endif + diff --git a/src/gui/circuitwidget/components/outputs/sevensegment.cpp b/src/gui/circuitwidget/components/outputs/sevensegment.cpp new file mode 100644 index 0000000..8cd59cd --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/sevensegment.cpp @@ -0,0 +1,349 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "sevensegment.h" +#include "itemlibrary.h" +#include "connector.h" +#include "circuit.h" +#include "pin.h" + +static const char* SevenSegment_properties[] = { + QT_TRANSLATE_NOOP("App::Property","NumDisplays"), + QT_TRANSLATE_NOOP("App::Property","CommonCathode") +}; + +Component* SevenSegment::construct( QObject* parent, QString type, QString id ) +{ + return new SevenSegment( parent, type, id ); +} + +LibraryItem* SevenSegment::libraryItem() +{ + return new LibraryItem( + tr( "7 Segment" ), + tr( "Outputs" ), + "seven_segment.png", + "Seven Segment", + SevenSegment::construct ); +} + +SevenSegment::SevenSegment( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( id.toStdString() ) +{ + Q_UNUSED( SevenSegment_properties ); + + setId( id ); + setLabelPos( 20,-44, 0 ); + + m_color = QColor(0,0,0); + m_ledColor = LedBase::yellow; + m_commonCathode = true; + m_verticalPins = false; + m_numDisplays = 0; + m_threshold = 2.4; + m_maxCurrent = 0.02; + m_resistance = 1; + m_area = QRect( -16, -24-1, 32, 48+2 ); + + m_ePin.resize(8); + m_pin.resize(8); + + QString nodid; + QString pinid; + + // Create Pins & eNodes for 7 segments + for( int i=0; i<7; i++ ) + { + pinid = QString( 97+i ); // a..g + + nodid = m_id; + nodid.append(QString("-pin_")).append( pinid ); + m_pin[i] = new Pin( 180, QPoint( -16-8, -24+i*8 ), nodid, 0, this ); + m_ePin[i] = m_pin[i]; + } + // Pin dot + nodid = m_id; + nodid.append(QString("-pin_dot")); + m_pin[7] = new Pin( 270, QPoint( -8, 24+8 ), nodid, 0, this ); + m_ePin[7] = m_pin[7]; + + setNumDisplays(1); +} +SevenSegment::~SevenSegment() { } + +int SevenSegment::numDisplays() +{ + return m_numDisplays; +} + +void SevenSegment::setColor( LedBase::LedColor color ) +{ + m_ledColor = color; + + foreach( LedSmd* segment, m_segment ) + segment->setColor( color ); +} + +LedBase::LedColor SevenSegment::color() +{ + return m_ledColor; +} + +void SevenSegment::setNumDisplays( int displays ) +{ + if( displays < 1 ) displays = 1; + if( displays == m_numDisplays ) return; + + if( m_verticalPins ) m_area = QRect( -18, -24-1, displays*32+4, 48+2 ); + else m_area = QRect( -16, -24-1, displays*32, 48+2 ); + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + if( displays > m_numDisplays ) + { + resizeData( displays ); + for( int i=m_numDisplays; irunContinuous(); + Circuit::self()->update(); +} + +void SevenSegment::resizeData( int displays ) +{ + m_commonPin.resize( displays ); + m_cathodePin.resize( displays*8 ); + m_anodePin.resize( displays*8 ); + m_segment.resize( displays*8 ); +} + +bool SevenSegment::isCommonCathode() +{ + return m_commonCathode; +} + +void SevenSegment::setCommonCathode( bool isCommonCathode ) +{ + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + m_commonCathode = isCommonCathode; + + if( pauseSim ) Simulator::self()->runContinuous(); +} + +bool SevenSegment::verticalPins() +{ + return m_verticalPins; +} + +void SevenSegment::setVerticalPins( bool v ) +{ + if( v == m_verticalPins ) return; + m_verticalPins = v; + + if( v ) + { + for( int i=0; i<5; i++ ) + { + m_pin[i]->setPos( -16+8*i, -24-8 ); + m_pin[i]->setRotation( 90 ); + } + for( int i=5; i<8; i++ ) + { + m_pin[i]->setPos( -16+8*(i-5), 24+8 ); + m_pin[i]->setRotation( -90 ); + } + m_area = QRect( -18, -24-1, 32*m_numDisplays+4, 48+2 ); + } + else + { + for( int i=0; i<7; i++ ) + { + m_pin[i]->setPos( -16-8, -24+i*8 ); + m_pin[i]->setRotation( 0 ); + } + m_pin[7]->setPos( -8, 24+8 ); + m_pin[7]->setRotation( -90 ); + m_area = QRect( -16, -24-1, 32*m_numDisplays, 48+2 ); + } + + for( int i=0; i<8; i++ ) m_pin[i]->isMoved(); + Circuit::self()->update(); +} + +void SevenSegment::setResistance( double res ) +{ + if( res < 1e-6 ) res = 1; + m_resistance = res; + + for( uint i=0; isetRes( res ); + } +} + +double SevenSegment::threshold() +{ + return m_threshold; +} + +void SevenSegment::setThreshold( double threshold ) +{ + if( threshold < 1e-6 ) threshold = 2.4; + m_threshold = threshold; + + for( uint i=0; isetThreshold( threshold ); + } +} + +double SevenSegment::maxCurrent() +{ + return m_maxCurrent; +} + +void SevenSegment::setMaxCurrent( double current ) +{ + if( current < 1e-6 ) current = 0.02; + m_maxCurrent = current; + + for( uint i=0; isetMaxCurrent( current ); + } +} + +void SevenSegment::initialize() +{ + for( int i=0; i<8; i++ ) m_enode[i] = m_ePin[i]->getEnode(); // Get eNode of pin i + + for( int i=0; igetEnode(); // Get eNode of common + + int pin; + if( m_commonCathode ) + { + for( int j=0; j<8; j++ ) + { + pin = i*8+j; + m_cathodePin[pin]->setEnode( commonEnode ); + m_anodePin[pin]->setEnode( m_enode[j] ); + } + } + else + { + for( int j=0; j<8; j++ ) + { + pin = i*8+j; + m_anodePin[pin]->setEnode( commonEnode ); + m_cathodePin[pin]->setEnode( m_enode[j] ); + } + } + } +} + +void SevenSegment::deleteDisplay( int dispNumber ) +{ + Pin* pin = static_cast(m_commonPin[dispNumber]); + if( pin->isConnected() ) pin->connector()->remove(); + pin->reset(); + delete pin; + + for( int i=0; i<8; i++ ) Circuit::self()->removeComp( m_segment[dispNumber*8+i] ); +} + +void SevenSegment::createDisplay( int dispNumber ) +{ + int x = 32*dispNumber; + QString nodid; + QString pinid; + //LedSmd* segment[8]; + + // Pin common + nodid = m_id; + nodid.append(QString("-pin_common")).append( QString( 97+dispNumber ) ); + m_commonPin[dispNumber] = new Pin( 270, QPoint( x+8, 24+8 ), nodid, 0, this ); + + // Create segments + for( int i=0; i<8; i++ ) + { + nodid = m_id; + pinid = QString( 97+i ); + nodid.append(QString("-led_")).append( pinid ); + LedSmd* lsmd; + if( i<7 ) lsmd = new LedSmd( this, "LEDSMD", nodid, QRectF(0, 0, 13.5, 1.5) ); // Segment + else lsmd = new LedSmd( this, "LEDSMD", nodid, QRectF(0, 0, 1.5, 1.5) ); // Point + lsmd->setParentItem(this); + //lsmd->setEnabled(false); + lsmd->setFlag( QGraphicsItem::ItemIsSelectable, false ); + lsmd->setAcceptedMouseButtons(0); + lsmd->setNumEpins(2); + lsmd->setMaxCurrent( 0.02 ); + + m_anodePin[dispNumber*8+i]= lsmd->getEpin(0); + m_cathodePin[dispNumber*8+i] = lsmd->getEpin(1); + + m_segment[dispNumber*8+i] = lsmd; + } + m_segment[dispNumber*8+0]->setPos( x-5, -20 ); + m_segment[dispNumber*8+1]->setPos( x+11.5, -16 ); + m_segment[dispNumber*8+1]->setRotation(96); + m_segment[dispNumber*8+2]->setPos( x+10, 3 ); + m_segment[dispNumber*8+2]->setRotation(96); + m_segment[dispNumber*8+3]->setPos( x-8, 19 ); + m_segment[dispNumber*8+4]->setPos( x-9, 3 ); + m_segment[dispNumber*8+4]->setRotation(96); + m_segment[dispNumber*8+5]->setPos( x-7.5, -16 ); + m_segment[dispNumber*8+5]->setRotation(96); + m_segment[dispNumber*8+6]->setPos( x-6.5, 0 ); + m_segment[dispNumber*8+7]->setPos( x+12, 19 ); +} + +void SevenSegment::remove() +{ + for( int i=0; idrawRect( boundingRect() ); +} + +#include "moc_sevensegment.cpp" + diff --git a/src/gui/circuitwidget/components/outputs/sevensegment.h b/src/gui/circuitwidget/components/outputs/sevensegment.h new file mode 100644 index 0000000..900cc7c --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/sevensegment.h @@ -0,0 +1,101 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef SEVENSEGMENT_H +#define SEVENSEGMENT_H + +#include "component.h" +#include "e-element.h" +#include "ledsmd.h" + +class LibraryItem; + +class MAINMODULE_EXPORT SevenSegment : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( LedBase::LedColor Color READ color WRITE setColor DESIGNABLE true USER true ) + Q_PROPERTY( int NumDisplays READ numDisplays WRITE setNumDisplays DESIGNABLE true USER true ) + Q_PROPERTY( bool CommonCathode READ isCommonCathode WRITE setCommonCathode DESIGNABLE true USER true ) + Q_PROPERTY( bool Vertical_Pins READ verticalPins WRITE setVerticalPins DESIGNABLE true USER true ) + Q_PROPERTY( double Threshold READ threshold WRITE setThreshold DESIGNABLE true USER true ) + Q_PROPERTY( double MaxCurrent READ maxCurrent WRITE setMaxCurrent DESIGNABLE true USER true ) + Q_PROPERTY( double Resistance READ resistance WRITE setResistance DESIGNABLE true USER true ) + public: + + //QRectF boundingRect() const { return m_area; } + + SevenSegment( QObject* parent, QString type, QString id ); + ~SevenSegment(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + + LedBase::LedColor color(); + void setColor( LedBase::LedColor color ); + + int numDisplays(); + void setNumDisplays( int dispNumber ); + + bool verticalPins(); + void setVerticalPins( bool v ); + + bool isCommonCathode(); + void setCommonCathode( bool isCommonCathode ); + + double threshold(); + void setThreshold( double threshold ); + + double maxCurrent(); + void setMaxCurrent( double current ); + + double resistance() { return m_resistance; } + void setResistance( double res ); + + virtual void initialize(); + + virtual void remove(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + private: + void createDisplay( int dispNumber ); + void deleteDisplay( int dispNumber ); + void resizeData( int displays ); + + bool m_commonCathode; + bool m_verticalPins; + + int m_numDisplays; + double m_threshold; + double m_maxCurrent; + double m_resistance; + + LedBase::LedColor m_ledColor; + + std::vector m_commonPin; + std::vector m_cathodePin; + std::vector m_anodePin; + std::vector m_segment; + eNode* m_enode[8]; + //eNode* m_virtGnd; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/outputs/stepper.cpp b/src/gui/circuitwidget/components/outputs/stepper.cpp new file mode 100644 index 0000000..ca9cc26 --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/stepper.cpp @@ -0,0 +1,252 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include + +#include "stepper.h" +#include "simulator.h" + +static const char* Stepper_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Steps") +}; + +Component* Stepper::construct( QObject* parent, QString type, QString id ) +{ + return new Stepper( parent, type, id ); +} + +LibraryItem* Stepper::libraryItem() +{ + return new LibraryItem( + tr("Stepper"), + tr("Outputs"), + "steeper.png", + "Stepper", + Stepper::construct ); +} + +Stepper::Stepper( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( (id+"-eElement").toStdString() ) + , m_resA1( (id+"-eEresistorA1").toStdString() ) + , m_resA2( (id+"-eEresistorA2").toStdString() ) + , m_resB1( (id+"-eEresistorB1").toStdString() ) + , m_resB2( (id+"-eEresistorB2").toStdString() ) + , m_pinA1( 180, QPoint(-72,-32), id+"-PinA1", 0, this ) + , m_pinA2( 180, QPoint(-72, 16), id+"-PinA2", 0, this ) + , m_pinCo( 180, QPoint(-72, 0 ), id+"-PinCo", 0, this ) + , m_pinB1( 180, QPoint(-72,-16), id+"-PinB1", 0, this ) + , m_pinB2( 180, QPoint(-72, 32), id+"-PinB2", 0, this ) + , m_ePinA1Co( (id+"-ePinA1Co").toStdString(), 0 ) + , m_ePinA2Co( (id+"-ePinA2Co").toStdString(), 0 ) + , m_ePinB1Co( (id+"-ePinB1Co").toStdString(), 0 ) + , m_ePinB2Co( (id+"-ePinB2Co").toStdString(), 0 ) +{ + Q_UNUSED( Stepper_properties ); + + m_area = QRectF( -64, -50, 114, 100 ); + m_color = QColor( 50, 50, 70 ); + m_unit = "Ω"; + + m_ang = 0; + m_Ppos = 4; + m_steps = 32; + //m_res = 1e3; + m_stpang = 360*8/m_steps; + + m_pinA1.setLabelText( " A+" ); + m_pinA2.setLabelText( " A-" ); + m_pinCo.setLabelText( " Co" ); + m_pinB1.setLabelText( " B+" ); + m_pinB2.setLabelText( " B-" ); + + m_resA1.setEpin( 0, &m_pinA1 ); + m_resA1.setEpin( 1, &m_ePinA1Co ); + m_resA2.setEpin( 0, &m_pinA2 ); + m_resA2.setEpin( 1, &m_ePinA2Co ); + m_resB1.setEpin( 0, &m_pinB1 ); + m_resB1.setEpin( 1, &m_ePinB1Co ); + m_resB2.setEpin( 0, &m_pinB2 ); + m_resB2.setEpin( 1, &m_ePinB2Co ); + + setRes( 100 ); + + Simulator::self()->addToUpdateList( this ); + + setLabelPos(-32,-62, 0); + setShowId( true ); +} + +Stepper::~Stepper() +{ +} + +void Stepper::setVChanged() +{ + double voltCom = m_pinCo.getVolt(); + double phaseA = ( m_pinA1.getVolt()-voltCom )-( m_pinA2.getVolt()-voltCom ); + double phaseB = ( m_pinB1.getVolt()-voltCom )-( m_pinB2.getVolt()-voltCom ); + + if ( phaseA > 1 ) phaseA = 1; + else if( phaseA <-1 ) phaseA =-1; + else phaseA = 0; + + if ( phaseB > 1 ) phaseB = 1; + else if( phaseB <-1 ) phaseB =-1; + else phaseB = 0; + + int delta = 0; + if( (abs(phaseA)+abs(phaseB)) > 0 ) // nosense algoritm.. just works + { + int ca = 4; + int cb =-1; + if( phaseA ==-1 ) ca = 0; + if( phaseA == 0 ) cb = 2; + if( phaseA == 1 ) cb = 1; + + int newPos = ca+cb*phaseB; + + delta = newPos-m_Ppos; + if( delta > 4 ) delta = delta-8; + if( delta <-4 ) delta = delta+8; + + m_Ppos += delta; + } + else // avoid keep in half step when no input + { + delta = m_Ppos; + m_Ppos = (m_Ppos/2)*2; + delta = m_Ppos-delta; + } + m_ang += delta*m_stpang; + + if (m_ang < 0) m_ang += 360*16; + if (m_ang > 360*16) m_ang -= 360*16; + if (m_Ppos < 0) m_Ppos += 8; + if (m_Ppos > 7) m_Ppos -= 8; +} + +int Stepper::steps() +{ + return m_steps; +} +void Stepper::setSteps( int steps ) //" 4, 8,16,32" +{ + m_steps = steps/4; + m_steps *= 4; + if( m_steps < 4 ) m_steps = 4; + m_stpang = 360*8/m_steps; + m_ang = 0; + m_Ppos = 4; + update(); +} +double Stepper::res() +{ + return m_value; +} +void Stepper::setRes( double res ) +{ + m_res = res; + Component::setValue( res ); // Takes care about units multiplier + m_resA1.setResSafe( m_value*m_unitMult ); + m_resA2.setResSafe( m_value*m_unitMult ); + m_resB1.setResSafe( m_value*m_unitMult ); + m_resB2.setResSafe( m_value*m_unitMult ); +} + +void Stepper::setUnit( QString un ) +{ + Component::setUnit( un ); + m_resA1.setResSafe( m_value*m_unitMult ); + m_resA2.setResSafe( m_value*m_unitMult ); + m_resB1.setResSafe( m_value*m_unitMult ); + m_resB2.setResSafe( m_value*m_unitMult ); +} + +void Stepper::initialize() +{ + eNode* enode = m_pinA1.getEnode();// Register for clk changes callback + if( enode ) enode->addToChangedFast(this); + enode = m_pinA2.getEnode();// Register for clk changes callback + if( enode ) enode->addToChangedFast(this); + enode = m_pinB1.getEnode();// Register for clk changes callback + if( enode ) enode->addToChangedFast(this); + enode = m_pinB2.getEnode();// Register for clk changes callback + if( enode ) enode->addToChangedFast(this); + + enode = m_pinCo.getEnode();// Register for clk changes callback + if( enode ) + { + enode->addToChangedFast(this); + + m_ePinA1Co.setEnode( enode ); + m_ePinA2Co.setEnode( enode ); + m_ePinB1Co.setEnode( enode ); + m_ePinB2Co.setEnode( enode ); + } + m_resA1.initialize(); + m_resA2.initialize(); + m_resB1.initialize(); + m_resB2.initialize(); +} + +void Stepper::updateStep() +{ + update(); +} + +void Stepper::remove() +{ + if( m_pinA1.isConnected() ) m_pinA1.connector()->remove(); + if( m_pinA2.isConnected() ) m_pinA2.connector()->remove(); + if( m_pinCo.isConnected() ) m_pinCo.connector()->remove(); + if( m_pinB1.isConnected() ) m_pinB1.connector()->remove(); + if( m_pinB2.isConnected() ) m_pinB2.connector()->remove(); + + Simulator::self()->remFromUpdateList( this ); + + Component::remove(); +} + +void Stepper::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + //p->setBrush( QColor(250, 210, 230) ); + p->drawRoundRect(-64,-40, 25, 80 ); + + p->setBrush( QColor(50, 70, 100) ); + p->drawRoundRect(-48,-48, 96, 96 ); + + p->setPen( QColor(0, 0, 0) ); + p->setBrush( QColor(255, 255, 255) ); + p->drawEllipse(-37,-37, 74, 74 ); + + p->setPen ( QColor(255, 255, 255) ); + for ( int i = 0; i< 360*16; i += m_stpang*2 ) + p->drawPie(-42,-42, 84, 84, i+m_stpang*5/6, m_stpang/3 ); + + p->setPen ( QColor(0, 0, 0) ); + p->setBrush( QColor(50, 70, 100) ); + p->drawPie(-33,-33, 66, 66, m_ang-m_stpang*3/4, m_stpang*3/2 ); + + //p->setBrush( QColor(50, 70, 100) ); + p->drawEllipse(-25,-25, 50, 50); +} +#include "moc_stepper.cpp" diff --git a/src/gui/circuitwidget/components/outputs/stepper.h b/src/gui/circuitwidget/components/outputs/stepper.h new file mode 100644 index 0000000..e1b5f09 --- /dev/null +++ b/src/gui/circuitwidget/components/outputs/stepper.h @@ -0,0 +1,85 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef STEPPER_H +#define STEPPER_H + +#include "itemlibrary.h" +#include "component.h" +#include "e-element.h" +#include "e-resistor.h" +#include "pin.h" + +class MAINMODULE_EXPORT Stepper : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( int Steps READ steps WRITE setSteps DESIGNABLE true USER true ) + Q_PROPERTY( double Resistance READ res WRITE setRes DESIGNABLE true USER true ) + Q_PROPERTY( QString Unit READ unit WRITE setUnit DESIGNABLE true USER true ) + + public: + Stepper( QObject* parent, QString type, QString id ); + ~Stepper(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem* libraryItem(); + + int steps(); + void setSteps( int steps ); //" 4, 8,16,32" + + double res(); + void setRes( double rows ); + + void setUnit( QString un ); + + virtual void initialize(); + virtual void setVChanged(); + virtual void updateStep(); + + virtual void paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + public slots: + virtual void remove(); + + protected: + int m_steps; + double m_res; + int m_ang; + int m_stpang; + int m_Ppos; + + eResistor m_resA1; + eResistor m_resA2; + eResistor m_resB1; + eResistor m_resB2; + + Pin m_pinA1; + Pin m_pinA2; + Pin m_pinCo; + Pin m_pinB1; + Pin m_pinB2; + + ePin m_ePinA1Co; + ePin m_ePinA2Co; + ePin m_ePinB1Co; + ePin m_ePinB2Co; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/passive/capacitor.cpp b/src/gui/circuitwidget/components/passive/capacitor.cpp new file mode 100644 index 0000000..1ce0baf --- /dev/null +++ b/src/gui/circuitwidget/components/passive/capacitor.cpp @@ -0,0 +1,54 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "capacitor.h" + + +Component* Capacitor::construct( QObject* parent, QString type, QString id ) +{ return new Capacitor( parent, type, id ); } + +LibraryItem* Capacitor::libraryItem() +{ + return new LibraryItem( + tr( "Capacitor" ), + tr( "Passive" ), + "capacitor.png", + "Capacitor", + Capacitor::construct); +} + +Capacitor::Capacitor( QObject* parent, QString type, QString id ) + : CapacitorBase( parent, type, id ) +{ +} +Capacitor::~Capacitor(){} + +void Capacitor::paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + Component::paint( p, option, widget ); + + QPen pen = p->pen(); + pen.setWidth(3); + p->setPen(pen); + + p->drawLine(-3,-6,-3, 6 ); + p->drawLine( 3,-6, 3, 6 ); +} + +#include "moc_capacitor.cpp" diff --git a/src/gui/circuitwidget/components/passive/capacitor.h b/src/gui/circuitwidget/components/passive/capacitor.h new file mode 100644 index 0000000..4319f51 --- /dev/null +++ b/src/gui/circuitwidget/components/passive/capacitor.h @@ -0,0 +1,42 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef CAPACITOR_H +#define CAPACITOR_H + +#include "capacitorbase.h" +#include "itemlibrary.h" + +class MAINMODULE_EXPORT Capacitor : public CapacitorBase +{ + Q_OBJECT + + public: + + Capacitor( QObject* parent, QString type, QString id ); + ~Capacitor(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem* libraryItem(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); +}; + +#endif + diff --git a/src/gui/circuitwidget/components/passive/capacitorbase.cpp b/src/gui/circuitwidget/components/passive/capacitorbase.cpp new file mode 100644 index 0000000..2dd9d43 --- /dev/null +++ b/src/gui/circuitwidget/components/passive/capacitorbase.cpp @@ -0,0 +1,82 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "capacitorbase.h" +#include "pin.h" + +static const char* CapacitorBase_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Capacitance"), + QT_TRANSLATE_NOOP("App::Property","Show_Cap") +}; + + +CapacitorBase::CapacitorBase( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eCapacitor( id.toStdString() ) +{ + Q_UNUSED( CapacitorBase_properties ); + + m_ePin.resize(2); + m_pin.resize(2); + + m_area = QRectF( -10, -10, 20, 20 ); + + QString nodid = m_id; + nodid.append(QString("-lPin")); + QPoint nodpos = QPoint(-16-8,0); + m_pin[0] = new Pin( 180, nodpos, nodid, 0, this); + m_pin[0]->setLength(12); + m_pin[0]->setPos(-16, 0 ); + m_ePin[0] = m_pin[0]; + + nodid = m_id; + nodid.append( QString("-rPin") ); + nodpos = QPoint(16+8,0); + m_pin[1] = new Pin( 0, nodpos, nodid, 1, this ); + m_pin[1]->setLength(12); + m_pin[1]->setPos( 16, 0 ); + m_ePin[1] = m_pin[1]; + + m_unit = "F"; + setCapac( m_cap ); + setValLabelPos(-16, 8, 0); + setShowVal( true ); + + setLabelPos(-16,-24, 0); +} +CapacitorBase::~CapacitorBase(){} + +double CapacitorBase::capac() { return m_value; } + +void CapacitorBase::setCapac( double c ) +{ + if( c < 1e-12 ) c = 1e-12; + + Component::setValue( c ); // Takes care about units multiplier + eCapacitor::setCap( m_value*m_unitMult ); +} + +void CapacitorBase::setUnit( QString un ) +{ + Component::setUnit( un ); + eCapacitor::setCap( m_value*m_unitMult ); +} + + +#include "moc_capacitorbase.cpp" diff --git a/src/gui/circuitwidget/components/passive/capacitorbase.h b/src/gui/circuitwidget/components/passive/capacitorbase.h new file mode 100644 index 0000000..a30e168 --- /dev/null +++ b/src/gui/circuitwidget/components/passive/capacitorbase.h @@ -0,0 +1,46 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef CAPACITORBASE_H +#define CAPACITORBASE_H + +#include "e-capacitor.h" +#include "component.h" + + +class MAINMODULE_EXPORT CapacitorBase : public Component, public eCapacitor +{ + Q_OBJECT + Q_PROPERTY( double Capacitance READ capac WRITE setCapac DESIGNABLE true USER true ) + Q_PROPERTY( QString Unit READ unit WRITE setUnit DESIGNABLE true USER true ) + Q_PROPERTY( bool Show_Cap READ showVal WRITE setShowVal DESIGNABLE true USER true ) + + public: + + CapacitorBase( QObject* parent, QString type, QString id ); + ~CapacitorBase(); + + double capac(); + void setCapac( double c ); + + void setUnit( QString un ); +}; + +#endif + diff --git a/src/gui/circuitwidget/components/passive/elcapacitor.cpp b/src/gui/circuitwidget/components/passive/elcapacitor.cpp new file mode 100644 index 0000000..53409ec --- /dev/null +++ b/src/gui/circuitwidget/components/passive/elcapacitor.cpp @@ -0,0 +1,106 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "elcapacitor.h" +#include "simulator.h" + +Component* elCapacitor::construct( QObject* parent, QString type, QString id ) +{ return new elCapacitor( parent, type, id ); } + +LibraryItem* elCapacitor::libraryItem() +{ + return new LibraryItem( + tr( "Electrolytic Capacitor" ), + tr( "Passive" ), + "elcapacitor.png", + "elCapacitor", + elCapacitor::construct); +} + +elCapacitor::elCapacitor( QObject* parent, QString type, QString id ) + : CapacitorBase( parent, type, id ) +{ + m_reversed = false; + m_counter = 0; + + Simulator::self()->addToUpdateList( this ); +} +elCapacitor::~elCapacitor(){} + +void elCapacitor::initialize() +{ + eCapacitor::initialize(); + m_reversed = false; + m_counter = 0; + update(); +} + +void elCapacitor::updateStep() +{ + double volt = m_ePin[0]->getVolt() - m_ePin[1]->getVolt(); + + if( volt < -1e-6 ) + { + m_counter++; + + if( m_counter > 4 ) + { + m_counter = 0; + m_reversed = !m_reversed; + update(); + } + } + else if( m_reversed ) + { + m_reversed = false; + m_counter = 0; + update(); + } +} + +void elCapacitor::remove() +{ + Simulator::self()->remFromUpdateList( this ); + + Component::remove(); +} + +void elCapacitor::paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + Component::paint( p, option, widget ); + + QPen pen = p->pen(); + pen.setWidth(3); + p->setPen(pen); + + if( m_reversed ) + { + pen.setColor( QColor( 255, 100, 100 )); + pen.setWidth(2); + } + p->setPen(pen); + + p->drawLine( 3,-7, 3, 7 ); + p->drawLine(-3,-7, 3,-7 ); + p->drawLine(-3, 7, 3, 7 ); + p->drawLine(-3,-3,-3, 3 ); +} + +#include "moc_elcapacitor.cpp" + diff --git a/src/gui/circuitwidget/components/passive/elcapacitor.h b/src/gui/circuitwidget/components/passive/elcapacitor.h new file mode 100644 index 0000000..05b93fd --- /dev/null +++ b/src/gui/circuitwidget/components/passive/elcapacitor.h @@ -0,0 +1,50 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef ELCAPACITOR_H +#define ELCAPACITOR_H + +#include "capacitorbase.h" +#include "itemlibrary.h" + +class MAINMODULE_EXPORT elCapacitor : public CapacitorBase +{ + Q_OBJECT + + public: + + elCapacitor( QObject* parent, QString type, QString id ); + ~elCapacitor(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem* libraryItem(); + + virtual void initialize(); + virtual void updateStep(); + virtual void remove(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + private: + bool m_reversed; + int m_counter; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/passive/potentiometer.cpp b/src/gui/circuitwidget/components/passive/potentiometer.cpp new file mode 100644 index 0000000..6f007e2 --- /dev/null +++ b/src/gui/circuitwidget/components/passive/potentiometer.cpp @@ -0,0 +1,219 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "potentiometer.h" +#include "connector.h" +#include "circuit.h" +#include "itemlibrary.h" + +static const char* Potentiometer_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Value Ohm") +}; + +Component* Potentiometer::construct( QObject* parent, QString type, QString id ) +{ + return new Potentiometer( parent, type, id ); +} + +LibraryItem* Potentiometer::libraryItem() +{ + return new LibraryItem( + tr( "Potentiometer" ), + tr( "Passive" ), + "potentiometer.png", + "Potentiometer", + Potentiometer::construct ); +} + +Potentiometer::Potentiometer( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( (id+"-eElement").toStdString() ) + , m_pinA( 180, QPoint(-16,0 ), id+"-PinA", 0, this ) + , m_pinM( 270, QPoint( 0,16), id+"-PinM", 0, this ) + , m_pinB( 0, QPoint( 16,0 ), id+"-PinB", 0, this ) + , m_ePinA( (id+"-ePinA").toStdString(), 1 ) + , m_ePinB( (id+"-ePinB").toStdString(), 1 ) + , m_resA( (id+"-resA").toStdString() ) + , m_resB( (id+"-resB").toStdString() ) +{ + Q_UNUSED( Potentiometer_properties ); + + m_area = QRectF( -12, -4.5, 24, 12.5 ); + + setLabelPos(-16,-40, 0); + + m_midEnode = 0l; + + m_dialW.setupWidget(); + m_dialW.setFixedSize( 24, 24 ); + m_dialW.dial->setMinimum(0); + m_dialW.dial->setMaximum(1000); + m_dialW.dial->setValue(500); + m_dialW.dial->setSingleStep(25); + + m_proxy = Circuit::self()->addWidget( &m_dialW ); + m_proxy->setParentItem( this ); + m_proxy->setPos( QPoint( -12, -24-5) ); + //m_proxy->setFlag(QGraphicsItem::ItemNegativeZStacksBehindParent, true ); + + m_dial = m_dialW.dial; + + m_resA.setEpin( 0, &m_pinA ); + m_resA.setEpin( 1, &m_ePinA ); + + m_resB.setEpin( 1, &m_pinB ); + m_resB.setEpin( 0, &m_ePinB ); + + m_unit = "Ω"; + setRes(1000); + setValLabelPos( 10,-20, 0); + setShowVal( true ); + resChanged( 500 ); + + Simulator::self()->addToUpdateList( this ); + + connect( m_dial, SIGNAL(valueChanged(int)), + this, SLOT (resChanged(int)) ); +} + +Potentiometer::~Potentiometer() +{ +} + +void Potentiometer::initialize() +{ + eNode* enod = m_pinM.getEnode(); // Get eNode from middle Pin + + if( !enod ) // Not connected: Create mid eNode + { + m_midEnode = new eNode( m_id+"-mideNode" ); + enod = m_midEnode; + m_pinM.setEnode( enod ); + } + else if( enod != m_midEnode ) // Connected to external eNode: Delete mid eNode + { + m_midEnode = enod; + } + else return; // Already connected: Do nothing + + m_ePinA.setEnode( enod ); // Set eNode to internal eResistors ePins + m_ePinB.setEnode( enod ); + + m_changed = true; + updateStep(); +} + +void Potentiometer::updateStep() +{ + if( m_changed ) + { + double res1 = double( m_resist*m_dial->value()/1000 ); + double res2 = m_resist-res1; + + if( res1 < 1e-6 ) + { + res1 = 1e-3; + res2 = m_resist-res1; + } + if( res2 < 1e-6 ) + { + res2 = 1e-6; + res1 = m_resist-res2; + } + //qDebug()<<"Potentiometer::updateStep"<setValue( val*1000/m_resist ); + //resChanged( val ); +} + +int Potentiometer::val() +{ + return m_resist*m_dial->value()/1000; +} + +void Potentiometer::remove() +{ + if( m_pinA.isConnected() ) m_pinA.connector()->remove(); + if( m_pinB.isConnected() ) m_pinB.connector()->remove(); + if( m_pinM.isConnected() ) + { + Connector* con = m_pinM.connector(); + if( con ) con->remove(); + } + + //if( m_midEnode ) Simulator::self()->remFromEnodeList( m_midEnode, true ); + + Simulator::self()->remFromUpdateList( this ); + + Component::remove(); +} + +void Potentiometer::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + //p->setBrush(Qt::white); + //p->drawRoundedRect( QRect( 0, 0, 48, 48 ), 1, 1 ); + //p->setBrush(Qt::darkGray); + //p->fillRect( QRect( 3, 3, 45, 45 ), Qt::darkGray ); + + + //p->drawRoundedRect( QRect( 8, -56, 8, 40 ), 1, 1 ); + + Component::paint( p, option, widget ); + p->drawRect( -10.5, -4, 21, 8 ); + QPen pen = p->pen(); + pen.setWidth(3); + p->setPen(pen); + + p->drawLine( 0, 6, -3, 9 ); + p->drawLine( 0, 6, 3, 9 ); +} + +#include "moc_potentiometer.cpp" + + diff --git a/src/gui/circuitwidget/components/passive/potentiometer.h b/src/gui/circuitwidget/components/passive/potentiometer.h new file mode 100644 index 0000000..e123d6e --- /dev/null +++ b/src/gui/circuitwidget/components/passive/potentiometer.h @@ -0,0 +1,88 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef POTENTIOMETER_H +#define POTENTIOMETER_H + +#include "component.h" +#include "e-resistor.h" +#include "e-element.h" +#include "dialwidget.h" +#include "pin.h" + +class LibraryItem; + +class MAINMODULE_EXPORT Potentiometer : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( double Resistance READ res WRITE setRes DESIGNABLE true USER true ) + Q_PROPERTY( QString Unit READ unit WRITE setUnit DESIGNABLE true USER true ) + Q_PROPERTY( bool Show_res READ showVal WRITE setShowVal DESIGNABLE true USER true ) + Q_PROPERTY( int Value_Ohm READ val WRITE setVal DESIGNABLE true USER true ) + + public: + + Potentiometer( QObject* parent, QString type, QString id ); + ~Potentiometer(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem* libraryItem(); + + virtual void initialize(); + virtual void updateStep(); + + void setVal( int val ); + int val(); + + double res() const { return m_value; } + void setRes( double v ); + + void setUnit( QString un ); + + virtual void paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + public slots: + void resChanged( int volt ); + virtual void remove(); + + private: + double m_resist; + double m_voltOut; + + bool m_changed; + + Pin m_pinA; + Pin m_pinM; + Pin m_pinB; + ePin m_ePinA; + ePin m_ePinB; + + eResistor m_resA; + eResistor m_resB; + + eNode* m_midEnode; + + DialWidget m_dialW; + + QDial* m_dial; + QGraphicsProxyWidget* m_proxy; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/passive/resistor.cpp b/src/gui/circuitwidget/components/passive/resistor.cpp new file mode 100644 index 0000000..eb00994 --- /dev/null +++ b/src/gui/circuitwidget/components/passive/resistor.cpp @@ -0,0 +1,99 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "resistor.h" +#include "connector.h" +#include "itemlibrary.h" + +static const char* Resistor_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Resistance"), + QT_TRANSLATE_NOOP("App::Property","Show res") +}; + +Component* Resistor::construct( QObject* parent, QString type, QString id ) +{ return new Resistor( parent, type, id ); } + +LibraryItem* Resistor::libraryItem() +{ + return new LibraryItem( + tr( "Resistor" ), + tr( "Passive" ), + "resistor.png", + "Resistor", + Resistor::construct); +} + +Resistor::Resistor( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eResistor( id.toStdString() ) +{ + Q_UNUSED( Resistor_properties ); + + QString pinId = m_id; + pinId.append(QString("-lPin")); + QPoint pinPos = QPoint(-8-8,0); + m_ePin[0] = new Pin( 180, pinPos, pinId, 0, this); + + pinId = m_id; + pinId.append(QString("-rPin")); + pinPos = QPoint(8+8,0); + m_ePin[1] = new Pin( 0, pinPos, pinId, 1, this); + + m_idLabel->setPos(-12,-24); + setLabelPos(-12,-20, 0); + + m_unit = "Ω"; + setResist( m_resist ); + + setValLabelPos(-16, 6, 0); + setShowVal( true ); +} +Resistor::~Resistor(){} + +double Resistor::resist() { return m_value; } + +void Resistor::setResist( double r ) +{ + if( r < 1e-12 ) r = 1e-12; + + Component::setValue( r ); // Takes care about units multiplier + eResistor::setResSafe( m_value*m_unitMult ); +} + +void Resistor::setUnit( QString un ) +{ + Component::setUnit( un ); + eResistor::setResSafe( m_value*m_unitMult ); +} + +void Resistor::remove() +{ + if( m_ePin[0]->isConnected() ) (static_cast(m_ePin[0]))->connector()->remove(); + if( m_ePin[1]->isConnected() ) (static_cast(m_ePin[1]))->connector()->remove(); + Component::remove(); +} + +void Resistor::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + p->drawRect( -10.5, -4, 21, 8 ); +} + +#include "moc_resistor.cpp" diff --git a/src/gui/circuitwidget/components/passive/resistor.h b/src/gui/circuitwidget/components/passive/resistor.h new file mode 100644 index 0000000..521f5c2 --- /dev/null +++ b/src/gui/circuitwidget/components/passive/resistor.h @@ -0,0 +1,57 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef RESISTOR_H +#define RESISTOR_H + +#include "itemlibrary.h" +#include "e-resistor.h" +#include "pin.h" + + +class MAINMODULE_EXPORT Resistor : public Component, public eResistor +{ + Q_OBJECT + Q_PROPERTY( double Resistance READ resist WRITE setResist DESIGNABLE true USER true ) + Q_PROPERTY( QString Unit READ unit WRITE setUnit DESIGNABLE true USER true ) + Q_PROPERTY( bool Show_res READ showVal WRITE setShowVal DESIGNABLE true USER true ) + + public: + QRectF boundingRect() const { return QRectF( -11, -4.5, 22, 9 ); } + + Resistor( QObject* parent, QString type, QString id ); + ~Resistor(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + double resist(); + void setResist( double r ); + + void setUnit( QString un ); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + void remove(); + + private: +}; + +#endif diff --git a/src/gui/circuitwidget/components/passive/resistordip.cpp b/src/gui/circuitwidget/components/passive/resistordip.cpp new file mode 100644 index 0000000..98775a1 --- /dev/null +++ b/src/gui/circuitwidget/components/passive/resistordip.cpp @@ -0,0 +1,170 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "resistordip.h" +#include "itemlibrary.h" +#include "connector.h" +#include "circuit.h" +#include "pin.h" + + +Component* ResistorDip::construct( QObject* parent, QString type, QString id ) +{ return new ResistorDip( parent, type, id ); } + +LibraryItem* ResistorDip::libraryItem() +{ + return new LibraryItem( + tr( "ResistorDip" ), + tr( "Passive" ), + "resistordip.png", + "ResistorDip", + ResistorDip::construct); +} + +ResistorDip::ResistorDip( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eResistorDip( id.toStdString() ) +{ + m_size = 0; + setSize( 8 ); + + m_unit = "Ω"; + setResist( 100 ); + setValLabelX( 5 ); + setValLabelY(-26 ); + setValLabRot( 90 ); + setValLabelPos(); + //m_valLabel->setEnabled( false ); + m_valLabel->setAcceptedMouseButtons( 0 ); + setShowVal( true ); + + setLabelPos(-24,-40, 0); +} +ResistorDip::~ResistorDip(){} + +void ResistorDip::createResistors( int c ) +{ + int start = m_size; + m_size = m_size+c; + m_resistor.resize( m_size ); + m_pin.resize( m_size*2 ); + + for( int i=start; isetEpin( 0, pin ); + m_pin[index] = pin; + + pinpos = QPoint( 16,-32+8+i*8 ); + pin = new Pin( 0, pinpos, reid+"-ePin"+QString::number(index+1), 0, this); + m_resistor[i]->setEpin( 1, pin ); + m_pin[index+1] = pin; + } + //update(); +} + +void ResistorDip::deleteResistors( int d ) +{ + if( d > m_size ) d = m_size; + int start = m_size-d; + + for( int i=start*2; iisConnected() ) pin->connector()->remove(); + + delete pin; + } + for( int i=start; iupdate(); +} + +int ResistorDip::size() +{ + return m_size; +} + +void ResistorDip::setSize( int size ) +{ + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + if( size == 0 ) size = 8; + + if ( size < m_size ) deleteResistors( m_size-size ); + else if( size > m_size ) createResistors( size-m_size ); + + m_area = QRect( -8, -26, 16, m_size*8-4 ); + setValLabelY(-26 ); + + if( pauseSim ) Simulator::self()->runContinuous(); + Circuit::self()->update(); +} + +double ResistorDip::resist() { return m_value; } + +void ResistorDip::setResist( double r ) +{ + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + Component::setValue( r ); // Takes care about units multiplier + + setRes( m_value*m_unitMult ); + + if( pauseSim ) Simulator::self()->resumeSim(); +} + +void ResistorDip::setUnit( QString un ) +{ + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + Component::setUnit( un ); + setRes( m_value*m_unitMult ); + + if( pauseSim ) Simulator::self()->resumeSim(); +} + +void ResistorDip::remove() +{ + deleteResistors( m_size ); + + Component::remove(); +} +void ResistorDip::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + //p->setBrush( QColor( 80, 80, 80) ); + + p->drawRoundRect( boundingRect(), 2, 2 ); +} + +#include "moc_resistordip.cpp" + diff --git a/src/gui/circuitwidget/components/passive/resistordip.h b/src/gui/circuitwidget/components/passive/resistordip.h new file mode 100644 index 0000000..4927e28 --- /dev/null +++ b/src/gui/circuitwidget/components/passive/resistordip.h @@ -0,0 +1,63 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef RESISTORDIP_H +#define RESISTORDIP_H + +#include "component.h" +#include "e-resistordip.h" + +class LibraryItem; + +class MAINMODULE_EXPORT ResistorDip : public Component, public eResistorDip +{ + Q_OBJECT + Q_PROPERTY( int Size READ size WRITE setSize DESIGNABLE true USER true ) + Q_PROPERTY( double Resistance READ resist WRITE setResist DESIGNABLE true USER true ) + Q_PROPERTY( QString Unit READ unit WRITE setUnit DESIGNABLE true USER true ) + Q_PROPERTY( bool Show_res READ showVal WRITE setShowVal DESIGNABLE true USER true ) + + public: + ResistorDip( QObject* parent, QString type, QString id ); + ~ResistorDip(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + int size(); + void setSize( int size ); + + double resist(); + void setResist( double r ); + + void setUnit( QString un ); + + void createResistors( int c ); + void deleteResistors( int d ); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void remove(); + + private: + std::vector m_pin; +}; + +#endif diff --git a/src/gui/circuitwidget/components/shape.h b/src/gui/circuitwidget/components/shape.h new file mode 100644 index 0000000..e7a1475 --- /dev/null +++ b/src/gui/circuitwidget/components/shape.h @@ -0,0 +1,65 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef SHAPE_H +#define SHAPE_H + +#include "component.h" + +class MAINMODULE_EXPORT Shape : public Component +{ + Q_OBJECT + Q_PROPERTY( int H_size READ hSize WRITE setHSize DESIGNABLE true USER true ) + Q_PROPERTY( int V_size READ vSize WRITE setVSize DESIGNABLE true USER true ) + Q_PROPERTY( int Border READ border WRITE setBorder DESIGNABLE true USER true ) + Q_PROPERTY( QColor Color READ color WRITE setColor DESIGNABLE true USER true ) + Q_PROPERTY( qreal Opacity READ opacity WRITE setOpacity DESIGNABLE true USER true ) + Q_PROPERTY( qreal Z_Value READ zValue WRITE setZValue DESIGNABLE true USER true ) + + public: + + Shape( QObject* parent, QString type, QString id ); + ~Shape(); + + QRectF boundingRect() const + { + return QRectF( m_area.x()-m_border/2-1, m_area.y()-m_border/2-1, + m_area.width()+m_border+2, m_area.height()+m_border+2 ); + } + + int hSize(); + void setHSize( int size ); + + int vSize(); + void setVSize( int size ); + + int border(); + void setBorder( int border ); + + QColor color(); + void setColor( QColor color ); + + + protected: + int m_hSize; + int m_vSize; + int m_border; +}; + +#endif diff --git a/src/gui/circuitwidget/components/sources/clock-base.cpp b/src/gui/circuitwidget/components/sources/clock-base.cpp new file mode 100644 index 0000000..6b33001 --- /dev/null +++ b/src/gui/circuitwidget/components/sources/clock-base.cpp @@ -0,0 +1,98 @@ +/*************************************************************************** + * Copyright (C) 2010 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "clock-base.h" +#include "pin.h" +#include "simulator.h" + +static const char* ClockBase_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Freq") +}; + +ClockBase::ClockBase( QObject* parent, QString type, QString id ) + : LogicInput( parent, type, id ) +{ + Q_UNUSED( ClockBase_properties ); + + m_area = QRect( -14, -8, 22, 16 ); + + m_isRunning = false; + + m_stepsPC = 0; + m_step = 0; + setFreq( 1000 ); + + Simulator::self()->addToUpdateList( this ); +} +ClockBase::~ClockBase(){} + +void ClockBase::updateStep() +{ + if( m_changed ) + { + if( m_isRunning ) Simulator::self()->addToSimuClockList( this ); + else + { + m_out->setOut( false ); + Simulator::self()->remFromSimuClockList( this ); + } + LogicInput::updateStep(); + } +} + +double ClockBase::freq() { return m_freq; } + +void ClockBase::setFreq( double freq ) +{ + m_stepsPC = 1e6/freq+0.5; + + if( m_stepsPC < 2 ) m_stepsPC = 2; + + m_freq = 1e6/m_stepsPC; + + //qDebug() << "ClockBase::setFreq"<remFromSimuClockList( this ); + + LogicInput::remove(); +} + +#include "moc_clock-base.cpp" + diff --git a/src/gui/circuitwidget/components/sources/clock-base.h b/src/gui/circuitwidget/components/sources/clock-base.h new file mode 100644 index 0000000..616674b --- /dev/null +++ b/src/gui/circuitwidget/components/sources/clock-base.h @@ -0,0 +1,63 @@ +/*************************************************************************** + * Copyright (C) 2010 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef CLOCKBASE_H +#define CLOCKBASE_H + +#include "logicinput.h" +#include + +class MAINMODULE_EXPORT ClockBase : public LogicInput +{ + Q_OBJECT + Q_PROPERTY( double Freq READ freq WRITE setFreq DESIGNABLE true USER true ) + Q_PROPERTY( bool Running READ running WRITE setRunning ) + + public: + + QRectF boundingRect() const { return QRectF( m_area.x()-2, m_area.y()-2, m_area.width()+4 ,m_area.height()+4 ); } + + ClockBase( QObject* parent, QString type, QString id ); + ~ClockBase(); + + virtual void updateStep(); + + double freq(); + virtual void setFreq( double freq ); + + bool running(); + virtual void setRunning( bool running ); + + signals: + void freqChanged(); + + public slots: + virtual void onbuttonclicked(); + virtual void remove(); + + protected: + bool m_isRunning; + + double m_freq; + + int m_step; + int m_stepsPC; +}; + +#endif diff --git a/src/gui/circuitwidget/components/sources/clock.cpp b/src/gui/circuitwidget/components/sources/clock.cpp new file mode 100644 index 0000000..dab810e --- /dev/null +++ b/src/gui/circuitwidget/components/sources/clock.cpp @@ -0,0 +1,79 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "clock.h" +#include "pin.h" +#include "simulator.h" + +Component* Clock::construct( QObject* parent, QString type, QString id ) +{ + return new Clock( parent, type, id ); +} + +LibraryItem* Clock::libraryItem() +{ + return new LibraryItem( + tr( "Clock" ), + tr( "Sources" ), + "clock.png", + "Clock", + Clock::construct ); +} + +Clock::Clock( QObject* parent, QString type, QString id ) + : ClockBase( parent, type, id ) +{ +} +Clock::~Clock(){} + +void Clock::simuClockStep() +{ + m_step++; + + if ( m_step >= m_stepsPC/2 ) + { + m_out->setOut( !m_out->out() ); + m_out->stampOutput(); + m_step = 0; + } +} + +void Clock::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + if ( m_isRunning ) p->setBrush( QColor( 250, 200, 50 ) ); + else p->setBrush( QColor( 230, 230, 255 ) ); + + p->drawRoundedRect( m_area,2 ,2 ); + + QPen pen; + pen.setWidth(1); + p->setPen( pen ); + + p->drawLine(-11, 3,-11,-3 ); + p->drawLine(-11,-3,-5, -3 ); + p->drawLine( -5,-3,-5, 3 ); + p->drawLine( -5, 3, 1, 3 ); + p->drawLine( 1, 3, 1, -3 ); + p->drawLine( 1,-3, 4, -3 ); +} + +#include "moc_clock.cpp" + diff --git a/src/gui/circuitwidget/components/sources/clock.h b/src/gui/circuitwidget/components/sources/clock.h new file mode 100644 index 0000000..2ebe7fb --- /dev/null +++ b/src/gui/circuitwidget/components/sources/clock.h @@ -0,0 +1,44 @@ +/*************************************************************************** + * Copyright (C) 2017 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef CLOCK_H +#define CLOCK_H + +#include "clock-base.h" +#include "itemlibrary.h" +#include + +class MAINMODULE_EXPORT Clock : public ClockBase +{ + Q_OBJECT + + public: + + Clock( QObject* parent, QString type, QString id ); + ~Clock(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual void simuClockStep(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); +}; + +#endif diff --git a/src/gui/circuitwidget/components/sources/currsource.cpp b/src/gui/circuitwidget/components/sources/currsource.cpp new file mode 100644 index 0000000..982efe0 --- /dev/null +++ b/src/gui/circuitwidget/components/sources/currsource.cpp @@ -0,0 +1,174 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "currsource.h" +#include "connector.h" +#include "circuit.h" +#include "itemlibrary.h" + +static const char* CurrSource_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Current"), + QT_TRANSLATE_NOOP("App::Property","Show Amp") +}; + +Component* CurrSource::construct( QObject* parent, QString type, QString id ) +{ + return new CurrSource( parent, type, id ); +} + +LibraryItem* CurrSource::libraryItem() +{ + return new LibraryItem( + tr( "Current Source" ), + tr( "Sources" ), + "voltsource.png", + "Current Source", + CurrSource::construct ); +} + +CurrSource::CurrSource( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( id.toStdString() ) +{ + Q_UNUSED( CurrSource_properties ); + + m_changed = false; + + m_voltw.setFixedSize( 46,70 ); + + m_proxy = Circuit::self()->addWidget( &m_voltw ); + m_proxy->setParentItem( this ); + m_proxy->setPos( QPoint(-39, -63) ); + + m_button = m_voltw.pushButton; + m_dial = m_voltw.dial; + m_dial->setMaximum( 1000 ); + + m_button->setText( QString("-- A") ); + + QString nodid = id; + nodid.append(QString("-outPin")); + QPoint nodpos = QPoint(16,0); + outpin = new Pin( 0, nodpos, nodid, 0, this ); + + m_unit = "A"; + //setVolt(50.0); + setCurrent( 1 ); + currChanged( 0 ); + + setValLabelPos(-26, 10 , 0 ); // x, y, rot + setShowVal( true ); + + setLabelPos(-40,-80, 0); + + Simulator::self()->addToUpdateList( this ); + + connect( m_button, SIGNAL( clicked()), + this, SLOT ( onbuttonclicked()) ); + + connect( m_dial, SIGNAL( valueChanged(int) ), + this, SLOT ( currChanged(int)) ); +} + +CurrSource::~CurrSource() +{ +} + +void CurrSource::initialize() +{ + m_changed = true; +} + +void CurrSource::updateStep() +{ + if( m_changed ) + { + double current = 0; + if( m_button->isChecked() ) current = m_current; + + outpin->stampCurrent( current ); + + updateButton(); + m_changed = false; + } +} + +void CurrSource::updateButton() +{ + QString msg; + bool checked = m_button->isChecked(); + + if( checked ) + msg = QString("%1 A").arg(float(int(m_current*100))/100); + else + msg = QString("-- A"); + + m_button->setText( msg ); +} + +void CurrSource::onbuttonclicked() +{ + m_changed = true; +} + +void CurrSource::currChanged( int val ) +{ + m_current = double( m_maxCurrent*val/1000 ); + m_changed = true; +} + +/*void CurrSource::setVolt( double v ) // Sets the Maximum Volt +{ + m_voltHight = v; +}*/ + +void CurrSource::setCurrent( double c ) +{ + Component::setValue( c ); // Takes care about units multiplier + m_maxCurrent = m_value*m_unitMult; + currChanged( m_dial->value() ); +} + +void CurrSource::setUnit( QString un ) +{ + Component::setUnit( un ); + m_maxCurrent = m_value*m_unitMult; + currChanged( m_dial->value() ); +} + +void CurrSource::remove() +{ + if ( outpin->isConnected() ) outpin->connector()->remove(); + + Simulator::self()->remFromUpdateList( this ); + + Component::remove(); +} + +void CurrSource::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + p->setBrush(Qt::white); + p->drawRoundedRect( QRect( -42, -66, 52, 76 ), 1, 1 ); + + p->fillRect( QRect( -39, -63, 49, 73 ), Qt::darkGray ); + + Component::paint( p, option, widget ); +} + +#include "moc_currsource.cpp" diff --git a/src/gui/circuitwidget/components/sources/currsource.h b/src/gui/circuitwidget/components/sources/currsource.h new file mode 100644 index 0000000..4635f52 --- /dev/null +++ b/src/gui/circuitwidget/components/sources/currsource.h @@ -0,0 +1,81 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef CURRSOURCE_H +#define CURRSOURCE_H + +#include "component.h" +#include "e-source.h" +#include "voltwidget.h" +#include "pin.h" + +class LibraryItem; +//class DialWidget; + +class MAINMODULE_EXPORT CurrSource : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( double Current READ current WRITE setCurrent DESIGNABLE true USER true ) + Q_PROPERTY( QString Unit READ unit WRITE setUnit DESIGNABLE true USER true ) + Q_PROPERTY( bool Show_Amp READ showVal WRITE setShowVal DESIGNABLE true USER true ) + //Q_PROPERTY( double Max_Volt READ volt WRITE setVolt DESIGNABLE true USER true ) + + public: + QRectF boundingRect() const { return QRect( -44, -68, 56, 80 ); } + + CurrSource( QObject* parent, QString type, QString id ); + ~CurrSource(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem* libraryItem(); + + virtual void initialize(); + virtual void updateStep(); + + double current() const { return m_value; } + void setCurrent( double c ); + + void setUnit( QString un ); + + virtual void paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + public slots: + void onbuttonclicked(); + void currChanged( int volt ); + virtual void remove(); + + private: + void updateButton(); + + bool m_changed; + + double m_current; + double m_maxCurrent; + + Pin* outpin; + + VoltWidget m_voltw; + + QPushButton* m_button; + QDial* m_dial; + QGraphicsProxyWidget* m_proxy; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/sources/ground.cpp b/src/gui/circuitwidget/components/sources/ground.cpp new file mode 100644 index 0000000..c52abfd --- /dev/null +++ b/src/gui/circuitwidget/components/sources/ground.cpp @@ -0,0 +1,72 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "connector.h" +#include "ground.h" +#include "itemlibrary.h" + + +Component* Ground::construct( QObject* parent, QString type, QString id ) +{ return new Ground( parent, type, id ); } + +LibraryItem* Ground::libraryItem() +{ + return new LibraryItem( + tr( "Ground (0 V)" ), + tr( "Sources" ), + "ground.png", + "Ground", + Ground::construct ); +} + +Ground::Ground( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) +{ + QString nodid = id; + nodid.append(QString("-Gnd")); + QPoint nodpos = QPoint( 0, -16 ); + groundpin = new Pin( 90, nodpos, nodid, 0, this); + + nodid.append(QString("-eSource")); + m_out = new eSource( nodid.toStdString(), groundpin ); + + setLabelPos(-16, 8, 0); +} +Ground::~Ground() { delete m_out; } + +void Ground::remove() +{ + if( groundpin->isConnected() ) (static_cast(groundpin))->connector()->remove(); + Component::remove(); +} + +void Ground::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + QPen pen = p->pen(); + pen.setWidth(3); + p->setPen(pen); + + p->drawLine( -8,-8, 8,-8 ); + p->drawLine( -5,-3, 5,-3 ); + p->drawLine( -2, 2, 2, 2 ); +} + +#include "moc_ground.cpp" diff --git a/src/gui/circuitwidget/components/sources/ground.h b/src/gui/circuitwidget/components/sources/ground.h new file mode 100644 index 0000000..c20613e --- /dev/null +++ b/src/gui/circuitwidget/components/sources/ground.h @@ -0,0 +1,53 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef GROUND_H +#define GROUND_H + +#include "e-source.h" +#include "component.h" +#include "pin.h" + +class LibraryItem; + +class MAINMODULE_EXPORT Ground : public Component +{ + Q_OBJECT + public: + QRectF boundingRect() const { return QRect( -10, -10, 20, 20 ); } + + Ground( QObject* parent, QString type, QString id ); + ~Ground(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void remove(); + + private: + double m_Rth; + + ePin *groundpin; + eSource *m_out; +}; + +#endif diff --git a/src/gui/circuitwidget/components/sources/logicinput.cpp b/src/gui/circuitwidget/components/sources/logicinput.cpp new file mode 100644 index 0000000..8215ff8 --- /dev/null +++ b/src/gui/circuitwidget/components/sources/logicinput.cpp @@ -0,0 +1,151 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "connector.h" +#include "circuit.h" +#include "itemlibrary.h" +#include "logicinput.h" + +static const char* LogicInput_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Voltage"), + QT_TRANSLATE_NOOP("App::Property","Show Volt") +}; + + +Component* LogicInput::construct( QObject* parent, QString type, QString id ) +{ return new LogicInput( parent, type, id ); } + +LibraryItem* LogicInput::libraryItem() +{ + return new LibraryItem( + tr( "Fixed Volt." ), + tr( "Sources" ), + "voltage.png", + "Fixed Voltage", + LogicInput::construct ); +} + +LogicInput::LogicInput( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( id.toStdString() ) +{ + Q_UNUSED( LogicInput_properties ); + + setLabelPos(-64,-24 ); + + m_changed = false; + + QString nodid = id; + nodid.append(QString("-outnod")); + QPoint nodpos = QPoint(16,0); + m_outpin = new Pin( 0, nodpos, nodid, 0, this); + + nodid.append(QString("-eSource")); + m_out = new eSource( nodid.toStdString(), m_outpin ); + + m_unit = "V"; + setVolt(5.0); + setValLabelPos(-16, 8 , 0 ); // x, y, rot + setShowVal( true ); + + m_button = new QPushButton( ); + m_button->setMaximumSize( 16,16 ); + m_button->setGeometry(-20,-16,16,16); + m_button->setCheckable( true ); + + m_proxy = Circuit::self()->addWidget( m_button ); + m_proxy->setParentItem( this ); + m_proxy->setPos( QPoint(-32, -8) ); + + Simulator::self()->addToUpdateList( this ); + + connect( m_button, SIGNAL( clicked() ), + this, SLOT ( onbuttonclicked() )); +} + +LogicInput::~LogicInput() +{ + //delete m_out; +} + +void LogicInput::onbuttonclicked() +{ + m_out->setOut( m_button->isChecked() ); + m_changed = true; + //qDebug() << "LogicInput::onbuttonclicked" ; + //update(); +} + +void LogicInput::updateStep() +{ + if( m_changed ) + { + m_out->stampOutput(); + m_changed = false; + update(); + } +} + +double LogicInput::volt() +{ + return m_value; +} + +void LogicInput::setVolt( double v ) +{ + Component::setValue( v ); // Takes care about units multiplier + m_voltHight = m_value*m_unitMult; + m_out->setVoltHigh( m_voltHight ); + m_changed = true; + //update(); +} + +void LogicInput::setUnit( QString un ) +{ + Component::setUnit( un ); + m_voltHight = m_value*m_unitMult; + m_out->setVoltHigh( m_voltHight ); + m_changed = true; +} + +void LogicInput::remove() +{ + if( m_outpin->isConnected() ) m_outpin->connector()->remove(); + delete m_out; + + Simulator::self()->remFromUpdateList( this ); + + Component::remove(); +} + + +void LogicInput::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + if ( m_out->out() ) + p->setBrush( QColor( 255, 166, 0 ) ); + else + p->setBrush( QColor( 230, 230, 255 ) ); + + p->drawRoundedRect( QRectF( -8, -8, 16, 16 ), 2, 2); +} + +#include "moc_logicinput.cpp" + diff --git a/src/gui/circuitwidget/components/sources/logicinput.h b/src/gui/circuitwidget/components/sources/logicinput.h new file mode 100644 index 0000000..65ef89b --- /dev/null +++ b/src/gui/circuitwidget/components/sources/logicinput.h @@ -0,0 +1,71 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef LOGICINPUT_H +#define LOGICINPUT_H + +#include "component.h" +#include "e-source.h" +#include "pin.h" + +class LibraryItem; + +class MAINMODULE_EXPORT LogicInput : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( double Voltage READ volt WRITE setVolt DESIGNABLE true USER true ) + Q_PROPERTY( QString Unit READ unit WRITE setUnit DESIGNABLE true USER true ) + Q_PROPERTY( bool Show_Volt READ showVal WRITE setShowVal DESIGNABLE true USER true ) + + public: + QRectF boundingRect() const { return QRect( -10, -10, 20, 20 ); } + + LogicInput( QObject* parent, QString type, QString id ); + ~LogicInput(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual void updateStep(); + + double volt(); + void setVolt( double v ); + + void setUnit( QString un ); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void onbuttonclicked(); + virtual void remove(); + + protected: + double m_voltHight; + + bool m_changed; + + Pin *m_outpin; + eSource *m_out; + + QPushButton* m_button; + QGraphicsProxyWidget* m_proxy; +}; + + +#endif diff --git a/src/gui/circuitwidget/components/sources/rail.cpp b/src/gui/circuitwidget/components/sources/rail.cpp new file mode 100644 index 0000000..35877ad --- /dev/null +++ b/src/gui/circuitwidget/components/sources/rail.cpp @@ -0,0 +1,100 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "connector.h" +#include "circuit.h" +#include "rail.h" + + +Component* Rail::construct( QObject* parent, QString type, QString id ) +{ return new Rail( parent, type, id ); } + +LibraryItem* Rail::libraryItem() +{ + return new LibraryItem( + tr( "Rail." ), + tr( "Sources" ), + "voltage.png", + "Rail", + Rail::construct ); +} + +Rail::Rail( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( id.toStdString() ) +{ + setLabelPos(-64,-24 ); + + m_changed = false; + + QString nodid = id; + nodid.append(QString("-outnod")); + QPoint nodpos = QPoint(16,0); + m_outpin = new Pin( 0, nodpos, nodid, 0, this); + + nodid.append(QString("-eSource")); + m_out = new eSource( nodid.toStdString(), m_outpin ); + + m_out->setOut( true ); + m_unit = "V"; + setVolt(5.0); + setValLabelPos(-16, 8 , 0 ); // x, y, rot + setShowVal( true ); + + setLabelPos(-16,-24, 0); +} + +Rail::~Rail() +{ +} + +void Rail::setVolt( double v ) +{ + Component::setValue( v ); // Takes care about units multiplier + m_voltHight = m_value*m_unitMult; + m_out->setVoltHigh( m_voltHight ); + //update(); +} + +void Rail::setUnit( QString un ) +{ + Component::setUnit( un ); + setVolt( m_value*m_unitMult ); +} + +void Rail::remove() +{ + if( m_outpin->isConnected() ) m_outpin->connector()->remove(); + delete m_out; + + Component::remove(); +} + + +void Rail::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + p->setBrush( QColor( 255, 166, 0 ) ); + + p->drawRoundedRect( QRectF( -8, -8, 16, 16 ), 2, 2); +} + +#include "moc_rail.cpp" + diff --git a/src/gui/circuitwidget/components/sources/rail.h b/src/gui/circuitwidget/components/sources/rail.h new file mode 100644 index 0000000..0f0346a --- /dev/null +++ b/src/gui/circuitwidget/components/sources/rail.h @@ -0,0 +1,64 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef RAIL_H +#define RAIL_H + +#include "component.h" +#include "e-source.h" +#include "pin.h" +#include "itemlibrary.h" + +class MAINMODULE_EXPORT Rail : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( double Voltage READ volt WRITE setVolt DESIGNABLE true USER true ) + Q_PROPERTY( QString Unit READ unit WRITE setUnit DESIGNABLE true USER true ) + Q_PROPERTY( bool Show_Volt READ showVal WRITE setShowVal DESIGNABLE true USER true ) + + public: + QRectF boundingRect() const { return QRect( -10, -10, 20, 20 ); } + + Rail( QObject* parent, QString type, QString id ); + ~Rail(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + double volt() const { return m_voltHight; } + void setVolt( double v ); + + void setUnit( QString un ); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void remove(); + + protected: + double m_voltHight; + + bool m_changed; + + Pin *m_outpin; + eSource *m_out; +}; + + +#endif diff --git a/src/gui/circuitwidget/components/sources/voltsource.cpp b/src/gui/circuitwidget/components/sources/voltsource.cpp new file mode 100644 index 0000000..0f4f8c4 --- /dev/null +++ b/src/gui/circuitwidget/components/sources/voltsource.cpp @@ -0,0 +1,165 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "voltsource.h" +#include "connector.h" +#include "circuit.h" +#include "itemlibrary.h" + + +Component* VoltSource::construct( QObject* parent, QString type, QString id ) +{ + return new VoltSource( parent, type, id ); +} + +LibraryItem* VoltSource::libraryItem() +{ + return new LibraryItem( + tr( "Volt. Source" ), + tr( "Sources" ), + "voltsource.png", + "Voltage Source", + VoltSource::construct ); +} + +VoltSource::VoltSource( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( id.toStdString() ) +{ + m_voltHight = 5.0; + + m_changed = false; + + m_voltw.setFixedSize( 46,70 ); + + m_proxy = Circuit::self()->addWidget( &m_voltw ); + m_proxy->setParentItem( this ); + m_proxy->setPos( QPoint(-39, -63) ); + //m_proxy->setFlag(QGraphicsItem::ItemNegativeZStacksBehindParent, true ); + + m_button = m_voltw.pushButton; + m_dial = m_voltw.dial; + m_dial->setMaximum( 1000 ); + + m_button->setText( QString("-- V") ); + + QString nodid = id; + nodid.append(QString("-outPin")); + QPoint nodpos = QPoint(16,0); + outpin = new Pin( 0, nodpos, nodid, 0, this ); + + nodid.append("-eSource"); + m_out = new eSource( nodid.toStdString(), outpin ); + + m_out->setVoltHigh( 0 ); + m_out->setVoltLow( 0 ); + + m_unit = "V"; + setVolt(5.0); + voltChanged( 0 ); + setValLabelPos(-26, 10 , 0 ); // x, y, rot + setShowVal( true ); + + setLabelPos(-40,-80, 0); + + Simulator::self()->addToUpdateList( this ); + + connect( m_button, SIGNAL( clicked()), + this, SLOT ( onbuttonclicked()) ); + + connect( m_dial, SIGNAL( valueChanged(int) ), + this, SLOT ( voltChanged(int)) ); +} + +VoltSource::~VoltSource() +{ +} + +void VoltSource::updateStep() +{ + if( m_changed ) + { + m_out->setVoltHigh( m_voltOut ); + m_out->stampOutput(); + updateButton(); + m_changed = false; + } +} + +void VoltSource::updateButton() +{ + QString msg; + bool checked = m_button->isChecked(); + + if( checked ) + msg = QString("%1 V").arg(float(int(m_voltOut*100))/100); + else + msg = QString("-- V"); + + m_button->setText( msg ); +} + +void VoltSource::onbuttonclicked() +{ + m_out->setOut( m_button->isChecked() ); + updateButton(); + m_changed = true; +} + +void VoltSource::voltChanged( int val ) +{ + m_voltOut = double( m_voltHight*val/1000 ); + m_changed = true; +} + +void VoltSource::setVolt( double v ) // Sets the Maximum Volt +{ + Component::setValue( v ); // Takes care about units multiplier + m_voltHight = m_value*m_unitMult; + voltChanged( m_dial->value() ); +} + +void VoltSource::setUnit( QString un ) +{ + Component::setUnit( un ); + m_voltHight = m_value*m_unitMult; + voltChanged( m_dial->value() ); +} + +void VoltSource::remove() +{ + if ( outpin->isConnected() ) outpin->connector()->remove(); + + Simulator::self()->remFromUpdateList( this ); + delete m_out; + + Component::remove(); +} + +void VoltSource::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + p->setBrush(Qt::white); + p->drawRoundedRect( QRect( -42, -66, 52, 76 ), 1, 1 ); + + p->fillRect( QRect( -39, -63, 49, 73 ), Qt::darkGray ); + + Component::paint( p, option, widget ); +} + +#include "moc_voltsource.cpp" diff --git a/src/gui/circuitwidget/components/sources/voltsource.h b/src/gui/circuitwidget/components/sources/voltsource.h new file mode 100644 index 0000000..239623f --- /dev/null +++ b/src/gui/circuitwidget/components/sources/voltsource.h @@ -0,0 +1,79 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef VOLTSOURCE_H +#define VOLTSOURCE_H + +#include "component.h" +#include "e-source.h" +#include "voltwidget.h" +#include "pin.h" + +class LibraryItem; +//class DialWidget; + +class MAINMODULE_EXPORT VoltSource : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( double Voltage READ volt WRITE setVolt DESIGNABLE true USER true ) + Q_PROPERTY( QString Unit READ unit WRITE setUnit DESIGNABLE true USER true ) + Q_PROPERTY( bool Show_Volt READ showVal WRITE setShowVal DESIGNABLE true USER true ) + + public: + QRectF boundingRect() const { return QRect( -44, -68, 56, 80 ); } + + VoltSource( QObject* parent, QString type, QString id ); + ~VoltSource(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem* libraryItem(); + + virtual void updateStep(); + + double volt() const { return m_value; } + void setVolt( double v ); + + void setUnit( QString un ); + + virtual void paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + public slots: + void onbuttonclicked(); + void voltChanged( int volt ); + virtual void remove(); + + private: + void updateButton(); + + bool m_changed; + + double m_voltHight; + double m_voltOut; + Pin* outpin; + eSource* m_out; + + VoltWidget m_voltw; + + QPushButton* m_button; + QDial* m_dial; + QGraphicsProxyWidget* m_proxy; +}; + +#endif + diff --git a/src/gui/circuitwidget/components/sources/wavegen.cpp b/src/gui/circuitwidget/components/sources/wavegen.cpp new file mode 100644 index 0000000..1870169 --- /dev/null +++ b/src/gui/circuitwidget/components/sources/wavegen.cpp @@ -0,0 +1,199 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "wavegen.h" +#include "pin.h" +#include "simulator.h" + +static const char* WaveGen_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Volt Base"), + QT_TRANSLATE_NOOP("App::Property","Duty Square"), + QT_TRANSLATE_NOOP("App::Property","Quality"), + QT_TRANSLATE_NOOP("App::Property","Wave Type") +}; + +Component* WaveGen::construct( QObject* parent, QString type, QString id ) +{ + return new WaveGen( parent, type, id ); +} + +LibraryItem* WaveGen::libraryItem() +{ + return new LibraryItem( + tr( "Wave Gen." ), + tr( "Sources" ), + "wavegen.png", + "WaveGen", + WaveGen::construct ); +} + +WaveGen::WaveGen( QObject* parent, QString type, QString id ) + : ClockBase( parent, type, id ) +{ + Q_UNUSED( WaveGen_properties ); + + m_voltBase = 0; + m_lastVout = 0; + m_type = Sine; + + setQuality( 4 ); + setDuty( 50 ); + + connect( this, SIGNAL( freqChanged() ) + , this, SLOT( updateValues() )); +} +WaveGen::~WaveGen(){} + +void WaveGen::simuClockStep() +{ + m_step++; + + if(( m_qSteps > 0 ) + &&( remainder( m_step, m_qSteps )!= 0 )) + { + if( m_step < m_stepsPC ) return; + } + + if( m_type == Sine ) genSine(); + if( m_type == Saw ) genSaw(); + if( m_type == Triangle ) genTriangle(); + if( m_type == Square ) genSquare(); + + if( m_step >= m_stepsPC ) m_step = 0; + + if( m_vOut == m_lastVout ) return; + m_lastVout = m_vOut; + + m_out->setVoltHigh( m_voltHight*m_vOut+m_voltBase ); + m_out->stampOutput(); +} + +void WaveGen::genSine() +{ + double time = Simulator::self()->step(); + time = remainder( time, m_stepsPC ); + time = qDegreesToRadians( time*360/m_stepsPC ); + + m_vOut = sin( time )/2+0.5; +} +void WaveGen::genSaw() +{ + if( m_step >= m_stepsPC ) + { + m_vOut = 0; + m_step = 0; + return; + } + m_vOut = (double)m_step/m_stepsPC; + +} +void WaveGen::genTriangle() +{ + int halfW = m_stepsPC/2; + + if( m_step >= halfW ) + { + m_vOut = 1-(double)(m_step-halfW)/halfW; + } + else m_vOut = (double)m_step/halfW; +} + +void WaveGen::genSquare() +{ + if( m_step >= m_halfW ) + { + m_vOut = 0; + } + else m_vOut = 1; +} + +void WaveGen::updateStep() +{ + if(( !m_out->out() )&&( m_isRunning )) + { + m_out->setOut( true ); + } + ClockBase::updateStep(); +} + +void WaveGen::updateValues() +{ + setDuty( m_duty ); + setQuality( m_quality ); +} + +void WaveGen::setFreq( double freq ) +{ + if( freq > 1e5 ) freq = 1e5; + + ClockBase::setFreq( freq ); +} + +double WaveGen::duty() +{ + return m_duty; +} + +void WaveGen::setDuty( double duty ) +{ + m_duty = duty; + + m_halfW = m_stepsPC*m_duty/100; +} + +int WaveGen::quality() +{ + return m_quality; +} + +void WaveGen::setQuality( int q ) +{ + if( q > 5 ) q = 5; + if( q < 1 ) q = 1; + + m_quality = q; + int range = m_stepsPC/100; + m_qSteps = (5-q)*range; + //qDebug()<<"WaveGen::setQuality"<setBrush( QColor( 250, 200, 50 ) ); + else + p->setBrush( QColor( 230, 230, 255 ) ); + + p->drawRoundedRect( m_area,2 ,2 ); + + QPen pen; + pen.setWidth(1); + p->setPen( pen ); + + p->drawLine(-11, 3,-5, -3 ); + p->drawLine( -5,-3,-5, 3 ); + p->drawLine( -5, 3, 1, -3 ); + p->drawLine( 1,-3, 1, 3 ); + p->drawLine( 1, 3, 4, 0 ); +} + +#include "moc_wavegen.cpp" + diff --git a/src/gui/circuitwidget/components/sources/wavegen.h b/src/gui/circuitwidget/components/sources/wavegen.h new file mode 100644 index 0000000..93a8195 --- /dev/null +++ b/src/gui/circuitwidget/components/sources/wavegen.h @@ -0,0 +1,90 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef WAVEGEN_H +#define WAVEGEN_H + +#include "clock-base.h" +#include "itemlibrary.h" +#include + +class MAINMODULE_EXPORT WaveGen : public ClockBase +{ + Q_OBJECT + Q_PROPERTY( double Volt_Base READ voltBase WRITE setVoltBase DESIGNABLE true USER true ) + Q_PROPERTY( double Duty_Square READ duty WRITE setDuty DESIGNABLE true USER true ) + Q_PROPERTY( int Quality READ quality WRITE setQuality DESIGNABLE true USER true ) + Q_PROPERTY( wave_type Wave_Type READ waveType WRITE setWaveType DESIGNABLE true USER true ) + Q_ENUMS( wave_type ) + + public: + + WaveGen( QObject* parent, QString type, QString id ); + ~WaveGen(); + + enum wave_type { + Sine = 0, + Saw, + Triangle, + Square + }; + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + double voltBase() { return m_voltBase; } + void setVoltBase( double v ) { m_voltBase = v; } + + double duty(); + void setDuty( double duty ); + + int quality(); + void setQuality( int q ); + + wave_type waveType() { return m_type; } + void setWaveType( wave_type typ ) { m_type = typ; } + + virtual void setFreq( double freq ); + + virtual void updateStep(); + virtual void simuClockStep(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + private slots: + void updateValues(); + + private: + void genSine(); + void genSaw(); + void genTriangle(); + void genSquare(); + + wave_type m_type; + double m_duty; + double m_vOut; + double m_voltBase; + double m_lastVout; + double m_halfW; + + int m_quality; + int m_qSteps; +}; + +#endif diff --git a/src/gui/circuitwidget/components/switches/keypad.cpp b/src/gui/circuitwidget/components/switches/keypad.cpp new file mode 100644 index 0000000..7edc517 --- /dev/null +++ b/src/gui/circuitwidget/components/switches/keypad.cpp @@ -0,0 +1,197 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "keypad.h" +#include "circuit.h" +#include "itemlibrary.h" + +static const char* KeyPad_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Key Labels") +}; + +Component* KeyPad::construct( QObject* parent, QString type, QString id ) +{ return new KeyPad( parent, type, id ); } + +LibraryItem* KeyPad::libraryItem() +{ + return new LibraryItem( + tr( "KeyPad" ), + tr( "Switches" ), + "keypad.png", + "KeyPad", + KeyPad::construct); +} + +KeyPad::KeyPad( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( id.toStdString() ) +{ + Q_UNUSED( KeyPad_properties ); + + m_keyLabels = "123456789*0#"; + m_rows = 4; + m_cols = 3; + setupButtons(); +} +KeyPad::~KeyPad(){} + +void KeyPad::initialize() +{ + for( int row=0; rowgetEnode(); + + for( int col=0; colgetEnode(); + + PushBase* button = m_buttons.at( row*m_cols+col ); + + ePin* epin0 = button->getEpin( 0 ); + epin0->setEnode( rowNode ); + + ePin* epin1 = button->getEpin( 1 ); + epin1->setEnode( colNode ); + } + } +} + +void KeyPad::setupButtons() +{ + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + m_area = QRectF( -12, -4, 16*m_cols+8, 16*m_rows+8 ); + + foreach( PushBase* button, m_buttons ) + { + m_buttons.removeOne( button ); + Circuit::self()->removeComp( button ); + } + + foreach( Pin* pin, m_pin ) + { + if( pin->isConnected() ) pin->connector()->remove(); + if( pin->scene() ) Circuit::self()->removeItem( pin ); + delete pin; + } + m_pin.resize( m_rows + m_cols ); + + int labelMax = m_keyLabels.size()-1; + + for( int row=0; rowinitEpins(); + button->setParentItem( this ); + button->setPos( QPointF(col*16+12, 16+row*16 ) ); + button->setFlag( QGraphicsItem::ItemIsSelectable, false ); + m_buttons.append( button ); + + int pos = row*m_cols+col; + QString buttonLabel = ""; + if( pos <= labelMax ) buttonLabel = m_keyLabels.mid( pos, 1 ); + button->setButtonText( buttonLabel ); + + if( row == 0 ) + { + QString pinId = m_id; + pinId.append( QString("-Pin")+QString::number(m_rows+col)) ; + QPoint pinPos = QPoint( col*16, m_rows*16+8); + m_pin[m_rows+col] = new Pin( 270, pinPos, pinId, 0, this); + } + } + } + if( pauseSim ) Simulator::self()->resumeSim(); + Circuit::self()->update(); +} + +double KeyPad::rows() +{ + return m_rows; +} + +void KeyPad::setRows( double rows ) +{ + m_rows = rows; + setupButtons(); +} + +double KeyPad::cols() +{ + return m_cols; +} + +void KeyPad::setCols( double cols ) +{ + m_cols = cols; + setupButtons(); +} + +QString KeyPad::keyLabels() +{ + return m_keyLabels; +} +void KeyPad::setKeyLabels( QString keyLabels ) +{ + m_keyLabels = keyLabels; + + int labelMax = m_keyLabels.size()-1; + + for( int row=0; rowsetButtonText( buttonLabel ); + } + } +} + +void KeyPad::remove() +{ + foreach( PushBase* button, m_buttons ) + Circuit::self()->removeComp( button ); + + Component::remove(); +} + +void KeyPad::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + p->drawRoundedRect( m_area,2,2 ); +} + +#include "moc_keypad.cpp" diff --git a/src/gui/circuitwidget/components/switches/keypad.h b/src/gui/circuitwidget/components/switches/keypad.h new file mode 100644 index 0000000..054625c --- /dev/null +++ b/src/gui/circuitwidget/components/switches/keypad.h @@ -0,0 +1,68 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef KEYPAD_H +#define KEYPAD_H + +#include "itemlibrary.h" +#include "e-element.h" +#include "push_base.h" + + +class MAINMODULE_EXPORT KeyPad : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( int Rows READ rows WRITE setRows DESIGNABLE true USER true ) + Q_PROPERTY( int Cols READ cols WRITE setCols DESIGNABLE true USER true ) + Q_PROPERTY( QString Key_Labels READ keyLabels WRITE setKeyLabels DESIGNABLE true USER true ) + + public: + KeyPad( QObject* parent, QString type, QString id ); + ~KeyPad(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + double rows(); + void setRows( double rows ); + + double cols(); + void setCols( double cols ); + + QString keyLabels(); + void setKeyLabels( QString keyLabels ); + + virtual void initialize(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void remove(); + + private: + void setupButtons(); + int m_rows; + int m_cols; + + QString m_keyLabels; + + QList m_buttons; +}; + +#endif diff --git a/src/gui/circuitwidget/components/switches/mech_contact.cpp b/src/gui/circuitwidget/components/switches/mech_contact.cpp new file mode 100644 index 0000000..3a1f340 --- /dev/null +++ b/src/gui/circuitwidget/components/switches/mech_contact.cpp @@ -0,0 +1,268 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "mech_contact.h" +#include "simulator.h" +#include "circuit.h" + +#include + +static const char* MechContact_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Poles"), + QT_TRANSLATE_NOOP("App::Property","DT"), + QT_TRANSLATE_NOOP("App::Property","Norm Close") +}; + +MechContact::MechContact( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( id.toStdString() ) +{ + Q_UNUSED( MechContact_properties ); + + m_numthrows = 0; + m_numPoles = 0; + m_nClose = false; + m_closed = false; + + resetState(); +} +MechContact::~MechContact() +{ +} + +void MechContact::initialize() +{ + for( int i=0; igetEnode(); + + int epinN = 4+i*m_numthrows*2; + m_ePin[ epinN ]->setEnode( enode ); + + if( m_numthrows > 1 ) + m_ePin[ epinN+2 ]->setEnode( enode ); + } + for( uint i=4; igetEnode(); + + if( enode ) enode->setSwitched( true ); + } +} + +void MechContact::resetState() +{ + setSwitch( m_nClose ); +} + +void MechContact::setSwitch( bool closed ) +{ + m_closed = closed; + + for( int i=0; isetAdmit( 1e3 ); + else m_switches[ switchN ]->setAdmit( 0 ); + + if( m_numthrows == 2 ) + { + switchN++; + + if( !closed ) m_switches[ switchN ]->setAdmit( 1e3 ); + else m_switches[ switchN ]->setAdmit( 0 ); + } + } + update(); +} + +void MechContact::remove() +{ + Component::remove(); +} + +void MechContact::SetupSwitches( int poles, int throws ) +{ + m_area = QRectF( -13, -8-16*poles-4, 26, 8+16*poles+8+4 ); + + for( uint i=0; i 1 ) delete m_ePin[ epinN+2 ]; + } + + for( uint i=2; iisConnected() ) pin->connector()->remove(); + pin->reset(); + delete pin; + } + + m_numPoles = poles; + m_numthrows = throws; + + m_switches.resize( poles*throws ); + m_pin.resize( 2+poles+poles*throws); + + m_ePin.resize(4+2*poles*throws); +//qDebug() << "MechContact::SetupSwitches" << poles+poles*throws; + + int cont = 0; + for( int i=0; isetFlag( QGraphicsItem::ItemStacksBehindParent, false ); // draw Pins on top + m_pin[pinN] = pin; + + //qDebug() << "MechContact::SetupSwitches Pin:" << pinN<setFlag( QGraphicsItem::ItemStacksBehindParent, false ); // draw Pins on top + + m_pin[ 2+cont ] = pin; + m_ePin[ ePinN+1 ] = pin; + + //qDebug() << "MechContact::SetupSwitches ePin"<setEpin( 0, m_ePin[ePinN] ); + m_switches[ tN ]->setEpin( 1, pin ); + + //qDebug() << "MechContact::SetupSwitches" << tN << pinN-2<< cont; + } + cont++; + } + + //foreach( Pin* pin, m_pin ) + // pin->setFlag( QGraphicsItem::ItemStacksBehindParent, false ); // draw Pins on top +} + +int MechContact::poles() const +{ return m_numPoles; } + +void MechContact::setPoles( int poles ) +{ + if( poles < 1 ) poles = 1; + + if( poles != m_numPoles ) + SetupSwitches( poles, m_numthrows ); +} + +bool MechContact::dt() const +{ return (m_numthrows>1); } + +void MechContact::setDt( bool dt ) +{ + int throws = 1; + if( dt ) throws = 2; + + if( throws != m_numthrows ) + SetupSwitches( m_numPoles, throws ); +} + +bool MechContact::nClose() const +{ + return m_nClose; +} + +void MechContact::setNClose( bool nc ) +{ + m_nClose = nc; + setSwitch( m_nClose ); +} + + +void MechContact::paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + Component::paint( p, option, widget ); + + /*p->setBrush(Qt::white); + p->drawRect( m_area ); + + QPen pen = p->pen(); // Draw Coil + pen.setWidth(2.8); + p->setPen(pen); + + QRectF rectangle(-12,-4.5, 10, 10 ); + int startAngle = -45 * 16; + int spanAngle = 220 * 16; + p->drawArc(rectangle, startAngle, spanAngle); + + QRectF rectangle2(-5,-4.5, 10, 10 ); + startAngle = 225 * 16; + spanAngle = -270 * 16; + p->drawArc(rectangle2, startAngle, spanAngle); + + QRectF rectangle3(2,-4.5, 10, 10 ); + startAngle = 225 * 16; + spanAngle = -220 * 16; + p->drawArc(rectangle3, startAngle, spanAngle);*/ + + QPen pen = p->pen(); + pen.setWidth(3); + p->setPen(pen); + + for( int i=0; idrawLine(-10, -16-offset, 10, -18-offset ); + else // Switch is oppened + p->drawLine(-10.5, -16-offset, 8, -24-offset ); + } + if( m_numPoles > 1 ) + { + pen.setStyle(Qt::DashLine); + pen.setWidth(1); + p->setPen(pen); + p->drawLine(-0, -12, 0, -12-16*m_numPoles+4 ); + } +} diff --git a/src/gui/circuitwidget/components/switches/mech_contact.h b/src/gui/circuitwidget/components/switches/mech_contact.h new file mode 100644 index 0000000..a35d531 --- /dev/null +++ b/src/gui/circuitwidget/components/switches/mech_contact.h @@ -0,0 +1,68 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef MECH_CONTACT_H +#define MECH_CONTACT_H + +#include "component.h" +#include "e-resistor.h" + +class MAINMODULE_EXPORT MechContact : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( int Poles READ poles WRITE setPoles DESIGNABLE true USER true ) + Q_PROPERTY( bool DT READ dt WRITE setDt DESIGNABLE true USER true ) + Q_PROPERTY( bool Norm_Close READ nClose WRITE setNClose DESIGNABLE true USER true ) + + public: + + MechContact( QObject* parent, QString type, QString id ); + ~MechContact(); + + int poles() const; + void setPoles( int poles ); + + bool dt() const; + void setDt( bool dt ); + + bool nClose() const; + void setNClose( bool nc ); + + virtual void initialize(); + virtual void resetState(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void remove(); + + protected: + virtual void setSwitch( bool on ); + void SetupSwitches( int poles, int throws ); + + std::vector m_switches; + + bool m_closed; + bool m_nClose; + + int m_numPoles; + int m_numthrows; +}; + +#endif diff --git a/src/gui/circuitwidget/components/switches/push.cpp b/src/gui/circuitwidget/components/switches/push.cpp new file mode 100644 index 0000000..9ffddf3 --- /dev/null +++ b/src/gui/circuitwidget/components/switches/push.cpp @@ -0,0 +1,75 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "push.h" +#include "pin.h" +#include "itemlibrary.h" + + +Component* Push::construct( QObject* parent, QString type, QString id ) +{ return new Push( parent, type, id ); } + +LibraryItem* Push::libraryItem() +{ + return new LibraryItem( + tr( "Push" ), + tr( "Switches" ), + "push.png", + "Push", + Push::construct); +} + +Push::Push( QObject* parent, QString type, QString id ) + : PushBase( parent, type, id ) +{ + m_area = QRectF( -11, -9, 22, 11 ); + + m_pin.resize(2); + + QString pinid = m_id; + pinid.append(QString("-lnod")); + QPoint pinpos = QPoint(-8-8,0); + m_pin[0] = new Pin( 180, pinpos, pinid, 0, this); + m_ePin[0] = m_pin[0]; + + pinid = m_id; + pinid.append(QString("-rnod")); + pinpos = QPoint(8+8,0); + m_pin[1] = new Pin( 0, pinpos, pinid, 1, this); + m_ePin[1] = m_pin[1]; + + m_proxy->setPos( QPoint(-8, 4) ); +} +Push::~Push() +{ +} + +void Push::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + QPen pen = p->pen(); + pen.setWidth(3); + p->setPen(pen); + + if( m_closed ) p->drawLine(-9, -2, 9, -2 ); + else p->drawLine(-9, -8, 9, -8 ); +} + +#include "moc_push.cpp" diff --git a/src/gui/circuitwidget/components/switches/push.h b/src/gui/circuitwidget/components/switches/push.h new file mode 100644 index 0000000..654d193 --- /dev/null +++ b/src/gui/circuitwidget/components/switches/push.h @@ -0,0 +1,43 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef PUSH_H +#define PUSH_H + +#include "push_base.h" + +class LibraryItem; + +class MAINMODULE_EXPORT Push : public PushBase +{ + Q_OBJECT + Q_PROPERTY( bool Norm_Close READ nClose WRITE setNClose DESIGNABLE true USER true ) + + public: + + Push( QObject* parent, QString type, QString id ); + ~Push(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); +}; + +#endif diff --git a/src/gui/circuitwidget/components/switches/push_base.cpp b/src/gui/circuitwidget/components/switches/push_base.cpp new file mode 100644 index 0000000..eba2c9f --- /dev/null +++ b/src/gui/circuitwidget/components/switches/push_base.cpp @@ -0,0 +1,54 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "push_base.h" + + +PushBase::PushBase( QObject* parent, QString type, QString id ) + : SwitchBase( parent, type, id ) +{ + connect( m_button, SIGNAL( pressed() ), + this, SLOT ( onbuttonPressed() )); + + connect( m_button, SIGNAL( released() ), + this, SLOT ( onbuttonReleased() )); +} +PushBase::~PushBase() +{ +} + +void PushBase::onbuttonPressed() +{ + m_closed = true; + if( m_nClose ) m_closed = !m_closed; + m_changed = true; + update(); +} + +void PushBase::onbuttonReleased() +{ + m_closed = false; + if( m_nClose ) m_closed = !m_closed; + m_button->setChecked(false); + m_changed = true; + update(); +} + + +#include "moc_push_base.cpp" diff --git a/src/gui/circuitwidget/components/switches/push_base.h b/src/gui/circuitwidget/components/switches/push_base.h new file mode 100644 index 0000000..2c73589 --- /dev/null +++ b/src/gui/circuitwidget/components/switches/push_base.h @@ -0,0 +1,40 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef PUSHBASE_H +#define PUSHBASE_H + +#include "switch_base.h" + + +class MAINMODULE_EXPORT PushBase : public SwitchBase +{ + Q_OBJECT + + public: + + PushBase( QObject* parent, QString type, QString id ); + ~PushBase(); + + public slots: + void onbuttonPressed(); + void onbuttonReleased(); +}; + +#endif diff --git a/src/gui/circuitwidget/components/switches/relay-spst.cpp b/src/gui/circuitwidget/components/switches/relay-spst.cpp new file mode 100644 index 0000000..3f7a852 --- /dev/null +++ b/src/gui/circuitwidget/components/switches/relay-spst.cpp @@ -0,0 +1,45 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "relay-spst.h" +#include "pin.h" + +Component* RelaySPST::construct( QObject* parent, QString type, QString id ) +{ return new RelaySPST( parent, type, id ); } + +LibraryItem* RelaySPST::libraryItem() +{ + return new LibraryItem( + tr( "Relay (all)" ), + tr( "Switches" ), + "relay-spst.png", + "RelaySPST", + RelaySPST::construct); +} + +RelaySPST::RelaySPST( QObject* parent, QString type, QString id ) + : RelayBase( parent, type, id ) +{ + m_area = QRectF( -10, -26, 20, 36 ); + + RelayBase::SetupSwitches( 1, 1 ); +} +RelaySPST::~RelaySPST(){} + +#include "moc_relay-spst.cpp" diff --git a/src/gui/circuitwidget/components/switches/relay-spst.h b/src/gui/circuitwidget/components/switches/relay-spst.h new file mode 100644 index 0000000..d8822ad --- /dev/null +++ b/src/gui/circuitwidget/components/switches/relay-spst.h @@ -0,0 +1,41 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef RELAYSPST_H +#define RELAYSPST_H + +#include "relay_base.h" +#include "e-resistor.h" +#include "itemlibrary.h" + +class MAINMODULE_EXPORT RelaySPST : public RelayBase +{ + Q_OBJECT + + public: + + RelaySPST( QObject* parent, QString type, QString id ); + ~RelaySPST(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + +}; + +#endif diff --git a/src/gui/circuitwidget/components/switches/relay_base.cpp b/src/gui/circuitwidget/components/switches/relay_base.cpp new file mode 100644 index 0000000..0e45179 --- /dev/null +++ b/src/gui/circuitwidget/components/switches/relay_base.cpp @@ -0,0 +1,350 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "relay_base.h" +#include "simulator.h" +#include "circuit.h" + +#include + +static const char* RelayBase_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Rcoil"), + QT_TRANSLATE_NOOP("App::Property","Itrig"), + QT_TRANSLATE_NOOP("App::Property","Poles"), + QT_TRANSLATE_NOOP("App::Property","DT"), + QT_TRANSLATE_NOOP("App::Property","Norm Close") +}; + +RelayBase::RelayBase( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eInductor( id.toStdString() ) +{ + Q_UNUSED( RelayBase_properties ); + + // This represents a coil, so is an Inductor in series with a Resistor: -Ind-Nod-Res- + // We need to create the resistor, internal eNode and do the connections. + + m_numthrows = 0; + m_numPoles = 0; + m_nClose = false; + m_closed = false; + + m_ePin.resize(4); + m_pin.resize(2); + + QString nodid = m_id; // External Left pin to inductor + nodid.append(QString("-lPin")); + QPoint nodpos = QPoint(-16-8,0); + m_pin[0] = new Pin( 180, nodpos, nodid, 0, this); + m_pin[0]->setLength(4.5); + m_pin[0]->setPos(-16, 0 ); + m_ePin[0] = m_pin[0]; + + nodid = m_id; // External Right pin to resistor + nodid.append(QString("-rPin")); + nodpos = QPoint(16+8,0); + m_pin[1] = new Pin( 0, nodpos, nodid, 1, this); + m_pin[1]->setLength(4.5); + m_pin[1]->setPos( 16, 0 ); + m_ePin[3] = m_pin[1]; + + QString reid = m_id; + reid.append(QString("-resistor")); + m_resistor = new eResistor( reid.toStdString() ); + + nodid = reid; // Internal Left pin to inductor + nodid.append(QString("-lIntPin")); + m_ePin[1] = new ePin( reid.toStdString(), 1 ); + + nodid = reid; // Internal right pin to resistor + nodid.append(QString("-rIntPin")); + m_ePin[2] = new ePin( reid.toStdString(), 2 ); + + m_resistor->setEpin( 0, m_ePin[2] ); + m_resistor->setEpin( 1, m_ePin[3] ); + + m_resistor->setRes( 100 ); + m_trigCurrent = 0.02; + + m_internalEnode = new eNode( m_id+"-internaleNode" ); + m_ePin[1]->setEnode( m_internalEnode ); + m_ePin[2]->setEnode( m_internalEnode ); + + setInd( 0.1 ); // 100 mH + //m_unit = "H"; + //setInduc( m_ind ); + setValLabelPos(-16, 6, 0); + setShowVal( true ); + + setLabelPos(-16,-24, 0); + +} +RelayBase::~RelayBase() +{ +} + +void RelayBase::initialize() +{ + eInductor::initialize(); + + for( int i=0; igetEnode(); + + int epinN = 4+i*m_numthrows*2; + m_ePin[ epinN ]->setEnode( enode ); + + if( m_numthrows > 1 ) + m_ePin[ epinN+2 ]->setEnode( enode ); + } + for( uint i=4; igetEnode(); + + if( enode ) enode->setSwitched( true ); + } + + setSwitch( m_nClose ); +} + +void RelayBase::setVChanged() +{ + eInductor::setVChanged(); + + bool closed = ( fabs(m_curSource) > m_trigCurrent ); + + if( m_nClose ) closed = !closed; + + if( closed != m_closed ) setSwitch( closed ); +} + +void RelayBase::setSwitch( bool closed ) +{ + m_closed = closed; + + for( int i=0; isetAdmit( 1e3 ); + else m_switches[ switchN ]->setAdmit( 0 ); + + if( m_numthrows == 2 ) + { + switchN++; + + if( !closed ) m_switches[ switchN ]->setAdmit( 1e3 ); + else m_switches[ switchN ]->setAdmit( 0 ); + } + } + update(); +} + +void RelayBase::remove() +{ + Simulator::self()->remFromEnodeList( m_internalEnode, true ); + + foreach( eResistor* res, m_switches ) delete res; + delete m_resistor; + + Component::remove(); +} + +void RelayBase::SetupSwitches( int poles, int throws ) +{ + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + m_area = QRectF( -13, -8-16*poles-4, 26, 8+16*poles+8+4 ); + + for( uint i=0; i 1 ) delete m_ePin[ epinN+2 ]; + } + + for( uint i=2; iisConnected() ) pin->connector()->remove(); + pin->reset(); + delete pin; + } + + m_numPoles = poles; + m_numthrows = throws; + + m_switches.resize( poles*throws ); + m_pin.resize( 2+poles+poles*throws); + + m_ePin.resize(4+2*poles*throws); +//qDebug() << "RelayBase::SetupSwitches" << poles+poles*throws; + + int cont = 0; + for( int i=0; isetEpin( 0, m_ePin[ePinN] ); + m_switches[ tN ]->setEpin( 1, pin ); + + //qDebug() << "RelayBase::SetupSwitches" << tN << pinN-2<< cont; + } + cont++; + } + + foreach( Pin* pin, m_pin ) + pin->setFlag( QGraphicsItem::ItemStacksBehindParent, false ); // draw Pins on top + + if( pauseSim ) Simulator::self()->resumeSim(); + Circuit::self()->update(); +} + +double RelayBase::rCoil() const +{ return m_resistor->res(); } + +void RelayBase::setRCoil(double res) +{ if (res > 0.0f) m_resistor->setResSafe(res); } + +double RelayBase::iTrig() const +{ return m_trigCurrent; } + +void RelayBase::setITrig( double current ) +{ if (current > 0.0f) m_trigCurrent = current; } + +int RelayBase::poles() const +{ return m_numPoles; } + +void RelayBase::setPoles( int poles ) +{ + if( poles < 1 ) poles = 1; + + if( poles != m_numPoles ) + SetupSwitches( poles, m_numthrows ); +} + +bool RelayBase::dt() const +{ return (m_numthrows>1); } + +void RelayBase::setDt( bool dt ) +{ + int throws = 1; + if( dt ) throws = 2; + + if( throws != m_numthrows ) + SetupSwitches( m_numPoles, throws ); +} + +bool RelayBase::nClose() const +{ + return m_nClose; +} + +void RelayBase::setNClose( bool nc ) +{ + m_nClose = nc; + setSwitch( m_nClose ); +} + + +void RelayBase::paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + Component::paint( p, option, widget ); + + p->setBrush(Qt::white); + p->drawRect( m_area ); + + QPen pen = p->pen(); // Draw Coil + pen.setWidth(2.8); + p->setPen(pen); + + QRectF rectangle(-12,-4.5, 10, 10 ); + int startAngle = -45 * 16; + int spanAngle = 220 * 16; + p->drawArc(rectangle, startAngle, spanAngle); + + QRectF rectangle2(-5,-4.5, 10, 10 ); + startAngle = 225 * 16; + spanAngle = -270 * 16; + p->drawArc(rectangle2, startAngle, spanAngle); + + QRectF rectangle3(2,-4.5, 10, 10 ); + startAngle = 225 * 16; + spanAngle = -220 * 16; + p->drawArc(rectangle3, startAngle, spanAngle); + + pen.setWidth(3); + p->setPen(pen); + + for( int i=0; idrawLine(-10, -16-offset, 10, -18-offset ); + else // Switch is oppened + p->drawLine(-10.5, -16-offset, 8, -24-offset ); + } + if( m_numPoles > 1 ) + { + pen.setStyle(Qt::DashLine); + pen.setWidth(1); + p->setPen(pen); + p->drawLine(-0, -12, 0, -12-16*m_numPoles+4 ); + } +} diff --git a/src/gui/circuitwidget/components/switches/relay_base.h b/src/gui/circuitwidget/components/switches/relay_base.h new file mode 100644 index 0000000..c2e188c --- /dev/null +++ b/src/gui/circuitwidget/components/switches/relay_base.h @@ -0,0 +1,80 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef RELAY_BASE_H +#define RELAY_BASE_H + +#include "e-inductor.h" +#include "component.h" + + +class MAINMODULE_EXPORT RelayBase : public Component, public eInductor +{ + Q_OBJECT + Q_PROPERTY( double Rcoil READ rCoil WRITE setRCoil DESIGNABLE true USER true ) + Q_PROPERTY( double Itrig READ iTrig WRITE setITrig DESIGNABLE true USER true ) + Q_PROPERTY( int Poles READ poles WRITE setPoles DESIGNABLE true USER true ) + Q_PROPERTY( bool DT READ dt WRITE setDt DESIGNABLE true USER true ) + Q_PROPERTY( bool Norm_Close READ nClose WRITE setNClose DESIGNABLE true USER true ) + + public: + + RelayBase( QObject* parent, QString type, QString id ); + ~RelayBase(); + + double rCoil() const; + void setRCoil(double res); + + double iTrig() const; + void setITrig( double current ); + + int poles() const; + void setPoles( int poles ); + + bool dt() const; + void setDt( bool dt ); + + bool nClose() const; + void setNClose( bool nc ); + + void setVChanged(); + virtual void initialize(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void remove(); + + protected: + virtual void setSwitch( bool on ); + void SetupSwitches( int poles, int throws ); + + eResistor* m_resistor; + std::vector m_switches; + + eNode* m_internalEnode; + double m_trigCurrent; + bool m_closed; + bool m_nClose; + + int m_numPoles; + int m_numthrows; +}; + +#endif diff --git a/src/gui/circuitwidget/components/switches/switch.cpp b/src/gui/circuitwidget/components/switches/switch.cpp new file mode 100644 index 0000000..8771d30 --- /dev/null +++ b/src/gui/circuitwidget/components/switches/switch.cpp @@ -0,0 +1,271 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "switch.h" +#include "itemlibrary.h" +#include "simulator.h" +#include "e-node.h" +#include "pin.h" + +Component* Switch::construct( QObject* parent, QString type, QString id ) +{ return new Switch( parent, type, id ); } + +LibraryItem* Switch::libraryItem() +{ + return new LibraryItem( + tr( "Switch (all)" ), + tr( "Switches" ), + "switch.png", + "Switch", + Switch::construct); +} + +Switch::Switch( QObject* parent, QString type, QString id ) + : SwitchBase( parent, type, id ) +{ + m_area = QRectF( -11, -9, 22, 11 ); + + //m_pin.resize(2); + + /*QString pinid = m_id; + pinid.append(QString("-lnod")); + QPoint pinpos = QPoint(-8-8,0); + m_pin[0] = new Pin( 180, pinpos, pinid, 0, this); + m_ePin[0] = m_pin[0]; + + pinid = m_id; + pinid.append(QString("-rnod")); + pinpos = QPoint(8+8,0); + m_pin[1] = new Pin( 0, pinpos, pinid, 1, this); + m_ePin[1] = m_pin[1];*/ + + m_numthrows = 0; + m_numPoles = 0; + + SetupSwitches( 1, 1 ); + + m_proxy->setPos( QPoint(-8, 4) ); + + connect( m_button, SIGNAL( clicked() ), + this, SLOT ( onbuttonclicked() )); +} +Switch::~Switch(){} + +void Switch::initialize() +{//qDebug() << "Switch::initialize:"<getEnode(); + + int epinN = i*m_numthrows*2; + m_ePin[ epinN ]->setEnode( enode ); + + if( m_numthrows > 1 ) m_ePin[ epinN+2 ]->setEnode( enode ); + } + for( uint i=0; igetEnode(); + if( enode ) enode->setSwitched( true ); + } + //m_closed = m_nClose; + //setSwitch( m_nClose ); + onbuttonclicked(); +} + +void Switch::updateStep() +{ + if( m_changed ) + { + setSwitch( m_closed ); + + m_changed = false; + } +} + +void Switch::setSwitch( bool closed ) +{ + for( int i=0; isetAdmit( 1e3 ); + else m_switches[ switchN ]->setAdmit( 0 ); + + if( m_numthrows == 2 ) + { + switchN++; + + if( !closed ) m_switches[ switchN ]->setAdmit( 1e3 ); + else m_switches[ switchN ]->setAdmit( 0 ); + } + } + update(); +} + +void Switch::SetupSwitches( int poles, int throws ) +{ + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + m_area = QRectF( -13,-16*poles, 26, 16*poles ); + + for( uint i=0; i 1 ) delete m_ePin[ epinN+2 ]; + } + + for( uint i=0; iisConnected() ) pin->connector()->remove(); + pin->reset(); + delete pin; + } + + m_numPoles = poles; + m_numthrows = throws; + + m_switches.resize( poles*throws ); + m_pin.resize( poles+poles*throws); + + m_ePin.resize(2*poles*throws); +//qDebug() << "Switch::SetupSwitches" << poles+poles*throws; + + int cont = 0; + for( int i=0; isetFlag( QGraphicsItem::ItemStacksBehindParent, false ); // draw Pins on top + m_pin[pinN] = pin; + + //qDebug() << "Switch::SetupSwitches Pin:" << pinN<setFlag( QGraphicsItem::ItemStacksBehindParent, false ); // draw Pins on top + + m_pin[ cont ] = pin; + m_ePin[ ePinN+1 ] = pin; + + //qDebug() << "Switch::SetupSwitches ePin"<setEpin( 0, m_ePin[ePinN] ); + m_switches[ tN ]->setEpin( 1, pin ); + + //qDebug() << "Switch::SetupSwitches" << tN << pinN-2<< cont; + } + cont++; + } + + //foreach( Pin* pin, m_pin ) + // pin->setFlag( QGraphicsItem::ItemStacksBehindParent, false ); // draw Pins on top + + if( pauseSim ) Simulator::self()->runContinuous(); +} + +int Switch::poles() const +{ return m_numPoles; } + +void Switch::setPoles( int poles ) +{ + if( poles < 1 ) poles = 1; + + if( poles != m_numPoles ) + SetupSwitches( poles, m_numthrows ); +} + +bool Switch::dt() const +{ return (m_numthrows>1); } + +void Switch::setDt( bool dt ) +{ + int throws = 1; + if( dt ) throws = 2; + + if( throws != m_numthrows ) + SetupSwitches( m_numPoles, throws ); +} + +void Switch::remove() +{ + foreach( eResistor* res, m_switches ) delete res; + + SwitchBase::remove(); +} + +void Switch::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + QPen pen = p->pen(); + pen.setWidth(3); + p->setPen(pen); + + //if( m_closed ) p->drawLine(-10, 0, 10, -2 ); + //else p->drawLine(-10.5, 0, 8, -8 ); + + for( int i=0; idrawLine(-10, -16-offset, 10, -18-offset ); + else // Switch is oppened + p->drawLine(-10.5, -16-offset, 8, -24-offset ); + } + if( m_numPoles > 1 ) + { + pen.setStyle(Qt::DashLine); + pen.setWidth(1); + p->setPen(pen); + p->drawLine(-0, 4, 0,-16*m_numPoles+4 ); + } +} + +#include "moc_switch.cpp" diff --git a/src/gui/circuitwidget/components/switches/switch.h b/src/gui/circuitwidget/components/switches/switch.h new file mode 100644 index 0000000..8e9fc3f --- /dev/null +++ b/src/gui/circuitwidget/components/switches/switch.h @@ -0,0 +1,68 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef SWITCH_H +#define SWITCH_H + +#include "switch_base.h" +#include "e-resistor.h" + +class LibraryItem; + +class MAINMODULE_EXPORT Switch : public SwitchBase +{ + Q_OBJECT + Q_PROPERTY( int Poles READ poles WRITE setPoles DESIGNABLE true USER true ) + Q_PROPERTY( bool DT READ dt WRITE setDt DESIGNABLE true USER true ) + Q_PROPERTY( bool Norm_Close READ nClose WRITE setNClose DESIGNABLE true USER true ) + + public: + + Switch( QObject* parent, QString type, QString id ); + ~Switch(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + int poles() const; + void setPoles( int poles ); + + bool dt() const; + void setDt( bool dt ); + + virtual void initialize(); + + void updateStep(); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void remove(); + + protected: + virtual void setSwitch( bool on ); + void SetupSwitches( int poles, int throws ); + + std::vector m_switches; + + int m_numPoles; + int m_numthrows; +}; + +#endif diff --git a/src/gui/circuitwidget/components/switches/switch_base.cpp b/src/gui/circuitwidget/components/switches/switch_base.cpp new file mode 100644 index 0000000..4ea090b --- /dev/null +++ b/src/gui/circuitwidget/components/switches/switch_base.cpp @@ -0,0 +1,118 @@ +/*************************************************************************** + * Copyright (C) 2016 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "switch_base.h" +#include "circuit.h" + +SwitchBase::SwitchBase( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( id.toStdString() ) +{ + m_area = QRectF( 0,0,0,0 ); + + m_ePin.resize(2); + + m_changed = true; + m_closed = false; + m_nClose = false; + + m_idLabel->setPos(-12,-24); + + m_button = new QPushButton( ); + m_button->setMaximumSize( 16,16 ); + m_button->setGeometry(-20,-16,16,16); + m_button->setCheckable( true ); + + m_proxy = Circuit::self()->addWidget( m_button ); + m_proxy->setParentItem( this ); + //m_proxy->setPos( QPoint(-8, 4) ); + + Simulator::self()->addToUpdateList( this ); +} +SwitchBase::~SwitchBase() +{ +} + +void SwitchBase::initialize() +{ + eNode* node0 = m_ePin[0]->getEnode(); + eNode* node1 = m_ePin[1]->getEnode(); + + if( node0 ) node0->setSwitched( true ); + if( node1 ) node1->setSwitched( true ); + + m_ePin[0]->setEnodeComp( node1 ); + m_ePin[1]->setEnodeComp( node0 ); + + m_changed = true; + updateStep(); +} + +void SwitchBase::updateStep() +{ + if( m_changed ) + { + double admit = 0; + + if( m_closed ) admit = 1e3; + + m_ePin[0]->stampAdmitance( admit ); + m_ePin[1]->stampAdmitance( admit ); + + m_changed = false; + + //update(); + } +} + +void SwitchBase::onbuttonclicked() +{ + m_closed = false; + if( m_button->isChecked() ) m_closed = true; + if( m_nClose ) m_closed = !m_closed; + m_changed = true; + + update(); +} + +bool SwitchBase::nClose() const +{ + return m_nClose; +} + +void SwitchBase::setNClose( bool nc ) +{ + m_nClose = nc; + onbuttonclicked(); + //setSwitch( m_nClose ); +} + +void SwitchBase::setButtonText( QString text ) +{ + m_button->setText( text ); +} + +void SwitchBase::remove() +{ + Simulator::self()->remFromUpdateList( this ); + + Component::remove(); +} + +#include "moc_switch_base.cpp" diff --git a/src/gui/circuitwidget/components/switches/switch_base.h b/src/gui/circuitwidget/components/switches/switch_base.h new file mode 100644 index 0000000..ecfc1aa --- /dev/null +++ b/src/gui/circuitwidget/components/switches/switch_base.h @@ -0,0 +1,58 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef SWITCH_BASE_H +#define SWITCH_BASE_H + +#include "e-element.h" +#include "component.h" + +class MAINMODULE_EXPORT SwitchBase : public Component, public eElement +{ + Q_OBJECT + + public: + + SwitchBase( QObject* parent, QString type, QString id ); + ~SwitchBase(); + + virtual void initialize(); + virtual void updateStep(); + + void setButtonText( QString text ); + + bool nClose() const; + void setNClose( bool nc ); + + QPushButton* button() { return m_button; } + + public slots: + void remove(); + virtual void onbuttonclicked(); + + protected: + bool m_changed; + bool m_closed; + bool m_nClose; + + QPushButton* m_button; + QGraphicsProxyWidget* m_proxy; +}; + +#endif diff --git a/src/gui/circuitwidget/components/switches/switchdip.cpp b/src/gui/circuitwidget/components/switches/switchdip.cpp new file mode 100644 index 0000000..d5f12c8 --- /dev/null +++ b/src/gui/circuitwidget/components/switches/switchdip.cpp @@ -0,0 +1,254 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "switchdip.h" +#include "itemlibrary.h" +#include "connector.h" +#include "circuit.h" +#include "pin.h" + + +Component* SwitchDip::construct( QObject* parent, QString type, QString id ) +{ return new SwitchDip( parent, type, id ); } + +LibraryItem* SwitchDip::libraryItem() +{ + return new LibraryItem( + tr( "Switch Dip" ), + tr( "Switches" ), + "switchdip.png", + "SwitchDip", + SwitchDip::construct); +} + +SwitchDip::SwitchDip( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) + , eElement( id.toStdString() ) +{ + m_color = QColor( 50, 50, 70 ); + m_size = 0; + m_state = 0; + setSize( 8 ); + + m_changed = true; + + setShowVal( false ); + + Simulator::self()->addToUpdateList( this ); +} +SwitchDip::~SwitchDip(){} + +void SwitchDip::initialize() +{ + for( int i=0; igetEnode(); + eNode* node1 = m_pin[pin2]->getEnode(); + + if( node0 ) node0->setSwitched( true ); + if( node1 ) node1->setSwitched( true ); + + m_pin[pin1]->setEnodeComp( node1 ); + m_pin[pin2]->setEnodeComp( node0 ); + } + m_changed = true; + updateStep(); +} + +void SwitchDip::updateStep() +{ + if( !m_changed ) return; + + int i = 0; + foreach( QPushButton* button, m_buttons ) + { + double admit = 0; + if( button->isChecked() ) admit = 1e3; + + int pin = i*2; + m_pin[pin]->stampAdmitance( admit ); + m_pin[pin+1]->stampAdmitance( admit ); + + i++; + } + m_changed = false; +} + +void SwitchDip::onbuttonclicked() +{ + m_changed = true; + + int i = 0; + foreach( QPushButton* button, m_buttons ) + { + if( button->isChecked() ) + { + button->setIcon(QIcon(":/switchbut.png")); + m_state |= 1<setIcon(QIcon(":/stop.png")); + m_state &= ~(1<>= 1; + + button->setChecked( switchState ); + + if( switchState ) button->setIcon(QIcon(":/switchbut.png")); + else button->setIcon(QIcon(":/stop.png")); + + i++; + } + m_changed = true; +} + +void SwitchDip::createSwitches( int c ) +{ + int start = m_size; + m_size = m_size+c; + m_pin.resize( m_size*2 ); + + for( int i=start; isetMaximumSize( 6,6 ); + button->setGeometry(-6,-6,6,6); + QFont font = button->font(); + font.setPixelSize(5); + button->setFont(font); + //button->setText( "O"); + button->setIcon(QIcon(":/stop.png")); + button->setCheckable( true ); + button->setChecked( true ); + button->setIcon(QIcon(":/switchbut.png")); + m_buttons.append( button ); + + QGraphicsProxyWidget* proxy = Circuit::self()->addWidget( button ); + proxy->setParentItem( this ); + proxy->setPos( QPoint( 3, -27+i*8 ) ); + m_proxys.append( proxy ); + connect( button, SIGNAL( released() ), this, SLOT ( onbuttonclicked() )); + + QPoint pinpos = QPoint(-8,-32+8+i*8 ); + Pin* pin = new Pin( 180, pinpos, butId+"-pinP", 0, this); + m_pin[index] = pin; + + pinpos = QPoint( 16,-32+8+i*8 ); + pin = new Pin( 0, pinpos, butId+"-pinN", 0, this); + m_pin[index+1] = pin; + + m_state |= 1< m_size ) d = m_size; + int start = m_size-d; + + for( int i=start*2; iisConnected() ) pin->connector()->remove(); + + delete pin; + } + for( int i=start; iupdate(); +} + +int SwitchDip::size() +{ + return m_size; +} + +void SwitchDip::setSize( int size ) +{ + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + if( size == 0 ) size = 8; + + if ( size < m_size ) deleteSwitches( m_size-size ); + else if( size > m_size ) createSwitches( size-m_size ); + + m_area = QRect( -1, -26, 10, m_size*8-4 ); + + if( pauseSim ) Simulator::self()->runContinuous(); + Circuit::self()->update(); +} + +void SwitchDip::remove() +{ + Simulator::self()->remFromUpdateList( this ); + + deleteSwitches( m_size ); + + Component::remove(); +} + +void SwitchDip::paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ) +{ + Component::paint( p, option, widget ); + + //p->setBrush( QColor( 80, 80, 80) ); + + p->drawRoundRect( boundingRect(), 4, 4 ); +} + +#include "moc_switchdip.cpp" diff --git a/src/gui/circuitwidget/components/switches/switchdip.h b/src/gui/circuitwidget/components/switches/switchdip.h new file mode 100644 index 0000000..a9b9241 --- /dev/null +++ b/src/gui/circuitwidget/components/switches/switchdip.h @@ -0,0 +1,70 @@ +/*************************************************************************** + * Copyright (C) 2018 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef SWITCHDIP_H +#define SWITCHDIP_H + +#include "component.h" +#include "e-element.h" + +class LibraryItem; + +class MAINMODULE_EXPORT SwitchDip : public Component, public eElement +{ + Q_OBJECT + Q_PROPERTY( int Size READ size WRITE setSize DESIGNABLE true USER true ) + Q_PROPERTY( int State READ state WRITE setState ) + + public: + SwitchDip( QObject* parent, QString type, QString id ); + ~SwitchDip(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + virtual void initialize(); + virtual void updateStep(); + + int size(); + void setSize( int size ); + + int state(); + void setState( int state ); + + void createSwitches( int c ); + void deleteSwitches( int d ); + + virtual void paint( QPainter *p, const QStyleOptionGraphicsItem *option, QWidget *widget ); + + public slots: + virtual void remove(); + void onbuttonclicked(); + + private: + QList m_buttons; + QList m_proxys; + std::vector m_pin; + + bool m_changed; + + int m_size; + int m_state; +}; + +#endif diff --git a/src/gui/circuitwidget/connector.cpp b/src/gui/circuitwidget/connector.cpp new file mode 100644 index 0000000..ade73fc --- /dev/null +++ b/src/gui/circuitwidget/connector.cpp @@ -0,0 +1,562 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "connector.h" +#include "connectorline.h" +#include "circuit.h" +#include "pin.h" +#include "e-node.h" +#include "utils.h" + + +Connector::Connector( QObject* parent, QString type, QString id, Pin* startpin, Pin* endpin ) + : Component( parent, type, id ) +{ + //m_eNode = 0l; + m_actLine = 0; + m_lastindex = 0; + + m_isBus = false; + m_freeLine = false; + + if( startpin ) + { + m_startPin = startpin; + m_startpinid = startpin->pinId(); + setPos( startpin->scenePos() ); + if( m_startPin->isBus() ) setIsBus( true ); + } + + if( endpin ) + { + m_endPin = endpin; + m_endpinid = endpin->pinId(); + m_startPin->setConnector( this ); + m_endPin->setConnector( this ); + m_startPin->setConPin( m_endPin ); + m_endPin->setConPin( m_startPin ); + if( m_isBus ) m_endPin->setIsBus( true ); + } + else + { + m_endPin = 0l; + m_endpinid = ""; + } + m_idLabel->setVisible( false ); +} +Connector::~Connector() { } + +void Connector::remNullLines() // Remove lines with leght = 0 or aligned +{ + if( m_conLineList.length() < 2 ) + { + refreshPointList(); + return; + } + + foreach( ConnectorLine* line, m_conLineList ) + { + if( line->isDiagonal() ) continue; + + int index = m_conLineList.indexOf( line ); + if( index < m_conLineList.length()-1 ) // + { + ConnectorLine* line2 = m_conLineList.at( index+1 ); + + if( line2->isDiagonal() ) continue; + + if( line->dx() == line2->dx() || line->dy() == line2->dy() ) // Lines aligned or null line + { + line2->sSetP1( line->p1() ); + remConLine( line ); + } + } + } + // + if( m_conLineList.length() < 2 ) + { + m_lastindex = 0; + m_actLine = 0; + } + refreshPointList(); +} + +void Connector::remConLine( ConnectorLine* line ) +{ + int index = m_conLineList.indexOf( line ); + + connectLines( index-1, index+1 ); + Circuit::self()->removeItem( line ); + m_conLineList.removeOne( line ); + if( m_actLine > 0 ) m_actLine -= 1; +} + +void Connector::refreshPointList() +{ + if( m_conLineList.isEmpty() ) return; + + QStringList list; + QString data; + + data.setNum( m_conLineList.at(0)->p1().x() ); + list.append( data ); + data.setNum( m_conLineList.at(0)->p1().y() ); + list.append( data ); + int count = m_conLineList.size(); + for( int i=0; ip2().x() ); + list.append( data ); + data.setNum( m_conLineList.at(i)->p2().y() ); + list.append( data ); + } + setPos( m_conLineList.first()->scenePos() ); + + setPointList( list ); + //qDebug() << "lines " << count << "connector poinlist" << m_conLineList; +} + +void Connector::addConLine( ConnectorLine* line, int index ) +{ + if( index > 0 && index < m_conLineList.size() ) disconnectLines( index-1, index ); + + m_conLineList.insert( index, line ); + + Circuit::self()->addItem(line); + + if( index > 0 ) + { + connectLines( index-1, index ); + m_conLineList.at( index-1 )->sSetP2( line->p1() ); + } + + if( index < m_conLineList.size()-1 ) + { + if( m_conLineList.size() < 2 ) return; + + connectLines( index, index+1 ); + m_conLineList.at( index+1 )->sSetP1( line->p2() ); + } + line->setIsBus( m_isBus ); + if( Circuit::self()->is_constarted() ) line->setCursor( Qt::ArrowCursor ); +} + +ConnectorLine* Connector::addConLine( int x1, int y1, int x2, int y2, int index ) +{ + ConnectorLine* line = new ConnectorLine( x1, y1, x2, y2, this ); + + addConLine( line, index ); + + return line; +} + +void Connector::connectLines( int index1, int index2 ) +{ + if( index1 < 0 || index2 < 0 || index2 > m_conLineList.length()-1 ) + return; + + ConnectorLine* line1 = m_conLineList.at( index1 ); + ConnectorLine* line2 = m_conLineList.at( index2 ); + + line1->setNextLine( line2 ); + line2->setPrevLine( line1 ); +} + +void Connector::disconnectLines( int index1, int index2 ) +{ + if( index1 < 0 || index2 < 0 || index2 > m_conLineList.length()-1 ) + return; + + ConnectorLine* line1 = m_conLineList.at( index1 ); + ConnectorLine* line2 = m_conLineList.at( index2 ); + + line1->setNextLine( 0l ); + line2->setPrevLine( 0l ); +} + +void Connector::updateConRoute( Pin* pin, QPointF thisPoint ) +{ + if( Circuit::self()->pasting() ) + { + remNullLines(); + return; + } + + bool diagonal = false; + int length = m_conLineList.length(); + ConnectorLine* line; + ConnectorLine* preline = 0l; + + if( pin == m_startPin ) + { + line = m_conLineList.first(); + diagonal = line->isDiagonal(); + //qDebug() << "Connector::updateConRoute StartPin"; + + line->sSetP1( thisPoint.toPoint() ); + + m_lastindex = 0; + + if( length > 1 ) + { + preline = m_conLineList.at(1); + m_actLine = 1; + } + else m_actLine = 0; + + if( diagonal ) + { + remNullLines(); + return; + } + } + else + { + line = m_conLineList.last(); + + diagonal = line->isDiagonal(); + //qDebug() << "Connector::updateConRoute EndPin"; + + line->sSetP2( togrid( thisPoint ).toPoint() ); + + m_lastindex = length-1; + + if( length > 1 ) + { + preline = m_conLineList.at( m_lastindex-1 ); + if( pin != 0l ) m_actLine = m_lastindex-1; + } + if( diagonal || m_freeLine ) + { + m_freeLine = false; + if( m_lastindex == m_actLine ) // Add new corner + { + QPoint point = line->p2(); + + ConnectorLine* newLine = addConLine( point.x(), point.y(), point.x()+4, point.y()+4, m_lastindex + 1 ); + + if( line->isSelected() ) newLine->setSelected( true ); + } + remNullLines(); + return; + } + } + + if( (line->dx() == 0) && (line->dy() == 0) && (length > 1) ) // Null Line + { + //if( preline && preline->isDiagonal() ) return; + + Circuit::self()->removeItem( line ); + m_conLineList.removeOne( line ); + + if( m_actLine > 0 ) m_actLine -= 1; + } + else if( line->dx() != 0 && line->dy() != 0 ) + { + QPoint point; + + if( m_lastindex == m_actLine ) // Add new corner + { + point = line->p2(); + + if( abs(line->dx()) > abs(line->dy()) ) point.setY( line->p1().y() ); + else point.setX( line->p1().x() ); + + ConnectorLine* newLine = addConLine( point.x(), point.y(), line->p2().x(), line->p2().y(), m_lastindex + 1 ); + + if( line->isSelected() ) newLine->setSelected( true ); + + line->setP2( point ); + + } + else if( m_lastindex < m_actLine ) // Update first corner + { + point = line->p2(); + + if ( preline->dx() == 0 ) point.setY( line->p1().y() ); + else /*if( preline->dy() == 0 )*/ point.setX( line->p1().x() ); + + line->setP2( point ); + + if( line->dx() == preline->dx() || line->dy() == preline->dy() ) // Lines aligned or null line + { + if( line->isSelected() || preline->isSelected()) + { + preline->sSetP1( line->p1() ); + remConLine( line ); + } + } + } + else // Update last corner + { + point = line->p1(); + + if ( preline->dx() == 0 ) point.setY( line->p2().y() ); + else /*if( preline->dy() == 0 )*/ point.setX( line->p2().x() ); + + line->setP1( point ); + + if( line->dx() == preline->dx() || line->dy() == preline->dy() ) // Lines aligned or null line + { + if( line->isSelected() || preline->isSelected()) + { + preline->sSetP2( line->p2() ); + remConLine( line ); + } + } + } + } + //qDebug() << "Connector::updateConRoute"<p1()<p2(); + //if( preline ) qDebug() << "Connector::updateConRoute"<p1()<p2(); + remNullLines(); +} + +void Connector::remLines() +{ + while( !m_conLineList.isEmpty() ) + { + ConnectorLine* line = m_conLineList.takeLast(); + Circuit::self()->removeItem( line ); + delete line; + } +} + +void Connector::move( QPointF delta ) +{ + //qDebug() << "Connector::move .........................."; + if( Circuit::self()->pasting() ) + { + foreach( ConnectorLine* line, m_conLineList ) + line->move( delta ); + + //return; + } + //else + //remNullLines(); + //Component::move( delta ); +} + +void Connector::setSelected( bool selected ) +{ + //qDebug() <<"\nConnector::setSelected"<setSelected( selected ); + //qDebug() << line->isSelected(); + } + + Component::setSelected( selected ); +} + +void Connector::remove() +{ + //qDebug() << "Connector::remove simulator running: " << Simulator::self()->isRunning(); + //qDebug()<<"Connector::remove" << this->objectName(); + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + if( m_startPin ) m_startPin->reset(); + if( m_endPin ) m_endPin->reset(); + + Circuit::self()->conList()->removeOne( this ); + Circuit::self()->removeItem( this ); + remLines(); + + if( pauseSim ) Simulator::self()->runContinuous(); +} + +void Connector::closeCon( Pin* endpin, bool connect ) +{ + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + m_endPin = endpin; + m_endpinid = endpin->objectName(); + + if( connect ) + { + QString enodid = "enode"; + enodid.append(m_id); + enodid.remove("Connector"); + eNode* newEnode = new eNode( enodid ); + + eNode* startPinEnode = m_startPin->getEnode(); + eNode* endPinEnode = m_endPin->getEnode(); + + // We will get all ePins from stratPin and endPin nets an add to new eNode + m_startPin->setConPin( 0l ); + m_endPin->setConPin( 0l ); + + QList epins; + + if( startPinEnode==0l ) { m_startPin->setEnode( newEnode ); } + else + { + // Get connected pins of old eNode and assing to new one. + // If old eNode ran out of pins will delete itself. + startPinEnode->initialize(); + m_startPin->findNodePins();// If it's a Node Pin, get all connected Pins + + epins = startPinEnode->getSubEpins();// All connected pins will register in eNode + + foreach( ePin* epin, epins ) epin->setEnode( newEnode );// Set new eNode, ePins will unregister from old eNode + } + + if( endPinEnode==0l ) { m_endPin->setEnode( newEnode ); } + else //if( endPinEnode!=startPinEnode ) // Same than startPinEnode + { + endPinEnode->initialize(); + m_endPin->findNodePins(); + epins = endPinEnode->getSubEpins(); + foreach( ePin* epin, epins ) { if( epin ) epin->setEnode( newEnode ); } + } + if( m_isBus ) newEnode->setIsBus( true ); + } + + m_startPin->setConnector( this ); + m_endPin->setConnector( this ); + + if( m_isBus ) + { + m_startPin->setIsBus( true ); + m_endPin->setIsBus( true ); + } + + m_startPin->setConPin( m_endPin ); + m_endPin->setConPin( m_startPin ); + + updateConRoute( m_endPin, m_endPin->scenePos() ); + + remNullLines(); + //refreshPointList(); + foreach( ConnectorLine* line, m_conLineList ) line->setCursor( Qt::CrossCursor ); + + if( pauseSim ) Simulator::self()->runContinuous(); +} + +void Connector::splitCon( int index, Pin* pin1, Pin* pin2 ) +{ + if( !m_endPin ) return; + + pin2->setEnode( enode() ); + pin1->setEnode( enode() ); + + disconnectLines( index-1, index ); + + QString type = QString("Connector"); + QString id = type; + id.append( "-" ); + id.append( Circuit::self()->newSceneId() ); + + Connector* new_connector = new Connector( Circuit::self(), type, id, pin2 ); + Circuit::self()->addItem(new_connector); + + int newindex = 0; + int size = m_conLineList.size(); + for( int i = index; i < size; ++i) + { + ConnectorLine* lline = m_conLineList.takeAt( index ); + new_connector->lineList()->insert( newindex, lline ); + + lline->setParent( new_connector ); + lline->setConnector( new_connector ); + + if( newindex > 1 ) new_connector->incActLine(); + ++newindex; + } + + if( index > 1 ) m_actLine = index-2; + else m_actLine = 0; + + new_connector->closeCon( m_endPin ); // Close new_connector first please + closeCon( pin1 ); // Close this +} + +void Connector::updateLines() +{ + eNode* enode = startPin()->getEnode(); + if( enode && enode->voltchanged() ) + { + foreach( ConnectorLine* line, m_conLineList ) line->update(); + } +} + +QStringList Connector::pointList() { refreshPointList(); return m_pointList; } +void Connector::setPointList( QStringList pl ) { /*m_pointList.clear(); */m_pointList = pl;} + +QString Connector::startPinId() { return m_startpinid;} +void Connector::setStartPinId( QString pinid) { m_startpinid = pinid; } +QString Connector::endPinId() { return m_endpinid; } +void Connector::setEndPinId( QString pinid) { m_endpinid = pinid; } + +QString Connector::enodId() +{ + eNode *node = m_startPin->getEnode(); + + if( node ) return node->itemId(); + return ""; +} +//void Connector::setEnodId( QString enodid ) { m_enodid = enodid; } + +Pin* Connector::startPin() { return m_startPin;} +void Connector::setStartPin( Pin* pin) { m_startPin = pin; } +Pin* Connector::endPin() { return m_endPin; } +void Connector::setEndPin( Pin* pin) { m_endPin = pin; } + +eNode* Connector::enode() { return m_startPin->getEnode(); } + +void Connector::setEnode( eNode* enode ) +{ + if( m_startPin ) m_startPin->setEnode( enode ); + if( m_endPin ) m_endPin->setEnode( enode ); + if( m_isBus ) enode->setIsBus( true ); +} + +double Connector::getVolt() +{ + //if( !m_eNode ) return 0; + return m_startPin->getVolt(); +} + +QList* Connector::lineList() { return &m_conLineList; } + +void Connector::incActLine() +{ + //qDebug() << "Connector::incActLine"<< m_actLine << m_conLineList.size()-1; + + if( m_actLine < m_conLineList.size()-1 ) m_actLine += 1; +} + +void Connector::setIsBus( bool bus ) +{ + if( m_isBus == bus ) return; + if( !bus ) return; + + foreach( ConnectorLine* line, m_conLineList ) line->setIsBus( bus ); + + m_isBus = bus; +} + +bool Connector::isBus() +{ + return m_isBus; +} + +#include "moc_connector.cpp" + diff --git a/src/gui/circuitwidget/connector.h b/src/gui/circuitwidget/connector.h new file mode 100644 index 0000000..d1e9309 --- /dev/null +++ b/src/gui/circuitwidget/connector.h @@ -0,0 +1,136 @@ +/*************************************************************************** + * Copyright (C) 2012 by Santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef CONNECTOR_H +#define CONNECTOR_H + +#include "component.h" + +class ConnectorLine; +class eNode; + +class MAINMODULE_EXPORT Connector : public Component +{ + Q_OBJECT + Q_PROPERTY( QStringList pointList READ pointList WRITE setPointList ) + Q_PROPERTY( QString startpinid READ startPinId WRITE setStartPinId ) + Q_PROPERTY( QString endpinid READ endPinId WRITE setEndPinId ) + Q_PROPERTY( QString enodeid READ enodId WRITE setEnodId ) + + public: + + QRectF boundingRect() const { return QRect( 0, 0, 1, 1 ); } + + Connector( QObject* parent, QString type, QString id, Pin* startpin, Pin* endpin = 0l ); + ~Connector(); + + // PROPERTIES----------------------------------- + QStringList pointList(); + void setPointList( QStringList pl ); + + QString startPinId(); + void setStartPinId( QString pinid); + QString endPinId(); + void setEndPinId( QString pinid); + + QString enodId(); + void setEnodId( QString /*nodid*/ ){;} + // END PROPERTIES------------------------------- + + void refreshPointList(); + + Pin* startPin(); + void setStartPin( Pin* pin); + Pin* endPin(); + void setEndPin( Pin* pin); + + eNode* enode(); + void setEnode( eNode* enode ); + + double getVolt(); + + QList* lineList(); + + void incActLine(); + + ConnectorLine* addConLine( int x1, int y1, int x2, int y2, int index ); + + void addConLine( ConnectorLine* line, int index ); + void remConLine( ConnectorLine* line ); + void remNullLines(); + void remLines(); + + void updateConRoute( Pin* nod, QPointF this_point ); + + /** + * Finish the creation of this connector, + * adding the end-pin + */ + void closeCon( Pin* endpin, bool connect=false ); + + /** + * Split this connector in two, the line at index will be the first of new connector, + * pin1 will be endpin of this connector, + * pin2 will be se startpin of the new connector, + * and this connector endpin (previous) will be endpin of the new connector + */ + void splitCon( int index, Pin* pin1, Pin* pin2 ); + + void updateLines(); + + void setIsBus( bool bus ); + bool isBus(); + + bool m_freeLine; + + signals: + void selected(bool yes); + + public slots: + virtual void remove(); + virtual void move( QPointF delta ); + virtual void setSelected( bool selected ); + + private: + void updateCon(); + /** + * Connect signals to update lines positions of lines at inex1 and index2, + * note that the lines are connected in the given order, + * this is: end point of line1 to start point of line2. + */ + void connectLines( int index1, int index2 ); + void disconnectLines( int index1, int index2 ); + + int m_actLine; + int m_lastindex; + + bool m_isBus; + + QString m_startpinid; + QString m_endpinid; + + Pin* m_startPin; + Pin* m_endPin; + + QStringList m_pointList; + + QList m_conLineList; +}; + +#endif diff --git a/src/gui/circuitwidget/connectorline.cpp b/src/gui/circuitwidget/connectorline.cpp new file mode 100644 index 0000000..87e7fb2 --- /dev/null +++ b/src/gui/circuitwidget/connectorline.cpp @@ -0,0 +1,511 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "connectorline.h" +#include "connector.h" +#include "circuitview.h" +#include "circuit.h" +#include "node.h" +#include "utils.h" + +ConnectorLine::ConnectorLine( int x1, int y1, int x2, int y2, Connector* connector ) + : QGraphicsObject() +{ + setParent( connector ); + m_pConnector = connector; + + m_prevLine = 0l; + m_nextLine = 0l; + + m_p1X = x1; + m_p1Y = y1; + m_p2X = x2; + m_p2Y = y2; + + m_isBus = false; + m_moveP1 = false; + m_moveP2 = false; + m_moving = false; + + this->setFlag( QGraphicsItem::ItemIsSelectable, true ); + + setCursor( Qt::CrossCursor ); + + updatePos(); +} +ConnectorLine::~ConnectorLine(){} + +QRectF ConnectorLine::boundingRect() const +{ + int dy = m_p2Y-m_p1Y; + int dx = m_p2X-m_p1X; + int p =-1; + int d = 2; + + if( dx != 0 + && dy != 0 ) return QRect( 0 , 0 , dx , dy ); + else if( dx > 0 ) return QRect(-1 ,-4 , dx+d, 8 ); + else if( dx < 0 ) return QRect( dx+p,-4 ,-dx+d, 8 ); + else if( dy > 0 ) return QRect(-4 ,-1 , 8 , dy+d ); + else if( dy < 0 ) return QRect(-4 , dy+p, 8 ,-dy+d ); + else return QRect( 0 , 0 , 0 , 0 ); +} + +void ConnectorLine::sSetP1( QPoint point ) +{ + prepareGeometryChange(); + m_p1X = point.x(); + m_p1Y = point.y(); + updatePos(); +} + +void ConnectorLine::sSetP2( QPoint point ) +{ + prepareGeometryChange(); + m_p2X = point.x(); + m_p2Y = point.y(); + updatePos(); +} + +void ConnectorLine::setP1( QPoint point ) +{ + if( m_prevLine ) m_prevLine->sSetP2( point ); + sSetP1( point ); +} + +void ConnectorLine::setP2( QPoint point ) +{ + if( m_nextLine ) m_nextLine->sSetP1( point ); + sSetP2( point ); +} + +void ConnectorLine::moveSimple( QPointF delta ) +{ + bool deltaH = fabs( delta.x() )> 0; + bool deltaV = fabs( delta.y() )> 0; + + prepareGeometryChange(); + + m_p1X = m_p1X + delta.x(); + m_p1Y = m_p1Y + delta.y(); + m_p2Y = m_p2Y + delta.y(); + m_p2X = m_p2X + delta.x(); + + bool isHoriz = ( dy() == 0 ) && ( dx() != 0 ); + + if( m_prevLine && !(m_prevLine->isSelected()) ) + { + m_prevLine->moveLine( delta.toPoint() ); + + if( ( isHoriz && deltaV ) + ||( !isHoriz && deltaH )) + m_prevLine->sSetP2( QPoint( m_p1X, m_p1Y) ); + + m_prevLine->updatePos(); + m_prevLine->updatePrev(); + } + if( m_nextLine && !(m_nextLine->isSelected()) ) + { + m_nextLine->moveLine( delta.toPoint() ); + + if( ( isHoriz && deltaV ) + ||( !isHoriz && deltaH )) + m_nextLine->sSetP1( QPoint( m_p2X, m_p2Y) ); + + m_nextLine->updatePos(); + m_nextLine->updateNext(); + } + updatePos(); +} + +void ConnectorLine::move( QPointF delta ) +{ + // If contiguous lines are also selected, just move line. + bool moveSimple = false; + /* !( ( m_prevLine && !(m_prevLine->isSelected()) ) + ||( m_nextLine && !(m_nextLine->isSelected()) ));*/ + + if( Circuit::self()->pasting() || moveSimple ) + { + prepareGeometryChange(); + m_p1Y = m_p1Y + delta.y(); + m_p2Y = m_p2Y + delta.y(); + m_p1X = m_p1X + delta.x(); + m_p2X = m_p2X + delta.x(); + updatePos(); + + return; + } + int myindex = m_pConnector->lineList()->indexOf( this ); + if( ( myindex == 0 ) || ( myindex == m_pConnector->lineList()->size()-1 ) ) + return; //avoid moving first or last line + + moveLine( delta.toPoint() ); + updatePos(); + updateLines(); + m_pConnector->refreshPointList(); +} + +void ConnectorLine::moveLine( QPoint delta ) +{ + prepareGeometryChange(); + + if( /*( dy() == 0 ) &&*/ ( dx() != 0 ) ) + { + m_p1Y = m_p1Y + delta.y(); + m_p2Y = m_p2Y + delta.y(); + } + if( /*( dx() == 0 ) &&*/ ( dy() != 0 ) ) + { + m_p1X = m_p1X + delta.x(); + m_p2X = m_p2X + delta.x(); + } + //else return; //line is "0" +} + +void ConnectorLine::updateLines() +{ + updatePrev(); + updateNext(); +} + +void ConnectorLine::updatePrev() +{ + if( m_prevLine ) m_prevLine->sSetP2( QPoint( m_p1X, m_p1Y) ); +} + +void ConnectorLine::updateNext() +{ + if( m_nextLine ) + { + m_nextLine->sSetP1( QPoint( m_p2X, m_p2Y) ); + m_nextLine->updatePos(); + } +} + +void ConnectorLine::updatePos() +{ + setPos( m_p1X, m_p1Y ); + + update(); +} + +void ConnectorLine::setPrevLine( ConnectorLine* prevLine ) +{ + m_prevLine = prevLine; +} + +void ConnectorLine::setNextLine( ConnectorLine* nextLine ) +{ + m_nextLine = nextLine; +} + +void ConnectorLine::remove() +{ + if( !isSelected() ) Circuit::self()->clearSelection(); + setSelected( true ); + Circuit::self()->removeItems(); + + //m_pConnector->remove(); +} + +void ConnectorLine::mousePressEvent( QGraphicsSceneMouseEvent* event ) +{ + bool dragging = ( CircuitView::self()->dragMode() == QGraphicsView::ScrollHandDrag ); + + if( event->button() == Qt::LeftButton ) + { + if( event->modifiers() == Qt::ControlModifier ) setSelected( !isSelected() ); // Select - Deselect + + else if( event->modifiers() & Qt::ShiftModifier ) // Move Corner + { + QPoint evPoint = togrid( event->scenePos() ).toPoint(); + + if ( evPoint==p1() ) m_moveP1 = true; + else if( evPoint==p2() ) m_moveP2 = true; + m_moving = true; + } + else if( dragging ) // Move Line + { + event->accept(); + + if ( dy() == 0 ) CircuitView::self()->viewport()->setCursor( Qt::SplitVCursor ); + else if( dx() == 0 ) CircuitView::self()->viewport()->setCursor( Qt::SplitHCursor ); + else CircuitView::self()->viewport()->setCursor( Qt::SizeAllCursor ); + m_moving = true; + } + else // Connecting a wire here + { + if( Circuit::self()->is_constarted() ) + { + Connector* con = Circuit::self()->getNewConnector(); + + if( con->isBus() != m_isBus ) // Avoid connect Bus with no-Bus + { + event->ignore(); + return; + } + eNode* eNode1 = con->enode(); + eNode* eNode2 = m_pConnector->enode(); + + if( eNode1 == eNode2 ) // Avoid connect to same eNode + { + event->ignore(); + return; + } + } + int index; + int myindex = m_pConnector->lineList()->indexOf( this ); + QPoint point1 = togrid(event->scenePos()).toPoint(); + + ConnectorLine* line; + + if(( ( (dy() == 0) && ( abs( point1.x()-m_p2X ) < 8 ) ) // point near the p2 corner + || ( (dx() == 0) && ( abs( point1.y()-m_p2Y ) < 8 ) ) ) + && ( myindex != m_pConnector->lineList()->size()-1 ) ) + { + if( myindex == m_pConnector->lineList()->size()-1 ) + { + event->ignore(); + return; + } + event->accept(); + point1 = p2(); + index = myindex+1; + line = m_pConnector->lineList()->at( index ); + } + else if(( ( (dy() == 0) && ( abs( point1.x()-m_p1X ) < 8 ) ) // point near the p1 corner + || ( (dx() == 0) && ( abs( point1.y()-m_p1Y ) < 8 ) ) ) + && ( myindex != 0 ) ) + { + if( myindex == 0 ) + { + event->ignore(); + return; + } + event->accept(); + point1 = p1(); + line = this; + index = myindex; + } + else // split this line in two + { + event->accept(); + + if( dy() == 0 ) point1.setY( m_p1Y ); + else point1.setX( m_p1X ); + + index = myindex+1; + + line = new ConnectorLine( point1.x(), point1.y(), m_p2X, p2().y(), m_pConnector ); + m_pConnector->addConLine( line, index ); + } + + QString type = QString("Node"); + QString id = type; + id.append( "-" ); + id.append( Circuit::self()->newSceneId() ); + + Node* node = new Node( 0, type, id ); // Now add the Node + node->setPos( point1.x(), point1.y()); + Circuit::self()->addItem( node ); + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + //qDebug() << "line constarted" << Circuit::self()->is_constarted() << Circuit::self(); + + m_pConnector->splitCon( index, node->getPin(0), node->getPin(2) ); + eNode* enode = m_pConnector->enode(); // get the eNode from my connector + node->getPin(1)->setEnode( enode ); + + if( Circuit::self()->is_constarted() ) // A Connector wants to connect here (ends in a node) + Circuit::self()->closeconnector( node->getPin(1) ); + else // A new Connector created here (starts in a node) + Circuit::self()->newconnector( node->getPin(1) ); // start a new connector + + if( pauseSim ) Simulator::self()->runContinuous(); + } + } + //else setSelected( true ); +} + +void ConnectorLine::mouseMoveEvent( QGraphicsSceneMouseEvent* event ) +{ + event->accept(); + + QPoint delta = togrid( event->scenePos() ).toPoint() - togrid(event->lastScenePos()).toPoint(); + + if( event->modifiers() & Qt::ShiftModifier ) // Move Corner + { + //qDebug() << "ConnectorLine::mousePressEvent"<scenePos()<lineList()->indexOf( this ); + + if( myindex == 0 ) + m_pConnector->addConLine( p1().x(), p1().y(), p1().x(), p1().y(), myindex ); + + else if( myindex == m_pConnector->lineList()->size()-1 ) + m_pConnector->addConLine( p2().x(), p2().y(), p2().x(), p2().y(), myindex + 1 ); + + moveLine( delta ); + } + updatePos(); + updateLines(); + Circuit::self()->update(); +} + +void ConnectorLine::mouseReleaseEvent( QGraphicsSceneMouseEvent* event ) +{ + event->accept(); + m_moveP1 = false; + m_moveP2 = false; + m_pConnector->remNullLines(); + + if( m_moving ) + { + m_moving = false; + Circuit::self()->setChanged(); + } +} + +void ConnectorLine::contextMenuEvent( QGraphicsSceneContextMenuEvent* event ) +{ + if( Circuit::self()->is_constarted() ) return; + + if( m_pConnector->endPin() ) + { + event->accept(); + QMenu menu; + + QAction* removeAction = menu.addAction( tr("Remove") ); + connect(removeAction, SIGNAL(triggered()), this, SLOT(remove())); + + menu.exec(event->screenPos()); + + //qDebug() << "ConnectorLine::contextMenuEvent\n" << m_pConnector->pointList(); + } +} + +void ConnectorLine::setIsBus( bool bus ) +{ + m_isBus = bus; +} + +void ConnectorLine::setConnector( Connector* con ) { m_pConnector = con; } + +QPoint ConnectorLine::p1() { return QPoint( m_p1X, m_p1Y ); } +QPoint ConnectorLine::p2() { return QPoint( m_p2X, m_p2Y ); } + +int ConnectorLine::dx() { return (m_p2X - m_p1X);} +int ConnectorLine::dy() { return (m_p2Y - m_p1Y);} + +bool ConnectorLine::isDiagonal() +{ + return ( abs(m_p2X - m_p1X)>0 && abs(m_p2Y - m_p1Y)>0 ); +} + +Connector* ConnectorLine::connector(){ return m_pConnector; } + +QPainterPath ConnectorLine::shape() const +{ + int dy = m_p2Y-m_p1Y; + int dx = m_p2X-m_p1X; + int q = 0; + int i = 0; + + if( this->cursor().shape() == Qt::ArrowCursor ) + { + if ( dx > 0 ) q = -5; + else if( dx < 0 ) q = 5; + if ( dy > 0 ) i = -5; + else if( dy < 0 ) i = 5; + } + + QPainterPath path; + + QVector points; + + if( abs(m_p2X - m_p1X) > abs(m_p2Y - m_p1Y) ) + { + points << mapFromScene( QPointF( m_p1X , m_p1Y-4 ) ) + << mapFromScene( QPointF( m_p1X , m_p1Y+4 ) ) + << mapFromScene( QPointF( m_p2X+q, m_p2Y+4 ) ) + << mapFromScene( QPointF( m_p2X+q, m_p2Y-4 ) ); + } + else + { + points << mapFromScene( QPointF( m_p1X-4, m_p1Y ) ) + << mapFromScene( QPointF( m_p1X+4, m_p1Y ) ) + << mapFromScene( QPointF( m_p2X+4, m_p2Y+i ) ) + << mapFromScene( QPointF( m_p2X-4, m_p2Y+i ) ); + } + path.addPolygon( QPolygonF(points) ); + path.closeSubpath(); + return path; +} + +void ConnectorLine::paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + Q_UNUSED(option); + Q_UNUSED(widget); + + //pen.setColor( Qt::darkGray); + //p->setPen( pen ); + + QColor color; + if( isSelected() ) color = QColor( Qt::darkGray ); + else if( !m_isBus && Circuit::self()->animate() ) //color = QColor( 40, 40, 60 /*Qt::black*/ ); + { + if( m_pConnector->getVolt() > 2.5 ) color = QColor( 200, 50, 50 ); + else color = QColor( 50, 50, 200 ); + //int volt = 50*int( m_pConnector->getVolt() ); + //if( volt > 250 )volt = 250; + //if( volt < 0 ) volt = 0; + + /*if( m_pConnector->endPin() + && (m_pConnector->startPin()->changed() + || m_pConnector->endPin()->changed()) ) + { pen.setWidth(3); }*/ + + //color = QColor( volt, 50, 250-volt); + } + else color = QColor( 40, 40, 60 /*Qt::black*/ ); + + QPen pen( color, 2.5, Qt::SolidLine, Qt::RoundCap, Qt::RoundJoin ); + //p->setBrush( Qt::green ); + //p->drawRect( boundingRect() ); + //p->setBrush( Qt::blue ); + //p->drawPath( shape() ); + + if( m_isBus ) + { + //pen.setColor( Qt::darkBlue); + pen.setWidth( 4 ); + } + + p->setPen( pen ); + p->drawLine( 0, 0, dx(), dy()); +} + diff --git a/src/gui/circuitwidget/connectorline.h b/src/gui/circuitwidget/connectorline.h new file mode 100644 index 0000000..d103592 --- /dev/null +++ b/src/gui/circuitwidget/connectorline.h @@ -0,0 +1,102 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef CONNECTORLINE_H +#define CONNECTORLINE_H + +#include + +class Connector; + +class MAINMODULE_EXPORT ConnectorLine : public QGraphicsObject +{ + Q_OBJECT + + public: + ConnectorLine( int x1, int y1, int x2, int y2, Connector* connector ); + ~ConnectorLine(); + + virtual QRectF boundingRect() const; + + void setConnector( Connector* con ); + Connector* connector(); + + void setPrevLine( ConnectorLine* prevLine ); + void setNextLine( ConnectorLine* nextLine ); + + void setP1( QPoint ); + void setP2( QPoint ); + + QPoint p1(); + QPoint p2(); + + int dx(); + int dy(); + + bool isDiagonal(); + + void move( QPointF delta ); + void moveLine( QPoint delta ); + void moveSimple( QPointF delta ); + + void updatePos(); + void updateLines(); + void updatePrev(); + void updateNext(); + + void setIsBus( bool bus ); + + void mousePressEvent( QGraphicsSceneMouseEvent* event ); + void mouseMoveEvent( QGraphicsSceneMouseEvent* event ); + void mouseReleaseEvent( QGraphicsSceneMouseEvent* event ); + + void contextMenuEvent( QGraphicsSceneContextMenuEvent* event ); + + virtual QPainterPath shape() const; + virtual void paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + signals: + //void moved(); + //void yourP1changed( QPoint ); + //void yourP2changed( QPoint ); + + public slots: + void sSetP1( QPoint ); + void sSetP2( QPoint ); + void remove(); + + private: + int myIndex(); + int m_p1X; + int m_p1Y; + int m_p2X; + int m_p2Y; + + bool m_isBus; + bool m_moveP1; + bool m_moveP2; + bool m_moving; + + Connector* m_pConnector; + ConnectorLine* m_prevLine; + ConnectorLine* m_nextLine; +}; + +#endif + diff --git a/src/gui/circuitwidget/itemlibrary.cpp b/src/gui/circuitwidget/itemlibrary.cpp new file mode 100644 index 0000000..b720424 --- /dev/null +++ b/src/gui/circuitwidget/itemlibrary.cpp @@ -0,0 +1,336 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "itemlibrary.h" +#include "simuapi_apppath.h" +#include "appiface.h" + +//BEGIN Item includes +#include "amperimeter.h" +#include "adc.h" +#include "arduino.h" +#include "audio_out.h" +#include "avrcomponent.h" +#include "bcdto7s.h" +#include "bcdtodec.h" +#include "bincounter.h" +#include "bjt.h" +#include "buffer.h" +#include "bus.h" +#include "capacitor.h" +#include "clock.h" +#include "currsource.h" +#include "dac.h" +#include "dectobcd.h" +#include "demux.h" +#include "diode.h" +#include "elcapacitor.h" +#include "ellipse.h" +#include "flipflopd.h" +#include "flipflopjk.h" +#include "frequencimeter.h" +#include "fulladder.h" +#include "function.h" +#include "gate_and.h" +#include "gate_or.h" +#include "gate_xor.h" +#include "ground.h" +#include "hd44780.h" +#include "i2cram.h" +#include "i2ctoparallel.h" +//#include "inbus.h" +#include "inductor.h" +#include "keypad.h" +#include "ks0108.h" +#include "latchd.h" +#include "led.h" +#include "ledbar.h" +#include "ledmatrix.h" +#include "line.h" +#include "lm555.h" +#include "logicinput.h" +#include "memory.h" +#include "mosfet.h" +#include "mux.h" +#include "mux_analog.h" +#include "op_amp.h" +#include "oscope.h" +//#include "outbus.h" +#include "piccomponent.h" +#include "pcd8544.h" +#include "probe.h" +#include "potentiometer.h" +#include "push.h" +#include "rail.h" +#include "rectangle.h" +#include "relay-spst.h" +#include "resistor.h" +#include "resistordip.h" +#include "servo.h" +#include "sevensegment.h" +#include "sevensegment_bcd.h" +#include "shiftreg.h" +#include "sr04.h" +#include "stepper.h" +#include "subcircuit.h" +#include "subpackage.h" +#include "switch.h" +#include "switchdip.h" +#include "textcomponent.h" +#include "voltimeter.h" +#include "volt_reg.h" +#include "voltsource.h" +#include "wavegen.h" +//END Item includes + +ItemLibrary* ItemLibrary::m_pSelf = 0l; + +ItemLibrary::ItemLibrary() +{ + m_pSelf = this; + + loadItems(); + //loadPlugins(); +} +ItemLibrary::~ItemLibrary() +{ + foreach( LibraryItem* item, m_items ) delete item; +} + +void ItemLibrary::loadItems() +{ + m_items.clear(); + // Meters + addItem( Probe::libraryItem() ); + addItem( Voltimeter::libraryItem() ); + addItem( Amperimeter::libraryItem() ); + addItem( Frequencimeter::libraryItem() ); + addItem( Oscope::libraryItem() ); + // Sources + addItem( LogicInput::libraryItem() ); + addItem( Clock::libraryItem() ); + addItem( WaveGen::libraryItem() ); + addItem( VoltSource::libraryItem() ); + addItem( CurrSource::libraryItem() ); + addItem( Rail::libraryItem() ); + addItem( Ground::libraryItem() ); + // Switches + addItem( Push::libraryItem() ); + addItem( Switch::libraryItem() ); + //addItem( ToggleSwitch::libraryItem() ); + addItem( SwitchDip::libraryItem() ); + addItem( RelaySPST::libraryItem() ); + // Passive + addItem( Potentiometer::libraryItem() ); + addItem( Resistor::libraryItem() ); + addItem( ResistorDip::libraryItem() ); + addItem( Capacitor::libraryItem() ); + addItem( elCapacitor::libraryItem() ); + addItem( Inductor::libraryItem() ); + // Active + addItem( Diode::libraryItem() ); + addItem( VoltReg::libraryItem() ); + addItem( OpAmp::libraryItem() ); + addItem( Mosfet::libraryItem() ); + addItem( BJT::libraryItem() ); + addItem( MuxAnalog::libraryItem() ); + // Outputs + addItem( Led::libraryItem() ); + addItem( LedBar::libraryItem() ); + addItem( LedMatrix::libraryItem() ); + addItem( SevenSegment::libraryItem() ); + addItem( KeyPad::libraryItem() ); + addItem( Hd44780::libraryItem() ); + addItem( Pcd8544::libraryItem() ); + addItem( Ks0108::libraryItem() ); + addItem( Stepper::libraryItem() ); + addItem( Servo::libraryItem() ); + addItem( AudioOut::libraryItem() ); + // Micro + addItem( PICComponent::libraryItem() ); + addItem( AVRComponent::libraryItem() ); + addItem( Arduino::libraryItem() ); + addItem( new LibraryItem( tr("Sensors"),tr("Micro"), "1to2.png","", 0l ) ); + addItem( SR04::libraryItem() ); + // Logic + addItem( new LibraryItem( tr("Gates"),tr("Logic"), "gates.png","", 0l ) ); + addItem( new LibraryItem( tr("Arithmetic"),tr("Logic"), "2to2.png","", 0l ) ); + addItem( new LibraryItem( tr("Memory"),tr("Logic"), "subc.png","", 0l ) ); + addItem( new LibraryItem( tr("Converters"),tr("Logic"), "1to2.png","", 0l ) ); + addItem( new LibraryItem( tr("Other Logic"),tr("Logic"), "2to3.png","", 0l ) ); + addItem( Buffer::libraryItem() ); + addItem( AndGate::libraryItem() ); + addItem( OrGate::libraryItem() ); + addItem( XorGate::libraryItem() ); + addItem( Function::libraryItem() ); + addItem( FlipFlopD::libraryItem() ); + addItem( FlipFlopJK::libraryItem() ); + addItem( BinCounter::libraryItem() ); + addItem( FullAdder::libraryItem() ); + addItem( LatchD::libraryItem() ); + addItem( ShiftReg::libraryItem() ); + addItem( Mux::libraryItem() ); + addItem( Demux::libraryItem() ); + addItem( BcdToDec::libraryItem() ); + addItem( DecToBcd::libraryItem() ); + addItem( BcdTo7S::libraryItem() ); + addItem( ADC::libraryItem() ); + addItem( DAC::libraryItem() ); + addItem( Bus::libraryItem() ); + addItem( SevenSegmentBCD::libraryItem() ); + addItem( Memory::libraryItem() ); + addItem( I2CRam::libraryItem() ); + addItem( I2CToParallel::libraryItem() ); + addItem( Lm555::libraryItem() ); + // Subcircuits + addItem( SubCircuit::libraryItem() ); + // Other + addItem( TextComponent::libraryItem() ); + addItem( Rectangle::libraryItem() ); + addItem( Ellipse::libraryItem() ); + addItem( Line::libraryItem() ); + + addItem( SubPackage::libraryItem() ); +} + +void ItemLibrary::addItem( LibraryItem* item ) +{ + if (!item) return; + m_items.append(item); +} + +/*void ItemLibrary::loadPlugins() +{ + m_plugins.clear(); + QDir pluginsDir( qApp->applicationDirPath() ); + + pluginsDir.cd( "data/plugins" ); + + qDebug() << "\n Loading App plugins at:\n"<( plugin ); + + item->initialize(); + if( item && !(m_plugins.contains(pluginName)) ) + { + m_plugins.append(pluginName); + qDebug()<< " Loaded plugin\t" << pluginName; + } + } + else + { + QString errorMsg = pluginLoader.errorString(); + qDebug()<< " " << pluginName << "\tplugin FAILED: " << errorMsg; + + if( errorMsg.contains( "libQt5SerialPort" ) ) + errorMsg = " Qt5SerialPort is not installed in your system\n\n Mcu SerialPort will not work\n Just Install libQt5SerialPort package\n To have Mcu Serial Port Working"; + + QMessageBox::warning( 0,"App Plugin Error:", errorMsg ); + } + } + qDebug() << "\n"; +}*/ + + +const QList ItemLibrary::items() const +{ + return m_items; +} + +LibraryItem *ItemLibrary::itemByName(const QString name) const +{ + foreach( LibraryItem* item, m_items ) + { + if( item->name() == name ) return item; + } + return 0l; +} + +LibraryItem* ItemLibrary::libraryItem(const QString type ) const +{ + foreach( LibraryItem* item, m_items ) + { + if( item->type() == type ) return item; + } + return 0l; +} + + +// CLASS LIBRAYITEM ********************************************************* + +LibraryItem::LibraryItem( const QString &name, + const QString &category, + const QString &iconName, + const QString type, + createItemPtr _createItem ) +{ + m_name = name; + m_category = category; + m_iconfile = iconName; + m_type = type; + m_help = "Sorry... no Help Available"; + createItem = _createItem; + +} + +LibraryItem::~LibraryItem() { } + +QString* LibraryItem::help() +{ + if( m_help == "Sorry... no Help Available" ) + { + QString locale = "_"+QLocale::system().name().split("_").first(); + QString type = m_type; + type= type.replace( " ", "" ); + QString dfPath = SIMUAPI_AppPath::self()->availableDataFilePath( "help/"+locale+"/"+type.toLower()+locale+".txt" ); + + if( dfPath == "" ) + dfPath = SIMUAPI_AppPath::self()->availableDataFilePath( "help/"+type.toLower()+".txt" ); + + if( dfPath != "" ) + { + QFile file( dfPath ); + + if( file.open(QFile::ReadOnly | QFile::Text) ) // Get Text from Help File + { + QTextStream s1( &file ); + s1.setCodec("UTF-8"); + + m_help = ""; + m_help.append(s1.readAll()); + + file.close(); + } + } + } + return &m_help; +} + diff --git a/src/gui/circuitwidget/itemlibrary.h b/src/gui/circuitwidget/itemlibrary.h new file mode 100644 index 0000000..32c5671 --- /dev/null +++ b/src/gui/circuitwidget/itemlibrary.h @@ -0,0 +1,96 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef ITEMLIBRARY_H +#define ITEMLIBRARY_H + +#include "component.h" + +//class QStringList; +class LibraryItem; + +class MAINMODULE_EXPORT ItemLibrary +{ + Q_DECLARE_TR_FUNCTIONS( ItemLibrary ) + + public: + ItemLibrary(); + ~ItemLibrary(); + + static ItemLibrary* self() { return m_pSelf; } + + /** + * Returns a list of items in the library + */ + const QList items() const; + + + /** + * @return the LibraryItem for the item with the given type (id) const. + */ + LibraryItem* libraryItem( const QString type ) const; + /** + * @return the LibraryItem for the item with the given name const. + */ + LibraryItem* itemByName( const QString name ) const; + + void addItem( LibraryItem* item ); + + void loadItems(); + + //void loadPlugins(); + + + protected: + static ItemLibrary* m_pSelf; + + QList m_items; + //QStringList m_plugins; + + friend ItemLibrary* itemLibrary(); +}; + + +class MAINMODULE_EXPORT LibraryItem +{ + public: + LibraryItem( const QString &name, const QString &category, const QString &iconName, + const QString type, createItemPtr createItem ); + + ~LibraryItem(); + + QString name() const { return m_name; } + QString category() const { return m_category; } + QString iconfile() const { return m_iconfile; } + QString type() const { return m_type; } + QString* help(); + + createItemPtr createItemFnPtr() const { return createItem; } + + private: + QString m_name; + QString m_category; + QString m_iconfile; + QString m_type; + QString m_help; + + createItemPtr createItem; +}; + +#endif diff --git a/src/gui/circuitwidget/node.cpp b/src/gui/circuitwidget/node.cpp new file mode 100644 index 0000000..d7bb0d7 --- /dev/null +++ b/src/gui/circuitwidget/node.cpp @@ -0,0 +1,194 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "node.h" +#include "connector.h" +#include "circuit.h" + + +Node::Node( QObject* parent, QString type, QString id ) + : Component( parent, type, id ) +{ + setZValue(2); + + m_color = QColor( Qt::black ); + + m_isBus = false; + + QString nodid; + QPoint nodpos; + + for ( int i=0; i<3; i++ ) + { + nodid = id; + nodid.append(QString("-")); + nodid.append( uchar(48+i) ); + nodpos = QPoint( 0,0); + m_pin[i] = new Pin( 90*i, nodpos, nodid, i, this); + m_pin[i]->setLength( 0 ); + } +} +Node::~Node(){} + +void Node::inStateChanged( int rem ) // Called by pin when connector is removed +{ + if( rem == 1 ) remove(); + else if( rem == 0 ) + { + for( int i=0; i< 3; i++) + if( m_pin[i]->isConnected() ) m_pin[i]->findConnectedPins(); + + } + else if( rem == 2 ) // Propagate Is Bus + { + for( int i=0; i< 3; i++) m_pin[i]->setIsBus( true ); + m_isBus = true; + } +} + +void Node::remove() // Only remove if there are less than 3 connectors +{ + int con[2] = { 0, 0 }; + int conectors = 0; + int conecteds = 0; + + for( int i=0; i< 3; i++) + { + if( m_pin[i]->isConnected() ) + { + if( conecteds == 0 ) { conecteds++; con[0] = i; } + else con[1] = i; + conectors++; + } + } + //if( m_id == "Node-1" ) qDebug()<< m_id << conectors << " connectors"; + + if( conectors < 3 ) + { + if( conectors == 2 ) joinConns( con[0], con[1] ); // 2 Conn + else // 1 Conn + { + //qDebug()<< m_id << conectors << " connectors"<< m_pin[con[0]]->isConnected(); + if( m_pin[con[0]]->isConnected() ) m_pin[con[0]]->connector()->remove(); + } + + Circuit::self()->compList()->removeOne( this ); + Circuit::self()->removeItem( this ); + } +} + +void Node::joinConns( int c0, int c1 ) +{ + Pin* pin0 = m_pin[c0]; + Pin* pin1 = m_pin[c1]; + + Connector* con0 = pin0->connector(); + Connector* con1 = pin1->connector(); + con0->remNullLines(); + con1->remNullLines(); + + Connector* con = new Connector( this, con0->itemType(), con0->itemID(), pin0->conPin() ); + + QStringList list0 = con0->pointList(); + QStringList list1 = con1->pointList(); + QStringList plist; + + if( pin0 == con0->startPin() ) + while( !list0.isEmpty() ) + { + QString p2 = list0.takeLast(); + plist.append(list0.takeLast()); + plist.append(p2); + } + else while( !list0.isEmpty() ) plist.append(list0.takeFirst()); + + if( pin1 == con1->endPin() ) + while( !list1.isEmpty() ) + { + QString p2 = list1.takeLast(); + plist.append(list1.takeLast()); + plist.append(p2); + } + else while( !list1.isEmpty() ) plist.append(list1.takeFirst()); + + con->setPointList( plist ); + + int p1x = plist.first().toInt(); + int p1y = plist.at(1).toInt(); + int p2x = plist.at(plist.size()-2).toInt(); + int p2y = plist.last().toInt(); + + int p0x = con->startPin()->scenePos().x(); + int p0y = con->startPin()->scenePos().y(); + + con->addConLine( p0x,p0y, p1x, p1y, 0 ); + + int count = plist.size(); + for (int i=2; iaddConLine( p1x, p1y, p2x, p2y, i/2 ); + p1x = p2x; + p1y = p2y; + } + + pin0->setEnode( 0l ); + con0->setStartPin( 0l ); + con0->setEndPin( 0l ); + //qDebug() << "Node::joinConns removing con0" << con0->objectName(); + con0->remove(); + + pin1->setEnode( 0l ); + con1->setStartPin( 0l ); + con1->setEndPin( 0l ); + //qDebug() << "Node::joinConns removing con1" << con1->objectName(); + con1->remove(); + + con->closeCon( pin1->conPin(), true ); + con->remNullLines(); + + Circuit::self()->addItem( con ); + if( this->isSelected() ) con->setSelected( true ); +} + +void Node::paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + Q_UNUSED(option); + Q_UNUSED(widget); + + //p->setBrush( Qt::blue ); + //p->drawRect( boundingRect() ); + + Component::paint( p, option, widget ); + + int a =-2; + int b = 4; + if( m_isBus ) + { + a =-3; + b = 6; + } + + p->drawEllipse( QRect( a, a, b, b ) ); +} + +#include "moc_node.cpp" + + diff --git a/src/gui/circuitwidget/node.h b/src/gui/circuitwidget/node.h new file mode 100644 index 0000000..847a602 --- /dev/null +++ b/src/gui/circuitwidget/node.h @@ -0,0 +1,55 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef NODE_H +#define NODE_H + +#include "component.h" +#include "pin.h" + +class MAINMODULE_EXPORT Node : public Component +{ + Q_OBJECT + public: + QRectF boundingRect() const { return QRect( -4, -4, 8, 8 ); } + + Node( QObject* parent, QString type, QString id ); + ~Node(); + + Pin* getPin( int pin ) const { return m_pin[pin]; } + + //virtual void setChanged( bool changed ); + + void paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + public slots: + void inStateChanged( int rem=1 ); + void remove(); + + protected: + void contextMenuEvent(QGraphicsSceneContextMenuEvent* event){;} + + private: + void joinConns( int co0, int c1); + + Pin* m_pin[3]; + + bool m_isBus; +}; +#endif diff --git a/src/gui/circuitwidget/pin.cpp b/src/gui/circuitwidget/pin.cpp new file mode 100644 index 0000000..49a9b2f --- /dev/null +++ b/src/gui/circuitwidget/pin.cpp @@ -0,0 +1,324 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "pin.h" +#include "connector.h" +#include "circuit.h" + + +Pin::Pin( int angle, const QPoint &pos, QString id, int index, Component* parent ) + : QObject() + , QGraphicsItem( parent ) + , ePin( id.toStdString(), index ) + , m_label( parent ) +{ + m_component = parent; + + m_blocked = false; + m_isBus = false; + m_unused = false; + + my_connector = 0l; + m_conPin = 0l; + m_enode = 0l; + + m_angle = angle; + m_color = Qt::black; + m_area = QRect(-4, -4, 12, 8); + + setObjectName( id ); + setConnector( 0l ); + setPos( pos ); + setRotation( 180-angle ); + setLength(8); + setCursor( Qt::CrossCursor ); + setFlag( QGraphicsItem::ItemStacksBehindParent, true ); + setFlag( QGraphicsItem::ItemIsSelectable, false ); + + QFont sansFont( "Helvetica [Cronyx]", 5 ); + sansFont.setPixelSize(6); + m_label.setFont( sansFont ); + m_label.setText(""); + m_label.setBrush( QColor( 250, 250, 200 ) ); + + Circuit::self()->addPin( this, id ); + + connect( parent, SIGNAL( moved() ), this, SLOT( isMoved() ) ); +} +Pin::~Pin() +{ + Circuit::self()->removePin( QString::fromStdString( m_id ) ); +} + +void Pin::reset() +{ + //qDebug() << "Pin::reset "<objectName(); + if( my_connector ) setConnector( 0l ); + m_connected = false; + + //if( !Circuit::self()->deleting() ) + { + //qDebug() << "ePin::reset new:" << m_numConections; + m_component->inStateChanged( 1 ); // Used by node to remove + + if( m_isBus ) m_component->inStateChanged( 3 ); // Used by Bus to remove + } + ePin::reset(); +} + +void Pin::setUnused( bool unused ) +{ + m_unused = unused; + if( unused ) setCursor( Qt::ArrowCursor ); +} + +void Pin::findConnectedPins() // Called by node, for connected pins +{ + if( m_blocked ) return; + + if( m_connected ) + m_enode->addSubEpin( this );// Notify that this pin is connected + + if( m_conPin ) + m_conPin->findNodePins(); // Call pin at other side of Connector +} + +void Pin::findNodePins() // Called by connector closing or other pin +{ + m_blocked = true; + + if( m_connected ) + m_enode->addSubEpin( this );// Notify that this pin is connected + + m_component->inStateChanged( 0 ); // Used by node to find pins + m_blocked = false; +} + +/*double Pin::getVolt() +{ + return ePin::getVolt(); +}*/ + +void Pin::setConnector( Connector* connector ) +{ + my_connector = connector; + + if( my_connector ) + { + setCursor( Qt::ArrowCursor ); + if( m_isBus ) + { + my_connector->setIsBus( true ); + //m_component->inStateChanged( 2 ); + } + } + else setCursor( Qt::CrossCursor ); +} + +Connector* Pin::connector() { return my_connector; } + +void Pin::isMoved() +{ + if( my_connector ) my_connector->updateConRoute( this, scenePos() ); + else + { + if( QApplication::queryKeyboardModifiers() & Qt::ControlModifier ) + { + QList list = this->collidingItems(); + foreach( QGraphicsItem* it, list ) + { + if( it->type() == 65536+3 ) // Pin found + { + Pin* pin = qgraphicsitem_cast( it ); + + if( !pin->connector() ) + { + Circuit::self()->newconnector( this ); + Circuit::self()->closeconnector( pin ); + } + //qDebug() << " Pin: Pin found"; + break; + } + } + } + } +} + +void Pin::mousePressEvent(QGraphicsSceneMouseEvent* event) +{ + if( m_unused ) return; + + if( event->button() == Qt::LeftButton ) + { + if( my_connector==0l ) + { + if( Circuit::self()->is_constarted() ) + { + Connector* con = Circuit::self()->getNewConnector(); + if( con->isBus() != m_isBus ) // Avoid connect Bus with no-Bus + { + event->ignore(); + return; + } + } + event->accept(); + if( Circuit::self()->is_constarted() ) Circuit::self()->closeconnector( this ); + else Circuit::self()->newconnector( this ); + } + else event->ignore(); + } +} + +QString Pin::getLabelText() +{ + return m_label.text(); +} + +void Pin::setLabelText( QString label ) +{ + m_label.setText( label ); + setLabelPos(); +} +void Pin::setLabelPos() +{ + QFontMetrics fm( m_label.font() ); + + int xlabelpos = pos().x(); + int ylabelpos = pos().y(); + + if( m_angle == 0 ) // Right side + { + xlabelpos -= fm.width(m_label.text())+m_length+1; + ylabelpos -= 5; + } + if( m_angle == 90 ) // Top + { + xlabelpos += 5; + ylabelpos += m_length+1; + m_label.setRotation(m_angle); + } + if( m_angle == 180 ) // Left + { + xlabelpos += m_length+1; + ylabelpos -= 5; + } + if( m_angle == 270 ) //bottom + { + m_label.setRotation(m_angle); + xlabelpos -= 5; + ylabelpos -= m_length+1; + + } + m_label.setPos(xlabelpos, ylabelpos ); +} + +void Pin::setLabelColor( QColor color ) +{ + m_label.setBrush( color ); +} + +void Pin::setPinAngle( int angle ) +{ + m_angle= angle; + setRotation( 180-angle ); +} + +void Pin::moveBy( int dx, int dy ) +{ + m_label.moveBy( dx, dy ); + QGraphicsItem::moveBy( dx, dy ); +} + +void Pin::setPinId( QString id ) +{ + m_id = id.toStdString(); +} + +QString Pin::pinId() +{ + return QString::fromStdString( m_id ); +} + +void Pin::setLength( int length ) +{ + m_length = length; + setLabelPos(); +} + +void Pin::setConPin( Pin* pin ){ m_conPin = pin; } +Pin* Pin::conPin() { return m_conPin; } + +void Pin::setBoundingRect( QRect area ) +{ + m_area = area; +} + +void Pin::setIsBus( bool bus ) +{ + if( m_isBus == bus ) return; + if( !bus ) return; + m_isBus = bus; + + if( my_connector ) my_connector->setIsBus( true ); + if( m_conPin ) m_conPin->setIsBus( true ); + + m_component->inStateChanged( 2 ); // Propagate Is Bus (Node) +} + +bool Pin::isBus() +{ + return m_isBus; +} + +void Pin::setVisible( bool visible ) +{ + m_label.setVisible( visible ); + QGraphicsItem::setVisible( visible ); +} + +void Pin::paint( QPainter* painter, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + Q_UNUSED(option); Q_UNUSED(widget); + + QPen pen(m_color, 3, Qt::SolidLine, Qt::RoundCap, Qt::RoundJoin); + + //painter->setBrush( Qt::red ); + //painter->drawRect( boundingRect() ); + + if( m_unused ) pen.setColor( QColor( 75, 120, 170 )); + if( isSelected() ) pen.setColor( Qt::darkGray); + + painter->setPen(pen); + + if( m_length < 1 ) m_length = 1; + painter->drawLine( 0, 0, m_length-1, 0); + + if( m_inverted ) + { + //Component::paint( p, option, widget ); + painter->setBrush( Qt::white ); + QPen pen = painter->pen(); + pen.setWidth( 2 ); + //if( isSelected() ) pen.setColor( Qt::darkGray); + painter->setPen(pen); + QRectF rect( 3,-2.5, 5, 5 ); + painter->drawEllipse(rect); + } +} +#include "moc_pin.cpp" diff --git a/src/gui/circuitwidget/pin.h b/src/gui/circuitwidget/pin.h new file mode 100644 index 0000000..67e47d0 --- /dev/null +++ b/src/gui/circuitwidget/pin.h @@ -0,0 +1,107 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef PIN_H +#define PIN_H + +#include "component.h" +#include "connector.h" +#include "e-pin.h" + +class MAINMODULE_EXPORT Pin : public QObject, public QGraphicsItem, public ePin +{ + Q_OBJECT + Q_INTERFACES(QGraphicsItem) + + public: + QRectF boundingRect() const { return m_area; } + + Pin( int angle, const QPoint &pos, QString id, int index, Component* parent = 0 ); + ~Pin(); + + enum { Type = UserType + 3 }; + int type() const { return Type; } + + QString pinId(); + void setPinId( QString id ); + + bool unused() {return m_unused; } + void setUnused( bool unused ); + + void setLength( int length ); + + void setColor( QColor color ) { m_color = color; } + void setPinAngle( int angle ); + int pinAngle() { return m_angle; } + + void setBoundingRect( QRect area ); + + Component* component() { return m_component; } + + Connector* connector(); + void setConnector( Connector* c ); + + void setConPin( Pin* pin ); + Pin* conPin(); + + QString getLabelText(); + void setLabelText( QString label ); + void setLabelPos(); + void setLabelColor( QColor color ); + + void setVisible( bool visible ); + + void moveBy( int dx, int dy ); + + void reset(); + + void findNodePins(); + void findConnectedPins(); + + void setIsBus( bool bus ); + bool isBus(); + + virtual void paint( QPainter* painter, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + public slots: + void isMoved(); + + protected: + void mousePressEvent(QGraphicsSceneMouseEvent* event); + + private: + int m_angle; + int m_length; + + bool m_blocked; + bool m_isBus; + bool m_unused; + + //QString m_id; + + QColor m_color; + QRect m_area; + Connector* my_connector; + Component* m_component; + Pin* m_conPin; // Pin at the other side of connector + + QGraphicsSimpleTextItem m_label; +}; + +#endif diff --git a/src/gui/circuitwidget/subcircuit.cpp b/src/gui/circuitwidget/subcircuit.cpp new file mode 100644 index 0000000..dad9029 --- /dev/null +++ b/src/gui/circuitwidget/subcircuit.cpp @@ -0,0 +1,772 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "subcircuit.h" +#include "componentselector.h" +#include "circuit.h" +#include "utils.h" +#include "pin.h" +#include "connector.h" +#include "mainwindow.h" +#include "itemlibrary.h" +#include "simuapi_apppath.h" + +#include "ledsmd.h" +#include "e-bcdto7s.h" +#include "e-bcdtodec.h" +#include "e-bincounter.h" +#include "e-bjt.h" +#include "e-bus.h" +#include "e-capacitor.h" +#include "e-clock.h" +#include "e-dectobcd.h" +#include "e-demux.h" +#include "e-diode.h" +#include "e-flipflopd.h" +#include "e-flipflopjk.h" +#include "e-fulladder.h" +#include "e-function.h" +#include "e-gate_or.h" +#include "e-gate_xor.h" +#include "e-gate_xor.h" +#include "e-latch_d.h" +#include "e-lm555.h" +#include "e-logic_device.h" +#include "e-mosfet.h" +#include "e-mux.h" +#include "e-mux_analog.h" +#include "e-op_amp.h" +#include "e-resistor.h" +#include "e-resistordip.h" +#include "e-shiftreg.h" +#include "e-source.h" +#include "e-volt_reg.h" + +Component* SubCircuit::construct( QObject* parent, QString type, QString id ) +{ + SubCircuit* subCircuit = new SubCircuit( parent, type, id ); + if( m_error > 0 ) + { + Circuit::self()->compList()->removeOne( subCircuit ); + subCircuit->deleteLater(); + subCircuit = 0l; + m_error = 0; + } + return subCircuit; +} + +LibraryItem* SubCircuit::libraryItem() +{ + return new LibraryItem( + tr("Subcircuit"), + tr(""), // Not dispalyed + "", + "Subcircuit", + SubCircuit::construct ); +} + +SubCircuit::SubCircuit( QObject* parent, QString type, QString id ) + : Chip( parent, type, id ) +{ + m_numItems = 0; + + QString compName = m_id.split("-").first(); // for example: "atmega328-1" to: "atmega328" + QString dataFile = ComponentSelector::self()->getXmlFile( compName ); + + if( dataFile == "" ) + { + if ( compName.startsWith( "74XX") ) compName.replace( "XX", "HC" ); + else if( compName.startsWith( "74HC") ) compName.replace( "HC", "XX" ); + + dataFile = ComponentSelector::self()->getXmlFile( compName ); + } + if( dataFile == "" ) + { + MessageBoxNB( "SubCircuit::initChip", " \n"+ + tr( "There are no data files for " )+compName+" "); + m_error = 23; + return; + } + + QFile file( dataFile ); + if( !file.open(QFile::ReadOnly | QFile::Text) ) + { + MessageBoxNB( "SubCircuit::initChip", " \n"+ + compName+" "+ tr("Cannot read file %1:\n%2.").arg(dataFile).arg(file.errorString())); + m_error = 21; + return; + } + QDomDocument domDoc; + if( !domDoc.setContent(&file) ) + { + MessageBoxNB( "SubCircuit::initChip", " \n"+ + tr( "Cannot set file %1\nto DomDocument") .arg(dataFile)); + file.close(); + m_error = 22; + return; + } + file.close(); + + QDomElement root = domDoc.documentElement(); + QDomNode rNode = root.firstChild(); + + while( !rNode.isNull() ) + { + QDomElement element = rNode.toElement(); + QDomNode node = element.firstChild(); + + while( !node.isNull() ) // Find the "package", for example 628A is package: 627A, Same pins + { + QDomElement element = node.toElement(); + + if( element.attribute("name") == compName ) + { + QDir dataDir( dataFile ); + dataDir.cdUp(); // Indeed it doesn't cd, just take out file name + + m_pkgeFile = dataDir.filePath( element.attribute( "package" ) ); + if( !m_pkgeFile.endsWith( ".package" ) ) m_pkgeFile += ".package" ; + + m_subcFile = dataDir.filePath( element.attribute( "subcircuit" ) ); + if( !m_subcFile.endsWith( ".subcircuit" ) ) m_subcFile += ".subcircuit" ; + //qDebug() << "SubCircuit::SubCircuit"<setRes( element.attribute( "resistance" ).toDouble() ); + ecomponent = eresistor; + } + else if( type == "eResistorDip" ) + { + int size = 8; + eResistorDip* eresistordip = new eResistorDip( id.toStdString() ); + if( element.hasAttribute("size") ) size = element.attribute( "size" ).toInt(); + eresistordip->setSize( size ); + if( element.hasAttribute("resistance") ) eresistordip->setRes( element.attribute( "resistance" ).toDouble() ); + ecomponent = eresistordip; + } + else if( type == "eCapacitor" ) + { + ecomponent = new eCapacitor( id.toStdString() ); + } + else if( type == "eDiode" ) + { + eDiode* ediode = new eDiode( id.toStdString() ); + if( element.hasAttribute("threshold") ) + { + ediode->setThreshold( element.attribute( "threshold" ).toDouble() ); + } + ecomponent = ediode; + } + else if( type == "eAndGate" ) + { + int numInputs = 2; + if( element.hasAttribute("numInputs") ) numInputs = element.attribute( "numInputs" ).toInt(); + eGate* egate = new eGate( id.toStdString(), numInputs ); + egate->createPins( numInputs, 1 ); + ecomponent = egate; + } + else if( type == "eBuffer" ) + { + eGate* egate = new eGate( id.toStdString(), 1 ); + egate->createPins( 1, 1 ); + ecomponent = egate; + + if( element.attribute( "tristate" ) == "true" ) + egate->setTristate( true ); + } + else if( type == "eOrGate" ) + { + int numInputs = 2; + if( element.hasAttribute("numInputs") ) numInputs = element.attribute( "numInputs" ).toInt(); + eOrGate* egate = new eOrGate( id.toStdString(), numInputs ); + egate->createPins( numInputs, 1 ); + ecomponent = egate; + } + else if( type == "eXorGate" ) + { + int numInputs = 2; + if( element.hasAttribute("numInputs") ) numInputs = element.attribute( "numInputs" ).toInt(); + eXorGate* egate = new eXorGate( id.toStdString(), numInputs ); + egate->createPins( numInputs, 1 ); + ecomponent = egate; + } + else if( type == "eFunction" ) + { + eFunction* efunction = new eFunction( id.toStdString() ); + ecomponent = efunction; + + int inputs = 0; + int outputs = 0; + if( element.hasAttribute("numInputs") ) inputs = element.attribute( "numInputs" ).toInt(); + if( element.hasAttribute("numOutputs") ) outputs = element.attribute( "numOutputs" ).toInt(); + efunction->createPins( inputs, outputs ); + + if( element.hasAttribute("functions") ) efunction->setFunctions( element.attribute( "functions" ) ); + } + else if( type.startsWith( "eLatchD" ) ) + { + int channels = 1; + if( element.hasAttribute("channels") ) channels = element.attribute( "channels" ).toInt(); + eLatchD* elatchd = new eLatchD( id.toStdString() ); + elatchd->setNumChannels( channels ); + + if( element.hasAttribute("trigger") ) + { + int t = element.attribute( "trigger" ).toInt(); + if ( t == 1 ) elatchd->createClockPin(); + else if( t == 2 ) elatchd->createInEnablePin(); + } + ecomponent = elatchd; + } + else if( type == "eBinCounter" ) + { + int maxValue = 1; + if( element.hasAttribute("maxValue") ) maxValue = element.attribute( "maxValue" ).toInt(); + eBinCounter* ecounter = new eBinCounter( id.toStdString() ); + ecounter->setTopValue( maxValue ); + ecounter->createPins(); + ecomponent = ecounter; + } + else if( type == "eFullAdder" ) + { + eFullAdder* efulladder = new eFullAdder( id.toStdString() ); + efulladder->createPins(); + ecomponent = efulladder; + } + else if( type == "eFlipFlopD" ) + { + eFlipFlopD* eFFD = new eFlipFlopD( id.toStdString() ); + eFFD->createPins(); + ecomponent = eFFD; + + bool srInv = true; + if( element.hasAttribute("sRInverted" ) ) + { + if( element.attribute( "sRInverted" ) == "false" ) srInv = false; + } + eFFD->setSrInv( srInv ); + } + else if( type == "eFlipFlopJK" ) + { + eFlipFlopJK* eFFJK = new eFlipFlopJK( id.toStdString() ); + eFFJK->createPins(); + ecomponent = eFFJK; + + bool srInv = true; + if( element.hasAttribute("sRInverted" ) ) + { + if( element.attribute( "sRInverted" ) == "false" ) srInv = false; + } + eFFJK->setSrInv( srInv ); + } + else if( type == "eShiftReg" ) + { + int latchClk = 0; + int serOut = 0; + if( element.hasAttribute("latchClock") ) latchClk = element.attribute( "latchClock" ).toInt(); + if( element.hasAttribute("serialOut") ) serOut = element.attribute( "serialOut" ).toInt(); + ecomponent = new eShiftReg( id.toStdString(), latchClk, serOut ); + } + else if( type == "eMux" ) + { + eMux* emux = new eMux( id.toStdString() ); + emux->createPins(); + ecomponent = emux; + } + else if( type == "eDemux" ) + { + eDemux* edemux = new eDemux( id.toStdString() ); + edemux->createPins(); + ecomponent = edemux; + } + else if( type == "eBcdTo7S" ) + { + eBcdTo7S* ebcdto7s = new eBcdTo7S( id.toStdString() ); + ebcdto7s->createPins(); + ecomponent = ebcdto7s; + } + else if( type == "eBcdToDec" ) + { + eBcdToDec* ebcdtodec = new eBcdToDec( id.toStdString() ); + ebcdtodec->createPins(); + ecomponent = ebcdtodec; + } + else if( type == "eDecToBcd" ) + { + eDecToBcd* edectobcd = new eDecToBcd( id.toStdString() ); + edectobcd->createPins(); + ecomponent = edectobcd; + } + else if( type == "eClock" ) + { + double freq = 1000; + double volt = 5; + if( element.hasAttribute("freq") ) freq = element.attribute( "freq" ).toDouble(); + if( element.hasAttribute("voltage") ) volt = element.attribute( "voltage" ).toDouble(); + eClock* eclock = new eClock( id.toStdString() ); + eclock->setFreq( freq ); + eclock->setVolt( volt ); + ecomponent = eclock; + } + else if(( type == "eBus" ) + ||( type == "eOutBus" ) + ||( type == "eInBus" ) ) + { + int numbits = 8; + //int startBit = 0; + if( element.hasAttribute("numBits") ) numbits = element.attribute( "numBits" ).toInt(); + //if( element.hasAttribute("startBit") ) startBit = element.attribute( "startBit" ).toInt(); + eBus* ebus = new eBus( id.toStdString() ); + ebus->setNumLines( numbits ); + //ebus->setStartBit( startBit ); + ecomponent = ebus; + } + else if( (type == "eRail")||(type == "eGround") ) + { + double volt = 0; + if( element.hasAttribute("voltage") ) volt = element.attribute( "voltage" ).toDouble(); + eSource* esource = new eSource( id.toStdString(), 0l ); + esource->createPin(); + esource->setVoltHigh( volt ); + esource->setOut( true ); + ecomponent = esource; + } + else if( type == "eMosfet" ) + { + double threshold = 3; + double rDSon = 1; + if( element.hasAttribute("threshold") ) threshold = element.attribute( "threshold" ).toDouble(); + if( element.hasAttribute("rDSon") ) rDSon = element.attribute( "rDSon" ).toDouble(); + eMosfet* emosfet = new eMosfet( id.toStdString() ); + emosfet->setThreshold( threshold ); + emosfet->setRDSon( rDSon ); + if( element.hasAttribute("pChannel") ) + { + if( element.attribute( "pChannel" ) == "true" ) emosfet->setPchannel( true ); + } + if( element.hasAttribute("Depletion") ) + { + if( element.attribute( "Depletion" ) == "true" ) emosfet->setDepletion( true ); + } + ecomponent = emosfet; + } + else if( type == "eBJT" ) + { + double threshold = 0.7; + double gain = 100; + if( element.hasAttribute("threshold") ) threshold = element.attribute( "threshold" ).toDouble(); + if( element.hasAttribute("gain") ) gain = element.attribute( "gain" ).toDouble(); + eBJT* ebjt = new eBJT( id.toStdString() ); + ebjt->setBEthr( threshold ); + ebjt->setGain( gain ); + if( element.hasAttribute("pNP") ) + { + if( element.attribute( "pNP" ) == "true" ) { ebjt->setPnp( true ); } + } + if( element.hasAttribute("bCdiode") ) + { + if( element.attribute( "bCdiode" ) == "true" ) { ebjt->setBCd( true ); } + } + ecomponent = ebjt; + } + else if( type == "eVoltReg" ) + { + double volts = 1.2; + if( element.hasAttribute("Volts") ) volts = element.attribute( "Volts" ).toDouble(); + eVoltReg* evoltreg = new eVoltReg( id.toStdString() ); + evoltreg->setNumEpins(3); + evoltreg->setVRef( volts ); + ecomponent = evoltreg; + } + else if( type == "eopAmp" ) + { + double gain = 1000; + if( element.hasAttribute("Gain") ) gain = element.attribute( "Gain" ).toDouble(); + bool powerPins = false; + if( element.hasAttribute("Power_Pins" ) ) + { + if( element.attribute( "Power_Pins" ) == "true" ) powerPins = true; + } + eOpAmp* eopamp = new eOpAmp( id.toStdString() ); + eopamp->setGain( gain ); + eopamp->setPowerPins( powerPins ); + ecomponent = eopamp; + } + else if( type == "eMuxAnalog" ) + { + eMuxAnalog* muxAn = new eMuxAnalog( id.toStdString() ); + double imp = 1; + if( element.hasAttribute("impedance") ) imp = element.attribute( "impedance" ).toDouble(); + muxAn->setResist( imp ); + int bits = 3; + if( element.hasAttribute("addressBits") ) bits = element.attribute( "addressBits" ).toInt(); + muxAn->setBits( bits ); + ecomponent = muxAn; + } + else if( type == "LedSmd" ) + { + int width = 8; + int height = 8; + if( element.hasAttribute("width") ) width = element.attribute( "width" ).toDouble(); + if( element.hasAttribute("height") ) height = element.attribute( "height" ).toDouble(); + ecomponent = new LedSmd( this, "LEDSMD", id, QRectF( 0, 0, width, height ) ); + } + else if( type == "eLm555" ) + { + ecomponent = new eLm555( id.toStdString() ); + } + + if( ecomponent ) + { + m_elementList.append( ecomponent ); + ecomponent->initEpins(); + + // Get properties + if( element.hasAttribute("maxcurrent") ) + { + eLed* eled = static_cast(ecomponent); + eled->setMaxCurrent( element.attribute( "maxcurrent" ).toDouble() ); + } + if( element.hasAttribute("capacitance") ) + { + eCapacitor* ecapacitor = static_cast(ecomponent); + ecapacitor->setCap( element.attribute( "capacitance" ).toDouble() ); + } + if( element.hasAttribute("outHighV") ) + { + eLogicDevice* elogicdevice = static_cast(ecomponent); + elogicdevice->setOutHighV( element.attribute( "outHighV" ).toDouble() ); + } + if( element.hasAttribute("outLowV") ) + { + eLogicDevice* elogicdevice = static_cast(ecomponent); + elogicdevice->setOutLowV( element.attribute( "outLowV" ).toDouble() ); + } + if( element.hasAttribute("inputImped") ) + { + eLogicDevice* elogicdevice = static_cast(ecomponent); + elogicdevice->setInputImp( element.attribute( "inputImped" ).toDouble() ); + } + if( element.hasAttribute("outImped") ) + { + eLogicDevice* elogicdevice = static_cast(ecomponent); + elogicdevice->setOutImp( element.attribute( "outImped" ).toDouble() ); + } + if( element.hasAttribute("tristate") ) + { + if( element.attribute( "tristate" ) == "true" ) + { + eLogicDevice* elogicdevice = static_cast(ecomponent); + elogicdevice->createOutEnablePin(); + } + } + if( element.hasAttribute("openCollector") ) + { + if( element.attribute( "openCollector" ) == "true" ) + { + eGate* egate = static_cast(ecomponent); + egate->setOpenCol( true ); + } + } + if( element.hasAttribute("inputEnable") ) + { + if( element.attribute( "inputEnable" ) == "true" ) + { + eLogicDevice* elogicdevice = static_cast(ecomponent); + elogicdevice->createInEnablePin(); + } + } + if( element.hasAttribute("clocked") ) + { + if( element.attribute( "clocked" ) == "true" ) + { + eLogicDevice* elogicdevice = static_cast(ecomponent); + elogicdevice->createClockPin(); + } + } + if( element.hasAttribute("clockInverted") ) + { + if( element.attribute( "clockInverted" ) == "true" ) + { + eLogicDevice* elogicdevice = static_cast(ecomponent); + elogicdevice->setClockInv( true ); + } + } + if( element.hasAttribute("inverted") ) + { + if( element.attribute( "inverted" ) == "true" ) + { + eLogicDevice* elogicdevice = static_cast(ecomponent); + elogicdevice->setInverted( true ); + } + } + if( element.hasAttribute("invertInputs") ) + { + if( element.attribute( "invertInputs" ) == "true" ) + { + eLogicDevice* elogicdevice = static_cast(ecomponent); + elogicdevice->setInvertInps( true ); + } + } + + QStringList connectionList = element.attribute( "connections" ).split(" "); + //qDebug() << "connectionList" << connectionList; + + foreach( QString connection, connectionList ) // Get the connection points for each connection + { + if( !(connection.contains("-")) ) continue; + QStringList pins = connection.split("-"); + + QString pin = pins.first(); + + //qDebug() << "SubCircuit::initSubcircuit connecting:"<getEpin( pinNum ); + } + else epin = ecomponent->getEpin( pin ); + + if( epin ) connectEpin( epin, pins.last().replace( "\n", "" ).replace( "\r", "" ) ); // Connect points (ePin to Pin or eNode) + else + { + qDebug() << "SubCircuit::initSubcircuit Pin Doesn't Exist:" << pin; + m_error = 31; + return; + } + } + ecomponent->resetState(); + } + else + { + qDebug() << "SubCircuit::initSubcircuit Error creating: " << id; + m_error = 32; + return; + } + } + rNode = rNode.nextSibling(); + } +} + +void SubCircuit::connectEpin( ePin* epin, QString connetTo ) +{//qDebug() << "\nSubCircuit::connectEpin"<getId() ) << connetTo << m_numpins; + if( connetTo.startsWith("eNode") ) + { + int eNodeNum = connetTo.remove("eNode").toInt(); + epin->setEnode( m_internal_eNode.at(eNodeNum) ); + //qDebug() << "SubCircuit::connectEpin to eNode "<< QString::fromStdString( epin->getId() ) << connetTo << eNodeNum; + } + else if( connetTo.startsWith("packagePin") ) + { + int pinNum = connetTo.remove("packagePin").toInt()-1; + //qDebug() << "SubCircuit::connectEpin to Pin " << connetTo << pinNum; + m_pinConections[pinNum].append( epin ); + } + else if( connetTo.startsWith("Package_") ) // Find pin by id + { + connetTo = connetTo.replace( "Package_", "" ); + bool found = false; + for( int i=0; ipinId().split("-").last().replace( " ", "" ); + //qDebug() << "SubCircuit::connectEpin search"<< pinId << connetTo << i; + + if( pinId == connetTo ) + { + found = true; + m_pinConections[i].append( epin ); + //qDebug() << "SubCircuit::connectEpin Found "<< pinId << connetTo << i; + break; + } + } + if( !found ) qDebug() << "SubCircuit::connectEpin ERROR Pin Not Found"<< connetTo; + } +} + +void SubCircuit::initialize() +{ + for( int i=0; igetEnode(); + + if( !enod ) + { + QList ePinList = m_pinConections[i]; + int size = ePinList.size(); + + if( size > 1 ) + { + enod = ePinList.first()->getEnode(); + if( !enod ) + { + QString eNodeid = m_id; + eNodeid.append( "-eNode_I_" ).append( QString::number(i)); + enod = new eNode( eNodeid ); + } + } + } + //qDebug() << "SubCircuit::initialize() Pin"<< QString::fromStdString( m_ePin[i]->getId() )<< enod->itemId(); + foreach( ePin* epin, m_pinConections[i] ) + { + //qDebug() << "SubCircuit::initialize()"<< QString::fromStdString( epin->getId() )<setEnode(enod); + } + } +} + +void SubCircuit::setLogicSymbol( bool ls ) +{ + if(m_isLS == ls ) return; + + bool pauseSim = Simulator::self()->isRunning(); + if( pauseSim ) Simulator::self()->pauseSim(); + + Circuit::self()->saveState(); + + clear(); + + Chip::setLogicSymbol( ls ); + + initSubcircuit(); + + if( pauseSim ) Simulator::self()->runContinuous(); +} + +void SubCircuit::clear() +{ + for( int i=0; isetEnode(0l); + } + m_pinConections.clear(); + foreach( eNode* node, m_internal_eNode ) + { + Simulator::self()->remFromEnodeList( node, true ); + //delete node; + } + m_internal_eNode.clear(); + foreach( eElement* el, m_elementList ) + { + //qDebug() << "deleting" << QString::fromStdString( el->getId() ); + delete el; + } + m_elementList.clear(); + m_numItems = 0; +} + +void SubCircuit::remove() +{ + clear(); + Chip::remove(); +} + +void SubCircuit::contextMenuEvent( QGraphicsSceneContextMenuEvent* event ) +{ + event->accept(); + QMenu *menu = new QMenu(); + + //menu->addSeparator(); + + Component::contextMenu( event, menu ); + menu->deleteLater(); +} + +#include "moc_subcircuit.cpp" + diff --git a/src/gui/circuitwidget/subcircuit.h b/src/gui/circuitwidget/subcircuit.h new file mode 100644 index 0000000..ea62574 --- /dev/null +++ b/src/gui/circuitwidget/subcircuit.h @@ -0,0 +1,64 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef SUBCIRCUIT_H +#define SUBCIRCUIT_H + +#include "chip.h" +#include "itemlibrary.h" + +class MAINMODULE_EXPORT SubCircuit : public Chip +{ + Q_OBJECT + + public: + + SubCircuit( QObject* parent, QString type, QString id ); + ~SubCircuit(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem * libraryItem(); + + virtual void initialize(); + virtual void initChip(); + + virtual void setLogicSymbol( bool ls ); + + public slots: + virtual void remove(); + + protected: + virtual void contextMenuEvent(QGraphicsSceneContextMenuEvent* event); + + virtual void initSubcircuit(); + + void clear(); + + void connectEpin( ePin *epin, QString connetTo ); + + int m_numItems; + + QString m_subcFile; // file containig subcircuit defs + + QList m_internal_eNode; + QList m_elementList; + QVector > m_pinConections; +}; +#endif + diff --git a/src/gui/circuitwidget/subpackage.cpp b/src/gui/circuitwidget/subpackage.cpp new file mode 100644 index 0000000..cf53b3d --- /dev/null +++ b/src/gui/circuitwidget/subpackage.cpp @@ -0,0 +1,773 @@ +/*************************************************************************** + * Copyright (C) 2019 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include "subpackage.h" +#include "itemlibrary.h" +#include "circuit.h" +#include "simuapi_apppath.h" +#include "utils.h" + +QString SubPackage::m_lastPkg = ""; + +static const char* SubPackage_properties[] = { + QT_TRANSLATE_NOOP("App::Property","Width"), + QT_TRANSLATE_NOOP("App::Property","Height") +}; + +Component* SubPackage::construct( QObject* parent, QString type, QString id ) +{ + return new SubPackage( parent, type, id ); +} + +LibraryItem* SubPackage::libraryItem() +{ + return new LibraryItem( + tr( "Package" ), + tr( "Other" ), + "subc2.png", + "Package", + SubPackage::construct ); +} + +SubPackage::SubPackage( QObject* parent, QString type, QString id ) + : Chip( parent, type, id ) +{ + Q_UNUSED( SubPackage_properties ); + + m_width = 4; + m_height = 8; + + m_changed = false; + m_fakePin = false; + m_movePin = false; + m_isLS = true; + + m_lsColor = QColor( 210, 210, 255 ); + m_icColor = QColor( 40, 40, 120 ); + m_color = m_lsColor; + + m_area = QRect(0, 0, m_width*8, m_height*8); + + setAcceptHoverEvents(true); + + m_pkgeFile = SIMUAPI_AppPath::self()->RODataFolder().absolutePath(); + if( m_lastPkg == "" ) m_lastPkg = m_pkgeFile; +} +SubPackage::~SubPackage(){} + +void SubPackage::hoverMoveEvent( QGraphicsSceneHoverEvent* event ) +{ + if( event->modifiers() & Qt::ShiftModifier) + { + m_fakePin = true; + + int xPos = snapToCompGrid( (int)event->pos().x() ); + int yPos = snapToCompGrid( (int)event->pos().y() ); + + if( xPos == 0 && yPos >= 8 && yPos <= m_height*8-8 ) // Left + { + m_angle = 180; + m_p1X = -8; + m_p1Y = yPos; + m_p2X = 0; + m_p2Y = yPos; + } + else if( xPos == m_width*8 && yPos >= 8 && yPos <= m_height*8-8 ) // Right + { + m_angle = 0; + m_p1X = m_width*8+8; + m_p1Y = yPos; + m_p2X = m_width*8; + m_p2Y = yPos; + } + else if( yPos == 0 && xPos >= 8&& xPos <= m_width*8-8 ) // Top + { + m_angle = 90; + m_p1X = xPos; + m_p1Y = -8; + m_p2X = xPos; + m_p2Y = 0; + } + else if( yPos == m_height*8 && xPos >= 8 && xPos <= m_width*8-8 ) // Bottom + { + m_angle = 270; + m_p1X = xPos; + m_p1Y = m_height*8+8; + m_p2X = xPos; + m_p2Y = m_height*8; + } + else m_fakePin = false; + + Circuit::self()->update(); + //qDebug() <<"Mouse hovered"<update(); + QGraphicsItem::hoverLeaveEvent(event); +} + +void SubPackage::mousePressEvent( QGraphicsSceneMouseEvent* event ) +{ + if( m_fakePin ) + { + event->accept(); + + Pin* pin = new Pin( m_angle, QPoint(m_p1X,m_p1Y ), "name", 0, this ); + m_fakePin = false; + + pin->setLabelText( "Name" ); + pin->setPinId( "Id" ); + pin->setLabelColor( QColor( Qt::black ) ); + pin->setLabelPos(); + + if( m_angle == 0 ) + { + m_rigPin.append( pin ); + qSort( m_rigPin.begin(), m_rigPin.end(), lessPinY ); + //for( Pin* pin : m_rigPin ) qDebug() << pin->pinId(); + } + else if( m_angle == 90 ) + { + m_topPin.append( pin ); + qSort( m_topPin.begin(), m_topPin.end(), lessPinX ); + } + else if( m_angle == 180 ) + { + m_lefPin.append( pin ); + qSort( m_lefPin.begin(), m_lefPin.end(), lessPinY ); + } + else if( m_angle == 270 ) + { + m_botPin.append( pin ); + qSort( m_botPin.begin(), m_botPin.end(), lessPinX ); + } + m_eventPin = pin; + editPin(); + Circuit::self()->update(); + } + else if( m_movePin ) + { + event->accept(); + ungrabMouse(); + setCursor( Qt::OpenHandCursor ); + + if ( m_angle == 0 ) qSort( m_rigPin.begin(), m_rigPin.end(), lessPinY ); + else if( m_angle == 90 ) qSort( m_topPin.begin(), m_topPin.end(), lessPinX ); + else if( m_angle == 180 ) qSort( m_lefPin.begin(), m_lefPin.end(), lessPinY ); + else if( m_angle == 270 ) qSort( m_botPin.begin(), m_botPin.end(), lessPinX ); + + m_changed = true; + m_movePin = false; + m_eventPin = 0l; + } + else Component::mousePressEvent( event ); +} + +void SubPackage::mouseMoveEvent( QGraphicsSceneMouseEvent* event ) +{ + if( m_movePin && m_eventPin ) + { + event->accept(); + QPointF delta = togrid(event->scenePos()) - togrid(event->lastScenePos()); + + int deltaX = delta.x(); + int deltaY = delta.y(); + bool deltaH = fabs( deltaX ) > 0; + bool deltaV = fabs( deltaY ) > 0; + + if( ((m_angle == 0)||(m_angle == 180)) && deltaV ) + { + m_eventPin->moveBy( 0, deltaY ); + if ( m_eventPin->y() < 8 ) m_eventPin->setY( 8 ); + else if( m_eventPin->y() > m_height*8-8 ) m_eventPin->setY( m_height*8-8 ); + m_eventPin->setLabelPos(); + m_eventPin->isMoved(); + } + else if( ((m_angle == 90)||(m_angle == 270)) && deltaH ) + { + m_eventPin->moveBy( deltaX, 0 ); + if ( m_eventPin->x() < 8 ) m_eventPin->setX( 8 ); + else if( m_eventPin->x() > m_width*8-8) m_eventPin->setX( m_width*8-8 ); + m_eventPin->setLabelPos(); + m_eventPin->isMoved(); + } + } + else Component::mouseMoveEvent( event ); +} + +void SubPackage::contextMenuEvent( QGraphicsSceneContextMenuEvent* event ) +{ + int xPos = snapToCompGrid( (int)event->pos().x() ); + int yPos = snapToCompGrid( (int)event->pos().y() ); + + m_eventPin = 0l; + + if( xPos == 0 && yPos >= 8 && yPos <= m_height*8-8 ) // Left + { + for( Pin* pin : m_lefPin ) + { + if( pin->y() == yPos ) + { + m_eventPin = pin; + break; + } + } + } + else if( xPos == m_width*8 && yPos >= 8 && yPos <= m_height*8-8 ) // Right + { + for( Pin* pin : m_rigPin ) + { + if( pin->y() == yPos ) + { + m_eventPin = pin; + break; + } + } + } + else if( yPos == 0 && xPos >= 8 && xPos <= m_width*8-8 ) // Top + { + for( Pin* pin : m_topPin ) + { + if( pin->x() == xPos ) + { + m_eventPin = pin; + break; + } + } + } + else if( yPos == m_height*8 && xPos >= 8 && xPos <= m_width*8-8 ) // Bottom + { + for( Pin* pin : m_botPin ) + { + if( pin->x() == xPos ) + { + m_eventPin = pin; + break; + } + } + } + event->accept(); + QMenu* menu = new QMenu(); + contextMenu( event, menu ); + menu->deleteLater(); +} + +void SubPackage::contextMenu( QGraphicsSceneContextMenuEvent* event, QMenu* menu ) +{ + if( m_eventPin ) + { + QAction* moveAction = menu->addAction( QIcon(":/hflip.png"),tr("Move Pin ")+m_eventPin->getLabelText() ); + connect( moveAction, SIGNAL(triggered()), this, SLOT( movePin() ) ); + + QAction* editAction = menu->addAction( QIcon(":/rename.png"),tr("Edit Pin ")+m_eventPin->getLabelText() ); + connect( editAction, SIGNAL(triggered()), this, SLOT( editPin() ) ); + + QAction* deleteAction = menu->addAction( QIcon(":/remove.png"),tr("Delete Pin ")+m_eventPin->getLabelText() ); + connect( deleteAction, SIGNAL(triggered()), this, SLOT( deletePin() ) ); + + menu->exec( event->screenPos() ); + } + else + { + QAction* loadAction = menu->addAction( QIcon(":/open.png"),tr("Load Package") ); + connect( loadAction, SIGNAL(triggered()), this, SLOT( loadPackage() ) ); + + QAction* saveAction = menu->addAction( QIcon(":/save.png"),tr("Save Package") ); + connect( saveAction, SIGNAL(triggered()), this, SLOT( slotSave() ) ); + + menu->addSeparator(); + + Component::contextMenu( event, menu ); + } +} + +void SubPackage::remove() +{ + if( m_changed ) + { + const QMessageBox::StandardButton ret + = QMessageBox::warning( 0l, "SubPackage::remove", + tr("\nPackage has been modified.\n" + "Do you want to save your changes?\n"), + QMessageBox::Save | QMessageBox::Discard | QMessageBox::Cancel); + + if ( ret == QMessageBox::Save ) slotSave(); + else if( ret == QMessageBox::Cancel ) return; + } + for( Pin* pin : m_rigPin ) + { + if( !pin ) continue; + + if( pin && pin->isConnected()) + { + Connector* con = pin->connector(); + if( con ) con->remove(); + } + } + for( Pin* pin : m_topPin ) + { + if( !pin ) continue; + + if( pin && pin->isConnected()) + { + Connector* con = pin->connector(); + if( con ) con->remove(); + } + } + for( Pin* pin : m_lefPin ) + { + if( !pin ) continue; + + if( pin && pin->isConnected()) + { + Connector* con = pin->connector(); + if( con ) con->remove(); + } + } + for( Pin* pin : m_botPin ) + { + if( !pin ) continue; + + if( pin && pin->isConnected()) + { + Connector* con = pin->connector(); + if( con ) con->remove(); + } + } + Circuit::self()->compRemoved( true ); +} + +int SubPackage::width() +{ + return m_width; +} + +void SubPackage::setWidth( int width ) +{ + if( m_width == width ) return; + m_changed = true; + + int minTopWidth = 2; + int minBotWidth = 2; + if( !m_topPin.isEmpty() ) minTopWidth = m_topPin.last()->x()/8+1; + if( !m_botPin.isEmpty() ) minBotWidth = m_botPin.last()->x()/8+1; + //qDebug() <x()<< minTopWidth << minBotWidth; + + if( width < minTopWidth ) width = minTopWidth; + if( width < minBotWidth ) width = minBotWidth; + + m_width = width; + m_area = QRect(0, 0, m_width*8, m_height*8); + + for( Pin* pin : m_rigPin ) + { + pin->setX( m_width*8+8 ); + pin->setLabelPos(); + } + Circuit::self()->update(); +} + +int SubPackage::height() +{ + return m_height; +} + +void SubPackage::setHeight( int height ) +{ + if( m_height == height ) return; + m_changed = true; + + int minRigHeight = 2; + int minLefHeight = 2; + if( !m_rigPin.isEmpty() ) minRigHeight = m_rigPin.last()->y()/8+1; + if( !m_lefPin.isEmpty() ) minLefHeight = m_lefPin.last()->y()/8+1; + + if( height < minRigHeight ) height = minRigHeight; + if( height < minLefHeight ) height = minLefHeight; + + m_height = height; + m_area = QRect( 0, 0, m_width*8, m_height*8 ); + + for( Pin* pin : m_botPin ) + { + pin->setY( m_height*8+8 ); + pin->setLabelPos(); + } + Circuit::self()->update(); +} + +void SubPackage::movePin() +{ + if( !m_eventPin ) return; + + m_changed = true; + m_movePin = true; + m_angle = m_eventPin->pinAngle(); + + grabMouse(); +} + +void SubPackage::editPin() +{ + if( !m_eventPin ) return; + EditDialog* editDialog = new EditDialog( this, m_eventPin, 0l ); + + connect( editDialog, SIGNAL( finished(int) ), + this, SLOT( editFinished(int) ) ); + + editDialog->exec(); + editDialog->deleteLater(); +} + +void SubPackage::editFinished( int r ) +{ + if( m_changed ) Circuit::self()->saveState(); +} + +void SubPackage::deletePin() +{ + if( !m_eventPin ) return; + m_changed = true; + + int angle = m_eventPin->pinAngle(); + + if( angle == 0 ) + { + m_rigPin.removeOne( m_eventPin ); + qSort( m_rigPin.begin(), m_rigPin.end(), lessPinY ); + } + else if( angle == 90 ) + { + m_topPin.removeOne( m_eventPin ); + qSort( m_topPin.begin(), m_topPin.end(), lessPinX ); + } + else if( angle == 180 ) + { + m_lefPin.removeOne( m_eventPin ); + qSort( m_lefPin.begin(), m_lefPin.end(), lessPinY ); + } + else if( angle == 270 ) + { + m_botPin.removeOne( m_eventPin ); + qSort( m_botPin.begin(), m_botPin.end(), lessPinX ); + } + + if( m_eventPin->isConnected() ) m_eventPin->connector()->remove(); + if( m_eventPin->scene() ) Circuit::self()->removeItem( m_eventPin ); + m_eventPin->reset(); + delete m_eventPin; + m_eventPin = 0l; + + Circuit::self()->update(); +} + + +void SubPackage::setPinId( QString id ) +{ + m_eventPin->setPinId( id.replace("-","") ); + m_changed = true; +} + +void SubPackage::setPinName( QString name ) +{ + m_eventPin->setLabelText( name ); + m_changed = true; +} + +void SubPackage::invertPin( bool invert ) +{ + m_eventPin->setInverted( invert ); + Circuit::self()->update(); + m_changed = true; +} + +void SubPackage::unusePin( bool unuse ) +{ + m_eventPin->setUnused( unuse ); + Circuit::self()->update(); + m_changed = true; +} + +QString SubPackage::package() +{ + return m_pkgeFile; + Circuit::self()->update(); +} + +void SubPackage::setPackage( QString package ) +{ + m_pkgeFile = package; + Chip::initChip(); + + setLogicSymbol( m_isLS ); + + Circuit::self()->update(); +} + +void SubPackage::setLogicSymbol( bool ls ) +{ + if( ls == m_isLS ) return; + m_isLS = ls; + + QColor labelColor = QColor( 0, 0, 0 ); + + if( ls ) m_color = m_lsColor; + else + { + m_color = m_icColor; + labelColor = QColor( 250, 250, 200 ); + } + + for( Pin* pin : m_lefPin ) + { + if( !pin ) continue; + pin->setLabelColor( labelColor ); + } + for( Pin* pin : m_botPin ) + { + if( !pin ) continue; + pin->setLabelColor( labelColor ); + } + for( Pin* pin : m_rigPin ) + { + if( !pin ) continue; + pin->setLabelColor( labelColor ); + } + for( Pin* pin : m_topPin ) + { + if( !pin ) continue; + pin->setLabelColor( labelColor ); + } + Circuit::self()->update(); +} + +void SubPackage::slotSave() +{ + QDir pdir = QFileInfo( Circuit::self()->getFileName() ).absoluteDir(); + QString pkgeFile = pdir.absoluteFilePath( m_pkgeFile ); + + //qDebug() << "SubPackage::slotSave"<getLabelText(); + QString id = pin->pinId().split( "-" ).last().replace( " ", "" ); + QString paPin = QString::number( pP ); + + QString pos = ""; + if ( side == "left" ) pos = QString::number( (int)pin->y()/8 ); + else if( side == "bottom" ) pos = QString::number( (int)pin->x()/8 ); + else if( side == "right" ) pos = QString::number( (int)pin->y()/8 ); + else if( side == "top" ) pos = QString::number( (int)pin->x()/8 ); + + QString type = ""; + if( pin->inverted() ) + { + type = "inverted"; + //if( !id.startsWith( "!" ) ) id = "!"+id; + } + else if( pin->unused() ) type = "unused"; + + return " \n"; + //pP++; +} + +void SubPackage::loadPackage() +{ + const QString dir = m_lastPkg; + QString fileName = QFileDialog::getOpenFileName( 0l, tr("Load Package File"), dir, + tr("Packages (*.package);;All files (*.*)")); + + if (fileName.isEmpty()) return; // User cancels loading + + setPackage( fileName ); + + qSort( m_rigPin.begin(), m_rigPin.end(), lessPinY ); + qSort( m_topPin.begin(), m_topPin.end(), lessPinX ); + qSort( m_lefPin.begin(), m_lefPin.end(), lessPinY ); + qSort( m_botPin.begin(), m_botPin.end(), lessPinX ); + + QDir pdir = QFileInfo( Circuit::self()->getFileName() ).absoluteDir(); + m_pkgeFile = pdir.relativeFilePath( fileName ); + m_lastPkg = fileName; + + Circuit::self()->saveState(); + Circuit::self()->update(); +} + +void SubPackage::savePackage( QString fileName ) +{ + //qDebug() <<"SubPackage::savePackage fileName"<< fileName; + if( !fileName.endsWith(".package") ) fileName.append(".package"); + + QFile file( fileName ); + + if( !file.open(QFile::WriteOnly | QFile::Text) ) + { + QMessageBox::warning(0l, "Circuit::saveCircuit", + tr("Cannot write file %1:\n%2.").arg(fileName).arg(file.errorString())); + return; + } + QTextStream out(&file); + out.setCodec("UTF-8"); + + QApplication::setOverrideCursor(Qt::WaitCursor); + + QString name = m_id.split("-").first(); + int pins = m_topPin.size()+m_botPin.size()+m_lefPin.size()+m_rigPin.size(); + + out << "\n\n"; + out << "\n\n"; + out << "\n\n"; + + int pP = 1; + for( Pin* pin : m_lefPin ) + { + out << pinEntry( pin, pP, "left" ); + pP++; + } + out << " \n"; + for( Pin* pin : m_botPin ) + { + out << pinEntry( pin, pP, "bottom" ); + pP++; + } + out << " \n"; + for( Pin* pin : m_rigPin ) + { + out << pinEntry( pin, pP, "right" ); + pP++; + } + out << " \n"; + for( Pin* pin : m_topPin ) + { + out << pinEntry( pin, pP, "top" ); + pP++; + } + out << " \n"; + out << "\n"; + + file.close(); + QApplication::restoreOverrideCursor(); + + QDir dir = QFileInfo( Circuit::self()->getFileName() ).absoluteDir(); + + m_pkgeFile = dir.relativeFilePath( fileName ); + m_lastPkg = fileName; + m_changed = false; +} + +void SubPackage::paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ) +{ + Chip::paint( p, option, widget ); + + if( m_fakePin ) + { + QPen pen = p->pen(); + pen.setWidth( 2 ); + pen.setColor( Qt::gray ); + p->setPen(pen); + p->drawLine( m_p1X, m_p1Y, m_p2X, m_p2Y); + } +} + + +//_____________________________________________________________ +//_____________________________________________________________ + + +EditDialog::EditDialog( SubPackage* pack, Pin* eventPin, QWidget* parent ) + : QDialog( parent ) +{ + m_package = pack; + + m_nameLabel = new QLabel( tr("Pin Name:") ); + m_nameLineEdit = new QLineEdit; + m_nameLineEdit->setText( eventPin->getLabelText() ); + m_nameLabel->setBuddy( m_nameLineEdit ); + QHBoxLayout* nameLayout = new QHBoxLayout; + nameLayout->addWidget( m_nameLabel ); + nameLayout->addWidget( m_nameLineEdit ); + + m_idLabel = new QLabel( tr("Pin Id:") ); + m_idLineEdit = new QLineEdit; + m_idLineEdit->setText( eventPin->pinId().split( "-" ).last() ); + m_idLabel->setBuddy( m_idLineEdit ); + QHBoxLayout* idLayout = new QHBoxLayout; + idLayout->addWidget( m_idLabel ); + idLayout->addWidget( m_idLineEdit ); + + m_invertCheckBox = new QCheckBox(tr("Invert Pin")); + m_invertCheckBox->setChecked( eventPin->inverted() ); + m_unuseCheckBox = new QCheckBox(tr("Unused Pin")); + m_unuseCheckBox->setChecked( eventPin->unused() ); + + QDialogButtonBox* bb = new QDialogButtonBox( QDialogButtonBox::Ok ); + QPushButton* okBtn = bb->button( QDialogButtonBox::Ok ); + okBtn->setAutoDefault( true ); + okBtn->setDefault( true ); + + QVBoxLayout* layout = new QVBoxLayout; + layout->addLayout( nameLayout ); + layout->addLayout( idLayout ); + layout->addWidget( m_invertCheckBox ); + layout->addWidget( m_unuseCheckBox ); + layout->addWidget( bb ); + + setLayout( layout ); + setWindowTitle( tr("Edit Pin ")+eventPin->getLabelText() ); + + connect( bb, SIGNAL(accepted()), this, SLOT(accept())); + + connect( m_invertCheckBox, SIGNAL( toggled( bool ) ), + this, SLOT( invertPin( bool ) ) ); + + connect( m_unuseCheckBox, SIGNAL( toggled( bool ) ), + pack, SLOT( unusePin( bool ) ) ); + + connect( m_nameLineEdit, SIGNAL( textEdited( QString ) ), + pack, SLOT( setPinName( QString ) ) ); + + connect( m_idLineEdit, SIGNAL( textChanged( QString ) ), + pack, SLOT( setPinId( QString ) ) ); +} + +void EditDialog::invertPin( bool invert ) +{ + QString id = m_idLineEdit->text(); + if( invert && !id.startsWith("!") ) id.prepend("!"); + else if( !invert && id.startsWith("!") ) id.remove( 0, 1 ); + + m_idLineEdit->setText( id ); + m_package->invertPin( invert ); +} + +#include "moc_subpackage.cpp" diff --git a/src/gui/circuitwidget/subpackage.h b/src/gui/circuitwidget/subpackage.h new file mode 100644 index 0000000..26ef10d --- /dev/null +++ b/src/gui/circuitwidget/subpackage.h @@ -0,0 +1,123 @@ +/*************************************************************************** + * Copyright (C) 2019 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#ifndef SUBPACKAGE_H +#define SUBPACKAGE_H + +#include "chip.h" + +class LibraryItem; + +class MAINMODULE_EXPORT SubPackage : public Chip +{ + Q_OBJECT + Q_PROPERTY( QString Package_File READ package WRITE setPackage DESIGNABLE true USER true ) + Q_PROPERTY( int Width READ width WRITE setWidth DESIGNABLE true USER true ) + Q_PROPERTY( int Height READ height WRITE setHeight DESIGNABLE true USER true ) + + public: + + SubPackage( QObject* parent, QString type, QString id ); + ~SubPackage(); + + static Component* construct( QObject* parent, QString type, QString id ); + static LibraryItem *libraryItem(); + + int width(); + void setWidth( int width ); + + int height(); + void setHeight( int height ); + + QString package(); + void setPackage( QString package ); + + virtual void setLogicSymbol( bool ls ); + + void savePackage( QString fileName ); + + virtual void paint( QPainter* p, const QStyleOptionGraphicsItem* option, QWidget* widget ); + + public slots: + virtual void remove(); + void contextMenu( QGraphicsSceneContextMenuEvent* event, QMenu* menu ); + void invertPin( bool invert ); + void setPinId( QString id ); + void setPinName( QString name ); + + private slots: + void loadPackage(); + void movePin(); + void editPin(); + void deletePin(); + void unusePin( bool unuse ); + void slotSave(); + void editFinished( int r ); + + + protected: + void mousePressEvent( QGraphicsSceneMouseEvent* event ); + void mouseMoveEvent( QGraphicsSceneMouseEvent* event ); + void hoverMoveEvent( QGraphicsSceneHoverEvent* event ) ; + void hoverLeaveEvent( QGraphicsSceneHoverEvent* event ); + + virtual void contextMenuEvent( QGraphicsSceneContextMenuEvent* event ); + + private: + QString pinEntry( Pin* pin, int pP, QString side ); + + static QString m_lastPkg; + + bool m_changed; + bool m_movePin; + bool m_fakePin; // Data for drawing pin when hovering + + int m_angle; + int m_p1X; + int m_p1Y; + int m_p2X; + int m_p2Y; + + Pin* m_eventPin; +}; + +class EditDialog : public QDialog +{ + Q_OBJECT + +public: + EditDialog( SubPackage* pack, Pin* eventPin, QWidget* parent = 0 ); + +private slots: + void invertPin( bool invert ); + +private: + SubPackage* m_package; + + QLabel* m_nameLabel; + QLineEdit* m_nameLineEdit; + + QLabel* m_idLabel; + QLineEdit* m_idLineEdit; + + QCheckBox* m_invertCheckBox; + QCheckBox* m_unuseCheckBox; +}; + +#endif diff --git a/src/gui/componentselector/componentselector.cpp b/src/gui/componentselector/componentselector.cpp new file mode 100644 index 0000000..96732ac --- /dev/null +++ b/src/gui/componentselector/componentselector.cpp @@ -0,0 +1,451 @@ +/*************************************************************************** + * Copyright (C) 2012 by santiago González * + * santigoro@gmail.com * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 3 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, see . * + * * + ***************************************************************************/ + +#include + +#include "componentselector.h" +#include "mainwindow.h" +#include "simuapi_apppath.h" + +ComponentSelector* ComponentSelector::m_pSelf = 0l; + +ComponentSelector::ComponentSelector( QWidget* parent ) + : QTreeWidget( parent ) + , m_pluginsdDialog( this ) + , m_itemLibrary() +{ + m_pSelf = this; + + m_pluginsdDialog.setVisible( false ); + + setDragEnabled(true); + setDragDropMode( QAbstractItemView::DragOnly ); + //setAlternatingRowColors(true); + setIndentation( 12 ); + setRootIsDecorated( true ); + setCursor( Qt::OpenHandCursor ); + headerItem()->setHidden( true ); + setIconSize( QSize( 32, 24)); + + //QWhatsThis::add( this, QString::fromUtf8( gettext("Drag a Component and drop it into the Circuit." ) ) ); + + LoadLibraryItems(); + //LoadCompSet(); + + setContextMenuPolicy( Qt::CustomContextMenu ); + + connect( this, SIGNAL(customContextMenuRequested(const QPoint&)), + this, SLOT (slotContextMenu(const QPoint&))); + + connect( this, SIGNAL(itemPressed(QTreeWidgetItem*, int)), + this, SLOT (slotItemClicked(QTreeWidgetItem*, int)) ); +} +ComponentSelector::~ComponentSelector() +{ +} + +void ComponentSelector::LoadLibraryItems() +{ + QList itemList = m_itemLibrary.items(); + + foreach( LibraryItem* libItem, itemList ) + { + this->addItem( libItem ); + } +} + +/*void ComponentSelector::LoadCompSet() +{ + QDir compSetDir = SIMUAPI_AppPath::self()->RODataFolder(); + + if( compSetDir.exists() ) LoadCompSetAt( compSetDir ); +}*/ + +void ComponentSelector::LoadCompSetAt( QDir compSetDir ) +{ + compSetDir.setNameFilters( QStringList( "*.xml" ) ); + + QStringList xmlList = compSetDir.entryList( QDir::Files ); + + if( xmlList.isEmpty() ) return; // No comp sets to load + + qDebug() << "\n" << tr(" Loading Component sets at:")<< "\n" << compSetDir.absolutePath()<<"\n"; + + foreach( QString compSetName, xmlList ) + { + QString compSetFilePath = compSetDir.absoluteFilePath( compSetName ); + + if( !compSetFilePath.isEmpty( )) loadXml( compSetFilePath ); + } + qDebug() << "\n"; +} + +void ComponentSelector::loadXml( const QString &setFile ) +{ + QFile file( setFile ); + if( !file.open(QFile::ReadOnly | QFile::Text) ) + { + QMessageBox::warning(0, "ComponentSelector::loadXml", tr("Cannot read file %1:\n%2.").arg(setFile).arg(file.errorString())); + return; + } + QDomDocument domDoc; + if( !domDoc.setContent(&file) ) + { + QMessageBox::warning(0, "ComponentSelector::loadXml", tr("Cannot set file %1\nto DomDocument").arg(setFile)); + file.close(); + return; + } + file.close(); + + QDomElement root = domDoc.documentElement(); + QDomNode rNode = root.firstChild(); + + while( !rNode.isNull() ) + { + QDomElement element = rNode.toElement(); + QDomNode node = element.firstChild(); + + QString category = element.attribute( "category" ); + //const char* charCat = category.toUtf8().data(); + std::string stdCat = category.toStdString(); + const char* charCat = &(stdCat[0]); + category = QApplication::translate( "xmlfile", charCat ); + //qDebug()<<"category = " <applicationDirPath() ); + compSetDir.cd( "../share/simulide/data/images" ); + icon = compSetDir.absoluteFilePath( element.attribute("icon") ); + } + QString name = element.attribute( "name" ); + + m_xmlFileList[ name ] = setFile; // Save xml File used to create this item + + if( element.hasAttribute("info") ) name += "???"+element.attribute( "info" ); + + addItem( name, category, icon, type ); + + node = node.nextSibling(); + } + } + rNode = rNode.nextSibling(); + } + QString compSetName = setFile.split( "/").last(); + + qDebug() << tr(" Loaded Component set: ") << compSetName; + + m_compSetUnique.append( compSetName ); +} + +QString ComponentSelector::getXmlFile( QString compName ) +{ + return m_xmlFileList[ compName ]; +} + +void ComponentSelector::addLibraryItem( LibraryItem* libItem ) // Used By Plugins +{ + m_itemLibrary.addItem( libItem ); + this->addItem( libItem ); +} + +void ComponentSelector::addItem( LibraryItem* libItem ) +{ + QString category = libItem->category(); + if( category != "") + { + QString icon = ":/"+libItem->iconfile(); + addItem( libItem->name(), category, icon, libItem->type() ); + } +} + +void ComponentSelector::addItem( const QString &caption, const QString &_category, const QString &icon, const QString &type ) +{ + QStringList nameFull = caption.split( "???" ); + QString name = nameFull.first(); + QString info = ""; + if( nameFull.size() > 1 ) info = nameFull.last(); + + //qDebug()<