From e53e46b323cc70b72b2ad94b00ae66a6d98a98aa Mon Sep 17 00:00:00 2001
From: TimRudy <3942818+TimRudy@users.noreply.github.com>
Date: Sun, 4 Oct 2020 21:42:21 -0400
Subject: [PATCH] Update README.md

---
 README.md               |  2 +-
 docs/technical-notes.md | 15 +++++++++++++++
 2 files changed, 16 insertions(+), 1 deletion(-)
 create mode 100644 docs/technical-notes.md

diff --git a/README.md b/README.md
index 3149acd..09e6661 100644
--- a/README.md
+++ b/README.md
@@ -150,7 +150,7 @@ Are you planning to populate your components onto a custom PCB (Printed Circuit
 
 You have a head start from simulating and testing your design, because now you know you have a digital circuit that meets all its specs.
 
-However, it's a different workflow area that you'll have to get into to create a PCB: A different type of visual editing ("schematic capture"); placing, routing and design of layout for manufacture; verification of design rules for manufacture - this time for geometric/electrical properties.
+However, it's a different workflow area that you'll have to get into to create a PCB: A different type of visual editing ("schematic capture"); placing, routing and design of layout for manufacture; verification of design rules for manufacture (this time for geometric/electrical properties).
 
 Note: Having said that, using 74xx standard parts will set you up well for using PCB software, since the parts are well-known and modelled for geometric/electrical properties.
 
diff --git a/docs/technical-notes.md b/docs/technical-notes.md
new file mode 100644
index 0000000..c8723d3
--- /dev/null
+++ b/docs/technical-notes.md
@@ -0,0 +1,15 @@
+## Technical Notes
+
+```
+Under construction...
+```
+
+- Floating inputs
+
+- Open Collector (OC) outputs
+
+- 7474, 74112: Meaning of the `NonFPGACycleAccurateModels` branch, the async/sync behaviour change of devices due to FPGA constraint: "There is no hardware primitive for two async signals together, set and clear"
+
+- 7485
+
+- 74181