The out_match is not right

[MJChku]

Could you provide a working example or a command ? I tried to generate simple regex "ab" with test "ab", the out_match has no data after out_valid.

[jvanstraten]

I'm not sure what you mean by "the out_match has no data after out_valid." If you were expecting vhdre to tell you where the match was or report back exactly which bytes/characters matched then I'm afraid I'll have to disappoint you: the generated architecture fundamentally can't do that. Among other things, you'd need to be able to buffer the incoming string somehow to do that, which becomes very complicated very fast on an FPGA and therefore would cost a lot of area and performance.

I'm sure there are (commercially licensed) IP cores that can do it, but they will require much more area than vhdre and will probably run at a lower clock frequency. IMO, if you need match information beyond yes/no, it's probably more cost-efficient to just use a CPU implementation (but of course it depends on the use case). You could still use vhdre in combination with such a software implementation as a pre-filtering step, such that the software implementation only checks strings that are already known to match the regex. You'd probably need some application-specific buffering logic outside of vhdre to align the string stream with the match output and discard the unmatched strings, but it could be done.

Just to be sure, this is what I did to implement your example (and to refresh my memory; it's been almost two years since I last looked at this project):

#                 .-- Entity name
#                 |   .-- Regular expression to match
#                 |   |     .-- String to test
#                _v__ v_    v_
python3 -m vhdre test ab -- ab

I'm running Linux and have no simulator licenses available to me right now, so I have to resort to ghdl + gtkwave, but obviously the simulation software shouldn't matter;

#    .-- Driver tool to launch ghdl+gtkwave easily (can also do questasim)
#    |          .-- Get it to recognize the test_tb entity as a testbench
#    |          |       .-- Open waveform in GUI
#____v_____ ____v____ __v__
vhdeps ghdl -p '*_tb' --gui

You can ignore the "test suite failed" if you're following along with simulating the model this way; it's just because vhdeps expects testbenches to terminate automatically, and the generated testbench isn't smart enough to do that. It should open gtkwave regardless, which after some messing around with adding signals and finding the right timestamp should give you something like this:

The two cycles with in_valid high are the a and b that form the test string, the second transfer having in_last asserted to indicate that it is the end of the string. A couple cycles after in_valid and in_last are asserted out_valid will be asserted, along with the match result. There was no UTF-8 decode error so out_error is low, and the first and only regular expression matched so out_match(0) is high.

[MJChku]

Thanks !! I get what you are saying, sorry I thought out_match(0) will give me the exact matched sub-sequence. I've seen the same waveform. And whether there is a match or not is enough for my project (I only want to know the latency of such a hardware implemented regex engine).