feature: Add delay and barrier for circuits #993

Manvi-Agrawal · 2024-06-05T03:57:02Z

Issue , if available:

Fixes #974

Testing done:

Unit test coverage is 100%.
Running this code produces this QASM code

from braket.circuits import Circuit
circ = Circuit().barrier([0, 1, 2])
print(circ.to_ir("OPENQASM").source)

OUTPUT

OPENQASM 3.0;
bit[3] b;
qubit[3] q;
barrier q[0], q[1], q[2];
b[0] = measure q[0];
b[1] = measure q[1];
b[2] = measure q[2];

from braket.circuits import Circuit

circ = Circuit().delay([0, 1, 2], 30)

print(circ.to_ir("OPENQASM").source)

OUTPUT

OPENQASM 3.0;
bit[3] b;
qubit[3] q;
delay[30 s] q[0], q[1], q[2];
b[0] = measure q[0];
b[1] = measure q[1];
b[2] = measure q[2];

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I have updated any necessary documentation, including READMEs and API docs (if appropriate)

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test/unit_tests/braket/circuits/test_gates.py

rmshaffer

A few comments - also it looks like the unit tests are currently failing in CI, could you take a look and resolve this? Thank you!

src/braket/circuits/gates.py

test/unit_tests/braket/circuits/test_gates.py

src/braket/circuits/gates.py

test/unit_tests/braket/circuits/test_gates.py

Co-authored-by: Ryan Shaffer <[email protected]>

test/unit_tests/braket/circuits/test_gates.py

jcjaskula-aws

Good start. left comments throughout the code. Feel free to ask any question if it does not make sense and give your opinion about the brainstorming parts (don't resolve them though, I'd like other Braket members to think about them).

src/braket/circuits/gates.py

jcjaskula-aws · 2024-06-05T18:56:26Z

src/braket/circuits/gates.py

@@ -3847,6 +3847,77 @@ def pulse_gate(
 Gate.register_gate(PulseGate)


+class Barrier(Gate):


I'm not sold yet on whether it should be a Gate or something else like a CompilerDirective.

@jcjaskula-aws , @rmshaffer , did you get a chance to brainstorm if its okay to proceed with Barrier as a Gate?

I agree with @jcjaskula-aws - I think CompilerDirective makes the most sense here, since these are not instructions which directly affect the state of the qubits.

@Manvi-Agrawal were you able to try converting this to be a CompilerDirective instead of a Gate? Please let us know if you hit any issues with this.

src/braket/circuits/gates.py

test/unit_tests/braket/circuits/test_gates.py

jcjaskula-aws · 2024-06-05T19:42:42Z

test/unit_tests/braket/circuits/test_gates.py

-    matrices.append(gate.to_matrix())
-    identity = np.eye(2**gate.qubit_count)
-    assert np.allclose(functools.reduce(lambda a, b: a @ b, matrices), identity)
+    if NoMatrixGeneration not in irsubclasses:


This makes me think that we need to check if it works (or at least returns an understandable error message) with simulators.

test/unit_tests/braket/circuits/test_gates.py

Manvi-Agrawal · 2024-06-05T20:38:56Z

unit tests are currently failing in CI,

Fixed. that was because I renamed a class using refactor->rename but in test framework we need to provide value as strings too.

Co-authored-by: Jean-Christophe Jaskula <[email protected]>

…/amazon-braket-sdk-python into hack/delay-barrier

codecov · 2024-06-10T15:11:58Z

Codecov Report

All modified and coverable lines are covered by tests ✅

Project coverage is 100.00%. Comparing base (90f9395) to head (ebc96f0).
Report is 1 commits behind head on feature/delay-barrier-instructions.

Additional details and impacted files

@@                         Coverage Diff                          @@
##           feature/delay-barrier-instructions      #993   +/-   ##
====================================================================
  Coverage                              100.00%   100.00%           
====================================================================
  Files                                     135       136    +1     
  Lines                                    8949      9038   +89     
  Branches                                 2011      2029   +18     
====================================================================
+ Hits                                     8949      9038   +89

☔ View full report in Codecov by Sentry.
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rmshaffer · 2024-06-13T18:57:05Z

src/braket/circuits/duration_gate.py

+class DurationGate(Gate, Parameterizable):
+    """Class `DurationGate` represents a quantum gate that operates on N qubits and a duration."""


Just a note, there is quite a bit of duplication between this DurationGate class and the existing AngledGate class. Did you consider refactoring to make a common base class for instructions with a single float parameter? I guess this would also ideally extend to the DoubleAngledGate and TripleAngledGate classes - so maybe outside the scope of this PR and could be tracked by a separate issue.

rmshaffer · 2024-06-13T18:58:23Z

src/braket/circuits/gates.py

@@ -3847,6 +3847,77 @@ def pulse_gate(
 Gate.register_gate(PulseGate)


+class Barrier(Gate):


@Manvi-Agrawal were you able to try converting this to be a CompilerDirective instead of a Gate? Please let us know if you hit any issues with this.

rmshaffer · 2024-06-17T16:06:28Z

Hi @Manvi-Agrawal - we still have 2 days to wrap up unitaryHACK PRs and get them merged. Are you going to be able to address the open comments on this PR? Please let us know so that we know how to proceed with this. Thank you!

Manvi-Agrawal · 2024-06-17T17:11:30Z

Hi @rmshaffer , actually I wouldnt be able to get to this issue until a couple of weeks due to personal commitments. I am happy to take a look at the open comments after that, even if it doesn't count as progress towards Unitary Hack, if it's not a time pressing issue.

Thank you for all your help with this issue and review so far. Past week had been a bit crazy due to finals and other stuff for quarter wrap up.

rmshaffer · 2024-06-17T21:33:35Z

@Manvi-Agrawal thank you for all of your work on this PR! We are going to merge the PR into a feature branch and close the unitaryHACK issue to ensure that you get credit for your work. We will then open a new PR to finish the remaining work for merging to main.

Feature: Add delay and barrier for circuits

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Manvi-Agrawal requested a review from a team as a code owner June 5, 2024 03:57

Manvi-Agrawal changed the title ~~Feature: Add delay and barrier for circuits~~ [Unitary-Hack] Feature: Add delay and barrier for circuits Jun 5, 2024

Manvi-Agrawal mentioned this pull request Jun 5, 2024

[UnitaryHack]Barrier and Delays #980

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Manvi-Agrawal added 2 commits June 4, 2024 21:08

doc: Add documentation for delay and barriers

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fix: update hash function

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Manvi-Agrawal commented Jun 5, 2024

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rename

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fix: whitespace fix

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Apply suggestions from code review

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Co-authored-by: Ryan Shaffer <[email protected]>

Address PR comments

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View reviewed changes

test/unit_tests/braket/circuits/test_gates.py Outdated Show resolved Hide resolved

Update test/unit_tests/braket/circuits/test_gates.py

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Manvi-Agrawal changed the title ~~[Unitary-Hack] Feature: Add delay and barrier for circuits~~ Feature: Add delay and barrier for circuits Jun 5, 2024

rmshaffer changed the title ~~Feature: Add delay and barrier for circuits~~ feature: Add delay and barrier for circuits Jun 5, 2024

jcjaskula-aws requested changes Jun 5, 2024

View reviewed changes

Manvi-Agrawal added 2 commits June 5, 2024 13:02

fix: update failing tests

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Change duration

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Manvi-Agrawal and others added 5 commits June 5, 2024 14:31

change: add unit tests as per PR feedback

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Apply suggestions from code review

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Co-authored-by: Jean-Christophe Jaskula <[email protected]>

Addressing pr feedback

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Merge branch 'hack/delay-barrier' of https://github.com/Manvi-Agrawal…

24946be

…/amazon-braket-sdk-python into hack/delay-barrier

pr feedback: new function

ef44828

Manvi-Agrawal mentioned this pull request Jun 6, 2024

Consider allowing gates to be called with an empty list of target qubits #996

Open

fix: update int as param in delay and barrier

d8ece2e

Manvi-Agrawal mentioned this pull request Jun 6, 2024

Unitary doesnt accept int param for single qubit unitary matrix #997

Closed

Manvi-Agrawal added 2 commits June 6, 2024 02:54

fix: duration accepts FreeParameter expression

d7887e5

fix: fix lint errors

6689001

Manvi-Agrawal and others added 12 commits June 6, 2024 16:17

feat: Support SI units, write ascii tests, etc

8538e1e

fix: lint errors

c44e576

change: Add tests for IR generation of FreeParameter delay.

57a42c1

add tests for ASCII and circuit visualization

2752a5e

change: add tests for DurationGate

eb5af0b

lint fix

a5745a4

chore: Add more tests

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fix: failing test

79945c3

revert

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Rearrande tests and minor edit

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Pr feedback and cleanup

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Merge branch 'main' into hack/delay-barrier

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rmshaffer mentioned this pull request Jun 11, 2024

Handle noisy simulators for Delay gate #998

Open

rmshaffer requested changes Jun 13, 2024

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Merge branch 'main' into hack/delay-barrier

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Merge branch 'main' into hack/delay-barrier

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rmshaffer changed the base branch from main to feature/delay-barrier-instructions June 17, 2024 21:28

rmshaffer merged commit b1c414a into amazon-braket:feature/delay-barrier-instructions Jun 17, 2024
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feature: Add delay and barrier for circuits #1002

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Manvi-Agrawal commented Jun 17, 2024

rmshaffer commented Jun 17, 2024

		@@ -3847,6 +3847,77 @@ def pulse_gate(
		Gate.register_gate(PulseGate)


		class Barrier(Gate):

		class DurationGate(Gate, Parameterizable):
		"""Class `DurationGate` represents a quantum gate that operates on N qubits and a duration."""

feature: Add delay and barrier for circuits #993

feature: Add delay and barrier for circuits #993

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Manvi-Agrawal commented Jun 5, 2024 • edited Loading

Issue , if available:

Testing done:

OUTPUT

OUTPUT

Merge Checklist

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Tests

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