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ad_dds_cordic: Move the shifting operation
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Perform the shifting operation before addition/subtraction in a
rotation stage. In the previous method, the result of the arithmetic
operation was shifted and the outcome was presented to the next stage.
In this way, data connections will be reduced between pipeline stages
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AndreiGrozav committed Jul 18, 2018
1 parent a96d9bd commit c617302
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Showing 2 changed files with 21 additions and 31 deletions.
24 changes: 11 additions & 13 deletions library/common/ad_dds_cordic_pipe.v
Original file line number Diff line number Diff line change
Expand Up @@ -53,14 +53,10 @@ module ad_dds_cordic_pipe#(
(* keep = "TRUE" *) input [ DW-1:0] dataa_x,
(* keep = "TRUE" *) input [ DW-1:0] dataa_y,
(* keep = "TRUE" *) input [ DW-1:0] dataa_z,
(* keep = "TRUE" *) input [ DW-1:0] datab_x,
(* keep = "TRUE" *) input [ DW-1:0] datab_y,
(* keep = "TRUE" *) input [ DW-1:0] datab_z,
(* keep = "TRUE" *) output reg [ DW-1:0] result_x,
(* keep = "TRUE" *) output reg [ DW-1:0] result_y,
(* keep = "TRUE" *) output reg [ DW-1:0] result_z,
output signed [ DW-1:0] sgn_shift_x,
output signed [ DW-1:0] sgn_shift_y,
input [DELAY_DW:1] data_delay_in,
output [DELAY_DW:1] data_delay_out);

Expand All @@ -70,21 +66,23 @@ module ad_dds_cordic_pipe#(

// Wires Declarations

wire dir_inv = ~dir;
wire [ DW-1:0] sgn_shift_x;
wire [ DW-1:0] sgn_shift_y;
wire dir_inv = ~dir;

// Previous stage shift

assign sgn_shift_x = {{SHIFT{dataa_x[DW-1]}}, dataa_x[DW-1:SHIFT]};
assign sgn_shift_y = {{SHIFT{dataa_y[DW-1]}}, dataa_y[DW-1:SHIFT]};

// Stage rotation

always @(posedge clk) begin
result_x <= dataa_x + ({DW{dir_inv}} ^ datab_y) + dir_inv;
result_y <= dataa_y + ({DW{dir}} ^ datab_x) + dir;
result_z <= dataa_z + ({DW{dir_inv}} ^ datab_z) + dir_inv;
result_x <= dataa_x + ({DW{dir_inv}} ^ sgn_shift_y) + dir_inv;
result_y <= dataa_y + ({DW{dir}} ^ sgn_shift_x) + dir;
result_z <= dataa_z + ({DW{dir_inv}} ^ datab_z) + dir_inv;
end

// Stage shift

assign sgn_shift_x = {{SHIFT{result_x[DW-1]}}, result_x[DW-1:SHIFT]};
assign sgn_shift_y = {{SHIFT{result_y[DW-1]}}, result_y[DW-1:SHIFT]};

// Delay data (if used)

generate
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28 changes: 10 additions & 18 deletions library/common/ad_dds_sine_cordic.v
Original file line number Diff line number Diff line change
Expand Up @@ -61,21 +61,19 @@ module ad_dds_sine_cordic #(

// Registers Declarations

reg signed [CORDIC_DW-1:0] x0 = 'd0;
reg signed [CORDIC_DW-1:0] y0 = 'd0;
reg signed [CORDIC_DW-1:0] z0 = 'd0;
reg [CORDIC_DW-1:0] x0 = 'd0;
reg [CORDIC_DW-1:0] y0 = 'd0;
reg [CORDIC_DW-1:0] z0 = 'd0;

// Wires Declarations

wire [CORDIC_DW-1:0] x_value;
wire signed [CORDIC_DW-1:0] x_s [0:CORDIC_DW-1];
wire signed [CORDIC_DW-1:0] y_s [0:CORDIC_DW-1];
wire signed [CORDIC_DW-1:0] z_s [0:CORDIC_DW-1];
wire signed [CORDIC_DW-1:0] x_shr_s [0:CORDIC_DW-1];
wire signed [CORDIC_DW-1:0] y_shr_s [0:CORDIC_DW-1];
wire [ DELAY_DW-1:0] data_in_d [0:CORDIC_DW-1];
wire [CORDIC_DW-1:0] atan_table[0:CORDIC_DW-2];
wire [ 1:0] quadrant;
wire [CORDIC_DW-1:0] x_value;
wire [CORDIC_DW-1:0] x_s [0:CORDIC_DW-1];
wire [CORDIC_DW-1:0] y_s [0:CORDIC_DW-1];
wire [CORDIC_DW-1:0] z_s [0:CORDIC_DW-1];
wire [ DELAY_DW-1:0] data_in_d [0:CORDIC_DW-1];
wire [CORDIC_DW-1:0] atan_table[0:CORDIC_DW-2];
wire [ 1:0] quadrant;

// arc tangent LUT

Expand Down Expand Up @@ -186,8 +184,6 @@ module ad_dds_sine_cordic #(
assign x_s[0] = x0;
assign y_s[0] = y0;
assign z_s[0] = z0;
assign x_shr_s[0] = x0;
assign y_shr_s[0] = y0;
assign data_in_d[0] = ddata_in;

// cordic pipeline
Expand All @@ -205,15 +201,11 @@ module ad_dds_sine_cordic #(
.dataa_x (x_s[i]),
.dataa_y (y_s[i]),
.dataa_z (z_s[i]),
.datab_x (x_shr_s[i]),
.datab_y (y_shr_s[i]),
.datab_z (atan_table[i]),
.dir (z_s[i][CORDIC_DW-1]),
.result_x (x_s[i+1]),
.result_y (y_s[i+1]),
.result_z (z_s[i+1]),
.sgn_shift_x (x_shr_s[i+1]),
.sgn_shift_y (y_shr_s[i+1]),
.data_delay_in (data_in_d[i]),
.data_delay_out (data_in_d[i+1])
);
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