From 301861bb4275d382ecb2375b86d4d129014de690 Mon Sep 17 00:00:00 2001 From: Alexandru Ardelean Date: Mon, 25 Nov 2019 15:19:59 +0200 Subject: [PATCH] arch: arm64: update all AXI DMAC int-types Similarly as for Zynq, the AXI DMAC interrupt types need to be updated to IRQ_TYPE_LEVEL_HIGH. This change does that. Signed-off-by: Alexandru Ardelean --- arch/arm64/boot/dts/xilinx/zynqmp-adrv9009-zu11eg-reva.dts | 6 +++--- .../boot/dts/xilinx/zynqmp-zcu102-rev10-ad9172-fmc-ebz.dts | 2 +- .../boot/dts/xilinx/zynqmp-zcu102-rev10-ad9208-hmc7044.dts | 2 +- arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9208.dts | 2 +- .../dts/xilinx/zynqmp-zcu102-rev10-ad9361-fmcomms2-3.dts | 4 ++-- .../boot/dts/xilinx/zynqmp-zcu102-rev10-ad9361-fmcomms5.dts | 4 ++-- .../boot/dts/xilinx/zynqmp-zcu102-rev10-ad9364-fmcomms4.dts | 4 ++-- .../boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9008-1.dts | 2 +- .../boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9008-2.dts | 4 ++-- arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9009.dts | 6 +++--- arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9371.dts | 6 +++--- arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-fmcdaq2.dts | 4 ++-- arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-fmcdaq3.dts | 4 ++-- .../dts/xilinx/zynqmp-zcu102-revB-ad9361-fmcomms2-3.dts | 4 ++-- .../boot/dts/xilinx/zynqmp-zcu102-revB-ad9364-fmcomms4.dts | 4 ++-- 15 files changed, 29 insertions(+), 29 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-adrv9009-zu11eg-reva.dts b/arch/arm64/boot/dts/xilinx/zynqmp-adrv9009-zu11eg-reva.dts index cad3c65bbde782..abbd0ac6f33f4f 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-adrv9009-zu11eg-reva.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-adrv9009-zu11eg-reva.dts @@ -1291,7 +1291,7 @@ reg = <0x0 0x9c420000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 106 0>; + interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 73>; adi,channels { @@ -1313,7 +1313,7 @@ reg = <0x0 0x9c440000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 104 0>; + interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 73>; adi,channels { @@ -1335,7 +1335,7 @@ reg = <0x0 0x9c400000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 105 0>; + interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 73>; adi,channels { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9172-fmc-ebz.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9172-fmc-ebz.dts index b1bf4db9607254..0d5b8d14fdb5e2 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9172-fmc-ebz.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9172-fmc-ebz.dts @@ -41,7 +41,7 @@ #dma-cells = <1>; compatible = "adi,axi-dmac-1.00.a"; reg = <0x9c420000 0x10000>; - interrupts = <0 108 0>; + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 71>; adi,channels { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9208-hmc7044.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9208-hmc7044.dts index 049229476587e6..7283141b6b15d2 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9208-hmc7044.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9208-hmc7044.dts @@ -46,7 +46,7 @@ #dma-cells = <1>; compatible = "adi,axi-dmac-1.00.a"; reg = <0x9c420000 0x10000>; - interrupts = <0 109 0>; + interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 71>; adi,channels { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9208.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9208.dts index 2c4768fe641a7a..f563a7231b38a9 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9208.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9208.dts @@ -51,7 +51,7 @@ #dma-cells = <1>; compatible = "adi,axi-dmac-1.00.a"; reg = <0x9c420000 0x10000>; - interrupts = <0 109 0>; + interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 71>; adi,channels { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9361-fmcomms2-3.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9361-fmcomms2-3.dts index 247d20949f4666..f76a500c56d12e 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9361-fmcomms2-3.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9361-fmcomms2-3.dts @@ -43,7 +43,7 @@ reg = <0x9c400000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 109 0>; + interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 71>; adi,channels { @@ -65,7 +65,7 @@ reg = <0x9c420000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 108 0>; + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 71>; adi,channels { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9361-fmcomms5.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9361-fmcomms5.dts index 853f85d980c116..3a821cad102836 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9361-fmcomms5.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9361-fmcomms5.dts @@ -40,7 +40,7 @@ reg = <0x9c400000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 109 0>; + interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 73>; adi,channels { @@ -62,7 +62,7 @@ reg = <0x9c420000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 108 0>; + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 73>; adi,channels { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9364-fmcomms4.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9364-fmcomms4.dts index 58ab99ffa3fc92..6f687462ba8478 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9364-fmcomms4.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9364-fmcomms4.dts @@ -43,7 +43,7 @@ reg = <0x9c400000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 109 0>; + interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 71>; adi,channels { @@ -65,7 +65,7 @@ reg = <0x9c420000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 108 0>; + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 71>; adi,channels { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9008-1.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9008-1.dts index ca48f8f631ddf5..9352d9680b840b 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9008-1.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9008-1.dts @@ -41,7 +41,7 @@ reg = <0x9c400000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 109 0>; + interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 73>; adi,channels { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9008-2.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9008-2.dts index 6bc35e64e71201..afb1770046b1e1 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9008-2.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9008-2.dts @@ -41,7 +41,7 @@ reg = <0x9c440000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 107 0>; + interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 73>; adi,channels { @@ -63,7 +63,7 @@ reg = <0x9c420000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 108 0>; + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 73>; adi,channels { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9009.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9009.dts index db35ed31444cd5..34fd872335cc61 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9009.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9009.dts @@ -52,7 +52,7 @@ reg = <0x9c400000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 109 0>; + interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 73>; adi,channels { @@ -74,7 +74,7 @@ reg = <0x9c440000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 107 0>; + interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 73>; adi,channels { @@ -96,7 +96,7 @@ reg = <0x9c420000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 108 0>; + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 73>; adi,channels { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9371.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9371.dts index 2f4e5331667dba..9fc267ce390445 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9371.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9371.dts @@ -35,7 +35,7 @@ reg = <0x9c400000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 109 0>; + interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 73>; adi,channels { @@ -57,7 +57,7 @@ reg = <0x9c440000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 107 0>; + interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 73>; adi,channels { @@ -79,7 +79,7 @@ reg = <0x9c420000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 108 0>; + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 73>; adi,channels { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-fmcdaq2.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-fmcdaq2.dts index ef8ab2c1b1d5c3..b9b07f02575260 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-fmcdaq2.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-fmcdaq2.dts @@ -43,7 +43,7 @@ reg = <0x9c400000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 109 0>; + interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 71>; adi,channels { @@ -65,7 +65,7 @@ reg = <0x9c420000 0x10000>; #dma-cells = <1>; #clock-cells = <0>; - interrupts = <0 108 0>; + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 71>; adi,channels { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-fmcdaq3.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-fmcdaq3.dts index f5e00cd6b82949..feaa4989dbd051 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-fmcdaq3.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-fmcdaq3.dts @@ -42,7 +42,7 @@ #dma-cells = <1>; compatible = "adi,axi-dmac-1.00.a"; reg = <0x9c400000 0x10000>; - interrupts = <0 109 0>; + interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 71>; adi,channels { @@ -63,7 +63,7 @@ #dma-cells = <1>; compatible = "adi,axi-dmac-1.00.a"; reg = <0x9c420000 0x10000>; - interrupts = <0 108 0>; + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 71>; adi,channels { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB-ad9361-fmcomms2-3.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB-ad9361-fmcomms2-3.dts index 7b570b35cc1e9d..4eafdaafbaa3c4 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB-ad9361-fmcomms2-3.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB-ad9361-fmcomms2-3.dts @@ -42,7 +42,7 @@ compatible = "adi,axi-dmac-1.00.a"; reg = <0x9c400000 0x10000>; #dma-cells = <1>; - interrupts = <0 109 0>; + interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 71>; adi,channels { @@ -64,7 +64,7 @@ compatible = "adi,axi-dmac-1.00.a"; reg = <0x9c420000 0x10000>; #dma-cells = <1>; - interrupts = <0 108 0>; + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 71>; adi,channels { diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB-ad9364-fmcomms4.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB-ad9364-fmcomms4.dts index 4f9c458715818d..2d1619d47d2de2 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB-ad9364-fmcomms4.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revB-ad9364-fmcomms4.dts @@ -42,7 +42,7 @@ compatible = "adi,axi-dmac-1.00.a"; reg = <0x80010000 0x10000>; #dma-cells = <1>; - interrupts = <0 109 0>; + interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 71>; adi,channels { @@ -63,7 +63,7 @@ compatible = "adi,axi-dmac-1.00.a"; reg = <0x80020000 0x10000>; #dma-cells = <1>; - interrupts = <0 108 0>; + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; clocks = <&zynqmp_clk 71>; adi,channels {