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dmaengine: dma-axi-dmac: Call callback for each period
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A cyclic DMA transfer is usually used to implement ring buffers so a
callback needs to be called for each finished period in order to
inform the requester of the DMA transfer to prepare the data for
the next transfer.

If callback is called for each period the last flag is not helpful anymore
and can be removed.

Was tested using FMC-IMAGEON and FMCOMMS3 and ZED board.

Signed-off-by: Bogdan Togorean <[email protected]>
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btogorean authored and commodo committed Mar 8, 2019
1 parent a67ec6c commit 8b97db6
Showing 1 changed file with 3 additions and 4 deletions.
7 changes: 3 additions & 4 deletions drivers/dma/dma-axi-dmac.c
Original file line number Diff line number Diff line change
Expand Up @@ -98,7 +98,6 @@ struct axi_dmac_sg {
unsigned int src_stride;
unsigned int id;
unsigned int partial_len;
bool last;
bool schedule_when_free;
};

Expand Down Expand Up @@ -388,12 +387,13 @@ static bool axi_dmac_transfer_done(struct axi_dmac_chan *chan,
start_next = true;
}

if (active->cyclic)
vchan_cyclic_callback(&active->vdesc);

if (active->num_completed == active->num_sgs ||
sg->partial_len) {
if (active->cyclic) {
active->num_completed = 0; /* wrap around */
if (sg->last)
vchan_cyclic_callback(&active->vdesc);
} else {
list_del(&active->vdesc.node);
if (sg->partial_len)
Expand Down Expand Up @@ -564,7 +564,6 @@ static struct axi_dmac_sg *axi_dmac_fill_linear_sg(struct axi_dmac_chan *chan,
sg->src_addr = addr;
sg->x_len = len;
sg->y_len = 1;
sg->last = true;
sg++;
addr += len;
}
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