SoC interrupt input missing in caliptra_ss_top

[elecharo]

In Caliptra Subsystem release 0.8 all MCU interrupt inputs are driven from inside the subsystem (connected to MCI or OTP):

//Interrupt connections
always_comb begin
    ext_int = '0;
    ext_int[`VEER_INTR_VEC_MCI]                 = mci_intr;
    ext_int[`VEER_INTR_VEC_CLP_MBOX_DATA_AVAIL] = mailbox_data_avail;
    ext_int[`VEER_INTR_VEC_I3C]                 = 0;
    ext_int[`VEER_INTR_VEC_FC]                  = intr_otp_operation_done;
    //ext_int = ext_int_tb; //drive from tb if needed
end

There should be some bits that are connected to subsystem input ports and carry interrupts generated at SoC.