-
Notifications
You must be signed in to change notification settings - Fork 177
Ensure InlineCasts does not inline complex Expressions #2130
Conversation
79f168a
to
e122657
Compare
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
I think some Scaladoc/renaming is definitely higher priority than normal here; I wouldn't have imagined that InlineCasts
inlined things other than casts.
Ultimately, this transform is a lot broader than inlining casts. It takes advantage of the fact that casts are no-ops in the Verilog emitter since all SIntType
expressions get wrapped in $signed
, and perhaps a better way to describe it would be stating that it greedily attempts to build larger expression trees that contain at most one expression AST node that is neither a cast nor a reference-like node. I know that renaming is a pain, so we don't necessarily have to do it soon, but I think InlineAcrossCasts
might make it clearer that the transform inlines things other than casts.
I agree with all of this. I'll deprecate and rename in a follow on PR because I want this to backport to 1.2.x. |
Previously, InlineCasts could inline complex (ie. non-cast) Expressions into other complex Expressions. Now it will only inline so long as there no more than 1 complex Expression in the current nested Expression. Co-authored-by: Albert Magyar <[email protected]>
314dd07
to
5702681
Compare
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
This is a strict improvement over the existing pass so LGTM
Previously, InlineCasts could inline complex (ie. non-cast) Expressions into other complex Expressions. Now it will only inline so long as there no more than 1 complex Expression in the current nested Expression. Co-authored-by: Albert Magyar <[email protected]> (cherry picked from commit b274b31) # Conflicts: # src/main/scala/firrtl/transforms/InlineCasts.scala # src/test/scala/firrtlTests/InlineCastsSpec.scala
Previously, InlineCasts could inline complex (ie. non-cast) Expressions into other complex Expressions. Now it will only inline so long as there no more than 1 complex Expression in the current nested Expression. Co-authored-by: Albert Magyar <[email protected]> (cherry picked from commit b274b31) # Conflicts: # src/main/scala/firrtl/transforms/InlineCasts.scala
Previously, InlineCasts could inline complex (ie. non-cast) Expressions into other complex Expressions. Now it will only inline so long as there no more than 1 complex Expression in the current nested Expression. Co-authored-by: Albert Magyar <[email protected]> (cherry picked from commit b274b31)
Previously, InlineCasts could inline complex (ie. non-cast) Expressions into other complex Expressions. Now it will only inline so long as there no more than 1 complex Expression in the current nested Expression. Co-authored-by: Albert Magyar <[email protected]> (cherry picked from commit b274b31) Co-authored-by: Jack Koenig <[email protected]>
Previously, InlineCasts could inline complex (ie. non-cast) Expressions
into other complex Expressions. Now it will only inline so long as there
no more than 1 complex Expression in the current nested Expression.
This fixes the bug that #2128 is hitting in CI (the change in #2128 exposes this bug).
These tests probably aren't backportable but the bugfix should be, this is a functional bug.
First test is the functional bug, second is because my original fix caused some Verilog differences, namely the clock in that test would be named
_T_2
which is obviously not what we want. I think code gen would benefit from some "better name" handling that works across casts. Regardless, this PR is a minor bugfix so I wanted it to not cause Verilog diffs if possible, and it doesn't.The diff looks small but most of the diff is because I added an inner method to
onExpr
to propagateseenComplexExpr
. I didn't really want to expose that on the public API.Contributor Checklist
Type of Improvement
API Impact
No impact
Backend Code Generation Impact
No impact
Desired Merge Strategy
Release Notes
Fix bug where expression inlining could emit Verilog that doesn't match the input FIRRTL's semantics
Reviewer Checklist (only modified by reviewer)
Please Merge
?