From 44c46e181a2a6f23a66f10924d8b7840150f18b7 Mon Sep 17 00:00:00 2001 From: Dong-Heon Jung Date: Mon, 17 Jul 2023 05:17:24 +0900 Subject: [PATCH] [RISC-V] Fix GitHub_* tests (#88640) * [RISC-V] Fix GitHub_17585 test failure * [RISC-V] Fix GitHub_23147 test failure * [RISC-V] Remove lvIsHfaRegArg assertion * [RISC-V] Update --- src/coreclr/jit/codegenriscv64.cpp | 26 +++++++++++++--- src/coreclr/vm/riscv64/virtualcallstubcpu.hpp | 31 +++++++++---------- 2 files changed, 35 insertions(+), 22 deletions(-) diff --git a/src/coreclr/jit/codegenriscv64.cpp b/src/coreclr/jit/codegenriscv64.cpp index 4e6085ad5d9fd..6a4da5e53244b 100644 --- a/src/coreclr/jit/codegenriscv64.cpp +++ b/src/coreclr/jit/codegenriscv64.cpp @@ -6515,7 +6515,14 @@ void CodeGen::genJmpMethod(GenTree* jmp) // Must be <= 16 bytes or else it wouldn't be passed in registers, except for HFA, // which can be bigger (and is handled above). noway_assert(EA_SIZE_IN_BYTES(varDsc->lvSize()) <= 16); - loadType = varDsc->GetLayout()->GetGCPtrType(0); + if (emitter::isFloatReg(argReg)) + { + loadType = varDsc->lvIs4Field1 ? TYP_FLOAT : TYP_DOUBLE; + } + else + { + loadType = varDsc->GetLayout()->GetGCPtrType(0); + } } else { @@ -6532,14 +6539,23 @@ void CodeGen::genJmpMethod(GenTree* jmp) regSet.AddMaskVars(genRegMask(argReg)); gcInfo.gcMarkRegPtrVal(argReg, loadType); - if (compiler->lvaIsMultiregStruct(varDsc, compiler->info.compIsVarArgs)) + if (varDsc->GetOtherArgReg() < REG_STK) { // Restore the second register. - argRegNext = genRegArgNext(argReg); + argRegNext = varDsc->GetOtherArgReg(); + + if (emitter::isFloatReg(argRegNext)) + { + loadType = varDsc->lvIs4Field2 ? TYP_FLOAT : TYP_DOUBLE; + } + else + { + loadType = varDsc->GetLayout()->GetGCPtrType(1); + } - loadType = varDsc->GetLayout()->GetGCPtrType(1); loadSize = emitActualTypeSize(loadType); - GetEmitter()->emitIns_R_S(ins_Load(loadType), loadSize, argRegNext, varNum, TARGET_POINTER_SIZE); + int offs = loadSize == EA_4BYTE ? 4 : 8; + GetEmitter()->emitIns_R_S(ins_Load(loadType), loadSize, argRegNext, varNum, offs); regSet.AddMaskVars(genRegMask(argRegNext)); gcInfo.gcMarkRegPtrVal(argRegNext, loadType); diff --git a/src/coreclr/vm/riscv64/virtualcallstubcpu.hpp b/src/coreclr/vm/riscv64/virtualcallstubcpu.hpp index 53a3c2c0ac918..665f9fa1b08c7 100644 --- a/src/coreclr/vm/riscv64/virtualcallstubcpu.hpp +++ b/src/coreclr/vm/riscv64/virtualcallstubcpu.hpp @@ -82,8 +82,7 @@ struct DispatchStub private: friend struct DispatchHolder; - DWORD _entryPoint[9]; - DWORD _pad; + DWORD _entryPoint[8]; size_t _expectedMT; PCODE _implTarget; PCODE _failTarget; @@ -102,14 +101,13 @@ struct DispatchHolder void Initialize(DispatchHolder* pDispatchHolderRX, PCODE implTarget, PCODE failTarget, size_t expectedMT) { // auipc t4,0 - // addi t4, t4, 36 - // ld t0,0(a0) ; methodTable from object in $a0 - // ld t6,0(t4) // t6 _expectedMT - // bne t6, t0, failLabel - // ld t4, 8(t4) // t4 _implTarget + // ld t0, 0(a0) // methodTable from object in $a0 + // ld t6, 32(t4) // t6 _expectedMT + // bne t6, t0, failLabel + // ld t4, 40(t4) // t4 _implTarget // jalr x0, t4, 0 // failLabel: - // ld t4, 16(t4) // t4 _failTarget + // ld t4, 48(t4) // t4 _failTarget // jalr x0, t4, 0 // // @@ -117,15 +115,14 @@ struct DispatchHolder // _implTarget // _failTarget - _stub._entryPoint[0] = DISPATCH_STUB_FIRST_DWORD; // auipc t4,0 // 0x00000e97 - _stub._entryPoint[1] = 0x028e8e93; // addi t4, t4, 40 - _stub._entryPoint[2] = 0x00053283; // ld t0, 0(a0) //; methodTable from object in $a0 - _stub._entryPoint[3] = 0x000ebf83; // ld r6, 0(t4) // t6 _expectedMT - _stub._entryPoint[4] = 0x005f9663; // bne t6, t0, failLabel - _stub._entryPoint[5] = 0x008ebe83; // ld t4, 8(t4) // t4 _implTarget - _stub._entryPoint[6] = 0x000e8067; // jalr x0, t4, 0 - _stub._entryPoint[7] = 0x010ebe83; // ld t4, 16(t4) // t4 _failTarget - _stub._entryPoint[8] = 0x000e8067; // jalr x0, t4, 0 + _stub._entryPoint[0] = DISPATCH_STUB_FIRST_DWORD; // auipc t4,0 // 0x00000e97 + _stub._entryPoint[1] = 0x00053283; // ld t0, 0(a0) // methodTable from object in $a0 + _stub._entryPoint[2] = 0x020ebf83; // ld t6, 32(t4) // t6 _expectedMT + _stub._entryPoint[3] = 0x005f9663; // bne t6, t0, failLabel + _stub._entryPoint[4] = 0x028ebe83; // ld t4, 40(t4) // t4 _implTarget + _stub._entryPoint[5] = 0x000e8067; // jalr x0, t4, 0 + _stub._entryPoint[6] = 0x030ebe83; // ld t4, 48(t4) // t4 _failTarget + _stub._entryPoint[7] = 0x000e8067; // jalr x0, t4, 0 _stub._expectedMT = expectedMT; _stub._implTarget = implTarget;