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SX127x.cpp
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#include "SX127x.h"
#include <math.h>
#if !RADIOLIB_EXCLUDE_SX127X
SX127x::SX127x(Module* mod) : PhysicalLayer(RADIOLIB_SX127X_FREQUENCY_STEP_SIZE, RADIOLIB_SX127X_MAX_PACKET_LENGTH) {
this->mod = mod;
}
int16_t SX127x::begin(uint8_t* chipVersions, uint8_t numVersions, uint8_t syncWord, uint16_t preambleLength) {
// set module properties
this->mod->init();
this->mod->hal->pinMode(this->mod->getIrq(), this->mod->hal->GpioModeInput);
this->mod->hal->pinMode(this->mod->getGpio(), this->mod->hal->GpioModeInput);
// try to find the SX127x chip
if(!SX127x::findChip(chipVersions, numVersions)) {
RADIOLIB_DEBUG_BASIC_PRINTLN("No SX127x found!");
this->mod->term();
return(RADIOLIB_ERR_CHIP_NOT_FOUND);
}
RADIOLIB_DEBUG_BASIC_PRINTLN("M\tSX127x");
// set mode to standby
int16_t state = standby();
RADIOLIB_ASSERT(state);
// configure settings not accessible by API
state = config();
RADIOLIB_ASSERT(state);
// check active modem
if(getActiveModem() != RADIOLIB_SX127X_LORA) {
// set LoRa mode
state = setActiveModem(RADIOLIB_SX127X_LORA);
RADIOLIB_ASSERT(state);
}
// set LoRa sync word
state = SX127x::setSyncWord(syncWord);
RADIOLIB_ASSERT(state);
// set over current protection
state = SX127x::setCurrentLimit(60);
RADIOLIB_ASSERT(state);
// set preamble length
state = SX127x::setPreambleLength(preambleLength);
RADIOLIB_ASSERT(state);
// disable IQ inversion
state = SX127x::invertIQ(false);
RADIOLIB_ASSERT(state);
// initialize internal variables
this->dataRate = 0.0;
return(state);
}
int16_t SX127x::beginFSK(uint8_t* chipVersions, uint8_t numVersions, float freqDev, float rxBw, uint16_t preambleLength, bool enableOOK) {
// set module properties
this->mod->init();
this->mod->hal->pinMode(this->mod->getIrq(), this->mod->hal->GpioModeInput);
this->mod->hal->pinMode(this->mod->getGpio(), this->mod->hal->GpioModeInput);
// try to find the SX127x chip
if(!SX127x::findChip(chipVersions, numVersions)) {
RADIOLIB_DEBUG_BASIC_PRINTLN("No SX127x found!");
this->mod->term();
return(RADIOLIB_ERR_CHIP_NOT_FOUND);
}
RADIOLIB_DEBUG_BASIC_PRINTLN("M\tSX127x");
// set mode to standby
int16_t state = standby();
RADIOLIB_ASSERT(state);
// check currently active modem
if(getActiveModem() != RADIOLIB_SX127X_FSK_OOK) {
// set FSK mode
state = setActiveModem(RADIOLIB_SX127X_FSK_OOK);
RADIOLIB_ASSERT(state);
}
// enable/disable OOK
state = setOOK(enableOOK);
RADIOLIB_ASSERT(state);
// set frequency deviation
state = SX127x::setFrequencyDeviation(freqDev);
RADIOLIB_ASSERT(state);
// set AFC bandwidth
state = SX127x::setAFCBandwidth(rxBw);
RADIOLIB_ASSERT(state);
// set AFC&AGC trigger to RSSI (both in OOK and FSK)
state = SX127x::setAFCAGCTrigger(RADIOLIB_SX127X_RX_TRIGGER_RSSI_INTERRUPT);
RADIOLIB_ASSERT(state);
// enable AFC
state = SX127x::setAFC(false);
RADIOLIB_ASSERT(state);
// set receiver bandwidth
state = SX127x::setRxBandwidth(rxBw);
RADIOLIB_ASSERT(state);
// set over current protection
state = SX127x::setCurrentLimit(60);
RADIOLIB_ASSERT(state);
// set preamble length
state = SX127x::setPreambleLength(preambleLength);
RADIOLIB_ASSERT(state);
// set preamble polarity
state = invertPreamble(false);
RADIOLIB_ASSERT(state);
// set default sync word
uint8_t syncWord[] = {0x12, 0xAD};
state = setSyncWord(syncWord, 2);
RADIOLIB_ASSERT(state);
// disable address filtering
state = disableAddressFiltering();
RADIOLIB_ASSERT(state);
// set default RSSI measurement config
state = setRSSIConfig(2);
RADIOLIB_ASSERT(state);
// set default encoding
state = setEncoding(RADIOLIB_ENCODING_NRZ);
RADIOLIB_ASSERT(state);
// set default packet length mode
state = variablePacketLengthMode();
return(state);
}
int16_t SX127x::transmit(uint8_t* data, size_t len, uint8_t addr) {
// set mode to standby
int16_t state = setMode(RADIOLIB_SX127X_STANDBY);
RADIOLIB_ASSERT(state);
int16_t modem = getActiveModem();
RadioLibTime_t start = 0;
RadioLibTime_t timeout = 0;
RadioLibTime_t toa = getTimeOnAir(len);
if(modem == RADIOLIB_SX127X_LORA) {
// calculate timeout in ms (150 % of expected time-on-air)
timeout = (toa * 1.5) / 1000;
} else if(modem == RADIOLIB_SX127X_FSK_OOK) {
// calculate timeout in ms (5ms + 500 % of expected time-on-air)
timeout = 5 + (toa * 5) / 1000;
} else {
return(RADIOLIB_ERR_UNKNOWN);
}
// start transmission
RADIOLIB_DEBUG_BASIC_PRINTLN("Timeout in %lu ms", timeout);
state = startTransmit(data, len, addr);
RADIOLIB_ASSERT(state);
// wait for packet transmission or timeout
start = this->mod->hal->millis();
while(!this->mod->hal->digitalRead(this->mod->getIrq())) {
this->mod->hal->yield();
if(this->mod->hal->millis() - start > timeout) {
finishTransmit();
return(RADIOLIB_ERR_TX_TIMEOUT);
}
}
// update data rate
RadioLibTime_t elapsed = this->mod->hal->millis() - start;
this->dataRate = (len*8.0)/((float)elapsed/1000.0);
return(finishTransmit());
}
int16_t SX127x::receive(uint8_t* data, size_t len) {
// set mode to standby
int16_t state = setMode(RADIOLIB_SX127X_STANDBY);
RADIOLIB_ASSERT(state);
int16_t modem = getActiveModem();
if(modem == RADIOLIB_SX127X_LORA) {
// set mode to receive
state = startReceive(len, RADIOLIB_SX127X_RXSINGLE);
RADIOLIB_ASSERT(state);
// if no DIO1 is provided, use software timeout (100 LoRa symbols, same as hardware timeout)
RadioLibTime_t timeout = 0;
if(this->mod->getGpio() == RADIOLIB_NC) {
float symbolLength = (float) (uint32_t(1) << this->spreadingFactor) / (float) this->bandwidth;
timeout = (RadioLibTime_t)(symbolLength * 100.0);
}
// wait for packet reception or timeout
RadioLibTime_t start = this->mod->hal->millis();
while(!this->mod->hal->digitalRead(this->mod->getIrq())) {
this->mod->hal->yield();
if(this->mod->getGpio() == RADIOLIB_NC) {
// no GPIO pin provided, use software timeout
if(this->mod->hal->millis() - start > timeout) {
clearIRQFlags();
return(RADIOLIB_ERR_RX_TIMEOUT);
}
} else {
// GPIO provided, use that
if(this->mod->hal->digitalRead(this->mod->getGpio())) {
clearIRQFlags();
return(RADIOLIB_ERR_RX_TIMEOUT);
}
}
}
} else if(modem == RADIOLIB_SX127X_FSK_OOK) {
// calculate timeout in ms (500 % of expected time-on-air)
RadioLibTime_t timeout = (getTimeOnAir(len) * 5) / 1000;
// set mode to receive
state = startReceive(len, RADIOLIB_SX127X_RX);
RADIOLIB_ASSERT(state);
// wait for packet reception or timeout
RadioLibTime_t start = this->mod->hal->millis();
while(!this->mod->hal->digitalRead(this->mod->getIrq())) {
this->mod->hal->yield();
if(this->mod->hal->millis() - start > timeout) {
clearIRQFlags();
return(RADIOLIB_ERR_RX_TIMEOUT);
}
}
}
// read the received data
state = readData(data, len);
return(state);
}
int16_t SX127x::scanChannel() {
// start CAD
int16_t state = startChannelScan();
RADIOLIB_ASSERT(state);
// wait for channel activity detected or timeout
while(!this->mod->hal->digitalRead(this->mod->getIrq())) {
this->mod->hal->yield();
if(this->mod->hal->digitalRead(this->mod->getGpio())) {
return(RADIOLIB_PREAMBLE_DETECTED);
}
}
return(RADIOLIB_CHANNEL_FREE);
}
int16_t SX127x::sleep() {
// set RF switch (if present)
this->mod->setRfSwitchState(Module::MODE_IDLE);
// set mode to sleep
return(setMode(RADIOLIB_SX127X_SLEEP));
}
int16_t SX127x::standby() {
// set RF switch (if present)
this->mod->setRfSwitchState(Module::MODE_IDLE);
// set mode to standby
return(setMode(RADIOLIB_SX127X_STANDBY));
}
int16_t SX127x::standby(uint8_t mode) {
(void)mode;
return(standby());
}
int16_t SX127x::transmitDirect(uint32_t frf) {
// check modem
if(getActiveModem() != RADIOLIB_SX127X_FSK_OOK) {
return(RADIOLIB_ERR_WRONG_MODEM);
}
// set RF switch (if present)
this->mod->setRfSwitchState(Module::MODE_TX);
// user requested to start transmitting immediately (required for RTTY)
if(frf != 0) {
this->mod->SPIwriteRegister(RADIOLIB_SX127X_REG_FRF_MSB, (frf & 0xFF0000) >> 16);
this->mod->SPIwriteRegister(RADIOLIB_SX127X_REG_FRF_MID, (frf & 0x00FF00) >> 8);
this->mod->SPIwriteRegister(RADIOLIB_SX127X_REG_FRF_LSB, frf & 0x0000FF);
return(setMode(RADIOLIB_SX127X_TX));
}
// activate direct mode
int16_t state = directMode();
RADIOLIB_ASSERT(state);
// apply fixes to errata
RADIOLIB_ERRATA_SX127X(false);
// start transmitting
return(setMode(RADIOLIB_SX127X_TX));
}
int16_t SX127x::receiveDirect() {
// check modem
if(getActiveModem() != RADIOLIB_SX127X_FSK_OOK) {
return(RADIOLIB_ERR_WRONG_MODEM);
}
// set RF switch (if present)
this->mod->setRfSwitchState(Module::MODE_RX);
// activate direct mode
int16_t state = directMode();
RADIOLIB_ASSERT(state);
// apply fixes to errata
RADIOLIB_ERRATA_SX127X(true);
// start receiving
return(setMode(RADIOLIB_SX127X_RX));
}
int16_t SX127x::directMode() {
// set mode to standby
int16_t state = setMode(RADIOLIB_SX127X_STANDBY);
RADIOLIB_ASSERT(state);
// set DIO mapping
state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO1_CONT_DCLK | RADIOLIB_SX127X_DIO2_CONT_DATA, 5, 2);
RADIOLIB_ASSERT(state);
// enable receiver startup without preamble or RSSI
state = SX127x::setAFCAGCTrigger(RADIOLIB_SX127X_RX_TRIGGER_NONE);
RADIOLIB_ASSERT(state);
// set continuous mode
return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_2, RADIOLIB_SX127X_DATA_MODE_CONTINUOUS, 6, 6));
}
int16_t SX127x::packetMode() {
// check modem
if(getActiveModem() != RADIOLIB_SX127X_FSK_OOK) {
return(RADIOLIB_ERR_WRONG_MODEM);
}
return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_2, RADIOLIB_SX127X_DATA_MODE_PACKET, 6, 6));
}
int16_t SX127x::startReceive() {
return(this->startReceive(0, RADIOLIB_SX127X_RXCONTINUOUS));
}
int16_t SX127x::startReceive(uint8_t len, uint8_t mode) {
// set mode to standby
int16_t state = setMode(RADIOLIB_SX127X_STANDBY);
RADIOLIB_ASSERT(state);
int16_t modem = getActiveModem();
if(modem == RADIOLIB_SX127X_LORA) {
// set DIO pin mapping
if(this->mod->SPIgetRegValue(RADIOLIB_SX127X_REG_HOP_PERIOD) > RADIOLIB_SX127X_HOP_PERIOD_OFF) {
state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_LORA_RX_DONE | RADIOLIB_SX127X_DIO1_LORA_FHSS_CHANGE_CHANNEL, 7, 4);
} else {
state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_LORA_RX_DONE | RADIOLIB_SX127X_DIO1_LORA_RX_TIMEOUT, 7, 4);
}
// set expected packet length for SF6
if(this->spreadingFactor == 6) {
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PAYLOAD_LENGTH, len);
this->packetLength = len;
}
// apply fixes to errata
RADIOLIB_ERRATA_SX127X(true);
// clear interrupt flags
clearIRQFlags();
// set FIFO pointers
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_FIFO_RX_BASE_ADDR, RADIOLIB_SX127X_FIFO_RX_BASE_ADDR_MAX);
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_FIFO_ADDR_PTR, RADIOLIB_SX127X_FIFO_RX_BASE_ADDR_MAX);
RADIOLIB_ASSERT(state);
} else if(modem == RADIOLIB_SX127X_FSK_OOK) {
// set DIO pin mapping
state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_PACK_PAYLOAD_READY, 7, 6);
RADIOLIB_ASSERT(state);
// clear interrupt flags
clearIRQFlags();
// FSK modem does not distinguish between Rx single and continuous
if(mode == RADIOLIB_SX127X_RXCONTINUOUS) {
// set RF switch (if present)
this->mod->setRfSwitchState(Module::MODE_RX);
return(setMode(RADIOLIB_SX127X_RX));
}
}
// set RF switch (if present)
this->mod->setRfSwitchState(Module::MODE_RX);
// set mode to receive
return(setMode(mode));
}
int16_t SX127x::startReceive(uint32_t timeout, uint32_t irqFlags, uint32_t irqMask, size_t len) {
(void)irqFlags;
(void)irqMask;
uint8_t mode = RADIOLIB_SX127X_RXCONTINUOUS;
if(timeout != 0) {
// for non-zero timeout value, change mode to Rx single and set the timeout
mode = RADIOLIB_SX127X_RXSINGLE;
uint8_t msb_sym = (timeout > 0x3FF) ? 0x3 : (uint8_t)(timeout >> 8);
uint8_t lsb_sym = (timeout > 0x3FF) ? 0xFF : (uint8_t)(timeout & 0xFF);
int16_t state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_MODEM_CONFIG_2, msb_sym, 1, 0);
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_SYMB_TIMEOUT_LSB, lsb_sym);
RADIOLIB_ASSERT(state);
}
return(startReceive((uint8_t)len, mode));
}
void SX127x::setDio0Action(void (*func)(void), uint32_t dir) {
this->mod->hal->attachInterrupt(this->mod->hal->pinToInterrupt(this->mod->getIrq()), func, dir);
}
void SX127x::clearDio0Action() {
this->mod->hal->detachInterrupt(this->mod->hal->pinToInterrupt(this->mod->getIrq()));
}
void SX127x::setDio1Action(void (*func)(void), uint32_t dir) {
if(this->mod->getGpio() == RADIOLIB_NC) {
return;
}
this->mod->hal->attachInterrupt(this->mod->hal->pinToInterrupt(this->mod->getGpio()), func, dir);
}
void SX127x::clearDio1Action() {
if(this->mod->getGpio() == RADIOLIB_NC) {
return;
}
this->mod->hal->detachInterrupt(this->mod->hal->pinToInterrupt(this->mod->getGpio()));
}
void SX127x::setPacketReceivedAction(void (*func)(void)) {
this->setDio0Action(func, this->mod->hal->GpioInterruptRising);
}
void SX127x::clearPacketReceivedAction() {
this->clearDio0Action();
}
void SX127x::setPacketSentAction(void (*func)(void)) {
this->setDio0Action(func, this->mod->hal->GpioInterruptRising);
}
void SX127x::clearPacketSentAction() {
this->clearDio0Action();
}
void SX127x::setChannelScanAction(void (*func)(void)) {
this->setDio0Action(func, this->mod->hal->GpioInterruptRising);
}
void SX127x::clearChannelScanAction() {
this->clearDio0Action();
}
void SX127x::setFifoEmptyAction(void (*func)(void)) {
// set DIO1 to the FIFO empty event (the register setting is done in startTransmit)
setDio1Action(func, this->mod->hal->GpioInterruptRising);
}
void SX127x::clearFifoEmptyAction() {
clearDio1Action();
}
void SX127x::setFifoFullAction(void (*func)(void)) {
// set the interrupt
this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_FIFO_THRESH, RADIOLIB_SX127X_FIFO_THRESH, 5, 0);
this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO1_PACK_FIFO_LEVEL, 5, 4);
// set DIO1 to the FIFO full event
setDio1Action(func, this->mod->hal->GpioInterruptRising);
}
void SX127x::clearFifoFullAction() {
clearDio1Action();
this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, 0x00, 5, 4);
}
bool SX127x::fifoAdd(uint8_t* data, int totalLen, int* remLen) {
// subtract first (this may be the first time we get to modify the remaining length)
*remLen -= RADIOLIB_SX127X_FIFO_THRESH - 1;
// check if there is still something left to send
if(*remLen <= 0) {
// we're done
return(true);
}
// calculate the number of bytes we can copy
int len = *remLen;
if(len > RADIOLIB_SX127X_FIFO_THRESH - 1) {
len = RADIOLIB_SX127X_FIFO_THRESH - 1;
}
// copy the bytes to the FIFO
this->mod->SPIwriteRegisterBurst(RADIOLIB_SX127X_REG_FIFO, &data[totalLen - *remLen], len);
// we're not done yet
return(false);
}
bool SX127x::fifoGet(volatile uint8_t* data, int totalLen, volatile int* rcvLen) {
// get pointer to the correct position in data buffer
uint8_t* dataPtr = (uint8_t*)&data[*rcvLen];
// check how much data are we still expecting
uint8_t len = RADIOLIB_SX127X_FIFO_THRESH - 1;
if(totalLen - *rcvLen < len) {
// we're nearly at the end
len = totalLen - *rcvLen;
}
// get the data
this->mod->SPIreadRegisterBurst(RADIOLIB_SX127X_REG_FIFO, len, dataPtr);
*rcvLen = *rcvLen + len;
// check if we're done
if(*rcvLen >= totalLen) {
return(true);
}
return(false);
}
int16_t SX127x::startTransmit(uint8_t* data, size_t len, uint8_t addr) {
// set mode to standby
int16_t state = setMode(RADIOLIB_SX127X_STANDBY);
int16_t modem = getActiveModem();
if(modem == RADIOLIB_SX127X_LORA) {
// check packet length
if(len > RADIOLIB_SX127X_MAX_PACKET_LENGTH) {
return(RADIOLIB_ERR_PACKET_TOO_LONG);
}
// set DIO mapping
if(this->mod->SPIgetRegValue(RADIOLIB_SX127X_REG_HOP_PERIOD) > RADIOLIB_SX127X_HOP_PERIOD_OFF) {
this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_LORA_TX_DONE | RADIOLIB_SX127X_DIO1_LORA_FHSS_CHANGE_CHANNEL, 7, 4);
} else {
this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_LORA_TX_DONE, 7, 6);
}
// apply fixes to errata
RADIOLIB_ERRATA_SX127X(false);
// clear interrupt flags
clearIRQFlags();
// set packet length
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PAYLOAD_LENGTH, len);
// set FIFO pointers
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_FIFO_TX_BASE_ADDR, RADIOLIB_SX127X_FIFO_TX_BASE_ADDR_MAX);
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_FIFO_ADDR_PTR, RADIOLIB_SX127X_FIFO_TX_BASE_ADDR_MAX);
} else if(modem == RADIOLIB_SX127X_FSK_OOK) {
// clear interrupt flags
clearIRQFlags();
// set DIO mapping
if(len > RADIOLIB_SX127X_MAX_PACKET_LENGTH_FSK) {
this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO1_PACK_FIFO_EMPTY, 5, 4);
} else {
this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_PACK_PACKET_SENT, 7, 6);
}
// set packet length
if (this->packetLengthConfig == RADIOLIB_SX127X_PACKET_VARIABLE) {
this->mod->SPIwriteRegister(RADIOLIB_SX127X_REG_FIFO, len);
}
// check address filtering
uint8_t filter = this->mod->SPIgetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, 2, 1);
if((filter == RADIOLIB_SX127X_ADDRESS_FILTERING_NODE) || (filter == RADIOLIB_SX127X_ADDRESS_FILTERING_NODE_BROADCAST)) {
this->mod->SPIwriteRegister(RADIOLIB_SX127X_REG_FIFO, addr);
}
}
// write packet to FIFO
size_t packetLen = len;
if((modem == RADIOLIB_SX127X_FSK_OOK) && (len > RADIOLIB_SX127X_MAX_PACKET_LENGTH_FSK)) {
packetLen = RADIOLIB_SX127X_FIFO_THRESH - 1;
this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_FIFO_THRESH, RADIOLIB_SX127X_TX_START_FIFO_NOT_EMPTY, 7, 7);
}
this->mod->SPIwriteRegisterBurst(RADIOLIB_SX127X_REG_FIFO, data, packetLen);
// set RF switch (if present)
this->mod->setRfSwitchState(Module::MODE_TX);
// start transmission
state |= setMode(RADIOLIB_SX127X_TX);
RADIOLIB_ASSERT(state);
return(RADIOLIB_ERR_NONE);
}
int16_t SX127x::finishTransmit() {
// wait for at least 1 bit at the lowest possible bit rate before clearing IRQ flags
// not doing this and clearing RADIOLIB_SX127X_FLAG_FIFO_OVERRUN will dump the FIFO,
// which can lead to mangling of the last bit (#808)
mod->hal->delayMicroseconds(1000000/1200);
// clear interrupt flags
clearIRQFlags();
// set mode to standby to disable transmitter/RF switch
return(standby());
}
int16_t SX127x::readData(uint8_t* data, size_t len) {
int16_t modem = getActiveModem();
// get packet length
size_t length = getPacketLength();
size_t dumpLen = 0;
if((len != 0) && (len < length)) {
// user requested less data than we got, only return what was requested
dumpLen = length - len;
length = len;
}
// check payload CRC
int16_t state = RADIOLIB_ERR_NONE;
if(this->mod->SPIgetRegValue(RADIOLIB_SX127X_REG_IRQ_FLAGS, 5, 5) == RADIOLIB_SX127X_CLEAR_IRQ_FLAG_PAYLOAD_CRC_ERROR) {
state = RADIOLIB_ERR_CRC_MISMATCH;
}
if(modem == RADIOLIB_SX127X_LORA) {
// check packet header integrity
if(this->crcEnabled && (state == RADIOLIB_ERR_NONE) && (this->mod->SPIgetRegValue(RADIOLIB_SX127X_REG_HOP_CHANNEL, 6, 6) == 0)) {
// CRC is disabled according to packet header and enabled according to user
// most likely damaged packet header
state = RADIOLIB_ERR_LORA_HEADER_DAMAGED;
}
} else if(modem == RADIOLIB_SX127X_FSK_OOK) {
// check address filtering
uint8_t filter = this->mod->SPIgetRegValue(RADIOLIB_SX127X_REG_PACKET_CONFIG_1, 2, 1);
if((filter == RADIOLIB_SX127X_ADDRESS_FILTERING_NODE) || (filter == RADIOLIB_SX127X_ADDRESS_FILTERING_NODE_BROADCAST)) {
this->mod->SPIreadRegister(RADIOLIB_SX127X_REG_FIFO);
}
}
// read packet data
this->mod->SPIreadRegisterBurst(RADIOLIB_SX127X_REG_FIFO, length, data);
// dump the bytes that weren't requested
if(dumpLen != 0) {
clearFIFO(dumpLen);
}
// clear internal flag so getPacketLength can return the new packet length
this->packetLengthQueried = false;
// clear interrupt flags
clearIRQFlags();
return(state);
}
int16_t SX127x::startChannelScan() {
// check active modem
if(getActiveModem() != RADIOLIB_SX127X_LORA) {
return(RADIOLIB_ERR_WRONG_MODEM);
}
// set mode to standby
int16_t state = setMode(RADIOLIB_SX127X_STANDBY);
RADIOLIB_ASSERT(state);
// clear interrupt flags
clearIRQFlags();
// set DIO pin mapping
state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_DIO_MAPPING_1, RADIOLIB_SX127X_DIO0_LORA_CAD_DONE | RADIOLIB_SX127X_DIO1_LORA_CAD_DETECTED, 7, 4);
RADIOLIB_ASSERT(state);
// set RF switch (if present)
this->mod->setRfSwitchState(Module::MODE_RX);
// set mode to CAD
state = setMode(RADIOLIB_SX127X_CAD);
return(state);
}
int16_t SX127x::getChannelScanResult() {
if((this->getIRQFlags() & RADIOLIB_SX127X_CLEAR_IRQ_FLAG_CAD_DETECTED) == RADIOLIB_SX127X_CLEAR_IRQ_FLAG_CAD_DETECTED) {
return(RADIOLIB_PREAMBLE_DETECTED);
}
return(RADIOLIB_CHANNEL_FREE);
}
int16_t SX127x::setSyncWord(uint8_t syncWord) {
// check active modem
if(getActiveModem() != RADIOLIB_SX127X_LORA) {
return(RADIOLIB_ERR_WRONG_MODEM);
}
// set mode to standby
setMode(RADIOLIB_SX127X_STANDBY);
// write register
return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_SYNC_WORD, syncWord));
}
int16_t SX127x::setCurrentLimit(uint8_t currentLimit) {
// check allowed range
if(!(((currentLimit >= 45) && (currentLimit <= 240)) || (currentLimit == 0))) {
return(RADIOLIB_ERR_INVALID_CURRENT_LIMIT);
}
// set mode to standby
int16_t state = setMode(RADIOLIB_SX127X_STANDBY);
// set OCP limit
uint8_t raw;
if(currentLimit == 0) {
// limit set to 0, disable OCP
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OCP, RADIOLIB_SX127X_OCP_OFF, 5, 5);
} else if(currentLimit <= 120) {
raw = (currentLimit - 45) / 5;
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OCP, RADIOLIB_SX127X_OCP_ON | raw, 5, 0);
} else if(currentLimit <= 240) {
raw = (currentLimit + 30) / 10;
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_OCP, RADIOLIB_SX127X_OCP_ON | raw, 5, 0);
}
return(state);
}
int16_t SX127x::setPreambleLength(size_t preambleLength) {
// set mode to standby
int16_t state = setMode(RADIOLIB_SX127X_STANDBY);
RADIOLIB_ASSERT(state);
// check active modem
uint8_t modem = getActiveModem();
if(modem == RADIOLIB_SX127X_LORA) {
// check allowed range
if(preambleLength < 6) {
return(RADIOLIB_ERR_INVALID_PREAMBLE_LENGTH);
}
// set preamble length
state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PREAMBLE_MSB, (uint8_t)((preambleLength >> 8) & 0xFF));
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PREAMBLE_LSB, (uint8_t)(preambleLength & 0xFF));
return(state);
} else if(modem == RADIOLIB_SX127X_FSK_OOK) {
// set preamble length (in bytes)
uint16_t numBytes = preambleLength / 8;
state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PREAMBLE_MSB_FSK, (uint8_t)((numBytes >> 8) & 0xFF));
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_PREAMBLE_LSB_FSK, (uint8_t)(numBytes & 0xFF));
return(state);
}
return(RADIOLIB_ERR_UNKNOWN);
}
int16_t SX127x::invertPreamble(bool enable) {
// set mode to standby
int16_t state = setMode(RADIOLIB_SX127X_STANDBY);
RADIOLIB_ASSERT(state);
// check active modem
uint8_t modem = getActiveModem();
if(modem == RADIOLIB_SX127X_LORA) {
return(RADIOLIB_ERR_WRONG_MODEM);
} else if(modem == RADIOLIB_SX127X_FSK_OOK) {
// set preamble polarity
uint8_t polarity = enable ? RADIOLIB_SX127X_PREAMBLE_POLARITY_AA : RADIOLIB_SX127X_PREAMBLE_POLARITY_55;
state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_SYNC_CONFIG, polarity, 5, 5);
return(state);
}
return(RADIOLIB_ERR_UNKNOWN);
}
float SX127x::getFrequencyError(bool autoCorrect) {
int16_t modem = getActiveModem();
if(modem == RADIOLIB_SX127X_LORA) {
// get raw frequency error
uint32_t raw = (uint32_t)this->mod->SPIgetRegValue(RADIOLIB_SX127X_REG_FEI_MSB, 3, 0) << 16;
raw |= (uint16_t)this->mod->SPIgetRegValue(RADIOLIB_SX127X_REG_FEI_MID) << 8;
raw |= this->mod->SPIgetRegValue(RADIOLIB_SX127X_REG_FEI_LSB);
uint32_t base = (uint32_t)2 << 23;
float error;
// check the first bit
if(raw & 0x80000) {
// frequency error is negative
raw |= (uint32_t)0xFFF00000;
raw = ~raw + 1;
error = (((float)raw * (float)base)/32000000.0) * (this->bandwidth/500.0) * -1.0;
} else {
error = (((float)raw * (float)base)/32000000.0) * (this->bandwidth/500.0);
}
if(autoCorrect) {
// adjust LoRa modem data rate
float ppmOffset = 0.95 * (error/32.0);
this->mod->SPIwriteRegister(0x27, (uint8_t)ppmOffset);
}
return(error);
} else if(modem == RADIOLIB_SX127X_FSK_OOK) {
// get raw frequency error
uint16_t raw = (uint16_t)this->mod->SPIgetRegValue(RADIOLIB_SX127X_REG_FEI_MSB_FSK) << 8;
raw |= this->mod->SPIgetRegValue(RADIOLIB_SX127X_REG_FEI_LSB_FSK);
uint32_t base = 1;
float error;
// check the first bit
if(raw & 0x8000) {
// frequency error is negative
raw |= (uint32_t)0xFFF00000;
raw = ~raw + 1;
error = (float)raw * (32000000.0 / (float)(base << 19)) * -1.0;
} else {
error = (float)raw * (32000000.0 / (float)(base << 19));
}
return(error);
}
return(RADIOLIB_ERR_UNKNOWN);
}
float SX127x::getAFCError()
{
// check active modem
int16_t modem = getActiveModem();
if(modem != RADIOLIB_SX127X_FSK_OOK) {
return 0;
}
// get raw frequency error
int16_t raw = (uint16_t)this->mod->SPIreadRegister(RADIOLIB_SX127X_REG_AFC_MSB) << 8;
raw |= this->mod->SPIreadRegister(RADIOLIB_SX127X_REG_AFC_LSB);
uint32_t base = 1;
return raw * (32000000.0 / (float)(base << 19));
}
float SX127x::getSNR() {
// check active modem
if(getActiveModem() != RADIOLIB_SX127X_LORA) {
return(0);
}
// get SNR value
int8_t rawSNR = (int8_t)this->mod->SPIgetRegValue(RADIOLIB_SX127X_REG_PKT_SNR_VALUE);
return(rawSNR / 4.0);
}
float SX127x::getDataRate() const {
return(this->dataRate);
}
int16_t SX127x::setBitRateCommon(float br, uint8_t fracRegAddr) {
// check active modem
if(getActiveModem() != RADIOLIB_SX127X_FSK_OOK) {
return(RADIOLIB_ERR_WRONG_MODEM);
}
// check allowed bit rate
// datasheet says 1.2 kbps should be the smallest possible, but 0.512 works fine
if(ookEnabled) {
RADIOLIB_CHECK_RANGE(br, 0.5, 32.768002, RADIOLIB_ERR_INVALID_BIT_RATE); // Found that 32.768 is 32.768002
} else {
RADIOLIB_CHECK_RANGE(br, 0.5, 300.0, RADIOLIB_ERR_INVALID_BIT_RATE);
}
// set mode to STANDBY
int16_t state = setMode(RADIOLIB_SX127X_STANDBY);
RADIOLIB_ASSERT(state);
// set bit rate
uint16_t bitRateRaw = (RADIOLIB_SX127X_CRYSTAL_FREQ * 1000.0) / br;
state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_BITRATE_MSB, (bitRateRaw & 0xFF00) >> 8, 7, 0);
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_BITRATE_LSB, bitRateRaw & 0x00FF, 7, 0);
// set fractional part of bit rate
if(!ookEnabled) {
float bitRateRem = ((RADIOLIB_SX127X_CRYSTAL_FREQ * 1000.0) / (float)br) - (float)bitRateRaw;
uint8_t bitRateFrac = bitRateRem * 16;
state |= this->mod->SPIsetRegValue(fracRegAddr, bitRateFrac, 7, 0);
}
if(state == RADIOLIB_ERR_NONE) {
this->bitRate = br;
}
return(state);
}
int16_t SX127x::setFrequencyDeviation(float freqDev) {
// check active modem
if(getActiveModem() != RADIOLIB_SX127X_FSK_OOK) {
return(RADIOLIB_ERR_WRONG_MODEM);
}
// set frequency deviation to lowest available setting (required for digimodes)
float newFreqDev = freqDev;
if(freqDev < 0.0) {
newFreqDev = 0.6;
}
// check frequency deviation range
if(!((newFreqDev + this->bitRate/2.0 <= 250.0) && (freqDev <= 200.0))) {
return(RADIOLIB_ERR_INVALID_FREQUENCY_DEVIATION);
}
// set mode to STANDBY
int16_t state = setMode(RADIOLIB_SX127X_STANDBY);
RADIOLIB_ASSERT(state);
// set allowed frequency deviation
uint32_t base = 1;
uint32_t FDEV = (newFreqDev * (base << 19)) / 32000;
state = this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_FDEV_MSB, (FDEV & 0xFF00) >> 8, 5, 0);
state |= this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_FDEV_LSB, FDEV & 0x00FF, 7, 0);
return(state);
}
uint8_t SX127x::calculateBWManExp(float bandwidth)
{
for(uint8_t e = 7; e >= 1; e--) {
for(int8_t m = 2; m >= 0; m--) {
float point = (RADIOLIB_SX127X_CRYSTAL_FREQ * 1000000.0)/(((4 * m) + 16) * ((uint32_t)1 << (e + 2)));
if(fabs(bandwidth - ((point / 1000.0) + 0.05)) <= 0.5) {
return((m << 3) | e);
}
}
}
return 0;
}
int16_t SX127x::setRxBandwidth(float rxBw) {
// check active modem
if(getActiveModem() != RADIOLIB_SX127X_FSK_OOK) {
return(RADIOLIB_ERR_WRONG_MODEM);
}
RADIOLIB_CHECK_RANGE(rxBw, 2.6, 250.0, RADIOLIB_ERR_INVALID_RX_BANDWIDTH);
// set mode to STANDBY
int16_t state = setMode(RADIOLIB_SX127X_STANDBY);
RADIOLIB_ASSERT(state);
// set Rx bandwidth
return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_RX_BW, calculateBWManExp(rxBw), 4, 0));
}
int16_t SX127x::setAFCBandwidth(float rxBw) {
// check active modem
if(getActiveModem() != RADIOLIB_SX127X_FSK_OOK){
return(RADIOLIB_ERR_WRONG_MODEM);
}
RADIOLIB_CHECK_RANGE(rxBw, 2.6, 250.0, RADIOLIB_ERR_INVALID_RX_BANDWIDTH);
// set mode to STANDBY
int16_t state = setMode(RADIOLIB_SX127X_STANDBY);
RADIOLIB_ASSERT(state);
// set AFC bandwidth
return(this->mod->SPIsetRegValue(RADIOLIB_SX127X_REG_AFC_BW, calculateBWManExp(rxBw), 4, 0));
}
int16_t SX127x::setAFC(bool isEnabled) {
// check active modem