From c002bf0dbc40b8cde3202bc64c238d10c9da6fbc Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ludovic=20BOU=C3=89?= Date: Sun, 22 Sep 2024 15:24:03 +0200 Subject: [PATCH] Add M5Stack CoreS3 in _meshtastic_HardwareModel --- src/mesh/generated/meshtastic/mesh.pb.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mesh/generated/meshtastic/mesh.pb.h b/src/mesh/generated/meshtastic/mesh.pb.h index aa83ff27a6..554225cc41 100644 --- a/src/mesh/generated/meshtastic/mesh.pb.h +++ b/src/mesh/generated/meshtastic/mesh.pb.h @@ -109,7 +109,7 @@ typedef enum _meshtastic_HardwareModel { meshtastic_HardwareModel_NRF52840_PCA10059 = 40, /* Custom Disaster Radio esp32 v3 device https://github.com/sudomesh/disaster-radio/tree/master/hardware/board_esp32_v3 */ meshtastic_HardwareModel_DR_DEV = 41, - /* M5 esp32 based MCU modules with enclosure, TFT and LORA Shields. All Variants (Basic, Core, Fire, Core2, Paper) https://m5stack.com/ */ + /* M5 esp32 based MCU modules with enclosure, TFT and LORA Shields. All Variants (Basic, Core, Fire, Core2, CoreS3, Paper) https://m5stack.com/ */ meshtastic_HardwareModel_M5STACK = 42, /* New Heltec LoRA32 with ESP32-S3 CPU */ meshtastic_HardwareModel_HELTEC_V3 = 43, @@ -203,6 +203,8 @@ typedef enum _meshtastic_HardwareModel { meshtastic_HardwareModel_M5STACK_CORE2 = 78, /* Pico2 with Waveshare Hat, same as Pico */ meshtastic_HardwareModel_RPI_PICO2 = 79, + /* M5Stack CoreS3 is the third generation of the M5Stack Core series */ + meshtastic_HardwareModel_M5STACK_CORES3 = 80, /* ------------------------------------------------------------------------------------------------------------------------------------------ Reserved ID For developing private Ports. These will show up in live traffic sparsely, so we can use a high number. Keep it within 8 bits. ------------------------------------------------------------------------------------------------------------------------------------------ */