Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[Multitop, test] chip_sw_rstmgr_sw_rst #26228

Open
johngt opened this issue Feb 11, 2025 · 0 comments
Open

[Multitop, test] chip_sw_rstmgr_sw_rst #26228

johngt opened this issue Feb 11, 2025 · 0 comments
Assignees
Labels
Component:ChipLevelTest Used to filter the chip-level test backlog IP:rstmgr Multitop:Autogen Priority:P2 Priority: medium
Milestone

Comments

@johngt
Copy link

johngt commented Feb 11, 2025

  • Tests should not depend on earlgrey constants. Try removing #include "hw/top_earlgrey/sw/autogen/top_earlgrey.h" and see what doesn't compile.
  • Replace any dif_rstmgr_init with dif_rstmgr_init_from_dt to avoid TOP_EARLGREY_rstmgr_BASE_ADDR.
  • Add //hw/top:dt to deps to get all device table libraries.
  • Use bazel build //hw/top:dt_api_hdr and bazel build //hw/top:dt_rstmgr_hdr to see the autogenerated DT headers. The _src suffix shows the C files.
  • Grep for kClockFreq.*. These are top-specific but don't come from a top_earlgrey header. Replace with dt_clock_frequency(...).
  • For ISRs: replace peripheral = with dt_plic_id_to_instance_id and compare to the DT instance using dt_rstmgr_instance_id(dt_rstmgr_t).
  • Again for ISRs, convert the plic IRQ ID to a block-specific ID with dt_rstmgr_irq_from_plic_id and switch on that.

The test chip_sw_rstmgr_sw_rst should run and pass for Ealrgrey and should build for Darjeeling.

@johngt johngt added Component:ChipLevelTest Used to filter the chip-level test backlog IP:rstmgr Multitop:Autogen Priority:P2 Priority: medium labels Feb 11, 2025
@johngt johngt added this to the Multi-Top milestone Feb 11, 2025
@AlexJones0 AlexJones0 self-assigned this Feb 14, 2025
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
Component:ChipLevelTest Used to filter the chip-level test backlog IP:rstmgr Multitop:Autogen Priority:P2 Priority: medium
Projects
None yet
Development

No branches or pull requests

2 participants