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amdgpu-pro-extratemps-17.50.patch
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diff -rau amdgpu-17.50-511655-orig/amd/amdgpu/amdgpu_dpm.h amdgpu-17.50-511655/amd/amdgpu/amdgpu_dpm.h
--- amdgpu-17.50-511655-orig/amd/amdgpu/amdgpu_dpm.h 2017-12-01 22:30:56.000000000 +0100
+++ amdgpu-17.50-511655/amd/amdgpu/amdgpu_dpm.h 2018-04-27 23:04:47.731689873 +0200
@@ -268,6 +268,12 @@
#define amdgpu_dpm_get_temperature(adev) \
((adev)->powerplay.pp_funcs->get_temperature((adev)->powerplay.pp_handle))
+#define amdgpu_dpm_get_temperature_asic_max(adev) \
+ ((adev)->powerplay.pp_funcs->get_temperature_asic_max((adev)->powerplay.pp_handle))
+
+#define amdgpu_dpm_have_temperature_asic_max(adev) \
+ ((adev)->powerplay.pp_funcs->have_temperature_asic_max((adev)->powerplay.pp_handle))
+
#define amdgpu_dpm_set_fan_control_mode(adev, m) \
((adev)->powerplay.pp_funcs->set_fan_control_mode((adev)->powerplay.pp_handle, (m)))
diff -rau amdgpu-17.50-511655-orig/amd/amdgpu/amdgpu_pm.c amdgpu-17.50-511655/amd/amdgpu/amdgpu_pm.c
--- amdgpu-17.50-511655-orig/amd/amdgpu/amdgpu_pm.c 2017-12-01 22:30:56.000000000 +0100
+++ amdgpu-17.50-511655/amd/amdgpu/amdgpu_pm.c 2018-04-27 23:04:47.731689873 +0200
@@ -796,6 +796,27 @@
return snprintf(buf, PAGE_SIZE, "%d\n", temp);
}
+static ssize_t amdgpu_hwmon_show_temp_asic_max(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct amdgpu_device *adev = dev_get_drvdata(dev);
+ struct drm_device *ddev = adev->ddev;
+ int temp;
+
+ /* Can't get temperature when the card is off */
+ if ((adev->flags & AMD_IS_PX) &&
+ (ddev->switch_power_state != DRM_SWITCH_POWER_ON))
+ return -EINVAL;
+
+ if (!adev->powerplay.pp_funcs->get_temperature_asic_max)
+ temp = 0;
+ else
+ temp = amdgpu_dpm_get_temperature_asic_max(adev);
+
+ return snprintf(buf, PAGE_SIZE, "%d\n", temp);
+}
+
static ssize_t amdgpu_hwmon_show_temp_thresh(struct device *dev,
struct device_attribute *attr,
char *buf)
@@ -924,6 +945,7 @@
static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, amdgpu_hwmon_show_temp, NULL, 0);
static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, amdgpu_hwmon_show_temp_thresh, NULL, 0);
static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, amdgpu_hwmon_show_temp_thresh, NULL, 1);
+static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, amdgpu_hwmon_show_temp_asic_max, NULL, 0);
static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, amdgpu_hwmon_get_pwm1, amdgpu_hwmon_set_pwm1, 0);
static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR, amdgpu_hwmon_get_pwm1_enable, amdgpu_hwmon_set_pwm1_enable, 0);
static SENSOR_DEVICE_ATTR(pwm1_min, S_IRUGO, amdgpu_hwmon_get_pwm1_min, NULL, 0);
@@ -934,6 +956,7 @@
&sensor_dev_attr_temp1_input.dev_attr.attr,
&sensor_dev_attr_temp1_crit.dev_attr.attr,
&sensor_dev_attr_temp1_crit_hyst.dev_attr.attr,
+ &sensor_dev_attr_temp2_input.dev_attr.attr,
&sensor_dev_attr_pwm1.dev_attr.attr,
&sensor_dev_attr_pwm1_enable.dev_attr.attr,
&sensor_dev_attr_pwm1_min.dev_attr.attr,
@@ -948,6 +971,11 @@
struct device *dev = kobj_to_dev(kobj);
struct amdgpu_device *adev = dev_get_drvdata(dev);
umode_t effective_mode = attr->mode;
+
+ if ((!adev->powerplay.pp_funcs->have_temperature_asic_max ||
+ !amdgpu_dpm_have_temperature_asic_max(adev)) &&
+ (attr == &sensor_dev_attr_temp2_input.dev_attr.attr))
+ return 0;
/* Skip limit attributes if DPM is not enabled */
if (!adev->pm.dpm_enabled &&
diff -rau amdgpu-17.50-511655-orig/amd/amdgpu/ci_dpm.c amdgpu-17.50-511655/amd/amdgpu/ci_dpm.c
--- amdgpu-17.50-511655-orig/amd/amdgpu/ci_dpm.c 2017-12-01 22:30:56.000000000 +0100
+++ amdgpu-17.50-511655/amd/amdgpu/ci_dpm.c 2018-04-27 23:04:47.731689873 +0200
@@ -6260,6 +6260,31 @@
return actual_temp;
}
+/* get temperature in millidegrees */
+static int ci_dpm_get_temp_asic_max(void *handle)
+{
+ u32 temp;
+ int actual_temp = 0;
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ temp = (RREG32_SMC(ixCG_MULT_THERMAL_STATUS) & CG_MULT_THERMAL_STATUS__ASIC_MAX_TEMP_MASK) >>
+ CG_MULT_THERMAL_STATUS__ASIC_MAX_TEMP__SHIFT;
+
+ if (temp & 0x200)
+ actual_temp = 255;
+ else
+ actual_temp = temp & 0x1ff;
+
+ actual_temp = actual_temp * 1000;
+
+ return actual_temp;
+}
+
+static int ci_dpm_have_temp_asic_max(void *handle)
+{
+ return 1;
+}
+
static int ci_set_temperature_range(struct amdgpu_device *adev)
{
int ret;
@@ -7035,6 +7060,8 @@
const struct amd_pm_funcs ci_dpm_funcs = {
.get_temperature = &ci_dpm_get_temp,
+ .get_temperature_asic_max = &ci_dpm_get_temp_asic_max,
+ .have_temperature_asic_max = &ci_dpm_have_temp_asic_max,
.pre_set_power_state = &ci_dpm_pre_set_power_state,
.set_power_state = &ci_dpm_set_power_state,
.post_set_power_state = &ci_dpm_post_set_power_state,
diff -rau amdgpu-17.50-511655-orig/amd/amdgpu/si_dpm.c amdgpu-17.50-511655/amd/amdgpu/si_dpm.c
--- amdgpu-17.50-511655-orig/amd/amdgpu/si_dpm.c 2017-12-01 22:30:56.000000000 +0100
+++ amdgpu-17.50-511655/amd/amdgpu/si_dpm.c 2018-04-27 23:04:47.735689862 +0200
@@ -7890,6 +7890,31 @@
return actual_temp;
}
+static int si_dpm_get_temp_asic_max(void *handle)
+{
+ u32 temp;
+ int actual_temp = 0;
+ struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+
+ temp = (RREG32(CG_MULT_THERMAL_STATUS) & ASIC_MAX_TEMP_MASK) >>
+ ASIC_MAX_TEMP_SHIFT;
+
+ if (temp & 0x200)
+ actual_temp = 255;
+ else
+ actual_temp = temp & 0x1ff;
+
+ actual_temp = (actual_temp * 1000);
+
+ return actual_temp;
+}
+
+static int si_dpm_have_temp_asic_max(void *handle)
+{
+ return 1;
+}
+
+
static u32 si_dpm_get_sclk(void *handle, bool low)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
@@ -8062,6 +8087,8 @@
const struct amd_pm_funcs si_dpm_funcs = {
.get_temperature = &si_dpm_get_temp,
+ .get_temperature_asic_max = &si_dpm_get_temp_asic_max,
+ .have_temperature_asic_max = &si_dpm_have_temp_asic_max,
.pre_set_power_state = &si_dpm_pre_set_power_state,
.set_power_state = &si_dpm_set_power_state,
.post_set_power_state = &si_dpm_post_set_power_state,
diff -rau amdgpu-17.50-511655-orig/amd/include/amd_shared.h amdgpu-17.50-511655/amd/include/amd_shared.h
--- amdgpu-17.50-511655-orig/amd/include/amd_shared.h 2017-12-01 22:30:56.000000000 +0100
+++ amdgpu-17.50-511655/amd/include/amd_shared.h 2018-04-27 23:07:06.611291912 +0200
@@ -289,6 +289,9 @@
int (*get_pp_num_states)(void *handle, struct pp_states_info *data);
int (*get_pp_table)(void *handle, char **table);
int (*set_pp_table)(void *handle, const char *buf, size_t size);
+ // my ASIC_MAX temperature
+ int (*get_temperature_asic_max)(void *handle);
+ int (*have_temperature_asic_max)(void *handle);
};
diff -rau amdgpu-17.50-511655-orig/amd/powerplay/amd_powerplay.c amdgpu-17.50-511655/amd/powerplay/amd_powerplay.c
--- amdgpu-17.50-511655-orig/amd/powerplay/amd_powerplay.c 2017-12-01 22:30:56.000000000 +0100
+++ amdgpu-17.50-511655/amd/powerplay/amd_powerplay.c 2018-04-27 23:04:47.735689862 +0200
@@ -668,6 +668,52 @@
return ret;
}
+static int pp_dpm_get_temperature_asic_max(void *handle)
+{
+ struct pp_hwmgr *hwmgr;
+ struct pp_instance *pp_handle = (struct pp_instance *)handle;
+ int ret = 0;
+
+ ret = pp_check(pp_handle);
+
+ if (ret)
+ return ret;
+
+ hwmgr = pp_handle->hwmgr;
+
+ if (hwmgr->hwmgr_func->get_temperature_asic_max == NULL) {
+ pr_info("%s was not implemented.\n", __func__);
+ return 0;
+ }
+ mutex_lock(&pp_handle->pp_lock);
+ ret = hwmgr->hwmgr_func->get_temperature_asic_max(hwmgr);
+ mutex_unlock(&pp_handle->pp_lock);
+ return ret;
+}
+
+static int pp_dpm_have_temperature_asic_max(void *handle)
+{
+ struct pp_hwmgr *hwmgr;
+ struct pp_instance *pp_handle = (struct pp_instance *)handle;
+ int ret = 0;
+
+ ret = pp_check(pp_handle);
+
+ if (ret)
+ return 0;
+
+ hwmgr = pp_handle->hwmgr;
+
+ if (hwmgr->hwmgr_func == NULL)
+ return 0;
+
+ if (hwmgr->hwmgr_func->get_temperature_asic_max == NULL)
+ return 0;
+ // we have asic max
+ return 1;
+}
+
+
static int pp_dpm_get_pp_num_states(void *handle,
struct pp_states_info *data)
{
@@ -1098,6 +1144,8 @@
const struct amd_pm_funcs pp_dpm_funcs = {
.get_temperature = pp_dpm_get_temperature,
+ .get_temperature_asic_max = pp_dpm_get_temperature_asic_max,
+ .have_temperature_asic_max = pp_dpm_have_temperature_asic_max,
.load_firmware = pp_dpm_load_fw,
.wait_for_fw_loading_complete = pp_dpm_fw_loading_complete,
.force_performance_level = pp_dpm_force_performance_level,
diff -rau amdgpu-17.50-511655-orig/amd/powerplay/hwmgr/smu7_hwmgr.c amdgpu-17.50-511655/amd/powerplay/hwmgr/smu7_hwmgr.c
--- amdgpu-17.50-511655-orig/amd/powerplay/hwmgr/smu7_hwmgr.c 2017-12-01 22:30:56.000000000 +0100
+++ amdgpu-17.50-511655/amd/powerplay/hwmgr/smu7_hwmgr.c 2018-04-27 23:04:47.735689862 +0200
@@ -4670,6 +4670,7 @@
.set_max_fan_pwm_output = smu7_set_max_fan_pwm_output,
.set_max_fan_rpm_output = smu7_set_max_fan_rpm_output,
.get_temperature = smu7_thermal_get_temperature,
+ .get_temperature_asic_max = smu7_thermal_get_temperature_asic_max,
.stop_thermal_controller = smu7_thermal_stop_thermal_controller,
.get_fan_speed_info = smu7_fan_ctrl_get_fan_speed_info,
.get_fan_speed_percent = smu7_fan_ctrl_get_fan_speed_percent,
diff -rau amdgpu-17.50-511655-orig/amd/powerplay/hwmgr/smu7_thermal.c amdgpu-17.50-511655/amd/powerplay/hwmgr/smu7_thermal.c
--- amdgpu-17.50-511655-orig/amd/powerplay/hwmgr/smu7_thermal.c 2017-12-01 22:30:56.000000000 +0100
+++ amdgpu-17.50-511655/amd/powerplay/hwmgr/smu7_thermal.c 2018-04-27 23:04:47.735689862 +0200
@@ -301,6 +301,30 @@
}
/**
+* Reads the remote temperature from the SIslands thermal controller (ASIC MAX)
+*
+* @param hwmgr The address of the hardware manager.
+*/
+int smu7_thermal_get_temperature_asic_max(struct pp_hwmgr *hwmgr)
+{
+ int temp;
+
+ temp = PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC,
+ CG_MULT_THERMAL_STATUS, ASIC_MAX_TEMP);
+
+ /* Bit 9 means the reading is lower than the lowest usable value. */
+ if (temp & 0x200)
+ temp = SMU7_THERMAL_MAXIMUM_TEMP_READING;
+ else
+ temp = temp & 0x1ff;
+
+ temp *= PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
+
+ return temp;
+}
+
+
+/**
* Set the requested temperature range for high and low alert signals
*
* @param hwmgr The address of the hardware manager.
diff -rau amdgpu-17.50-511655-orig/amd/powerplay/hwmgr/smu7_thermal.h amdgpu-17.50-511655/amd/powerplay/hwmgr/smu7_thermal.h
--- amdgpu-17.50-511655-orig/amd/powerplay/hwmgr/smu7_thermal.h 2017-12-01 22:30:56.000000000 +0100
+++ amdgpu-17.50-511655/amd/powerplay/hwmgr/smu7_thermal.h 2018-04-27 23:04:47.735689862 +0200
@@ -39,6 +39,7 @@
#define FDO_PWM_MODE_STATIC_RPM 5
extern int smu7_thermal_get_temperature(struct pp_hwmgr *hwmgr);
+extern int smu7_thermal_get_temperature_asic_max(struct pp_hwmgr *hwmgr);
extern int smu7_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr);
extern int smu7_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr, struct phm_fan_speed_info *fan_speed_info);
extern int smu7_fan_ctrl_get_fan_speed_percent(struct pp_hwmgr *hwmgr, uint32_t *speed);
diff -rau amdgpu-17.50-511655-orig/amd/powerplay/hwmgr/vega10_hwmgr.c amdgpu-17.50-511655/amd/powerplay/hwmgr/vega10_hwmgr.c
--- amdgpu-17.50-511655-orig/amd/powerplay/hwmgr/vega10_hwmgr.c 2017-12-01 22:30:56.000000000 +0100
+++ amdgpu-17.50-511655/amd/powerplay/hwmgr/vega10_hwmgr.c 2018-04-27 23:04:47.735689862 +0200
@@ -5020,6 +5020,7 @@
vega10_notify_smc_display_config_after_ps_adjustment,
.force_dpm_level = vega10_dpm_force_dpm_level,
.get_temperature = vega10_thermal_get_temperature,
+ .get_temperature_asic_max = vega10_thermal_get_temperature_asic_max,
.stop_thermal_controller = vega10_thermal_stop_thermal_controller,
.get_fan_speed_info = vega10_fan_ctrl_get_fan_speed_info,
.get_fan_speed_percent = vega10_fan_ctrl_get_fan_speed_percent,
diff -rau amdgpu-17.50-511655-orig/amd/powerplay/hwmgr/vega10_thermal.c amdgpu-17.50-511655/amd/powerplay/hwmgr/vega10_thermal.c
--- amdgpu-17.50-511655-orig/amd/powerplay/hwmgr/vega10_thermal.c 2017-12-01 22:30:56.000000000 +0100
+++ amdgpu-17.50-511655/amd/powerplay/hwmgr/vega10_thermal.c 2018-04-27 23:10:39.866680825 +0200
@@ -365,6 +365,31 @@
temp = cgs_read_register(hwmgr->device, reg);
+ temp = (temp & CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK) >>
+ CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT;
+
+ temp = temp & 0x1ff;
+
+ temp *= PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
+
+ return temp;
+}
+
+/**
+* Reads the remote temperature from ASIC MAX
+*
+* @param hwmgr The address of the hardware manager.
+*/
+int vega10_thermal_get_temperature_asic_max(struct pp_hwmgr *hwmgr)
+{
+ int temp;
+ uint32_t reg;
+
+ reg = soc15_get_register_offset(THM_HWID, 0,
+ mmCG_MULT_THERMAL_STATUS_BASE_IDX, mmCG_MULT_THERMAL_STATUS);
+
+ temp = cgs_read_register(hwmgr->device, reg);
+
temp = (temp & CG_MULT_THERMAL_STATUS__ASIC_MAX_TEMP_MASK) >>
CG_MULT_THERMAL_STATUS__ASIC_MAX_TEMP__SHIFT;
@@ -375,6 +400,7 @@
return temp;
}
+
/**
* Set the requested temperature range for high and low alert signals
*
diff -rau amdgpu-17.50-511655-orig/amd/powerplay/hwmgr/vega10_thermal.h amdgpu-17.50-511655/amd/powerplay/hwmgr/vega10_thermal.h
--- amdgpu-17.50-511655-orig/amd/powerplay/hwmgr/vega10_thermal.h 2017-12-01 22:30:56.000000000 +0100
+++ amdgpu-17.50-511655/amd/powerplay/hwmgr/vega10_thermal.h 2018-04-27 23:04:47.735689862 +0200
@@ -51,6 +51,7 @@
extern int vega10_thermal_get_temperature(struct pp_hwmgr *hwmgr);
+extern int vega10_thermal_get_temperature_asic_max(struct pp_hwmgr *hwmgr);
extern int vega10_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr);
extern int vega10_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr,
struct phm_fan_speed_info *fan_speed_info);
diff -rau amdgpu-17.50-511655-orig/amd/powerplay/inc/hwmgr.h amdgpu-17.50-511655/amd/powerplay/inc/hwmgr.h
--- amdgpu-17.50-511655-orig/amd/powerplay/inc/hwmgr.h 2017-12-01 22:30:56.000000000 +0100
+++ amdgpu-17.50-511655/amd/powerplay/inc/hwmgr.h 2018-04-27 23:06:15.371438740 +0200
@@ -340,6 +340,8 @@
int (*set_active_display_count)(struct pp_hwmgr *hwmgr, uint32_t count);
int (*set_deep_sleep_dcefclk)(struct pp_hwmgr *hwmgr, uint32_t clock);
int (*start_thermal_controller)(struct pp_hwmgr *hwmgr, struct PP_TemperatureRange *range);
+ // my ASIC MAX temperature
+ int (*get_temperature_asic_max)(struct pp_hwmgr *hwmgr);
};
struct pp_table_func {