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RPC DRAM from Etron reduces the pin count of DRAM interfaces by offering a serial Address/Cmd interface.
It's available in both a standard 96 ball DDR3 package, and a WLCSP. The current OrangeCrab boards should be capable of supporting the 96-ball package with some hw changes.
There is a small errata with the RPC part:
The CS# pin (ball D-3, which is UDM for a DDR3) needs a 50 ohm termination resistor located near the dram and the other end connected to VDDQ
Without the resistor you may get some pretty bad signal integrity / overshoot & undershoot that may possibly cause some problems
Hardware Changes:
Set VDD_DRAM to 1.5V:
R32 <= 100k
Attach 51R termination between CS# (UDM pin on DDR3) and VDDQ
PN: RC0402FR-0751RL
51R suggested placement location
Note: flipped board view. (viewed from back of PCB):
The text was updated successfully, but these errors were encountered:
RPC DRAM from Etron reduces the pin count of DRAM interfaces by offering a serial Address/Cmd interface.
It's available in both a standard 96 ball DDR3 package, and a WLCSP. The current OrangeCrab boards should be capable of supporting the 96-ball package with some hw changes.
There is a small errata with the RPC part:
Hardware Changes:
51R suggested placement location
Note: flipped board view. (viewed from back of PCB):
![Screenshot from 2020-11-04 12-27-55](https://user-images.githubusercontent.com/344310/98060624-f2f67600-1e99-11eb-9885-f066c4eed6f6.png)
The text was updated successfully, but these errors were encountered: