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Add vector CSRs to CSR table
RISC-V ISA Build #1195: Pull request #1714 opened by aswaterman
November 6, 2024 21:41 7m 27s vector-csrs
November 6, 2024 21:41 7m 27s
Release New ISA When Merging a PR
Release New ISA When Merging a PR #235: completed by aswaterman
November 4, 2024 22:54 7m 6s
November 4, 2024 22:54 7m 6s
Clarify note that compilers may need to change vtype for vmv<nr>r.v (…
RISC-V ISA Build #1190: Commit cc636c0 pushed by aswaterman
November 4, 2024 22:47 7m 3s main
November 4, 2024 22:47 7m 3s
Release New ISA When Merging a PR
Release New ISA When Merging a PR #234: completed by aswaterman
November 4, 2024 04:44 7m 19s
November 4, 2024 04:44 7m 19s
standardize "extension" suffix on extensions in priv preface (#1708)
RISC-V ISA Build #1188: Commit d0d5c67 pushed by aswaterman
November 4, 2024 04:38 6m 50s main
November 4, 2024 04:38 6m 50s
Release New ISA When Merging a PR
Release New ISA When Merging a PR #233: completed by aswaterman
November 4, 2024 04:35 6m 59s
November 4, 2024 04:35 6m 59s
standardize "extension" suffix on extensions in priv preface
RISC-V ISA Build #1187: Pull request #1708 opened by aswaterman
November 4, 2024 04:30 7m 4s fix-preface
November 4, 2024 04:30 7m 4s
add ssqosid to extensions table (#1707)
RISC-V ISA Build #1186: Commit 192eeeb pushed by aswaterman
November 4, 2024 04:29 6m 51s main
November 4, 2024 04:29 6m 51s
Add Ssqosid to extensions table in preface
RISC-V ISA Build #1185: Pull request #1707 opened by ved-rivos
November 2, 2024 23:30 7m 8s ved-rivos:1102
November 2, 2024 23:30 7m 8s
Release New ISA When Merging a PR
Release New ISA When Merging a PR #232: completed by aswaterman
November 2, 2024 01:26 7m 40s
November 2, 2024 01:26 7m 40s
Release New ISA When Merging a PR
Release New ISA When Merging a PR #231: completed by aswaterman
November 2, 2024 01:24 7m 2s
November 2, 2024 01:24 7m 2s
Merge branch 'ved-rivos-1101'
RISC-V ISA Build #1184: Commit 6114bf9 pushed by aswaterman
November 2, 2024 01:17 7m 21s main
November 2, 2024 01:17 7m 21s
Move Machine/Supervisor to v1.14-draft (#1706)
RISC-V ISA Build #1183: Commit 4a428b0 pushed by aswaterman
November 2, 2024 01:15 10m 28s main
November 2, 2024 01:15 10m 28s
Move Machine/Supervisor to v1.14-draft
RISC-V ISA Build #1182: Pull request #1706 opened by aswaterman
November 2, 2024 01:08 6m 58s priv-1.14-draft
November 2, 2024 01:08 6m 58s
Integrated Ssqosid extension
RISC-V ISA Build #1181: Pull request #1705 opened by ved-rivos
November 1, 2024 13:41 7m 17s ved-rivos:1101
November 1, 2024 13:41 7m 17s
Release New ISA When Merging a PR
Release New ISA When Merging a PR #230: completed by aswaterman
October 28, 2024 23:39 7m 20s
October 28, 2024 23:39 7m 20s
Fix NOTE about ARM FMA mnemonics (#1700)
RISC-V ISA Build #1177: Commit 34b6e75 pushed by aswaterman
October 28, 2024 23:32 7m 1s main
October 28, 2024 23:32 7m 1s
Fix NOTE about ARM FMA mnemonics
RISC-V ISA Build #1176: Pull request #1700 opened by aswaterman
October 28, 2024 23:25 7m 2s fix-fnmadd-note
October 28, 2024 23:25 7m 2s
Release New ISA When Merging a PR
Release New ISA When Merging a PR #229: completed by aswaterman
October 28, 2024 22:57 7m 6s
October 28, 2024 22:57 7m 6s
Improve table: Compressed instruction formats (#1696)
RISC-V ISA Build #1175: Commit e24a456 pushed by aswaterman
October 28, 2024 22:50 7m 4s main
October 28, 2024 22:50 7m 4s