From 5ea69c3077ee0b3d1b4ea2d657bf5d91d7ea5f42 Mon Sep 17 00:00:00 2001 From: "marco.accame" Date: Thu, 27 Jan 2022 15:25:42 +0100 Subject: [PATCH 1/3] amc: adding support for its spi EEPROM. still wip --- .../board/amc/bsp/embot_hw_bsp_amc.cpp | 175 + .../board/amc/bsp/embot_hw_bsp_amc_config.h | 6 + .../examples/embot-os-hw/bin/.placeholder.txt | 1 + .../cfg/stm32hal.h7.startup.amc.CM7.s | 621 +++ .../embot-os-hw/proj/amc-embot-os-hw.uvoptx | 1869 ++++++++ .../embot-os-hw/proj/amc-embot-os-hw.uvprojx | 4056 +++++++++++++++++ .../embot-os-hw/src/main-embot-os-hw.cpp | 259 ++ .../arch-arm/embot/hw/embot_hw_button.h | 4 +- .../arch-arm/embot/hw/embot_hw_button_bsp.h | 4 +- .../embot/hw/embot_hw_chip_M95512DF.cpp | 429 ++ .../embot/hw/embot_hw_chip_M95512DF.h | 188 + .../arch-arm/embot/hw/embot_hw_eeprom.cpp | 465 ++ .../arch-arm/embot/hw/embot_hw_eeprom.h | 58 + .../arch-arm/embot/hw/embot_hw_eeprom_bsp.h | 117 + .../arch-arm/embot/hw/embot_hw_gpio.cpp | 29 +- .../eBcode/arch-arm/embot/hw/embot_hw_gpio.h | 17 +- .../eBcode/arch-arm/embot/hw/embot_hw_spi.cpp | 644 +++ .../eBcode/arch-arm/embot/hw/embot_hw_spi.h | 151 + .../arch-arm/embot/hw/embot_hw_spi_bsp.h | 66 + .../eBcode/arch-arm/embot/hw/embot_hw_types.h | 13 +- .../lowlevel/stm32hal/api/stm32hal_board.h | 1 + .../lowlevel/stm32hal/proj/stm32hal.h7.uvoptx | 58 +- .../stm32hal/proj/stm32hal.h7.uvprojx | 50 + .../stm32hal/src/board/amc/v1A0/src/gpio.c | 28 +- 24 files changed, 9264 insertions(+), 45 deletions(-) create mode 100644 emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/bin/.placeholder.txt create mode 100644 emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/cfg/stm32hal.h7.startup.amc.CM7.s create mode 100644 emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/proj/amc-embot-os-hw.uvoptx create mode 100644 emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/proj/amc-embot-os-hw.uvprojx create mode 100644 emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/src/main-embot-os-hw.cpp create mode 100644 emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.cpp create mode 100644 emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.h create mode 100644 emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.cpp create mode 100644 emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.h create mode 100644 emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom_bsp.h create mode 100644 emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.cpp create mode 100644 emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.h create mode 100644 emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi_bsp.h diff --git a/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc.cpp b/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc.cpp index 64ef12eb3b..8aa2384f58 100644 --- a/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc.cpp +++ b/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc.cpp @@ -575,5 +575,180 @@ namespace embot { namespace hw { namespace eth { // - support map: end of embot::hw::eth + +// - support map: begin of embot::hw::eeprom + +#include "embot_hw_eeprom.h" +#include "embot_hw_eeprom_bsp.h" + +#if !defined(EMBOT_ENABLE_hw_eeprom) + +namespace embot { namespace hw { namespace eeprom { + + constexpr BSP thebsp { }; + void BSP::init(embot::hw::EEPROM h) const {} + const BSP& getBSP() + { + return thebsp; + } + +}}} + +#else + +namespace embot { namespace hw { namespace eeprom { + + #if defined(STM32HAL_BOARD_AMC) + + // ... + constexpr PROP ee1p = { embot::hw::eeprom::Type::spiM95512DF, + {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::thirteen}, + {embot::hw::GPIO::PORT::G, embot::hw::GPIO::PIN::eight}, + {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::twelve}, + embot::hw::SPI::six + }; + constexpr PROP ee2p = { embot::hw::eeprom::Type::chipM95512DF, + { + embot::hw::SPI::six, + { + {embot::hw::GPIO::PORT::G, embot::hw::GPIO::PIN::eight}, // nS + {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::twelve}, // nW + {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::thirteen}, // nHOLD + { + embot::hw::gpio::Mode::OUTPUTpushpull, + embot::hw::gpio::Pull::nopull, + embot::hw::gpio::Speed::veryhigh + } + } + } + }; + + constexpr BSP thebsp { + // maskofsupported + mask::pos2mask(EEPROM::one) | mask::pos2mask(EEPROM::two), + // properties + {{ + &ee1p, &ee2p + }} + }; + + + void BSP::init(embot::hw::EEPROM h) const {} + + #else + #error embot::hw::bsp::eeprom::thebsp must be defined + #endif + + const BSP& getBSP() + { + return thebsp; + } + +}}} + +#endif // eeprom + +// - support map: end of embot::hw::eeprom + + +// - support map: begin of embot::hw::spi + +#include "embot_hw_spi.h" +#include "embot_hw_spi_bsp.h" + +#if !defined(EMBOT_ENABLE_hw_spi) + +namespace embot { namespace hw { namespace spi { + + constexpr BSP thebsp { }; + void BSP::init(embot::hw::SPI h) const {} + const BSP& getBSP() + { + return thebsp; + } + +}}} + +#else + +namespace embot { namespace hw { namespace spi { + + #if defined(STM32HAL_BOARD_AMC) + + // ... + constexpr PROP spi6p = { &hspi6, 12500000 }; + + static_assert(spi6p.speed == 12.5*1000000, "SPI::six is now 12.5Mhz and must be changed inside MX_SPI6_Init()"); + // SPI::six is used @ 12.Mhz by a M95512-DFMC6 EEPROM and must be < 16MHz + + constexpr BSP thebsp { + // maskofsupported + mask::pos2mask(SPI::six), + // properties + {{ + nullptr, nullptr, nullptr, nullptr, nullptr, &spi6p + }} + }; + + + bool BSP::init(embot::hw::SPI h) const + { + // marco.accame: in here ... MX_SPI6_Ini() calls HAL_SPI_Init() and imposes the speed + // and the low level configuration specified inside cube-mx. + // it is quick and easy BUT: if we want to attach to the same bus more than one type + // of spi sensors (e.g., aea, aea3, AksIM-2, ...) then we must be able to call HAL_SPI_Init() + // with the parameters we want. + // conclusion: we shall move HAL_SPI_Init() out of BSP::init() and inside embot::hw::spi::init() + if(h == SPI::six) + { + MX_SPI6_Init(); + // HAL_SPI_MspInit(&hspi6); // it is called inside HAL_SPI_Init() + return true; + } + + return false; + // the new rule could be: + // if we return true .... non extra init is required inside embot::hw::spi + // else ... we call HAL_SPI_Init() inside embot::hw::spi::init() + // w/ SPI_InitTypeDef values from embot::hw::spi::Config. we dont need to + // have the pins in there as they are initted by HAL_SPI_MspInit. + } + + bool BSP::deinit(embot::hw::SPI h) const + { + if(h == SPI::six) + { + HAL_SPI_DeInit(&hspi6); + // HAL_SPI_MspDeInit(&hspi6); // // it is called inside HAL_SPI_DeInit() + return true; + } + + return false; + } + + #else + #error embot::hw::bsp::spi::thebsp must be defined + #endif + + const BSP& getBSP() + { + return thebsp; + } + +}}} + +extern "C" +{ + void SPI6_IRQHandler(void) + { + HAL_SPI_IRQHandler(&hspi6); + } +} + +#endif // spi + +// - support map: end of embot::hw::spi + + // - end-of-file (leave a blank line after)---------------------------------------------------------------------------- diff --git a/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc_config.h b/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc_config.h index 3e745c8a6e..aff05a93e3 100644 --- a/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc_config.h +++ b/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc_config.h @@ -23,6 +23,12 @@ #define EMBOT_ENABLE_hw_bsp_specialize #define EMBOT_ENABLE_hw_gpio #define EMBOT_ENABLE_hw_led + #define EMBOT_ENABLE_hw_eeprom + #define EMBOT_ENABLE_hw_eeprom_emulatedMODE + + #define EMBOT_ENABLE_hw_spi + #define EMBOT_ENABLE_hw_spi_wipMODE + // #define EMBOT_ENABLE_hw_button // #define EMBOT_ENABLE_hw_can #undef EMBOT_ENABLE_hw_flash diff --git a/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/bin/.placeholder.txt b/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/bin/.placeholder.txt new file mode 100644 index 0000000000..b0eb8200ba --- /dev/null +++ b/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/bin/.placeholder.txt @@ -0,0 +1 @@ +.placeholder diff --git a/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/cfg/stm32hal.h7.startup.amc.CM7.s b/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/cfg/stm32hal.h7.startup.amc.CM7.s new file mode 100644 index 0000000000..b3a6dea97d --- /dev/null +++ b/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/cfg/stm32hal.h7.startup.amc.CM7.s @@ -0,0 +1,621 @@ +;******************** (C) COPYRIGHT 2019 STMicroelectronics ******************** +;* File Name : startup_stm32h745xx.s +;* @author MCD Application Team +;* Description : STM32H7xx devices vector table for MDK-ARM toolchain. +;* This module performs: +;* - Set the initial SP +;* - Set the initial PC == Reset_Handler +;* - Set the vector table entries with the exceptions ISR address +;* - Branches to __main in the C library (which eventually +;* calls main()). +;* After Reset the Cortex-M processor is in Thread mode, +;* priority is Privileged, and the Stack is set to Main. +;* <<< Use Configuration Wizard in Context Menu >>> +;****************************************************************************** +;* @attention +;* +;* Copyright (c) 2019 STMicroelectronics. +;* All rights reserved. +;* +;* This software component is licensed by ST under BSD 3-Clause license, +;* the "License"; You may not use this file except in compliance with the +;* License. You may obtain a copy of the License at: +;* opensource.org/licenses/BSD-3-Clause +;* +;****************************************************************************** + +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x800 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 +Stack_Mem SPACE Stack_Size +__initial_sp + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x8000 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit + + PRESERVE8 + THUMB + + +; Vector Table Mapped to Address 0 at Reset + AREA RESET, DATA, READONLY + EXPORT __Vectors + EXPORT __Vectors_End + EXPORT __Vectors_Size + +__Vectors DCD __initial_sp ; Top of Stack + DCD Reset_Handler ; Reset Handler + DCD NMI_Handler ; NMI Handler + DCD HardFault_Handler ; Hard Fault Handler + DCD MemManage_Handler ; MPU Fault Handler + DCD BusFault_Handler ; Bus Fault Handler + DCD UsageFault_Handler ; Usage Fault Handler + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD SVC_Handler ; SVCall Handler + DCD DebugMon_Handler ; Debug Monitor Handler + DCD 0 ; Reserved + DCD PendSV_Handler ; PendSV Handler + DCD SysTick_Handler ; SysTick Handler + + ; External Interrupts + DCD WWDG_IRQHandler ; Window WatchDog interrupt ( wwdg1_it, wwdg2_it) + DCD PVD_AVD_IRQHandler ; PVD/AVD through EXTI Line detection + DCD TAMP_STAMP_IRQHandler ; Tamper and TimeStamps through the EXTI line + DCD RTC_WKUP_IRQHandler ; RTC Wakeup through the EXTI line + DCD FLASH_IRQHandler ; FLASH + DCD RCC_IRQHandler ; RCC + DCD EXTI0_IRQHandler ; EXTI Line0 + DCD EXTI1_IRQHandler ; EXTI Line1 + DCD EXTI2_IRQHandler ; EXTI Line2 + DCD EXTI3_IRQHandler ; EXTI Line3 + DCD EXTI4_IRQHandler ; EXTI Line4 + DCD DMA1_Stream0_IRQHandler ; DMA1 Stream 0 + DCD DMA1_Stream1_IRQHandler ; DMA1 Stream 1 + DCD DMA1_Stream2_IRQHandler ; DMA1 Stream 2 + DCD DMA1_Stream3_IRQHandler ; DMA1 Stream 3 + DCD DMA1_Stream4_IRQHandler ; DMA1 Stream 4 + DCD DMA1_Stream5_IRQHandler ; DMA1 Stream 5 + DCD DMA1_Stream6_IRQHandler ; DMA1 Stream 6 + DCD ADC_IRQHandler ; ADC1, ADC2 + DCD FDCAN1_IT0_IRQHandler ; FDCAN1 interrupt line 0 + DCD FDCAN2_IT0_IRQHandler ; FDCAN2 interrupt line 0 + DCD FDCAN1_IT1_IRQHandler ; FDCAN1 interrupt line 1 + DCD FDCAN2_IT1_IRQHandler ; FDCAN2 interrupt line 1 + DCD EXTI9_5_IRQHandler ; External Line[9:5]s + DCD TIM1_BRK_IRQHandler ; TIM1 Break interrupt + DCD TIM1_UP_IRQHandler ; TIM1 Update Interrupt + DCD TIM1_TRG_COM_IRQHandler ; TIM1 Trigger and Commutation Interrupt + DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare + DCD TIM2_IRQHandler ; TIM2 + DCD TIM3_IRQHandler ; TIM3 + DCD TIM4_IRQHandler ; TIM4 + DCD I2C1_EV_IRQHandler ; I2C1 Event + DCD I2C1_ER_IRQHandler ; I2C1 Error + DCD I2C2_EV_IRQHandler ; I2C2 Event + DCD I2C2_ER_IRQHandler ; I2C2 Error + DCD SPI1_IRQHandler ; SPI1 + DCD SPI2_IRQHandler ; SPI2 + DCD USART1_IRQHandler ; USART1 + DCD USART2_IRQHandler ; USART2 + DCD USART3_IRQHandler ; USART3 + DCD EXTI15_10_IRQHandler ; External Line[15:10] + DCD RTC_Alarm_IRQHandler ; RTC Alarm (A and B) through EXTI Line + DCD 0 ; Reserved + DCD TIM8_BRK_TIM12_IRQHandler ; TIM8 Break Interrupt and TIM12 global interrupt + DCD TIM8_UP_TIM13_IRQHandler ; TIM8 Update Interrupt and TIM13 global interrupt + DCD TIM8_TRG_COM_TIM14_IRQHandler ; TIM8 Trigger and Commutation Interrupt and TIM14 global interrupt + DCD TIM8_CC_IRQHandler ; TIM8 Capture Compare Interrupt + DCD DMA1_Stream7_IRQHandler ; DMA1 Stream7 + DCD FMC_IRQHandler ; FMC + DCD SDMMC1_IRQHandler ; SDMMC1 + DCD TIM5_IRQHandler ; TIM5 + DCD SPI3_IRQHandler ; SPI3 + DCD UART4_IRQHandler ; UART4 + DCD UART5_IRQHandler ; UART5 + DCD TIM6_DAC_IRQHandler ; TIM6 and DAC1&2 underrun errors + DCD TIM7_IRQHandler ; TIM7 + DCD DMA2_Stream0_IRQHandler ; DMA2 Stream 0 + DCD DMA2_Stream1_IRQHandler ; DMA2 Stream 1 + DCD DMA2_Stream2_IRQHandler ; DMA2 Stream 2 + DCD DMA2_Stream3_IRQHandler ; DMA2 Stream 3 + DCD DMA2_Stream4_IRQHandler ; DMA2 Stream 4 + DCD ETH_IRQHandler ; Ethernet + DCD ETH_WKUP_IRQHandler ; Ethernet Wakeup through EXTI line + DCD FDCAN_CAL_IRQHandler ; FDCAN calibration unit interrupt + DCD CM7_SEV_IRQHandler ; CM7 Send event interrupt for CM4 + DCD CM4_SEV_IRQHandler ; CM4 Send event interrupt for CM7 + DCD 0 ; Reserved + DCD 0 ; Reserved + DCD DMA2_Stream5_IRQHandler ; DMA2 Stream 5 + DCD DMA2_Stream6_IRQHandler ; DMA2 Stream 6 + DCD DMA2_Stream7_IRQHandler ; DMA2 Stream 7 + DCD USART6_IRQHandler ; USART6 + DCD I2C3_EV_IRQHandler ; I2C3 event + DCD I2C3_ER_IRQHandler ; I2C3 error + DCD OTG_HS_EP1_OUT_IRQHandler ; USB OTG HS End Point 1 Out + DCD OTG_HS_EP1_IN_IRQHandler ; USB OTG HS End Point 1 In + DCD OTG_HS_WKUP_IRQHandler ; USB OTG HS Wakeup through EXTI + DCD OTG_HS_IRQHandler ; USB OTG HS + DCD DCMI_IRQHandler ; DCMI + DCD 0 ; Reserved + DCD RNG_IRQHandler ; Rng + DCD FPU_IRQHandler ; FPU + DCD UART7_IRQHandler ; UART7 + DCD UART8_IRQHandler ; UART8 + DCD SPI4_IRQHandler ; SPI4 + DCD SPI5_IRQHandler ; SPI5 + DCD SPI6_IRQHandler ; SPI6 + DCD SAI1_IRQHandler ; SAI1 + DCD LTDC_IRQHandler ; LTDC + DCD LTDC_ER_IRQHandler ; LTDC error + DCD DMA2D_IRQHandler ; DMA2D + DCD SAI2_IRQHandler ; SAI2 + DCD QUADSPI_IRQHandler ; QUADSPI + DCD LPTIM1_IRQHandler ; LPTIM1 + DCD CEC_IRQHandler ; HDMI_CEC + DCD I2C4_EV_IRQHandler ; I2C4 Event + DCD I2C4_ER_IRQHandler ; I2C4 Error + DCD SPDIF_RX_IRQHandler ; SPDIF_RX + DCD OTG_FS_EP1_OUT_IRQHandler ; USB OTG FS End Point 1 Out + DCD OTG_FS_EP1_IN_IRQHandler ; USB OTG FS End Point 1 In + DCD OTG_FS_WKUP_IRQHandler ; USB OTG FS Wakeup through EXTI + DCD OTG_FS_IRQHandler ; USB OTG FS + DCD DMAMUX1_OVR_IRQHandler ; DMAMUX1 Overrun interrupt + DCD HRTIM1_Master_IRQHandler ; HRTIM Master Timer global Interrupts + DCD HRTIM1_TIMA_IRQHandler ; HRTIM Timer A global Interrupt + DCD HRTIM1_TIMB_IRQHandler ; HRTIM Timer B global Interrupt + DCD HRTIM1_TIMC_IRQHandler ; HRTIM Timer C global Interrupt + DCD HRTIM1_TIMD_IRQHandler ; HRTIM Timer D global Interrupt + DCD HRTIM1_TIME_IRQHandler ; HRTIM Timer E global Interrupt + DCD HRTIM1_FLT_IRQHandler ; HRTIM Fault global Interrupt + DCD DFSDM1_FLT0_IRQHandler ; DFSDM Filter0 Interrupt + DCD DFSDM1_FLT1_IRQHandler ; DFSDM Filter1 Interrupt + DCD DFSDM1_FLT2_IRQHandler ; DFSDM Filter2 Interrupt + DCD DFSDM1_FLT3_IRQHandler ; DFSDM Filter3 Interrupt + DCD SAI3_IRQHandler ; SAI3 global Interrupt + DCD SWPMI1_IRQHandler ; Serial Wire Interface 1 global interrupt + DCD TIM15_IRQHandler ; TIM15 global Interrupt + DCD TIM16_IRQHandler ; TIM16 global Interrupt + DCD TIM17_IRQHandler ; TIM17 global Interrupt + DCD MDIOS_WKUP_IRQHandler ; MDIOS Wakeup Interrupt + DCD MDIOS_IRQHandler ; MDIOS global Interrupt + DCD JPEG_IRQHandler ; JPEG global Interrupt + DCD MDMA_IRQHandler ; MDMA global Interrupt + DCD 0 ; Reserved + DCD SDMMC2_IRQHandler ; SDMMC2 global Interrupt + DCD HSEM1_IRQHandler ; HSEM1 global Interrupt + DCD HSEM2_IRQHandler ; HSEM2 global Interrupt + DCD ADC3_IRQHandler ; ADC3 global Interrupt + DCD DMAMUX2_OVR_IRQHandler ; DMAMUX Overrun interrupt + DCD BDMA_Channel0_IRQHandler ; BDMA Channel 0 global Interrupt + DCD BDMA_Channel1_IRQHandler ; BDMA Channel 1 global Interrupt + DCD BDMA_Channel2_IRQHandler ; BDMA Channel 2 global Interrupt + DCD BDMA_Channel3_IRQHandler ; BDMA Channel 3 global Interrupt + DCD BDMA_Channel4_IRQHandler ; BDMA Channel 4 global Interrupt + DCD BDMA_Channel5_IRQHandler ; BDMA Channel 5 global Interrupt + DCD BDMA_Channel6_IRQHandler ; BDMA Channel 6 global Interrupt + DCD BDMA_Channel7_IRQHandler ; BDMA Channel 7 global Interrupt + DCD COMP1_IRQHandler ; COMP1 global Interrupt + DCD LPTIM2_IRQHandler ; LP TIM2 global interrupt + DCD LPTIM3_IRQHandler ; LP TIM3 global interrupt + DCD LPTIM4_IRQHandler ; LP TIM4 global interrupt + DCD LPTIM5_IRQHandler ; LP TIM5 global interrupt + DCD LPUART1_IRQHandler ; LP UART1 interrupt + DCD WWDG_RST_IRQHandler ; Window Watchdog reset interrupt (exti_d2_wwdg_it, exti_d1_wwdg_it) + DCD CRS_IRQHandler ; Clock Recovery Global Interrupt + DCD ECC_IRQHandler ; ECC diagnostic Global Interrupt + DCD SAI4_IRQHandler ; SAI4 global interrupt + DCD 0 ; Reserved + DCD HOLD_CORE_IRQHandler ; Hold core interrupt + DCD WAKEUP_PIN_IRQHandler ; Interrupt for all 6 wake-up pins + + +__Vectors_End + +__Vectors_Size EQU __Vectors_End - __Vectors + + AREA |.text|, CODE, READONLY + +; Reset handler +Reset_Handler PROC + EXPORT Reset_Handler [WEAK] + IMPORT SystemInit + IMPORT __main + + LDR R0, =SystemInit + BLX R0 + LDR R0, =__main + BX R0 + ENDP + +; Dummy Exception Handlers (infinite loops which can be modified) + +NMI_Handler PROC + EXPORT NMI_Handler [WEAK] + B . + ENDP +HardFault_Handler\ + PROC + EXPORT HardFault_Handler [WEAK] + B . + ENDP +MemManage_Handler\ + PROC + EXPORT MemManage_Handler [WEAK] + B . + ENDP +BusFault_Handler\ + PROC + EXPORT BusFault_Handler [WEAK] + B . + ENDP +UsageFault_Handler\ + PROC + EXPORT UsageFault_Handler [WEAK] + B . + ENDP +SVC_Handler PROC + EXPORT SVC_Handler [WEAK] + B . + ENDP +DebugMon_Handler\ + PROC + EXPORT DebugMon_Handler [WEAK] + B . + ENDP +PendSV_Handler PROC + EXPORT PendSV_Handler [WEAK] + B . + ENDP +SysTick_Handler PROC + EXPORT SysTick_Handler [WEAK] + B . + ENDP + +Default_Handler PROC + + EXPORT WWDG_IRQHandler [WEAK] + EXPORT PVD_AVD_IRQHandler [WEAK] + EXPORT TAMP_STAMP_IRQHandler [WEAK] + EXPORT RTC_WKUP_IRQHandler [WEAK] + EXPORT FLASH_IRQHandler [WEAK] + EXPORT RCC_IRQHandler [WEAK] + EXPORT EXTI0_IRQHandler [WEAK] + EXPORT EXTI1_IRQHandler [WEAK] + EXPORT EXTI2_IRQHandler [WEAK] + EXPORT EXTI3_IRQHandler [WEAK] + EXPORT EXTI4_IRQHandler [WEAK] + EXPORT DMA1_Stream0_IRQHandler [WEAK] + EXPORT DMA1_Stream1_IRQHandler [WEAK] + EXPORT DMA1_Stream2_IRQHandler [WEAK] + EXPORT DMA1_Stream3_IRQHandler [WEAK] + EXPORT DMA1_Stream4_IRQHandler [WEAK] + EXPORT DMA1_Stream5_IRQHandler [WEAK] + EXPORT DMA1_Stream6_IRQHandler [WEAK] + EXPORT DMA1_Stream7_IRQHandler [WEAK] + EXPORT ADC_IRQHandler [WEAK] + EXPORT FDCAN1_IT0_IRQHandler [WEAK] + EXPORT FDCAN2_IT0_IRQHandler [WEAK] + EXPORT FDCAN1_IT1_IRQHandler [WEAK] + EXPORT FDCAN2_IT1_IRQHandler [WEAK] + EXPORT EXTI9_5_IRQHandler [WEAK] + EXPORT TIM1_BRK_IRQHandler [WEAK] + EXPORT TIM1_UP_IRQHandler [WEAK] + EXPORT TIM1_TRG_COM_IRQHandler [WEAK] + EXPORT TIM1_CC_IRQHandler [WEAK] + EXPORT TIM2_IRQHandler [WEAK] + EXPORT TIM3_IRQHandler [WEAK] + EXPORT TIM4_IRQHandler [WEAK] + EXPORT I2C1_EV_IRQHandler [WEAK] + EXPORT I2C1_ER_IRQHandler [WEAK] + EXPORT I2C2_EV_IRQHandler [WEAK] + EXPORT I2C2_ER_IRQHandler [WEAK] + EXPORT SPI1_IRQHandler [WEAK] + EXPORT SPI2_IRQHandler [WEAK] + EXPORT USART1_IRQHandler [WEAK] + EXPORT USART2_IRQHandler [WEAK] + EXPORT USART3_IRQHandler [WEAK] + EXPORT EXTI15_10_IRQHandler [WEAK] + EXPORT RTC_Alarm_IRQHandler [WEAK] + EXPORT TIM8_BRK_TIM12_IRQHandler [WEAK] + EXPORT TIM8_UP_TIM13_IRQHandler [WEAK] + EXPORT TIM8_TRG_COM_TIM14_IRQHandler [WEAK] + EXPORT TIM8_CC_IRQHandler [WEAK] + EXPORT DMA1_Stream7_IRQHandler [WEAK] + EXPORT FMC_IRQHandler [WEAK] + EXPORT SDMMC1_IRQHandler [WEAK] + EXPORT TIM5_IRQHandler [WEAK] + EXPORT SPI3_IRQHandler [WEAK] + EXPORT UART4_IRQHandler [WEAK] + EXPORT UART5_IRQHandler [WEAK] + EXPORT TIM6_DAC_IRQHandler [WEAK] + EXPORT TIM7_IRQHandler [WEAK] + EXPORT DMA2_Stream0_IRQHandler [WEAK] + EXPORT DMA2_Stream1_IRQHandler [WEAK] + EXPORT DMA2_Stream2_IRQHandler [WEAK] + EXPORT DMA2_Stream3_IRQHandler [WEAK] + EXPORT DMA2_Stream4_IRQHandler [WEAK] + EXPORT ETH_IRQHandler [WEAK] + EXPORT ETH_WKUP_IRQHandler [WEAK] + EXPORT FDCAN_CAL_IRQHandler [WEAK] + EXPORT CM7_SEV_IRQHandler [WEAK] + EXPORT CM4_SEV_IRQHandler [WEAK] + EXPORT DMA2_Stream5_IRQHandler [WEAK] + EXPORT DMA2_Stream6_IRQHandler [WEAK] + EXPORT DMA2_Stream7_IRQHandler [WEAK] + EXPORT USART6_IRQHandler [WEAK] + EXPORT I2C3_EV_IRQHandler [WEAK] + EXPORT I2C3_ER_IRQHandler [WEAK] + EXPORT OTG_HS_EP1_OUT_IRQHandler [WEAK] + EXPORT OTG_HS_EP1_IN_IRQHandler [WEAK] + EXPORT OTG_HS_WKUP_IRQHandler [WEAK] + EXPORT OTG_HS_IRQHandler [WEAK] + EXPORT DCMI_IRQHandler [WEAK] + EXPORT RNG_IRQHandler [WEAK] + EXPORT FPU_IRQHandler [WEAK] + EXPORT UART7_IRQHandler [WEAK] + EXPORT UART8_IRQHandler [WEAK] + EXPORT SPI4_IRQHandler [WEAK] + EXPORT SPI5_IRQHandler [WEAK] + EXPORT SPI6_IRQHandler [WEAK] + EXPORT SAI1_IRQHandler [WEAK] + EXPORT LTDC_IRQHandler [WEAK] + EXPORT LTDC_ER_IRQHandler [WEAK] + EXPORT DMA2D_IRQHandler [WEAK] + EXPORT SAI2_IRQHandler [WEAK] + EXPORT QUADSPI_IRQHandler [WEAK] + EXPORT LPTIM1_IRQHandler [WEAK] + EXPORT CEC_IRQHandler [WEAK] + EXPORT I2C4_EV_IRQHandler [WEAK] + EXPORT I2C4_ER_IRQHandler [WEAK] + EXPORT SPDIF_RX_IRQHandler [WEAK] + EXPORT OTG_FS_EP1_OUT_IRQHandler [WEAK] + EXPORT OTG_FS_EP1_IN_IRQHandler [WEAK] + EXPORT OTG_FS_WKUP_IRQHandler [WEAK] + EXPORT OTG_FS_IRQHandler [WEAK] + EXPORT DMAMUX1_OVR_IRQHandler [WEAK] + EXPORT HRTIM1_Master_IRQHandler [WEAK] + EXPORT HRTIM1_TIMA_IRQHandler [WEAK] + EXPORT HRTIM1_TIMB_IRQHandler [WEAK] + EXPORT HRTIM1_TIMC_IRQHandler [WEAK] + EXPORT HRTIM1_TIMD_IRQHandler [WEAK] + EXPORT HRTIM1_TIME_IRQHandler [WEAK] + EXPORT HRTIM1_FLT_IRQHandler [WEAK] + EXPORT DFSDM1_FLT0_IRQHandler [WEAK] + EXPORT DFSDM1_FLT1_IRQHandler [WEAK] + EXPORT DFSDM1_FLT2_IRQHandler [WEAK] + EXPORT DFSDM1_FLT3_IRQHandler [WEAK] + EXPORT SAI3_IRQHandler [WEAK] + EXPORT SWPMI1_IRQHandler [WEAK] + EXPORT TIM15_IRQHandler [WEAK] + EXPORT TIM16_IRQHandler [WEAK] + EXPORT TIM17_IRQHandler [WEAK] + EXPORT MDIOS_WKUP_IRQHandler [WEAK] + EXPORT MDIOS_IRQHandler [WEAK] + EXPORT JPEG_IRQHandler [WEAK] + EXPORT MDMA_IRQHandler [WEAK] + EXPORT SDMMC2_IRQHandler [WEAK] + EXPORT HSEM1_IRQHandler [WEAK] + EXPORT HSEM2_IRQHandler [WEAK] + EXPORT ADC3_IRQHandler [WEAK] + EXPORT DMAMUX2_OVR_IRQHandler [WEAK] + EXPORT BDMA_Channel0_IRQHandler [WEAK] + EXPORT BDMA_Channel1_IRQHandler [WEAK] + EXPORT BDMA_Channel2_IRQHandler [WEAK] + EXPORT BDMA_Channel3_IRQHandler [WEAK] + EXPORT BDMA_Channel4_IRQHandler [WEAK] + EXPORT BDMA_Channel5_IRQHandler [WEAK] + EXPORT BDMA_Channel6_IRQHandler [WEAK] + EXPORT BDMA_Channel7_IRQHandler [WEAK] + EXPORT COMP1_IRQHandler [WEAK] + EXPORT LPTIM2_IRQHandler [WEAK] + EXPORT LPTIM3_IRQHandler [WEAK] + EXPORT LPTIM4_IRQHandler [WEAK] + EXPORT LPTIM5_IRQHandler [WEAK] + EXPORT LPUART1_IRQHandler [WEAK] + EXPORT WWDG_RST_IRQHandler [WEAK] + EXPORT CRS_IRQHandler [WEAK] + EXPORT ECC_IRQHandler [WEAK] + EXPORT SAI4_IRQHandler [WEAK] + EXPORT HOLD_CORE_IRQHandler [WEAK] + EXPORT WAKEUP_PIN_IRQHandler [WEAK] + + +WWDG_IRQHandler +PVD_AVD_IRQHandler +TAMP_STAMP_IRQHandler +RTC_WKUP_IRQHandler +FLASH_IRQHandler +RCC_IRQHandler +EXTI0_IRQHandler +EXTI1_IRQHandler +EXTI2_IRQHandler +EXTI3_IRQHandler +EXTI4_IRQHandler +DMA1_Stream0_IRQHandler +DMA1_Stream1_IRQHandler +DMA1_Stream2_IRQHandler +DMA1_Stream3_IRQHandler +DMA1_Stream4_IRQHandler +DMA1_Stream5_IRQHandler +DMA1_Stream6_IRQHandler +ADC_IRQHandler +FDCAN1_IT0_IRQHandler +FDCAN2_IT0_IRQHandler +FDCAN1_IT1_IRQHandler +FDCAN2_IT1_IRQHandler +EXTI9_5_IRQHandler +TIM1_BRK_IRQHandler +TIM1_UP_IRQHandler +TIM1_TRG_COM_IRQHandler +TIM1_CC_IRQHandler +TIM2_IRQHandler +TIM3_IRQHandler +TIM4_IRQHandler +I2C1_EV_IRQHandler +I2C1_ER_IRQHandler +I2C2_EV_IRQHandler +I2C2_ER_IRQHandler +SPI1_IRQHandler +SPI2_IRQHandler +USART1_IRQHandler +USART2_IRQHandler +USART3_IRQHandler +EXTI15_10_IRQHandler +RTC_Alarm_IRQHandler +TIM8_BRK_TIM12_IRQHandler +TIM8_UP_TIM13_IRQHandler +TIM8_TRG_COM_TIM14_IRQHandler +TIM8_CC_IRQHandler +DMA1_Stream7_IRQHandler +FMC_IRQHandler +SDMMC1_IRQHandler +TIM5_IRQHandler +SPI3_IRQHandler +UART4_IRQHandler +UART5_IRQHandler +TIM6_DAC_IRQHandler +TIM7_IRQHandler +DMA2_Stream0_IRQHandler +DMA2_Stream1_IRQHandler +DMA2_Stream2_IRQHandler +DMA2_Stream3_IRQHandler +DMA2_Stream4_IRQHandler +ETH_IRQHandler +ETH_WKUP_IRQHandler +FDCAN_CAL_IRQHandler +CM7_SEV_IRQHandler +CM4_SEV_IRQHandler +DMA2_Stream5_IRQHandler +DMA2_Stream6_IRQHandler +DMA2_Stream7_IRQHandler +USART6_IRQHandler +I2C3_EV_IRQHandler +I2C3_ER_IRQHandler +OTG_HS_EP1_OUT_IRQHandler +OTG_HS_EP1_IN_IRQHandler +OTG_HS_WKUP_IRQHandler +OTG_HS_IRQHandler +DCMI_IRQHandler +RNG_IRQHandler +FPU_IRQHandler +UART7_IRQHandler +UART8_IRQHandler +SPI4_IRQHandler +SPI5_IRQHandler +SPI6_IRQHandler +SAI1_IRQHandler +LTDC_IRQHandler +LTDC_ER_IRQHandler +DMA2D_IRQHandler +SAI2_IRQHandler +QUADSPI_IRQHandler +LPTIM1_IRQHandler +CEC_IRQHandler +I2C4_EV_IRQHandler +I2C4_ER_IRQHandler +SPDIF_RX_IRQHandler +OTG_FS_EP1_OUT_IRQHandler +OTG_FS_EP1_IN_IRQHandler +OTG_FS_WKUP_IRQHandler +OTG_FS_IRQHandler +DMAMUX1_OVR_IRQHandler +HRTIM1_Master_IRQHandler +HRTIM1_TIMA_IRQHandler +HRTIM1_TIMB_IRQHandler +HRTIM1_TIMC_IRQHandler +HRTIM1_TIMD_IRQHandler +HRTIM1_TIME_IRQHandler +HRTIM1_FLT_IRQHandler +DFSDM1_FLT0_IRQHandler +DFSDM1_FLT1_IRQHandler +DFSDM1_FLT2_IRQHandler +DFSDM1_FLT3_IRQHandler +SAI3_IRQHandler +SWPMI1_IRQHandler +TIM15_IRQHandler +TIM16_IRQHandler +TIM17_IRQHandler +MDIOS_WKUP_IRQHandler +MDIOS_IRQHandler +JPEG_IRQHandler +MDMA_IRQHandler +SDMMC2_IRQHandler +HSEM1_IRQHandler +HSEM2_IRQHandler +ADC3_IRQHandler +DMAMUX2_OVR_IRQHandler +BDMA_Channel0_IRQHandler +BDMA_Channel1_IRQHandler +BDMA_Channel2_IRQHandler +BDMA_Channel3_IRQHandler +BDMA_Channel4_IRQHandler +BDMA_Channel5_IRQHandler +BDMA_Channel6_IRQHandler +BDMA_Channel7_IRQHandler +COMP1_IRQHandler +LPTIM2_IRQHandler +LPTIM3_IRQHandler +LPTIM4_IRQHandler +LPTIM5_IRQHandler +LPUART1_IRQHandler +WWDG_RST_IRQHandler +CRS_IRQHandler +ECC_IRQHandler +SAI4_IRQHandler +HOLD_CORE_IRQHandler +WAKEUP_PIN_IRQHandler + + B . + + ENDP + + ALIGN + +;******************************************************************************* +; User Stack and Heap initialization +;******************************************************************************* + IF :DEF:__MICROLIB + + EXPORT __initial_sp + EXPORT __heap_base + EXPORT __heap_limit + + ELSE + + IMPORT __use_two_region_memory + EXPORT __user_initial_stackheap + +__user_initial_stackheap + + LDR R0, = Heap_Mem + LDR R1, =(Stack_Mem + Stack_Size) + LDR R2, = (Heap_Mem + Heap_Size) + LDR R3, = Stack_Mem + BX LR + + ALIGN + + ENDIF + + END + +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/proj/amc-embot-os-hw.uvoptx b/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/proj/amc-embot-os-hw.uvoptx new file mode 100644 index 0000000000..05d4d530c8 --- /dev/null +++ b/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/proj/amc-embot-os-hw.uvoptx @@ -0,0 +1,1869 @@ + + + + 1.0 + +
### uVision Project, (C) Keil Software
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### uVision Project, (C) Keil Software
+ + + + demo-embot-osal-segger + 0x4 + ARM-ADS + 6160000::V6.16::ARMCLANG + 1 + + + STM32H745IIKx:CM7 + STMicroelectronics + Keil.STM32H7xx_DFP.2.8.0 + http://www.keil.com/pack/ + IRAM(0x38000000,0x00010000) IRAM2(0x24000000,0x00080000) IROM(0x08000000,0x00100000) XRAM(0x20000000,0x00020000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC8000 -FN1 -FF0STM32H7x_2048 -FS08000000 -FL0200000 -FP0($$Device:STM32H745IIKx$CMSIS\Flash\STM32H7x_2048.FLM)) + 0 + $$Device:STM32H745IIKx$Drivers\CMSIS\Device\ST\STM32H7xx\Include\stm32h7xx.h + + + + + + + + + + $$Device:STM32H745IIKx$CMSIS\SVD\STM32H745_CM7.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\obj\ + h7disco + 1 + 0 + 1 + 1 + 1 + .\lst\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM7 + SARMCM3.DLL + -MPU + TCM.DLL + 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+ + embot_hw_gpio.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_gpio.cpp + + + embot_hw_led.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_led.cpp + + + embot_hw_lowlevel.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_lowlevel.cpp + + + 2 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 1 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + embot_hw_sys.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_sys.cpp + + + embot_hw_button.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_button.cpp + + + embot_hw_can.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_can.cpp + + + embot_hw_flash.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_flash.cpp + + + embot_hw_eeprom.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_eeprom.cpp + + + embot_hw_spi.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_spi.cpp + + + embot_hw_chip_M95512DF.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_chip_M95512DF.cpp + + + + + embot-os + + + embot_os.cpp + 8 + ..\..\..\..\..\embot\os\embot_os.cpp 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..\..\..\..\..\libs\lowlevel\stm32hal\api;..\..\..\..\..\libs\highlevel\abslayer\cmsisos2\api;..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core;..\..\..\..\..\embot\hw;..\..\..\..\..\embot\os;..\..\..\..\..\embot\app;..\..\..\..\..\embot\app;..\..\..\bsp + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + .\nucleoh7-application0offset.sct + + + --diag_suppress=L6329 + + + + + + + + main + + + main-embot-os-hw.cpp + 8 + ..\src\main-embot-os-hw.cpp + + + + + stm32hal + + + stm32hal.h7.amc.v1A0.lib + 4 + ..\..\..\..\..\libs\lowlevel\stm32hal\lib\stm32hal.h7.amc.v1A0.lib + + + + + stm32hal-config + + + stm32hal.h7.startup.amc.CM7.s + 2 + ..\cfg\stm32hal.h7.startup.amc.CM7.s + + + + + rtos + + + cmsisos2.lib + 4 + ..\..\..\..\..\libs\highlevel\abslayer\cmsisos2\lib\cmsisos2.lib + + + osal.cm4.dbg.lib + 4 + ..\..\..\..\..\libs\highlevel\abslayer\osal\lib\osal.cm4.dbg.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + + + eventviewer.c + 1 + ..\..\..\..\..\libs\midware\eventviewer\src\eventviewer.c + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + + + embot-core + + + embot_core.cpp + 8 + ..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core\embot_core.cpp + + + embot_core_binary.cpp + 8 + ..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core\embot_core_binary.cpp + + + embot_core_utils.cpp + 8 + ..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core\embot_core_utils.cpp + + + + + embot-hw + + + embot_hw_bsp.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_bsp.cpp + + + embot_hw.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw.cpp + + + embot_hw_gpio.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_gpio.cpp + + + embot_hw_led.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_led.cpp + + + embot_hw_lowlevel.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_lowlevel.cpp + + + 2 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 1 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + embot_hw_sys.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_sys.cpp + + + embot_hw_button.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_button.cpp + + + embot_hw_can.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_can.cpp + + + embot_hw_flash.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_flash.cpp + + + embot_hw_eeprom.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_eeprom.cpp + + + embot_hw_spi.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_spi.cpp + + + embot_hw_chip_M95512DF.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_chip_M95512DF.cpp + + + + + embot-os + + + embot_os.cpp + 8 + ..\..\..\..\..\embot\os\embot_os.cpp + + + embot_os_Action.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_Action.cpp + + + embot_os_theCallbackManager.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_theCallbackManager.cpp + + + embot_os_theScheduler.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp + + + embot_os_theTimerManager.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_theTimerManager.cpp + + + embot_os_Thread.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_Thread.cpp + + + embot_os_Timer.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_Timer.cpp + + + embot_os_rtos.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_rtos.cpp + + + + + embot-app + + + embot_app_theLEDmanager.cpp + 8 + ..\..\..\..\..\embot\app\embot_app_theLEDmanager.cpp + + + + + embot::hw::bsp + + + embot_hw_bsp_amc.cpp + 8 + ..\..\..\bsp\embot_hw_bsp_amc.cpp + + + + + + + demo-embot-osal-ulpro + 0x4 + ARM-ADS + 6160000::V6.16::ARMCLANG + 1 + + + STM32H745IIKx:CM7 + STMicroelectronics + Keil.STM32H7xx_DFP.2.8.0 + http://www.keil.com/pack/ + IRAM(0x38000000,0x00010000) IRAM2(0x24000000,0x00080000) IROM(0x08000000,0x00100000) XRAM(0x20000000,0x00020000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE + + + UL2CM3(-S0 -C0 -P0 -FD20000000 -FC8000 -FN1 -FF0STM32H7x_2048 -FS08000000 -FL0200000 -FP0($$Device:STM32H745IIKx$CMSIS\Flash\STM32H7x_2048.FLM)) + 0 + $$Device:STM32H745IIKx$Drivers\CMSIS\Device\ST\STM32H7xx\Include\stm32h7xx.h + + + + + + + + + + $$Device:STM32H745IIKx$CMSIS\SVD\STM32H745_CM7.svd + 0 + 0 + + + + + + + 0 + 0 + 0 + 0 + 1 + + .\obj\ + h7disco + 1 + 0 + 1 + 1 + 1 + .\lst\ + 1 + 0 + 0 + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + + 0 + 0 + + + 0 + 0 + 0 + 0 + + 0 + + + + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 3 + + + 0 + + + SARMCM3.DLL + -REMAP -MPU + DCM.DLL + -pCM7 + SARMCM3.DLL + -MPU + TCM.DLL + -pCM7 + + + + 1 + 0 + 0 + 0 + 16 + + + + + 1 + 0 + 0 + 1 + 1 + 4096 + + 1 + BIN\UL2CM3.DLL + + + + + + 0 + + + + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 1 + 1 + 0 + 1 + 1 + 0 + 0 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 1 + 0 + 0 + "Cortex-M7" + + 0 + 0 + 0 + 1 + 1 + 1 + 0 + 3 + 0 + 0 + 1 + 0 + 8 + 0 + 0 + 0 + 0 + 3 + 4 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 1 + 1 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x38000000 + 0x10000 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x20000000 + 0x20000 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x0 + 0x0 + + + 1 + 0x8000000 + 0x100000 + + + 1 + 0x0 + 0x0 + + + 0 + 0x20000000 + 0x20000 + + + 0 + 0x0 + 0x0 + + + 0 + 0x0 + 0x0 + + + 0 + 0x38000000 + 0x10000 + + + 0 + 0x24000000 + 0x80000 + + + + + + 1 + 2 + 0 + 0 + 1 + 0 + 0 + 0 + 0 + 0 + 3 + 0 + 1 + 0 + 0 + 0 + 3 + 8 + 1 + 1 + 0 + 0 + 0 + + -Wno-pragma-pack -Wno-deprecated-register -DEMBOT_USE_rtos_osal + USE_STM32HAL STM32HAL_BOARD_AMC STM32HAL_DRIVER_V1A0 + + ..\..\..\..\..\libs\lowlevel\stm32hal\api;..\..\..\..\..\libs\highlevel\abslayer\osal\api;..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core;..\..\..\..\..\embot\hw;..\..\..\..\..\embot\os;..\..\..\..\..\embot\app;..\..\..\..\..\embot\app;..\..\..\..\..\libs\midware\eventviewer\api;..\..\..\bsp + + + + 1 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 0 + 4 + + + + + + + + + 1 + 0 + 0 + 0 + 1 + 0 + 0x08000000 + 0x20000000 + + ..\..\embot-updater\proj\stm32h745disco-application0offset.sct + + + --diag_suppress=L6329 + + + + + + + + main + + + main-embot-os-hw.cpp + 8 + ..\src\main-embot-os-hw.cpp + + + + + stm32hal + + + stm32hal.h7.amc.v1A0.lib + 4 + ..\..\..\..\..\libs\lowlevel\stm32hal\lib\stm32hal.h7.amc.v1A0.lib + + + + + stm32hal-config + + + stm32hal.h7.startup.amc.CM7.s + 2 + ..\cfg\stm32hal.h7.startup.amc.CM7.s + + + + + rtos + + + cmsisos2.lib + 4 + ..\..\..\..\..\libs\highlevel\abslayer\cmsisos2\lib\cmsisos2.lib + + + 2 + 0 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + + + osal.cm4.dbg.lib + 4 + ..\..\..\..\..\libs\highlevel\abslayer\osal\lib\osal.cm4.dbg.lib + + + eventviewer.c + 1 + ..\..\..\..\..\libs\midware\eventviewer\src\eventviewer.c + + + + + embot-core + + + embot_core.cpp + 8 + ..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core\embot_core.cpp + + + embot_core_binary.cpp + 8 + ..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core\embot_core_binary.cpp + + + embot_core_utils.cpp + 8 + ..\..\..\..\..\..\..\..\..\icub-firmware-shared\embot\core\embot_core_utils.cpp + + + + + embot-hw + + + embot_hw_bsp.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_bsp.cpp + + + embot_hw.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw.cpp + + + embot_hw_gpio.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_gpio.cpp + + + embot_hw_led.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_led.cpp + + + embot_hw_lowlevel.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_lowlevel.cpp + + + 2 + 0 + 0 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + 11 + + + 1 + + + + 2 + 1 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 2 + 0 + 2 + 2 + 2 + 2 + 2 + 0 + 0 + 2 + 2 + 2 + 2 + 2 + + + + + + + + + + + + embot_hw_sys.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_sys.cpp + + + embot_hw_button.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_button.cpp + + + embot_hw_can.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_can.cpp + + + embot_hw_flash.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_flash.cpp + + + embot_hw_eeprom.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_eeprom.cpp + + + embot_hw_spi.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_spi.cpp + + + embot_hw_chip_M95512DF.cpp + 8 + ..\..\..\..\..\embot\hw\embot_hw_chip_M95512DF.cpp + + + + + embot-os + + + embot_os.cpp + 8 + ..\..\..\..\..\embot\os\embot_os.cpp + + + embot_os_Action.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_Action.cpp + + + embot_os_theCallbackManager.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_theCallbackManager.cpp + + + embot_os_theScheduler.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp + + + embot_os_theTimerManager.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_theTimerManager.cpp + + + embot_os_Thread.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_Thread.cpp + + + embot_os_Timer.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_Timer.cpp + + + embot_os_rtos.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_rtos.cpp + + + + + embot-app + + + embot_app_theLEDmanager.cpp + 8 + ..\..\..\..\..\embot\app\embot_app_theLEDmanager.cpp + + + + + embot::hw::bsp + + + embot_hw_bsp_amc.cpp + 8 + ..\..\..\bsp\embot_hw_bsp_amc.cpp + + + + + + + + + + + + + + + + + amc-embot-os + 0 + 1 + + + + + diff --git a/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/src/main-embot-os-hw.cpp b/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/src/main-embot-os-hw.cpp new file mode 100644 index 0000000000..21f08a34a5 --- /dev/null +++ b/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/src/main-embot-os-hw.cpp @@ -0,0 +1,259 @@ + +/* + * Copyright (C) 2022 iCub Tech - Istituto Italiano di Tecnologia + * Author: Marco Accame + * email: marco.accame@iit.it +*/ + +#define TEST_EMBOT_HW + + +#include "embot_core.h" +#include "embot_core_binary.h" + +#include "embot_hw.h" +#include "embot_hw_bsp.h" +#include "embot_hw_led.h" +#include "embot_hw_sys.h" + + +#include "embot_os_theScheduler.h" +#include "embot_os_theTimerManager.h" +#include "embot_os_theCallbackManager.h" +#include "embot_app_theLEDmanager.h" + +#include + + +constexpr embot::os::Event evtTick = embot::core::binary::mask::pos2mask(0); + +constexpr embot::core::relTime tickperiod = 1000*embot::core::time1millisec; + + +#if defined(TEST_EMBOT_HW) + +#define TEST_EMBOT_HW_EEPROM +#define TEST_EMBOT_HW_CHIP_M95512DF + +void test_embot_hw_init(); +void test_embot_hw_tick(); +#endif + + +void eventbasedthread_startup(embot::os::Thread *t, void *param) +{ + volatile uint32_t c = embot::hw::sys::clock(embot::hw::CLOCK::syscore); + c = c; + + + embot::core::print("mainthread-startup: started timer which sends evtTick to evthread every = " + embot::core::TimeFormatter(tickperiod).to_string()); + + embot::os::Timer *tmr = new embot::os::Timer; + embot::os::Action act(embot::os::EventToThread(evtTick, t)); + embot::os::Timer::Config cfg{tickperiod, act, embot::os::Timer::Mode::forever, 0}; + tmr->start(cfg); + + test_embot_hw_init(); +} + + +void eventbasedthread_onevent(embot::os::Thread *t, embot::os::EventMask eventmask, void *param) +{ + if(0 == eventmask) + { // timeout ... + return; + } + + if(true == embot::core::binary::mask::check(eventmask, evtTick)) + { + embot::core::TimeFormatter tf(embot::core::now()); + embot::core::print("mainthread-onevent: evtTick received @ time = " + tf.to_string(embot::core::TimeFormatter::Mode::full)); + + test_embot_hw_tick(); + } + + +} + + +void onIdle(embot::os::Thread *t, void* idleparam) +{ + static uint32_t i = 0; + i++; +} + +void tMAIN(void *p) +{ + embot::os::Thread* t = reinterpret_cast(p); + t->run(); +} + +void initSystem(embot::os::Thread *t, void* initparam) +{ + volatile uint32_t cpufreq = embot::hw::sys::clock(embot::hw::CLOCK::syscore); + cpufreq = cpufreq; + embot::core::print("this is a demo which shows that this code can run on a dev board. clock = " + std::to_string(cpufreq/1000000) + " MHz"); + + embot::core::print("starting the INIT thread"); + + embot::core::print("INIT: creating the system services: timer manager + callback manager"); + + embot::os::theTimerManager::getInstance().start({}); + embot::os::theCallbackManager::getInstance().start({}); + + embot::core::print("INIT: creating the LED pulser: it will blink a LED at 1 Hz and run a 0.2 Hz waveform on another"); + + static const std::initializer_list allleds = {embot::hw::LED::one, embot::hw::LED::two}; + embot::app::theLEDmanager &theleds = embot::app::theLEDmanager::getInstance(); + theleds.init(allleds); + theleds.get(embot::hw::LED::one).pulse(embot::core::time1second); + embot::app::LEDwaveT<64> ledwave(100*embot::core::time1millisec, 50, std::bitset<64>(0b010101)); + theleds.get(embot::hw::LED::two).wave(&ledwave); + + + embot::core::print("INIT: creating the main thread. it will reveives one periodic tick event and one upon pressure of the blue button"); + + embot::os::EventThread::Config configEV { + 6*1024, + embot::os::Priority::high40, + eventbasedthread_startup, + nullptr, + 50*embot::core::time1millisec, + eventbasedthread_onevent, + "mainThreadEvt" + }; + + + // create the main thread + embot::os::EventThread *thr {nullptr}; + thr = new embot::os::EventThread; + // and start it. w/ osal it will be displayed w/ label tMAIN + thr->start(configEV, tMAIN); + + embot::core::print("quitting the INIT thread. Normal scheduling starts"); +} + + +// -------------------------------------------------------------------------------------------------------------------- + +int main(void) +{ + // steps: + // 1. i init the embot::os + // 2 i start the scheduler + + constexpr embot::os::InitThread::Config initcfg = { 4*1024, initSystem, nullptr }; + constexpr embot::os::IdleThread::Config idlecfg = { 2*1024, nullptr, nullptr, onIdle }; + constexpr embot::core::Callback onOSerror = { }; + constexpr embot::os::Config osconfig {embot::core::time1millisec, initcfg, idlecfg, onOSerror}; + + // embot::os::init() internally calls embot::hw::bsp::init() which also calls embot::core::init() + embot::os::init(osconfig); + + // now i start the os + embot::os::start(); + + // just because i am paranoid (thescheduler.start() never returns) + for(;;); +} + + + +// - other code + + +#if defined(TEST_EMBOT_HW) + +#if defined(TEST_EMBOT_HW_EEPROM) +#include "embot_hw_eeprom.h" + +//constexpr embot::hw::EEPROM eeprom2test {embot::hw::EEPROM::one}; +constexpr embot::hw::EEPROM eeprom2test {embot::hw::EEPROM::two}; + +#endif + +#if defined(TEST_EMBOT_HW_CHIP_M95512DF) + + #include "embot_hw_chip_M95512DF.h" + +#endif + +void test_embot_hw_init() +{ + +#if defined(TEST_EMBOT_HW_CHIP_M95512DF) + + embot::hw::chip::testof_M95512DF(); + +#endif + +#if defined(TEST_EMBOT_HW_EEPROM) + +// if(embot::hw::resOK == embot::hw::eeprom::init(eeprom2test, {}); + + embot::hw::eeprom::init(eeprom2test, {}); + +#endif + + +} + +constexpr size_t capacity {2048}; +uint8_t dd[capacity] = {0}; + +volatile uint8_t stophere = 0; + +embot::core::Time startread {0}; +embot::core::Time readtime {0}; +embot::core::Time startwrite {0}; +embot::core::Time writetime {0}; + +void test_embot_hw_tick() +{ + static uint8_t cnt = 0; + cnt++; + + static uint8_t shift = 0; + size_t numberofbytes = capacity >> shift; + + if(shift>8) + { + shift = 0; + } + else + { + shift++; + } + +#if defined(TEST_EMBOT_HW_EEPROM) + + std::memset(dd, 0, sizeof(dd)); + embot::core::Data data {dd, numberofbytes}; + constexpr embot::core::relTime tout {3*embot::core::time1millisec}; + + startread = embot::core::now(); + embot::hw::eeprom::read(eeprom2test, 0, data, 3*embot::core::time1millisec); + readtime = embot::core::now() - startread; + stophere++; + + std::memset(dd, cnt, sizeof(dd)); + startwrite = embot::core::now(); + embot::hw::eeprom::write(eeprom2test, 0, data, 3*embot::core::time1millisec); + writetime = embot::core::now() - startwrite; + stophere++; + + std::memset(dd, 0, sizeof(dd)); + embot::hw::eeprom::read(eeprom2test, 0, data, 3*embot::core::time1millisec); + + stophere++; + + embot::core::print(std::string("numberofbytes = ") + std::to_string(numberofbytes) + ", read time = " + embot::core::TimeFormatter(readtime).to_string() + ", write time = " + embot::core::TimeFormatter(writetime).to_string()); + + #endif +} + +#endif + + + +// - end-of-file (leave a blank line after)---------------------------------------------------------------------------- diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_button.h b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_button.h index f0c80b72ee..c6fe1e6fe0 100644 --- a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_button.h +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_button.h @@ -19,8 +19,8 @@ // - include guard ---------------------------------------------------------------------------------------------------- -#ifndef _EMBOT_HW_BUTTON_H_ -#define _EMBOT_HW_BUTTON_H_ +#ifndef __EMBOT_HW_BUTTON_H_ +#define __EMBOT_HW_BUTTON_H_ #include "embot_core.h" #include "embot_hw_types.h" diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_button_bsp.h b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_button_bsp.h index be43573f2c..12e774287c 100644 --- a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_button_bsp.h +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_button_bsp.h @@ -7,8 +7,8 @@ // - include guard ---------------------------------------------------------------------------------------------------- -#ifndef _EMBOT_HW_I2C_BUTTON_H_ -#define _EMBOT_HW_I2C_BUTTON_H_ +#ifndef __EMBOT_HW_BUTTON_BSP_H_ +#define __EMBOT_HW_BUTTON_BSP_H_ #include "embot_core.h" diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.cpp b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.cpp new file mode 100644 index 0000000000..d43027433c --- /dev/null +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.cpp @@ -0,0 +1,429 @@ + +/* + * Copyright (C) 2022 iCub Tech - Istituto Italiano di Tecnologia + * Author: Marco Accame + * email: marco.accame@iit.it +*/ + + +// -------------------------------------------------------------------------------------------------------------------- +// - public interface +// -------------------------------------------------------------------------------------------------------------------- + +#include "embot_hw_chip_M95512DF.h" + +// -------------------------------------------------------------------------------------------------------------------- +// - test code. i place this section in here because .... we just need the .h file +// -------------------------------------------------------------------------------------------------------------------- + +#if defined(EMBOT_HW_CHIP_M95512DF_enable_test) + +// it tests the chip and offers an example of use +void embot::hw::chip::testof_M95512DF() +{ + // this configuration tells about which spi bus to use, which are the control pins + // and their low level GPIO configuration + // some extra info: + // 1. this configuration is typically used by the embot::hw::eeprom and defined + // inside embot::hw::eeprom::thebsp located inside mbot_hw_bsp_nameofboard.cpp + // 2. the spi bus in here specified is initted by M95512DF code w/ a + // call to embot::hw::spi::init() in a way that is specified by + // embot::hw::spi::thebsp typically placed inside embot_hw_bsp_nameofboard.cpp + // 3. the control pins are initialised / deinitialised inside M95512DF only if + // embot::hw::chip::M95512DF::Config::PinControl::config.isvalid() + constexpr embot::hw::chip::M95512DF::Config cfg + { + embot::hw::SPI::six, // the spi bus + { // the control pins + {embot::hw::GPIO::PORT::G, embot::hw::GPIO::PIN::eight}, // nS + {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::twelve}, // nW + {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::thirteen}, // nHOLD + { // GPIO configuration of the control pins + embot::hw::gpio::Mode::OUTPUTpushpull, + embot::hw::gpio::Pull::nopull, + embot::hw::gpio::Speed::veryhigh + } + } + }; + + // address in EEPROM, data to write, destination for data to read + constexpr embot::hw::chip::M95512DF::ADR adr {64}; + uint8_t bytes2write[8] {1, 2, 3, 4, 5, 6, 7, 8}; + const embot::core::Data data2write {bytes2write, sizeof(bytes2write)}; + uint8_t bytes2read[4] {0}; + embot::core::Data data2read {bytes2read, sizeof(bytes2read)}; + + // step 01: create the object + embot::hw::chip::M95512DF *chipM95512DF = new embot::hw::chip::M95512DF; + + bool ok {false}; + + // step 02: initialise it (for extra check i also deinit and init it again) + chipM95512DF->init(cfg); + chipM95512DF->deinit(); + if(true == chipM95512DF->init(cfg)) + { + // step 03: write some data to EEPROM + if(true == chipM95512DF->write(adr, data2write)) + { + // step 04: read data back + if(true == chipM95512DF->read(adr+1, data2read)) + { + // step 05: compare them + ok = (bytes2read[0] == bytes2write[1]) ? true : false; + } + } + } + + // step 06: print result + embot::core::print(ok ? "test chipM95512DF: OK" : "test chipM95512DF: KO"); + + // step 07: delete the object: the destructor also deinits + delete chipM95512DF; +} + + +#endif + + +// -------------------------------------------------------------------------------------------------------------------- +// - pimpl: private implementation (see scott meyers: item 22 of effective modern c++, item 31 of effective c++ +// -------------------------------------------------------------------------------------------------------------------- + +// we dont actually need stm32hal in here ... just embot::hw gpio and spi +//#if defined(USE_STM32HAL) +// #include "stm32hal.h" +//#else +// #warning this implementation is only for stm32hal +//#endif + +#include "embot_hw_gpio.h" +#include "embot_hw_spi.h" + +using namespace std; + +using namespace embot::hw; + + +struct embot::hw::chip::M95512DF::Impl +{ + enum class CMD : uint8_t { + WREN = 0x06, WRDI = 0x04, RDSR = 0x05, WRSR = 0x01, + READ = 0x03, WRITE = 0x02, RDID = 0x83, WRID = 0x82, + RDLS = 0x83 + }; + + static constexpr embot::core::relTime deftimeout {100*embot::core::time1millisec}; + static constexpr embot::core::relTime writetimeout {5*embot::core::time1millisec}; + + bool _initted {false}; + Config _config {}; + + Impl() = default; + ~Impl() { deinit(); } + + bool init(const Config &cfg); + bool deinit(); + bool write(ADR adr, const embot::core::Data &data); + bool read(ADR adr, embot::core::Data &data); + void writeprotect(bool enable); + +private: + + // bit values in EEPROM status register + static constexpr uint8_t EE_SR_SRWD {0x80}; + static constexpr uint8_t EE_SR_BP1 {0x08}; + static constexpr uint8_t EE_SR_BP0 {0x04}; + static constexpr uint8_t EE_SR_WEL {0x02}; + static constexpr uint8_t EE_SR_WIP {0x01}; + + // values for BP1 and BP0 bits in status register + static constexpr uint8_t EE_SR_BP_MASK {EE_SR_BP1|EE_SR_BP0}; + static constexpr uint8_t EE_SR_BP_NONE {0|0}; + static constexpr uint8_t EE_SR_BP_TOPQUARTER {0|EE_SR_BP0}; + static constexpr uint8_t EE_SR_BP_TOPHALF {EE_SR_BP1|0}; + static constexpr uint8_t EE_SR_BP_ALL {EE_SR_BP1|EE_SR_BP0}; + + void chipselect(bool enable); + void hold(bool enable); + bool send(const embot::core::Data &data); + bool recv(embot::core::Data &dd); + bool cmd(CMD c); + bool cmdtx(CMD c, uint8_t v); + bool cmdrx(CMD c, uint8_t &v); + ADR adjustaddress(ADR adr); + bool writeinpage(ADR adr, const embot::core::Data &data); + bool initpincontrol(); + bool deinitpincontrol(); +}; + +bool embot::hw::chip::M95512DF::Impl::initpincontrol() +{ +// static constexpr embot::hw::gpio::Config cfg +// { +// embot::hw::gpio::Mode::OUTPUTpushpull, +// embot::hw::gpio::Pull::nopull, +// embot::hw::gpio::Speed::veryhigh +// }; + + if(true == _config.pincontrol.config.isvalid()) + { + // marco.accame: cube-mx sets the value of the pin before initialization, + // so in here we do the same. NOTE that embot::hw::gpio::set() allows that. + embot::hw::gpio::set(_config.pincontrol.nS, embot::hw::gpio::State::SET); + embot::hw::gpio::set(_config.pincontrol.nHOLD, embot::hw::gpio::State::SET); + embot::hw::gpio::set(_config.pincontrol.nW, embot::hw::gpio::State::RESET); + + embot::hw::gpio::init(_config.pincontrol.nS, _config.pincontrol.config); + embot::hw::gpio::init(_config.pincontrol.nHOLD, _config.pincontrol.config); + embot::hw::gpio::init(_config.pincontrol.nW, _config.pincontrol.config); + } + + return true; +} + + +bool embot::hw::chip::M95512DF::Impl::deinitpincontrol() +{ + if(true == _config.pincontrol.config.isvalid()) + { + embot::hw::gpio::set(_config.pincontrol.nS, embot::hw::gpio::State::SET); + embot::hw::gpio::set(_config.pincontrol.nHOLD, embot::hw::gpio::State::SET); + embot::hw::gpio::set(_config.pincontrol.nW, embot::hw::gpio::State::RESET); + + embot::hw::gpio::deinit(_config.pincontrol.nS); + embot::hw::gpio::deinit(_config.pincontrol.nHOLD); + embot::hw::gpio::deinit(_config.pincontrol.nW); + } + + return true; +} + +bool embot::hw::chip::M95512DF::Impl::init(const Config &cfg) +{ + if((true == _initted) && (false == cfg.isvalid())) + { + return false; + } + + _config = cfg; + + initpincontrol(); + + hold(false); + writeprotect(false); + if(resOK == embot::hw::spi::init(_config.spi, {})) + { + _initted = true; + } + + return _initted; +} + +bool embot::hw::chip::M95512DF::Impl::deinit() +{ + if(_initted) + { + deinitpincontrol(); + embot::hw::spi::deinit(_config.spi); + _initted = false; + } + + return !_initted; +} + +bool embot::hw::chip::M95512DF::Impl::write(ADR adr, const embot::core::Data &data) +{ + // bool r {false}; + + if((false == data.isvalid()) || ((adr + data.capacity) > storagesize)) + { // no need to check if(adr >= storagesize) + return false; + } + constexpr size_t pagemask {pagelength-1}; + embot::core::Data remainingdata {data.pointer, data.capacity}; + size_t delta {pagelength - (adr & pagemask)}; + for(; remainingdata.capacity; ) + { + delta = (delta > remainingdata.capacity) ? remainingdata.capacity : delta; + + // enable write and write to the status register + if(true == cmd(CMD::WREN)) + { + embot::core::Data data2writeinpage {remainingdata.pointer, delta}; + if(true == writeinpage(adr, data2writeinpage)) + { + // now we read the status until it is ok, but no longer than 5 ms + embot::core::Time expirytime {embot::core::now() + writetimeout}; + uint8_t status {0}; + while((true == cmdrx(CMD::RDSR, status)) && (0 != (status & EE_SR_WIP))) + { + if(embot::core::now() > expirytime) + { + // timeout .... + return false; + } + } + } + // update values + remainingdata.capacity -= delta; + adr += delta; + remainingdata.pointer = reinterpret_cast(remainingdata.pointer) + delta; + delta = pagelength; + } + } + return true; +} + + +bool embot::hw::chip::M95512DF::Impl::read(ADR adr, embot::core::Data &data) +{ + if((false == data.isvalid()) || ((adr + data.capacity) > storagesize)) + { // no need to check if(adr >= storagesize) + return false; + } + + bool r {false}; + adr = adjustaddress(adr); + chipselect(true); + uint8_t cc {embot::core::tointegral(CMD::READ)}; + if(true == send({&cc, 1})) + { + if(true == send({&adr, 2})) + { + r = recv(data); + } + } + chipselect(false); + return r; +} + + +void embot::hw::chip::M95512DF::Impl::chipselect(bool enable) +{ + embot::hw::gpio::set(_config.pincontrol.nS, enable ? embot::hw::gpio::State::RESET : embot::hw::gpio::State::SET); +} + +void embot::hw::chip::M95512DF::Impl::hold(bool enable) +{ + embot::hw::gpio::set(_config.pincontrol.nHOLD, enable ? embot::hw::gpio::State::RESET : embot::hw::gpio::State::SET); +} + +void embot::hw::chip::M95512DF::Impl::writeprotect(bool enable) +{ + embot::hw::gpio::set(_config.pincontrol.nW, enable ? embot::hw::gpio::State::SET : embot::hw::gpio::State::RESET); +} + +bool embot::hw::chip::M95512DF::Impl::send(const embot::core::Data &data) +{ + return (resOK == embot::hw::spi::write(_config.spi, data, deftimeout)) ? true : false; +} + +bool embot::hw::chip::M95512DF::Impl::recv(embot::core::Data &dd) +{ + return (resOK == embot::hw::spi::read(_config.spi, dd, deftimeout)) ? true : false; +} + +bool embot::hw::chip::M95512DF::Impl::cmd(CMD c) +{ + bool r {false}; + chipselect(true); + uint8_t cc {embot::core::tointegral(c)}; + r = send({&cc, 1}); + chipselect(false); + return r; +} + +bool embot::hw::chip::M95512DF::Impl::cmdtx(CMD c, uint8_t v) +{ + bool r {false}; + chipselect(true); + uint8_t cc {embot::core::tointegral(c)}; + if(true == send({&cc, 1})) + { + uint8_t vv {v}; + r = send({&vv, 1}); + } + chipselect(false); + return r; +} + +bool embot::hw::chip::M95512DF::Impl::cmdrx(CMD c, uint8_t &v) +{ + bool r {false}; + chipselect(true); + uint8_t cc {embot::core::tointegral(c)}; + if(true == send({&cc, 1})) + { + embot::core::Data data {&v, 1}; + r = recv(data); + } + chipselect(false); + return r; +} + +embot::hw::chip::M95512DF::ADR embot::hw::chip::M95512DF::Impl::adjustaddress(embot::hw::chip::M95512DF::ADR adr) +{ +// return __REV16(adr); + static_assert(sizeof(embot::hw::chip::M95512DF::ADR) == 2, "this code is valid only for an address of 16 bits"); + return (adr>>8) | ((adr&0xff)<<8); +} + +bool embot::hw::chip::M95512DF::Impl::writeinpage(ADR adr, const embot::core::Data &data) +{ + bool r {false}; + adr = adjustaddress(adr); + chipselect(true); + uint8_t cc {embot::core::tointegral(CMD::WRITE)}; + if(true == send({&cc, 1})) + { + if(true == send({&adr, 2})) + { + r = send(data); + } + } + chipselect(false); + return r; +} + + +// -------------------------------------------------------------------------------------------------------------------- +// - interface to the pimpl +// -------------------------------------------------------------------------------------------------------------------- + + +embot::hw::chip::M95512DF::M95512DF() +: pImpl(new Impl) +{ + +} + +embot::hw::chip::M95512DF::~M95512DF() +{ + delete pImpl; +} + +bool embot::hw::chip::M95512DF::init(const Config &config) +{ + return pImpl->init(config); +} + +bool embot::hw::chip::M95512DF::deinit() +{ + return pImpl->deinit(); +} + +bool embot::hw::chip::M95512DF::read(ADR adr, embot::core::Data &data) +{ + return pImpl->read(adr, data); +} + +bool embot::hw::chip::M95512DF::write(ADR adr, const embot::core::Data &data) +{ + return pImpl->write(adr, data); +} + + + +// - end-of-file (leave a blank line after)---------------------------------------------------------------------------- + diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.h b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.h new file mode 100644 index 0000000000..aeb2f966a6 --- /dev/null +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.h @@ -0,0 +1,188 @@ + +/* + * Copyright (C) 2022 iCub Tech - Istituto Italiano di Tecnologia + * Author: Marco Accame + * email: marco.accame@iit.it +*/ + +// - include guard ---------------------------------------------------------------------------------------------------- + +#ifndef __EMBOT_HW_CHIP_M95512DF_H_ +#define __EMBOT_HW_CHIP_M95512DF_H_ + +#include "embot_core.h" +#include "embot_hw_types.h" +#include "embot_hw_spi.h" +#include "embot_hw_gpio.h" + + +#if 0 +## Description +This class `embot::hw::chip::M95512DF` implements a device driver for the chip [M95512-DF](https://www.st.com/en/memories/m95512-df.html) which is an SPI EEPROM of size 64 KB and page size 128 B. + +``` + Vcc + | + --------- + | | + D ---| | + C ---| | + nS --o| M95xxx |--- Q + nW --o| | + nHOLD --o| | + | | + --------- + | + Vss + +``` +**Figure 1**. Logic diagram. + + + +| Signal name | Function | Direction | Description | +| ----------- | ------------------ | --------- | ------------------------------------------------------------ | +| C | Serial Clock | Input | | +| D | Serial data input | Input | | +| Q | Serial data output | Output | | +| nS | Chip select | Input | When this input signal is high, the device is deselected. Driving Chip select low selects the device. | +| nW | Write protect | Input | The main purpose of this input signal is to freeze the size of the area of memory that is protected against Write instructions. | +| nHOLD | Hold | Input | Used to pause any serial communications with the device without deselecting the device | +| Vcc | Supply voltage | - | | +| Vss | Ground | - | | + +**Table 1**. Signals. + + + +## Basic usage + +You can use the following code, as long as the settings for SPI are specified by the bsp of the board. + +```c++ +#include "embot_hw_chip_M95512DF.h" + +embot::hw::chip::M95512DF *chipM95512DF {nullptr}; +constexpr embot::hw::chip::M95512DF::Config cfg +{ + embot::hw::SPI::six, // the spi bus + {embot::hw::GPIO::PORT::G, embot::hw::GPIO::PIN::eight}, // nS + {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::twelve}, // nW + {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::thirteen} // nHOLD +}; +constexpr embot::hw::chip::M95512DF::ADR adr {64}; +uint8_t bytes2write[8] {1, 2, 3, 4, 5, 6, 7, 8}; +const embot::core::Data data2write {bytes2write, sizeof(bytes2write)}; +uint8_t bytes2read[4] {0}; +embot::core::Data data2read {bytes2read, sizeof(bytes2read)}; + +chipM95512DF = new embot::hw::chip::M95512DF; +bool ok {false}; +if(true == chipM95512DF->init(cfg)) +{ + if(true == chipM95512DF->write(adr, data2write)) + { + if(true == chipM95512DF->read(adr+1, data2read)) + { + ok = (bytes2read[0] == bytes2write[1]) ? true : false; + } + } +} + +delete chipM95512DF; + +embot::core::print(ok ? "test chipM95512DF: OK" : "test chipM95512DF: KO"); + +``` + +Code listing. Usage of the class + + +## Caveat Emptor + +The interface of the device driver is kept intentionally simple and some features are left (for now) inside the private implementation. + +## References +[1] Datasheet of M95512-W M95512-R M95512-DF, DS4192 - Rev 24 - September 2021 + +#endif + + +namespace embot { namespace hw { namespace chip { + + class M95512DF + { + + public: + + using ADR = uint16_t; + static constexpr size_t storagesize {64*1024}; + static constexpr size_t pagelength {128}; + + struct PinControl + { // contains: chip select, write protection and hold (see page 2 of [1]) + embot::hw::GPIO nS {}; + embot::hw::GPIO nW {}; + embot::hw::GPIO nHOLD {}; + // it also has a config for the pins. + // if config.isvalid() then the M95512DF will also initialise the pin else ... just use them + embot::hw::gpio::Config config { + embot::hw::gpio::Mode::OUTPUTpushpull, + embot::hw::gpio::Pull::nopull, + embot::hw::gpio::Speed::veryhigh + }; + constexpr PinControl() = default; + constexpr PinControl(const embot::hw::GPIO& ns, const embot::hw::GPIO& nw, const embot::hw::GPIO& nhold, + const embot::hw::gpio::Config& cfg) + : nS(ns), nW(nw), nHOLD(nhold), config(cfg) {} + constexpr bool isvalid() const { + return embot::hw::gpio::supported(nW) && embot::hw::gpio::supported(nHOLD) && embot::hw::gpio::supported(nS); + } + }; + + struct Config + { // contains: spi bus and pin control + embot::hw::SPI spi {embot::hw::SPI::none}; + PinControl pincontrol {}; + constexpr Config() = default; + constexpr Config(embot::hw::SPI s, const PinControl &pc) + : spi(s), pincontrol(pc) {} + constexpr bool isvalid() const { + return embot::hw::spi::supported(spi) && pincontrol.isvalid(); + } + }; + + M95512DF(); + ~M95512DF(); + + bool isinitted() const; + bool init(const Config &config); + bool deinit(); + + bool read(ADR adr, embot::core::Data &data); + bool write(ADR adr, const embot::core::Data &data); + + private: + struct Impl; + Impl *pImpl; + }; + + +}}} // namespace embot { namespace hw { namespace chip { + + +#define EMBOT_HW_CHIP_M95512DF_enable_test +#if defined(EMBOT_HW_CHIP_M95512DF_enable_test) +namespace embot { namespace hw { namespace chip { + // it tests the chip and offers an example of use + void testof_M95512DF(); +}}} +#endif + + + +#endif // include-guard + + +// - end-of-file (leave a blank line after)---------------------------------------------------------------------------- + diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.cpp b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.cpp new file mode 100644 index 0000000000..ab065e887e --- /dev/null +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.cpp @@ -0,0 +1,465 @@ + +/* + * Copyright (C) 2022 iCub Tech - Istituto Italiano di Tecnologia + * Author: Marco Accame + * email: marco.accame@iit.it +*/ + + +// -------------------------------------------------------------------------------------------------------------------- +// - public interface +// -------------------------------------------------------------------------------------------------------------------- + +#include "embot_hw_eeprom.h" + + +// -------------------------------------------------------------------------------------------------------------------- +// - external dependencies +// -------------------------------------------------------------------------------------------------------------------- + + +#include "embot_hw_bsp_config.h" +#include "embot_hw_eeprom_bsp.h" + +#include +#include +#include "embot_core_binary.h" +#include "embot_hw_sys.h" + +#if defined(USE_STM32HAL) + #include "stm32hal.h" +#else + #warning this implementation is only for stm32hal +#endif + + + +#if defined(EMBOT_ENABLE_hw_eeprom_emulatedMODE) + + #warning CAVEAT EMPTOR: EMBOT_ENABLE_hw_eeprom_emulatedMODE is defined ...... + + + constexpr uint8_t fake_sizeofdataee {100}; + constexpr uint8_t fake_dataeedefvalue {14}; + uint8_t fake_dataee[fake_sizeofdataee] = {0}; + + embot::core::Data fake_eeprom {fake_dataee, fake_sizeofdataee}; + +#endif + +using namespace std; + +using namespace embot::hw; + + +#if !defined(EMBOT_ENABLE_hw_eeprom) + +namespace embot { namespace hw { namespace eeprom { + + bool supported(EEPROM ee) + { return false; } + bool initialised(EEPROM ee) + { return false; } + result_t init(EEPROM ee, const Config &config) + { return resNOK; } + const Config & config(EEPROM ee) + { static Config cfg {}; return cfg; } + result_t read(EEPROM ee, ADR adr, embot::core::Data &destination, embot::core::relTime timeout) + { return resNOK; } + result_t write(EEPROM ee, ADR adr, const embot::core::Data &content, embot::core::relTime timeout) + { return resNOK; } + +}}} // namespace embot { namespace hw { namespace eeprom { + +#else + +namespace embot { namespace hw { namespace eeprom { + + +/* Bit values in EEPROM status register */ +#define EE_SR_SRWD (0x80) +#define EE_SR_BP1 (0x08) +#define EE_SR_BP0 (0x04) +#define EE_SR_WEL (0x02) +#define EE_SR_WIP (0x01) + +/* Values for BP1 and BP0 bits in status register */ +#define EE_SR_BP_MASK (EE_SR_BP1|EE_SR_BP0) +#define EE_SR_BP_NONE (0|0) +#define EE_SR_BP_TOPQUARTER (0|EE_SR_BP0) +#define EE_SR_BP_TOPHALF (EE_SR_BP1|0) +#define EE_SR_BP_ALL (EE_SR_BP1|EE_SR_BP0) + + // definition of chip M95512DF + // dont use pimpl. for now + struct M95512DF + { + static constexpr size_t pagelength {128}; + static constexpr size_t storagesize {64*1024}; + static constexpr embot::core::relTime deftimeout {100*embot::core::time1millisec}; + static constexpr embot::core::relTime writetimeout {5*embot::core::time1millisec}; + enum class CMD : uint8_t { + WREN = 0x06, WRDI = 0x04, RDSR = 0x05, WRSR = 0x01, READ = 0x03, WRITE = 0x02, RDID = 0x83, WRID = 0x82, RDLS = 0x83 + }; + using ADR = uint16_t; + + struct Config + { + embot::hw::SPI spi {embot::hw::SPI::six}; + embot::hw::GPIO nWP {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::twelve}; + embot::hw::GPIO nHOLD {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::thirteen}; + embot::hw::GPIO nSEL {embot::hw::GPIO::PORT::G, embot::hw::GPIO::PIN::eight}; + constexpr Config() = default; + constexpr Config(embot::hw::SPI s, const embot::hw::GPIO& nwp, + const embot::hw::GPIO& nhold, const embot::hw::GPIO& nsel) : spi(s), nWP(nwp), nHOLD(nhold), nSEL(nsel) {} + }; + + Config config {}; + + M95512DF() = default; + + + bool init(const Config &cfg) + { + bool r {false}; + + config = cfg; + + holdcontrol(false); + writecontrol(false); + if(resOK == embot::hw::spi::init(config.spi, {})) + { + r = true; + } + + return r; + } + + + bool write(ADR adr, const embot::core::Data &data) + { + //bool r {false}; + + if((false == data.isvalid()) || ((adr + data.capacity) > storagesize)) + { // no need to check if(adr >= storagesize) + return false; + } + constexpr size_t pagemask {pagelength-1}; + embot::core::Data remainingdata {data.pointer, data.capacity}; + size_t delta {pagelength - (adr & pagemask)}; + for(; remainingdata.capacity; ) + { + delta = (delta > remainingdata.capacity) ? remainingdata.capacity : delta; + + // enable write and write to the status register + if(true == cmd(CMD::WREN)) + { + embot::core::Data data2writeinpage {remainingdata.pointer, delta}; + if(true == writeinpage(adr, data2writeinpage)) + { + // now we read the status until it is ok, but no longer than 5 ms + embot::core::Time expirytime {embot::core::now() + writetimeout}; + uint8_t status {0}; + while((true == cmdrx(CMD::RDSR, status)) && (0 != (status & EE_SR_WIP))) + { + if(embot::core::now() > expirytime) + { + // timeout .... + return false; + } + } + } + // update values + remainingdata.capacity -= delta; + adr += delta; + remainingdata.pointer = reinterpret_cast(remainingdata.pointer) + delta; + delta = pagelength; + } + } + return true; + } + + + bool read(ADR adr, embot::core::Data &data) + { + if((false == data.isvalid()) || ((adr + data.capacity) > storagesize)) + { // no need to check if(adr >= storagesize) + return false; + } + + bool r {false}; + adr = adjustaddress(adr); + //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::RESET); + select(true); + uint8_t cc {embot::core::tointegral(CMD::READ)}; + if(true == send({&cc, 1})) + { + if(true == send({&adr, 2})) + { + r = recv(data); + } + } + //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::SET); + select(false); + return r; + } + + private: + + void select(bool enable) + { + embot::hw::gpio::set(config.nSEL, enable ? embot::hw::gpio::State::RESET : embot::hw::gpio::State::SET); + } + + void holdcontrol(bool enable) + { + embot::hw::gpio::set(config.nHOLD, enable ? embot::hw::gpio::State::RESET : embot::hw::gpio::State::SET); + } + + void writecontrol(bool enable) + { + embot::hw::gpio::set(config.nWP, enable ? embot::hw::gpio::State::SET : embot::hw::gpio::State::RESET); + } + + bool send(const embot::core::Data &data) + { + return (resOK == embot::hw::spi::write(config.spi, data, deftimeout)) ? true : false; + } + + bool recv(embot::core::Data &dd) + { + return (resOK == embot::hw::spi::read(config.spi, dd, deftimeout)) ? true : false; + } + + bool cmd(CMD c) + { + bool r {false}; + //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::RESET); + select(true); + uint8_t cc {embot::core::tointegral(c)}; + r = send({&cc, 1}); + //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::SET); + select(false); + return r; + } + + bool cmdtx(CMD c, uint8_t v) + { + bool r {false}; + //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::RESET); + select(true); + uint8_t cc {embot::core::tointegral(c)}; + if(true == send({&cc, 1})) + { + uint8_t vv {v}; + r = send({&vv, 1}); + } + //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::SET); + select(false); + return r; + } + + bool cmdrx(CMD c, uint8_t &v) + { + bool r {false}; + //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::RESET); + select(true); + uint8_t cc {embot::core::tointegral(c)}; + if(true == send({&cc, 1})) + { + embot::core::Data data {&v, 1}; + r = recv(data); + } + //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::SET); + select(false); + return r; + } + + ADR adjustaddress(ADR adr) + { + return __REV16(adr); + } + + bool writeinpage(ADR adr, const embot::core::Data &data) + { + bool r {false}; + adr = adjustaddress(adr); + //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::RESET); + select(true); + uint8_t cc {embot::core::tointegral(CMD::WRITE)}; + if(true == send({&cc, 1})) + { + if(true == send({&adr, 2})) + { + r = send(data); + } + } + //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::SET); + select(false); + return r; + } + + }; + + + + + // initialised mask + static std::uint32_t initialisedmask = 0; + + struct PrivateData + { + Config config[embot::core::tointegral(EEPROM::maxnumberof)] = {}; + embot::hw::eeprom::Type type[embot::core::tointegral(EEPROM::maxnumberof)] = {embot::hw::eeprom::Type::none}; + PrivateData() = default; + }; + + static PrivateData s_privatedata {}; + + M95512DF *spieeprom {nullptr}; + embot::hw::chip::M95512DF *chipM95512DF {nullptr}; + + bool supported(EEPROM ee) + { + return embot::hw::eeprom::getBSP().supported(ee); + } + + bool initialised(EEPROM ee) + { + return embot::core::binary::bit::check(initialisedmask,embot::core::tointegral(ee)); + } + + result_t init(EEPROM ee, const Config &cfg) + { + if(!supported(ee)) + { + return resNOK; + } + + if(initialised(ee)) + { // dont need to re-init + return resOK; + } + + if(!embot::hw::initialised()) + { // requires embot::hw::bsp::init() + return resNOK; + } + + const embot::hw::eeprom::BSP &eeprombsp = embot::hw::eeprom::getBSP(); + + embot::hw::eeprom::Type type = eeprombsp.getPROP(ee)->type; + + if((type != embot::hw::eeprom::Type::spiM95512DF) && (type != embot::hw::eeprom::Type::chipM95512DF)) + { + return resNOK; + } + + s_privatedata.config[embot::core::tointegral(ee)] = cfg; + s_privatedata.type[embot::core::tointegral(ee)] = type; + + // bsp specific initialization + eeprombsp.init(ee); + + // but ... initialization in here + + if(embot::hw::eeprom::Type::spiM95512DF == type) + { + spieeprom = new M95512DF; + spieeprom->init({eeprombsp.getPROP(ee)->multi.spi.bus, eeprombsp.getPROP(ee)->multi.spi.wp, eeprombsp.getPROP(ee)->multi.spi.hold, eeprombsp.getPROP(ee)->multi.spi.sel}); + } + else if(embot::hw::eeprom::Type::chipM95512DF == type) + { + chipM95512DF = new embot::hw::chip::M95512DF; + chipM95512DF->init(eeprombsp.getPROP(ee)->multi.chipM95512DFcfg); + } + + + embot::core::binary::bit::set(initialisedmask, embot::core::tointegral(ee)); + + return resOK; + } + + + const Config & config(EEPROM ee) + { + return s_privatedata.config[embot::core::tointegral(ee)]; + } + + + result_t read(EEPROM ee, ADR adr, embot::core::Data &destination, embot::core::relTime timeout) + { + if(!initialised(ee)) + { + return resNOK; + } + + // fake... +//#if defined(EMBOT_ENABLE_hw_eeprom_emulatedMODE) +// destination.copyfrom(fake_eeprom); +//#else +// + +//#endif + + if(embot::hw::eeprom::Type::spiM95512DF == s_privatedata.type[embot::core::tointegral(ee)]) + { + spieeprom->read(adr, destination); + } + else if(embot::hw::eeprom::Type::chipM95512DF == s_privatedata.type[embot::core::tointegral(ee)]) + { + chipM95512DF->read(adr, destination); + } + + return resOK; + +// const embot::hw::GPIO gpio = embot::hw::eeprom::getBSP().getPROP(ee)->gpio; +// +// embot::hw::gpio::State s = embot::hw::gpio::get(gpio); +// return (embot::hw::eeprom::getBSP().getPROP(ee)->pressed == s) ? (true) : (false); + + } + + + result_t write(EEPROM ee, ADR adr, const embot::core::Data &content, embot::core::relTime timeout) + { + + if(!initialised(ee)) + { + return resNOK; + } + + // fake... +//#if defined(EMBOT_ENABLE_hw_eeprom_emulatedMODE) +// fake_eeprom.copyfrom(content); +//#else +// + +//#endif + + if(embot::hw::eeprom::Type::spiM95512DF == s_privatedata.type[embot::core::tointegral(ee)]) + { + spieeprom->write(adr, content); + } + else if(embot::hw::eeprom::Type::chipM95512DF == s_privatedata.type[embot::core::tointegral(ee)]) + { + chipM95512DF->write(adr, content); + } + + return resOK; + } + + + + +}}} // namespace embot { namespace hw { namespace eeprom + +#endif // #if !defined(EMBOT_ENABLE_hw_eeprom) + + + + + + +// - end-of-file (leave a blank line after)---------------------------------------------------------------------------- + diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.h b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.h new file mode 100644 index 0000000000..4d3dd02bec --- /dev/null +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.h @@ -0,0 +1,58 @@ + +/* + * Copyright (C) 2022 iCub Tech - Istituto Italiano di Tecnologia + * Author: Marco Accame + * email: marco.accame@iit.it +*/ + +// - include guard ---------------------------------------------------------------------------------------------------- + +#ifndef __EMBOT_HW_EEPROM_H_ +#define __EMBOT_HW_EEPROM_H_ + +#include "embot_core.h" +#include "embot_hw_types.h" + + + +namespace embot { namespace hw { namespace eeprom { + + using ADR = uint16_t; + + struct Config + { + // ... max size of eeprom etc. but maybe some of it can go into the embot::hw::eeprom::PROP + uint32_t tbd {0}; + constexpr Config() = default; + }; + + + bool supported(EEPROM ee); + bool initialised(EEPROM ee); + result_t init(EEPROM ee, const Config &cfg); + + const Config & config(EEPROM ee); + + + // BLOCKING READ. + // it reads starting from address adr a total of destination.capacity bytes and waits until a timeout. + // operation is OK only if read() returns resOK. In this case destination.pointer contains the data; + // operation fails if read() returns resNOKtimeout (the timeout has expired) or resNOK (the operation was not even started) + result_t read(EEPROM ee, ADR adr, embot::core::Data &destination, embot::core::relTime timeout); + + // BLOCKING WRITE to a register. + // it writes starting from address adr a total of content.size bytes pointed by content.pointer and waits until a timeout. + // operation is OK only if write() returns resOK. In this case the bytes pointed by content.pointer are guaranteed to be written to register. + // operation fails if write() returns resNOKtimeout (the timeout has expired) or resNOK (the operation was not even started). + result_t write(EEPROM ee, ADR adr, const embot::core::Data &content, embot::core::relTime timeout); + +}}} // namespace embot { namespace hw { namespace eeprom + + + +#endif // include-guard + + +// - end-of-file (leave a blank line after)---------------------------------------------------------------------------- + + diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom_bsp.h b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom_bsp.h new file mode 100644 index 0000000000..17fdbc34fe --- /dev/null +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom_bsp.h @@ -0,0 +1,117 @@ + +/* + * Copyright (C) 2022 iCub Tech - Istituto Italiano di Tecnologia + * Author: Marco Accame + * email: marco.accame@iit.it +*/ + +// - include guard ---------------------------------------------------------------------------------------------------- + +#ifndef __EMBOT_HW_EEPROM_BSP_H_ +#define __EMBOT_HW_EEPROM_BSP_H_ + + +#include "embot_core.h" +#include "embot_hw_types.h" +#include "embot_hw_bsp.h" +#include "embot_hw_gpio_bsp.h" +#include "embot_hw_spi.h" +#include "embot_hw_flash.h" +#include "embot_hw_chip_M95512DF.h" + +namespace embot { namespace hw { namespace eeprom { + + enum class Type { none, chipM95512DF, flashEMULATED, heapTEST, spiM95512DF }; + + struct nonePROP + { + uint32_t none {0}; + constexpr nonePROP() = default; + }; + + struct spiPROP + { + embot::hw::SPI bus {embot::hw::SPI::none}; + embot::hw::GPIO hold {embot::hw::GPIO::PORT::none, embot::hw::GPIO::PIN::none}; + embot::hw::GPIO sel {embot::hw::GPIO::PORT::none, embot::hw::GPIO::PIN::none}; + embot::hw::GPIO wp {embot::hw::GPIO::PORT::none, embot::hw::GPIO::PIN::none}; + constexpr spiPROP(const embot::hw::GPIO &h, const embot::hw::GPIO &s, const embot::hw::GPIO &w, embot::hw::SPI b) : bus(b), hold(h), sel(s), wp(w) {}; + constexpr spiPROP() = default; + }; + + + struct flashPROP + { + embot::hw::Partition partition {}; + constexpr flashPROP(const embot::hw::Partition &p) : partition(p) {}; + constexpr flashPROP() = default; + }; + + struct heapPROP + { + size_t size {32}; + constexpr heapPROP(size_t s) : size(s) {}; + constexpr heapPROP() = default; + }; + + union multiPROP + { + uint32_t none {0}; + embot::hw::chip::M95512DF::Config chipM95512DFcfg; + flashPROP flash; + heapPROP heap; + spiPROP spi; + constexpr multiPROP() : none(0) {}; + constexpr multiPROP(const embot::hw::chip::M95512DF::Config &cc) : chipM95512DFcfg(cc) {}; + constexpr multiPROP(const flashPROP &fl) : flash(fl) {}; + constexpr multiPROP(const heapPROP &hp) : heap(hp) {}; + constexpr multiPROP(const spiPROP &sp) : spi(sp) {}; + }; + + struct PROP + { // this one is ok for a spi eeprom. in case of emulated eeprom or i2c based eeprom .... add ctors and fields + embot::hw::eeprom::Type type {embot::hw::eeprom::Type::none}; + multiPROP multi {}; + constexpr PROP() = default; + constexpr PROP(embot::hw::eeprom::Type t, const embot::hw::chip::M95512DF::Config &cc) + : type(Type::chipM95512DF), multi(cc) {} + constexpr PROP(embot::hw::eeprom::Type t, const embot::hw::GPIO &h, const embot::hw::GPIO &s, const embot::hw::GPIO &w, embot::hw::SPI b) + : type(Type::spiM95512DF), multi({h, s, w, b}) {}; + constexpr PROP(embot::hw::eeprom::Type t, const embot::hw::Partition &pa) + : type(Type::flashEMULATED), multi(pa) {}; + constexpr PROP(embot::hw::eeprom::Type t, size_t s) + : type(Type::heapTEST), multi(s) {}; + }; + +// struct PROP +// { // this one is ok for a spi eeprom. in case of emulated eeprom or i2c based eeprom .... add ctors and fields +// embot::hw::eeprom::Type type {embot::hw::eeprom::Type::spiM95512}; +// embot::hw::SPI spi {embot::hw::SPI::none}; +// embot::hw::GPIO enable {embot::hw::GPIO::PORT::none, embot::hw::GPIO::PIN::none}; +// constexpr PROP() = default; +// constexpr PROP(embot::hw::eeprom::Type t, embot::hw::SPI s, const embot::hw::GPIO &e) : type(t), spi(s), enable(e) {}; +// }; + + struct BSP : public embot::hw::bsp::SUPP + { + constexpr static std::uint8_t maxnumberof = embot::core::tointegral(embot::hw::EEPROM::maxnumberof); + constexpr BSP(std::uint32_t msk, std::array pro) : SUPP(msk), properties(pro) {} + constexpr BSP() : SUPP(0), properties({0}) {} + + std::array properties; + constexpr const PROP * getPROP(embot::hw::EEPROM h) const { return supported(h) ? properties[embot::core::tointegral(h)] : nullptr; } + void init(embot::hw::EEPROM h) const; + }; + + const BSP& getBSP(); + +}}} // namespace embot { namespace hw { namespace eeprom { + + + +#endif // include-guard + + +// - end-of-file (leave a blank line after)---------------------------------------------------------------------------- + + diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_gpio.cpp b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_gpio.cpp index 4f359c055d..a198fdb4a2 100644 --- a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_gpio.cpp +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_gpio.cpp @@ -83,17 +83,24 @@ namespace embot { namespace hw { namespace gpio { // initialised mask. there must be one for each of PORT::maxnumberof - //static std::array initialised2dmask = {0}; + static std::array initialised2dmask = {0}; - bool supported(GPIO &g) + bool supported(const GPIO &g) { return embot::hw::gpio::getBSP().supported(g); } - bool initialised(GPIO &g) + bool initialised(const GPIO &g) { - return true; + uint8_t i = embot::core::tointegral(g.port); + if(i < embot::core::tointegral(embot::hw::GPIO::PORT::maxnumberof)) + { // i dont do control vs j < embot::core::tointegral(embot::hw::GPIO::PIN::maxnumberof) + // because initialised2dmask is an array of uint32_t and embot::hw::GPIO::PIN at max is 31 by design + uint8_t j = embot::core::tointegral(g.pin); + return embot::core::binary::bit::check(initialised2dmask[i], j); + } + return false; } @@ -101,6 +108,19 @@ namespace embot { namespace hw { namespace gpio { { return configure(g, config.mode, config.pull, config.speed); } + + result_t deinit(const embot::hw::GPIO &g) + { + embot::hw::gpio::PROP gg = embot::hw::gpio::getBSP().getPROP(g); + if(!gg.isvalid()) + { + return resNOK; + } + HAL_GPIO_DeInit(gg.stmport, gg.stmpin); + + embot::core::binary::bit::clear(initialised2dmask[embot::core::tointegral(g.port)], embot::core::tointegral(g.pin)); + return resOK; + } result_t configure(const embot::hw::GPIO &g, Mode m, Pull p, Speed s) { @@ -110,6 +130,7 @@ namespace embot { namespace hw { namespace gpio { return resNOK; } _configure(gg, m, p, s); + embot::core::binary::bit::set(initialised2dmask[embot::core::tointegral(g.port)], embot::core::tointegral(g.pin)); return resOK; } diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_gpio.h b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_gpio.h index 89cb3c014e..8f80b95ed6 100644 --- a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_gpio.h +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_gpio.h @@ -44,34 +44,41 @@ namespace embot { namespace hw { namespace gpio { //EVTrising = 9, //EVTfalling = 10, //EVTrisingfalling = 11 + none = 255 }; // look at GPIO_pull_define enum class Pull : std::uint8_t { nopull = 0, pullup = 1, - pulldown = 2 + pulldown = 2, + none = 255 }; enum class Speed : uint8_t { low = 0, medium = 1, high = 2, - veryhigh = 3 + veryhigh = 3, + none = 255 }; struct Config { - Mode mode {Mode::OUTPUTopendrain}; - Pull pull {Pull::nopull}; - Speed speed {Speed::medium}; + Mode mode {Mode::none}; + Pull pull {Pull::none}; + Speed speed {Speed::none}; constexpr Config(Mode m, Pull p, Speed s) : mode(m), pull(p), speed(s) {} constexpr Config() = default; + constexpr bool isvalid() const { + return (mode != Mode::none) && (pull != Pull::none) && (speed != Speed::none); + } }; bool supported(const embot::hw::GPIO &g); bool initialised(const embot::hw::GPIO g); result_t init(const embot::hw::GPIO &g, const Config &config); + result_t deinit(const embot::hw::GPIO &g); result_t configure(const embot::hw::GPIO &g, Mode m, Pull p, Speed s); diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.cpp b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.cpp new file mode 100644 index 0000000000..d557dfe1b1 --- /dev/null +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.cpp @@ -0,0 +1,644 @@ + +/* + * Copyright (C) 2022 iCub Tech - Istituto Italiano di Tecnologia + * Author: Marco Accame + * email: marco.accame@iit.it +*/ + + + +// -------------------------------------------------------------------------------------------------------------------- +// - public interface +// -------------------------------------------------------------------------------------------------------------------- + +#include "embot_hw_spi.h" + + +// -------------------------------------------------------------------------------------------------------------------- +// - external dependencies +// -------------------------------------------------------------------------------------------------------------------- + +#include "embot_hw_bsp_config.h" +#include "embot_hw_spi_bsp.h" + +#include +#include +#include "embot_core_binary.h" +//#include "embot_hw_gpio.h" + +#if defined(USE_STM32HAL) + #include "stm32hal.h" +#else + #warning this implementation is only for stm32hal +#endif + + +using namespace embot::hw; + + +// -------------------------------------------------------------------------------------------------------------------- +// - pimpl: private implementation (see scott meyers: item 22 of effective modern c++, item 31 of effective c++ +// -------------------------------------------------------------------------------------------------------------------- + + +// -------------------------------------------------------------------------------------------------------------------- +// - all the rest +// -------------------------------------------------------------------------------------------------------------------- + + +#if !defined(HAL_SPI_MODULE_ENABLED) || !defined(EMBOT_ENABLE_hw_spi) + +namespace embot { namespace hw { namespace spi { + + bool supported(SPI b) + { return false; } + bool initialised(SPI b) + { return false; } + result_t init(SPI b, const Config &config) + { return resNOK; } + result_t deinit(SPI b) + { return resNOK; } + + // blocking + bool isbusy(embot::hw::SPI b, embot::core::relTime timeout, embot::core::relTime &remaining) + { return false; } +// bool ping(embot::hw::SPI b, ADR adr, embot::core::relTime timeout) { return false; } + result_t read(embot::hw::SPI b, embot::core::Data &destination, embot::core::relTime timeout) + { return resNOK; } + result_t write(embot::hw::SPI b, const embot::core::Data &content, embot::core::relTime timeout) + { return resNOK; } +// result_t receive(embot::hw::SPI b, ADR adr, embot::core::Data &destination, embot::core::relTime timeout) { return resNOK; } +// result_t transmit(embot::hw::SPI b, ADR adr, const embot::core::Data &content, embot::core::relTime timeout) { return resNOK; } +// result_t transmitzeroaddress(embot::hw::SPI b, embot::core::relTime timeout) { return resNOK; } + + // non blocking +// bool isbusy(embot::hw::SPI b) { return false; } +// result_t read(embot::hw::SPI b, ADR adr, Reg reg, embot::core::Data &destination, const embot::core::Callback &oncompletion) { return resNOK; } +// result_t write(embot::hw::SPI b, ADR adr, Reg reg, const embot::core::Data &content, const embot::core::Callback &oncompletion) { return resNOK; } +// result_t receive(embot::hw::SPI b, ADR adr, embot::core::Data &destination, const embot::core::Callback &oncompletion) { return resNOK; } +// result_t transmit(SPI b, ADR adr, const embot::core::Data &content, const embot::core::Callback &oncompletion) { return resNOK; } + +}}} // namespace embot { namespace hw { namespace spi { + +#else + +namespace embot { namespace hw { namespace spi { + + // types + struct Transaction + { + volatile bool ongoing {false}; + volatile bool txactive {false}; + volatile bool rxactive {false}; + static constexpr uint8_t txbuffercapacity = 16; + embot::core::Data recdata {}; + std::uint8_t txbuffer[txbuffercapacity] = {0}; + std::uint8_t txbuffersize {0}; + embot::core::Callback oncompletion {}; + void clear() { ongoing = txactive = rxactive = false; recdata.clear(); oncompletion.clear(); std::memset(txbuffer, 0, sizeof(txbuffer)); txbuffersize = 0;} + Transaction () { clear(); } + }; + + struct PrivateData + { + Config config[embot::core::tointegral(SPI::maxnumberof)]; + Transaction transaction[embot::core::tointegral(SPI::maxnumberof)]; + SPI_HandleTypeDef* handles[embot::core::tointegral(SPI::maxnumberof)]; + PrivateData() { } + }; + + // utility functions + + + + + + static result_t s_wait_for_transaction_completion(SPI b, embot::core::relTime timeout); + static void s_SPI_TX_completed(SPI_HandleTypeDef *hspi); + static void s_SPI_rx_completed(SPI_HandleTypeDef *hspi); + static void s_SPI_error(SPI_HandleTypeDef *hspi); + +// static result_t s_IRQ_write_transaction_start(SPI b, const embot::core::Data &content, const embot::core::Callback &oncompletion); + void ontransactionterminated(std::uint8_t index); + + + + // internal variables + PrivateData s_privatedata {}; + + // initialised mask + std::uint32_t initialisedmask = 0; + + // the public functions + + bool supported(embot::hw::SPI p) + { + return embot::hw::spi::getBSP().supported(p); + } + + bool initialised(embot::hw::SPI p) + { + return embot::core::binary::bit::check(initialisedmask, embot::core::tointegral(p)); + } + + result_t init(SPI b, const Config &config) + { + if(false == supported(b)) + { + return resNOK; + } + + if(true == initialised(b)) + { + return resOK; + } + + if(!embot::hw::initialised()) + { // requires embot::hw::bsp::init() + return resNOK; + } + + + embot::hw::spi::getBSP().init(b); + + std::uint8_t index = embot::core::tointegral(b); + s_privatedata.config[index] = config; + s_privatedata.handles[index] = embot::hw::spi::getBSP().getPROP(b)->handle; + + // set callbacks on rx and tx and error + HAL_SPI_RegisterCallback(s_privatedata.handles[index], HAL_SPI_TX_COMPLETE_CB_ID, s_SPI_TX_completed); + HAL_SPI_RegisterCallback(s_privatedata.handles[index], HAL_SPI_RX_COMPLETE_CB_ID, s_SPI_rx_completed); + HAL_SPI_RegisterCallback(s_privatedata.handles[index], HAL_SPI_ERROR_CB_ID, s_SPI_error); + + embot::core::binary::bit::set(initialisedmask, embot::core::tointegral(b)); + + return resOK; + } + + result_t deinit(SPI b) + { + if(false == initialised(b)) + { + return resOK; + } + + std::uint8_t index = embot::core::tointegral(b); + + + HAL_SPI_UnRegisterCallback(s_privatedata.handles[index], HAL_SPI_TX_COMPLETE_CB_ID); + HAL_SPI_UnRegisterCallback(s_privatedata.handles[index], HAL_SPI_RX_COMPLETE_CB_ID); + HAL_SPI_UnRegisterCallback(s_privatedata.handles[index], HAL_SPI_ERROR_CB_ID); + + s_privatedata.config[index] = {}; + s_privatedata.handles[index] = nullptr; + + embot::hw::spi::getBSP().deinit(b); + + embot::core::binary::bit::clear(initialisedmask, embot::core::tointegral(b)); + + return resOK; + } + + // - + // blocking mode + +#if 0 + result_t tx(embot::hw::SPI b, ADR adr, const embot::core::Data &content, embot::core::relTime timeout) + { + if(false == initialised(b)) + { + return resNOK; + } + + embot::core::relTime remaining = timeout; + if(true == isbusy(b, timeout, remaining)) + { + return resNOKtimeout; + } + + // in here we just transmit over the bus w/ HAL_SPI_Master_Transmit() w/out DMA. the call is blocking w/ timeout + // we must nevertheless set the bus busy before trasmission and set it free afterwards. + std::uint8_t index = embot::core::tointegral(b); + embot::hw::spi::s_privatedata.transaction[index].ongoing = true; + volatile HAL_StatusTypeDef r = HAL_SPI_Master_Transmit(s_privatedata.handles[index], static_cast(adr), reinterpret_cast(content.pointer), static_cast(content.capacity), timeout/1000); + embot::hw::spi::s_privatedata.transaction[index].ongoing = false; + + return (HAL_OK == r) ? resOK : resNOK; + } + +#endif + + bool isbusy(SPI b, embot::core::relTime timeout, embot::core::relTime &remaining) + { + if(false == initialised(b)) + { + return false; + } + + if(0 == timeout) + { + remaining = timeout; + return s_privatedata.transaction[embot::core::tointegral(b)].ongoing; + } + + embot::core::Time deadline = embot::core::now() + timeout; + + bool res = true; + for(;;) + { + volatile std::int64_t rem = deadline - embot::core::now(); + + if(rem <= 0) + { + remaining = 0; + res = true; + break; + } + else if(false == s_privatedata.transaction[embot::core::tointegral(b)].ongoing) + { + remaining = static_cast(rem); + res = false; + break; + } + + } + + return res; + } + + + result_t read(SPI b, embot::core::Data &destination, embot::core::relTime timeout) + { + if(false == initialised(b)) + { + return resNOK; + } + + if(false == destination.isvalid()) + { + return resNOK; + } + + embot::core::relTime remaining = timeout; + if(true == isbusy(b, timeout, remaining)) + { + return resNOKtimeout; + } + + result_t r {resOK}; + + std::uint8_t index = embot::core::tointegral(b); + s_privatedata.transaction[index].ongoing = true; + // start reading + HAL_StatusTypeDef rr = HAL_SPI_Receive_IT(s_privatedata.handles[index], reinterpret_cast(destination.pointer), destination.capacity); + + + if(resOK == r) + { // it transaction has started, we must wait for its completion + r = s_wait_for_transaction_completion(b, remaining); + } + + return r; + } + + + result_t write(SPI b, const embot::core::Data &content, embot::core::relTime timeout) + { + if(false == initialised(b)) + { + return resNOK; + } + + if(false == content.isvalid()) + { + return resNOK; + } + + embot::core::relTime remaining = timeout; + if(true == isbusy(b, timeout, remaining)) + { + return resNOKtimeout; + } + + result_t r {resOK}; + + std::uint8_t index = embot::core::tointegral(b); + s_privatedata.transaction[index].ongoing = true; + + // start writing + HAL_StatusTypeDef rr = HAL_SPI_Transmit_IT(s_privatedata.handles[index], reinterpret_cast(content.pointer), content.capacity); + + if(HAL_OK != rr) + { + return resNOK; + } + + if(resOK == r) + { // it transaction has started, we must wait for its completion + r = s_wait_for_transaction_completion(b, remaining); + } + + return r; + } + + + + + // - + // non-blocking mode + + + bool isbusy(SPI b) + { + if(false == initialised(b)) + { + return false; + } + return s_privatedata.transaction[embot::core::tointegral(b)].ongoing; + } + + + + // - + // utility functions + + + static result_t s_wait_for_transaction_completion(SPI b, embot::core::relTime timeout) + { + embot::core::Time deadline = embot::core::now() + timeout; + + result_t res = resOK; + for(;;) + { + if(false == isbusy(b)) + { + break; + } + + if(embot::core::now() > deadline) + { + res = resNOK; + break; + } + } + + return res; + } + + +// static result_t s_IRQ_write_transaction_start(SPI b, const embot::core::Data &content, const embot::core::Callback &oncompletion) +// { +// result_t res = resNOK; +// +// std::uint8_t index = embot::core::tointegral(b); +// s_privatedata.transaction[index].oncompletion = oncompletion; +// s_privatedata.transaction[index].ongoing = true; +// s_privatedata.transaction[index].txactive = true; +// s_privatedata.transaction[index].recdata.clear(); // invalide recdata, so that tx callback() knows it is a write operation. +// +// +// HAL_StatusTypeDef r = HAL_SPI_Transmit_IT(s_privatedata.handles[index], reinterpret_cast(content.pointer), content.capacity); +// res = (HAL_OK == r) ? resOK : resNOK; +// +// +//#if 1 +// #warning SPI WIP +//#else +// if(Reg::addressNONE == reg.address) +// { +// // i need to transmit the pattern [data] because the slave already knows into which register to put data. and does not expect a [reg] byte. +// uint16_t txsize = content.capacity; +// if(txsize > Transaction::txbuffercapacity) +// { +// s_privatedata.transaction[index].ongoing = false; +// return resNOK; +// } +// std::memmove(&s_privatedata.transaction[index].txbuffer[0], content.pointer, content.capacity); +// s_privatedata.transaction[index].txbuffersize = content.capacity; +// } +// else +// { +// // i need to transmit the pattern [reg.address][data] because the slave must know into which register to put data. +// uint16_t txsize = (Reg::Size::eightbits == reg.size) ? (content.capacity + 1) : (content.capacity + 2); +// if(txsize > Transaction::txbuffercapacity) +// { +// s_privatedata.transaction[index].ongoing = false; +// return resNOK; +// } +// +// if(Reg::Size::eightbits == reg.size) +// { +// s_privatedata.transaction[index].txbuffer[0] = reg.address & 0xff; +// std::memmove(&s_privatedata.transaction[index].txbuffer[1], content.pointer, content.capacity); +// s_privatedata.transaction[index].txbuffersize = content.capacity + 1; +// } +// else +// { +// s_privatedata.transaction[index].txbuffer[0] = (reg.address >> 8 ) & 0xff; +// s_privatedata.transaction[index].txbuffer[1] = reg.address & 0xff; +// std::memmove(&s_privatedata.transaction[index].txbuffer[2], content.pointer, content.capacity); +// s_privatedata.transaction[index].txbuffersize = content.capacity + 2; +// } +// } +// +// HAL_StatusTypeDef r = HAL_SPI_Master_Transmit_DMA(s_privatedata.handles[index], adr, static_cast(s_privatedata.transaction[index].txbuffer), s_privatedata.transaction[index].txbuffersize); +// res = (HAL_OK == r) ? resOK : resNOK; +// +//#endif +// +// if(resOK != res) +// { +// s_privatedata.transaction[index].ongoing = false; +// } +// +// return res; +// } + +// static result_t s_DMA_write_transaction_start(SPI b, const embot::core::Data &content, const embot::core::Callback &oncompletion) +// { +// result_t res = resNOK; +// +// std::uint8_t index = embot::core::tointegral(b); +//// s_privatedata.transaction[index].addr = adr; +// s_privatedata.transaction[index].oncompletion = oncompletion; +// s_privatedata.transaction[index].ongoing = true; +// s_privatedata.transaction[index].recdata.clear(); // invalide recdata, so that HAL_SPI_MasterTxCpltCallback() knows it is a write operation. +// +//#if 1 +// #warning SPI WIP +//#else +// if(Reg::addressNONE == reg.address) +// { +// // i need to transmit the pattern [data] because the slave already knows into which register to put data. and does not expect a [reg] byte. +// uint16_t txsize = content.capacity; +// if(txsize > Transaction::txbuffercapacity) +// { +// s_privatedata.transaction[index].ongoing = false; +// return resNOK; +// } +// std::memmove(&s_privatedata.transaction[index].txbuffer[0], content.pointer, content.capacity); +// s_privatedata.transaction[index].txbuffersize = content.capacity; +// } +// else +// { +// // i need to transmit the pattern [reg.address][data] because the slave must know into which register to put data. +// uint16_t txsize = (Reg::Size::eightbits == reg.size) ? (content.capacity + 1) : (content.capacity + 2); +// if(txsize > Transaction::txbuffercapacity) +// { +// s_privatedata.transaction[index].ongoing = false; +// return resNOK; +// } +// +// if(Reg::Size::eightbits == reg.size) +// { +// s_privatedata.transaction[index].txbuffer[0] = reg.address & 0xff; +// std::memmove(&s_privatedata.transaction[index].txbuffer[1], content.pointer, content.capacity); +// s_privatedata.transaction[index].txbuffersize = content.capacity + 1; +// } +// else +// { +// s_privatedata.transaction[index].txbuffer[0] = (reg.address >> 8 ) & 0xff; +// s_privatedata.transaction[index].txbuffer[1] = reg.address & 0xff; +// std::memmove(&s_privatedata.transaction[index].txbuffer[2], content.pointer, content.capacity); +// s_privatedata.transaction[index].txbuffersize = content.capacity + 2; +// } +// } +// +// HAL_StatusTypeDef r = HAL_SPI_Master_Transmit_DMA(s_privatedata.handles[index], adr, static_cast(s_privatedata.transaction[index].txbuffer), s_privatedata.transaction[index].txbuffersize); +// res = (HAL_OK == r) ? resOK : resNOK; +// +//#endif +// +// if(resOK != res) +// { +// s_privatedata.transaction[index].ongoing = false; +// } +// return res; +// } + + +// static result_t s_DMA_read_transaction_start(SPI b, embot::core::Data &destination, const embot::core::Callback &oncompletion) +// { +// result_t res = resNOK; +// +// std::uint8_t index = embot::core::tointegral(b); +//// s_privatedata.transaction[index].addr = adr; +// s_privatedata.transaction[index].oncompletion = oncompletion; +// s_privatedata.transaction[index].ongoing = true; +// s_privatedata.transaction[index].recdata = destination; + +//#if 1 +// #warning SPI WIP +//#else +// +// if(reg.address == Reg::addressNONE) +// { +// // it is a single-stage operation: read +// // i dont need to ask which register to read from because the slave already knows what to send. +// // i do the read<> request with HAL_SPI_Master_Receive_DMA(recdata). +// // the completion of reading operation is signalled by the call of HAL_SPI_MasterRxCpltCallback(). +// // at this stage recdata will contain the received data. +// SPI_HandleTypeDef* hi2cx = embot::hw::spi::s_privatedata.handles[index]; +// HAL_StatusTypeDef r = HAL_SPI_Master_Receive_DMA( hi2cx, +// embot::hw::spi::s_privatedata.transaction[index].addr, +// static_cast(embot::hw::spi::s_privatedata.transaction[index].recdata.pointer), +// static_cast(embot::hw::spi::s_privatedata.transaction[index].recdata.capacity) +// ); +// res = (HAL_OK == r) ? resOK : resNOK; +// } +// else +// { +// // it is a two-stage operation: write, read +// // i must at first tx the value of the register i want to read from. i use HAL_SPI_Master_Transmit_DMA(). +// // the call of HAL_SPI_MasterTxCpltCallback() signals the end of teh fist stage and ... if recdata.isvalid() then ... +// // i perform the read<> request with HAL_SPI_Master_Receive_DMA(recdata). +// // the completion of reading operation is signalled by the call of HAL_SPI_MasterRxCpltCallback(). +// // at this stage recdata will contain the received data. +// +// // so far we only manage addresses which are 1 or 2 bytes long ... +// if(Reg::Size::eightbits == reg.size) +// { +// s_privatedata.transaction[index].txbuffer[0] = reg.address & 0xff; +// s_privatedata.transaction[index].txbuffersize = 1; +// } +// else +// { // big endianess .... +// s_privatedata.transaction[index].txbuffer[0] = (reg.address >> 8 ) & 0xff; +// s_privatedata.transaction[index].txbuffer[1] = reg.address & 0xff; +// s_privatedata.transaction[index].txbuffersize = 2; +// } +// HAL_StatusTypeDef r = HAL_SPI_Master_Transmit_DMA(s_privatedata.handles[index], adr, static_cast(s_privatedata.transaction[index].txbuffer), s_privatedata.transaction[index].txbuffersize); +// res = (HAL_OK == r) ? resOK : resNOK; +// } +// +//#endif + +// if(resOK != res) +// { +// s_privatedata.transaction[index].ongoing = false; +// } +// return res; +// } +// + + void ontransactionterminated(std::uint8_t index) + { + embot::hw::spi::s_privatedata.transaction[index].ongoing = false; + embot::hw::spi::s_privatedata.transaction[index].oncompletion.execute(); + } + + +#if 1 + #warning SPI WIP + static void s_SPI_TX_completed(SPI_HandleTypeDef *hspi) + { + embot::hw::SPI id = embot::hw::spi::getBSP().toID({hspi}); + if(embot::hw::SPI::none == id) + { + return; + } + + std::uint8_t index = embot::core::tointegral(id); + embot::hw::spi::s_privatedata.transaction[index].ongoing = false; + //embot::hw::spi::ontransactionterminated(index); + + } + + static void s_SPI_rx_completed(SPI_HandleTypeDef *hspi) + { + embot::hw::SPI id = embot::hw::spi::getBSP().toID({hspi}); + if(embot::hw::SPI::none == id) + { + return; + } + + std::uint8_t index = embot::core::tointegral(id); + embot::hw::spi::s_privatedata.transaction[index].ongoing = false; + //embot::hw::spi::ontransactionterminated(index); + } + + static void s_SPI_error(SPI_HandleTypeDef *hspi) + { + + } + + +#endif + +}}} // namespace embot { namespace hw { namespace spi { + + +// functions required by the hal of stm32. they are called by the hw at the completion of a tx or rx transaction + + + + +#endif //defined(HAL_SPI_MODULE_ENABLED) + + + + + + +// - end-of-file (leave a blank line after)---------------------------------------------------------------------------- + diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.h b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.h new file mode 100644 index 0000000000..b372fda653 --- /dev/null +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.h @@ -0,0 +1,151 @@ + +/* + * Copyright (C) 2022 iCub Tech - Istituto Italiano di Tecnologia + * Author: Marco Accame + * email: marco.accame@iit.it +*/ + + +// - include guard ---------------------------------------------------------------------------------------------------- + +#ifndef __EMBOT_HW_SPI_H_ +#define __EMBOT_HW_SPI_H_ + +#include "embot_core.h" +#include "embot_hw_types.h" + + + +namespace embot { namespace hw { namespace spi { + + // speed so far in bps expressed by an integer + using Speed = uint32_t; + + struct Config + { // so far we cannot initialize SPI with a given speed at runtime + Speed speed {0}; + uint32_t somethingelse {0}; + constexpr Config() = default; + constexpr Config(Speed s) : speed(s) {}; + constexpr bool isvalid() const { return 0 != speed; } + }; + + bool supported(embot::hw::SPI b); + bool initialised(embot::hw::SPI b); + result_t init(embot::hw::SPI b, const Config &config); + result_t deinit(embot::hw::SPI b); + + + // we can use spi in blocking mode or non blocking mode + // blocking mode: + // - we specify a embot::core::relTime timeout + // - .... + // + // non blocking mode: + // - we specify a const embot::core::Callback &oncompletion + // + + + // BLOCKING mode. + // in such a mode, the functions start operations and wait until completion or until a timeout has expired. + // the timeout must always be specified. for example 3*embot::core::time1millisec, 500*embot::core::time1microsec, etc... + + // BLOCKING BUS ACTIVITY CHECK + // it tells if the specified spi bus is busy with some operation. if busy the bus cannot be used. + // returns true only if the bus gets free by the specified timeout. it gives back in remaining the time = timeout - time spent inside. + // this function is internally used by functions ping(), read(), write(), transmit() and receive(). they wait until the bus is free before + // they get ownership of the bus for their tx/rx operations. + bool isbusy(embot::hw::SPI b, embot::core::relTime timeout, embot::core::relTime &remaining); + + // PING of a device + // check is a device is present on a given bus b and at a given address adr. this function waits up to a timeout + // whose typical value is 3*embot::core::time1millisec + // before any activity this functions waits until isbusy(b, timeout, remaining) returns false. +// bool ping(embot::hw::SPI b, ADR adr, embot::core::relTime timeout); + + + // BLOCKING CORE BYTE TX. + // it is the most general transmission function. + // it ensure to call directly the direct low level functions (not DMA). it sets inside the bus busy and then free again + // it accepts zero address and empty content (in such a case sends just the address) +// result_t tx(embot::hw::SPI b, ADR adr, const embot::core::Data &content, embot::core::relTime timeout); + + // BLOCKING READ from a register. + // it reads a total of destination.capacity bytes and waits until a timeout. + // operation is OK only if read() returns resOK. In this case destination.pointer contains the data; + // operation fails if read() returns resNOKtimeout (the timeout has expired) or resNOK (the operation was not even started) + // before any activity this functions waits until isbusy() returns false. any such wait consumes the specified timeout. + result_t read(embot::hw::SPI b, embot::core::Data &destination, embot::core::relTime timeout); + + // BLOCKING WRITE to a register. + // it writes a total of content.size bytes pointed by content.pointer and waits until a timeout. + // operation is OK only if write() returns resOK. In this case the bytes pointed by content.pointer are guaranteed to be written to register. + // operation fails if write() returns resNOKtimeout (the timeout has expired) or resNOK (the operation was not even started). + // before any activity this functions waits until isbusy(b, timeout, remaining) returns false. + result_t write(embot::hw::SPI b, const embot::core::Data &content, embot::core::relTime timeout); + + // BLOCKING BYTE RECEIVE. + // it receives the bytes pointed by destination.pointer for a total of destination.capacity from a given spi::ADR adr and waits until a timeout. + // operation is OK only if receive() returns resOK. In this case the bytes pointed by destination.pointer are those transmitted by the device. + // operation fails if receive() returns resNOKtimeout (the timeout has expired) or resNOK (the operation was not even started). + // before any activity this functions waits until isbusy(b, timeout, remaining) returns false. +// result_t receive(embot::hw::SPI b, ADR adr, embot::core::Data &destination, embot::core::relTime timeout); + + // BLOCKING BYTE TRANSMIT. + // its send the bytes pointed by content.pointer for a total of content.capacity to a given spi::ADR adr and waits until a timeout. + // operation is OK only if transmit() returns resOK. In this case the bytes pointed by content.pointer are guaranteed to be transmitted. + // operation fails if transmit() returns resNOKtimeout (the timeout has expired) or resNOK (the operation was not even started). + // before any activity this functions waits until isbusy(b, timeout, remaining) returns false. + // result_t transmit(embot::hw::SPI b, ADR adr, const embot::core::Data &content, embot::core::relTime timeout); + +#if 0 + // NON-BLOCKING mode. + // in such a mode, the functions returns control to the calling thread in the shortest possible time. + // if the bus is busy they return without doing any activity. if not busy they set the bus busy, start hardware operations, + // dont wait for completion and return control to the calling thread. + // the calling thread can now operate in two modes: + // 1. wait until isbusy() returns false (because the hardware sets the bus free at completion) + // 2. can continue its execution and be alerted by the specified callback that the operation is completed. + + // NON-BLOCKING BUS ACTIVITY CHECK. + // it immediatly returns true if the bus is busy or false if the bus is available. + // this function is internally used by functions read() and write() which immediately returns w/out doing anything if the bus is busy. + bool isbusy(embot::hw::SPI b); + + // NON-BLOCKING READ from a register. + // if the bus is not busy it starts the reading operation of a total of destination.capacity bytes starting from register reg and returns. + // at completion of the reading operation the hardware copies the received data inside destination.pointer and ensure the execution of + // the specified callback which can be used to alert a thread. + // this funtions returns resOK if the hardware can succesfully start its operations and resNOK in any failure case. + result_t read(embot::hw::SPI b, ADR adr, Reg reg, embot::core::Data &destination, const embot::core::Callback &oncompletion); + + // NON-BLOCKING WRITE to register. + // if the bus is not busy it starts the writing operation of a total of content.capacity bytes pointed by content.pointer starting from + // register reg and returns. + // at completion of the writing operation the hardware ensures the execution of the specified callback which can be used to alert a thread. + // this funtions returns resOK if the hardware can succesfully start its operations and resNOK in any failure case. + result_t write(embot::hw::SPI b, ADR adr, Reg reg, const embot::core::Data &content, const embot::core::Callback &oncompletion = embot::core::Callback(nullptr, nullptr)); + + + // NON-BLOCKING BYTE RECEIVE. + // if the bus is not busy it starts the receiving operation of a total of destination.capacity bytes and returns. + // at completion of the reading operation the hardware copies the received data inside destination.pointer and ensure the execution of + // the specified callback which can be used to alert a thread. + // this funtions returns resOK if the hardware can succesfully start its operations and resNOK in any failure case. + result_t receive(embot::hw::SPI b, ADR adr, embot::core::Data &destination, const embot::core::Callback &oncompletion); + + // NON-BLOCKING BYTE TRANSMIT. + result_t transmit(SPI b, ADR adr, const embot::core::Data &content, const embot::core::Callback &oncompletion); + +#endif + +}}} // namespace embot { namespace hw { namespace spi { + + + +#endif // include-guard + + +// - end-of-file (leave a blank line after)---------------------------------------------------------------------------- + + diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi_bsp.h b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi_bsp.h new file mode 100644 index 0000000000..3be93c36fe --- /dev/null +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi_bsp.h @@ -0,0 +1,66 @@ + +/* + * Copyright (C) 2022 iCub Tech - Istituto Italiano di Tecnologia + * Author: Marco Accame + * email: marco.accame@iit.it +*/ + + +// - include guard ---------------------------------------------------------------------------------------------------- + +#ifndef __EMBOT_HW_SPI_BSP_H_ +#define __EMBOT_HW_SPI_BSP_H_ + + +#include "embot_core.h" +#include "embot_hw_types.h" +#include "embot_hw_bsp.h" +#include "embot_hw_spi.h" + +namespace embot { namespace hw { namespace spi { + +#if defined(HAL_SPI_MODULE_ENABLED) + using SPI_Handle = SPI_HandleTypeDef; +#else + using SPI_Handle = void; +#endif + + struct PROP + { + SPI_Handle* handle {nullptr}; + embot::hw::spi::Speed speed {12500}; + constexpr PROP() = default; + constexpr PROP(SPI_Handle *h, embot::hw::spi::Speed s) : handle(h), speed(s) {} + constexpr PROP(SPI_Handle *h) : handle(h) {} + }; + + struct BSP : public embot::hw::bsp::SUPP + { + constexpr static std::uint8_t maxnumberof = embot::core::tointegral(embot::hw::SPI::maxnumberof); + constexpr BSP(std::uint32_t msk, std::array pro) : SUPP(msk), properties(pro) {} + constexpr BSP() : SUPP(0), properties({0}) {} + + std::array properties; + constexpr const PROP * getPROP(embot::hw::SPI h) const { return supported(h) ? properties[embot::core::tointegral(h)] : nullptr; } + bool init(embot::hw::SPI h) const; + bool deinit(embot::hw::SPI h) const; + constexpr embot::hw::SPI toID(const PROP& p) const + { + if(nullptr == p.handle) { return embot::hw::SPI::none; } + for(uint8_t i=0; ihandle) return static_cast(i); } + return embot::hw::SPI::none; + } + }; + + const BSP& getBSP(); + +}}} // namespace embot { namespace hw { namespace spi + + + +#endif // include-guard + + +// - end-of-file (leave a blank line after)---------------------------------------------------------------------------- + + diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_types.h b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_types.h index 7b1afc938a..22d4f40f74 100644 --- a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_types.h +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_types.h @@ -10,10 +10,10 @@ #ifndef _EMBOT_HW_TYPES_H_ #define _EMBOT_HW_TYPES_H_ -#include "embot_hw.h" + #include "embot_core.h" #include "embot_core_binary.h" - +#include "embot_hw.h" namespace embot { namespace hw { @@ -70,7 +70,10 @@ namespace embot { namespace hw { enum class MOTOR : std::uint8_t { one = 0, two = 1, three = 2, four = 3, none = 31, maxnumberof = 4 }; - + enum class EEPROM : std::uint8_t { one = 0, two = 1, none = 31, maxnumberof = 2 }; + + enum class SPI : std::uint8_t { one = 0, two = 1, three = 2, four = 3, five = 4, six = 5, none = 31, maxnumberof = 6 }; + // definition of more complex data structures struct GPIO @@ -82,8 +85,8 @@ namespace embot { namespace hw { PORT port {PORT::none}; PIN pin {PIN::none}; - constexpr GPIO(PORT po, PIN pi) : port(po), pin(pi) {} - constexpr GPIO() : port(PORT::none), pin(PIN::none) {} + constexpr GPIO() = default; + constexpr GPIO(PORT po, PIN pi) : port(po), pin(pi) {} constexpr bool isvalid() const { return (PORT::none == port) ? false : true; } }; diff --git a/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/api/stm32hal_board.h b/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/api/stm32hal_board.h index 9cac2e15d8..15dbb32604 100644 --- a/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/api/stm32hal_board.h +++ b/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/api/stm32hal_board.h @@ -442,6 +442,7 @@ extern void stm32hal_board_init(void); #include "../src/board/amc/v1A0/inc/gpio.h" #include "../src/board/amc/v1A0/inc/main.h" #include "../src/board/amc/v1A0/inc/eth.h" + #include "../src/board/amc/v1A0/inc/spi.h" #include "../src/board/amc/v1A0/inc/stm32h7xx_it.h" #include "../src/board/amc/v1A0/drv/Driver_ETH_MAC.h" diff --git a/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/proj/stm32hal.h7.uvoptx b/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/proj/stm32hal.h7.uvoptx index 3f54ee8f6c..87ed097e54 100644 --- a/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/proj/stm32hal.h7.uvoptx +++ b/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/proj/stm32hal.h7.uvoptx @@ -4377,6 +4377,30 @@ 0 0 + + 8 + 290 + 1 + 0 + 0 + 0 + ..\src\driver\stm32h7-v1A0\src\stm32h7xx_hal_spi.c + stm32h7xx_hal_spi.c + 0 + 0 + + + 8 + 291 + 1 + 0 + 0 + 0 + ..\src\driver\stm32h7-v1A0\src\stm32h7xx_hal_spi_ex.c + stm32h7xx_hal_spi_ex.c + 0 + 0 + @@ -4387,7 +4411,7 @@ 0 9 - 290 + 292 1 0 0 @@ -4399,7 +4423,7 @@ 9 - 291 + 293 1 0 0 @@ -4411,7 +4435,7 @@ 9 - 292 + 294 1 0 0 @@ -4423,7 +4447,7 @@ 9 - 293 + 295 1 0 0 @@ -4435,7 +4459,7 @@ 9 - 294 + 296 1 0 0 @@ -4447,7 +4471,7 @@ 9 - 295 + 297 1 0 0 @@ -4459,7 +4483,7 @@ 9 - 296 + 298 1 0 0 @@ -4471,7 +4495,7 @@ 9 - 297 + 299 1 0 0 @@ -4483,7 +4507,7 @@ 9 - 298 + 300 1 0 0 @@ -4495,7 +4519,7 @@ 9 - 299 + 301 1 0 0 @@ -4507,7 +4531,7 @@ 9 - 300 + 302 1 0 0 @@ -4519,7 +4543,7 @@ 9 - 301 + 303 1 0 0 @@ -4531,7 +4555,7 @@ 9 - 302 + 304 1 0 0 @@ -4543,7 +4567,7 @@ 9 - 303 + 305 1 0 0 @@ -4555,7 +4579,7 @@ 9 - 304 + 306 1 0 0 @@ -4567,7 +4591,7 @@ 9 - 305 + 307 1 0 0 @@ -4579,7 +4603,7 @@ 9 - 306 + 308 1 0 0 diff --git a/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/proj/stm32hal.h7.uvprojx b/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/proj/stm32hal.h7.uvprojx index fa2d14bd1f..1046e0b3f4 100644 --- a/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/proj/stm32hal.h7.uvprojx +++ b/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/proj/stm32hal.h7.uvprojx @@ -2208,6 +2208,16 @@ 1 ..\src\driver\stm32h7-v1A0\src\stm32h7xx_ll_gpio.c + + stm32h7xx_hal_spi.c + 1 + ..\src\driver\stm32h7-v1A0\src\stm32h7xx_hal_spi.c + + + stm32h7xx_hal_spi_ex.c + 1 + ..\src\driver\stm32h7-v1A0\src\stm32h7xx_hal_spi_ex.c + @@ -4678,6 +4688,16 @@ 1 ..\src\driver\stm32h7-v1A0\src\stm32h7xx_ll_gpio.c + + stm32h7xx_hal_spi.c + 1 + ..\src\driver\stm32h7-v1A0\src\stm32h7xx_hal_spi.c + + + stm32h7xx_hal_spi_ex.c + 1 + ..\src\driver\stm32h7-v1A0\src\stm32h7xx_hal_spi_ex.c + @@ -7148,6 +7168,16 @@ 1 ..\src\driver\stm32h7-v1A0\src\stm32h7xx_ll_gpio.c + + stm32h7xx_hal_spi.c + 1 + ..\src\driver\stm32h7-v1A0\src\stm32h7xx_hal_spi.c + + + stm32h7xx_hal_spi_ex.c + 1 + ..\src\driver\stm32h7-v1A0\src\stm32h7xx_hal_spi_ex.c + @@ -9618,6 +9648,16 @@ 1 ..\src\driver\stm32h7-v1A0\src\stm32h7xx_ll_gpio.c + + stm32h7xx_hal_spi.c + 1 + ..\src\driver\stm32h7-v1A0\src\stm32h7xx_hal_spi.c + + + stm32h7xx_hal_spi_ex.c + 1 + ..\src\driver\stm32h7-v1A0\src\stm32h7xx_hal_spi_ex.c + @@ -12226,6 +12266,16 @@ 1 ..\src\driver\stm32h7-v1A0\src\stm32h7xx_ll_gpio.c + + stm32h7xx_hal_spi.c + 1 + ..\src\driver\stm32h7-v1A0\src\stm32h7xx_hal_spi.c + + + stm32h7xx_hal_spi_ex.c + 1 + ..\src\driver\stm32h7-v1A0\src\stm32h7xx_hal_spi_ex.c + diff --git a/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/src/board/amc/v1A0/src/gpio.c b/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/src/board/amc/v1A0/src/gpio.c index 9e9e8aa977..151a4fc1e7 100644 --- a/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/src/board/amc/v1A0/src/gpio.c +++ b/emBODY/eBcode/arch-arm/libs/lowlevel/stm32hal/src/board/amc/v1A0/src/gpio.c @@ -65,16 +65,17 @@ void MX_GPIO_Init(void) HAL_GPIO_WritePin(GPIOD, CAN2_STBY_Pin|CAN1_STBY_Pin|CAN_SHDN_Pin, GPIO_PIN_SET); /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(EE_nSEL_GPIO_Port, EE_nSEL_Pin, GPIO_PIN_SET); +// HAL_GPIO_WritePin(EE_nSEL_GPIO_Port, EE_nSEL_Pin, GPIO_PIN_SET); /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(GPIOF, ETH_nSEL_Pin|EE_nHOLD_Pin, GPIO_PIN_SET); +// HAL_GPIO_WritePin(GPIOF, ETH_nSEL_Pin|EE_nHOLD_Pin, GPIO_PIN_SET); + HAL_GPIO_WritePin(GPIOF, ETH_nSEL_Pin, GPIO_PIN_SET); /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(ETH_nRST_GPIO_Port, ETH_nRST_Pin, GPIO_PIN_SET); /*Configure GPIO pin Output Level */ - HAL_GPIO_WritePin(EE_nWP_GPIO_Port, EE_nWP_Pin, GPIO_PIN_RESET); +// HAL_GPIO_WritePin(EE_nWP_GPIO_Port, EE_nWP_Pin, GPIO_PIN_RESET); /*Configure GPIO pins : PEPin PEPin */ GPIO_InitStruct.Pin = ETH_nPME_Pin|ETH_nIRQ_Pin; @@ -97,15 +98,22 @@ void MX_GPIO_Init(void) GPIO_InitStruct.Alternate = GPIO_AF0_MCO; HAL_GPIO_Init(TP2_GPIO_Port, &GPIO_InitStruct); - /*Configure GPIO pin : PtPin */ - GPIO_InitStruct.Pin = EE_nSEL_Pin; - GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; - GPIO_InitStruct.Pull = GPIO_NOPULL; - GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; - HAL_GPIO_Init(EE_nSEL_GPIO_Port, &GPIO_InitStruct); +// /*Configure GPIO pin : PtPin */ +// GPIO_InitStruct.Pin = EE_nSEL_Pin; +// GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +// GPIO_InitStruct.Pull = GPIO_NOPULL; +// GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; +// HAL_GPIO_Init(EE_nSEL_GPIO_Port, &GPIO_InitStruct); + +// /*Configure GPIO pins : PFPin PFPin PFPin */ +// GPIO_InitStruct.Pin = ETH_nSEL_Pin|EE_nHOLD_Pin|EE_nWP_Pin; +// GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; +// GPIO_InitStruct.Pull = GPIO_NOPULL; +// GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; +// HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); /*Configure GPIO pins : PFPin PFPin PFPin */ - GPIO_InitStruct.Pin = ETH_nSEL_Pin|EE_nHOLD_Pin|EE_nWP_Pin; + GPIO_InitStruct.Pin = ETH_nSEL_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; GPIO_InitStruct.Pull = GPIO_NOPULL; GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; From ee99d91321a9d22fe3d66a528814807818ffff0c Mon Sep 17 00:00:00 2001 From: "marco.accame" Date: Mon, 31 Jan 2022 15:11:54 +0100 Subject: [PATCH 2/3] embot::hw::spi, embot::hw::eeprom, embot::hw::chip::M95512DF -> enhancements in particular: - spi has runtime config for change of speed, mode and datasize (what is required by our aea) - eeprom uses the chip M95512DF - chip M95512DF now accepts also a embot::hw::spi::Config --- .../embot/hw/embot_hw_chip_M95512DF.cpp | 43 +- .../embot/hw/embot_hw_chip_M95512DF.h | 40 +- .../arch-arm/embot/hw/embot_hw_eeprom.cpp | 351 ++--------- .../arch-arm/embot/hw/embot_hw_eeprom.h | 6 +- .../arch-arm/embot/hw/embot_hw_eeprom_bsp.h | 28 +- .../eBcode/arch-arm/embot/hw/embot_hw_spi.cpp | 579 ++++++++---------- .../eBcode/arch-arm/embot/hw/embot_hw_spi.h | 209 ++++--- .../arch-arm/embot/hw/embot_hw_spi_bsp.h | 41 +- 8 files changed, 522 insertions(+), 775 deletions(-) diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.cpp b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.cpp index d43027433c..afa6f506f4 100644 --- a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.cpp +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.cpp @@ -19,7 +19,7 @@ #if defined(EMBOT_HW_CHIP_M95512DF_enable_test) // it tests the chip and offers an example of use -void embot::hw::chip::testof_M95512DF() +bool embot::hw::chip::testof_M95512DF() { // this configuration tells about which spi bus to use, which are the control pins // and their low level GPIO configuration @@ -34,6 +34,8 @@ void embot::hw::chip::testof_M95512DF() constexpr embot::hw::chip::M95512DF::Config cfg { embot::hw::SPI::six, // the spi bus + //{}, // dummy spi config + {embot::hw::spi::Prescaler::eight, embot::hw::spi::DataSize::eight, embot::hw::spi::Mode::zero}, { // the control pins {embot::hw::GPIO::PORT::G, embot::hw::GPIO::PIN::eight}, // nS {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::twelve}, // nW @@ -48,11 +50,11 @@ void embot::hw::chip::testof_M95512DF() // address in EEPROM, data to write, destination for data to read constexpr embot::hw::chip::M95512DF::ADR adr {64}; - uint8_t bytes2write[8] {1, 2, 3, 4, 5, 6, 7, 8}; - const embot::core::Data data2write {bytes2write, sizeof(bytes2write)}; + static constexpr uint8_t bytes2write[8] {1, 2, 3, 4, 5, 6, 7, 8}; + constexpr embot::core::Data data2write {bytes2write, sizeof(bytes2write)}; uint8_t bytes2read[4] {0}; embot::core::Data data2read {bytes2read, sizeof(bytes2read)}; - + // step 01: create the object embot::hw::chip::M95512DF *chipM95512DF = new embot::hw::chip::M95512DF; @@ -80,6 +82,8 @@ void embot::hw::chip::testof_M95512DF() // step 07: delete the object: the destructor also deinits delete chipM95512DF; + + return ok; } @@ -100,10 +104,13 @@ void embot::hw::chip::testof_M95512DF() #include "embot_hw_gpio.h" #include "embot_hw_spi.h" +//#define SPI_USE_NON_BLOCKING + using namespace std; using namespace embot::hw; + struct embot::hw::chip::M95512DF::Impl { @@ -212,7 +219,7 @@ bool embot::hw::chip::M95512DF::Impl::init(const Config &cfg) hold(false); writeprotect(false); - if(resOK == embot::hw::spi::init(_config.spi, {})) + if(resOK == embot::hw::spi::init(_config.spi, _config.spicfg)) { _initted = true; } @@ -314,14 +321,36 @@ void embot::hw::chip::M95512DF::Impl::writeprotect(bool enable) embot::hw::gpio::set(_config.pincontrol.nW, enable ? embot::hw::gpio::State::SET : embot::hw::gpio::State::RESET); } +#if defined(SPI_USE_NON_BLOCKING) +volatile bool done {false}; +void oncompletion(void *p) +{ + done = true; +} +#endif + bool embot::hw::chip::M95512DF::Impl::send(const embot::core::Data &data) { - return (resOK == embot::hw::spi::write(_config.spi, data, deftimeout)) ? true : false; +#if defined(SPI_USE_NON_BLOCKING) + done = false; + embot::hw::spi::write(_config.spi, data, {oncompletion, nullptr}); + for(;;) { if(done) break; } + return true; +#else + return (resOK == embot::hw::spi::write(_config.spi, data, deftimeout)) ? true : false; +#endif } bool embot::hw::chip::M95512DF::Impl::recv(embot::core::Data &dd) { - return (resOK == embot::hw::spi::read(_config.spi, dd, deftimeout)) ? true : false; +#if defined(SPI_USE_NON_BLOCKING) + done = false; + embot::hw::spi::read(_config.spi, dd, {oncompletion, nullptr}); + for(;;) { if(done) break; } + return true; +#else + return (resOK == embot::hw::spi::read(_config.spi, dd, deftimeout)) ? true : false; +#endif } bool embot::hw::chip::M95512DF::Impl::cmd(CMD c) diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.h b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.h index aeb2f966a6..e657a1cb12 100644 --- a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.h +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_chip_M95512DF.h @@ -62,36 +62,7 @@ You can use the following code, as long as the settings for SPI are specified by ```c++ #include "embot_hw_chip_M95512DF.h" -embot::hw::chip::M95512DF *chipM95512DF {nullptr}; -constexpr embot::hw::chip::M95512DF::Config cfg -{ - embot::hw::SPI::six, // the spi bus - {embot::hw::GPIO::PORT::G, embot::hw::GPIO::PIN::eight}, // nS - {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::twelve}, // nW - {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::thirteen} // nHOLD -}; -constexpr embot::hw::chip::M95512DF::ADR adr {64}; -uint8_t bytes2write[8] {1, 2, 3, 4, 5, 6, 7, 8}; -const embot::core::Data data2write {bytes2write, sizeof(bytes2write)}; -uint8_t bytes2read[4] {0}; -embot::core::Data data2read {bytes2read, sizeof(bytes2read)}; - -chipM95512DF = new embot::hw::chip::M95512DF; -bool ok {false}; -if(true == chipM95512DF->init(cfg)) -{ - if(true == chipM95512DF->write(adr, data2write)) - { - if(true == chipM95512DF->read(adr+1, data2read)) - { - ok = (bytes2read[0] == bytes2write[1]) ? true : false; - } - } -} - -delete chipM95512DF; - -embot::core::print(ok ? "test chipM95512DF: OK" : "test chipM95512DF: KO"); +bool ok = embot::hw::chip::M95512DF::testof_M95512DF(); ``` @@ -142,11 +113,12 @@ namespace embot { namespace hw { namespace chip { struct Config { // contains: spi bus and pin control - embot::hw::SPI spi {embot::hw::SPI::none}; + embot::hw::SPI spi {embot::hw::SPI::none}; + embot::hw::spi::Config spicfg {}; PinControl pincontrol {}; constexpr Config() = default; - constexpr Config(embot::hw::SPI s, const PinControl &pc) - : spi(s), pincontrol(pc) {} + constexpr Config(embot::hw::SPI s, const embot::hw::spi::Config &sc, const PinControl &pc) + : spi(s), spicfg(sc), pincontrol(pc) {} constexpr bool isvalid() const { return embot::hw::spi::supported(spi) && pincontrol.isvalid(); } @@ -175,7 +147,7 @@ namespace embot { namespace hw { namespace chip { #if defined(EMBOT_HW_CHIP_M95512DF_enable_test) namespace embot { namespace hw { namespace chip { // it tests the chip and offers an example of use - void testof_M95512DF(); + bool testof_M95512DF(); }}} #endif diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.cpp b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.cpp index ab065e887e..61f1b2fca7 100644 --- a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.cpp +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.cpp @@ -32,23 +32,7 @@ #warning this implementation is only for stm32hal #endif - - -#if defined(EMBOT_ENABLE_hw_eeprom_emulatedMODE) - - #warning CAVEAT EMPTOR: EMBOT_ENABLE_hw_eeprom_emulatedMODE is defined ...... - - - constexpr uint8_t fake_sizeofdataee {100}; - constexpr uint8_t fake_dataeedefvalue {14}; - uint8_t fake_dataee[fake_sizeofdataee] = {0}; - - embot::core::Data fake_eeprom {fake_dataee, fake_sizeofdataee}; - -#endif - using namespace std; - using namespace embot::hw; @@ -63,7 +47,9 @@ namespace embot { namespace hw { namespace eeprom { result_t init(EEPROM ee, const Config &config) { return resNOK; } const Config & config(EEPROM ee) - { static Config cfg {}; return cfg; } + { static Config cfg {}; return cfg; } + size_t size(EEPROM ee) + { return 0; } result_t read(EEPROM ee, ADR adr, embot::core::Data &destination, embot::core::relTime timeout) { return resNOK; } result_t write(EEPROM ee, ADR adr, const embot::core::Data &content, embot::core::relTime timeout) @@ -74,236 +60,7 @@ namespace embot { namespace hw { namespace eeprom { #else namespace embot { namespace hw { namespace eeprom { - - -/* Bit values in EEPROM status register */ -#define EE_SR_SRWD (0x80) -#define EE_SR_BP1 (0x08) -#define EE_SR_BP0 (0x04) -#define EE_SR_WEL (0x02) -#define EE_SR_WIP (0x01) - -/* Values for BP1 and BP0 bits in status register */ -#define EE_SR_BP_MASK (EE_SR_BP1|EE_SR_BP0) -#define EE_SR_BP_NONE (0|0) -#define EE_SR_BP_TOPQUARTER (0|EE_SR_BP0) -#define EE_SR_BP_TOPHALF (EE_SR_BP1|0) -#define EE_SR_BP_ALL (EE_SR_BP1|EE_SR_BP0) - - // definition of chip M95512DF - // dont use pimpl. for now - struct M95512DF - { - static constexpr size_t pagelength {128}; - static constexpr size_t storagesize {64*1024}; - static constexpr embot::core::relTime deftimeout {100*embot::core::time1millisec}; - static constexpr embot::core::relTime writetimeout {5*embot::core::time1millisec}; - enum class CMD : uint8_t { - WREN = 0x06, WRDI = 0x04, RDSR = 0x05, WRSR = 0x01, READ = 0x03, WRITE = 0x02, RDID = 0x83, WRID = 0x82, RDLS = 0x83 - }; - using ADR = uint16_t; - - struct Config - { - embot::hw::SPI spi {embot::hw::SPI::six}; - embot::hw::GPIO nWP {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::twelve}; - embot::hw::GPIO nHOLD {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::thirteen}; - embot::hw::GPIO nSEL {embot::hw::GPIO::PORT::G, embot::hw::GPIO::PIN::eight}; - constexpr Config() = default; - constexpr Config(embot::hw::SPI s, const embot::hw::GPIO& nwp, - const embot::hw::GPIO& nhold, const embot::hw::GPIO& nsel) : spi(s), nWP(nwp), nHOLD(nhold), nSEL(nsel) {} - }; - - Config config {}; - - M95512DF() = default; - - - bool init(const Config &cfg) - { - bool r {false}; - - config = cfg; - - holdcontrol(false); - writecontrol(false); - if(resOK == embot::hw::spi::init(config.spi, {})) - { - r = true; - } - - return r; - } - - - bool write(ADR adr, const embot::core::Data &data) - { - //bool r {false}; - - if((false == data.isvalid()) || ((adr + data.capacity) > storagesize)) - { // no need to check if(adr >= storagesize) - return false; - } - constexpr size_t pagemask {pagelength-1}; - embot::core::Data remainingdata {data.pointer, data.capacity}; - size_t delta {pagelength - (adr & pagemask)}; - for(; remainingdata.capacity; ) - { - delta = (delta > remainingdata.capacity) ? remainingdata.capacity : delta; - - // enable write and write to the status register - if(true == cmd(CMD::WREN)) - { - embot::core::Data data2writeinpage {remainingdata.pointer, delta}; - if(true == writeinpage(adr, data2writeinpage)) - { - // now we read the status until it is ok, but no longer than 5 ms - embot::core::Time expirytime {embot::core::now() + writetimeout}; - uint8_t status {0}; - while((true == cmdrx(CMD::RDSR, status)) && (0 != (status & EE_SR_WIP))) - { - if(embot::core::now() > expirytime) - { - // timeout .... - return false; - } - } - } - // update values - remainingdata.capacity -= delta; - adr += delta; - remainingdata.pointer = reinterpret_cast(remainingdata.pointer) + delta; - delta = pagelength; - } - } - return true; - } - - - bool read(ADR adr, embot::core::Data &data) - { - if((false == data.isvalid()) || ((adr + data.capacity) > storagesize)) - { // no need to check if(adr >= storagesize) - return false; - } - - bool r {false}; - adr = adjustaddress(adr); - //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::RESET); - select(true); - uint8_t cc {embot::core::tointegral(CMD::READ)}; - if(true == send({&cc, 1})) - { - if(true == send({&adr, 2})) - { - r = recv(data); - } - } - //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::SET); - select(false); - return r; - } - - private: - - void select(bool enable) - { - embot::hw::gpio::set(config.nSEL, enable ? embot::hw::gpio::State::RESET : embot::hw::gpio::State::SET); - } - - void holdcontrol(bool enable) - { - embot::hw::gpio::set(config.nHOLD, enable ? embot::hw::gpio::State::RESET : embot::hw::gpio::State::SET); - } - - void writecontrol(bool enable) - { - embot::hw::gpio::set(config.nWP, enable ? embot::hw::gpio::State::SET : embot::hw::gpio::State::RESET); - } - - bool send(const embot::core::Data &data) - { - return (resOK == embot::hw::spi::write(config.spi, data, deftimeout)) ? true : false; - } - - bool recv(embot::core::Data &dd) - { - return (resOK == embot::hw::spi::read(config.spi, dd, deftimeout)) ? true : false; - } - - bool cmd(CMD c) - { - bool r {false}; - //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::RESET); - select(true); - uint8_t cc {embot::core::tointegral(c)}; - r = send({&cc, 1}); - //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::SET); - select(false); - return r; - } - - bool cmdtx(CMD c, uint8_t v) - { - bool r {false}; - //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::RESET); - select(true); - uint8_t cc {embot::core::tointegral(c)}; - if(true == send({&cc, 1})) - { - uint8_t vv {v}; - r = send({&vv, 1}); - } - //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::SET); - select(false); - return r; - } - - bool cmdrx(CMD c, uint8_t &v) - { - bool r {false}; - //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::RESET); - select(true); - uint8_t cc {embot::core::tointegral(c)}; - if(true == send({&cc, 1})) - { - embot::core::Data data {&v, 1}; - r = recv(data); - } - //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::SET); - select(false); - return r; - } - - ADR adjustaddress(ADR adr) - { - return __REV16(adr); - } - - bool writeinpage(ADR adr, const embot::core::Data &data) - { - bool r {false}; - adr = adjustaddress(adr); - //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::RESET); - select(true); - uint8_t cc {embot::core::tointegral(CMD::WRITE)}; - if(true == send({&cc, 1})) - { - if(true == send({&adr, 2})) - { - r = send(data); - } - } - //embot::hw::gpio::set(nSEL, embot::hw::gpio::State::SET); - select(false); - return r; - } - - }; - - - - + // initialised mask static std::uint32_t initialisedmask = 0; @@ -311,13 +68,12 @@ namespace embot { namespace hw { namespace eeprom { { Config config[embot::core::tointegral(EEPROM::maxnumberof)] = {}; embot::hw::eeprom::Type type[embot::core::tointegral(EEPROM::maxnumberof)] = {embot::hw::eeprom::Type::none}; + embot::hw::chip::M95512DF *chipM95512DF[embot::core::tointegral(EEPROM::maxnumberof)] = {nullptr}; PrivateData() = default; }; static PrivateData s_privatedata {}; - M95512DF *spieeprom {nullptr}; - embot::hw::chip::M95512DF *chipM95512DF {nullptr}; bool supported(EEPROM ee) { @@ -350,42 +106,58 @@ namespace embot { namespace hw { namespace eeprom { embot::hw::eeprom::Type type = eeprombsp.getPROP(ee)->type; - if((type != embot::hw::eeprom::Type::spiM95512DF) && (type != embot::hw::eeprom::Type::chipM95512DF)) + if(type != embot::hw::eeprom::Type::chipM95512DF) { return resNOK; } - s_privatedata.config[embot::core::tointegral(ee)] = cfg; - s_privatedata.type[embot::core::tointegral(ee)] = type; + uint8_t index = embot::core::tointegral(ee); + + s_privatedata.config[index] = cfg; + s_privatedata.type[index] = type; // bsp specific initialization eeprombsp.init(ee); - // but ... initialization in here + // but ... true initialization is in here - if(embot::hw::eeprom::Type::spiM95512DF == type) - { - spieeprom = new M95512DF; - spieeprom->init({eeprombsp.getPROP(ee)->multi.spi.bus, eeprombsp.getPROP(ee)->multi.spi.wp, eeprombsp.getPROP(ee)->multi.spi.hold, eeprombsp.getPROP(ee)->multi.spi.sel}); - } - else if(embot::hw::eeprom::Type::chipM95512DF == type) + if(embot::hw::eeprom::Type::chipM95512DF == type) { - chipM95512DF = new embot::hw::chip::M95512DF; - chipM95512DF->init(eeprombsp.getPROP(ee)->multi.chipM95512DFcfg); + s_privatedata.chipM95512DF[index] = new embot::hw::chip::M95512DF; + s_privatedata.chipM95512DF[index]->init(eeprombsp.getPROP(ee)->multi.chipM95512DFcfg); } - - embot::core::binary::bit::set(initialisedmask, embot::core::tointegral(ee)); + embot::core::binary::bit::set(initialisedmask, index); return resOK; } - + const Config & config(EEPROM ee) { return s_privatedata.config[embot::core::tointegral(ee)]; } + size_t size(EEPROM ee) + { + if(!initialised(ee)) + { + return 0; + } + + size_t s {0}; + + if(embot::hw::eeprom::Type::chipM95512DF == s_privatedata.type[embot::core::tointegral(ee)]) + { + s = embot::hw::chip::M95512DF::storagesize; + } + else + { + // placeholder for future types + } + + return s; + } result_t read(EEPROM ee, ADR adr, embot::core::Data &destination, embot::core::relTime timeout) { @@ -394,63 +166,42 @@ namespace embot { namespace hw { namespace eeprom { return resNOK; } - // fake... -//#if defined(EMBOT_ENABLE_hw_eeprom_emulatedMODE) -// destination.copyfrom(fake_eeprom); -//#else -// - -//#endif - - if(embot::hw::eeprom::Type::spiM95512DF == s_privatedata.type[embot::core::tointegral(ee)]) + uint8_t index = embot::core::tointegral(ee); + + if(embot::hw::eeprom::Type::chipM95512DF == s_privatedata.type[index]) { - spieeprom->read(adr, destination); + s_privatedata.chipM95512DF[index]->read(adr, destination); } - else if(embot::hw::eeprom::Type::chipM95512DF == s_privatedata.type[embot::core::tointegral(ee)]) + else { - chipM95512DF->read(adr, destination); + // placeholder for future types } - return resOK; - -// const embot::hw::GPIO gpio = embot::hw::eeprom::getBSP().getPROP(ee)->gpio; -// -// embot::hw::gpio::State s = embot::hw::gpio::get(gpio); -// return (embot::hw::eeprom::getBSP().getPROP(ee)->pressed == s) ? (true) : (false); - + return resOK; } result_t write(EEPROM ee, ADR adr, const embot::core::Data &content, embot::core::relTime timeout) - { - + { if(!initialised(ee)) { return resNOK; } - // fake... -//#if defined(EMBOT_ENABLE_hw_eeprom_emulatedMODE) -// fake_eeprom.copyfrom(content); -//#else -// - -//#endif - - if(embot::hw::eeprom::Type::spiM95512DF == s_privatedata.type[embot::core::tointegral(ee)]) + uint8_t index = embot::core::tointegral(ee); + + if(embot::hw::eeprom::Type::chipM95512DF == s_privatedata.type[index]) { - spieeprom->write(adr, content); - } - else if(embot::hw::eeprom::Type::chipM95512DF == s_privatedata.type[embot::core::tointegral(ee)]) + s_privatedata.chipM95512DF[index]->write(adr, content); + } + else { - chipM95512DF->write(adr, content); + // placeholder for future types } return resOK; } - - }}} // namespace embot { namespace hw { namespace eeprom diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.h b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.h index 4d3dd02bec..16ebe3ab72 100644 --- a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.h +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom.h @@ -17,7 +17,7 @@ namespace embot { namespace hw { namespace eeprom { - using ADR = uint16_t; + using ADR = uint32_t; struct Config { @@ -29,10 +29,12 @@ namespace embot { namespace hw { namespace eeprom { bool supported(EEPROM ee); bool initialised(EEPROM ee); - result_t init(EEPROM ee, const Config &cfg); + result_t init(EEPROM ee, const Config &cfg); const Config & config(EEPROM ee); + // it gets the size of the initialised eepprom.it returns 0 if initialised() is false + size_t size(EEPROM ee); // BLOCKING READ. // it reads starting from address adr a total of destination.capacity bytes and waits until a timeout. diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom_bsp.h b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom_bsp.h index 17fdbc34fe..b8be2835b3 100644 --- a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom_bsp.h +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_eeprom_bsp.h @@ -21,7 +21,7 @@ namespace embot { namespace hw { namespace eeprom { - enum class Type { none, chipM95512DF, flashEMULATED, heapTEST, spiM95512DF }; + enum class Type { none, chipM95512DF, flashEMULATED, heapTEST}; //, spiM95512DF }; struct nonePROP { @@ -29,15 +29,15 @@ namespace embot { namespace hw { namespace eeprom { constexpr nonePROP() = default; }; - struct spiPROP - { - embot::hw::SPI bus {embot::hw::SPI::none}; - embot::hw::GPIO hold {embot::hw::GPIO::PORT::none, embot::hw::GPIO::PIN::none}; - embot::hw::GPIO sel {embot::hw::GPIO::PORT::none, embot::hw::GPIO::PIN::none}; - embot::hw::GPIO wp {embot::hw::GPIO::PORT::none, embot::hw::GPIO::PIN::none}; - constexpr spiPROP(const embot::hw::GPIO &h, const embot::hw::GPIO &s, const embot::hw::GPIO &w, embot::hw::SPI b) : bus(b), hold(h), sel(s), wp(w) {}; - constexpr spiPROP() = default; - }; +// struct spiPROP +// { +// embot::hw::SPI bus {embot::hw::SPI::none}; +// embot::hw::GPIO hold {embot::hw::GPIO::PORT::none, embot::hw::GPIO::PIN::none}; +// embot::hw::GPIO sel {embot::hw::GPIO::PORT::none, embot::hw::GPIO::PIN::none}; +// embot::hw::GPIO wp {embot::hw::GPIO::PORT::none, embot::hw::GPIO::PIN::none}; +// constexpr spiPROP(const embot::hw::GPIO &h, const embot::hw::GPIO &s, const embot::hw::GPIO &w, embot::hw::SPI b) : bus(b), hold(h), sel(s), wp(w) {}; +// constexpr spiPROP() = default; +// }; struct flashPROP @@ -60,12 +60,12 @@ namespace embot { namespace hw { namespace eeprom { embot::hw::chip::M95512DF::Config chipM95512DFcfg; flashPROP flash; heapPROP heap; - spiPROP spi; +// spiPROP spi; constexpr multiPROP() : none(0) {}; constexpr multiPROP(const embot::hw::chip::M95512DF::Config &cc) : chipM95512DFcfg(cc) {}; constexpr multiPROP(const flashPROP &fl) : flash(fl) {}; constexpr multiPROP(const heapPROP &hp) : heap(hp) {}; - constexpr multiPROP(const spiPROP &sp) : spi(sp) {}; +// constexpr multiPROP(const spiPROP &sp) : spi(sp) {}; }; struct PROP @@ -75,8 +75,8 @@ namespace embot { namespace hw { namespace eeprom { constexpr PROP() = default; constexpr PROP(embot::hw::eeprom::Type t, const embot::hw::chip::M95512DF::Config &cc) : type(Type::chipM95512DF), multi(cc) {} - constexpr PROP(embot::hw::eeprom::Type t, const embot::hw::GPIO &h, const embot::hw::GPIO &s, const embot::hw::GPIO &w, embot::hw::SPI b) - : type(Type::spiM95512DF), multi({h, s, w, b}) {}; +// constexpr PROP(embot::hw::eeprom::Type t, const embot::hw::GPIO &h, const embot::hw::GPIO &s, const embot::hw::GPIO &w, embot::hw::SPI b) +// : type(Type::spiM95512DF), multi({h, s, w, b}) {}; constexpr PROP(embot::hw::eeprom::Type t, const embot::hw::Partition &pa) : type(Type::flashEMULATED), multi(pa) {}; constexpr PROP(embot::hw::eeprom::Type t, size_t s) diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.cpp b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.cpp index d557dfe1b1..b73a0a0164 100644 --- a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.cpp +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.cpp @@ -58,25 +58,19 @@ namespace embot { namespace hw { namespace spi { { return resNOK; } result_t deinit(SPI b) { return resNOK; } - - // blocking + bool isbusy(embot::hw::SPI b, embot::core::relTime timeout, embot::core::relTime &remaining) - { return false; } -// bool ping(embot::hw::SPI b, ADR adr, embot::core::relTime timeout) { return false; } + { return false; } + // blocking result_t read(embot::hw::SPI b, embot::core::Data &destination, embot::core::relTime timeout) { return resNOK; } - result_t write(embot::hw::SPI b, const embot::core::Data &content, embot::core::relTime timeout) - { return resNOK; } -// result_t receive(embot::hw::SPI b, ADR adr, embot::core::Data &destination, embot::core::relTime timeout) { return resNOK; } -// result_t transmit(embot::hw::SPI b, ADR adr, const embot::core::Data &content, embot::core::relTime timeout) { return resNOK; } -// result_t transmitzeroaddress(embot::hw::SPI b, embot::core::relTime timeout) { return resNOK; } - + result_t write(embot::hw::SPI b, const embot::core::Data &source, embot::core::relTime timeout) + { return resNOK; } // non blocking -// bool isbusy(embot::hw::SPI b) { return false; } -// result_t read(embot::hw::SPI b, ADR adr, Reg reg, embot::core::Data &destination, const embot::core::Callback &oncompletion) { return resNOK; } -// result_t write(embot::hw::SPI b, ADR adr, Reg reg, const embot::core::Data &content, const embot::core::Callback &oncompletion) { return resNOK; } -// result_t receive(embot::hw::SPI b, ADR adr, embot::core::Data &destination, const embot::core::Callback &oncompletion) { return resNOK; } -// result_t transmit(SPI b, ADR adr, const embot::core::Data &content, const embot::core::Callback &oncompletion) { return resNOK; } + result_t read(embot::hw::SPI b, embot::core::Data &destination, const embot::core::Callback &oncompletion) + { return resNOK; } + result_t write(embot::hw::SPI b, const embot::core::Data &source, const embot::core::Callback &oncompletion) + { return resNOK; } }}} // namespace embot { namespace hw { namespace spi { @@ -84,44 +78,33 @@ namespace embot { namespace hw { namespace spi { namespace embot { namespace hw { namespace spi { - // types struct Transaction { + enum class Direction : uint8_t { NONE, TX, RX, TXRX }; + Direction direction {Direction::NONE}; volatile bool ongoing {false}; - volatile bool txactive {false}; - volatile bool rxactive {false}; - static constexpr uint8_t txbuffercapacity = 16; - embot::core::Data recdata {}; - std::uint8_t txbuffer[txbuffercapacity] = {0}; - std::uint8_t txbuffersize {0}; - embot::core::Callback oncompletion {}; - void clear() { ongoing = txactive = rxactive = false; recdata.clear(); oncompletion.clear(); std::memset(txbuffer, 0, sizeof(txbuffer)); txbuffersize = 0;} - Transaction () { clear(); } + embot::core::Callback oncompletion {}; + Transaction() = default; + void clear() { direction = Direction::NONE; oncompletion.clear(); ongoing = false; } //recdata.clear(); data2send.clear(); } + void start(Direction d, const embot::core::Callback &onc) { ongoing = true; direction = d; oncompletion = onc; } + void stop(Direction d) { if(d == direction) { oncompletion.execute(); clear(); } } }; struct PrivateData { - Config config[embot::core::tointegral(SPI::maxnumberof)]; - Transaction transaction[embot::core::tointegral(SPI::maxnumberof)]; - SPI_HandleTypeDef* handles[embot::core::tointegral(SPI::maxnumberof)]; - PrivateData() { } + Config config[embot::core::tointegral(SPI::maxnumberof)] {}; + Transaction transaction[embot::core::tointegral(SPI::maxnumberof)] {}; + SPI_HandleTypeDef* handles[embot::core::tointegral(SPI::maxnumberof)] {}; + PrivateData() = default; }; - // utility functions - - - - - - static result_t s_wait_for_transaction_completion(SPI b, embot::core::relTime timeout); - static void s_SPI_TX_completed(SPI_HandleTypeDef *hspi); - static void s_SPI_rx_completed(SPI_HandleTypeDef *hspi); - static void s_SPI_error(SPI_HandleTypeDef *hspi); - -// static result_t s_IRQ_write_transaction_start(SPI b, const embot::core::Data &content, const embot::core::Callback &oncompletion); - void ontransactionterminated(std::uint8_t index); - - + // utility functions + result_t s_wait_for_transaction_completion(SPI b, embot::core::relTime timeout); + void s_SPI_TX_completed(SPI_HandleTypeDef *hspi); + void s_SPI_rx_completed(SPI_HandleTypeDef *hspi); + void s_SPI_TXrx_completed(SPI_HandleTypeDef *hspi); + void s_SPI_error(SPI_HandleTypeDef *hspi); + // internal variables PrivateData s_privatedata {}; @@ -136,11 +119,13 @@ namespace embot { namespace hw { namespace spi { return embot::hw::spi::getBSP().supported(p); } + bool initialised(embot::hw::SPI p) { return embot::core::binary::bit::check(initialisedmask, embot::core::tointegral(p)); } - + + result_t init(SPI b, const Config &config) { if(false == supported(b)) @@ -159,7 +144,11 @@ namespace embot { namespace hw { namespace spi { } - embot::hw::spi::getBSP().init(b); + bool bspinit = embot::hw::spi::getBSP().init(b, config); + if(false == bspinit) + { + // do init in here + } std::uint8_t index = embot::core::tointegral(b); s_privatedata.config[index] = config; @@ -168,13 +157,15 @@ namespace embot { namespace hw { namespace spi { // set callbacks on rx and tx and error HAL_SPI_RegisterCallback(s_privatedata.handles[index], HAL_SPI_TX_COMPLETE_CB_ID, s_SPI_TX_completed); HAL_SPI_RegisterCallback(s_privatedata.handles[index], HAL_SPI_RX_COMPLETE_CB_ID, s_SPI_rx_completed); + HAL_SPI_RegisterCallback(s_privatedata.handles[index], HAL_SPI_TX_RX_COMPLETE_CB_ID, s_SPI_TXrx_completed); HAL_SPI_RegisterCallback(s_privatedata.handles[index], HAL_SPI_ERROR_CB_ID, s_SPI_error); embot::core::binary::bit::set(initialisedmask, embot::core::tointegral(b)); return resOK; } - + + result_t deinit(SPI b) { if(false == initialised(b)) @@ -187,46 +178,33 @@ namespace embot { namespace hw { namespace spi { HAL_SPI_UnRegisterCallback(s_privatedata.handles[index], HAL_SPI_TX_COMPLETE_CB_ID); HAL_SPI_UnRegisterCallback(s_privatedata.handles[index], HAL_SPI_RX_COMPLETE_CB_ID); + HAL_SPI_UnRegisterCallback(s_privatedata.handles[index], HAL_SPI_TX_RX_COMPLETE_CB_ID); HAL_SPI_UnRegisterCallback(s_privatedata.handles[index], HAL_SPI_ERROR_CB_ID); s_privatedata.config[index] = {}; s_privatedata.handles[index] = nullptr; - embot::hw::spi::getBSP().deinit(b); - + bool bspdeinit = embot::hw::spi::getBSP().deinit(b); + if(false == bspdeinit) + { + // do deinit in here + } + embot::core::binary::bit::clear(initialisedmask, embot::core::tointegral(b)); return resOK; } - - // - - // blocking mode -#if 0 - result_t tx(embot::hw::SPI b, ADR adr, const embot::core::Data &content, embot::core::relTime timeout) + + bool isbusy(SPI b) { if(false == initialised(b)) { - return resNOK; + return false; } - - embot::core::relTime remaining = timeout; - if(true == isbusy(b, timeout, remaining)) - { - return resNOKtimeout; - } - - // in here we just transmit over the bus w/ HAL_SPI_Master_Transmit() w/out DMA. the call is blocking w/ timeout - // we must nevertheless set the bus busy before trasmission and set it free afterwards. - std::uint8_t index = embot::core::tointegral(b); - embot::hw::spi::s_privatedata.transaction[index].ongoing = true; - volatile HAL_StatusTypeDef r = HAL_SPI_Master_Transmit(s_privatedata.handles[index], static_cast(adr), reinterpret_cast(content.pointer), static_cast(content.capacity), timeout/1000); - embot::hw::spi::s_privatedata.transaction[index].ongoing = false; - - return (HAL_OK == r) ? resOK : resNOK; - } - -#endif + return s_privatedata.transaction[embot::core::tointegral(b)].ongoing; + } + bool isbusy(SPI b, embot::core::relTime timeout, embot::core::relTime &remaining) { @@ -266,6 +244,8 @@ namespace embot { namespace hw { namespace spi { return res; } + // - + // blocking mode result_t read(SPI b, embot::core::Data &destination, embot::core::relTime timeout) { @@ -286,15 +266,21 @@ namespace embot { namespace hw { namespace spi { } result_t r {resOK}; - - std::uint8_t index = embot::core::tointegral(b); - s_privatedata.transaction[index].ongoing = true; + + std::uint8_t index = embot::core::tointegral(b); + s_privatedata.transaction[index].start(Transaction::Direction::RX, {}); // start reading HAL_StatusTypeDef rr = HAL_SPI_Receive_IT(s_privatedata.handles[index], reinterpret_cast(destination.pointer), destination.capacity); - + + if(HAL_OK != rr) + { + // maybe ... clear transaction ... + s_privatedata.transaction[index].clear(); + return resNOK; + } if(resOK == r) - { // it transaction has started, we must wait for its completion + { // the transaction has started, we must wait for its completion r = s_wait_for_transaction_completion(b, remaining); } @@ -302,14 +288,14 @@ namespace embot { namespace hw { namespace spi { } - result_t write(SPI b, const embot::core::Data &content, embot::core::relTime timeout) + result_t write(SPI b, const embot::core::Data &source, embot::core::relTime timeout) { if(false == initialised(b)) { return resNOK; } - if(false == content.isvalid()) + if(false == source.isvalid()) { return resNOK; } @@ -323,47 +309,204 @@ namespace embot { namespace hw { namespace spi { result_t r {resOK}; std::uint8_t index = embot::core::tointegral(b); - s_privatedata.transaction[index].ongoing = true; + s_privatedata.transaction[index].start(Transaction::Direction::TX, {}); // start writing - HAL_StatusTypeDef rr = HAL_SPI_Transmit_IT(s_privatedata.handles[index], reinterpret_cast(content.pointer), content.capacity); + HAL_StatusTypeDef rr = HAL_SPI_Transmit_IT(s_privatedata.handles[index], reinterpret_cast(source.pointer), source.capacity); if(HAL_OK != rr) { - return resNOK; + // maybe ... clear transaction ... + s_privatedata.transaction[index].clear(); + return resNOK; } if(resOK == r) - { // it transaction has started, we must wait for its completion + { // the transaction has started, we must wait for its completion r = s_wait_for_transaction_completion(b, remaining); } return r; } + - - + result_t writeread(SPI b, const embot::core::Data &source, embot::core::Data &destination, embot::core::relTime timeout) + { + if(false == initialised(b)) + { + return resNOK; + } + + if((false == source.isvalid()) || (false == destination.isvalid())) + { + return resNOK; + } + + + embot::core::relTime remaining = timeout; + if(true == isbusy(b, timeout, remaining)) + { + return resNOKtimeout; + } + + result_t r {resOK}; + + std::uint8_t index = embot::core::tointegral(b); + s_privatedata.transaction[index].start(Transaction::Direction::TXRX, {}); + + // we transmit receive without getting out of tx or rx buffer. + size_t size = std::min(destination.capacity, source.capacity); + + // start writing / reading + HAL_StatusTypeDef rr = HAL_SPI_TransmitReceive_IT( s_privatedata.handles[index], + reinterpret_cast(source.pointer), + reinterpret_cast(destination.pointer), + size); + + if(HAL_OK != rr) + { + // maybe ... clear transaction ... + s_privatedata.transaction[index].clear(); + return resNOK; + } + + if(resOK == r) + { // the transaction has started, we must wait for its completion ... ok. + r = s_wait_for_transaction_completion(b, remaining); + } + + return r; + } + // - // non-blocking mode + + result_t read(SPI b, embot::core::Data &destination, const embot::core::Callback &oncompletion) + { + if(false == initialised(b)) + { + return resNOK; + } + + if(false == destination.isvalid()) + { + return resNOK; + } + + if(true == isbusy(b)) + { + return resOK; + } + + result_t r {resOK}; + + std::uint8_t index = embot::core::tointegral(b); + s_privatedata.transaction[index].start(Transaction::Direction::RX, oncompletion); - bool isbusy(SPI b) + // start reading + HAL_StatusTypeDef rr = HAL_SPI_Receive_IT( s_privatedata.handles[index], + reinterpret_cast(destination.pointer), + destination.capacity + ); + + if(HAL_OK != rr) + { + // maybe ... clear transaction ... + s_privatedata.transaction[index].clear(); + } + + // dont wait for end of operation + return (HAL_OK == rr) ? resOK : resNOK; + } + + + result_t write(SPI b, const embot::core::Data &source, const embot::core::Callback &oncompletion) { if(false == initialised(b)) { - return false; + return resNOK; } - return s_privatedata.transaction[embot::core::tointegral(b)].ongoing; + + if(false == source.isvalid()) + { + return resNOK; + } + + if(true == isbusy(b)) + { + return resNOK; + } + + result_t r {resOK}; + + std::uint8_t index = embot::core::tointegral(b); + s_privatedata.transaction[index].start(Transaction::Direction::TX, oncompletion); + + // start writing + HAL_StatusTypeDef rr = HAL_SPI_Transmit_IT( s_privatedata.handles[index], + reinterpret_cast(source.pointer), + source.capacity); + + if(HAL_OK != rr) + { + // maybe ... clear transaction ... + s_privatedata.transaction[index].clear(); + return resNOK; + } + + // dont wait for end of operation + return (HAL_OK == rr) ? resOK : resNOK; } - + + result_t writeread(SPI b, const embot::core::Data &source, embot::core::Data &destination, const embot::core::Callback &oncompletion) + { + if(false == initialised(b)) + { + return resNOK; + } + + if((false == source.isvalid()) || (false == destination.isvalid())) + { + return resNOK; + } + + if(true == isbusy(b)) + { + return resNOK; + } + + result_t r {resOK}; + + std::uint8_t index = embot::core::tointegral(b); + s_privatedata.transaction[index].start(Transaction::Direction::TXRX, oncompletion); + + // we transmit receive without getting out of tx or rx buffer. + size_t size = std::min(destination.capacity, source.capacity); + + // start writing / reading + HAL_StatusTypeDef rr = HAL_SPI_TransmitReceive_IT( s_privatedata.handles[index], + reinterpret_cast(source.pointer), + reinterpret_cast(destination.pointer), + size); + + if(HAL_OK != rr) + { + // maybe ... clear transaction ... + s_privatedata.transaction[index].clear(); + return resNOK; + } + + // dont wait for end of operation + return (HAL_OK == rr) ? resOK : resNOK; + } // - // utility functions - - - static result_t s_wait_for_transaction_completion(SPI b, embot::core::relTime timeout) + + result_t s_wait_for_transaction_completion(SPI b, embot::core::relTime timeout) { embot::core::Time deadline = embot::core::now() + timeout; @@ -384,253 +527,51 @@ namespace embot { namespace hw { namespace spi { return res; } + - -// static result_t s_IRQ_write_transaction_start(SPI b, const embot::core::Data &content, const embot::core::Callback &oncompletion) -// { -// result_t res = resNOK; -// -// std::uint8_t index = embot::core::tointegral(b); -// s_privatedata.transaction[index].oncompletion = oncompletion; -// s_privatedata.transaction[index].ongoing = true; -// s_privatedata.transaction[index].txactive = true; -// s_privatedata.transaction[index].recdata.clear(); // invalide recdata, so that tx callback() knows it is a write operation. -// -// -// HAL_StatusTypeDef r = HAL_SPI_Transmit_IT(s_privatedata.handles[index], reinterpret_cast(content.pointer), content.capacity); -// res = (HAL_OK == r) ? resOK : resNOK; -// -// -//#if 1 -// #warning SPI WIP -//#else -// if(Reg::addressNONE == reg.address) -// { -// // i need to transmit the pattern [data] because the slave already knows into which register to put data. and does not expect a [reg] byte. -// uint16_t txsize = content.capacity; -// if(txsize > Transaction::txbuffercapacity) -// { -// s_privatedata.transaction[index].ongoing = false; -// return resNOK; -// } -// std::memmove(&s_privatedata.transaction[index].txbuffer[0], content.pointer, content.capacity); -// s_privatedata.transaction[index].txbuffersize = content.capacity; -// } -// else -// { -// // i need to transmit the pattern [reg.address][data] because the slave must know into which register to put data. -// uint16_t txsize = (Reg::Size::eightbits == reg.size) ? (content.capacity + 1) : (content.capacity + 2); -// if(txsize > Transaction::txbuffercapacity) -// { -// s_privatedata.transaction[index].ongoing = false; -// return resNOK; -// } -// -// if(Reg::Size::eightbits == reg.size) -// { -// s_privatedata.transaction[index].txbuffer[0] = reg.address & 0xff; -// std::memmove(&s_privatedata.transaction[index].txbuffer[1], content.pointer, content.capacity); -// s_privatedata.transaction[index].txbuffersize = content.capacity + 1; -// } -// else -// { -// s_privatedata.transaction[index].txbuffer[0] = (reg.address >> 8 ) & 0xff; -// s_privatedata.transaction[index].txbuffer[1] = reg.address & 0xff; -// std::memmove(&s_privatedata.transaction[index].txbuffer[2], content.pointer, content.capacity); -// s_privatedata.transaction[index].txbuffersize = content.capacity + 2; -// } -// } -// -// HAL_StatusTypeDef r = HAL_SPI_Master_Transmit_DMA(s_privatedata.handles[index], adr, static_cast(s_privatedata.transaction[index].txbuffer), s_privatedata.transaction[index].txbuffersize); -// res = (HAL_OK == r) ? resOK : resNOK; -// -//#endif -// -// if(resOK != res) -// { -// s_privatedata.transaction[index].ongoing = false; -// } -// -// return res; -// } - -// static result_t s_DMA_write_transaction_start(SPI b, const embot::core::Data &content, const embot::core::Callback &oncompletion) -// { -// result_t res = resNOK; -// -// std::uint8_t index = embot::core::tointegral(b); -//// s_privatedata.transaction[index].addr = adr; -// s_privatedata.transaction[index].oncompletion = oncompletion; -// s_privatedata.transaction[index].ongoing = true; -// s_privatedata.transaction[index].recdata.clear(); // invalide recdata, so that HAL_SPI_MasterTxCpltCallback() knows it is a write operation. -// -//#if 1 -// #warning SPI WIP -//#else -// if(Reg::addressNONE == reg.address) -// { -// // i need to transmit the pattern [data] because the slave already knows into which register to put data. and does not expect a [reg] byte. -// uint16_t txsize = content.capacity; -// if(txsize > Transaction::txbuffercapacity) -// { -// s_privatedata.transaction[index].ongoing = false; -// return resNOK; -// } -// std::memmove(&s_privatedata.transaction[index].txbuffer[0], content.pointer, content.capacity); -// s_privatedata.transaction[index].txbuffersize = content.capacity; -// } -// else -// { -// // i need to transmit the pattern [reg.address][data] because the slave must know into which register to put data. -// uint16_t txsize = (Reg::Size::eightbits == reg.size) ? (content.capacity + 1) : (content.capacity + 2); -// if(txsize > Transaction::txbuffercapacity) -// { -// s_privatedata.transaction[index].ongoing = false; -// return resNOK; -// } -// -// if(Reg::Size::eightbits == reg.size) -// { -// s_privatedata.transaction[index].txbuffer[0] = reg.address & 0xff; -// std::memmove(&s_privatedata.transaction[index].txbuffer[1], content.pointer, content.capacity); -// s_privatedata.transaction[index].txbuffersize = content.capacity + 1; -// } -// else -// { -// s_privatedata.transaction[index].txbuffer[0] = (reg.address >> 8 ) & 0xff; -// s_privatedata.transaction[index].txbuffer[1] = reg.address & 0xff; -// std::memmove(&s_privatedata.transaction[index].txbuffer[2], content.pointer, content.capacity); -// s_privatedata.transaction[index].txbuffersize = content.capacity + 2; -// } -// } -// -// HAL_StatusTypeDef r = HAL_SPI_Master_Transmit_DMA(s_privatedata.handles[index], adr, static_cast(s_privatedata.transaction[index].txbuffer), s_privatedata.transaction[index].txbuffersize); -// res = (HAL_OK == r) ? resOK : resNOK; -// -//#endif -// -// if(resOK != res) -// { -// s_privatedata.transaction[index].ongoing = false; -// } -// return res; -// } - - -// static result_t s_DMA_read_transaction_start(SPI b, embot::core::Data &destination, const embot::core::Callback &oncompletion) -// { -// result_t res = resNOK; -// -// std::uint8_t index = embot::core::tointegral(b); -//// s_privatedata.transaction[index].addr = adr; -// s_privatedata.transaction[index].oncompletion = oncompletion; -// s_privatedata.transaction[index].ongoing = true; -// s_privatedata.transaction[index].recdata = destination; - -//#if 1 -// #warning SPI WIP -//#else -// -// if(reg.address == Reg::addressNONE) -// { -// // it is a single-stage operation: read -// // i dont need to ask which register to read from because the slave already knows what to send. -// // i do the read<> request with HAL_SPI_Master_Receive_DMA(recdata). -// // the completion of reading operation is signalled by the call of HAL_SPI_MasterRxCpltCallback(). -// // at this stage recdata will contain the received data. -// SPI_HandleTypeDef* hi2cx = embot::hw::spi::s_privatedata.handles[index]; -// HAL_StatusTypeDef r = HAL_SPI_Master_Receive_DMA( hi2cx, -// embot::hw::spi::s_privatedata.transaction[index].addr, -// static_cast(embot::hw::spi::s_privatedata.transaction[index].recdata.pointer), -// static_cast(embot::hw::spi::s_privatedata.transaction[index].recdata.capacity) -// ); -// res = (HAL_OK == r) ? resOK : resNOK; -// } -// else -// { -// // it is a two-stage operation: write, read -// // i must at first tx the value of the register i want to read from. i use HAL_SPI_Master_Transmit_DMA(). -// // the call of HAL_SPI_MasterTxCpltCallback() signals the end of teh fist stage and ... if recdata.isvalid() then ... -// // i perform the read<> request with HAL_SPI_Master_Receive_DMA(recdata). -// // the completion of reading operation is signalled by the call of HAL_SPI_MasterRxCpltCallback(). -// // at this stage recdata will contain the received data. -// -// // so far we only manage addresses which are 1 or 2 bytes long ... -// if(Reg::Size::eightbits == reg.size) -// { -// s_privatedata.transaction[index].txbuffer[0] = reg.address & 0xff; -// s_privatedata.transaction[index].txbuffersize = 1; -// } -// else -// { // big endianess .... -// s_privatedata.transaction[index].txbuffer[0] = (reg.address >> 8 ) & 0xff; -// s_privatedata.transaction[index].txbuffer[1] = reg.address & 0xff; -// s_privatedata.transaction[index].txbuffersize = 2; -// } -// HAL_StatusTypeDef r = HAL_SPI_Master_Transmit_DMA(s_privatedata.handles[index], adr, static_cast(s_privatedata.transaction[index].txbuffer), s_privatedata.transaction[index].txbuffersize); -// res = (HAL_OK == r) ? resOK : resNOK; -// } -// -//#endif - -// if(resOK != res) -// { -// s_privatedata.transaction[index].ongoing = false; -// } -// return res; -// } -// - - void ontransactionterminated(std::uint8_t index) - { - embot::hw::spi::s_privatedata.transaction[index].ongoing = false; - embot::hw::spi::s_privatedata.transaction[index].oncompletion.execute(); - } - - -#if 1 - #warning SPI WIP - static void s_SPI_TX_completed(SPI_HandleTypeDef *hspi) + void s_SPI_TX_completed(SPI_HandleTypeDef *hspi) { embot::hw::SPI id = embot::hw::spi::getBSP().toID({hspi}); if(embot::hw::SPI::none == id) { return; - } - - std::uint8_t index = embot::core::tointegral(id); - embot::hw::spi::s_privatedata.transaction[index].ongoing = false; - //embot::hw::spi::ontransactionterminated(index); - + } + std::uint8_t index = embot::core::tointegral(id); + embot::hw::spi::s_privatedata.transaction[index].stop(Transaction::Direction::TX); } - static void s_SPI_rx_completed(SPI_HandleTypeDef *hspi) + void s_SPI_rx_completed(SPI_HandleTypeDef *hspi) { embot::hw::SPI id = embot::hw::spi::getBSP().toID({hspi}); if(embot::hw::SPI::none == id) { return; } - - std::uint8_t index = embot::core::tointegral(id); - embot::hw::spi::s_privatedata.transaction[index].ongoing = false; - //embot::hw::spi::ontransactionterminated(index); + std::uint8_t index = embot::core::tointegral(id); + embot::hw::spi::s_privatedata.transaction[index].stop(Transaction::Direction::RX); } - - static void s_SPI_error(SPI_HandleTypeDef *hspi) + + void s_SPI_TXrx_completed(SPI_HandleTypeDef *hspi) + { + embot::hw::SPI id = embot::hw::spi::getBSP().toID({hspi}); + if(embot::hw::SPI::none == id) + { + return; + } + std::uint8_t index = embot::core::tointegral(id); + embot::hw::spi::s_privatedata.transaction[embot::core::tointegral(id)].stop(Transaction::Direction::TXRX); + } + + void s_SPI_error(SPI_HandleTypeDef *hspi) { } - -#endif - + + }}} // namespace embot { namespace hw { namespace spi { - -// functions required by the hal of stm32. they are called by the hw at the completion of a tx or rx transaction - - + #endif //defined(HAL_SPI_MODULE_ENABLED) diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.h b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.h index b372fda653..1597860741 100644 --- a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.h +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi.h @@ -15,19 +15,115 @@ #include "embot_hw_types.h" +#if 0 + +## Configuration of the `embot::hw::spi` driver + +The driver can be configured through `embot::hw::spi::Config` which allows, so far, to adapt +speed, datasize and shape of the SPI dataframe. + +The pinout of the clock (SCLK), master output/slave input (MOSI), master input/slave output (MISO), +and slave select (SS) are for now not managed in here. They are initted at startup by `embot::hw::bsp::init()`. + +### The `embot::hw::spi::Prescaler` + +It allows to scale the bus used by SPI to match some discrete speeds. + +### The `embot::hw::spi::DataSize` + +It allows to form a dataframe of different sizes. + +### The `embot::hw::spi::Mode` + +It shapes the data frame. That can happens in four different modes whiche end up in binary values of +two parameters: the clock polarity (CPOL) and the clock phase (CPHA). + +A CPOL = 0 means that the clock line idles low and similarly CPOL = 1 means clock line idles high. +And if CPHA = 0 the bits are sampled on the leading clock edge, else if CPHA = 1 ar ecampled on the trailing ege. + +All four possible combinations are shown in the following figure, alongside with the values of ` +embot::shw::spi::Mode` used in the `embot::hw::spi` driver. + + +``` + CPHA = 0 CPHA = 1 + samples on leading samples on trailing + | | +CPOL = 0 v___ ___v +CLK idles low __| |__ __| |__ + Mode::zero Mode::one + + samples on leading samples on trailing + | | +CPOL = 1 __v __ __ v__ +CKL idles high |___| |___| + Mode::two Mode::tree +``` +**Figure**. Description of `embot::shw::spi::Mode`. + +#endif namespace embot { namespace hw { namespace spi { - // speed so far in bps expressed by an integer + // speed is expressed by an integer in bps. it depends on the used prescaler. using Speed = uint32_t; + + enum class Prescaler : uint8_t + { + two = 0, + four = 1, + eight = 2, + sixteen = 3, + thirtytwo = 4, + sixtyfour = 5, + onehundredtwentyeigth = 6, + twohundredfiftysix = 7, + none = 255 + }; + + enum class DataSize : uint8_t + { + eight = 7, + sixteen = 15, + twentyfour = 23, + thirtytwo = 31, + none = 255 + }; + + enum class ClockPolarity : uint8_t { low = 0, high = 1}; + enum class ClockPhase : uint8_t { edge1 = 0, edge2 = 1}; + enum class Mode : uint8_t + { + zero = 0, // (polarity, phase) = (0, 0) = (SPI_POLARITY_LOW, SPI_PHASE_1EDGE) + one = 1, // (polarity, phase) = (0, 1) = (SPI_POLARITY_LOW, SPI_PHASE_2EDGE) + two = 2, // (polarity, phase) = (1, 0) = (SPI_POLARITY_HIGH, SPI_PHASE_1EDGE) + three = 3, // (polarity, phase) = (1, 1) = (SPI_POLARITY_HIGH, SPI_PHASE_2EDGE) + none = 255 + }; + + + constexpr bool mode2clockprops(const Mode m, ClockPolarity &polarity, ClockPhase &phase) + { + if(Mode::none == m) { return false; } + phase = (false == embot::core::binary::bit::check(embot::core::tointegral(m), 0)) ? ClockPhase::edge1 : ClockPhase::edge2; + polarity = (false == embot::core::binary::bit::check(embot::core::tointegral(m), 1)) ? ClockPolarity::low : ClockPolarity::high; + return true; + } + + constexpr Mode clockprops2mode(ClockPolarity polarity, ClockPhase phase) + { + constexpr Mode map[2][2] = { {Mode::zero, Mode::one}, {Mode::two, Mode::three} }; + return map[embot::core::tointegral(polarity)][embot::core::tointegral(phase)]; + } struct Config - { // so far we cannot initialize SPI with a given speed at runtime - Speed speed {0}; - uint32_t somethingelse {0}; + { + Prescaler prescaler {Prescaler::none}; + DataSize datasize {DataSize::none}; + Mode mode {Mode::none}; constexpr Config() = default; - constexpr Config(Speed s) : speed(s) {}; - constexpr bool isvalid() const { return 0 != speed; } + constexpr Config(Prescaler p, DataSize d, Mode m) : prescaler(p), datasize(d), mode(m) {}; + constexpr bool isvalid() const { return (Prescaler::none != prescaler) && (DataSize::none != datasize) && (Mode::none != mode); } }; bool supported(embot::hw::SPI b); @@ -37,107 +133,30 @@ namespace embot { namespace hw { namespace spi { // we can use spi in blocking mode or non blocking mode - // blocking mode: - // - we specify a embot::core::relTime timeout - // - .... - // - // non blocking mode: - // - we specify a const embot::core::Callback &oncompletion - // - - // BLOCKING mode. + // BLOCKING mode: has a embot::core::relTime timeout // in such a mode, the functions start operations and wait until completion or until a timeout has expired. // the timeout must always be specified. for example 3*embot::core::time1millisec, 500*embot::core::time1microsec, etc... - - // BLOCKING BUS ACTIVITY CHECK - // it tells if the specified spi bus is busy with some operation. if busy the bus cannot be used. - // returns true only if the bus gets free by the specified timeout. it gives back in remaining the time = timeout - time spent inside. - // this function is internally used by functions ping(), read(), write(), transmit() and receive(). they wait until the bus is free before - // they get ownership of the bus for their tx/rx operations. - bool isbusy(embot::hw::SPI b, embot::core::relTime timeout, embot::core::relTime &remaining); - - // PING of a device - // check is a device is present on a given bus b and at a given address adr. this function waits up to a timeout - // whose typical value is 3*embot::core::time1millisec - // before any activity this functions waits until isbusy(b, timeout, remaining) returns false. -// bool ping(embot::hw::SPI b, ADR adr, embot::core::relTime timeout); - - - // BLOCKING CORE BYTE TX. - // it is the most general transmission function. - // it ensure to call directly the direct low level functions (not DMA). it sets inside the bus busy and then free again - // it accepts zero address and empty content (in such a case sends just the address) -// result_t tx(embot::hw::SPI b, ADR adr, const embot::core::Data &content, embot::core::relTime timeout); - - // BLOCKING READ from a register. - // it reads a total of destination.capacity bytes and waits until a timeout. - // operation is OK only if read() returns resOK. In this case destination.pointer contains the data; - // operation fails if read() returns resNOKtimeout (the timeout has expired) or resNOK (the operation was not even started) - // before any activity this functions waits until isbusy() returns false. any such wait consumes the specified timeout. - result_t read(embot::hw::SPI b, embot::core::Data &destination, embot::core::relTime timeout); - - // BLOCKING WRITE to a register. - // it writes a total of content.size bytes pointed by content.pointer and waits until a timeout. - // operation is OK only if write() returns resOK. In this case the bytes pointed by content.pointer are guaranteed to be written to register. - // operation fails if write() returns resNOKtimeout (the timeout has expired) or resNOK (the operation was not even started). - // before any activity this functions waits until isbusy(b, timeout, remaining) returns false. - result_t write(embot::hw::SPI b, const embot::core::Data &content, embot::core::relTime timeout); - - // BLOCKING BYTE RECEIVE. - // it receives the bytes pointed by destination.pointer for a total of destination.capacity from a given spi::ADR adr and waits until a timeout. - // operation is OK only if receive() returns resOK. In this case the bytes pointed by destination.pointer are those transmitted by the device. - // operation fails if receive() returns resNOKtimeout (the timeout has expired) or resNOK (the operation was not even started). - // before any activity this functions waits until isbusy(b, timeout, remaining) returns false. -// result_t receive(embot::hw::SPI b, ADR adr, embot::core::Data &destination, embot::core::relTime timeout); - - // BLOCKING BYTE TRANSMIT. - // its send the bytes pointed by content.pointer for a total of content.capacity to a given spi::ADR adr and waits until a timeout. - // operation is OK only if transmit() returns resOK. In this case the bytes pointed by content.pointer are guaranteed to be transmitted. - // operation fails if transmit() returns resNOKtimeout (the timeout has expired) or resNOK (the operation was not even started). - // before any activity this functions waits until isbusy(b, timeout, remaining) returns false. - // result_t transmit(embot::hw::SPI b, ADR adr, const embot::core::Data &content, embot::core::relTime timeout); - -#if 0 - // NON-BLOCKING mode. + // + // NON-BLOCKING mode: has a const embot::core::Callback &oncompletion // in such a mode, the functions returns control to the calling thread in the shortest possible time. // if the bus is busy they return without doing any activity. if not busy they set the bus busy, start hardware operations, // dont wait for completion and return control to the calling thread. // the calling thread can now operate in two modes: // 1. wait until isbusy() returns false (because the hardware sets the bus free at completion) // 2. can continue its execution and be alerted by the specified callback that the operation is completed. - - // NON-BLOCKING BUS ACTIVITY CHECK. - // it immediatly returns true if the bus is busy or false if the bus is available. - // this function is internally used by functions read() and write() which immediately returns w/out doing anything if the bus is busy. - bool isbusy(embot::hw::SPI b); - - // NON-BLOCKING READ from a register. - // if the bus is not busy it starts the reading operation of a total of destination.capacity bytes starting from register reg and returns. - // at completion of the reading operation the hardware copies the received data inside destination.pointer and ensure the execution of - // the specified callback which can be used to alert a thread. - // this funtions returns resOK if the hardware can succesfully start its operations and resNOK in any failure case. - result_t read(embot::hw::SPI b, ADR adr, Reg reg, embot::core::Data &destination, const embot::core::Callback &oncompletion); - - // NON-BLOCKING WRITE to register. - // if the bus is not busy it starts the writing operation of a total of content.capacity bytes pointed by content.pointer starting from - // register reg and returns. - // at completion of the writing operation the hardware ensures the execution of the specified callback which can be used to alert a thread. - // this funtions returns resOK if the hardware can succesfully start its operations and resNOK in any failure case. - result_t write(embot::hw::SPI b, ADR adr, Reg reg, const embot::core::Data &content, const embot::core::Callback &oncompletion = embot::core::Callback(nullptr, nullptr)); - - // NON-BLOCKING BYTE RECEIVE. - // if the bus is not busy it starts the receiving operation of a total of destination.capacity bytes and returns. - // at completion of the reading operation the hardware copies the received data inside destination.pointer and ensure the execution of - // the specified callback which can be used to alert a thread. - // this funtions returns resOK if the hardware can succesfully start its operations and resNOK in any failure case. - result_t receive(embot::hw::SPI b, ADR adr, embot::core::Data &destination, const embot::core::Callback &oncompletion); + bool isbusy(embot::hw::SPI b, embot::core::relTime timeout, embot::core::relTime &remaining); + bool isbusy(embot::hw::SPI b); - // NON-BLOCKING BYTE TRANSMIT. - result_t transmit(SPI b, ADR adr, const embot::core::Data &content, const embot::core::Callback &oncompletion); + result_t read(embot::hw::SPI b, embot::core::Data &destination, embot::core::relTime timeout); + result_t write(embot::hw::SPI b, const embot::core::Data &source, embot::core::relTime timeout); + result_t writeread(embot::hw::SPI b, const embot::core::Data &source, embot::core::Data &destination, embot::core::relTime timeout); -#endif + result_t read(embot::hw::SPI b, embot::core::Data &destination, const embot::core::Callback &oncompletion); + result_t write(embot::hw::SPI b, const embot::core::Data &source, const embot::core::Callback &oncompletion); + result_t writeread(embot::hw::SPI b, const embot::core::Data &source, embot::core::Data &destination, const embot::core::Callback &oncompletion); + }}} // namespace embot { namespace hw { namespace spi { diff --git a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi_bsp.h b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi_bsp.h index 3be93c36fe..754496ce53 100644 --- a/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi_bsp.h +++ b/emBODY/eBcode/arch-arm/embot/hw/embot_hw_spi_bsp.h @@ -20,7 +20,33 @@ namespace embot { namespace hw { namespace spi { #if defined(HAL_SPI_MODULE_ENABLED) + using SPI_Handle = SPI_HandleTypeDef; + + constexpr uint32_t mode2stm32clkpolarity(const Mode m) + { + if(Mode::none == m) { return SPI_POLARITY_LOW; } + bool polhigh = embot::core::binary::bit::check(embot::core::tointegral(m), 1); + return (true == polhigh) ? SPI_POLARITY_HIGH : SPI_POLARITY_LOW; + } + + constexpr uint32_t mode2stm32clkphase(const Mode m) + { + if(Mode::none == m) { return SPI_PHASE_1EDGE; } + bool phaedge2 = embot::core::binary::bit::check(embot::core::tointegral(m), 0); + return (true == phaedge2) ? SPI_PHASE_2EDGE : SPI_PHASE_1EDGE;; + } + + constexpr uint32_t datasize2stm32(DataSize d) + { + return embot::core::tointegral(d); + } + + constexpr uint32_t prescaler2stm32baudrateprescaler(Prescaler p) + { + return static_cast(p) << 28; + } + #else using SPI_Handle = void; #endif @@ -28,10 +54,17 @@ namespace embot { namespace hw { namespace spi { struct PROP { SPI_Handle* handle {nullptr}; - embot::hw::spi::Speed speed {12500}; + uint32_t clockrate {0}; constexpr PROP() = default; - constexpr PROP(SPI_Handle *h, embot::hw::spi::Speed s) : handle(h), speed(s) {} - constexpr PROP(SPI_Handle *h) : handle(h) {} + constexpr PROP(SPI_Handle *h, uint32_t c) : handle(h), clockrate(c) {} + constexpr PROP(SPI_Handle *h) : handle(h) {} + constexpr Speed prescalertospeed(Prescaler p) const { return clockrate >> (1+embot::core::tointegral(p)); } + constexpr Prescaler speedtoprescaler(Speed s) const + { + if(s > clockrate/2) return Prescaler::none; + for(uint8_t i=0; i<8; i++) { if((clockrate >> (i+1))<=s) return static_cast(i); } + return Prescaler::none; + }; }; struct BSP : public embot::hw::bsp::SUPP @@ -42,7 +75,7 @@ namespace embot { namespace hw { namespace spi { std::array properties; constexpr const PROP * getPROP(embot::hw::SPI h) const { return supported(h) ? properties[embot::core::tointegral(h)] : nullptr; } - bool init(embot::hw::SPI h) const; + bool init(embot::hw::SPI h, const Config &config) const; bool deinit(embot::hw::SPI h) const; constexpr embot::hw::SPI toID(const PROP& p) const { From 9be8a79298c7d951d0c66f7bbbfece22cd21a79a Mon Sep 17 00:00:00 2001 From: "marco.accame" Date: Mon, 31 Jan 2022 15:13:27 +0100 Subject: [PATCH 3/3] amc: changes for test of eeprom, enabled spi, spi2 and spi3 for aea sensors --- .../board/amc/bsp/embot_hw_bsp_amc.cpp | 145 +++++++++++++++--- .../board/amc/bsp/embot_hw_bsp_amc_config.h | 4 +- .../embot-os-hw/proj/amc-embot-os-hw.uvoptx | 48 +++--- .../embot-os-hw/proj/amc-embot-os-hw.uvprojx | 62 ++++---- .../embot-os-hw/src/main-embot-os-hw.cpp | 17 +- 5 files changed, 199 insertions(+), 77 deletions(-) diff --git a/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc.cpp b/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc.cpp index 8aa2384f58..a6d1c649d2 100644 --- a/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc.cpp +++ b/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc.cpp @@ -45,6 +45,62 @@ using namespace embot::core::binary; // - specialize the bsp // -------------------------------------------------------------------------------------------------------------------- +#if defined(EMBOT_ENABLE_hw_spi_123) +#include "embot_hw_gpio.h" +// it select spi1 / spi2 / spi3 in connector J5 +void prepare_connector_j5_spi123() +{ + constexpr embot::hw::gpio::Config out + { + embot::hw::gpio::Mode::OUTPUTpushpull, + embot::hw::gpio::Pull::nopull, + embot::hw::gpio::Speed::medium + }; + + constexpr embot::hw::gpio::State stateSPI[2] = {embot::hw::gpio::State::RESET, embot::hw::gpio::State::SET}; + + constexpr embot::hw::GPIO X1ENspi1[2] = + { + {embot::hw::GPIO::PORT::G, embot::hw::GPIO::PIN::zero}, + {embot::hw::GPIO::PORT::D, embot::hw::GPIO::PIN::eight} + }; + + constexpr embot::hw::GPIO X2ENspi2[2] = + { + {embot::hw::GPIO::PORT::G, embot::hw::GPIO::PIN::one}, + {embot::hw::GPIO::PORT::D, embot::hw::GPIO::PIN::nine} + }; + + constexpr embot::hw::GPIO X3ENspi3[2] = + { + {embot::hw::GPIO::PORT::G, embot::hw::GPIO::PIN::two}, + {embot::hw::GPIO::PORT::D, embot::hw::GPIO::PIN::ten} + }; + + // spi1 + for(uint8_t i=0; i<2; i++) + { + embot::hw::gpio::init(X1ENspi1[i], out); + embot::hw::gpio::set(X1ENspi1[i], stateSPI[i]); + } + + // spi2 + for(uint8_t i=0; i<2; i++) + { + embot::hw::gpio::init(X2ENspi2[i], out); + embot::hw::gpio::set(X2ENspi2[i], stateSPI[i]); + } + + // spi3 + for(uint8_t i=0; i<2; i++) + { + embot::hw::gpio::init(X3ENspi3[i], out); + embot::hw::gpio::set(X3ENspi3[i], stateSPI[i]); + } + +} +#endif + #if !defined(EMBOT_ENABLE_hw_bsp_specialize) bool embot::hw::bsp::specialize() { return true; } #else @@ -54,6 +110,11 @@ bool embot::hw::bsp::specialize() { return true; } bool embot::hw::bsp::specialize() { + +#if defined(EMBOT_ENABLE_hw_spi_123) + // 1. prepare spi1, spi2, spi3 + prepare_connector_j5_spi123(); +#endif return true; } @@ -600,16 +661,11 @@ namespace embot { namespace hw { namespace eeprom { #if defined(STM32HAL_BOARD_AMC) - // ... - constexpr PROP ee1p = { embot::hw::eeprom::Type::spiM95512DF, - {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::thirteen}, - {embot::hw::GPIO::PORT::G, embot::hw::GPIO::PIN::eight}, - {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::twelve}, - embot::hw::SPI::six - }; - constexpr PROP ee2p = { embot::hw::eeprom::Type::chipM95512DF, + constexpr PROP ee1p = { embot::hw::eeprom::Type::chipM95512DF, { - embot::hw::SPI::six, + embot::hw::SPI::six, + //{}, + {embot::hw::spi::Prescaler::eight, embot::hw::spi::DataSize::eight, embot::hw::spi::Mode::zero}, { {embot::hw::GPIO::PORT::G, embot::hw::GPIO::PIN::eight}, // nS {embot::hw::GPIO::PORT::F, embot::hw::GPIO::PIN::twelve}, // nW @@ -625,10 +681,10 @@ namespace embot { namespace hw { namespace eeprom { constexpr BSP thebsp { // maskofsupported - mask::pos2mask(EEPROM::one) | mask::pos2mask(EEPROM::two), + mask::pos2mask(EEPROM::one), // properties {{ - &ee1p, &ee2p + &ee1p, nullptr }} }; @@ -674,24 +730,29 @@ namespace embot { namespace hw { namespace spi { namespace embot { namespace hw { namespace spi { #if defined(STM32HAL_BOARD_AMC) - - // ... - constexpr PROP spi6p = { &hspi6, 12500000 }; - static_assert(spi6p.speed == 12.5*1000000, "SPI::six is now 12.5Mhz and must be changed inside MX_SPI6_Init()"); + // for spi1,2,3,4: define a hspix, fill it properly in here, define the pins, fill them inside the HAL_SPI_MspInit() and HAL_SPI_MspDeInit() ... +// constexpr PROP spi1p = { &hspi1, 50*1000*1000}; +// constexpr PROP spi2p = { &hspi2, 50*1000*1000}; +// constexpr PROP spi3p = { &hspi3, 50*1000*1000}; +// constexpr PROP spi4p = { &hspi4, 100*1000*1000}; + constexpr PROP spi6p = { &hspi6, 100*1000*1000}; + constexpr PROP spi5p = { &hspi5, 100*1000*1000}; + + static_assert(spi6p.clockrate == 100*1000*1000, "SPI::six is now 12.5Mhz and must be changed inside MX_SPI6_Init()"); // SPI::six is used @ 12.Mhz by a M95512-DFMC6 EEPROM and must be < 16MHz constexpr BSP thebsp { // maskofsupported - mask::pos2mask(SPI::six), + mask::pos2mask(SPI::five) | mask::pos2mask(SPI::six), // properties {{ - nullptr, nullptr, nullptr, nullptr, nullptr, &spi6p + nullptr, nullptr, nullptr, nullptr, &spi5p, &spi6p }} }; - bool BSP::init(embot::hw::SPI h) const + bool BSP::init(embot::hw::SPI h, const Config &config) const { // marco.accame: in here ... MX_SPI6_Ini() calls HAL_SPI_Init() and imposes the speed // and the low level configuration specified inside cube-mx. @@ -699,13 +760,47 @@ namespace embot { namespace hw { namespace spi { // of spi sensors (e.g., aea, aea3, AksIM-2, ...) then we must be able to call HAL_SPI_Init() // with the parameters we want. // conclusion: we shall move HAL_SPI_Init() out of BSP::init() and inside embot::hw::spi::init() - if(h == SPI::six) - { - MX_SPI6_Init(); - // HAL_SPI_MspInit(&hspi6); // it is called inside HAL_SPI_Init() + if(h == SPI::five) + { + MX_SPI5_Init(); + } + else if(h == SPI::six) + { + if(false == config.isvalid()) + { + MX_SPI6_Init(); + // HAL_SPI_MspInit(&hspi6); // it is called inside HAL_SPI_Init() + } + else + { + hspi6.Instance = SPI6; + hspi6.Init.Mode = SPI_MODE_MASTER; + hspi6.Init.Direction = SPI_DIRECTION_2LINES; + hspi6.Init.DataSize = datasize2stm32(config.datasize);; + hspi6.Init.CLKPolarity = mode2stm32clkpolarity(config.mode); + hspi6.Init.CLKPhase = mode2stm32clkphase(config.mode); + hspi6.Init.NSS = SPI_NSS_SOFT; + hspi6.Init.BaudRatePrescaler = prescaler2stm32baudrateprescaler(config.prescaler); + hspi6.Init.FirstBit = SPI_FIRSTBIT_MSB; + hspi6.Init.TIMode = SPI_TIMODE_DISABLE; + hspi6.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE; + hspi6.Init.CRCPolynomial = 0x0; + hspi6.Init.NSSPMode = SPI_NSS_PULSE_ENABLE; + hspi6.Init.NSSPolarity = SPI_NSS_POLARITY_LOW; + hspi6.Init.FifoThreshold = SPI_FIFO_THRESHOLD_01DATA; + hspi6.Init.TxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN; + hspi6.Init.RxCRCInitializationPattern = SPI_CRC_INITIALIZATION_ALL_ZERO_PATTERN; + hspi6.Init.MasterSSIdleness = SPI_MASTER_SS_IDLENESS_00CYCLE; + hspi6.Init.MasterInterDataIdleness = SPI_MASTER_INTERDATA_IDLENESS_00CYCLE; + hspi6.Init.MasterReceiverAutoSusp = SPI_MASTER_RX_AUTOSUSP_DISABLE; + hspi6.Init.MasterKeepIOState = SPI_MASTER_KEEP_IO_STATE_DISABLE; + hspi6.Init.IOSwap = SPI_IO_SWAP_DISABLE; + HAL_SPI_Init(&hspi6); + } return true; } + return false; // the new rule could be: // if we return true .... non extra init is required inside embot::hw::spi @@ -716,7 +811,11 @@ namespace embot { namespace hw { namespace spi { bool BSP::deinit(embot::hw::SPI h) const { - if(h == SPI::six) + if(h == SPI::five) + { + HAL_SPI_DeInit(&hspi5); + } + else if(h == SPI::six) { HAL_SPI_DeInit(&hspi6); // HAL_SPI_MspDeInit(&hspi6); // // it is called inside HAL_SPI_DeInit() diff --git a/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc_config.h b/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc_config.h index aff05a93e3..ae4f49cc3c 100644 --- a/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc_config.h +++ b/emBODY/eBcode/arch-arm/board/amc/bsp/embot_hw_bsp_amc_config.h @@ -24,10 +24,10 @@ #define EMBOT_ENABLE_hw_gpio #define EMBOT_ENABLE_hw_led #define EMBOT_ENABLE_hw_eeprom - #define EMBOT_ENABLE_hw_eeprom_emulatedMODE +// #define EMBOT_ENABLE_hw_eeprom_emulatedMODE #define EMBOT_ENABLE_hw_spi - #define EMBOT_ENABLE_hw_spi_wipMODE +// #define EMBOT_ENABLE_hw_spi_123 // #define EMBOT_ENABLE_hw_button // #define EMBOT_ENABLE_hw_can diff --git a/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/proj/amc-embot-os-hw.uvoptx b/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/proj/amc-embot-os-hw.uvoptx index 05d4d530c8..0d2f1abfa7 100644 --- a/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/proj/amc-embot-os-hw.uvoptx +++ b/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/proj/amc-embot-os-hw.uvoptx @@ -415,18 +415,18 @@ 0 0 - 248 + 81 1 -
134238326
+
134242064
0 0 0 0 0 1 - ..\src\main-embot-os-hw.cpp + ..\..\..\..\..\embot\hw\embot_hw_chip_M95512DF.cpp - \\h7disco\../src/main-embot-os-hw.cpp\248 + \\h7disco\../../../../../embot/hw/embot_hw_chip_M95512DF.cpp\81 @@ -450,6 +450,16 @@ 1 initialised2dmask + + 4 + 1 + done + + + 5 + 1 + ciao + @@ -1715,6 +1725,18 @@ 0 0 0 + ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp + embot_os_theScheduler.cpp + 0 + 0 + + + 6 + 22 + 8 + 0 + 0 + 0 ..\..\..\..\..\embot\hw\embot_hw_chip_M95512DF.cpp embot_hw_chip_M95512DF.cpp 0 @@ -1730,7 +1752,7 @@ 0 7 - 22 + 23 8 0 0 @@ -1742,7 +1764,7 @@ 7 - 23 + 24 8 0 0 @@ -1754,7 +1776,7 @@ 7 - 24 + 25 8 0 0 @@ -1764,18 +1786,6 @@ 0 0 - - 7 - 25 - 8 - 0 - 0 - 0 - ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp - embot_os_theScheduler.cpp - 0 - 0 - 7 26 diff --git a/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/proj/amc-embot-os-hw.uvprojx b/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/proj/amc-embot-os-hw.uvprojx index 9b5472649d..72c5962167 100644 --- a/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/proj/amc-embot-os-hw.uvprojx +++ b/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/proj/amc-embot-os-hw.uvprojx @@ -578,6 +578,11 @@ 8 ..\..\..\..\..\embot\hw\embot_hw_spi.cpp + + embot_os_theScheduler.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp + embot_hw_chip_M95512DF.cpp 8 @@ -603,11 +608,6 @@ 8 ..\..\..\..\..\embot\os\embot_os_theCallbackManager.cpp - - embot_os_theScheduler.cpp - 8 - ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp - embot_os_theTimerManager.cpp 8 @@ -959,7 +959,7 @@ 1 - 2 + 6 0 0 1 @@ -1224,6 +1224,11 @@ 8 ..\..\..\..\..\embot\hw\embot_hw_spi.cpp + + embot_os_theScheduler.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp + embot_hw_chip_M95512DF.cpp 8 @@ -1249,11 +1254,6 @@ 8 ..\..\..\..\..\embot\os\embot_os_theCallbackManager.cpp - - embot_os_theScheduler.cpp - 8 - ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp - embot_os_theTimerManager.cpp 8 @@ -1921,6 +1921,11 @@ 8 ..\..\..\..\..\embot\hw\embot_hw_spi.cpp + + embot_os_theScheduler.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp + embot_hw_chip_M95512DF.cpp 8 @@ -1946,11 +1951,6 @@ 8 ..\..\..\..\..\embot\os\embot_os_theCallbackManager.cpp - - embot_os_theScheduler.cpp - 8 - ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp - embot_os_theTimerManager.cpp 8 @@ -2618,6 +2618,11 @@ 8 ..\..\..\..\..\embot\hw\embot_hw_spi.cpp + + embot_os_theScheduler.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp + embot_hw_chip_M95512DF.cpp 8 @@ -2643,11 +2648,6 @@ 8 ..\..\..\..\..\embot\os\embot_os_theCallbackManager.cpp - - embot_os_theScheduler.cpp - 8 - ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp - embot_os_theTimerManager.cpp 8 @@ -3315,6 +3315,11 @@ 8 ..\..\..\..\..\embot\hw\embot_hw_spi.cpp + + embot_os_theScheduler.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp + embot_hw_chip_M95512DF.cpp 8 @@ -3340,11 +3345,6 @@ 8 ..\..\..\..\..\embot\os\embot_os_theCallbackManager.cpp - - embot_os_theScheduler.cpp - 8 - ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp - embot_os_theTimerManager.cpp 8 @@ -3961,6 +3961,11 @@ 8 ..\..\..\..\..\embot\hw\embot_hw_spi.cpp + + embot_os_theScheduler.cpp + 8 + ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp + embot_hw_chip_M95512DF.cpp 8 @@ -3986,11 +3991,6 @@ 8 ..\..\..\..\..\embot\os\embot_os_theCallbackManager.cpp - - embot_os_theScheduler.cpp - 8 - ..\..\..\..\..\embot\os\embot_os_theScheduler.cpp - embot_os_theTimerManager.cpp 8 diff --git a/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/src/main-embot-os-hw.cpp b/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/src/main-embot-os-hw.cpp index 21f08a34a5..a5c9ff4736 100644 --- a/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/src/main-embot-os-hw.cpp +++ b/emBODY/eBcode/arch-arm/board/amc/examples/embot-os-hw/src/main-embot-os-hw.cpp @@ -167,8 +167,7 @@ int main(void) #if defined(TEST_EMBOT_HW_EEPROM) #include "embot_hw_eeprom.h" -//constexpr embot::hw::EEPROM eeprom2test {embot::hw::EEPROM::one}; -constexpr embot::hw::EEPROM eeprom2test {embot::hw::EEPROM::two}; +constexpr embot::hw::EEPROM eeprom2test {embot::hw::EEPROM::one}; #endif @@ -192,6 +191,20 @@ void test_embot_hw_init() // if(embot::hw::resOK == embot::hw::eeprom::init(eeprom2test, {}); embot::hw::eeprom::init(eeprom2test, {}); + + + uint32_t ciao[3] = {1, 2, 3}; + void *arg {ciao}; + auto lambda = [](void *p){ + + uint32_t *data = reinterpret_cast(p); + data[1] = 7; + }; + embot::core::Callback cbk1 {lambda, &ciao}; + + cbk1.execute(); + + ciao[1] = ciao[1]; #endif