From f9972313aec9cf4c3bedb765496c8ee07e4cb7ed Mon Sep 17 00:00:00 2001 From: Tshepang Mbambo Date: Thu, 16 Feb 2023 18:58:08 +0200 Subject: [PATCH 1/6] fix some lines, and do a consistency fix --- compiler/rustc_codegen_llvm/src/consts.rs | 4 ++-- compiler/rustc_middle/src/middle/codegen_fn_attrs.rs | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/compiler/rustc_codegen_llvm/src/consts.rs b/compiler/rustc_codegen_llvm/src/consts.rs index 92629aa18d458..9116e71beac83 100644 --- a/compiler/rustc_codegen_llvm/src/consts.rs +++ b/compiler/rustc_codegen_llvm/src/consts.rs @@ -521,7 +521,7 @@ impl<'ll> StaticMethods for CodegenCx<'ll, '_> { // The semantics of #[used] in Rust only require the symbol to make it into the // object file. It is explicitly allowed for the linker to strip the symbol if it - // is dead, which means we are allowed use `llvm.compiler.used` instead of + // is dead, which means we are allowed to use `llvm.compiler.used` instead of // `llvm.used` here. // // Additionally, https://reviews.llvm.org/D97448 in LLVM 13 started emitting unique @@ -532,7 +532,7 @@ impl<'ll> StaticMethods for CodegenCx<'ll, '_> { // That said, we only ever emit these when compiling for ELF targets, unless // `#[used(compiler)]` is explicitly requested. This is to avoid similar breakage // on other targets, in particular MachO targets have *their* static constructor - // lists broken if `llvm.compiler.used` is emitted rather than llvm.used. However, + // lists broken if `llvm.compiler.used` is emitted rather than `llvm.used`. However, // that check happens when assigning the `CodegenFnAttrFlags` in `rustc_hir_analysis`, // so we don't need to take care of it here. self.add_compiler_used_global(g); diff --git a/compiler/rustc_middle/src/middle/codegen_fn_attrs.rs b/compiler/rustc_middle/src/middle/codegen_fn_attrs.rs index bea884c856a95..c4601a1fb4189 100644 --- a/compiler/rustc_middle/src/middle/codegen_fn_attrs.rs +++ b/compiler/rustc_middle/src/middle/codegen_fn_attrs.rs @@ -91,7 +91,8 @@ bitflags! { /// the MIR `InstrumentCoverage` pass and not added to the coverage map /// during codegen. const NO_COVERAGE = 1 << 15; - /// `#[used(linker)]`: indicates that LLVM nor the linker can eliminate this function. + /// `#[used(linker)]`: + /// indicates that neither LLVM nor the linker will eliminate this function. const USED_LINKER = 1 << 16; /// `#[rustc_deallocator]`: a hint to LLVM that the function only deallocates memory. const DEALLOCATOR = 1 << 17; From 09359d2aa5246300ca00addb7663317c7d5c933f Mon Sep 17 00:00:00 2001 From: Michael Goulet Date: Thu, 16 Feb 2023 22:52:41 +0000 Subject: [PATCH 2/6] Add compiler-errors to a few more triagebot groups --- triagebot.toml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/triagebot.toml b/triagebot.toml index 8a9d9403366d8..7a26457ab04c0 100644 --- a/triagebot.toml +++ b/triagebot.toml @@ -538,6 +538,7 @@ diagnostics = [ "@TaKO8Ki", ] parser = [ + "@compiler-errors", "@davidtwco", "@nnethercote", "@petrochenkov", @@ -567,6 +568,7 @@ borrowck = [ "@pnkfelix", ] ast_lowering = [ + "@compiler-errors", "@spastorino", ] fallback = [ @@ -630,7 +632,7 @@ style-team = [ "/src/stage0.json" = ["bootstrap"] "/tests/ui" = ["compiler"] "/src/tools/cargo" = ["@ehuss", "@joshtriplett"] -"/src/tools/compiletest" = ["bootstrap", "@wesleywiser", "@oli-obk"] +"/src/tools/compiletest" = ["bootstrap", "@wesleywiser", "@oli-obk", "@compiler-errors"] "/src/tools/linkchecker" = ["@ehuss"] "/src/tools/rust-installer" = ["bootstrap"] "/src/tools/rustbook" = ["@ehuss"] From 2edf6c878449294efee45ca5b7f5a921658ff666 Mon Sep 17 00:00:00 2001 From: Jubilee Young Date: Thu, 2 Feb 2023 00:14:36 -0800 Subject: [PATCH 3/6] Default repr(C) enums to c_int size This is what ISO C strongly implies this is correct, and many processor-specific ABIs imply or mandate this size, so "everyone" (LLVM, gcc...) defaults to emitting enums this way. However, this is by no means guaranteed by ISO C, and the bare-metal Arm targets show it can be overridden, which rustc supports via `c-enum-min-bits` in a target.json. The override is a flag named `-fshort-enums` in clang and gcc, but introducing a CLI flag is probably unnecessary for rustc. This flag can be used by non-Arm microcontroller targets, like AVR and MSP430, but it is not enabled for them by default. Rust programmers who know the size of a target's enums can use explicit reprs, which also lets them match C23 code. This change is most relevant to 16-bit targets: AVR and MSP430. Most of rustc's targets use 32-bit ints, but ILP64 does exist. Regardless, rustc should now correctly handle enums for both very small and very large targets. Thanks to William for confirming MSP430 behavior, and to Waffle for better style and no-core size_of asserts. Co-authored-by: William D. Jones Co-authored-by: Waffle Maybe --- compiler/rustc_abi/src/lib.rs | 4 +- .../src/spec/armebv7r_none_eabi.rs | 2 +- .../src/spec/armebv7r_none_eabihf.rs | 2 +- .../rustc_target/src/spec/armv4t_none_eabi.rs | 2 +- .../rustc_target/src/spec/armv7a_none_eabi.rs | 2 +- .../src/spec/armv7a_none_eabihf.rs | 2 +- .../rustc_target/src/spec/armv7r_none_eabi.rs | 2 +- .../src/spec/armv7r_none_eabihf.rs | 2 +- .../src/spec/hexagon_unknown_linux_musl.rs | 2 +- compiler/rustc_target/src/spec/mod.rs | 30 ++++++----- compiler/rustc_target/src/spec/thumb_base.rs | 2 +- .../src/spec/thumbv4t_none_eabi.rs | 2 +- tests/ui/repr/16-bit-repr-c-enum.rs | 52 +++++++++++++++++++ 13 files changed, 81 insertions(+), 25 deletions(-) create mode 100644 tests/ui/repr/16-bit-repr-c-enum.rs diff --git a/compiler/rustc_abi/src/lib.rs b/compiler/rustc_abi/src/lib.rs index b48654d1ac36a..e2cde157b147e 100644 --- a/compiler/rustc_abi/src/lib.rs +++ b/compiler/rustc_abi/src/lib.rs @@ -170,7 +170,9 @@ pub struct TargetDataLayout { pub instruction_address_space: AddressSpace, - /// Minimum size of #[repr(C)] enums (default I32 bits) + /// Minimum size of #[repr(C)] enums (default c_int::BITS, usually 32) + /// Note: This isn't in LLVM's data layout string, it is `short_enum` + /// so the only valid spec for LLVM is c_int::BITS or 8 pub c_enum_min_size: Integer, } diff --git a/compiler/rustc_target/src/spec/armebv7r_none_eabi.rs b/compiler/rustc_target/src/spec/armebv7r_none_eabi.rs index 8c65d6afcc182..f6f46aac4c391 100644 --- a/compiler/rustc_target/src/spec/armebv7r_none_eabi.rs +++ b/compiler/rustc_target/src/spec/armebv7r_none_eabi.rs @@ -19,7 +19,7 @@ pub fn target() -> Target { max_atomic_width: Some(32), emit_debug_gdb_scripts: false, // GCC and Clang default to 8 for arm-none here - c_enum_min_bits: 8, + c_enum_min_bits: Some(8), ..Default::default() }, } diff --git a/compiler/rustc_target/src/spec/armebv7r_none_eabihf.rs b/compiler/rustc_target/src/spec/armebv7r_none_eabihf.rs index 7013bc60d16ba..9608efe8bcf60 100644 --- a/compiler/rustc_target/src/spec/armebv7r_none_eabihf.rs +++ b/compiler/rustc_target/src/spec/armebv7r_none_eabihf.rs @@ -20,7 +20,7 @@ pub fn target() -> Target { max_atomic_width: Some(32), emit_debug_gdb_scripts: false, // GCC and Clang default to 8 for arm-none here - c_enum_min_bits: 8, + c_enum_min_bits: Some(8), ..Default::default() }, } diff --git a/compiler/rustc_target/src/spec/armv4t_none_eabi.rs b/compiler/rustc_target/src/spec/armv4t_none_eabi.rs index 7ac1aab3b43c8..28b109889e928 100644 --- a/compiler/rustc_target/src/spec/armv4t_none_eabi.rs +++ b/compiler/rustc_target/src/spec/armv4t_none_eabi.rs @@ -49,7 +49,7 @@ pub fn target() -> Target { // from thumb_base, rust-lang/rust#44993. emit_debug_gdb_scripts: false, // from thumb_base, apparently gcc/clang give enums a minimum of 8 bits on no-os targets - c_enum_min_bits: 8, + c_enum_min_bits: Some(8), ..Default::default() }, } diff --git a/compiler/rustc_target/src/spec/armv7a_none_eabi.rs b/compiler/rustc_target/src/spec/armv7a_none_eabi.rs index 4e20fb3256975..d59de86a23012 100644 --- a/compiler/rustc_target/src/spec/armv7a_none_eabi.rs +++ b/compiler/rustc_target/src/spec/armv7a_none_eabi.rs @@ -27,7 +27,7 @@ pub fn target() -> Target { max_atomic_width: Some(64), panic_strategy: PanicStrategy::Abort, emit_debug_gdb_scripts: false, - c_enum_min_bits: 8, + c_enum_min_bits: Some(8), ..Default::default() }; Target { diff --git a/compiler/rustc_target/src/spec/armv7a_none_eabihf.rs b/compiler/rustc_target/src/spec/armv7a_none_eabihf.rs index ae70129ae5182..8cdf3c36ba2ea 100644 --- a/compiler/rustc_target/src/spec/armv7a_none_eabihf.rs +++ b/compiler/rustc_target/src/spec/armv7a_none_eabihf.rs @@ -19,7 +19,7 @@ pub fn target() -> Target { panic_strategy: PanicStrategy::Abort, emit_debug_gdb_scripts: false, // GCC and Clang default to 8 for arm-none here - c_enum_min_bits: 8, + c_enum_min_bits: Some(8), ..Default::default() }; Target { diff --git a/compiler/rustc_target/src/spec/armv7r_none_eabi.rs b/compiler/rustc_target/src/spec/armv7r_none_eabi.rs index 25f301ccce744..5225abf44fca4 100644 --- a/compiler/rustc_target/src/spec/armv7r_none_eabi.rs +++ b/compiler/rustc_target/src/spec/armv7r_none_eabi.rs @@ -18,7 +18,7 @@ pub fn target() -> Target { max_atomic_width: Some(32), emit_debug_gdb_scripts: false, // GCC and Clang default to 8 for arm-none here - c_enum_min_bits: 8, + c_enum_min_bits: Some(8), ..Default::default() }, } diff --git a/compiler/rustc_target/src/spec/armv7r_none_eabihf.rs b/compiler/rustc_target/src/spec/armv7r_none_eabihf.rs index 40449759dd377..9a35e04617f9c 100644 --- a/compiler/rustc_target/src/spec/armv7r_none_eabihf.rs +++ b/compiler/rustc_target/src/spec/armv7r_none_eabihf.rs @@ -19,7 +19,7 @@ pub fn target() -> Target { max_atomic_width: Some(32), emit_debug_gdb_scripts: false, // GCC and Clang default to 8 for arm-none here - c_enum_min_bits: 8, + c_enum_min_bits: Some(8), ..Default::default() }, } diff --git a/compiler/rustc_target/src/spec/hexagon_unknown_linux_musl.rs b/compiler/rustc_target/src/spec/hexagon_unknown_linux_musl.rs index 3aad05eb2719b..4c6ab5f5ae454 100644 --- a/compiler/rustc_target/src/spec/hexagon_unknown_linux_musl.rs +++ b/compiler/rustc_target/src/spec/hexagon_unknown_linux_musl.rs @@ -11,7 +11,7 @@ pub fn target() -> Target { base.has_rpath = true; base.linker_flavor = LinkerFlavor::Unix(Cc::Yes); - base.c_enum_min_bits = 8; + base.c_enum_min_bits = Some(8); Target { llvm_target: "hexagon-unknown-linux-musl".into(), diff --git a/compiler/rustc_target/src/spec/mod.rs b/compiler/rustc_target/src/spec/mod.rs index 1e80b8b759db4..4ae8a41cc6535 100644 --- a/compiler/rustc_target/src/spec/mod.rs +++ b/compiler/rustc_target/src/spec/mod.rs @@ -1344,10 +1344,18 @@ impl Target { }); } - dl.c_enum_min_size = match Integer::from_size(Size::from_bits(self.c_enum_min_bits)) { - Ok(bits) => bits, - Err(err) => return Err(TargetDataLayoutErrors::InvalidBitsSize { err }), - }; + dl.c_enum_min_size = self + .c_enum_min_bits + .map_or_else( + || { + self.c_int_width + .parse() + .map_err(|_| String::from("failed to parse c_int_width")) + }, + Ok, + ) + .and_then(|i| Integer::from_size(Size::from_bits(i))) + .map_err(|err| TargetDataLayoutErrors::InvalidBitsSize { err })?; Ok(dl) } @@ -1701,8 +1709,8 @@ pub struct TargetOptions { /// If present it's a default value to use for adjusting the C ABI. pub default_adjusted_cabi: Option, - /// Minimum number of bits in #[repr(C)] enum. Defaults to 32. - pub c_enum_min_bits: u64, + /// Minimum number of bits in #[repr(C)] enum. Defaults to the size of c_int + pub c_enum_min_bits: Option, /// Whether or not the DWARF `.debug_aranges` section should be generated. pub generate_arange_section: bool, @@ -1932,7 +1940,7 @@ impl Default for TargetOptions { supported_split_debuginfo: Cow::Borrowed(&[SplitDebuginfo::Off]), supported_sanitizers: SanitizerSet::empty(), default_adjusted_cabi: None, - c_enum_min_bits: 32, + c_enum_min_bits: None, generate_arange_section: true, supports_stack_protector: true, entry_name: "main".into(), @@ -2118,12 +2126,6 @@ impl Target { base.$key_name = s; } } ); - ($key_name:ident, u64) => ( { - let name = (stringify!($key_name)).replace("_", "-"); - if let Some(s) = obj.remove(&name).and_then(|j| Json::as_u64(&j)) { - base.$key_name = s; - } - } ); ($key_name:ident, u32) => ( { let name = (stringify!($key_name)).replace("_", "-"); if let Some(s) = obj.remove(&name).and_then(|b| b.as_u64()) { @@ -2492,6 +2494,7 @@ impl Target { key!(is_builtin, bool); key!(c_int_width = "target-c-int-width"); + key!(c_enum_min_bits, Option); // if None, matches c_int_width key!(os); key!(env); key!(abi); @@ -2587,7 +2590,6 @@ impl Target { key!(supported_split_debuginfo, falliable_list)?; key!(supported_sanitizers, SanitizerSet)?; key!(default_adjusted_cabi, Option)?; - key!(c_enum_min_bits, u64); key!(generate_arange_section, bool); key!(supports_stack_protector, bool); key!(entry_name); diff --git a/compiler/rustc_target/src/spec/thumb_base.rs b/compiler/rustc_target/src/spec/thumb_base.rs index 000766c57ce79..4dcf47fe465c3 100644 --- a/compiler/rustc_target/src/spec/thumb_base.rs +++ b/compiler/rustc_target/src/spec/thumb_base.rs @@ -53,7 +53,7 @@ pub fn opts() -> TargetOptions { frame_pointer: FramePointer::Always, // ARM supports multiple ABIs for enums, the linux one matches the default of 32 here // but any arm-none or thumb-none target will be defaulted to 8 on GCC and clang - c_enum_min_bits: 8, + c_enum_min_bits: Some(8), ..Default::default() } } diff --git a/compiler/rustc_target/src/spec/thumbv4t_none_eabi.rs b/compiler/rustc_target/src/spec/thumbv4t_none_eabi.rs index 5a3e4c88d3a9b..e3734932f8855 100644 --- a/compiler/rustc_target/src/spec/thumbv4t_none_eabi.rs +++ b/compiler/rustc_target/src/spec/thumbv4t_none_eabi.rs @@ -55,7 +55,7 @@ pub fn target() -> Target { // suggested from thumb_base, rust-lang/rust#44993. emit_debug_gdb_scripts: false, // suggested from thumb_base, with no-os gcc/clang use 8-bit enums - c_enum_min_bits: 8, + c_enum_min_bits: Some(8), frame_pointer: FramePointer::MayOmit, main_needs_argc_argv: false, diff --git a/tests/ui/repr/16-bit-repr-c-enum.rs b/tests/ui/repr/16-bit-repr-c-enum.rs new file mode 100644 index 0000000000000..2acfde4be46d9 --- /dev/null +++ b/tests/ui/repr/16-bit-repr-c-enum.rs @@ -0,0 +1,52 @@ +// build-pass +// revisions: avr msp430 +// +// [avr] needs-llvm-components: avr +// [avr] compile-flags: --target=avr-unknown-gnu-atmega328 --crate-type=rlib +// [msp430] needs-llvm-components: msp430 +// [msp430] compile-flags: --target=msp430-none-elf --crate-type=rlib +#![feature(no_core, lang_items, intrinsics, staged_api)] +#![no_core] +#![crate_type = "lib"] +#![stable(feature = "", since = "")] +#![allow(dead_code)] + +// Test that the repr(C) attribute doesn't break compilation +// Previous bad assumption was that 32-bit enum default width is fine on msp430, avr +// But the width of the C int on these platforms is 16 bits, and C enums <= C int range +// so we want no more than that, usually. This resulted in errors like +// "layout decided on a larger discriminant type (I32) than typeck (I16)" +#[repr(C)] +enum Foo { + Bar, +} + +extern "rust-intrinsic" { + #[stable(feature = "", since = "")] + #[rustc_const_stable(feature = "", since = "")] + #[rustc_safe_intrinsic] + fn size_of() -> usize; +} + +#[lang="sized"] +trait Sized {} +#[lang="copy"] +trait Copy {} + +const EXPECTED: usize = 2; +const ACTUAL: usize = size_of::(); +// Validate that the size is indeed 16 bits, to match this C static_assert: +/** +```c +#include +enum foo { + BAR +}; +int main(void) +{ + /* passes on msp430-elf-gcc */ + static_assert(sizeof(enum foo) == 2); +} +``` +*/ +const _: [(); EXPECTED] = [(); ACTUAL]; From 6990ab9ad2cde9b67073ffac29ffecc2be8e722f Mon Sep 17 00:00:00 2001 From: KittyBorgX Date: Sun, 12 Feb 2023 21:01:27 +0530 Subject: [PATCH 4/6] Copy `bin/*` and `lib/*.dylib` files to `stage0-sysroot` --- src/bootstrap/compile.rs | 66 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/src/bootstrap/compile.rs b/src/bootstrap/compile.rs index 07c0d2233caeb..97a1102e3c576 100644 --- a/src/bootstrap/compile.rs +++ b/src/bootstrap/compile.rs @@ -445,6 +445,72 @@ impl Step for StdLink { let libdir = builder.sysroot_libdir(target_compiler, target); let hostdir = builder.sysroot_libdir(target_compiler, compiler.host); add_to_sysroot(builder, &libdir, &hostdir, &libstd_stamp(builder, compiler, target)); + + if compiler.stage == 0 { + // special handling for stage0, to make `rustup toolchain link` and `x dist --stage 0` + // work for stage0-sysroot + let sysroot = builder.out.join(&compiler.host.triple).join("stage0-sysroot"); + + let host_lib_dir = builder.initial_rustc.ancestors().nth(2).unwrap().join("lib"); + let host_bin_dir = builder.out.join(&builder.initial_rustc.parent().unwrap()); + let host_codegen_backends = + host_lib_dir.join("rustlib").join(&compiler.host.triple).join("codegen-backends"); + let sysroot_bin_dir = sysroot.join("bin"); + let sysroot_lib_dir = sysroot.join("lib"); + let sysroot_codegen_backends = builder.sysroot_codegen_backends(compiler); + + // Create the `bin` directory in stage0-sysroot + t!(fs::create_dir_all(&sysroot_bin_dir)); + + // copy bin files from `builder.initial_rustc/./` to `stage0-sysroot/bin` + if let Ok(files) = fs::read_dir(&host_bin_dir) { + for file in files { + let file = t!(file); + if file.file_name() == "rustfmt" { + // This is when `rustc` and `cargo` are set in `config.toml` + if !file.path().starts_with(&builder.out) { + builder.copy( + &file.path().into_boxed_path(), + &sysroot_bin_dir.join(file.file_name()), + ); + } else { + builder.copy( + &builder + .out + .join(&compiler.host.triple) + .join("rustfmt/bin/rustfmt"), + &sysroot_bin_dir.join(file.file_name()), + ); + } + } else { + builder.copy( + &file.path().into_boxed_path(), + &sysroot_bin_dir.join(file.file_name()), + ); + } + } + } + + // copy dylib files from `builder.initial_rustc/../lib/*` while excluding the `rustlib` directory to `stage0-sysroot/lib` + if let Ok(files) = fs::read_dir(&host_lib_dir) { + for file in files { + let file = t!(file); + let path = file.path(); + if path.is_file() + && is_dylib(&file.file_name().into_string().unwrap()) + && !path.starts_with(sysroot_lib_dir.join("rustlib").into_boxed_path()) + { + builder.copy(&path, &sysroot_lib_dir.join(path.file_name().unwrap())); + } + } + } + + t!(fs::create_dir_all(&sysroot_codegen_backends)); + // copy `codegen-backends` from `host_lib_dir/rustlib/codegen_backends` to `stage0-sysroot/lib/rustlib/host-triple/codegen-backends` if it exists. + if host_codegen_backends.exists() { + builder.cp_r(&host_codegen_backends, &sysroot_codegen_backends); + } + } } } From ad8947c32b56a21def3093b36ecd2b8bdee711df Mon Sep 17 00:00:00 2001 From: Tshepang Mbambo Date: Fri, 17 Feb 2023 03:45:48 +0200 Subject: [PATCH 5/6] typo --- compiler/rustc_codegen_ssa/src/lib.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/compiler/rustc_codegen_ssa/src/lib.rs b/compiler/rustc_codegen_ssa/src/lib.rs index d5530c476807a..7d51cee307e92 100644 --- a/compiler/rustc_codegen_ssa/src/lib.rs +++ b/compiler/rustc_codegen_ssa/src/lib.rs @@ -13,7 +13,7 @@ //! This crate contains codegen code that is used by all codegen backends (LLVM and others). //! The backend-agnostic functions of this crate use functions defined in various traits that -//! have to be implemented by each backends. +//! have to be implemented by each backend. #[macro_use] extern crate rustc_macros; From c946494c34d7b3d95591893541038b1fb736653d Mon Sep 17 00:00:00 2001 From: Scott McMurray Date: Thu, 16 Feb 2023 18:46:25 -0800 Subject: [PATCH 6/6] `BasicBlock::new(0)` -> `START_BLOCK` [no functional changes] --- compiler/rustc_const_eval/src/transform/promote_consts.rs | 2 +- compiler/rustc_middle/src/mir/visit.rs | 6 +++--- compiler/rustc_mir_transform/src/dest_prop.rs | 6 +++--- compiler/rustc_mir_transform/src/generator.rs | 6 +++--- compiler/rustc_mir_transform/src/inline.rs | 2 +- compiler/rustc_mir_transform/src/simplify.rs | 2 +- 6 files changed, 12 insertions(+), 12 deletions(-) diff --git a/compiler/rustc_const_eval/src/transform/promote_consts.rs b/compiler/rustc_const_eval/src/transform/promote_consts.rs index fae6117f8f052..5929987fd2178 100644 --- a/compiler/rustc_const_eval/src/transform/promote_consts.rs +++ b/compiler/rustc_const_eval/src/transform/promote_consts.rs @@ -896,7 +896,7 @@ impl<'a, 'tcx> Promoter<'a, 'tcx> { assert_eq!(self.new_block(), START_BLOCK); self.visit_rvalue( &mut rvalue, - Location { block: BasicBlock::new(0), statement_index: usize::MAX }, + Location { block: START_BLOCK, statement_index: usize::MAX }, ); let span = self.promoted.span; diff --git a/compiler/rustc_middle/src/mir/visit.rs b/compiler/rustc_middle/src/mir/visit.rs index 3ddac5e11fbc5..443c1b2d261ef 100644 --- a/compiler/rustc_middle/src/mir/visit.rs +++ b/compiler/rustc_middle/src/mir/visit.rs @@ -323,7 +323,7 @@ macro_rules! make_mir_visitor { self.visit_source_scope($(& $mutability)? *parent_scope); } if let Some((callee, callsite_span)) = inlined { - let location = START_BLOCK.start_location(); + let location = Location::START; self.visit_span($(& $mutability)? *callsite_span); @@ -837,7 +837,7 @@ macro_rules! make_mir_visitor { } = var_debug_info; self.visit_source_info(source_info); - let location = START_BLOCK.start_location(); + let location = Location::START; match value { VarDebugInfoContents::Const(c) => self.visit_constant(c, location), VarDebugInfoContents::Place(place) => @@ -1026,7 +1026,7 @@ macro_rules! super_body { $self.visit_span($(& $mutability)? $body.span); for const_ in &$($mutability)? $body.required_consts { - let location = START_BLOCK.start_location(); + let location = Location::START; $self.visit_constant(const_, location); } } diff --git a/compiler/rustc_mir_transform/src/dest_prop.rs b/compiler/rustc_mir_transform/src/dest_prop.rs index 5c5baa68e5889..2e481b972781c 100644 --- a/compiler/rustc_mir_transform/src/dest_prop.rs +++ b/compiler/rustc_mir_transform/src/dest_prop.rs @@ -136,8 +136,8 @@ use rustc_index::bit_set::BitSet; use rustc_middle::mir::visit::{MutVisitor, PlaceContext, Visitor}; use rustc_middle::mir::{dump_mir, PassWhere}; use rustc_middle::mir::{ - traversal, BasicBlock, Body, InlineAsmOperand, Local, LocalKind, Location, Operand, Place, - Rvalue, Statement, StatementKind, TerminatorKind, + traversal, Body, InlineAsmOperand, Local, LocalKind, Location, Operand, Place, Rvalue, + Statement, StatementKind, TerminatorKind, }; use rustc_middle::ty::TyCtxt; use rustc_mir_dataflow::impls::MaybeLiveLocals; @@ -468,7 +468,7 @@ impl<'a, 'body, 'alloc, 'tcx> FilterInformation<'a, 'body, 'alloc, 'tcx> { // to reuse the allocation. write_info: write_info_alloc, // Doesn't matter what we put here, will be overwritten before being used - at: Location { block: BasicBlock::from_u32(0), statement_index: 0 }, + at: Location::START, }; this.internal_filter_liveness(); } diff --git a/compiler/rustc_mir_transform/src/generator.rs b/compiler/rustc_mir_transform/src/generator.rs index 47f9d35a4f7ec..5bc887fe8a970 100644 --- a/compiler/rustc_mir_transform/src/generator.rs +++ b/compiler/rustc_mir_transform/src/generator.rs @@ -487,7 +487,7 @@ fn transform_async_context<'tcx>(tcx: TyCtxt<'tcx>, body: &mut Body<'tcx>) { let get_context_def_id = tcx.require_lang_item(LangItem::GetContext, None); - for bb in BasicBlock::new(0)..body.basic_blocks.next_index() { + for bb in START_BLOCK..body.basic_blocks.next_index() { let bb_data = &body[bb]; if bb_data.is_cleanup { continue; @@ -1255,7 +1255,7 @@ fn create_generator_resume_function<'tcx>( use rustc_middle::mir::AssertKind::{ResumedAfterPanic, ResumedAfterReturn}; // Jump to the entry point on the unresumed - cases.insert(0, (UNRESUMED, BasicBlock::new(0))); + cases.insert(0, (UNRESUMED, START_BLOCK)); // Panic when resumed on the returned or poisoned state let generator_kind = body.generator_kind().unwrap(); @@ -1481,7 +1481,7 @@ impl<'tcx> MirPass<'tcx> for StateTransform { // When first entering the generator, move the resume argument into its new local. let source_info = SourceInfo::outermost(body.span); - let stmts = &mut body.basic_blocks_mut()[BasicBlock::new(0)].statements; + let stmts = &mut body.basic_blocks_mut()[START_BLOCK].statements; stmts.insert( 0, Statement { diff --git a/compiler/rustc_mir_transform/src/inline.rs b/compiler/rustc_mir_transform/src/inline.rs index 84640b703c802..8421bc9266497 100644 --- a/compiler/rustc_mir_transform/src/inline.rs +++ b/compiler/rustc_mir_transform/src/inline.rs @@ -96,7 +96,7 @@ fn inline<'tcx>(tcx: TyCtxt<'tcx>, body: &mut Body<'tcx>) -> bool { history: Vec::new(), changed: false, }; - let blocks = BasicBlock::new(0)..body.basic_blocks.next_index(); + let blocks = START_BLOCK..body.basic_blocks.next_index(); this.process_blocks(body, blocks); this.changed } diff --git a/compiler/rustc_mir_transform/src/simplify.rs b/compiler/rustc_mir_transform/src/simplify.rs index ced97b2c78842..9ef55c558c60b 100644 --- a/compiler/rustc_mir_transform/src/simplify.rs +++ b/compiler/rustc_mir_transform/src/simplify.rs @@ -496,7 +496,7 @@ impl UsedLocals { self.increment = false; // The location of the statement is irrelevant. - let location = Location { block: START_BLOCK, statement_index: 0 }; + let location = Location::START; self.visit_statement(statement, location); }