From be3604f962b65ba95c44a2d0aa38241fef7b2cf7 Mon Sep 17 00:00:00 2001
From: David Sawatzke <david-sawatzke@users.noreply.github.com>
Date: Tue, 1 Jan 2019 17:39:36 +0100
Subject: [PATCH] Fix the mappings a bit

---
 src/pin_mappings.rs | 67 +++++++++++++++++++++++----------------------
 1 file changed, 34 insertions(+), 33 deletions(-)

diff --git a/src/pin_mappings.rs b/src/pin_mappings.rs
index 4d3b183..0858775 100644
--- a/src/pin_mappings.rs
+++ b/src/pin_mappings.rs
@@ -5,7 +5,7 @@ use crate::gpio::gpiob::*;
 #[allow(unused)]
 #[cfg(feature = "device-selected")]
 use crate::gpio::gpioc::*;
-#[cfg(feature = "stm32f030xc")]
+#[cfg(feature = "stm32f030")]
 use crate::gpio::gpiod::*;
 #[allow(unused)]
 #[cfg(feature = "device-selected")]
@@ -58,31 +58,7 @@ pins! {
     PA12 => {AF5: SdaPin<I2C1>}
 }
 
-#[cfg(feature = "stm32f030x6")]
-pins! {
-    PA2 => {AF1: TxPin<USART1>},
-    PA3 => {AF1: RxPin<USART1>},
-    PA14 => {AF1: TxPin<USART1>},
-    PA15 => {AF1: RxPin<USART1>},
-    PB13 => {AF0: SckPin<SPI1>},
-    PB14 => {AF0: MisoPin<SPI1>},
-    PB15 => {AF0: MosiPin<SPI1>}
-}
-
-#[cfg(any(
-    feature = "stm32f030x8",
-    feature = "stm32f030xc",
-    feature = "stm32f042",
-    feature = "stm32f070",
-))]
-pins! {
-    PA2 => {AF1: TxPin<USART2>},
-    PA3 => {AF1: RxPin<USART2>},
-    PA14 => {AF1: TxPin<USART2>},
-    PA15 => {AF1: RxPin<USART2>}
-}
-
-#[cfg(any(feature = "stm32f030xc", feature = "stm32f070xb"))]
+#[cfg(any(feature = "stm32f030", feature = "stm32f070"))]
 pins! {
     PA0 => {AF4: TxPin<USART4>},
     PA1 => {AF4: RxPin<USART4>},
@@ -105,7 +81,7 @@ pins! {
     }
 }
 
-#[cfg(feature = "stm32f030xc")]
+#[cfg(feature = "stm32f030")]
 pins! {
     PA4 => {AF5: TxPin<USART6>},
     PA5 => {AF5: RxPin<USART6>},
@@ -117,6 +93,29 @@ pins! {
     PD2 => {AF2: TxPin<USART5>}
 }
 
+#[cfg(feature = "stm32f030x6")]
+pins! {
+    PA2 => {AF1: TxPin<USART1>},
+    PA3 => {AF1: RxPin<USART1>},
+    PA14 => {AF1: TxPin<USART1>},
+    PA15 => {AF1: RxPin<USART1>},
+    PB13 => {AF0: SckPin<SPI1>},
+    PB14 => {AF0: MisoPin<SPI1>},
+    PB15 => {AF0: MosiPin<SPI1>}
+}
+
+#[cfg(any(
+    feature = "stm32f030x8",
+    feature = "stm32f030xc",
+    feature = "stm32f042",
+    feature = "stm32f070",
+))]
+pins! {
+    PA2 => {AF1: TxPin<USART2>},
+    PA3 => {AF1: RxPin<USART2>},
+    PA14 => {AF1: TxPin<USART2>},
+    PA15 => {AF1: RxPin<USART2>}
+}
 #[cfg(any(
     feature = "stm32f030x8",
     feature = "stm32f030xc",
@@ -132,7 +131,7 @@ pins! {
     feature = "stm32f030x6",
     feature = "stm32f030xc",
     feature = "stm32f042",
-    feature = "stm32f070x6",
+    feature = "stm32f070x6"
 ))]
 pins! {
     PA9 => {AF4: SclPin<I2C1>},
@@ -140,10 +139,8 @@ pins! {
 }
 
 #[cfg(any(
-    feature = "stm32f042",
     feature = "stm32f030x6",
-    feature = "stm32f030x8",
-    feature = "stm32f030xc",
+    feature = "stm32f042",
     feature = "stm32f070xb"
 ))]
 pins! {
@@ -151,20 +148,24 @@ pins! {
     PB11 => {AF1: SdaPin<I2C1>}
 }
 
+#[cfg(any(feature = "stm32f030x8", feature = "stm32f030xc"))]
+pins! {
+    PB10 => {AF1: SclPin<I2C2>},
+    PB11 => {AF1: SdaPin<I2C1>}
+}
 #[cfg(any(
     feature = "stm32f042",
     feature = "stm32f030xc",
     feature = "stm32f070x6",
 ))]
 pins! {
-    PF1 => {AF1: SclPin<I2C1>},
     PF0 => {AF1: SdaPin<I2C1>}
+    PF1 => {AF1: SclPin<I2C1>},
 }
 
 #[cfg(any(
     feature = "stm32f042",
     feature = "stm32f030xc",
-    feature = "stm32f030xc",
     feature = "stm32f070xb"
 ))]
 pins! {