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Support additional API on Python 3 bindings #2016
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def reg_write(self, reg_id: int, value) -> None: | ||
# select register class for special cases | ||
reg_cls = UcAArch32.__select_reg_class(reg_id) | ||
assert check_maxbits(coproc, 4) |
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Why not make cpr_read/write
raise an UC_ERR_ARG
? Terminating the whole process without a chance to catch seems too aggressive.
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Generally speaking, exceptions are thrown when the arguments normally make sense but there is a specific problem this time (e.g. opening a file which happens to be inaccessible, etc.). In these cases the user may catch the exception and choose how to handle it.
Here the assertions come to block an invalid usage with incorrect arguments: it is not a call that may sometimes work and sometimes not -- rather it is invalid. There is no way to "handle" such case other than re-writing that piece of code.
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Okay, I also forget AssertionError
can be caught so let it go.
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def msr_read(self, msr_id: int) -> int: | ||
return self._reg_read(const.UC_X86_REG_MSR, UcRegMSR, msr_id) | ||
return self.reg_read(const.UC_X86_REG_MSR, msr_id) | ||
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def msr_write(self, msr_id: int, value: int) -> None: |
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This seems the same as above, which should raise an exception, but maybe next time.
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I am not following on this one. What should raise an exception? It marks this line:
return self.reg_read(const.UC_X86_REG_MSR, msr_id)
* Styling and commets fixes * Add errno API support * Improve OOP approach by adjusting the way reg types are selected * Leverage new approach to deduplicate reg_read and reg_write code * Adjust reg_read_batch * Add support for reg_write_batch * Adjust x86 MSR accessors * Turn asserts into descriptive exceptions * Improve comments and styling * Fix ARM memcpy neon regression test * Modify canonicals import * Introduce ARM CP reg accessors
Highlights:
reg_write_batch
andreg_read_batch
APIcpr_read
andcpr_write