Convert Conditional/TailLoop-shaped CFGs into dataflow #818
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See #561 (comment) . |
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This was referenced Jun 12, 2024
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Followup to #390. Fixes #389. Closes #385. ~~Blocked by CQCL/hugr#1175 Fixes support for non-`Dfg` circuits and circuits with a non-root parent: Adds a `Circuit::extract_dfg(&self)` function that extracts the circuit into a new hugr with a DFG operation at the root. In some cases, like in a CFG DataflowBlock node, this requires some changes to the definition to eliminate the output sum type. Here I only implemented it for the kind of blocks produced by guppy. We could replace the manual implementation once CQCL/hugr#818 gets implemented. With this we can now fix #389 by extracting the circuit before using it as a replacement in `SimpleReplacement::create_simple_replacement`. Replaces `DfgBuilder` with `FunctionBuilder` where possible, so we can use named circuits in the tests. (This failed before due to the bug in CircuitRewrite).
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CFGs that are already of appropriately simple shape can be transformed easily with the contents of each basic block placed into the corresponding Case (or the body of the TailLoop), etc.
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