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[Backport to 14] Support SPV_INTEL_maximum_registers extension (#2398)
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* Add infrastructure for translating ExecutionModeId (#2297)
* [Backport to 14] Support SPV_INTEL_maximum_registers extension (#2344)

Co-authored-by: Viktoria Maximova <[email protected]>
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@KorovinVlad @vmaksimo
KorovinVlad and vmaksimo authored Mar 18, 2024
1 parent c6506ba commit f6fb55c
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Showing 14 changed files with 294 additions and 44 deletions.
1 change: 1 addition & 0 deletions include/LLVMSPIRVExtensions.inc
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Expand Up @@ -64,3 +64,4 @@ EXT(SPV_INTEL_tensor_float32_conversion) // TODO: to remove old extension
EXT(SPV_INTEL_tensor_float32_rounding)
EXT(SPV_EXT_relaxed_printf_string_address_space)
EXT(SPV_INTEL_cache_controls)
EXT(SPV_INTEL_maximum_registers)
44 changes: 44 additions & 0 deletions lib/SPIRV/SPIRVReader.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4184,6 +4184,50 @@ bool SPIRVToLLVM::transMetadata() {
F->setMetadata(kSPIR2MD::IntelFPGAIPInterface,
MDNode::get(*Context, InterfaceMDVec));
}
if (auto *EM = BF->getExecutionMode(
internal::ExecutionModeMaximumRegistersINTEL)) {
NamedMDNode *ExecModeMD =
M->getOrInsertNamedMetadata(kSPIRVMD::ExecutionMode);

SmallVector<Metadata *, 4> ValueVec;
ValueVec.push_back(ConstantAsMetadata::get(F));
ValueVec.push_back(
ConstantAsMetadata::get(getUInt32(M, EM->getExecutionMode())));
ValueVec.push_back(
ConstantAsMetadata::get(getUInt32(M, EM->getLiterals()[0])));
ExecModeMD->addOperand(MDNode::get(*Context, ValueVec));
}
if (auto *EM = BF->getExecutionMode(
internal::ExecutionModeMaximumRegistersIdINTEL)) {
NamedMDNode *ExecModeMD =
M->getOrInsertNamedMetadata(kSPIRVMD::ExecutionMode);

SmallVector<Metadata *, 4> ValueVec;
ValueVec.push_back(ConstantAsMetadata::get(F));
ValueVec.push_back(
ConstantAsMetadata::get(getUInt32(M, EM->getExecutionMode())));

auto *ExecOp = BF->getModule()->getValue(EM->getLiterals()[0]);
ValueVec.push_back(
MDNode::get(*Context, ConstantAsMetadata::get(cast<ConstantInt>(
transValue(ExecOp, nullptr, nullptr)))));
ExecModeMD->addOperand(MDNode::get(*Context, ValueVec));
}
if (auto *EM = BF->getExecutionMode(
internal::ExecutionModeNamedMaximumRegistersINTEL)) {
NamedMDNode *ExecModeMD =
M->getOrInsertNamedMetadata(kSPIRVMD::ExecutionMode);

SmallVector<Metadata *, 4> ValueVec;
ValueVec.push_back(ConstantAsMetadata::get(F));
ValueVec.push_back(
ConstantAsMetadata::get(getUInt32(M, EM->getExecutionMode())));

assert(EM->getLiterals()[0] == 0 &&
"Invalid named maximum number of registers");
ValueVec.push_back(MDString::get(*Context, "AutoINTEL"));
ExecModeMD->addOperand(MDNode::get(*Context, ValueVec));
}
}
NamedMDNode *MemoryModelMD =
M->getOrInsertNamedMetadata(kSPIRVMD::MemoryModel);
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68 changes: 53 additions & 15 deletions lib/SPIRV/SPIRVWriter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -897,6 +897,9 @@ SPIRVFunction *LLVMToSPIRVBase::transFunctionDecl(Function *F) {

transFPGAFunctionMetadata(BF, F);

if (BM->isAllowedToUseExtension(ExtensionID::SPV_INTEL_maximum_registers))
transFunctionMetadataAsExecutionMode(BF, F);

transAuxDataInst(BF, F);

SPIRVDBG(dbgs() << "[transFunction] " << *F << " => ";
Expand Down Expand Up @@ -1029,6 +1032,38 @@ void LLVMToSPIRVBase::transFPGAFunctionMetadata(SPIRVFunction *BF,
transMetadataDecorations(FDecoMD, BF);
}

void LLVMToSPIRVBase::transFunctionMetadataAsExecutionMode(SPIRVFunction *BF,
Function *F) {
SmallVector<MDNode *, 1> RegisterAllocModeMDs;
F->getMetadata("RegisterAllocMode", RegisterAllocModeMDs);

for (unsigned I = 0; I < RegisterAllocModeMDs.size(); I++) {
auto *RegisterAllocMode = RegisterAllocModeMDs[I]->getOperand(0).get();
if (isa<MDString>(RegisterAllocMode)) {
const StringRef Str = getMDOperandAsString(RegisterAllocModeMDs[I], 0);
const internal::InternalNamedMaximumNumberOfRegisters NamedValue =
SPIRVNamedMaximumNumberOfRegistersNameMap::rmap(Str.str());
BF->addExecutionMode(BM->add(new SPIRVExecutionMode(
OpExecutionMode, BF,
internal::ExecutionModeNamedMaximumRegistersINTEL, NamedValue)));
} else if (isa<MDNode>(RegisterAllocMode)) {
auto *RegisterAllocNodeMDOp =
getMDOperandAsMDNode(RegisterAllocModeMDs[I], 0);
const int Num = getMDOperandAsInt(RegisterAllocNodeMDOp, 0);
auto *Const =
BM->addConstant(transType(Type::getInt32Ty(F->getContext())), Num);
BF->addExecutionMode(BM->add(new SPIRVExecutionModeId(
BF, internal::ExecutionModeMaximumRegistersIdINTEL, Const->getId())));
} else {
const int64_t RegisterAllocVal =
mdconst::dyn_extract<ConstantInt>(RegisterAllocMode)->getZExtValue();
BF->addExecutionMode(BM->add(new SPIRVExecutionMode(
OpExecutionMode, BF, internal::ExecutionModeMaximumRegistersINTEL,
RegisterAllocVal)));
}
}
}

void LLVMToSPIRVBase::transAuxDataInst(SPIRVFunction *BF, Function *F) {
auto *BM = BF->getModule();
if (!BM->preserveAuxData())
Expand Down Expand Up @@ -4766,19 +4801,20 @@ bool LLVMToSPIRVBase::transExecutionMode() {
auto AddSingleArgExecutionMode = [&](ExecutionMode EMode) {
uint32_t Arg = 0;
N.get(Arg);
BF->addExecutionMode(BM->add(new SPIRVExecutionMode(BF, EMode, Arg)));
BF->addExecutionMode(
BM->add(new SPIRVExecutionMode(OpExecutionMode, BF, EMode, Arg)));
};

switch (EMode) {
case spv::ExecutionModeContractionOff:
BF->addExecutionMode(BM->add(
new SPIRVExecutionMode(BF, static_cast<ExecutionMode>(EMode))));
BF->addExecutionMode(BM->add(new SPIRVExecutionMode(
OpExecutionMode, BF, static_cast<ExecutionMode>(EMode))));
break;
case spv::ExecutionModeInitializer:
case spv::ExecutionModeFinalizer:
if (BM->isAllowedToUseVersion(VersionNumber::SPIRV_1_1)) {
BF->addExecutionMode(BM->add(
new SPIRVExecutionMode(BF, static_cast<ExecutionMode>(EMode))));
BF->addExecutionMode(BM->add(new SPIRVExecutionMode(
OpExecutionMode, BF, static_cast<ExecutionMode>(EMode))));
} else {
getErrorLog().checkError(false, SPIRVEC_Requires1_1,
"Initializer/Finalizer Execution Mode");
Expand All @@ -4790,15 +4826,16 @@ bool LLVMToSPIRVBase::transExecutionMode() {
unsigned X, Y, Z;
N.get(X).get(Y).get(Z);
BF->addExecutionMode(BM->add(new SPIRVExecutionMode(
BF, static_cast<ExecutionMode>(EMode), X, Y, Z)));
OpExecutionMode, BF, static_cast<ExecutionMode>(EMode), X, Y, Z)));
} break;
case spv::ExecutionModeMaxWorkgroupSizeINTEL: {
if (BM->isAllowedToUseExtension(
ExtensionID::SPV_INTEL_kernel_attributes)) {
unsigned X, Y, Z;
N.get(X).get(Y).get(Z);
BF->addExecutionMode(BM->add(new SPIRVExecutionMode(
BF, static_cast<ExecutionMode>(EMode), X, Y, Z)));
OpExecutionMode, BF, static_cast<ExecutionMode>(EMode), X, Y,
Z)));
BM->addExtension(ExtensionID::SPV_INTEL_kernel_attributes);
BM->addCapability(CapabilityKernelAttributesINTEL);
}
Expand All @@ -4807,8 +4844,8 @@ bool LLVMToSPIRVBase::transExecutionMode() {
if (!BM->isAllowedToUseExtension(
ExtensionID::SPV_INTEL_kernel_attributes))
break;
BF->addExecutionMode(BM->add(
new SPIRVExecutionMode(BF, static_cast<ExecutionMode>(EMode))));
BF->addExecutionMode(BM->add(new SPIRVExecutionMode(
OpExecutionMode, BF, static_cast<ExecutionMode>(EMode))));
BM->addExtension(ExtensionID::SPV_INTEL_kernel_attributes);
BM->addCapability(CapabilityKernelAttributesINTEL);
} break;
Expand Down Expand Up @@ -4851,8 +4888,9 @@ bool LLVMToSPIRVBase::transExecutionMode() {
break;
unsigned NBarrierCnt = 0;
N.get(NBarrierCnt);
BF->addExecutionMode(new SPIRVExecutionMode(
BF, static_cast<ExecutionMode>(EMode), NBarrierCnt));
BF->addExecutionMode(BM->add(new SPIRVExecutionMode(
OpExecutionMode, BF, static_cast<ExecutionMode>(EMode),
NBarrierCnt)));
BM->addExtension(ExtensionID::SPV_INTEL_vector_compute);
BM->addCapability(CapabilityVectorComputeINTEL);
} break;
Expand Down Expand Up @@ -4883,8 +4921,8 @@ bool LLVMToSPIRVBase::transExecutionMode() {
} break;
case spv::internal::ExecutionModeFastCompositeKernelINTEL: {
if (BM->isAllowedToUseExtension(ExtensionID::SPV_INTEL_fast_composite))
BF->addExecutionMode(BM->add(
new SPIRVExecutionMode(BF, static_cast<ExecutionMode>(EMode))));
BF->addExecutionMode(BM->add(new SPIRVExecutionMode(
OpExecutionMode, BF, static_cast<ExecutionMode>(EMode))));
} break;
default:
llvm_unreachable("invalid execution mode");
Expand Down Expand Up @@ -4929,8 +4967,8 @@ void LLVMToSPIRVBase::transFPContract() {
}

if (DisableContraction) {
BF->addExecutionMode(BF->getModule()->add(
new SPIRVExecutionMode(BF, spv::ExecutionModeContractionOff)));
BF->addExecutionMode(BF->getModule()->add(new SPIRVExecutionMode(
OpExecutionMode, BF, spv::ExecutionModeContractionOff)));
}
}
}
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2 changes: 1 addition & 1 deletion lib/SPIRV/SPIRVWriter.h
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Original file line number Diff line number Diff line change
Expand Up @@ -122,7 +122,7 @@ class LLVMToSPIRVBase {
void transVectorComputeMetadata(Function *F);
void transFPGAFunctionMetadata(SPIRVFunction *BF, Function *F);
void transAuxDataInst(SPIRVFunction *BF, Function *F);

void transFunctionMetadataAsExecutionMode(SPIRVFunction *BF, Function *F);
bool transGlobalVariables();

Op transBoolOpCode(SPIRVValue *Opn, Op OC);
Expand Down
8 changes: 6 additions & 2 deletions lib/SPIRV/libSPIRV/SPIRVEntry.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -580,7 +580,7 @@ SPIRVEntryPoint::SPIRVEntryPoint(SPIRVModule *TheModule,
SPIRVExecutionModelKind TheExecModel,
SPIRVId TheId, const std::string &TheName,
std::vector<SPIRVId> Variables)
: SPIRVAnnotation(TheModule->get<SPIRVFunction>(TheId),
: SPIRVAnnotation(OpEntryPoint, TheModule->get<SPIRVFunction>(TheId),
getSizeInWords(TheName) + Variables.size() + 3),
ExecModel(TheExecModel), Name(TheName), Variables(Variables) {}

Expand Down Expand Up @@ -628,6 +628,9 @@ void SPIRVExecutionMode::decode(std::istream &I) {
case ExecutionModeSchedulerTargetFmaxMhzINTEL:
case ExecutionModeRegisterMapInterfaceINTEL:
case internal::ExecutionModeStreamingInterfaceINTEL:
case internal::ExecutionModeMaximumRegistersINTEL:
case internal::ExecutionModeMaximumRegistersIdINTEL:
case internal::ExecutionModeNamedMaximumRegistersINTEL:
WordLiterals.resize(1);
break;
default:
Expand All @@ -649,7 +652,8 @@ SPIRVForward *SPIRVAnnotationGeneric::getOrCreateTarget() const {
}

SPIRVName::SPIRVName(const SPIRVEntry *TheTarget, const std::string &TheStr)
: SPIRVAnnotation(TheTarget, getSizeInWords(TheStr) + 2), Str(TheStr) {}
: SPIRVAnnotation(OpName, TheTarget, getSizeInWords(TheStr) + 2),
Str(TheStr) {}

void SPIRVName::encode(spv_ostream &O) const { getEncoder(O) << Target << Str; }

Expand Down
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