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Shorten collections.abc.Generator type hints
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MSK61 committed Nov 10, 2024
1 parent b3298b0 commit 9961f92
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Showing 4 changed files with 15 additions and 22 deletions.
10 changes: 5 additions & 5 deletions src/processor_utils/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -31,8 +31,8 @@
#
# author: Mohammed El-Afifi (ME)
#
# environment: Visual Studio Code 1.95.1, python 3.12.7, Fedora release
# 40 (Forty)
# environment: Visual Studio Code 1.95.2, python 3.13.0, Fedora release
# 41 (Forty One)
#
# notes: This is a private program.
#
Expand Down Expand Up @@ -451,7 +451,7 @@ def _get_preds(
return basics.map_ex(processor.predecessors(unit), unit_map, gen=True)


def _get_proc_units(graph: DiGraph) -> Generator[FuncUnit, None, None]:
def _get_proc_units(graph: DiGraph) -> Generator[FuncUnit]:
"""Create units for the given processor graph.
`graph` is the processor.
Expand All @@ -472,7 +472,7 @@ def _get_proc_units(graph: DiGraph) -> Generator[FuncUnit, None, None]:

def _get_std_edge(
edge: Sequence[str], unit_registry: SelfIndexSet[ICaseString]
) -> Generator[str, None, None]:
) -> Generator[str]:
"""Return a validated edge.
`edge` is the edge to validate.
Expand Down Expand Up @@ -582,7 +582,7 @@ def _load_caps(
def _load_mem_acl(
unit: Mapping[object, Iterable[str]],
cap_registry: IndexedSet[_CapabilityInfo],
) -> Generator[str, None, None]:
) -> Generator[str]:
"""Load the given unit memory ACL.
`unit` is the unit to load whose memory ACL.
Expand Down
11 changes: 2 additions & 9 deletions src/processor_utils/_checks.py
Original file line number Diff line number Diff line change
Expand Up @@ -522,14 +522,7 @@ def _do_cap_checks(
processor: DiGraph,
cap_checks: Iterable[
Callable[
[
DiGraph,
Generator[object, None, None],
str,
list[Any],
tuple[Any, ...],
],
None,
[DiGraph, Generator[object], str, list[Any], tuple[Any, ...]], None
]
],
) -> None:
Expand All @@ -556,7 +549,7 @@ def _do_cap_checks(

def _filter_by_cap(
post_ord: Iterable[_T], capability: object, processor: Graph
) -> Generator[_T, None, None]:
) -> Generator[_T]:
"""Filter the given units by the specified capability.
`post_ord` is the post-order of the processor functional units.
Expand Down
10 changes: 5 additions & 5 deletions src/processor_utils/_port_defs.py
Original file line number Diff line number Diff line change
Expand Up @@ -31,8 +31,8 @@
#
# author: Mohammed El-Afifi (ME)
#
# environment: Visual Studio Code 1.95.1, python 3.12.7, Fedora release
# 40 (Forty)
# environment: Visual Studio Code 1.95.2, python 3.13.0, Fedora release
# 41 (Forty One)
#
# notes: This is a private program.
#
Expand All @@ -52,7 +52,7 @@
_T = typing.TypeVar("_T")


def get_in_ports(processor: DiGraph) -> Generator[Any, None, None]:
def get_in_ports(processor: DiGraph) -> Generator[Any]:
"""Find the input ports.
`processor` is the processor to find whose input ports.
Expand All @@ -62,7 +62,7 @@ def get_in_ports(processor: DiGraph) -> Generator[Any, None, None]:
return _get_ports(processor.in_degree)


def get_out_ports(processor: DiGraph) -> Generator[Any, None, None]:
def get_out_ports(processor: DiGraph) -> Generator[Any]:
"""Find the output ports.
`processor` is the processor to find whose output ports.
Expand Down Expand Up @@ -98,7 +98,7 @@ def __init__(self, proc_supplier: object) -> None:
out_ports: Iterable[object]


def _get_ports(degrees: Iterable[Iterable[_T]]) -> Generator[_T, None, None]:
def _get_ports(degrees: Iterable[Iterable[_T]]) -> Generator[_T]:
"""Find the ports with respect to the given degrees.
`degrees` are the degrees of all units.
Expand Down
6 changes: 3 additions & 3 deletions src/sim_services/_instr_sinks.py
Original file line number Diff line number Diff line change
Expand Up @@ -31,8 +31,8 @@
#
# author: Mohammed El-Afifi (ME)
#
# environment: Visual Studio Code 1.95.1, python 3.12.7, Fedora release
# 40 (Forty)
# environment: Visual Studio Code 1.95.2, python 3.13.0, Fedora release
# 41 (Forty One)
#
# notes: This is a private program.
#
Expand Down Expand Up @@ -114,7 +114,7 @@ def _get_candidates(
@staticmethod
def _get_new_guests(
src_unit: str, instructions: Iterable[int]
) -> collections.abc.Generator[HostedInstr, None, None]:
) -> collections.abc.Generator[HostedInstr]:
"""Prepare new hosted instructions.
`src_unit` is the old host of instructions.
Expand Down

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