🩹Free debug pins in HC32 HAL (#26985)

implements DISABLE_DEBUG and DISABLE_JTAG in HAL
MarlinFirmware · Apr 28, 2024 · a805872 · a805872
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Showing 3 changed files with 29 additions and 4 deletions.
diff --git a/Marlin/src/HAL/HC32/HAL.h b/Marlin/src/HAL/HC32/HAL.h
@@ -148,6 +148,25 @@
 #define GET_PIN_MAP_INDEX(pin) pin
 #define PARSED_PIN_INDEX(code, dval) parser.intval(code, dval)
 
+//
+// Debug port disable
+// JTMS / SWDIO = PA13
+// JTCK / SWCLK = PA14
+// JTDI         = PA15
+// JTDO         = PB3
+// NJTRST       = PB4
+//
+#define DBG_SWCLK _BV(0)
+#define DBG_SWDIO _BV(1)
+#define DBG_TDO   _BV(2)
+#define DBG_TDI   _BV(3)
+#define DBG_TRST  _BV(4)
+#define DBG_ALL (DBG_SWCLK | DBG_SWDIO | DBG_TDO | DBG_TDI | DBG_TRST)
+
+#define JTAGSWD_RESET() PORT_DebugPortSetting(DBG_ALL, Enable);
+#define JTAG_DISABLE() PORT_DebugPortSetting(DBG_TDO | DBG_TDI | DBG_TRST, Disable);
+#define JTAGSWD_DISABLE() PORT_DebugPortSetting(DBG_ALL, Disable);
+
 //
 // MarlinHAL implementation
 //

diff --git a/Marlin/src/pins/hc32f4/pins_AQUILA_101.h b/Marlin/src/pins/hc32f4/pins_AQUILA_101.h
@@ -45,10 +45,13 @@
 #endif
 
 //
-// Release PB4 (Y_ENABLE_PIN) from JTAG NRST role
+// Release JTAG pins but keep SWD enabled
+// - PA15 (JTDI / USART2 RX)
+// - PB3 (JTDO / E0_DIR)
+// - PB4 (NJTRST / E0_STEP)
 //
 //#define DISABLE_DEBUG
-//#define DISABLE_JTAG
+#define DISABLE_JTAG
 
 //
 // EEPROM

diff --git a/Marlin/src/pins/hc32f4/pins_CREALITY_ENDER2P_V24S4.h b/Marlin/src/pins/hc32f4/pins_CREALITY_ENDER2P_V24S4.h
@@ -46,10 +46,13 @@
 #endif
 
 //
-// Release PB4 (Y_ENABLE_PIN) from JTAG NRST role
+// Release JTAG pins but keep SWD enabled
+// - PA15 (JTDI / E0_DIR_PIN)
+// - PB3 (JTDO / E0_STEP_PIN)
+// - PB4 (NJTRST / E0_ENABLE_PIN)
 //
 //#define DISABLE_DEBUG
-//#define DISABLE_JTAG
+#define DISABLE_JTAG
 
 //
 // EEPROM