(STM32) drivers: stm32_risab: add RISAB reconfiguration #7252
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Checkpatch fails are targeting traces, so false positives. |
GseoC
changed the title
etienne-lms
reviewed
Feb 5, 2025
core/drivers/firewall/stm32_risab.c
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| if (!IS_ALIGNED(paddr, _RISAB_PAGE_SIZE) || | ||
| !IS_ALIGNED(size, _RISAB_PAGE_SIZE)) { | ||
| EMSG("Physical ddress %"PRIxPA" or size:%#zx misaligned with RISAB page boundaries", |
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s/ddress/address/
Maybe shorten the message to "Unaligned region: pa %#"PRIxPA" size %zu".
Note that EMSG() already prints the function label, here explicitly referring to RISAB.
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Comments addressed |
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Last comment addressed |
etienne-lms
reviewed
Feb 6, 2025
Rework regs_access_granted() to always authorize access to RISAB1/2 that can only be accessed by the Cortex-A35. Also fix the sequence by isolating the case where the CID filtering is not enabled. Fixes: c413678 ("drivers: stm32_risab: add RISAB internal memory firewall driver") Signed-off-by: Gatien Chevallier <[email protected]> Acked-by: Etienne Carriere <[email protected]>
Add the .set_memory_conf ops to be able to reconfigure memory regions protected by RISABs dynamically. Factorize the RIF configuration application. Signed-off-by: Gatien Chevallier <[email protected]> Acked-by: Etienne Carriere <[email protected]>
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Tags applied, thanks. Checkpatch error is related to a trace. |
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Similarly to RISAF, update the driver to allow dynamic firewall reconfiguration.