[RFC] Initial Platform support for Altera Cyclonev SoC

[rajeshrah22]

Modified code from Zynq7k platform port.

ARM Cortex A9 armv7.

OP-TEE successfully initializes and jumps to NS world.

Summary of changes:

• Changed UART driver to a compatible one.
• Removed writes to SLCR_TZ registers, which don't exist on cyclonev.
• Initally unlocked all security rules in the L3 interconnect TrustZone Firewall.
• Override init_sec_mon to provide dt blob address and linux jump address in respective registers. (Hardcoded for now).

Problems:

• does not work with CFG_WITH_PAGER yet.
• Have not tried to enable dual core (boot secondary).

Boot flow:
SPL --> U-boot --> optee -> Linux

Integrating with Linux:

• Kernel panics with what we think is an un-handled page fault when initializing optee driver.
  This occurs when allocating a memory pool (Probably for the shared memory region). We will need to go over the
  device tree modifications that added optee firmware node and reserved memory nodes.
• Linux sometimes does not boot (no console logs) after jump from NS world for a reason we are still investigating.

Any guiding questions regarding the issues above would be appreciated. Would love feedback on the plat-cyclonev code as well.

thanks,
Rahul

[rajeshrah22]

The changes for the platform_config.h file are at the bottom when CFG_WITH_PAGER is disabled. I have changed the TZDRAM_BASE only compared to the zynq7k code.

[jenswi-linaro]

Paging in emulated SRAM is only needed to test the pager on hardware to ensure it works with platforms that use real SRAM. So, unless you plan to use real SRAM with the pager, you can remove that part to save some work.

You could try $(call force,CFG_CORE_RESERVED_SHM,n) to disable the reserved shared memory pool and rely on dynamic shared memory only.