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name: Build pack | ||
on: | ||
workflow_dispatch: | ||
pull_request: | ||
push: | ||
branches: [main] | ||
release: | ||
types: [published] | ||
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concurrency: | ||
group: ${{ github.workflow }}-${{ github.ref }} | ||
cancel-in-progress: true | ||
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jobs: | ||
pack: | ||
name: Generate pack | ||
runs-on: ubuntu-22.04 | ||
steps: | ||
- uses: actions/checkout@v4 | ||
with: | ||
fetch-depth: 0 | ||
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- name: Fetch tags | ||
if: github.event_name == 'release' | ||
run: | | ||
git fetch --tags --force | ||
- uses: Open-CMSIS-Pack/gen-pack-action@main | ||
with: | ||
doxygen-version: none | ||
packchk-version: 1.4.1 | ||
gen-pack-script: ./gen_pack.sh | ||
gen-pack-output: ./output |
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# Pack build files | ||
/build/ | ||
/output/ |
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// File: STM32C0x1.dbgconf | ||
// Version: 1.0.0 | ||
// Note: refer to STM32C0x1 reference manual (RM0xxxx) | ||
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// <<< Use Configuration Wizard in Context Menu >>> | ||
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// <h> Debug MCU configuration register (DBGMCU_CR) | ||
// <i> Reserved bits must be kept at reset value | ||
// <o.2> DBG_STANDBY <i> Debug Standby Mode | ||
// <o.1> DBG_STOP <i> Debug Stop Mode | ||
// </h> | ||
DbgMCU_CR = 0x00000006; | ||
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// <h> Debug MCU APB freeze register 1 (DBGMCU_APB_FZ1) | ||
// <i> Reserved bits must be kept at reset value | ||
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout is frozen | ||
// <o.12> DBG_IWDG_STOP <i> Debug independent watchdog stopped when core is halted | ||
// <o.11> DBG_WWDG_STOP <i> Debug window watchdog stopped when core is halted | ||
// <o.10> DBG_RTC_STOP <i> Debug RTC stopped when core is halted | ||
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted | ||
// </h> | ||
DbgMCU_APB_Fz1 = 0x00000000; | ||
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// <h> Debug MCU APB freeze register 2 (DBGMCU_APB_FZ2) | ||
// <i> Reserved bits must be kept at reset value | ||
// <o.18> DBG_TIM17_STOP <i> TIM17 counter stopped when core is halted | ||
// <o.17> DBG_TIM16_STOP <i> TIM16 counter stopped when core is halted | ||
// <o.15> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted | ||
// <o.11> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted | ||
// </h> | ||
DbgMCU_APB_Fz2 = 0x00000000; | ||
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// <<< end of configuration section >>> |
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// File: STM32C0x1_DBGMCU.ini | ||
// Version: 1.0.0 | ||
// Note: refer to STM32C0x1 reference manual (RMxxxx) | ||
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/* variable to hold register values */ | ||
define unsigned long DbgMCU_CR; | ||
define unsigned long DbgMCU_APB_Fz1; | ||
define unsigned long DbgMCU_APB_Fz2; | ||
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// <<< Use Configuration Wizard in Context Menu >>> | ||
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// <h> Debug MCU configuration register (DBGMCU_CR) | ||
// <i> Reserved bits must be kept at reset value | ||
// <o.2> DBG_STANDBY <i> Debug Standby Mode | ||
// <o.1> DBG_STOP <i> Debug Stop Mode | ||
// </h> | ||
DbgMCU_CR = 0x00000006; | ||
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// <h> Debug MCU APB freeze register 1 (DBGMCU_APB_FZ1) | ||
// <i> Reserved bits must be kept at reset value | ||
// <o.21> DBG_I2C1_SMBUS_TIMEOUT <i> I2C1 SMBUS timeout is frozen | ||
// <o.12> DBG_IWDG_STOP <i> Debug independent watchdog stopped when core is halted | ||
// <o.11> DBG_WWDG_STOP <i> Debug window watchdog stopped when core is halted | ||
// <o.10> DBG_RTC_STOP <i> Debug RTC stopped when core is halted | ||
// <o.1> DBG_TIM3_STOP <i> TIM3 counter stopped when core is halted | ||
// </h> | ||
DbgMCU_APB_Fz1 = 0x00000000; | ||
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// <h> Debug MCU APB freeze register 2 (DBGMCU_APB_FZ2) | ||
// <i> Reserved bits must be kept at reset value | ||
// <o.18> DBG_TIM17_STOP <i> TIM17 counter stopped when core is halted | ||
// <o.17> DBG_TIM16_STOP <i> TIM16 counter stopped when core is halted | ||
// <o.15> DBG_TIM14_STOP <i> TIM14 counter stopped when core is halted | ||
// <o.11> DBG_TIM1_STOP <i> TIM1 counter stopped when core is halted | ||
// </h> | ||
DbgMCU_APB_Fz2 = 0x00000000; | ||
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// <<< end of configuration section >>> | ||
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/*---------------------------------------------------------------------------- | ||
Setup_DBGMCU() configure DBGMCU registers | ||
*----------------------------------------------------------------------------*/ | ||
FUNC void Setup_DBGMCU (void) { | ||
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_WDWORD(0x4002103C, _RDWORD(0x4002103C) | 0x08000000); // Set RCC_APBENR1.DBGEN | ||
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_WDWORD(0x40015804, DbgMCU_CR); // DBGMCU_CR: Configure MCU Debug | ||
_WDWORD(0x40015808, DbgMCU_APB_Fz1); // DBGMCU_APB_FZ1: Configure APB Freeze Behavior | ||
_WDWORD(0x4001580C, DbgMCU_APB_Fz2); // DBGMCU_APB_FZ2: Configure APB Freeze Behavior | ||
} | ||
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/*---------------------------------------------------------------------------- | ||
OnResetExec() Executed after reset via uVision's 'Reset'-button | ||
*----------------------------------------------------------------------------*/ | ||
FUNC void OnResetExec (void) { | ||
Setup_DBGMCU(); | ||
} | ||
Setup_DBGMCU(); // Debugger Setup |
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/* ----------------------------------------------------------------------------- | ||
* Copyright (c) 2014 ARM Ltd. | ||
* | ||
* This software is provided 'as-is', without any express or implied warranty. | ||
* In no event will the authors be held liable for any damages arising from | ||
* the use of this software. Permission is granted to anyone to use this | ||
* software for any purpose, including commercial applications, and to alter | ||
* it and redistribute it freely, subject to the following restrictions: | ||
* | ||
* 1. The origin of this software must not be misrepresented; you must not | ||
* claim that you wrote the original software. If you use this software in | ||
* a product, an acknowledgment in the product documentation would be | ||
* appreciated but is not required. | ||
* | ||
* 2. Altered source versions must be plainly marked as such, and must not be | ||
* misrepresented as being the original software. | ||
* | ||
* 3. This notice may not be removed or altered from any source distribution. | ||
* | ||
* | ||
* $Date: 14. Jan 2014 | ||
* $Revision: V1.00 | ||
* | ||
* Project: FlashOS Headerfile for Flash drivers | ||
* --------------------------------------------------------------------------- */ | ||
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/* History: | ||
* Version 1.00 | ||
* Initial release | ||
*/ | ||
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#define VERS 1 // Interface Version 1.01 | ||
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#define UNKNOWN 0 // Unknown | ||
#define ONCHIP 1 // On-chip Flash Memory | ||
#define EXT8BIT 2 // External Flash Device on 8-bit Bus | ||
#define EXT16BIT 3 // External Flash Device on 16-bit Bus | ||
#define EXT32BIT 4 // External Flash Device on 32-bit Bus | ||
#define EXTSPI 5 // External Flash Device on SPI | ||
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#define SECTOR_NUM 512 // Max Number of Sector Items | ||
#define PAGE_MAX 65536 // Max Page Size for Programming | ||
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struct FlashSectors { | ||
unsigned long szSector; // Sector Size in Bytes | ||
unsigned long AddrSector; // Address of Sector | ||
}; | ||
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#define SECTOR_END 0xFFFFFFFF, 0xFFFFFFFF | ||
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struct FlashDevice { | ||
unsigned short Vers; // Version Number and Architecture | ||
char DevName[128]; // Device Name and Description | ||
unsigned short DevType; // Device Type: ONCHIP, EXT8BIT, EXT16BIT, ... | ||
unsigned long DevAdr; // Default Device Start Address | ||
unsigned long szDev; // Total Size of Device | ||
unsigned long szPage; // Programming Page Size | ||
unsigned long Res; // Reserved for future Extension | ||
unsigned char valEmpty; // Content of Erased Memory | ||
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unsigned long toProg; // Time Out of Program Page Function | ||
unsigned long toErase; // Time Out of Erase Sector Function | ||
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struct FlashSectors sectors[SECTOR_NUM]; | ||
}; | ||
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#define FLASH_DRV_VERS (0x0100+VERS) // Driver Version, do not modify! | ||
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// Flash Programming Functions (Called by FlashOS) | ||
extern int Init (unsigned long adr, // Initialize Flash | ||
unsigned long clk, | ||
unsigned long fnc); | ||
extern int UnInit (unsigned long fnc); // De-initialize Flash | ||
extern int BlankCheck (unsigned long adr, // Blank Check | ||
unsigned long sz, | ||
unsigned char pat); | ||
extern int EraseChip (void); // Erase complete Device | ||
extern int EraseSector (unsigned long adr); // Erase Sector Function | ||
extern int ProgramPage (unsigned long adr, // Program Page Function | ||
unsigned long sz, | ||
unsigned char *buf); | ||
extern unsigned long Verify (unsigned long adr, // Verify Function | ||
unsigned long sz, | ||
unsigned char *buf); |
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/* ----------------------------------------------------------------------------- | ||
* Copyright (c) 2014 - 2021 ARM Ltd. | ||
* | ||
* This software is provided 'as-is', without any express or implied warranty. | ||
* In no event will the authors be held liable for any damages arising from | ||
* the use of this software. Permission is granted to anyone to use this | ||
* software for any purpose, including commercial applications, and to alter | ||
* it and redistribute it freely, subject to the following restrictions: | ||
* | ||
* 1. The origin of this software must not be misrepresented; you must not | ||
* claim that you wrote the original software. If you use this software in | ||
* a product, an acknowledgment in the product documentation would be | ||
* appreciated but is not required. | ||
* | ||
* 2. Altered source versions must be plainly marked as such, and must not be | ||
* misrepresented as being the original software. | ||
* | ||
* 3. This notice may not be removed or altered from any source distribution. | ||
* | ||
* | ||
* $Date: 10. September 2021 | ||
* $Revision: V1.0.0 | ||
* | ||
* Project: Flash Device Description for ST STM32C0x Flash | ||
* --------------------------------------------------------------------------- */ | ||
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/* History: | ||
* Version 1.0.0 | ||
* Initial release | ||
*/ | ||
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#include "..\FlashOS.h" // FlashOS Structures | ||
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#ifdef FLASH_MEM | ||
#ifdef STM32C0x_16 | ||
struct FlashDevice const FlashDevice = { | ||
FLASH_DRV_VERS, // Driver Version, do not modify! | ||
"STM32C0x_16", // Device Name (16kB) | ||
ONCHIP, // Device Type | ||
0x08000000, // Device Start Address | ||
0x00004000, // Device Size in Bytes (16kB) | ||
1024, // Programming Page Size | ||
0, // Reserved, must be 0 | ||
0xFF, // Initial Content of Erased Memory | ||
400, // Program Page Timeout 400 mSec | ||
400, // Erase Sector Timeout 400 mSec | ||
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// Specify Size and Address of Sectors | ||
0x800, 0x000000, // Sector Size 2kB (8 Sectors) | ||
SECTOR_END | ||
}; | ||
#endif | ||
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#ifdef STM32C0x_32 | ||
struct FlashDevice const FlashDevice = { | ||
FLASH_DRV_VERS, // Driver Version, do not modify! | ||
"STM32C0x_32", // Device Name (32kB) | ||
ONCHIP, // Device Type | ||
0x08000000, // Device Start Address | ||
0x00008000, // Device Size in Bytes (32kB) | ||
1024, // Programming Page Size | ||
0, // Reserved, must be 0 | ||
0xFF, // Initial Content of Erased Memory | ||
400, // Program Page Timeout 400 mSec | ||
400, // Erase Sector Timeout 400 mSec | ||
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// Specify Size and Address of Sectors | ||
0x800, 0x000000, // Sector Size 2kB (16 Sectors) | ||
SECTOR_END | ||
}; | ||
#endif | ||
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#ifdef STM32C0x_128 | ||
struct FlashDevice const FlashDevice = { | ||
FLASH_DRV_VERS, // Driver Version, do not modify! | ||
"STM32C0x_128", // Device Name (32kB) | ||
ONCHIP, // Device Type | ||
0x08000000, // Device Start Address | ||
0x00020000, // Device Size in Bytes (128kB) | ||
2048, // Programming Page Size | ||
0, // Reserved, must be 0 | ||
0xFF, // Initial Content of Erased Memory | ||
400, // Program Page Timeout 400 mSec | ||
400, // Erase Sector Timeout 400 mSec | ||
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// Specify Size and Address of Sectors | ||
0x800, 0x000000, // Sector Size 2kB (64 Sectors) | ||
SECTOR_END | ||
}; | ||
#endif | ||
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#ifdef STM32C0x_64 | ||
struct FlashDevice const FlashDevice = { | ||
FLASH_DRV_VERS, // Driver Version, do not modify! | ||
"STM32C0x_64", // Device Name (32kB) | ||
ONCHIP, // Device Type | ||
0x08000000, // Device Start Address | ||
0x00010000, // Device Size in Bytes (128kB) | ||
2048, // Programming Page Size | ||
0, // Reserved, must be 0 | ||
0xFF, // Initial Content of Erased Memory | ||
400, // Program Page Timeout 400 mSec | ||
400, // Erase Sector Timeout 400 mSec | ||
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// Specify Size and Address of Sectors | ||
0x800, 0x000000, // Sector Size 2kB (32 Sectors) | ||
SECTOR_END | ||
}; | ||
#endif | ||
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#endif // FLASH_MEM |
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