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T3.x,T4.x LC Serial half duplex support #489
T3.x,T4.x LC Serial half duplex support #489
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Migrating the half duplex support I did in the Stagnant and out of date PR to enhance Uarts: PaulStoffregen#419 To try to support Half duplex mode in a similar way like we do for RS485 like support. With T3.x made use of bitband address for the TX Direction setting, so Except for the begin which calls format, no code changed, we simply stored the bitband address of the TXDIR flag into the TXDIR variable that was already used for the set direction flag. For T4.x - it is a little more work as there is no bitband support on M7 processors. For GPIO there is a Set and Clear register which we use, but for the appropriate UART register there is no such setup of registers. So I have to special case we are in that mode and do it... Also since not atomic I cli/sei... Serial Half Duplex - Fix T4Serial1 and T-LC Serial1-3 Updates: T4 T4 Serial 1 did not have proper settings for IOMUXC_LPUART6_TX_SELECT_INPUT Tested T4.1 Serial1-8 Tested T3.5 Serial1-6 T3.6 - Added support for LPUART which is Serial6 which now works. T-LC Make half duplex work on T-LC on Serials1-3 Tested on on T3.5 1-6
I believe we should merge this, but first let's talk about the public API. I'd like to follow the convention of SERIAL_8N1_DETAILS for the format constants. Somehow we have SERIAL_2STOP_BITS in the code, which really should be constants like SERIAL_8N2. Any chance I can talk you into one more commit to make the public define SERIAL_8N1_HALF_DUPLEX? |
Of course - I just defined the bit, with the idea like all of the others, it can and should be combined like this... Will define them this morning |
Added in define in standard Arduino setup. I also added for 7E1 and 7O1 as well.
@PaulStoffregen - I added the define as you mentioned, plus added 7E1 and 7O1 as well, to show that this can be combined like others. Updated my test sketch to try out parity. I needed to mask off the high bit on receive as to check again '\n' ... I tested again on T4.1 and LC and T3.2 (just Serial1/Serial2) to make sure I did not screw up anything
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Looks like this fell off my radar. Should this go into 1.54-beta6? |
Would be nice at some point. There is also another PR I did to add addMemory for the T3.x, that may or may not want to look at.
From: Paul Stoffregen <[email protected]>
Sent: Friday, November 20, 2020 12:38 PM
To: PaulStoffregen/cores <[email protected]>
Cc: KurtE <[email protected]>; Author <[email protected]>
Subject: Re: [PaulStoffregen/cores] T3.x,T4.x LC Serial half duplex support (#489)
Looks like this fell off my radar. Should this go into 1.54-beta6?
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ok, merging now... |
Migrating the half duplex support I did in the Stagnant and out of date PR to enhance Uarts:
#419 Which I will close out.
To try to support Half duplex mode in a similar way like we do for RS485 like support.
With T3.x made use of bitband address for the TX Direction setting, so
Except for the begin which calls format, no code changed, we simply stored the bitband address of the TXDIR flag into the TXDIR variable that was already used for the set direction flag.
For T4.x - it is a little more work as there is no bitband support on M7 processors. For GPIO there is a Set and Clear register which we use, but for the appropriate UART register there is no such setup of registers. So I have to special case we are in that mode and do it... Also since not atomic I cli/sei...
Serial Half Duplex - Fix T4Serial1 and T-LC Serial1-3
Updates: T4
T4 Serial 1 did not have proper settings for IOMUXC_LPUART6_TX_SELECT_INPUT
Tested T4.1 Serial1-8
Tested T3.5 Serial1-6
T3.6 - Added support for LPUART which is Serial6 which now works.
T-LC
Make half duplex work on T-LC on Serials1-3
Tested on on T3.5 1-6
Test sketch: