[AArch64][SVE] Asm: Support for CNT(B|H|W|D) and CNTP instructions.

This patch adds support for the following instructions: CNTB CNTH - Determine the number of active elements implied by CNTW CNTD the named predicate constant, multiplied by an immediate, e.g. cnth x0, vl8, #16 CNTP - Count active predicate elements, e.g. cntp x0, p0, p1.b counts the number of active elements in p1, predicated by p0, and stores the result in x0. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336552 91177308-0d34-0410-b5e6-96231b3b80d8
ROCm · Jul 9, 2018 · da17564 · da17564
1 parent 955b8d4
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diff --git a/lib/Target/AArch64/AArch64SVEInstrInfo.td b/lib/Target/AArch64/AArch64SVEInstrInfo.td
@@ -555,19 +555,6 @@ let Predicates = [HasSVE] in {
   defm TRN1_PPP : sve_int_perm_bin_perm_pp<0b100, "trn1">;
   defm TRN2_PPP : sve_int_perm_bin_perm_pp<0b101, "trn2">;
 
-  def RDVLI_XI  : sve_int_read_vl_a<0b0, 0b11111, "rdvl">;
-  def ADDVL_XXI : sve_int_arith_vl<0b0, "addvl">;
-  def ADDPL_XXI : sve_int_arith_vl<0b1, "addpl">;
-
-  defm INCB_XPiI : sve_int_pred_pattern_a<0b000, "incb">;
-  defm DECB_XPiI : sve_int_pred_pattern_a<0b001, "decb">;
-  defm INCH_XPiI : sve_int_pred_pattern_a<0b010, "inch">;
-  defm DECH_XPiI : sve_int_pred_pattern_a<0b011, "dech">;
-  defm INCW_XPiI : sve_int_pred_pattern_a<0b100, "incw">;
-  defm DECW_XPiI : sve_int_pred_pattern_a<0b101, "decw">;
-  defm INCD_XPiI : sve_int_pred_pattern_a<0b110, "incd">;
-  defm DECD_XPiI : sve_int_pred_pattern_a<0b111, "decd">;
-
   defm CMPHS_PPzZZ : sve_int_cmp_0<0b000, "cmphs">;
   defm CMPHI_PPzZZ : sve_int_cmp_0<0b001, "cmphi">;
   defm CMPGE_PPzZZ : sve_int_cmp_0<0b100, "cmpge">;
@@ -612,6 +599,25 @@ let Predicates = [HasSVE] in {
   defm FCMEQ_PPzZ0 : sve_fp_2op_p_pd<0b100, "fcmeq">;
   defm FCMNE_PPzZ0 : sve_fp_2op_p_pd<0b110, "fcmne">;
 
+  def RDVLI_XI  : sve_int_read_vl_a<0b0, 0b11111, "rdvl">;
+  def ADDVL_XXI : sve_int_arith_vl<0b0, "addvl">;
+  def ADDPL_XXI : sve_int_arith_vl<0b1, "addpl">;
+
+  defm CNTB_XPiI : sve_int_count<0b000, "cntb">;
+  defm CNTH_XPiI : sve_int_count<0b010, "cnth">;
+  defm CNTW_XPiI : sve_int_count<0b100, "cntw">;
+  defm CNTD_XPiI : sve_int_count<0b110, "cntd">;
+  defm CNTP_XPP : sve_int_pcount_pred<0b0000, "cntp">;
+
+  defm INCB_XPiI : sve_int_pred_pattern_a<0b000, "incb">;
+  defm DECB_XPiI : sve_int_pred_pattern_a<0b001, "decb">;
+  defm INCH_XPiI : sve_int_pred_pattern_a<0b010, "inch">;
+  defm DECH_XPiI : sve_int_pred_pattern_a<0b011, "dech">;
+  defm INCW_XPiI : sve_int_pred_pattern_a<0b100, "incw">;
+  defm DECW_XPiI : sve_int_pred_pattern_a<0b101, "decw">;
+  defm INCD_XPiI : sve_int_pred_pattern_a<0b110, "incd">;
+  defm DECD_XPiI : sve_int_pred_pattern_a<0b111, "decd">;
+
   defm SQINCB_XPiWdI : sve_int_pred_pattern_b_s32<0b00000, "sqincb">;
   defm UQINCB_WPiI   : sve_int_pred_pattern_b_u32<0b00001, "uqincb">;
   defm SQDECB_XPiWdI : sve_int_pred_pattern_b_s32<0b00010, "sqdecb">;

diff --git a/lib/Target/AArch64/SVEInstrFormats.td b/lib/Target/AArch64/SVEInstrFormats.td
@@ -356,11 +356,64 @@ multiclass sve_int_count_v<bits<5> opc, string asm> {
   def _D : sve_int_count_v<0b11, opc, asm, ZPR64>;
 }
 
+class sve_int_pcount_pred<bits<2> sz8_64, bits<4> opc, string asm,
+                          PPRRegOp pprty>
+: I<(outs GPR64:$Rd), (ins PPRAny:$Pg, pprty:$Pn),
+  asm, "\t$Rd, $Pg, $Pn",
+  "",
+  []>, Sched<[]> {
+  bits<4> Pg;
+  bits<4> Pn;
+  bits<5> Rd;
+  let Inst{31-24} = 0b00100101;
+  let Inst{23-22} = sz8_64;
+  let Inst{21-19} = 0b100;
+  let Inst{18-16} = opc{3-1};
+  let Inst{15-14} = 0b10;
+  let Inst{13-10} = Pg;
+  let Inst{9}     = opc{0};
+  let Inst{8-5}   = Pn;
+  let Inst{4-0}   = Rd;
+}
+
+multiclass sve_int_pcount_pred<bits<4> opc, string asm> {
+  def _B : sve_int_pcount_pred<0b00, opc, asm, PPR8>;
+  def _H : sve_int_pcount_pred<0b01, opc, asm, PPR16>;
+  def _S : sve_int_pcount_pred<0b10, opc, asm, PPR32>;
+  def _D : sve_int_pcount_pred<0b11, opc, asm, PPR64>;
+}
 
 //===----------------------------------------------------------------------===//
 // SVE Element Count Group
 //===----------------------------------------------------------------------===//
 
+class sve_int_count<bits<3> opc, string asm>
+: I<(outs GPR64:$Rd), (ins sve_pred_enum:$pattern, sve_incdec_imm:$imm4),
+  asm, "\t$Rd, $pattern, mul $imm4",
+  "",
+  []>, Sched<[]> {
+  bits<5> Rd;
+  bits<4> imm4;
+  bits<5> pattern;
+  let Inst{31-24} = 0b00000100;
+  let Inst{23-22} = opc{2-1};
+  let Inst{21-20} = 0b10;
+  let Inst{19-16} = imm4;
+  let Inst{15-11} = 0b11100;
+  let Inst{10}    = opc{0};
+  let Inst{9-5}   = pattern;
+  let Inst{4-0}   = Rd;
+}
+
+multiclass sve_int_count<bits<3> opc, string asm> {
+  def NAME : sve_int_count<opc, asm>;
+
+  def : InstAlias<asm # "\t$Rd, $pattern",
+                  (!cast<Instruction>(NAME) GPR64:$Rd, sve_pred_enum:$pattern, 1), 1>;
+  def : InstAlias<asm # "\t$Rd",
+                  (!cast<Instruction>(NAME) GPR64:$Rd, 0b11111, 1), 2>;
+}
+
 class sve_int_countvlv<bits<5> opc, string asm, ZPRRegOp zprty>
 : I<(outs zprty:$Zdn), (ins zprty:$_Zdn, sve_pred_enum:$pattern, sve_incdec_imm:$imm4),
   asm, "\t$Zdn, $pattern, mul $imm4",

diff --git a/test/MC/AArch64/SVE/cntb-diagnostics.s b/test/MC/AArch64/SVE/cntb-diagnostics.s
@@ -0,0 +1,57 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+// ------------------------------------------------------------------------- //
+// Invalid result register
+
+cntb  w0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: cntb  w0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cntb  sp
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: cntb  sp
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cntb  z0.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: cntb  z0.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Immediate not compatible with encode/decode function.
+
+cntb  x0, all, mul #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
+// CHECK-NEXT: cntb  x0, all, mul #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cntb  x0, all, mul #0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
+// CHECK-NEXT: cntb  x0, all, mul #0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cntb  x0, all, mul #17
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
+// CHECK-NEXT: cntb  x0, all, mul #17
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate patterns
+
+cntb  x0, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
+// CHECK-NEXT: cntb  x0, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cntb  x0, #32
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
+// CHECK-NEXT: cntb  x0, #32
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cntb  x0, vl512
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: cntb  x0, vl512
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/test/MC/AArch64/SVE/cntb.s b/test/MC/AArch64/SVE/cntb.s
@@ -0,0 +1,44 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+cntb  x0
+// CHECK-INST: cntb	x0
+// CHECK-ENCODING: [0xe0,0xe3,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 e3 20 04 <unknown>
+
+cntb  x0, all
+// CHECK-INST: cntb	x0
+// CHECK-ENCODING: [0xe0,0xe3,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 e3 20 04 <unknown>
+
+cntb  x0, all, mul #1
+// CHECK-INST: cntb	x0
+// CHECK-ENCODING: [0xe0,0xe3,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 e3 20 04 <unknown>
+
+cntb  x0, all, mul #16
+// CHECK-INST: cntb	x0, all, mul #16
+// CHECK-ENCODING: [0xe0,0xe3,0x2f,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 e3 2f 04 <unknown>
+
+cntb  x0, pow2
+// CHECK-INST: cntb	x0, pow2
+// CHECK-ENCODING: [0x00,0xe0,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 e0 20 04 <unknown>
+
+cntb  x0, #28
+// CHECK-INST: cntb	x0, #28
+// CHECK-ENCODING: [0x80,0xe3,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 80 e3 20 04 <unknown>
diff --git a/test/MC/AArch64/SVE/cntd-diagnostics.s b/test/MC/AArch64/SVE/cntd-diagnostics.s
@@ -0,0 +1,57 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+// ------------------------------------------------------------------------- //
+// Invalid result register
+
+cntd  w0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: cntd  w0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cntd  sp
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: cntd  sp
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cntd  z0.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: cntd  z0.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Immediate not compatible with encode/decode function.
+
+cntd  x0, all, mul #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
+// CHECK-NEXT: cntd  x0, all, mul #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cntd  x0, all, mul #0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
+// CHECK-NEXT: cntd  x0, all, mul #0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cntd  x0, all, mul #17
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
+// CHECK-NEXT: cntd  x0, all, mul #17
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate patterns
+
+cntd  x0, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
+// CHECK-NEXT: cntd  x0, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cntd  x0, #32
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
+// CHECK-NEXT: cntd  x0, #32
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cntd  x0, vl512
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: cntd  x0, vl512
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
diff --git a/test/MC/AArch64/SVE/cntd.s b/test/MC/AArch64/SVE/cntd.s
@@ -0,0 +1,44 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+cntd  x0
+// CHECK-INST: cntd	x0
+// CHECK-ENCODING: [0xe0,0xe3,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 e3 e0 04 <unknown>
+
+cntd  x0, all
+// CHECK-INST: cntd	x0
+// CHECK-ENCODING: [0xe0,0xe3,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 e3 e0 04 <unknown>
+
+cntd  x0, all, mul #1
+// CHECK-INST: cntd	x0
+// CHECK-ENCODING: [0xe0,0xe3,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 e3 e0 04 <unknown>
+
+cntd  x0, all, mul #16
+// CHECK-INST: cntd	x0, all, mul #16
+// CHECK-ENCODING: [0xe0,0xe3,0xef,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: e0 e3 ef 04 <unknown>
+
+cntd  x0, pow2
+// CHECK-INST: cntd	x0, pow2
+// CHECK-ENCODING: [0x00,0xe0,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 00 e0 e0 04 <unknown>
+
+cntd  x0, #28
+// CHECK-INST: cntd	x0, #28
+// CHECK-ENCODING: [0x80,0xe3,0xe0,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: 80 e3 e0 04 <unknown>
diff --git a/test/MC/AArch64/SVE/cnth-diagnostics.s b/test/MC/AArch64/SVE/cnth-diagnostics.s
@@ -0,0 +1,57 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve  2>&1 < %s| FileCheck %s
+
+// ------------------------------------------------------------------------- //
+// Invalid result register
+
+cnth  w0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: cnth  w0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cnth  sp
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: cnth  sp
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cnth  z0.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: cnth  z0.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Immediate not compatible with encode/decode function.
+
+cnth  x0, all, mul #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
+// CHECK-NEXT: cnth  x0, all, mul #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cnth  x0, all, mul #0
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
+// CHECK-NEXT: cnth  x0, all, mul #0
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cnth  x0, all, mul #17
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: immediate must be an integer in range [1, 16]
+// CHECK-NEXT: cnth  x0, all, mul #17
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate patterns
+
+cnth  x0, #-1
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
+// CHECK-NEXT: cnth  x0, #-1
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cnth  x0, #32
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate pattern
+// CHECK-NEXT: cnth  x0, #32
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+cnth  x0, vl512
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand
+// CHECK-NEXT: cnth  x0, vl512
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: