drivers/net: Import SV6051 Wireless Driver

drivers/net/wireless/Kconfig

@@ -18,6 +18,7 @@ menuconfig WLAN
 
 if WLAN
 
+source "drivers/net/wireless/ssv6051/Kconfig"
 source "drivers/net/wireless/admtek/Kconfig"
 source "drivers/net/wireless/ath/Kconfig"
 source "drivers/net/wireless/atmel/Kconfig"

drivers/net/wireless/Makefile

@@ -3,6 +3,7 @@
 # Makefile for the Linux Wireless network device drivers.
 #
 
+obj-$(CONFIG_SSV6051) += ssv6051/
 obj-$(CONFIG_WLAN_VENDOR_ADMTEK) += admtek/
 obj-$(CONFIG_WLAN_VENDOR_ATH) += ath/
 obj-$(CONFIG_WLAN_VENDOR_ATMEL) += atmel/

drivers/net/wireless/ssv6051/Kconfig

@@ -0,0 +1,11 @@
+# SPDX-License-Identifier: GPL-2.0-only
+config SSV6051
+        tristate "South Silicon Valley (ssv) 6051 family WLAN support"
+	depends on MAC80211
+	depends on (MMC = y)
+        default n
+	select FW_LOADER
+        help
+		Enable South Silicon Valley (SSV) 6051 family support.
+
+

drivers/net/wireless/ssv6051/Makefile

@@ -0,0 +1,26 @@
+# SPDX-License-Identifier: ISC
+
+include $(src)/platform-config.mak
+
+ccflags-y += \
+	-I $(srctree)/$(src) \
+        -I $(srctree)/$(src)/include
+
+obj-$(CONFIG_SSV6051) += ssv6051.o
+ssv6051-objs += \
+	ssv6051-generic-wlan.o \
+	ssvdevice/ssvdevice.o \
+	ssvdevice/ssv_cmd.o \
+	hci/ssv_hci.o \
+	smac/init.o \
+	smac/dev.o \
+	smac/ssv_rc.o \
+	smac/ssv_ht_rc.o \
+	smac/ap.o \
+	smac/ampdu.o \
+	smac/efuse.o \
+	smac/ssv_pm.o \
+	smac/sar.o \
+	smac/ssv_cfgvendor.o \
+	hwif/sdio/sdio.o
+

drivers/net/wireless/ssv6051/firmware/ssv6051-wifi.cfg

@@ -0,0 +1,91 @@
+############################################################
+# ROCKCHIP RK3X28 & RK322X
+# WIFI-CONFIGURATION
+##################################################
+
+##################################################
+# Firmware setting
+# Priority.1 insmod parameter "cfgfirmwarepath"
+# Priority.2 firmware_path
+# Priority.3 default firmware
+##################################################
+firmware_path = /vendor/etc/firmware/
+
+############################################################
+# MAC address
+#
+# Priority 1. From wifi.cfg [ hw_mac & hw_mac_2 ]
+#
+# Priority 2. From e-fuse[ON/OFF switch by wifi.cfg]
+#
+# Priority 3. From insert module parameter
+#
+# Priority 4. From external file path
+#   path only support some special charater "_" ":" "/" "." "-"
+#
+# Priority 5. Default[Software mode]
+#
+#   0. => 00:33:33:33:33:33
+#   1. => Always random
+#   2. => First random and write to file[Default path mac_output_path]
+#
+############################################################
+ignore_efuse_mac = 0
+#mac_address_path = /xxxx/xxxx
+mac_address_mode = 2
+mac_output_path = /data/wifimac
+
+##################################################
+# Hardware setting
+#
+#volt regulator(DCDC-0 LDO-1)
+#
+##################################################
+xtal_clock = 24
+volt_regulator = 1
+
+##################################################
+# Default channel after wifi on
+# value range: [1 ~ 14]
+##################################################
+def_chan = 6
+##################################################
+# Hardware Capability Settings:
+##################################################
+hw_cap_ht = on
+hw_cap_gf = off
+hw_cap_2ghz = on
+hw_cap_5ghz = off
+hw_cap_security = on
+hw_cap_sgi_20 = on
+hw_cap_sgi_40 = off
+hw_cap_ap = on
+hw_cap_p2p = on
+hw_cap_ampdu_rx = on
+hw_cap_ampdu_tx = on
+use_wpa2_only = 1
+##################################################
+# TX power level setting [0-14]
+# The larger the number the smaller the TX power
+# 0 - The maximum power
+# 1 level = -0.5db
+#
+# 6051Z .. 4 or 4
+# 6051Q .. 2 or 5
+# 6051P .. 0 or 0
+#
+##################################################
+#wifi_tx_gain_level_b = 2
+#wifi_tx_gain_level_gn = 5
+################################################
+# Signal strength control
+# rssi control
+#rssi_ctl = 10
+
+
+##################################################
+# Import extenal configuration(UP to 64 groups)
+# example:
+#    register = CE010010:91919191
+#    register = 00CC0010:00091919
+##################################################

drivers/net/wireless/ssv6051/hci/hctrl.h

@@ -0,0 +1,178 @@
+/*
+ * Copyright (c) 2015 South Silicon Valley Microelectronics Inc.
+ * Copyright (c) 2015 iComm Corporation
+ *
+ * This program is free software: you can redistribute it and/or modify 
+ * it under the terms of the GNU General Public License as published by 
+ * the Free Software Foundation, either version 3 of the License, or 
+ * (at your option) any later version.
+ * This program is distributed in the hope that it will be useful, but 
+ * WITHOUT ANY WARRANTY; without even the implied warranty of 
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  
+ * See the GNU General Public License for more details.
+ * You should have received a copy of the GNU General Public License 
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _HCTRL_H_
+#define _HCTRL_H_
+#define MAX_FRAME_SIZE 4096
+#define SSV6XXX_INT_RX 0x00000001
+#define SSV6XXX_INT_TX 0x00000002
+#define SSV6XXX_INT_SOC 0x00000004
+#define SSV6XXX_INT_LOW_EDCA_0 0x00000008
+#define SSV6XXX_INT_LOW_EDCA_1 0x00000010
+#define SSV6XXX_INT_LOW_EDCA_2 0x00000020
+#define SSV6XXX_INT_LOW_EDCA_3 0x00000040
+#define SSV6XXX_INT_RESOURCE_LOW 0x00000080
+#define IFDEV(_ct) ((_ct)->shi->dev)
+#define IFOPS(_ct) ((_ct)->shi->if_ops)
+#define HCI_REG_READ(_ct,_adr,_val) IFOPS(_ct)->readreg(IFDEV(_ct), _adr, _val)
+#define HCI_REG_WRITE(_ct,_adr,_val) IFOPS(_ct)->writereg(IFDEV(_ct), _adr, _val)
+#define HCI_REG_SET_BITS(_ct,_reg,_set,_clr) \
+{ \
+    u32 _regval; \
+    if(HCI_REG_READ(_ct, _reg, &_regval)); \
+    _regval &= ~(_clr); \
+    _regval |= (_set); \
+    if(HCI_REG_WRITE(_ct, _reg, _regval)); \
+}
+#define IF_SEND(_ct,_bf,_len,_qid) IFOPS(_ct)->write(IFDEV(_ct), _bf, _len, _qid)
+#define IF_RECV(ct,bf,len) IFOPS(ct)->read(IFDEV(ct), bf, len)
+#define HCI_LOAD_FW(ct,_bf,open) IFOPS(ct)->load_fw(IFDEV(ct), _bf, open)
+#define HCI_IFC_RESET(ct) IFOPS(ct)->interface_reset(IFDEV(ct))
+struct ssv6xxx_hci_ctrl {
+	struct ssv6xxx_hci_info *shi;
+	spinlock_t int_lock;
+	u32 int_status;
+	u32 int_mask;
+	struct mutex txq_mask_lock;
+	u32 txq_mask;
+	struct ssv_hw_txq hw_txq[SSV_HW_TXQ_NUM];
+	struct mutex hci_mutex;
+	bool hci_start;
+	struct sk_buff *rx_buf;
+	u32 rx_pkt;
+	struct workqueue_struct *hci_work_queue;
+	struct work_struct hci_rx_work;
+	struct work_struct hci_tx_work;
+	u32 read_rs0_info_fail;
+	u32 read_rs1_info_fail;
+	u32 rx_work_running;
+	u32 isr_running;
+	u32 xmit_running;
+	u32 isr_summary_eable;
+	u32 isr_routine_time;
+	u32 isr_tx_time;
+	u32 isr_rx_time;
+	u32 isr_idle_time;
+	u32 isr_rx_idle_time;
+	u32 isr_miss_cnt;
+	unsigned long prev_isr_jiffes;
+	unsigned long prev_rx_isr_jiffes;
+#ifdef CONFIG_SSV6XXX_DEBUGFS
+	struct dentry *debugfs_dir;
+	u32 isr_mib_enable;
+	u32 isr_mib_reset;
+	long long isr_total_time;
+	long long isr_tx_io_time;
+	long long isr_rx_io_time;
+	u32 isr_rx_io_count;
+	u32 isr_tx_io_count;
+	long long isr_rx_proc_time;
+#ifdef CONFIG_IRQ_DEBUG_COUNT
+	bool irq_enable;
+	u32 irq_count;
+	u32 invalid_irq_count;
+	u32 tx_irq_count;
+	u32 real_tx_irq_count;
+	u32 rx_irq_count;
+	u32 irq_rx_pkt_count;
+	u32 irq_tx_pkt_count;
+#endif
+#endif
+};
+struct ssv6xxx_hci_txq_info {
+	u32 tx_use_page:8;
+	u32 tx_use_id:6;
+	u32 txq0_size:4;
+	u32 txq1_size:4;
+	u32 txq2_size:5;
+	u32 txq3_size:5;
+};
+struct ssv6xxx_hci_txq_info2 {
+	u32 tx_use_page:9;
+	u32 tx_use_id:8;
+	u32 txq4_size:4;
+	u32 rsvd:11;
+};
+struct ssv6xxx_hw_resource {
+	u32 free_tx_page;
+	u32 free_tx_id;
+	int max_tx_frame[SSV_HW_TXQ_NUM];
+};
+static inline void ssv6xxx_hwif_irq_request(struct ssv6xxx_hci_ctrl *hctrl,
+					    irq_handler_t irq_handler)
+{
+	if (hctrl->shi->if_ops->irq_request)
+		hctrl->shi->if_ops->irq_request(IFDEV(hctrl), irq_handler,
+						hctrl);
+}
+
+static inline void ssv6xxx_hwif_irq_enable(struct ssv6xxx_hci_ctrl *hctrl)
+{
+	if (hctrl->shi->if_ops->irq_enable)
+		hctrl->shi->if_ops->irq_enable(IFDEV(hctrl));
+}
+
+static inline void ssv6xxx_hwif_irq_disable(struct ssv6xxx_hci_ctrl *hctrl)
+{
+	if (hctrl->shi->if_ops->irq_disable)
+		hctrl->shi->if_ops->irq_disable(IFDEV(hctrl), false);
+}
+
+static inline int ssv6xxx_hwif_irq_getstatus(struct ssv6xxx_hci_ctrl *hctrl,
+					     int *status)
+{
+	if (hctrl->shi->if_ops->irq_getstatus)
+		return hctrl->shi->if_ops->irq_getstatus(IFDEV(hctrl), status);
+	return 0;
+}
+
+static inline void ssv6xxx_hwif_irq_setmask(struct ssv6xxx_hci_ctrl *hctrl,
+					    int mask)
+{
+	if (hctrl->shi->if_ops->irq_setmask)
+		hctrl->shi->if_ops->irq_setmask(IFDEV(hctrl), mask);
+}
+
+static inline void ssv6xxx_hwif_irq_trigger(struct ssv6xxx_hci_ctrl *hctrl)
+{
+	if (hctrl->shi->if_ops->irq_trigger)
+		hctrl->shi->if_ops->irq_trigger(IFDEV(hctrl));
+}
+
+static inline void ssv6xxx_hwif_pmu_wakeup(struct ssv6xxx_hci_ctrl *hctrl)
+{
+	if (hctrl->shi->if_ops->pmu_wakeup)
+		hctrl->shi->if_ops->pmu_wakeup(IFDEV(hctrl));
+}
+
+static inline int ssv6xxx_hwif_write_sram(struct ssv6xxx_hci_ctrl *hctrl,
+					  u32 addr, u8 * data, u32 size)
+{
+	if (hctrl->shi->if_ops->write_sram)
+		return hctrl->shi->if_ops->write_sram(IFDEV(hctrl), addr, data,
+						      size);
+	return 0;
+}
+
+#define HCI_IRQ_REQUEST(ct,hdle) ssv6xxx_hwif_irq_request(ct, hdle)
+#define HCI_IRQ_ENABLE(ct) ssv6xxx_hwif_irq_enable(ct)
+#define HCI_IRQ_DISABLE(ct) ssv6xxx_hwif_irq_disable(ct)
+#define HCI_IRQ_STATUS(ct,sts) ssv6xxx_hwif_irq_getstatus(ct, sts)
+#define HCI_IRQ_SET_MASK(ct,mk) ssv6xxx_hwif_irq_setmask(ct, mk)
+#define HCI_IRQ_TRIGGER(ct) ssv6xxx_hwif_irq_trigger(ct)
+#define HCI_PMU_WAKEUP(ct) ssv6xxx_hwif_pmu_wakeup(ct)
+#define HCI_SRAM_WRITE(_ct,_adr,_dat,_size) ssv6xxx_hwif_write_sram(_ct, _adr, _dat, _size);
+#endif