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Reenable watchdogs on Quadruna (#1274)
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### Changelist 
<!-- Give a list of the changes covered in this PR. This will help both
you and the reviewer keep this PR within scope. -->

Re-enable all watchdogs on Quadruna.

### Testing Done
<!-- Outline the testing that was done to demonstrate the changes are
solid. This could be unit tests, integration tests, testing on the car,
etc. Include relevant code snippets, screenshots, etc as needed. -->

Tested on all boards (except the BMS since it's not in the car).
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gtaharaedmonds authored May 23, 2024
1 parent a62a19e commit 97c582e
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Showing 35 changed files with 314 additions and 128 deletions.
34 changes: 19 additions & 15 deletions firmware/quadruna/BMS/src/cubemx/BMS.ioc
Original file line number Diff line number Diff line change
Expand Up @@ -78,21 +78,22 @@ Mcu.CPN=STM32H733VGT6
Mcu.Family=STM32H7
Mcu.IP0=ADC1
Mcu.IP1=CORTEX_M7
Mcu.IP10=SPI2
Mcu.IP11=SYS
Mcu.IP12=TIM1
Mcu.IP13=TIM3
Mcu.IP14=TIM15
Mcu.IP15=USART1
Mcu.IP10=SDMMC1
Mcu.IP11=SPI2
Mcu.IP12=SYS
Mcu.IP13=TIM1
Mcu.IP14=TIM3
Mcu.IP15=TIM15
Mcu.IP16=USART1
Mcu.IP2=CRC
Mcu.IP3=DEBUG
Mcu.IP4=DMA
Mcu.IP5=FDCAN1
Mcu.IP6=FREERTOS
Mcu.IP7=NVIC
Mcu.IP8=RCC
Mcu.IP9=SDMMC1
Mcu.IPNb=16
Mcu.IP7=IWDG1
Mcu.IP8=NVIC
Mcu.IP9=RCC
Mcu.IPNb=17
Mcu.Name=STM32H733VGTx
Mcu.Package=LQFP100
Mcu.Pin0=PC13
Expand Down Expand Up @@ -142,15 +143,16 @@ Mcu.Pin48=PB9
Mcu.Pin49=VP_CRC_VS_CRC
Mcu.Pin5=PC2_C
Mcu.Pin50=VP_FREERTOS_VS_CMSIS_V2
Mcu.Pin51=VP_SYS_VS_Systick
Mcu.Pin52=VP_TIM1_VS_ControllerModeReset
Mcu.Pin53=VP_TIM1_VS_indirect_ch1
Mcu.Pin54=VP_TIM3_VS_ClockSourceINT
Mcu.Pin51=VP_IWDG1_VS_IWDG
Mcu.Pin52=VP_SYS_VS_Systick
Mcu.Pin53=VP_TIM1_VS_ControllerModeReset
Mcu.Pin54=VP_TIM1_VS_indirect_ch1
Mcu.Pin55=VP_TIM3_VS_ClockSourceINT
Mcu.Pin6=PC3_C
Mcu.Pin7=PA0
Mcu.Pin8=PA1
Mcu.Pin9=PA2
Mcu.PinsNb=55
Mcu.PinsNb=56
Mcu.ThirdPartyNb=0
Mcu.UserConstants=TIM3_PRESCALER,8;ADC_FREQUENCY,1000;TIM1_AUTO_RELOAD_REG,0xFFFF;TIMx_FREQUENCY,512000000;IWDG_RESET_FREQUENCY,5;TASK1KHZ_STACK_SIZE,512;TIM1_FREQUENCY,512000000;TASK100HZ_STACK_SIZE,512;TASK1HZ_STACK_SIZE,512;IWDG_WINDOW_DISABLE_VALUE,4095;IWDG_PRESCALER,4;TASKCANRX_STACK_SIZE,512;TIM1_PWM_MIN_FREQUENCY,1;LSI_FREQUENCY,32000;TIM1_PRESCALER,(TIM1_FREQUENCY / TIM1_AUTO_RELOAD_REG / TIM1_PWM_MIN_FREQUENCY)
Mcu.UserName=STM32H733VGTx
Expand Down Expand Up @@ -542,6 +544,8 @@ VP_CRC_VS_CRC.Mode=CRC_Activate
VP_CRC_VS_CRC.Signal=CRC_VS_CRC
VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
VP_IWDG1_VS_IWDG.Mode=IWDG_Activate
VP_IWDG1_VS_IWDG.Signal=IWDG1_VS_IWDG
VP_SYS_VS_Systick.Mode=SysTick
VP_SYS_VS_Systick.Signal=SYS_VS_Systick
VP_TIM1_VS_ControllerModeReset.Mode=Reset Mode
Expand Down
2 changes: 1 addition & 1 deletion firmware/quadruna/BMS/src/cubemx/BMS.ioc.md5
Original file line number Diff line number Diff line change
@@ -1 +1 @@
ca949076cacb016039ceb7e66cb2b925
e19d30cabbe9e6c882e0f72a8cdbdcd7
2 changes: 1 addition & 1 deletion firmware/quadruna/BMS/src/cubemx/Inc/stm32h7xx_hal_conf.h
Original file line number Diff line number Diff line change
Expand Up @@ -63,7 +63,7 @@ extern "C"
/* #define HAL_OSPI_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_SMBUS_MODULE_ENABLED */
/* #define HAL_IWDG_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED
/* #define HAL_LPTIM_MODULE_ENABLED */
/* #define HAL_LTDC_MODULE_ENABLED */
/* #define HAL_QSPI_MODULE_ENABLED */
Expand Down
34 changes: 33 additions & 1 deletion firmware/quadruna/BMS/src/cubemx/Src/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -58,6 +58,8 @@ CRC_HandleTypeDef hcrc;

FDCAN_HandleTypeDef hfdcan1;

IWDG_HandleTypeDef hiwdg1;

SD_HandleTypeDef hsd1;

SPI_HandleTypeDef hspi2;
Expand Down Expand Up @@ -150,6 +152,7 @@ static void MX_USART1_UART_Init(void);
static void MX_TIM3_Init(void);
static void MX_SDMMC1_SD_Init(void);
static void MX_CRC_Init(void);
static void MX_IWDG1_Init(void);
void RunTask100Hz(void *argument);
void RunTaskCanRx(void *argument);
void RunTaskCanTx(void *argument);
Expand Down Expand Up @@ -200,6 +203,7 @@ int main(void)
MX_TIM3_Init();
MX_SDMMC1_SD_Init();
MX_CRC_Init();
MX_IWDG1_Init();
/* USER CODE BEGIN 2 */
tasks_init();
/* USER CODE END 2 */
Expand Down Expand Up @@ -286,8 +290,9 @@ void SystemClock_Config(void)
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 1;
Expand Down Expand Up @@ -504,6 +509,33 @@ static void MX_FDCAN1_Init(void)
/* USER CODE END FDCAN1_Init 2 */
}

/**
* @brief IWDG1 Initialization Function
* @param None
* @retval None
*/
static void MX_IWDG1_Init(void)
{
/* USER CODE BEGIN IWDG1_Init 0 */

/* USER CODE END IWDG1_Init 0 */

/* USER CODE BEGIN IWDG1_Init 1 */

/* USER CODE END IWDG1_Init 1 */
hiwdg1.Instance = IWDG1;
hiwdg1.Init.Prescaler = IWDG_PRESCALER_4;
hiwdg1.Init.Window = 4095;
hiwdg1.Init.Reload = 4095;
if (HAL_IWDG_Init(&hiwdg1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN IWDG1_Init 2 */

/* USER CODE END IWDG1_Init 2 */
}

/**
* @brief SDMMC1 Initialization Function
* @param None
Expand Down
4 changes: 2 additions & 2 deletions firmware/quadruna/BMS/src/hw/hw_watchdogConfig.c
Original file line number Diff line number Diff line change
Expand Up @@ -6,11 +6,11 @@
#include "io_canTx.h"
#include "hw_utils.h"

// extern IWDG_HandleTypeDef hiwdg1;
extern IWDG_HandleTypeDef hiwdg1;

void hw_watchdogConfig_refresh(void)
{
// HAL_IWDG_Refresh(&hiwdg1);
HAL_IWDG_Refresh(&hiwdg1);
}

void hw_watchdogConfig_timeoutCallback(WatchdogHandle *watchdog)
Expand Down
20 changes: 8 additions & 12 deletions firmware/quadruna/BMS/src/tasks.c
Original file line number Diff line number Diff line change
Expand Up @@ -51,14 +51,13 @@

extern ADC_HandleTypeDef hadc1;
extern FDCAN_HandleTypeDef hfdcan1;
// extern IWDG_HandleTypeDef hiwdg; // TODO: Re-enable watchdog.
extern SPI_HandleTypeDef hspi2;
extern TIM_HandleTypeDef htim1;
extern TIM_HandleTypeDef htim3;
extern TIM_HandleTypeDef htim15;
extern UART_HandleTypeDef huart1;
extern SD_HandleTypeDef hsd1;
extern CRC_HandleTypeDef hcrc;
extern SPI_HandleTypeDef hspi2;
extern TIM_HandleTypeDef htim1;
extern TIM_HandleTypeDef htim3;
extern TIM_HandleTypeDef htim15;
extern UART_HandleTypeDef huart1;
extern SD_HandleTypeDef hsd1;
extern CRC_HandleTypeDef hcrc;

static void canRxQueueOverflowCallBack(uint32_t overflow_count)
{
Expand Down Expand Up @@ -180,7 +179,6 @@ static const AirsConfig airs_config = { .air_p_gpio = {
}
};

// TODO: Test differential ADC for voltage measurement
static const TractiveSystemConfig ts_config = { .ts_vsense_channel_P = ADC1_IN10_TS_VSENSE_P,
.ts_vsense_channel_N = ADC1_IN11_TS_VSENSE_N,
.ts_isense_high_res_channel = ADC1_IN5_TS_ISENSE_75A,
Expand Down Expand Up @@ -451,9 +449,7 @@ _Noreturn void tasks_run1kHz(void)
for (;;)
{
// Check in for timeouts for all RTOS tasks

// TODO: Re-enable watchdog after investigating failure
// hw_watchdog_checkForTimeouts();
hw_watchdog_checkForTimeouts();

const uint32_t task_start_ms = TICK_TO_MS(osKernelGetTickCount());
io_canTx_enqueueOtherPeriodicMsgs(task_start_ms);
Expand Down
28 changes: 17 additions & 11 deletions firmware/quadruna/CRIT/src/cubemx/CRIT.ioc
Original file line number Diff line number Diff line change
Expand Up @@ -42,19 +42,22 @@ FREERTOS.Tasks01=Task1kHz,48,512,StartTask1kHz,Default,NULL,Static,Task1kHzBuffe
FREERTOS.configUSE_NEWLIB_REENTRANT=1
File.Version=6
GPIO.groupedBy=Group By Peripherals
IWDG.IPParameters=Reload
IWDG.Reload=LSI_FREQUENCY / IWDG_PRESCALER / IWDG_RESET_FREQUENCY
KeepUserPlacement=false
Mcu.CPN=STM32F412RGT6
Mcu.Family=STM32F4
Mcu.IP0=ADC1
Mcu.IP1=CAN1
Mcu.IP2=DMA
Mcu.IP3=FREERTOS
Mcu.IP4=NVIC
Mcu.IP5=RCC
Mcu.IP6=SYS
Mcu.IP7=TIM3
Mcu.IP8=USART2
Mcu.IPNb=9
Mcu.IP4=IWDG
Mcu.IP5=NVIC
Mcu.IP6=RCC
Mcu.IP7=SYS
Mcu.IP8=TIM3
Mcu.IP9=USART2
Mcu.IPNb=10
Mcu.Name=STM32F412R(E-G)Tx
Mcu.Package=LQFP64
Mcu.Pin0=PC13
Expand Down Expand Up @@ -101,16 +104,17 @@ Mcu.Pin45=PB7
Mcu.Pin46=PB8
Mcu.Pin47=PB9
Mcu.Pin48=VP_FREERTOS_VS_CMSIS_V2
Mcu.Pin49=VP_SYS_VS_tim6
Mcu.Pin49=VP_IWDG_VS_IWDG
Mcu.Pin5=PC1
Mcu.Pin50=VP_TIM3_VS_ClockSourceINT
Mcu.Pin50=VP_SYS_VS_tim6
Mcu.Pin51=VP_TIM3_VS_ClockSourceINT
Mcu.Pin6=PC2
Mcu.Pin7=PC3
Mcu.Pin8=PA0
Mcu.Pin9=PA1
Mcu.PinsNb=51
Mcu.PinsNb=52
Mcu.ThirdPartyNb=0
Mcu.UserConstants=TASK_100HZ_STACK_SIZE,512;TASK_CANRX_STACK_SIZE,512;TASK_CANTX_STACK_SIZE,512;TIM12_PWM_MINIMUM_FREQUENCY,1;IDWG_RESET_FREQUENCY,5;TIMx_FREQUENCY,96000000;TIM12_PRESCALER,(TIMx_FREQUENCY / TIM12_AUTO_RELOAD_REG / TIM12_PWM_MINIMUM_FREQUENCY);TASK_1HZ_STACK_SIZE,512;TASK_1KHZ_STACK_SIZE,512;TIM12_AUTO_RELOAD_REG,0xFFFF;IWDG_PRESCALER,4;IWDG_WINDOW_DISABLE_VALUE,4095;LSI_FREQUENCY,32000;TIM3_PRESCALER,8;ADC_FREQUENCY,1000
Mcu.UserConstants=TASK_100HZ_STACK_SIZE,512;TASK_CANRX_STACK_SIZE,512;TASK_CANTX_STACK_SIZE,512;TIM3_PRESCALER,8;TIM12_PWM_MINIMUM_FREQUENCY,1;IWDG_RESET_FREQUENCY,5;ADC_FREQUENCY,1000;TIMx_FREQUENCY,96000000;TIM12_PRESCALER,(TIMx_FREQUENCY / TIM12_AUTO_RELOAD_REG / TIM12_PWM_MINIMUM_FREQUENCY);TASK_1HZ_STACK_SIZE,512;TASK_1KHZ_STACK_SIZE,512;TIM12_AUTO_RELOAD_REG,0xFFFF;IWDG_PRESCALER,4;LSI_FREQUENCY,32000
Mcu.UserName=STM32F412RGTx
MxCube.Version=6.9.2
MxDb.Version=DB.6.0.92
Expand Down Expand Up @@ -355,7 +359,7 @@ ProjectManager.ToolChainLocation=
ProjectManager.UAScriptAfterPath=
ProjectManager.UAScriptBeforePath=
ProjectManager.UnderRoot=true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_CAN1_Init-CAN1-false-HAL-true,6-MX_TIM3_Init-TIM3-false-HAL-true,7-MX_USART2_UART_Init-USART2-false-HAL-true
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_ADC1_Init-ADC1-false-HAL-true,5-MX_CAN1_Init-CAN1-false-HAL-true,6-MX_TIM3_Init-TIM3-false-HAL-true,7-MX_USART2_UART_Init-USART2-false-HAL-true,8-MX_IWDG_Init-IWDG-false-HAL-true
RCC.AHBFreq_Value=96000000
RCC.APB1CLKDivider=RCC_HCLK_DIV2
RCC.APB1Freq_Value=48000000
Expand Down Expand Up @@ -405,6 +409,8 @@ USART2.IPParameters=VirtualMode
USART2.VirtualMode=VM_ASYNC
VP_FREERTOS_VS_CMSIS_V2.Mode=CMSIS_V2
VP_FREERTOS_VS_CMSIS_V2.Signal=FREERTOS_VS_CMSIS_V2
VP_IWDG_VS_IWDG.Mode=IWDG_Activate
VP_IWDG_VS_IWDG.Signal=IWDG_VS_IWDG
VP_SYS_VS_tim6.Mode=TIM6
VP_SYS_VS_tim6.Signal=SYS_VS_tim6
VP_TIM3_VS_ClockSourceINT.Mode=Internal
Expand Down
2 changes: 1 addition & 1 deletion firmware/quadruna/CRIT/src/cubemx/CRIT.ioc.md5
Original file line number Diff line number Diff line change
@@ -1 +1 @@
f66dd413a25eae33438e59d6817c3f06
9f9ba4ceab1fab48c4463e02aa002734
7 changes: 3 additions & 4 deletions firmware/quadruna/CRIT/src/cubemx/Inc/main.h
Original file line number Diff line number Diff line change
Expand Up @@ -61,18 +61,17 @@ extern "C"
#define TASK_100HZ_STACK_SIZE 512
#define TASK_CANRX_STACK_SIZE 512
#define TASK_CANTX_STACK_SIZE 512
#define TIM3_PRESCALER 8
#define TIM12_PWM_MINIMUM_FREQUENCY 1
#define IDWG_RESET_FREQUENCY 5
#define IWDG_RESET_FREQUENCY 5
#define ADC_FREQUENCY 1000
#define TIMx_FREQUENCY 96000000
#define TIM12_PRESCALER (TIMx_FREQUENCY / TIM12_AUTO_RELOAD_REG / TIM12_PWM_MINIMUM_FREQUENCY)
#define TASK_1HZ_STACK_SIZE 512
#define TASK_1KHZ_STACK_SIZE 512
#define TIM12_AUTO_RELOAD_REG 0xFFFF
#define IWDG_PRESCALER 4
#define IWDG_WINDOW_DISABLE_VALUE 4095
#define LSI_FREQUENCY 32000
#define TIM3_PRESCALER 8
#define ADC_FREQUENCY 1000
#define NDRIVE_MODE_1b_Pin GPIO_PIN_13
#define NDRIVE_MODE_1b_GPIO_Port GPIOC
#define NCHIMERA_Pin GPIO_PIN_15
Expand Down
2 changes: 1 addition & 1 deletion firmware/quadruna/CRIT/src/cubemx/Inc/stm32f4xx_hal_conf.h
Original file line number Diff line number Diff line change
Expand Up @@ -56,7 +56,7 @@ extern "C"
/* #define HAL_HASH_MODULE_ENABLED */
/* #define HAL_I2C_MODULE_ENABLED */
/* #define HAL_I2S_MODULE_ENABLED */
/* #define HAL_IWDG_MODULE_ENABLED */
#define HAL_IWDG_MODULE_ENABLED
/* #define HAL_LTDC_MODULE_ENABLED */
/* #define HAL_RNG_MODULE_ENABLED */
/* #define HAL_RTC_MODULE_ENABLED */
Expand Down
33 changes: 32 additions & 1 deletion firmware/quadruna/CRIT/src/cubemx/Src/main.c
Original file line number Diff line number Diff line change
Expand Up @@ -48,6 +48,8 @@ DMA_HandleTypeDef hdma_adc1;

CAN_HandleTypeDef hcan1;

IWDG_HandleTypeDef hiwdg;

TIM_HandleTypeDef htim3;

UART_HandleTypeDef huart2;
Expand Down Expand Up @@ -124,6 +126,7 @@ static void MX_ADC1_Init(void);
static void MX_CAN1_Init(void);
static void MX_TIM3_Init(void);
static void MX_USART2_UART_Init(void);
static void MX_IWDG_Init(void);
void StartTask1kHz(void *argument);
void RunTask100Hz(void *argument);
void RunTaskCanRx(void *argument);
Expand Down Expand Up @@ -171,6 +174,7 @@ int main(void)
MX_CAN1_Init();
MX_TIM3_Init();
MX_USART2_UART_Init();
MX_IWDG_Init();
/* USER CODE BEGIN 2 */
tasks_init();
/* USER CODE END 2 */
Expand Down Expand Up @@ -250,8 +254,9 @@ void SystemClock_Config(void)
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 8;
Expand Down Expand Up @@ -363,6 +368,32 @@ static void MX_CAN1_Init(void)
/* USER CODE END CAN1_Init 2 */
}

/**
* @brief IWDG Initialization Function
* @param None
* @retval None
*/
static void MX_IWDG_Init(void)
{
/* USER CODE BEGIN IWDG_Init 0 */

/* USER CODE END IWDG_Init 0 */

/* USER CODE BEGIN IWDG_Init 1 */

/* USER CODE END IWDG_Init 1 */
hiwdg.Instance = IWDG;
hiwdg.Init.Prescaler = IWDG_PRESCALER_4;
hiwdg.Init.Reload = LSI_FREQUENCY / IWDG_PRESCALER / IWDG_RESET_FREQUENCY;
if (HAL_IWDG_Init(&hiwdg) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN IWDG_Init 2 */

/* USER CODE END IWDG_Init 2 */
}

/**
* @brief TIM3 Initialization Function
* @param None
Expand Down
5 changes: 2 additions & 3 deletions firmware/quadruna/CRIT/src/hw/hw_watchdogConfig.c
Original file line number Diff line number Diff line change
Expand Up @@ -6,12 +6,11 @@
#include "io_canTx.h"
#include "hw_utils.h"

// TODO: Re-enable watchdog.
// extern IWDG_HandleTypeDef hiwdg;
extern IWDG_HandleTypeDef hiwdg;

void hw_watchdogConfig_refresh(void)
{
// HAL_IWDG_Refresh(&hiwdg);
HAL_IWDG_Refresh(&hiwdg);
}

void hw_watchdogConfig_timeoutCallback(WatchdogHandle *watchdog)
Expand Down
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