PhD graduated from USTC // FPGA // Verilog // Data Compression // LLM newbie // Hope to bring better open source projects. Welcome to report bugs.
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BSV_Tutorial_cn
BSV_Tutorial_cn Public一篇全面的 Bluespec SystemVerilog (BSV) 中文教程,介绍了BSV的调度、FIFO数据流、多态等高级特性,展示了BSV相比于传统Verilog开发的优势。
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FPGA-USB-Device
FPGA-USB-Device PublicAn FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-sp…
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FPGA-Gzip-compressor
FPGA-Gzip-compressor PublicAn FPGA-based GZIP (Deflate algorithm) compressor, which inputs raw data and outputs standard GZIP format (as known as .gz file format). 基于FPGA的GZIP压缩器。输入原始数据,输出标准的GZIP格式,即常见的 .gz / .tar.gz 文件的格式。
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FPGA-JPEG-LS-encoder
FPGA-JPEG-LS-encoder PublicAn FPGA-based JPEG-LS encoder, which provides lossless and near-lossless image compression with high compression ratios. 基于FPGA的JPEG-LS编码器,可实现高压缩率的无损/近无损图像压缩。
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