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ad9081_fmca_ebz/a10soc: Np 12 support
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ronagyl committed Feb 5, 2021
1 parent f73ed74 commit af3e1c7
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1 change: 1 addition & 0 deletions projects/ad9081_fmca_ebz/a10soc/system_project.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,7 @@ source ../../scripts/adi_project_intel.tcl
# e.g.
# make RX_JESD_L=4 RX_JESD_M=8 RX_JESD_S=1 RX_JESD_NP=16 TX_JESD_L=4 TX_JESD_M=8 TX_JESD_S=1 TX_JESD_NP=16 SAMPLE_RATE=250
# make RX_JESD_L=8 RX_JESD_M=4 RX_JESD_S=1 RX_JESD_NP=16 TX_JESD_L=8 TX_JESD_M=4 TX_JESD_S=1 TX_JESD_NP=16 SAMPLE_RATE=250
# make RX_JESD_L=2 RX_JESD_M=8 RX_JESD_S=1 RX_JESD_NP=12 TX_JESD_L=2 TX_JESD_M=8 TX_JESD_S=1 TX_JESD_NP=12 SAMPLE_RATE=166.66666667

adi_project ad9081_fmca_ebz_a10soc [list \
SAMPLE_RATE [get_env_param SAMPLE_RATE 250] \
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14 changes: 14 additions & 0 deletions projects/ad9081_fmca_ebz/common/ad9081_fmca_ebz_qsys.tcl
Original file line number Diff line number Diff line change
Expand Up @@ -11,6 +11,9 @@ set RX_JESD_S $ad_project_params(RX_JESD_S)
set RX_JESD_NP $ad_project_params(RX_JESD_NP)

set RX_TPL_DATA_PATH_WIDTH 4
if {$RX_JESD_NP==12} {
set RX_TPL_DATA_PATH_WIDTH 6
}

set RX_NUM_OF_LANES [expr $RX_JESD_L * $RX_NUM_OF_LINKS]
set RX_NUM_OF_CONVERTERS [expr $RX_JESD_M * $RX_NUM_OF_LINKS]
Expand All @@ -31,6 +34,9 @@ set TX_JESD_S $ad_project_params(TX_JESD_S)
set TX_JESD_NP $ad_project_params(TX_JESD_NP)

set TX_TPL_DATA_PATH_WIDTH 4
if {$TX_JESD_NP==12} {
set TX_TPL_DATA_PATH_WIDTH 6
}

set TX_NUM_OF_LANES [expr $TX_JESD_L * $TX_NUM_OF_LINKS]
set TX_NUM_OF_CONVERTERS [expr $TX_JESD_M * $TX_NUM_OF_LINKS]
Expand Down Expand Up @@ -79,6 +85,8 @@ set_instance_parameter_value mxfe_rx_jesd204 {REFCLK_FREQUENCY} {250.0}
set_instance_parameter_value mxfe_rx_jesd204 {INPUT_PIPELINE_STAGES} {2}
set_instance_parameter_value mxfe_rx_jesd204 {NUM_OF_LANES} $RX_NUM_OF_LANES
set_instance_parameter_value mxfe_rx_jesd204 {EXT_DEVICE_CLK_EN} {1}
set_instance_parameter_value mxfe_rx_jesd204 {TPL_DATA_PATH_WIDTH} $RX_TPL_DATA_PATH_WIDTH


add_instance mxfe_rx_tpl ad_ip_jesd204_tpl_adc
set_instance_parameter_value mxfe_rx_tpl {ID} {0}
Expand All @@ -87,6 +95,8 @@ set_instance_parameter_value mxfe_rx_tpl {NUM_LANES} $RX_NUM_OF_LANES
set_instance_parameter_value mxfe_rx_tpl {BITS_PER_SAMPLE} $RX_SAMPLE_WIDTH
set_instance_parameter_value mxfe_rx_tpl {CONVERTER_RESOLUTION} $RX_SAMPLE_WIDTH
set_instance_parameter_value mxfe_rx_tpl {TWOS_COMPLEMENT} {1}
set_instance_parameter_value mxfe_rx_tpl {OCTETS_PER_BEAT} $RX_TPL_DATA_PATH_WIDTH
set_instance_parameter_value mxfe_rx_tpl {DMA_BITS_PER_SAMPLE} $RX_DMA_SAMPLE_WIDTH

# TX JESD204 PHY+Link

Expand All @@ -99,13 +109,17 @@ set_instance_parameter_value mxfe_tx_jesd204 {SYSCLK_FREQUENCY} {100.0}
set_instance_parameter_value mxfe_tx_jesd204 {REFCLK_FREQUENCY} {250.0}
set_instance_parameter_value mxfe_tx_jesd204 {NUM_OF_LANES} $TX_NUM_OF_LANES
set_instance_parameter_value mxfe_tx_jesd204 {EXT_DEVICE_CLK_EN} {1}
set_instance_parameter_value mxfe_tx_jesd204 {TPL_DATA_PATH_WIDTH} $TX_TPL_DATA_PATH_WIDTH


add_instance mxfe_tx_tpl ad_ip_jesd204_tpl_dac
set_instance_parameter_value mxfe_tx_tpl {ID} {0}
set_instance_parameter_value mxfe_tx_tpl {NUM_CHANNELS} $TX_NUM_OF_CONVERTERS
set_instance_parameter_value mxfe_tx_tpl {NUM_LANES} $TX_NUM_OF_LANES
set_instance_parameter_value mxfe_tx_tpl {BITS_PER_SAMPLE} $TX_SAMPLE_WIDTH
set_instance_parameter_value mxfe_tx_tpl {CONVERTER_RESOLUTION} $TX_SAMPLE_WIDTH
set_instance_parameter_value mxfe_tx_tpl {OCTETS_PER_BEAT} $TX_TPL_DATA_PATH_WIDTH
set_instance_parameter_value mxfe_tx_tpl {DMA_BITS_PER_SAMPLE} $TX_DMA_SAMPLE_WIDTH

# pack(s) & unpack(s)

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