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arch: arm64: update all JESD204 RX/TX peripheral int-types
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Similarly as for Zynq, we need to update the interrupt types for ZynqMP.
This change sets IRQ_TYPE_LEVEL_HIGH to all JESD204 RX & TX peripheral
drivers.

Signed-off-by: Alexandru Ardelean <[email protected]>
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@commodo
commodo committed Nov 27, 2019
1 parent 3fa8c08 commit 2f529e3
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Showing 10 changed files with 19 additions and 19 deletions.
6 changes: 3 additions & 3 deletions arch/arm64/boot/dts/xilinx/zynqmp-adrv9009-zu11eg-reva.dts
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Expand Up @@ -1195,7 +1195,7 @@
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x0 0x84a50000 0x1000>;

interrupts = <0 109 0>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&hmc7044 7>, <&axi_adrv9009_adxcvr_rx 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
Expand Down Expand Up @@ -1229,7 +1229,7 @@
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x0 0x84a70000 0x1000>;

interrupts = <0 107 0>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&hmc7044 6>, <&axi_adrv9009_adxcvr_rx_os 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
Expand Down Expand Up @@ -1261,7 +1261,7 @@
compatible = "adi,axi-jesd204-tx-1.0";
reg = <0x0 0x84a30000 0x1000>;

interrupts = <0 108 0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&hmc7044 6>, <&axi_adrv9009_adxcvr_tx 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
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2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9172-fmc-ebz.dts
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Expand Up @@ -72,7 +72,7 @@
compatible = "adi,axi-jesd204-tx-1.0";
reg = <0x84a90000 0x4000>;

interrupts = <0 106 0>;
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_ad9172_adxcvr 1>, <&axi_ad9172_adxcvr 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
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2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9208-hmc7044.dts
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Expand Up @@ -74,7 +74,7 @@
axi_ad9208_jesd: axi-jesd204-rx@84aa0000 {
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x84aa0000 0x4000>;
interrupts = <0 108 0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_ad9208_adxcvr 1>, <&axi_ad9208_adxcvr 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
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2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9208.dts
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Expand Up @@ -79,7 +79,7 @@
axi_ad9208_jesd: axi-jesd204-rx@84aa0000 {
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x84aa0000 0x4000>;
interrupts = <0 108 0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_ad9208_adxcvr 1>, <&axi_ad9208_adxcvr 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
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2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9008-1.dts
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Expand Up @@ -72,7 +72,7 @@
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x84aa0000 0x1000>;

interrupts = <0 106 0>;
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_rx_clkgen>, <&axi_adrv9009_adxcvr_rx 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
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4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9008-2.dts
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Expand Up @@ -107,7 +107,7 @@
compatible = "adi,axi-jesd204-tx-1.0";
reg = <0x84a90000 0x1000>;

interrupts = <0 105 0>;
interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_tx_clkgen>, <&axi_adrv9009_adxcvr_tx 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
Expand All @@ -127,7 +127,7 @@
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x84ab0000 0x1000>;

interrupts = <0 104 0>;
interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_rx_os_clkgen>, <&axi_adrv9009_adxcvr_rx_os 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
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6 changes: 3 additions & 3 deletions arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9009.dts
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Expand Up @@ -149,7 +149,7 @@
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x84aa0000 0x1000>;

interrupts = <0 106 0>;
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_rx_clkgen>, <&axi_adrv9009_adxcvr_rx 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
Expand All @@ -165,7 +165,7 @@
compatible = "adi,axi-jesd204-tx-1.0";
reg = <0x84a90000 0x1000>;

interrupts = <0 105 0>;
interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_tx_clkgen>, <&axi_adrv9009_adxcvr_tx 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
Expand All @@ -185,7 +185,7 @@
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x84ab0000 0x1000>;

interrupts = <0 104 0>;
interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_rx_os_clkgen>, <&axi_adrv9009_adxcvr_rx_os 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
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6 changes: 3 additions & 3 deletions arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9371.dts
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Expand Up @@ -132,7 +132,7 @@
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x84aa0000 0x1000>;

interrupts = <0 106 0>;
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_rx_clkgen>, <&axi_ad9371_adxcvr_rx 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
Expand All @@ -148,7 +148,7 @@
compatible = "adi,axi-jesd204-tx-1.0";
reg = <0x84a90000 0x1000>;

interrupts = <0 105 0>;
interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_tx_clkgen>, <&axi_ad9371_adxcvr_tx 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
Expand All @@ -168,7 +168,7 @@
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x84ab0000 0x1000>;

interrupts = <0 104 0>;
interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_rx_os_clkgen>, <&axi_ad9371_adxcvr_rx_os 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
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4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-fmcdaq2.dts
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Expand Up @@ -95,7 +95,7 @@
compatible = "adi,axi-jesd204-tx-1.0";
reg = <0x84a90000 0x4000>;

interrupts = <0 106 0>;
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_ad9144_adxcvr 1>, <&axi_ad9144_adxcvr 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
Expand All @@ -122,7 +122,7 @@
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x84aa0000 0x4000>;

interrupts = <0 107 0>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_ad9680_adxcvr 1>, <&axi_ad9680_adxcvr 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
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4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-fmcdaq3.dts
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Expand Up @@ -100,7 +100,7 @@
axi_ad9680_jesd: axi-jesd204-rx@84aa0000 {
compatible = "adi,axi-jesd204-rx-1.0";
reg = <0x84aa0000 0x4000>;
interrupts = <0 107 0>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_ad9680_adxcvr 1>, <&axi_ad9680_adxcvr 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
Expand Down Expand Up @@ -132,7 +132,7 @@
compatible = "adi,axi-jesd204-tx-1.0";
reg = <0x84a90000 0x4000>;

interrupts = <0 106 0>;
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;

clocks = <&zynqmp_clk 71>, <&axi_ad9152_adxcvr 1>, <&axi_ad9152_adxcvr 0>;
clock-names = "s_axi_aclk", "device_clk", "lane_clk";
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