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arch: arm64: update all AXI DMAC int-types
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Similarly as for Zynq, the AXI DMAC interrupt types need to be updated to
IRQ_TYPE_LEVEL_HIGH. This change does that.

Signed-off-by: Alexandru Ardelean <[email protected]>
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commodo committed Nov 27, 2019
1 parent 2f529e3 commit 301861b
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Showing 15 changed files with 29 additions and 29 deletions.
6 changes: 3 additions & 3 deletions arch/arm64/boot/dts/xilinx/zynqmp-adrv9009-zu11eg-reva.dts
Original file line number Diff line number Diff line change
Expand Up @@ -1291,7 +1291,7 @@
reg = <0x0 0x9c420000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 106 0>;
interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;

adi,channels {
Expand All @@ -1313,7 +1313,7 @@
reg = <0x0 0x9c440000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 104 0>;
interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;

adi,channels {
Expand All @@ -1335,7 +1335,7 @@
reg = <0x0 0x9c400000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 105 0>;
interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;

adi,channels {
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Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,7 @@
#dma-cells = <1>;
compatible = "adi,axi-dmac-1.00.a";
reg = <0x9c420000 0x10000>;
interrupts = <0 108 0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>;

adi,channels {
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Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,7 @@
#dma-cells = <1>;
compatible = "adi,axi-dmac-1.00.a";
reg = <0x9c420000 0x10000>;
interrupts = <0 109 0>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>;

adi,channels {
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2 changes: 1 addition & 1 deletion arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9208.dts
Original file line number Diff line number Diff line change
Expand Up @@ -51,7 +51,7 @@
#dma-cells = <1>;
compatible = "adi,axi-dmac-1.00.a";
reg = <0x9c420000 0x10000>;
interrupts = <0 109 0>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>;

adi,channels {
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Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@
reg = <0x9c400000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 109 0>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>;

adi,channels {
Expand All @@ -65,7 +65,7 @@
reg = <0x9c420000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 108 0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>;

adi,channels {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,7 @@
reg = <0x9c400000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 109 0>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;

adi,channels {
Expand All @@ -62,7 +62,7 @@
reg = <0x9c420000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 108 0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;

adi,channels {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@
reg = <0x9c400000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 109 0>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>;

adi,channels {
Expand All @@ -65,7 +65,7 @@
reg = <0x9c420000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 108 0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>;

adi,channels {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,7 @@
reg = <0x9c400000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 109 0>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;

adi,channels {
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4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9008-2.dts
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,7 @@
reg = <0x9c440000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 107 0>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;

adi,channels {
Expand All @@ -63,7 +63,7 @@
reg = <0x9c420000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 108 0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;

adi,channels {
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6 changes: 3 additions & 3 deletions arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9009.dts
Original file line number Diff line number Diff line change
Expand Up @@ -52,7 +52,7 @@
reg = <0x9c400000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 109 0>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;

adi,channels {
Expand All @@ -74,7 +74,7 @@
reg = <0x9c440000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 107 0>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;

adi,channels {
Expand All @@ -96,7 +96,7 @@
reg = <0x9c420000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 108 0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;

adi,channels {
Expand Down
6 changes: 3 additions & 3 deletions arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9371.dts
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@
reg = <0x9c400000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 109 0>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;

adi,channels {
Expand All @@ -57,7 +57,7 @@
reg = <0x9c440000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 107 0>;
interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;

adi,channels {
Expand All @@ -79,7 +79,7 @@
reg = <0x9c420000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 108 0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 73>;

adi,channels {
Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-fmcdaq2.dts
Original file line number Diff line number Diff line change
Expand Up @@ -43,7 +43,7 @@
reg = <0x9c400000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 109 0>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>;

adi,channels {
Expand All @@ -65,7 +65,7 @@
reg = <0x9c420000 0x10000>;
#dma-cells = <1>;
#clock-cells = <0>;
interrupts = <0 108 0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>;

adi,channels {
Expand Down
4 changes: 2 additions & 2 deletions arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-fmcdaq3.dts
Original file line number Diff line number Diff line change
Expand Up @@ -42,7 +42,7 @@
#dma-cells = <1>;
compatible = "adi,axi-dmac-1.00.a";
reg = <0x9c400000 0x10000>;
interrupts = <0 109 0>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>;

adi,channels {
Expand All @@ -63,7 +63,7 @@
#dma-cells = <1>;
compatible = "adi,axi-dmac-1.00.a";
reg = <0x9c420000 0x10000>;
interrupts = <0 108 0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>;

adi,channels {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -42,7 +42,7 @@
compatible = "adi,axi-dmac-1.00.a";
reg = <0x9c400000 0x10000>;
#dma-cells = <1>;
interrupts = <0 109 0>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>;

adi,channels {
Expand All @@ -64,7 +64,7 @@
compatible = "adi,axi-dmac-1.00.a";
reg = <0x9c420000 0x10000>;
#dma-cells = <1>;
interrupts = <0 108 0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>;

adi,channels {
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -42,7 +42,7 @@
compatible = "adi,axi-dmac-1.00.a";
reg = <0x80010000 0x10000>;
#dma-cells = <1>;
interrupts = <0 109 0>;
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>;

adi,channels {
Expand All @@ -63,7 +63,7 @@
compatible = "adi,axi-dmac-1.00.a";
reg = <0x80020000 0x10000>;
#dma-cells = <1>;
interrupts = <0 108 0>;
interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&zynqmp_clk 71>;

adi,channels {
Expand Down

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