md+m32x fixes, validated by testpico (notaz)

[TascoDLX]

ref: https://github.com/notaz/megadrive/tree/3d80f9400569f545d9e651a68aa0382f7ca6db40/testpico
(note: results reported from out-of-date build; need to check against latest)

1. Revised the vdp irq delay implementation based on testpico 42: irq f flag h40 & 43: irq f flag h32. The delay that occurs on vdp reg writes apparently occurs on normal irq triggers as well. Co-validated via gen_test_int_delay rom by Mask of Destiny. Additionallly, per 39: irq ack v-h 2, v-int ack can be missed if v-irq is disabled prior to action.
2. Per testpico 44: 32x init & 50: 32x disable, various unused reg bits should read as clear. Per 47: 32x md rom, h-int vector should not be preinitialized. The fix was borrowed from the mcd, but the soft reset case is unverified.
3. YM2612 timer has particular behaviors covered by 34: timer b stop & 35: timer ab sync. This mostly applies to timer b which counts by subticks (represented by divider in source). These subticks are only reset in the case where period is set, but not when the timer is enabled. Also, there is an apparent latch effect on timer enables which affect timing.

NOT FIXED:

• Per 24: time z80 vdp, access to the vdp from Z80 apparently incurs an average delay of ~2.5 cycles, not 3 cycles like the Z80 bank access. There may be other factors that affect timing (like repeated access), so a fix is on hold pending investigation.
• Some tests fail only when testpico is run as a 32X rom. This is a sync issue. Lowering the cpu sync threshold would fix this.
• testpico will run off the rails and start freezing up ares ~30 seconds after the tests has completed. This may be due to not handling SH-2 sleep/standby mode correctly.