Fix operands of RFED instructions

They have now memory operand and the writeback flag is set accordingly.
capstone-engine · Nov 25, 2024 · b5a6457 · b5a6457
1 parent 80e9a45
commit b5a6457
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diff --git a/arch/ARM/ARMMapping.c b/arch/ARM/ARMMapping.c
@@ -565,6 +565,20 @@ static void ARM_add_not_defined_ops(MCInst *MI)
 		}
 		break;
 	}
+	case ARM_RFEDA_UPD:
+	case ARM_RFEDB_UPD:
+	case ARM_RFEIA_UPD:
+	case ARM_RFEIB_UPD:
+		get_detail(MI)->writeback = true;
+		// fallthrough
+	case ARM_RFEDA:
+	case ARM_RFEDB:
+	case ARM_RFEIA:
+	case ARM_RFEIB: {
+		arm_reg base_reg = ARM_get_detail_op(MI, -1)->reg;
+		ARM_get_detail_op(MI, -1)->type = ARM_OP_MEM;
+		ARM_get_detail_op(MI, -1)->mem.base = base_reg;
+	}
 	}
 }
 

diff --git a/tests/details/arm.yaml b/tests/details/arm.yaml
@@ -2785,3 +2785,43 @@ test_cases:
           writeback: 1
           regs_read: [ cpsr, r4 ]
           regs_write: [ r4 ]
+  -
+    input:
+      bytes: [ 0x00, 0x0a, 0x33, 0xf9 ]
+      arch: "CS_ARCH_ARM"
+      options: [ CS_OPT_DETAIL ]
+      address: 0x0
+    expected:
+      insns:
+      -
+        asm_text: "rfedb	r3!"
+        details:
+          arm:
+            operands:
+              -
+                type: ARM_OP_MEM
+                mem_base: r3
+                access: CS_AC_READ
+          writeback: 1
+          regs_read: [ r3 ]
+          regs_write: [ r3 ]
+  -
+    input:
+      bytes: [ 0x00, 0x0a, 0x13, 0xf9 ]
+      arch: "CS_ARCH_ARM"
+      options: [ CS_OPT_DETAIL ]
+      address: 0x0
+    expected:
+      insns:
+      -
+        asm_text: "rfedb	r3"
+        details:
+          arm:
+            operands:
+              -
+                type: ARM_OP_MEM
+                mem_base: r3
+                access: CS_AC_READ
+          writeback: -1
+          regs_read: [ r3 ]
+          regs_write: [ ]