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Shiftdevideby10.bsf
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Shiftdevideby10.bsf
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/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 2023 Intel Corporation. All rights reserved.
Your use of Intel Corporation's design tools, logic functions
and other software and tools, and any partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Intel Program License
Subscription Agreement, the Intel Quartus Prime License Agreement,
the Intel FPGA IP License Agreement, or other applicable license
agreement, including, without limitation, that your use is for
the sole purpose of programming logic devices manufactured by
Intel and sold by Intel or its authorized distributors. Please
refer to the applicable agreement for further details, at
https://fpgasoftware.intel.com/eula.
*/
(header "symbol" (version "1.2"))
(symbol
(rect 16 16 200 144)
(text "Shiftdevideby10" (rect 5 0 106 19)(font "Intel Clear" (font_size 8)))
(text "inst" (rect 8 107 24 124)(font "Intel Clear" ))
(port
(pt 0 32)
(input)
(text "X[12..0]" (rect 0 0 47 19)(font "Intel Clear" (font_size 8)))
(text "X[12..0]" (rect 21 27 68 46)(font "Intel Clear" (font_size 8)))
(line (pt 0 32)(pt 16 32)(line_width 3))
)
(port
(pt 0 48)
(input)
(text "Y[12..0]" (rect 0 0 47 19)(font "Intel Clear" (font_size 8)))
(text "Y[12..0]" (rect 21 43 68 62)(font "Intel Clear" (font_size 8)))
(line (pt 0 48)(pt 16 48)(line_width 3))
)
(port
(pt 0 64)
(input)
(text "Add/sub" (rect 0 0 50 19)(font "Intel Clear" (font_size 8)))
(text "Add/sub" (rect 21 59 71 78)(font "Intel Clear" (font_size 8)))
(line (pt 0 64)(pt 16 64))
)
(port
(pt 0 80)
(input)
(text "Z[12..0]" (rect 0 0 47 19)(font "Intel Clear" (font_size 8)))
(text "Z[12..0]" (rect 21 75 68 94)(font "Intel Clear" (font_size 8)))
(line (pt 0 80)(pt 16 80)(line_width 3))
)
(port
(pt 184 32)
(output)
(text "Output[12..0]" (rect 0 0 80 19)(font "Intel Clear" (font_size 8)))
(text "Output[12..0]" (rect 83 27 163 46)(font "Intel Clear" (font_size 8)))
(line (pt 184 32)(pt 168 32)(line_width 3))
)
(drawing
(rectangle (rect 16 16 168 112))
)
)