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riscv64: Avoid F and V instruction generation #449

riscv64: Avoid F and V instruction generation

riscv64: Avoid F and V instruction generation #449

Triggered via pull request December 9, 2023 09:02
Status Success
Total duration 3m 47s
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build.yaml

on: pull_request
Matrix: Build
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3 warnings
Build (riscv64gcv-unknown-none-elf.json, false)
The following actions uses node12 which is deprecated and will be forced to run on node16: actions/checkout@v2. For more info: https://github.blog/changelog/2023-06-13-github-actions-all-actions-will-run-on-node16-instead-of-node12-by-default/
Build (aarch64-unknown-none.json, false)
The following actions uses node12 which is deprecated and will be forced to run on node16: actions/checkout@v2. For more info: https://github.blog/changelog/2023-06-13-github-actions-all-actions-will-run-on-node16-instead-of-node12-by-default/
Build (x86_64-unknown-none.json, true)
The following actions uses node12 which is deprecated and will be forced to run on node16: actions/checkout@v2. For more info: https://github.blog/changelog/2023-06-13-github-actions-all-actions-will-run-on-node16-instead-of-node12-by-default/