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Discover PCI BAR sizes #224

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rbradford
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  • pci: Adjust conditional compilation rules
  • pci: Make x86-64 I/O port Read/Write
  • pci: Add support for writing to PCI config space
  • pci: Probe and report out PCI BAR sizes

Separate by x86-64 platform that uses I/O port access and everything
else that uses PCI ECAM.

Signed-off-by: Rob Bradford <[email protected]>
@rbradford rbradford changed the title Discover PCI BARs Discover PCI BAR sizes Feb 28, 2023
@rbradford rbradford mentioned this pull request Feb 28, 2023
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@rbradford rbradford force-pushed the 2023-02-27-pci-bar-size-discovery branch from a7e4b9e to c9f896b Compare February 28, 2023 15:44
@rbradford rbradford marked this pull request as ready for review February 28, 2023 15:59
@rbradford rbradford requested review from retrage and sboeuf February 28, 2023 15:59
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@sboeuf sboeuf left a comment

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Looking good!

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This is necessary for identifying the size of the BARs.

Signed-off-by: Rob Bradford <[email protected]>
@rbradford rbradford force-pushed the 2023-02-27-pci-bar-size-discovery branch from c9f896b to cedc15d Compare March 1, 2023 12:37
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@retrage retrage left a comment

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It looks good to me! Just a minor suggestion: it's better to squash commit cedc15d with 6d6e3c9.

This is necessary if we need to program the BARs ourselves.

Signed-off-by: Rob Bradford <[email protected]>
@rbradford rbradford force-pushed the 2023-02-27-pci-bar-size-discovery branch from cedc15d to 5d9555e Compare March 1, 2023 14:31
@rbradford rbradford enabled auto-merge (rebase) March 1, 2023 14:31
@rbradford rbradford merged commit 2c51237 into cloud-hypervisor:main Mar 1, 2023
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3 participants