Update OSS CAD Suite version to 2024-06-01. #90
Workflow file for this run
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on: | |
push: | |
branches-ignore: | |
- update-yosys-* | |
- renovate/* | |
pull_request: | |
name: CI | |
# TODO: Print outputs on failing steps. This can be done with something like: | |
# gzip -c cover.vcd | base64 | base64 -d | gunzip > cover-out.vcd | |
jobs: | |
ci-basic: | |
name: Basic CI Check | |
strategy: | |
matrix: | |
os: [ubuntu-latest] | |
runs-on: ${{ matrix.os }} | |
steps: | |
- uses: actions/checkout@v4 | |
- uses: actions/setup-python@v5 | |
with: | |
python-version: "3.11" | |
- uses: pdm-project/setup-pdm@v4 | |
with: | |
python-version: 3.11 | |
cache: true | |
- uses: dtolnay/rust-toolchain@stable | |
with: | |
targets: riscv32i-unknown-none-elf | |
# GCC already installed. | |
# - name: Install riscv64 GCC (for tests) and x64 GCC Linker Driver (for Rust) | |
# run: sudo apt install -y gcc-riscv64-unknown-elf gcc | |
- name: Install riscv64 GCC (for tests) | |
run: sudo apt install -y gcc-riscv64-unknown-elf | |
- name: Set oss-cad-suite vars (for cache) | |
run: | | |
echo >> $GITHUB_ENV OSS_CAD_SUITE_DATE=$(cat ci/oss-cad-suite-version) | |
- name: Cache OSS CAD Suite | |
id: cache-oss-cad-suite | |
uses: actions/cache@v4 | |
with: | |
path: ~/cache/ | |
key: ${{ runner.os }}-${{ env.OSS_CAD_SUITE_DATE }} | |
- name: Download OSS CAD Suite | |
if: steps.cache-oss-cad-suite.outputs.cache-hit != 'true' | |
run: | | |
mkdir -p ~/cache/oss-cad-suite-linux-x64 | |
wget https://github.com/YosysHQ/oss-cad-suite-build/releases/download/$OSS_CAD_SUITE_DATE/oss-cad-suite-linux-x64-$(echo $OSS_CAD_SUITE_DATE | sed s/-//g).tgz -nv -O oss-cad-suite-linux-x64.tar.gz | |
tar -xzf oss-cad-suite-linux-x64.tar.gz -C ~/cache/oss-cad-suite-linux-x64 | |
- name: Set OSS CAD Suite path | |
run: echo >> $GITHUB_PATH `echo ~/cache/oss-cad-suite-linux-x64/*/bin` | |
- name: Install PDM dependencies | |
run: pdm install -G examples -G dev | |
- name: Run Pytest Tests | |
run: | | |
pdm test-quick | |
- name: Test Generate Verilog | |
# LD_PRELOAD, which GHA seems to set by default, interferes with | |
# oss-cad-suite setup by mixing incompatible libcs, so unset it | |
# for any commands requiring yosys/nextpnr. | |
run: | | |
LD_PRELOAD="" pdm gen -o sentinel.v | |
# We only build the Rust firmware here and not build the | |
# bitstream; building the bitstream will be identical to the next | |
# Benchmark step, aside from block RAM contents- redundant. | |
- name: Create Rust Firmware | |
run: | | |
LD_PRELOAD="" pdm _rust-firmware | |
# Test that the following generates correctly: | |
# 1. IceStick, Wishbone Periphs, Default demo. This is also | |
# benchmarked in the next step separately. | |
# 2. HX8K Eval, CSR Periphs, Rust demo | |
- name: Check Gateware Generation | |
run: | | |
LD_PRELOAD="" pdm demo -n | |
LD_PRELOAD="" pdm demo-rust -n -p ice40_hx8k_b_evn -i csr | |
# Get an idea of whether the full default prime-counting firmware | |
# demo fits into 1280 LUTs or exceeds it a bit. This also | |
# checks whether a demo bitstream build was successful. | |
# | |
# I will remove continue-on-error once I'm confident the demo | |
# fits into 1280 LUTs on more than just my machines (*nix/Win). | |
# HINT: abc compiled with clang seems to optimize worse than abc | |
# compiled with gcc, regardless of OS. | |
- name: Benchmark Demo Bitstream | |
continue-on-error: true | |
run: | | |
LD_PRELOAD="" pdm bench-luts | |
ci-riscof: | |
name: RISCOF Check | |
runs-on: ubuntu-latest | |
steps: | |
- uses: actions/checkout@v4 | |
- uses: actions/setup-python@v5 | |
with: | |
python-version: "3.11" | |
- uses: pdm-project/setup-pdm@v4 | |
with: | |
python-version: 3.11 | |
cache: true | |
- name: Install riscv64 GCC (for tests) | |
run: sudo apt install -y gcc-riscv64-unknown-elf | |
- name: Set oss-cad-suite vars (for cache) | |
run: | | |
echo >> $GITHUB_ENV OSS_CAD_SUITE_DATE=$(cat ci/oss-cad-suite-version) | |
- name: Cache OSS CAD Suite | |
id: cache-oss-cad-suite | |
uses: actions/cache@v4 | |
with: | |
path: ~/cache/ | |
key: ${{ runner.os }}-${{ env.OSS_CAD_SUITE_DATE }} | |
- name: Download OSS CAD Suite | |
if: steps.cache-oss-cad-suite.outputs.cache-hit != 'true' | |
run: | | |
mkdir -p ~/cache/oss-cad-suite-linux-x64 | |
wget https://github.com/YosysHQ/oss-cad-suite-build/releases/download/$OSS_CAD_SUITE_DATE/oss-cad-suite-linux-x64-$(echo $OSS_CAD_SUITE_DATE | sed s/-//g).tgz -nv -O oss-cad-suite-linux-x64.tar.gz | |
tar -xzf oss-cad-suite-linux-x64.tar.gz -C ~/cache/oss-cad-suite-linux-x64 | |
- name: Set OSS CAD Suite path | |
run: echo >> $GITHUB_PATH `echo ~/cache/oss-cad-suite-linux-x64/*/bin` | |
- name: Install PDM dependencies | |
run: pdm install -G dev -G riscof | |
- name: Run RISCOF Suite | |
run: | | |
LD_PRELOAD="" pdm riscof-all | |
ci-rvformal: | |
name: RISC-V Formal Check | |
runs-on: ubuntu-latest | |
steps: | |
- uses: actions/checkout@v4 | |
- uses: actions/setup-python@v5 | |
with: | |
python-version: "3.11" | |
- uses: pdm-project/setup-pdm@v4 | |
with: | |
python-version: 3.11 | |
cache: true | |
- name: Install riscv64 GCC (for tests) | |
run: sudo apt install -y gcc-riscv64-unknown-elf | |
- name: Set oss-cad-suite vars (for cache) | |
run: | | |
echo >> $GITHUB_ENV OSS_CAD_SUITE_DATE=$(cat ci/oss-cad-suite-version) | |
- name: Cache OSS CAD Suite | |
id: cache-oss-cad-suite | |
uses: actions/cache@v4 | |
with: | |
path: ~/cache/ | |
key: ${{ runner.os }}-${{ env.OSS_CAD_SUITE_DATE }} | |
- name: Download OSS CAD Suite | |
if: steps.cache-oss-cad-suite.outputs.cache-hit != 'true' | |
run: | | |
mkdir -p ~/cache/oss-cad-suite-linux-x64 | |
wget https://github.com/YosysHQ/oss-cad-suite-build/releases/download/$OSS_CAD_SUITE_DATE/oss-cad-suite-linux-x64-$(echo $OSS_CAD_SUITE_DATE | sed s/-//g).tgz -nv -O oss-cad-suite-linux-x64.tar.gz | |
tar -xzf oss-cad-suite-linux-x64.tar.gz -C ~/cache/oss-cad-suite-linux-x64 | |
- name: Set OSS CAD Suite path | |
run: echo >> $GITHUB_PATH `echo ~/cache/oss-cad-suite-linux-x64/*/bin` | |
- name: Install PDM dependencies | |
run: pdm install -G dev | |
- name: Run RISC-V Formal | |
run: | | |
LD_PRELOAD="" pdm rvformal-all |