Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Maliciously secure bit authentication / Refactoring #78

Draft
wants to merge 15 commits into
base: main
Choose a base branch
from
Draft
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension


Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
1 change: 1 addition & 0 deletions atlas-spec/mpc-engine/Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@ edition = "2021"
[dependencies]
rand = "0.8.5"
p256.workspace = true
hash-to-curve.workspace = true
hmac.workspace = true
hacspec-chacha20poly1305.workspace = true
hacspec_lib.workspace = true
Expand Down
2 changes: 1 addition & 1 deletion atlas-spec/mpc-engine/examples/run_mpc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,7 @@ fn main() {
let input = rng.bit().unwrap();
eprintln!("Starting party {} with input: {}", channel_config.id, input);
let mut p = mpc_engine::party::Party::new(channel_config, &c, log_enabled, rng);
let _ = p.run(false, &c, &vec![input]);
let _ = p.run(&c, &vec![input]);
});
party_join_handles.push(party_join_handle);
}
Expand Down
117 changes: 116 additions & 1 deletion atlas-spec/mpc-engine/src/circuit.rs
Original file line number Diff line number Diff line change
Expand Up @@ -292,7 +292,7 @@ impl Circuit {

for gate in &self.gates {
let output_bit = match gate {
WiredGate::Input(x) => wire_evaluations[*x],
WiredGate::Input(x) => continue,
WiredGate::Xor(x, y) => wire_evaluations[*x] ^ wire_evaluations[*y],
WiredGate::And(x, y) => wire_evaluations[*x] & wire_evaluations[*y],
WiredGate::Not(x) => !wire_evaluations[*x],
Expand Down Expand Up @@ -347,3 +347,118 @@ impl Circuit {
result
}
}

#[cfg(test)]
mod tests {
use crate::utils::ith_bit;

use super::*;

fn gen_inputs() -> Vec<[Vec<bool>; 4]> {
let mut results = Vec::new();
for i in 0..16 {
let mut current_input = [Vec::new(), Vec::new(), Vec::new(), Vec::new()];
for j in 0..4 {
current_input[j] = vec![ith_bit(j + 4, &[i as u8])];
}
results.push(current_input);
}
results
}

fn parity(input: &[Vec<bool>; 4]) -> bool {
let sum = input[0][0] as u8 + input[1][0] as u8 + input[2][0] as u8 + input[3][0] as u8;
!(sum % 2 == 0)
}

#[test]
fn eval_and_2() {
let and = Circuit {
input_widths: vec![1, 1],
gates: vec![
WiredGate::Input(0), // Gate 0
WiredGate::Input(1), // Gate 1
WiredGate::And(0, 1), // Gate 2
],
output_gates: vec![2],
};

assert_eq!(and.eval(&[vec![true], vec![true]]).unwrap()[0], true,);
assert_eq!(and.eval(&[vec![true], vec![false]]).unwrap()[0], false,);
assert_eq!(and.eval(&[vec![false], vec![true]]).unwrap()[0], false,);
assert_eq!(and.eval(&[vec![false], vec![false]]).unwrap()[0], false,);
}

#[test]
fn eval_xor_2() {
let and = Circuit {
input_widths: vec![1, 1],
gates: vec![
WiredGate::Input(0), // Gate 0
WiredGate::Input(1), // Gate 1
WiredGate::Xor(0, 1), // Gate 2
],
output_gates: vec![2],
};

assert_eq!(and.eval(&[vec![true], vec![true]]).unwrap()[0], false,);
assert_eq!(and.eval(&[vec![true], vec![false]]).unwrap()[0], true,);
assert_eq!(and.eval(&[vec![false], vec![true]]).unwrap()[0], true,);
assert_eq!(and.eval(&[vec![false], vec![false]]).unwrap()[0], false,);
}

#[test]
fn eval_and_4() {
let and = Circuit {
input_widths: vec![1, 1, 1, 1],
gates: vec![
WiredGate::Input(0), // Gate 0
WiredGate::Input(1), // Gate 1
WiredGate::Input(2), // Gate 2
WiredGate::Input(3), // Gate 3
WiredGate::And(0, 1), // Gate 4
WiredGate::And(2, 3), // Gate 5
WiredGate::And(4, 5), // Gate 6
],
output_gates: vec![6],
};

for input in gen_inputs() {
if input[0][0] && input[1][0] && input[2][0] && input[3][0] {
continue;
}
assert_eq!(and.eval(&input).unwrap()[0], false, "on input: {:?}", input);
}
assert_eq!(
and.eval(&[vec![true], vec![true], vec![true], vec![true]])
.unwrap()[0],
true,
);
}

#[test]
fn eval_xor_4() {
let xor = Circuit {
input_widths: vec![1, 1, 1, 1],
gates: vec![
WiredGate::Input(0), // Gate 0
WiredGate::Input(1), // Gate 1
WiredGate::Input(2), // Gate 2
WiredGate::Input(3), // Gate 3
WiredGate::Xor(0, 1), // Gate 4
WiredGate::Xor(2, 3), // Gate 5
WiredGate::Xor(4, 5), // Gate 6
],
output_gates: vec![6],
};

for input in gen_inputs() {
assert_eq!(
xor.eval(&input).unwrap()[0],
parity(&input),
"on input: {:?}",
input
);
}
}
}
3 changes: 3 additions & 0 deletions atlas-spec/mpc-engine/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -41,6 +41,8 @@ pub enum Error {
AEADError,
/// Miscellaneous error.
OtherError,
/// Subprotocol error
SubprotocolError,
}

impl From<p256::Error> for Error {
Expand Down Expand Up @@ -71,4 +73,5 @@ pub mod circuit;
pub mod messages;
pub mod party;
pub mod primitives;
pub mod runner;
pub mod utils;
12 changes: 8 additions & 4 deletions atlas-spec/mpc-engine/src/messages.rs
Original file line number Diff line number Diff line change
Expand Up @@ -4,8 +4,8 @@ use std::sync::mpsc::{Receiver, Sender};
use crate::{
circuit::WireIndex,
primitives::{
auth_share::BitID,
commitment::{Commitment, Opening},
kos::{KOSReceiverPhaseI, KOSSenderPhaseI, KOSSenderPhaseII},
mac::Mac,
ot::{OTReceiverSelect, OTSenderInit, OTSenderSend},
},
Expand Down Expand Up @@ -34,9 +34,7 @@ pub enum MessagePayload {
/// A round synchronization message
Sync,
/// Request a number of bit authentications from another party.
RequestBitAuth(BitID, Sender<SubMessage>, Receiver<SubMessage>),
/// A response to a bit authentication request.
BitAuth(BitID, Mac),
RequestBitAuth(Sender<SubMessage>, Receiver<SubMessage>),
/// A commitment on a broadcast value.
BroadcastCommitment(Commitment),
/// The opening to a broadcast value.
Expand Down Expand Up @@ -81,4 +79,10 @@ pub enum SubMessage {
EQResponse(Vec<u8>),
/// An EQ initiator opening
EQOpening(Opening),
/// A KOS OT extension sender message in Phase I
KOSSenderPhaseI(KOSSenderPhaseI),
/// A KOS OT extension sender message in Phase I
KOSReceiverPhaseI(KOSReceiverPhaseI),
/// A KOS OT extension sender message in Phase I
KOSSenderPhaseII(KOSSenderPhaseII),
}
Loading
Loading