[mono][jit] Adding compare all/any intrinsics. #83515
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jandupej
requested review from
vargaz,
lambdageek,
SamMonoRT and
marek-safar
as code owners
ghost
assigned 
src/mono/mono/mini/simd-intrinsics.c
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| if (!(cfg->compile_aot && cfg->full_aot && !cfg->interp)) | ||
| return NULL; | ||
| #endif | ||
| //#ifdef TARGET_ARM64 |
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It would be nice to add some kind of option for this into utils/options-def.h:
DEFINE_BOOL(experimental_jit_simd, "experimental-jit-simd", FALSE,"")
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I like the idea. This is now tracked in #83587
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src/mono/mono/mini/mini-arm64.c
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| { | ||
| switch (mode) { | ||
| case SIMD_EXTR_MAX8: | ||
| arm_neon_umaxv (code, VREG_FULL, TYPE_I8, FP_TEMP_REG, sreg1); |
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Is it possible to not hardcode the length of the vector to VREG_FULL. I am thinking of reusing for vector64 in the future.
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Yes, there is a 64-bit variant of this.
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OP_XEXTRACT now carries vector width (8 or 16) in ins->inst_c1.
src/mono/mono/mini/simd-intrinsics.c
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| int id = lookup_intrins (sri_vector_methods, sizeof (sri_vector_methods), cmethod); | ||
| if (id == -1) { | ||
| //check_no_intrinsic_cattr (cmethod); | ||
| return NULL; | ||
| } | ||
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| if (!strcmp (m_class_get_name (cfg->method->klass), "Vector256")) | ||
| if (!strcmp (m_class_get_name (cfg->method->klass), "Vector256") || !strcmp (m_class_get_name (cfg->method->klass), "Vector512")) | ||
| return NULL; // TODO: Fix Vector256.WithUpper/WithLower |
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The TODO comment is no longer true here. Everything there needs to be tested, when supporting Vector256. Do you mind removing the comment in this PR?
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Failures are related. Strangely, the results in |
…r names. Equality/Inequality are now also intrinsics.
…l are implemented.
This adds the following intrinsics:
Equals{All,Any},GreaterThan{All,Any},GreaterThanOrEqual{All,Any},LessThan{All,Any},LessThanOrEqual{All,Any}.This performs the vector compare operation, whose result is either all 1 or all 0 in the element depending on the result. Afterwards a horizontal maximum or minimum byte is found to determine if all (or any) are nonzero.
umaxv/uminvshould be fast on M1 with a latency of 3 and throughput of 4 per clock. (https://dougallj.github.io/applecpu/firestorm-simd.html)Necessary arm64 codegen macros are also fixed and converted to the parametrized form.
Contributes to #80566.