Merge pull request #137 from eschnett/eschnett/bswap

Correct bswap for 1-byte types

.github/workflows/ci.yml

@@ -24,14 +24,17 @@ jobs:
         include:
           - arch: "x64"
             os: "ubuntu-latest"
-            version: "1.10"
+            version: "1.11"
           - arch: "x64"
             os: "windows-latest"
-            version: "1.10"
+            version: "1.11"
           - arch: "x64"
             os: "macOS-latest"
-            version: "1.10"
+            version: "1.11"
           - arch: "x86"
+            os: "ubuntu-latest"
+            version: "1.11"
+          - arch: "x64"
             os: "ubuntu-latest"
             version: "1.10"
           - arch: "x64"
@@ -59,7 +62,7 @@ jobs:
       - uses: julia-actions/julia-buildpkg@v1
       - uses: julia-actions/julia-runtest@v1
       - uses: julia-actions/julia-processcoverage@v1
-      - uses: codecov/codecov-action@v2
+      - uses: codecov/codecov-action@v5
         env:
           CODECOV_TOKEN: 82aae245-ad5c-41ac-9e30-b64617ce25b0
         with:

.github/workflows/ci_julia_nightly.yml

@@ -43,7 +43,7 @@ jobs:
       - uses: julia-actions/julia-buildpkg@v1
       - uses: julia-actions/julia-runtest@v1
       - uses: julia-actions/julia-processcoverage@v1
-      - uses: codecov/codecov-action@v2
+      - uses: codecov/codecov-action@v5
         env:
           CODECOV_TOKEN: 82aae245-ad5c-41ac-9e30-b64617ce25b0
         with:

Project.toml

@@ -1,7 +1,7 @@
 name = "SIMD"
 uuid = "fdea26ae-647d-5447-a871-4b548cad5224"
 authors = ["Erik Schnetter <[email protected]>", "Kristoffer Carlsson <[email protected]>"]
-version = "3.7.0"
+version = "3.7.1"
 
 [deps]
 PrecompileTools = "aea7be01-6a6a-4083-8856-8a6e6704d82a"

src/simdvec.jl

@@ -157,6 +157,10 @@ for (op, constraint, llvmop) in UNARY_OPS
         Vec($(llvmop)(x.data))
 end
 
+# Fix up bswap (see <https://github.com/eschnett/SIMD.jl/issues/122>):
+# bswap for 1-byte types is a no-op
+Base.bswap(x::Vec{<:Any, <:Union{Int8,UInt8}}) = x
+
 Base.:+(v::Vec{<:Any, <:ScalarTypes}) = v
 Base.:-(v::Vec{<:Any, <:IntegerTypes}) = zero(v) - v
 Base.:-(v::Vec{<:Any, <:FloatingTypes}) = Vec(Intrinsics.fneg(v.data))

test/runtests.jl

@@ -103,7 +103,8 @@ llvm_ir(f, args) = sprint(code_llvm, f, Base.typesof(args...))
 
         notbool(x) = !(x>=typeof(x)(0))
         for op in (~, +, -, abs, abs2, notbool, sign, signbit, count_ones, count_zeros,
-                   leading_ones, leading_zeros, conj, real, imag, trailing_ones, trailing_zeros)
+                   leading_ones, leading_zeros, conj, real, imag, trailing_ones, trailing_zeros,
+                   bswap)
             @test Tuple(op(V8I32(v8i32))) == map(op, v8i32)
         end
 
@@ -142,6 +143,14 @@ llvm_ir(f, args) = sprint(code_llvm, f, Base.typesof(args...))
         @test Tuple(V8I32(v8i32)^3) === v8i32.^3
     end
 
+    @testset "bswap" begin
+        for sz in [1, 2, 4, 8, 16, 32]
+            VszI8 = Vec{sz,Int8}
+            vszi8 = ntuple(i->Int8(ifelse(isodd(i), i, -i)), sz)
+            @test Tuple(bswap(VszI8(vszi8))) == map(bswap, vszi8)
+        end
+    end
+
     @testset "saturation" begin
         v = Vec{4, UInt8}(UInt8.((150, 250, 125, 0)))
         @test SIMD.add_saturate(v, UInt8(50)) === Vec{4, UInt8}(UInt8.((200, 255, 175, 50)))