Skip to content

Commit

Permalink
fix IEEE compliancy in floating point min/max reductions on LLVM vers…
Browse files Browse the repository at this point in the history
…ion that supports it (#130)

Co-authored-by: KristofferC <[email protected]>
  • Loading branch information
KristofferC and KristofferC authored Nov 11, 2024
1 parent 48a8a4e commit 7739d91
Show file tree
Hide file tree
Showing 3 changed files with 15 additions and 4 deletions.
6 changes: 4 additions & 2 deletions src/LLVM_intrinsics.jl
Original file line number Diff line number Diff line change
Expand Up @@ -806,9 +806,11 @@ end
# Horizontal reductions (LLVM 9) #
##################################

const SUPPORTS_FMAXIMUM_FMINIMUM = Base.libllvm_version >= v"18"

const HORZ_REDUCTION_OPS_FLOAT = [
:fmax
:fmin
SUPPORTS_FMAXIMUM_FMINIMUM ? :fmaximum : :fmax
SUPPORTS_FMAXIMUM_FMINIMUM ? :fminimum : :fmin
]

const HORZ_REDUCTION_OPS_INT = [
Expand Down
4 changes: 2 additions & 2 deletions src/simdvec.jl
Original file line number Diff line number Diff line change
Expand Up @@ -458,10 +458,10 @@ const HORZ_REDUCTION_OPS = [
(| , Union{IntegerTypes, Bool} , Intrinsics.reduce_or)
(max , IntTypes , Intrinsics.reduce_smax)
(max , UIntTypes , Intrinsics.reduce_umax)
(max , FloatingTypes , Intrinsics.reduce_fmax)
(max , FloatingTypes , Intrinsics.SUPPORTS_FMAXIMUM_FMINIMUM ? Intrinsics.reduce_fmaximum : Intrinsics.reduce_fmax)
(min , IntTypes , Intrinsics.reduce_smin)
(min , UIntTypes , Intrinsics.reduce_umin)
(min , FloatingTypes , Intrinsics.reduce_fmin)
(min , FloatingTypes , Intrinsics.SUPPORTS_FMAXIMUM_FMINIMUM ? Intrinsics.reduce_fminimum : Intrinsics.reduce_fmin)
(+ , Union{IntegerTypes, Bool} , Intrinsics.reduce_add)
(* , IntegerTypes , Intrinsics.reduce_mul)
(+ , FloatingTypes , Intrinsics.reduce_fadd)
Expand Down
9 changes: 9 additions & 0 deletions test/runtests.jl
Original file line number Diff line number Diff line change
Expand Up @@ -354,6 +354,15 @@ llvm_ir(f, args) = sprint(code_llvm, f, Base.typesof(args...))

@test sum(Vec{3,Float64}(1)) === 3.0
@test prod(Vec{5,Float64}(2)) === 32.0

# Floating point reduce IEEEE # https://github.com/eschnett/SIMD.jl/issues/129
if SIMD.Intrinsics.SUPPORTS_FMAXIMUM_FMINIMUM
t = (1.0, 2.0, NaN, 0.5)
tv = SIMD.Vec(t)

@test isnan(reduce(min, t))
@test isnan(reduce(min, tv))
end
end

@testset "Load and store functions" begin
Expand Down

0 comments on commit 7739d91

Please sign in to comment.