Skip to content
View jotego's full-sized avatar
💾
Busy with next gen retro
💾
Busy with next gen retro

Sponsors

@rejunity
@mauwii
@rendar82
@BrianPeek
@MiSTeX-devel
@PublicSectorKit
@martinx72
Private Sponsor
@ure
Private Sponsor
@MartinPilote
@rock820317
@BigJ64

Highlights

  • Pro

Organizations

@MiSTer-devel

Block or report jotego

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Pinned Loading

  1. jtcores jtcores Public

    FPGA cores compatible with multiple arcade game machines and KiCAD schematics of arcade games. Working on MiSTer FPGA/Analogue Pocket

    Verilog 240 41

  2. jtbin jtbin Public

    Binary files for MiSTerFPGA, Pocket and other platforms

    Arc 251 72

  3. jt12 jt12 Public

    FM sound source written in Verilog, fully compatible with YM2612, YM3438 (JT12), YM2203 (JT03) and YM2610 (JT10)

    Verilog 120 22

  4. jt51 jt51 Public

    YM2151 clone in verilog. FPGA proven.

    VHDL 77 18

  5. jtopl jtopl Public

    Verilog module compatible with Yamaha OPL chips

    Verilog 48 10