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...pq807x_generic/diy/target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ap8220.dts
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT | ||
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/dts-v1/; | ||
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#include "ipq8074.dtsi" | ||
#include "ipq8074-ac-cpu.dtsi" | ||
#include "ipq8074-ess.dtsi" | ||
#include "ipq8074-nss.dtsi" | ||
#include <dt-bindings/gpio/gpio.h> | ||
#include <dt-bindings/input/input.h> | ||
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/ { | ||
model = "Aliyun AP8220"; | ||
compatible = "aliyun,ap8220", "qcom,ipq8074"; | ||
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aliases { | ||
serial0 = &blsp1_uart5; | ||
led-boot = &led_pwr; | ||
led-failsafe = &led_pwr; | ||
led-running = &led_pwr; | ||
led-upgrade = &led_pwr; | ||
}; | ||
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chosen { | ||
stdout-path = "serial0:115200n8"; | ||
bootargs-append = " root=/dev/ubiblock0_1 swiotlb=1 coherent_pool=2M"; | ||
}; | ||
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keys { | ||
compatible = "gpio-keys"; | ||
pinctrl-0 = <&button_pins>; | ||
pinctrl-names = "default"; | ||
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reset { | ||
label = "reset"; | ||
linux,code = <KEY_RESTART>; | ||
gpios = <&tlmm 0x42 GPIO_ACTIVE_LOW>; | ||
}; | ||
}; | ||
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leds { | ||
compatible = "gpio-leds"; | ||
pinctrl-0 = <&led_pins>; | ||
pinctrl-names = "default"; | ||
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led_pwr: power { | ||
label = "pwr"; | ||
gpio = <&tlmm 0x2e GPIO_ACTIVE_HIGH>; | ||
}; | ||
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led_2g: 2g { | ||
label = "wlan2g"; | ||
gpio = <&tlmm 0x2f GPIO_ACTIVE_HIGH>; | ||
}; | ||
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led_5g: 5g { | ||
label = "wlan5g"; | ||
gpio = <&tlmm 0x30 GPIO_ACTIVE_HIGH>; | ||
}; | ||
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led_ble: ble { | ||
label = "ble"; | ||
gpio = <&tlmm 0x32 GPIO_ACTIVE_HIGH>; | ||
}; | ||
}; | ||
}; | ||
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&tlmm { | ||
button_pins: button_pins { | ||
phandle = <0x52>; | ||
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wps_button { | ||
pins = "gpio66"; | ||
function = "gpio"; | ||
drive-strength = <0x08>; | ||
bias-pull-up; | ||
}; | ||
}; | ||
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usb_mux_pins { | ||
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mux { | ||
pins = "gpio27"; | ||
function = "gpio"; | ||
drive-strength = <0x08>; | ||
bias-pull-down; | ||
}; | ||
}; | ||
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pcie_pins { | ||
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pcie0_rst { | ||
pins = "gpio58"; | ||
function = "pcie0_rst"; | ||
drive-strength = <0x08>; | ||
bias-pull-down; | ||
}; | ||
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pcie0_wake { | ||
pins = "gpio59"; | ||
function = "pcie0_wake"; | ||
drive-strength = <0x08>; | ||
bias-pull-down; | ||
}; | ||
}; | ||
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mdio_pins: mdio-pins { | ||
phandle = <0x27>; | ||
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mux_0 { | ||
pins = "gpio68"; | ||
function = "mdc"; | ||
drive-strength = <0x08>; | ||
bias-pull-up; | ||
}; | ||
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mux_1 { | ||
pins = "gpio69"; | ||
function = "mdio"; | ||
drive-strength = <0x08>; | ||
bias-pull-up; | ||
}; | ||
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mux_2 { | ||
pins = "gpio33"; | ||
function = "gpio"; | ||
bias-pull-up; | ||
}; | ||
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mux_3 { | ||
pins = "gpio44"; | ||
function = "gpio"; | ||
bias-pull-up; | ||
}; | ||
}; | ||
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led_pins: led-pins { | ||
phandle = <0x53>; | ||
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led_pwr { | ||
pins = "gpio46"; | ||
function = "gpio"; | ||
drive-strength = <0x02>; | ||
bias-pull-up; | ||
}; | ||
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led_2g { | ||
pins = "gpio47"; | ||
function = "gpio"; | ||
drive-strength = <0x02>; | ||
bias-pull-down; | ||
}; | ||
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led_5g { | ||
pins = "gpio48"; | ||
function = "gpio"; | ||
drive-strength = <0x02>; | ||
bias-pull-down; | ||
}; | ||
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led_ble { | ||
pins = "gpio50"; | ||
function = "gpio"; | ||
drive-strength = <0x02>; | ||
bias-pull-down; | ||
}; | ||
}; | ||
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}; | ||
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&blsp1_spi1 { | ||
pinctrl-0 = <&spi_0_pins>; | ||
pinctrl-names = "default"; | ||
cs-select = <0>; | ||
status = "okay"; | ||
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flash@0 { | ||
compatible = "jedec,spi-nor"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
reg = <0>; | ||
spi-max-frequency = <50000000>; | ||
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partitions { | ||
compatible = "fixed-partitions"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
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partition@0 { | ||
label = "0:SBL1"; | ||
reg = <0x00 0x50000>; | ||
}; | ||
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partition@50000 { | ||
label = "0:MIBIB"; | ||
reg = <0x50000 0x10000>; | ||
}; | ||
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partition@60000 { | ||
label = "0:QSEE"; | ||
reg = <0x60000 0x180000>; | ||
}; | ||
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partition@1e0000 { | ||
label = "0:DEVCFG"; | ||
reg = <0x1e0000 0x10000>; | ||
}; | ||
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partition@1f0000 { | ||
label = "0:APDP"; | ||
reg = <0x1f0000 0x10000>; | ||
}; | ||
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partition@200000 { | ||
label = "0:RPM"; | ||
reg = <0x200000 0x40000>; | ||
}; | ||
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partition@240000 { | ||
label = "0:CDT"; | ||
reg = <0x240000 0x10000>; | ||
}; | ||
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partition@250000 { | ||
label = "0:APPSBLENV"; | ||
reg = <0x250000 0x10000>; | ||
}; | ||
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partition@260000 { | ||
label = "0:APPSBL"; | ||
reg = <0x260000 0xa0000>; | ||
}; | ||
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partition@300000 { | ||
label = "0:ART"; | ||
reg = <0x300000 0x40000>; | ||
}; | ||
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partition@340000 { | ||
label = "0:ETHPHYFW"; | ||
reg = <0x340000 0x80000>; | ||
}; | ||
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partition@3c0000 { | ||
label = "product_info"; | ||
reg = <0x3c0000 0x10000>; | ||
}; | ||
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partition@3d0000 { | ||
label = "mtdoops"; | ||
reg = <0x3d0000 0x20000>; | ||
}; | ||
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partition@3f0000 { | ||
label = "priv_data1"; | ||
reg = <0x3f0000 0x10000>; | ||
}; | ||
}; | ||
}; | ||
}; | ||
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&blsp1_uart5 { | ||
status = "okay"; | ||
}; | ||
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&cryptobam { | ||
status = "okay"; | ||
}; | ||
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&crypto { | ||
status = "okay"; | ||
}; | ||
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&prng { | ||
status = "okay"; | ||
}; | ||
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&qpic_bam { | ||
status = "okay"; | ||
}; | ||
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&qpic_nand { | ||
status = "okay"; | ||
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nand@0 { | ||
reg = <0>; | ||
#address-cells = <0x01>; | ||
#size-cells = <0x01>; | ||
nand-ecc-strength = <0x04>; | ||
nand-ecc-step-size = <0x200>; | ||
nand-bus-width = <0x08>; | ||
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partition@0 { | ||
label = "rootfs"; | ||
reg = <0x00 0x8000000>; | ||
}; | ||
}; | ||
}; | ||
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&mdio { | ||
status = "okay"; | ||
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pinctrl-0 = <&mdio_pins>; | ||
pinctrl-names = "default"; | ||
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qca8081_24: ethernet-phy@24 { | ||
compatible = "ethernet-phy-id004d.d101"; | ||
reg = <24>; | ||
reset-gpios = <&tlmm 25 GPIO_ACTIVE_LOW>; | ||
}; | ||
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qca8081_28: ethernet-phy@28 { | ||
compatible = "ethernet-phy-id004d.d101"; | ||
reg = <28>; | ||
reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>; | ||
}; | ||
}; | ||
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&switch { | ||
status = "okay"; | ||
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switch_lan_bmp = <0x3e>; /* lan port bitmap */ | ||
switch_wan_bmp = <0x40>; /* wan port bitmap */ | ||
switch_mac_mode = <0>; /* mac mode for uniphy instance0*/ | ||
switch_mac_mode1 = <0xf>; /* mac mode for uniphy instance1*/ | ||
switch_mac_mode2 = <0xf>; /* mac mode for uniphy instance2*/ | ||
bm_tick_mode = <0>; /* bm tick mode */ | ||
tm_tick_mode = <0>; /* tm tick mode */ | ||
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qcom,port_phyinfo { | ||
port@5 { | ||
port_id = <5>; | ||
phy_address = <24>; | ||
port_mac_sel = "QGMAC_PORT"; | ||
}; | ||
port@6 { | ||
port_id = <6>; | ||
phy_address = <28>; | ||
port_mac_sel = "QGMAC_PORT"; | ||
}; | ||
}; | ||
}; | ||
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&edma { | ||
status = "okay"; | ||
}; | ||
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&dp5 { | ||
status = "okay"; | ||
phy-handle = <&qca8081_24>; | ||
}; | ||
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&dp6 { | ||
status = "okay"; | ||
phy-handle = <&qca8081_28>; | ||
}; |
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