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Added RP2040-LoRA target #3195

Merged
merged 3 commits into from
Feb 11, 2024
Merged

Added RP2040-LoRA target #3195

merged 3 commits into from
Feb 11, 2024

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thebentern
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Based on @markbirss's work

thebentern added a commit to meshtastic/artifacts that referenced this pull request Feb 10, 2024
@thebentern thebentern marked this pull request as ready for review February 11, 2024 02:09
@thebentern thebentern merged commit ce8673b into master Feb 11, 2024
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@thebentern thebentern deleted the rp2040-lora branch February 11, 2024 02:09
@markbirss
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Im my tests i did get some noise and bad packets

@thebentern
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Im my tests i did get some noise and bad packets

Perhaps there is something misconfigured with the SX1262 pins in the variant. The pin map indicates a SX1262_ANT_SW on GPIO17 which sounds similar to how the xiao-ble variant uses the RXEN pin only in conjunction with DIO2. I wonder if the noise and bad packets could be that the switch is still in transmit mode as we try to receive message.

mverch67 pushed a commit that referenced this pull request Feb 12, 2024
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2 participants