Booth's Multiplier in Verilog

Implementation of booth's multiplier algorithm for signed numbers in verilog. Datapath and controller design approach is used.

Architecture

Datapath Architecture

Timing Diagram

Name		Name	Last commit message	Last commit date
Latest commit History 4 Commits
AddSub.v		AddSub.v
Booth_Algo_Controlpath.v		Booth_Algo_Controlpath.v
Booth_Algo_Datapath.v		Booth_Algo_Datapath.v
Booth_Algo_tb.v		Booth_Algo_tb.v
Booth_Multiplier.v		Booth_Multiplier.v
Booth_Multiplier_TB.v		Booth_Multiplier_TB.v
Counter.v		Counter.v
Dff.v		Dff.v
PIPOReg.v		PIPOReg.v
README.md		README.md
shiftReg.v		shiftReg.v

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