rj/itcm #322
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rj/itcm #322
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needs newer fixed cortex-m-rt 0.6.13+unreleased relevant? https://reviews.llvm.org/D81986
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323: link.x.in: put most __[se] symbols back into sections r=adamgreig a=jordens This puts most start/end address symbols back into the sections. Only `__ebss` and `__edata` are kept outside their sections so that potential user code with external libraries can inject stuff using `INSERT AFTER .bss/.data` and profit from the .bss/.data zeroing/loading mechanism. This also leads to the `__sbss` and `__veneer_base` symbols having the right section type (bss is B not D in nm). Also the trust zone start and end address are aligned to 32 bytes as per the requirements. That section does cost up to 28 byte of padding at the end of FLASH due to that alignment even if empty. But since flash is typically a multiple of 32 bytes and since the padding is at the end, there is no downside. The .rodata start is kept free for the linker to allocate it after .text. This enables users to inject sections between .text and .rodata and removes the chance to get overlapping address errors. With this the linker will by default place .rodata after .text as before. This commit also adds and exposes a few more stable address start/end symbols (__[se]uninit, __stext, __srodata) that are usefull for debugging and hooking into. See #287 (comment) for discussion of the issues and description of this compromise solution. Tested: * [x] [stm32h7 ITCM](quartiq/stabilizer#322) * [x] [sgstubs](#323 (comment)) * [x] `INSERT AFTER` for bss/data still works (#323 (comment)) Topics: * [x] `sgstubs` moved to be the last section in FLASH to minimize the impact of the 32 byte alignment. (Padding flash to 32 byte is considered benign.) * [ ] `INSERT AFTER` with binutils ld doesn't work. But that's independent of these changes. This is the `sgstubs`-in `memory.x` use case. Currently the `sgstubs` section is kept in `link.x`. Co-authored-by: Robert Jördens <[email protected]>
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* master: (70 commits) Updating JSON syntax Updating trigger Adding bors timeout dual-iir: add some mqtt parameter docs changelog: spelling update lock let bors handle hitl prepare v0.5.0 release Updating code after review Adding comment, reverting change Adding sleep to HITL run Updating ping deadline Reverting unintended change Updating dependency revision Renaming interface to avoid confusion dual-iir: use InputPin re-export, rename digital_input Updating dependency dual-iir: add enable_hold, force_hold fix bench hardware: add digital input support ...
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* origin/master: (34 commits) Simplifying unit conversions Cleaning up conversion + comments Addressing review feedback Update src/hardware/dac.rs Renaming AdcSample -> AdcCode Updating float conversion Adding adc/dac code conversion utilities Simplifying settings lock Updating after review Updating delay Fixing merge Formatting Updating dependencies Fixing clippy Finalizing merge Merging lockin app functions Fixing system timer Fixing build, formatting Adding documentation Renaming files ...
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* rj/log: refine panic handler and add some logging info hitl: kill probe-run cleanly set target-cpu=cortex-m7, MSRV 1.52.0, use probe-run README: document lockin, cleanup instructions, use probe-run CHANGELOG: update README: streamline docs a bit, add probe-run update hitl script remove rtt feature use rtt logging dsp/lowpass,lockin: const generics
* origin/master: deps: fix rtt-logger->rtt-target, cleanup, bump cortex-m build(deps): bump embedded-hal from 0.2.4 to 0.2.5 Bump rtt-target from 0.2.2 to 0.3.1 Bump serde from 1.0.125 to 1.0.126 remove unused dependencies remove unused dependencies
ryan-summers
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May 27, 2021
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May 28, 2021
322: rj/itcm r=jordens a=jordens * close #315 * would profit from cortex-m-rtic 0.6 elevating the attributes to the actual ISR thus removing the veneer Co-authored-by: Robert Jördens <[email protected]>
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adamgreig
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Jan 12, 2022
323: link.x.in: put most __[se] symbols back into sections r=adamgreig a=jordens This puts most start/end address symbols back into the sections. Only `__ebss` and `__edata` are kept outside their sections so that potential user code with external libraries can inject stuff using `INSERT AFTER .bss/.data` and profit from the .bss/.data zeroing/loading mechanism. This also leads to the `__sbss` and `__veneer_base` symbols having the right section type (bss is B not D in nm). Also the trust zone start and end address are aligned to 32 bytes as per the requirements. That section does cost up to 28 byte of padding at the end of FLASH due to that alignment even if empty. But since flash is typically a multiple of 32 bytes and since the padding is at the end, there is no downside. The .rodata start is kept free for the linker to allocate it after .text. This enables users to inject sections between .text and .rodata and removes the chance to get overlapping address errors. With this the linker will by default place .rodata after .text as before. This commit also adds and exposes a few more stable address start/end symbols (__[se]uninit, __stext, __srodata) that are usefull for debugging and hooking into. See rust-embedded/cortex-m-rt#287 (comment) for discussion of the issues and description of this compromise solution. Tested: * [x] [stm32h7 ITCM](quartiq/stabilizer#322) * [x] [sgstubs](rust-embedded/cortex-m-rt#323 (comment)) * [x] `INSERT AFTER` for bss/data still works (rust-embedded/cortex-m-rt#323 (comment)) Topics: * [x] `sgstubs` moved to be the last section in FLASH to minimize the impact of the 32 byte alignment. (Padding flash to 32 byte is considered benign.) * [ ] `INSERT AFTER` with binutils ld doesn't work. But that's independent of these changes. This is the `sgstubs`-in `memory.x` use case. Currently the `sgstubs` section is kept in `link.x`. Co-authored-by: Robert Jördens <[email protected]>
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process()task from ITCM #315